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/*****************************************************************************
* Copyright Statement:
* --------------------
* This software is protected by Copyright and the information contained
* herein is confidential. The software may not be copied and the information
* contained herein may not be used or disclosed except with the written
* permission of MediaTek Inc. (C) 2005
*
* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
*
* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
*
*****************************************************************************/
/*****************************************************************************
*
* Filename:
* ---------
* init.h
*
* Project:
* --------
* Maui_Software
*
* Description:
* ------------
*
*
* Author:
* -------
* -------
*
*============================================================================
* HISTORY
* Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
*------------------------------------------------------------------------------
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[MAUI_03149504] ([MAUI_03180970]) all time memory dump
[MAUI_03121063] remove PDN registers
[MAUI_03147344] Dummy read for early response HW
[MAUI_03161918] remove custom_setAdvEMI from bootarm.S
[MAUI_03157059] security use meta to write
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*------------------------------------------------------------------------------
* Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
*============================================================================
****************************************************************************/
#ifndef _INIT_COMM_H
#define _INIT_COMM_H
/*******************************************************************************
* Include header files
*******************************************************************************/
//MSBB remove #include "kal_non_specific_general_types.h"
#include "kal_trace.h"
#include "init_public.h"
#include "drv_comm.h"
#include "reg_base.h"
/*******************************************************************************
* Boot slave register base
*******************************************************************************/
#if defined(__MD97__)||defined(__MD97P__)
#if defined(MT6297_IA)
#define MCU_BOOTSLV_CTRL_BASE (BASE_MADDR_MDPERIMISC + 0x1204)
#else
#define MCU_BOOTSLV_CTRL_BASE (BASE_MADDR_MDPERIMISC + 0x1104)
#endif
#else
#define MCU_BOOTSLV_CTRL_BASE (BASE_MADDR_MDPERIMISC + 0x104)
#endif
#define MCU_BOOTSLV_CTRL_CORE(index) (MCU_BOOTSLV_CTRL_BASE + (index) * 0xC)
#define MCU_BOOTSLV_JUMP_ADDR(index) (MCU_BOOTSLV_CTRL_CORE(index) + 0x0)
#define MCU_BOOTSLV_JUMP_ADDR_UPDATE(index) (MCU_BOOTSLV_CTRL_CORE(index) + 0x4)
#define MCU_BOOTSLV_JUMP_ADDR_UNLOCK(index) (MCU_BOOTSLV_CTRL_CORE(index) + 0x8)
#define MCU_BOOTSLV_AP_TRIG (BASE_MADDR_MDCFGCTL + 0x24)
#define MCU_BOOTSLV_JUMP_KEY_VALUE (0x5500)
/*************************************************************************
* Define data structure
*************************************************************************/
typedef struct
{
kal_uint16 pdn_con0;
kal_uint16 pdn_con1;
kal_uint16 pdn_con2;
kal_uint16 pdn_con3;
} CONFIG_PDN_TYPE;
typedef enum
{
UNKNOWN,
ECO_END = 0x7FFFFFFF
} ECO_VERSION;
typedef enum
{
CHIP_UNKNOWN
} CHIP_NAME;
typedef enum
{
GP_UNKNOWN
} CHIP_GROUP;
typedef enum
{
B63216A,
C63216A,
C63216B,
UNKNOWN_ANALOG_DIE
} analog_die_id; /* analog die identification */
typedef enum
{
SYS_CMD_NONE,
SYS_CMD_SET_BL_DL,
SYS_CMD_SET_BROM_DL,
SYS_CMD_CLR_DL_FLAG,
CHK_USB_META_WO_BAT,
CHK_FAST_META,
SYS_CMD_BL_LOGO_DISPLAYED,
SYS_CMD_GET_PWN_STA,
SYS_CMD_GET_EMI_PARAM,
SYS_CMD_BL_BROM_CMD_MODE_DISABLED
} INIT_SYSCMD_CODE;
typedef enum mem_dev_enum_t
{
DRAM = 0xA0,
NOR_ASYNC = 0xB0,
NOR_ASYNC_PAGE = 0xB1,
NOR_SYNC_READ_ASYNC_WRITE = 0xB2,
NOR_SYNC_READ_SYNC_WRITE = 0xB3,
RAM_ASYNC = 0xC0,
RAM_ASYNC_PAGE = 0xC1,
RAM_SYNC_READ_ASYNC_WRITE = 0xC2,
RAM_SYNC_READ_SYNC_WRITE = 0xC3
} MEM_DEV_TYPE;
typedef enum
{
BL_INFO_FROM_RTC
} BL_FIRST_PWON_INFO_SRC;
typedef struct EMI_CS_STRUCT
{
kal_uint8 CS0;
kal_uint8 CS1;
kal_uint8 CS2;
kal_uint8 CS3;
} EMI_CS;
typedef struct EXTSRAM_REGION_INFO_STRCUT
{
kal_uint32 addr;
kal_uint32 len;
} EXTSRAM_REGION_INFO_T;
typedef enum
{
E_BROM,
E_BLNUSB,
E_BLSUSB,
E_ERROR_MODE
} MODE_ENTRY_SRC;
#if defined(MT6763) || defined(MT6739) || defined(MT6771) || defined(MT6765) || defined(MT6295M) || defined(MT3967) || defined(MT6779) || defined(MT6785)|| defined(MT6297) || defined(MT6885)|| defined(MERCURY) || defined(MT6873) || defined(MT6853) || defined(CHIP10992) || defined(MT6833) || defined(MT6877)
// Check these macro define is the same as MT6763 FPGA?
#define DATE_CODE_BASE 0xA0000018
#if defined(__MD97__)||defined(__MD97P__)
#define PURPOSE_CODE_BASE 0xA0000018
#else
#define PURPOSE_CODE_BASE 0xA000001C
#endif
#define PURPOSE_CODE_BIT (24)
#define PURPOSE_CODE_MASK 0x0F000000
#define CORENUM_BIT (16)
#define CORENUM_MASK 0x000F0000
#endif
#if defined(__MD97__)||defined(__MD97P__)
typedef enum
{
PURPOSE_NotSupport,
FPGA_H1,
FPGA_H2,
FPGA_H3,
FPGA_H4,
FPGA_H5,
FPGA_H6,
FPGA_Platform = 0xFF,
FPGA_LTEL2= 0xFF,
FPGA_SIB= 0xFF,
FPGA_U4G= 0xFF,
FPGA_U4G_LTEL2= 0xFF,
FPGA_BIT_PURPOSE_END = 0xFFFFFFFF
} HW_PURPOSE;
#else
typedef enum
{
PURPOSE_NotSupport,
FPGA_Platform,
FPGA_LTEL2,
FPGA_SIB,
FPGA_U4G,
FPGA_U4G_LTEL2,
FPGA_BIT_PURPOSE_END = 0xFFFFFFFF
} HW_PURPOSE;
#endif
typedef enum
{
CORENUM_NotSupport,
CORENUM_1,
CORENUM_2,
CORENUM_3,
CORENUM_4,
FPGA_BIT_CORENUM_END = 0xFFFFFFFF
} HW_CORENUM;
extern kal_uint32 INT_FPGA_DATECODE(void);
/*Only FPGA Support this function*/
#if defined (__FPGA__)
extern HW_PURPOSE INT_FPGA_PURPOSE(void);
#endif
extern HW_CORENUM INT_FPGA_CORENUM(void);
extern kal_bool INT_FPGA_IS_ASIC(void);
typedef enum
{
E_Before_20140801,
E_20140801,
E_20140802,
E_20140808,
E_20140819,
E_20140822,
E_20140824,
E_20140825,
E_20140826,
E_20140827,
E_20140828,
E_20140830,
E_20140901,
E_20140902,
E_20140903,
E_20140904,
E_20140905,
E_20140908,
E_FPGA_BIT_DATE_END = 0xFFFFFFFF
} FPGA_BIT_DATE;
typedef enum
{
E_Platform,
E_3G,
E_4G,
E_FPGA_BIT_PURPOSE_END = 0xFFFFFFFF
} FPGA_BIT_PURPOSE;
typedef struct
{
FPGA_BIT_DATE date;
FPGA_BIT_PURPOSE purpose;
} FPGA_VERSION;
extern FPGA_VERSION INT_FPGA_Version(void);
#if 0
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
#endif
/*************************************************************************
* Define system internal RAM pool size
*************************************************************************/
#ifdef __SYS_INTERN_RAM__
#define KAL_TIMER_STACK_SIZE 512
#if defined(IC_BURNIN_TEST)
#define GLOBAL_INT_SRAM_STACK_MEM_SIZE (2048)
#endif
#endif /* __SYS_INTERN_RAM__ */
/*************************************************************************
* Define import function prototype
*************************************************************************/
/* Category 0: Initialize related */
extern void Initialize(void);
/* Category 1: chip information */
extern ECO_VERSION INT_ecoVersion(void);
extern CHIP_GROUP INT_ChipGroup(void);
extern analog_die_id AnalogDieID(void);
extern CHIP_NAME INT_ChipName(void);
void INT_Init_Misc(void);
/* Category 2: Query or Set system information */
extern kal_bool INT_IsBootForUSBAT(void);
extern void INT_SetCmdToSys(INIT_SYSCMD_CODE cmd_val);
extern kal_uint32 INT_GetSysStaByCmd(INIT_SYSCMD_CODE cmd_val, void *data_p);
extern void INT_Set_BootSlave(kal_uint32 core_index, kal_uint32 jmp_addr);
#ifdef __MTK_TARGET__
extern kal_bool INT_GetAvailableMemory_Ptr(kal_uint32 **, kal_uint32 *);
extern kal_bool INT_QueryBiggestPool(kal_uint32 *, void **);
#endif
extern kal_uint32 INT_RetrieveFlashBaseAddr(void);
extern kal_bool INT_CheckSystemDriveOnNAND(void);
extern void init_32khz_output(kal_uint16 gpio_pin, kal_uint16 gpio_data);
extern kal_int32 enable_32khz_output(void);
extern kal_int32 disable_32khz_output(void);
extern kal_bool INT_RetrieveDSPTXRXBaseAddr(kal_uint32 *TX_Base, kal_uint32 *RX_Base, kal_uint32 *CS, kal_uint32 *TX_Size, kal_uint32 *RX_Size);
extern kal_int32 INT_QuerySystemRAMInfo(kal_uint32 *addr, kal_uint32 *len);
extern void wait_32k_start(void);
#if defined(__MTK_TARGET__)
extern kal_int32 show_sysinit_msg(void);
#else /* __MTK_TARGET__ */
#define show_sysinit_msg()
#endif /* __MTK_TARGET__ */
#if defined(__RTL_SIMULATION_FOR_60QBIT__)
extern kal_int32 profile_INT_SwitchStackToRun_before(void);
extern kal_int32 profile_INT_SwitchStackToRun_after(void);
#endif /* __RTL_SIMULATION_FOR_60QBIT__ */
/*************************************************************************
* Define customized function prototype
*************************************************************************/
extern kal_int8 custom_setEMI(void);
extern EMI_CS * custom_getCS(void);
extern void custom_get_EXTSRAM_size(kal_uint32 *);
extern kal_uint32 custom_get_demp_image_table(void);
extern kal_int32 custom_config_demp_page(kal_uint32 **list, kal_uint32 **pool, kal_uint32 *pool_size);
extern MODE_ENTRY_SRC INT_GetMetaModeSrc(void);
/*************************************************************************
* Define region attribute
*************************************************************************/
#if defined(__MTK_TARGET__)
#include "sys/cdefs.h"
#undef __section
#define __section(S) __attribute__ ((section(#S)))
#define __attr_cached_ext_zi __section(CACHED_EXTSRAM_PREINIT_ZI)
#define __attr_emiinit_zi __section(EMIINITZI)
#define __attr_emiinit_code __section(EMIINITCODE)
#define __attr_lead_part __section(INTSRAM_RODATA)
#else
#define __attr_cached_ext_zi
#define __attr_emiinit_zi
#define __attr_emiinit_code
#define __attr_lead_part
#endif /* __MTK_TARGET__ */
#endif /* !_INIT_H */