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/*****************************************************************************
* Copyright Statement:
* --------------------
* This software is protected by Copyright and the information contained
* herein is confidential. The software may not be copied and the information
* contained herein may not be used or disclosed except with the written
* permission of MediaTek Inc. (C) 2014
*
* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
*
* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
*
*****************************************************************************/
/*****************************************************************************
*
* Filename:
* ---------
* dcl_pmic6325_sw.h
*
* Project:
* --------
* MOLY Software
*
* Description:
* ------------
* This file is for PMIC 6325
*
* Author:
* -------
* -------
*
*============================================================================
* HISTORY
* Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
*------------------------------------------------------------------------------
* removed!
* removed!
* removed!
*
* removed!
* removed!
* removed!
* removed!
* removed!
* removed!
* removed!
*
* removed!
* removed!
* removed!
*------------------------------------------------------------------------------
* Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
*============================================================================
****************************************************************************/
#ifndef __DCL_PMIC6325_SW_H_STRUCT__
#define __DCL_PMIC6325_SW_H_STRUCT__
#include "dcl_pmic_features.h"
#ifdef PMIC_6325_REG_API
// Combinational functions
extern void pmic6325_customization_init(void);
typedef enum
{
MT6325_HWCID,
MT6325_SWCID,
MT6325_RG_VPA_MODESET,
MT6325_RG_VRF18_0_MODESET,
MT6325_VRF18_0_EN_CTRL,
MT6325_VRF18_0_VOSEL_CTRL,
MT6325_VRF18_0_EN_SEL,
MT6325_VRF18_0_VOSEL_SEL,
MT6325_VRF18_0_EN,
MT6325_VRF18_0_VOSEL,
MT6325_VRF18_0_VOSEL_ON,
MT6325_VRF18_0_VOSEL_SLEEP,
MT6325_VRF18_0_VSLEEP_EN,
MT6325_VPA_EN_SEL,
MT6325_VPA_VOSEL_SEL,
MT6325_VPA_EN,
MT6325_VPA_VOSEL,
MT6325_VPA_VOSEL_ON,
MT6325_VPA_VOSEL_SLEEP,
MT6325_RG_VTCXO0_MODE_SET,
MT6325_RG_VTCXO0_EN,
MT6325_RG_VTCXO0_MODE_CTRL,
MT6325_RG_VTCXO0_ON_CTRL,
MT6325_RG_VTCXO0_SRCLK_MODE_SEL,
MT6325_QI_VTCXO0_MODE,
MT6325_RG_VTCXO1_MODE_SET,
MT6325_RG_VTCXO1_EN,
MT6325_RG_VTCXO1_MODE_CTRL,
MT6325_RG_VTCXO1_ON_CTRL,
MT6325_RG_VTCXO1_SRCLK_MODE_SEL,
MT6325_QI_VTCXO1_MODE,
MT6325_RG_VRF18_1_MODE_SET,
MT6325_RG_VRF18_1_EN,
MT6325_RG_VRF18_1_MODE_CTRL,
MT6325_RG_VRF18_1_ON_CTRL,
MT6325_RG_VRF18_1_SRCLK_MODE_SEL,
MT6325_QI_VRF18_1_MODE,
MT6325_RG_VRF18_1_SRCLK_EN_SEL,
MT6325_RG_VSIM1_MODE_SET,
MT6325_RG_VSIM1_EN,
MT6325_RG_VSIM1_MODE_CTRL,
MT6325_RG_VSIM1_ON_CTRL,
MT6325_RG_VSIM1_SRCLK_MODE_SEL,
MT6325_QI_VSIM1_MODE,
MT6325_RG_VSIM1_STBTD,
MT6325_RG_VSIM1_SRCLK_EN_SEL,
MT6325_RG_VSIM2_MODE_SET,
MT6325_RG_VSIM2_EN,
MT6325_RG_VSIM2_MODE_CTRL,
MT6325_RG_VSIM2_ON_CTRL,
MT6325_RG_VSIM2_SRCLK_MODE_SEL,
MT6325_QI_VSIM2_MODE,
MT6325_RG_VSIM2_STBTD,
MT6325_RG_VSIM2_SRCLK_EN_SEL,
MT6325_QI_VSIM2_STB,
MT6325_QI_VSIM2_EN,
MT6325_RG_VMIPI_MODE_SET,
MT6325_RG_VMIPI_EN,
MT6325_RG_VMIPI_MODE_CTRL,
MT6325_RG_VMIPI_ON_CTRL,
MT6325_RG_VMIPI_SRCLK_MODE_SEL,
MT6325_QI_VMIPI_MODE,
MT6325_RG_VMIPI_STBTD,
MT6325_RG_VMIPI_SRCLK_EN_SEL,
MT6325_QI_VMIPI_EN,
MT6325_RG_VSIM2_VOSEL,
MT6325_RG_VSIM1_VOSEL,
MT6325_RG_SPK_CCODE,
MT6325_RG_SPK_EN_VIEW_VCM,
MT6325_RG_SPK_FBRC_EN,
MT6325_SPK_TEST_MODE0,
MT6325_SPK_TD_DONE,
MT6325_AUXADC_RQST1_SET,
MT6325_AUXADC_RQST1_CLR,
MT6325_RG_ADC_OUT_MD,
MT6325_RG_ADC_RDY_MD,
MT6325_RG_MD_RQST,
MT6325_RG_VREF18_ENB_MD,
}PMIC6325_FLAGS_LIST_ENUM;
#endif // #ifdef PMIC_6325_REG_API
#endif // #ifndef __DCL_PMIC6325_SW_H_STRUCT__