[Feature]Upload Modem source code
Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/custom/driver/common/adc_nvram_def.c b/mcu/custom/driver/common/adc_nvram_def.c
new file mode 100644
index 0000000..b1cce8e
--- /dev/null
+++ b/mcu/custom/driver/common/adc_nvram_def.c
@@ -0,0 +1,255 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * adc_nvram_def.c
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * This file contains `vendor' defined logical data items stored in NVRAM.
+ * These logical data items are used in object code of Protocol Stack software.
+ *
+ * As for customizable logical data items, they are defined in nvram_user_config.c
+ *
+ * Author:
+ * -------
+ *
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef NVRAM_NOT_PRESENT
+
+
+/*
+ * Include Headers
+ */
+
+#include "kal_general_types.h"
+
+/*
+ * NVRAM Basic Headers
+ */
+#ifdef NVRAM_AUTO_GEN
+#include "nvram_auto_gen.h"
+#endif
+
+#include "nvram_enums.h"
+
+#define NVRAM_LID_SPLIT
+#include "nvram_defs.h"
+
+#include "nvram_data_items.h"
+
+/*
+ * User Headers & Default value
+ */
+#include "adc_nvram_def.h"
+#include "drv_features_adc.h"
+
+#if !defined(DRV_ADC_OFF)
+static kal_int32 const NVRAM_EF_ADC_DEFAULT[] = {
+#if defined(DRV_ADC_MAX_CH_1)
+ ADC_CALIBRATION_SLOPE_CH0,
+ ADC_CALIBRATION_OFFSET_CH0
+#elif defined(DRV_ADC_MAX_CH_5)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4
+#elif defined(DRV_ADC_MAX_CH_6)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5
+#elif defined(DRV_ADC_MAX_CH_7)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6
+#elif defined(DRV_ADC_MAX_CH_8)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7
+#elif defined(DRV_ADC_MAX_CH_9)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8
+#elif defined(DRV_ADC_MAX_CH_10)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9
+#elif defined(DRV_ADC_MAX_CH_11)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
+ ADC_CALIBRATION_SLOPE_CH10,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
+ ADC_CALIBRATION_OFFSET_CH10
+#elif defined(DRV_ADC_MAX_CH_12)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
+ ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
+ ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11
+#elif defined(DRV_ADC_MAX_CH_13) //12 bits use small slope
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
+ ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
+ ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12
+#elif defined(DRV_ADC_MAX_CH_14)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
+ ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12, ADC_CALIBRATION_SLOPE_CH13,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
+ ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12, ADC_CALIBRATION_OFFSET_CH13
+#elif defined(DRV_ADC_MAX_CH_15)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
+ ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12, ADC_CALIBRATION_SLOPE_CH13, ADC_CALIBRATION_SLOPE_CH14,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
+ ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12, ADC_CALIBRATION_OFFSET_CH13, ADC_CALIBRATION_OFFSET_CH14
+#elif defined(DRV_ADC_MAX_CH_16)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
+ ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12, ADC_CALIBRATION_SLOPE_CH13, ADC_CALIBRATION_SLOPE_CH14,
+ ADC_CALIBRATION_SLOPE_CH15,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
+ ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12, ADC_CALIBRATION_OFFSET_CH13, ADC_CALIBRATION_OFFSET_CH14,
+ ADC_CALIBRATION_OFFSET_CH15
+#elif defined(DRV_ADC_MAX_CH_17)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
+ ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12, ADC_CALIBRATION_SLOPE_CH13, ADC_CALIBRATION_SLOPE_CH14,
+ ADC_CALIBRATION_SLOPE_CH15, ADC_CALIBRATION_SLOPE_CH16,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
+ ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12, ADC_CALIBRATION_OFFSET_CH13, ADC_CALIBRATION_OFFSET_CH14,
+ ADC_CALIBRATION_OFFSET_CH15,ADC_CALIBRATION_OFFSET_CH16
+#elif defined(DRV_ADC_MAX_CH_18)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
+ ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12, ADC_CALIBRATION_SLOPE_CH13, ADC_CALIBRATION_SLOPE_CH14,
+ ADC_CALIBRATION_SLOPE_CH15, ADC_CALIBRATION_SLOPE_CH16, ADC_CALIBRATION_SLOPE_CH17,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
+ ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12, ADC_CALIBRATION_OFFSET_CH13, ADC_CALIBRATION_OFFSET_CH14,
+ ADC_CALIBRATION_OFFSET_CH15,ADC_CALIBRATION_OFFSET_CH16, ADC_CALIBRATION_OFFSET_CH17
+#elif defined(DRV_ADC_MAX_CH_19)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
+ ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12, ADC_CALIBRATION_SLOPE_CH13, ADC_CALIBRATION_SLOPE_CH14,
+ ADC_CALIBRATION_SLOPE_CH15, ADC_CALIBRATION_SLOPE_CH16, ADC_CALIBRATION_SLOPE_CH17, ADC_CALIBRATION_SLOPE_CH18,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
+ ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12, ADC_CALIBRATION_OFFSET_CH13, ADC_CALIBRATION_OFFSET_CH14,
+ ADC_CALIBRATION_OFFSET_CH15,ADC_CALIBRATION_OFFSET_CH16, ADC_CALIBRATION_OFFSET_CH17, ADC_CALIBRATION_OFFSET_CH18
+#elif defined(DRV_ADC_MAX_CH_20)
+ ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
+ ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
+ ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12, ADC_CALIBRATION_SLOPE_CH13, ADC_CALIBRATION_SLOPE_CH14,
+ ADC_CALIBRATION_SLOPE_CH15, ADC_CALIBRATION_SLOPE_CH16, ADC_CALIBRATION_SLOPE_CH17, ADC_CALIBRATION_SLOPE_CH18, ADC_CALIBRATION_SLOPE_CH19,
+ ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
+ ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
+ ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12, ADC_CALIBRATION_OFFSET_CH13, ADC_CALIBRATION_OFFSET_CH14,
+ ADC_CALIBRATION_OFFSET_CH15,ADC_CALIBRATION_OFFSET_CH16, ADC_CALIBRATION_OFFSET_CH17, ADC_CALIBRATION_OFFSET_CH18, ADC_CALIBRATION_OFFSET_CH19
+#endif // #if defined(DRV_ADC_MAX_CH_5)
+
+};
+
+
+
+/*
+ * LID table
+ */
+ltable_entry_struct logical_data_item_table_adc[] =
+{
+ {
+ NVRAM_EF_ADC_LID,
+ NVRAM_EF_ADC_TOTAL,
+ NVRAM_EF_ADC_SIZE,
+ NVRAM_NORMAL((kal_uint8 const *)NVRAM_EF_ADC_DEFAULT),
+ NVRAM_CATEGORY_CALIBRAT,
+ NVRAM_ATTR_AVERAGE,
+ "AD1F",
+ VER(NVRAM_EF_ADC_LID)
+ }
+};
+
+#endif //#if !defined(DRV_ADC_OFF)
+
+#endif /* NVRAM_NOT_PRESENT */