[Feature]Upload Modem source code
Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/custom/driver/drv/Drv_Tool/ADC.cmp b/mcu/custom/driver/drv/Drv_Tool/ADC.cmp
new file mode 100644
index 0000000..32f51c0
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/ADC.cmp
@@ -0,0 +1,20 @@
+[ADC_variables]
+ADC_VBAT
+ADC_VISENSE
+ADC_VBATTMP
+ADC_VCHARGER
+ADC_ACCESSORYID
+ADC_PCBTMP
+ADC_CHR_USB
+ADC_OTG_VBUS
+ADC_RFTMP
+ADC_JACK_TYPE
+ADC_FDD_RF_PARAMS_DYNAMIC_CUSTOM_CH
+
+[adc_var.c_HEADER]
+#ifdef __CUST_NEW__
+#include "kal_public_api.h"
+#include "dcl.h"
+
+[adc_var.c_TAILER]
+#endif /* __CUST_NEW__ */
diff --git a/mcu/custom/driver/drv/Drv_Tool/Application.cmp b/mcu/custom/driver/drv/Drv_Tool/Application.cmp
new file mode 100644
index 0000000..caabfe2
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/Application.cmp
@@ -0,0 +1,19 @@
+[APPLICATION]
+RF
+SIM
+SIM2
+BT
+USB
+CAM1_A
+CAM1_D
+CAM2_A
+CAM2_D
+TOUCHPAD
+GPS
+TDMB
+MC
+WIFI_V1
+WIFI_V2
+SF
+FM
+VIBR
diff --git a/mcu/custom/driver/drv/Drv_Tool/DrvGen b/mcu/custom/driver/drv/Drv_Tool/DrvGen
new file mode 100755
index 0000000..a676ca7
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/DrvGen
Binary files differ
diff --git a/mcu/custom/driver/drv/Drv_Tool/DrvGen.exe b/mcu/custom/driver/drv/Drv_Tool/DrvGen.exe
new file mode 100755
index 0000000..e6bff62
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/DrvGen.exe
Binary files differ
diff --git a/mcu/custom/driver/drv/Drv_Tool/EINT.cmp b/mcu/custom/driver/drv/Drv_Tool/EINT.cmp
new file mode 100644
index 0000000..5af2d47
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/EINT.cmp
@@ -0,0 +1,66 @@
+[EINT_variables]
+SWDBG_EINT_NO
+AUX_EINT_NO
+AUX2_EINT_NO
+TOUCH_PANEL_EINT_NO
+CHRDET_EINT_NO
+MOTION_SENSOR_EINT_NO
+BT_EINT_NO
+CLAMDET_EINT_NO
+USB_EINT_NO
+CHR_USB_EINT_NO
+WIFI_EINT_NO
+WIFI_DCXO_EINT_NO
+MELODY_EINT_NO
+OTG_IDPIN_EINT_NO
+EXTRA_A_KEY_EINT_NO
+EXTRA_B_KEY_EINT_NO
+SYNC_LCM_EINT_NO
+LSD_MSDCCD_EINT_NO
+GPS_EINT_NO
+DCAM_EINT_NO
+CMMB_EINT_NO
+JB_UP_EINT_NO
+JB_DOWN_EINT_NO
+JB_RIGHT_EINT_NO
+JB_LEFT_EINT_NO
+FM_EINT_NO
+AUX_HOOK_EINT_NO
+CHG_IND_EINT_NO
+BT_CO_CLOCK_EINT_NO
+MUIC_EINT_NO
+MUIC_FAC_EINT_NO
+PXS_EINT_NO
+ALS_EINT_NO
+AST_EINT_NO
+AST_WAKEUP_EINT_NO
+AST_RFCONF_EINT_NO
+MSDC_EINT_NO
+SIM_HOT_SWAP_EINT_NO
+NFC_EINT_NO
+OFN_EINT_NO
+POWER_KEY_EINT_NO
+KEYPAD_WAKEUP_EINT_NO
+USB2_DP_EINT_NO
+USB2_DM_EINT_NO
+PMIC_EINT_NO
+AP_WAKE_MD_EINT_NO
+USIM1_EINT_NO
+USIM2_EINT_NO
+TDM_REQ_HI_EINT_NO
+TDM_REQ_LO_EINT_NO
+MD_WAKE_AP_EINT_NO
+
+[eint_drv.h_HEADER]
+#ifndef _EINT_DRV_H
+#define _EINT_DRV_H
+
+[eint_drv.h_TAILER]
+#endif /* _EINT_DRV_H */
+
+[eint_var.c_HEADER]
+#ifdef __CUST_NEW__
+#include "eint.h"
+
+[eint_var.c_TAILER]
+#endif /* __CUST_NEW__ */
diff --git a/mcu/custom/driver/drv/Drv_Tool/GPIO.cmp b/mcu/custom/driver/drv/Drv_Tool/GPIO.cmp
new file mode 100644
index 0000000..8a02195
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/GPIO.cmp
@@ -0,0 +1,459 @@
+[GPIO_variables]
+;Bluetooth disconnect pin for BCHS
+gpio_bt_dsc_pin
+;Bluetooth data selection pin for BCHS. Should be GPI.
+gpio_bt_dataselect_pin
+;Bluetooth power on pin for BCHS, RFMD, GORM
+@gpio_bt_power_pin
+;Bluetooth reset pin for BCHS, GORM
+@gpio_bt_reset_pin
+;Bluetooth ext 32k pin for RFMD, GORM.
+@gpio_bt_32k_pin
+;Bluetooth uart tx pin for RFMD, GORM.
+@gpio_bt_utxd3_pin
+;Bluetooth uart rx pin for RFMD, GORM.
+@gpio_bt_urxd3_pin
+;Bluetooth uart rts pin for RFMD, GORM.
+@gpio_bt_urts3_pin
+;Bluetooth uart cts pin for RFMD, GORM.
+@gpio_bt_ucts3_pin
+;Bluetooth pcm clk pin for RFMD, GORM.
+@gpio_bt_pcmclk_pin
+;Bluetooth pcm sync pin for RFMD, GORM.
+@gpio_bt_pcmsync_pin
+;Bluetooth pcm data input pin for RFMD, GORM.
+@gpio_bt_pcmin_pin
+;Bluetooth pcm data output pin for RFMD, GORM.
+@gpio_bt_pcmout_pin
+;Bluetooth wake up pin for RFMD
+gpio_bt_wakeup_pin
+;Bluetooth eint pin
+@gpio_bt_eint_pin
+;
+;gpio RF control pins. Please refer to m12190.c, m12196.c
+gpio_rf_control1_pin
+gpio_rf_control2_pin
+gpio_rf_control3_pin
+;
+gpio_flash_test_cmd_bit0_pin
+gpio_flash_test_cmd_bit1_pin
+gpio_flash_test_reset_pin
+gpio_flash_test_error_ind_pin
+;
+gpio_ic_module_ready_bot_pin
+gpio_ic_module_ready_eot_pin
+gpio_ic_module_ready_bin_pin
+;
+;For motion sensor spi pins: motion_sensor_hw_define.h
+gpio_ms_spi_din_pin
+gpio_ms_spi_clk_pin
+gpio_ms_spi_dout_pin
+gpio_ms_spi_cs_pin
+gpio_ms_spi_reset_pin
+;
+;For motion sensor I2C pins: motion_sensor_hw_define.h
+gpio_ms_i2c_addr_pin
+@gpio_ms_i2c_clk_pin
+@gpio_ms_i2c_data_pin
+gpio_ms_i2c_cs_pin
+gpio_ms_i2c_reset_pin
+;For motion sensor MEMSIC serial interface: motion_sensor_hw_define.h
+gpio_acc_sensor_sck_pin
+gpio_acc_sensor_sda_pin
+;
+;For e_compass serial interface: e_compass_sensor_hw_define.h
+@gpio_e_compass_sensor_sck_pin
+@gpio_e_compass_sensor_sda_pin
+@gpio_e_compass_sensor_pwr_pin
+;
+;For BMT charging control ON/OFF pin: pwic.c
+gpio_bmt_chr_ctrl_pin
+;For doing something whenever AC is plug-in: chr_parameter.c
+gpio_bmt_charger_action_pin
+;For dectection USB or AC: char_parameter.c
+gpio_bmt_check_ac_usb_pin
+;
+;For IrDA mode switch: irda_custom.c
+gpio_irda_mode_switch_pin
+;
+;For touch panel SPI pins: touch_panel_spi.h
+gpio_tp_spi_din_pin
+gpio_tp_spi_clk_pin
+gpio_tp_spi_dout_pin
+gpio_tp_spi_cs_pin
+gpio_tp_spi_busy_pin
+;
+;For USB power control: usb_custom.c
+gpio_usb_enable_pin
+gpio_otg_vbus_enable_pin
+; In USB2.0, to switch on/off the external 100K ohm resistor for the dectection of USB or charger
+gpio_usb_chr_det_switch_pin
+;
+;For enable USBDL
+@gpio_usbdl_pin
+;
+;For FM control pins: see MCU\CUSTOM_BACKUP\AUDIO\PROJECT_NAME\XXX.c
+gpio_fm_3wire_le_pin
+@gpio_fm_i2c_sda_pin
+@gpio_fm_i2c_scl_pin
+gpio_fm_ext_switch_pin
+gpio_fm_bus_enable_pin
+gpio_fm_srclkena_pin
+gpio_fm_32k_pin
+;
+;To turn on/off external amplifier: afe.c
+gpio_afe_amplifier_pin
+gpio_afe_amplifier_pin1
+;For I2C External audio amplifier ctrl:
+gpio_afe_amplifier_i2c_scl_pin
+gpio_afe_amplifier_i2c_sda_pin
+;
+;For audio EXT_DAC_SUPPORT: ext_dac_drv.c
+gpio_ext_dac_sclk_pin
+gpio_ext_dac_sdin_pin
+gpio_ext_dac_csb_pin
+gpio_ext_dac_switch_pin
+;
+;For Main LCD backlight LED: uem_gpio.c
+gpio_led_mainbl_en_pin
+;For sub LCD backlight LED: uem_gpio.c
+gpio_led_subbl_en_pin
+;For general LED: uem_gpio.c
+gpio_led_status_en_pin
+;For Red LED: uem_gpio.c
+gpio_led_status1_en_pin
+;For Green LED: uem_gpio.c
+gpio_led_status2_en_pin
+;For Blue LED: uem_gpio.c
+gpio_led_status3_en_pin
+;For keypad backlight LED: uem_gpio.c
+gpio_led_keybl_en_pin
+gpio_led_keybl2_en_pin
+;For enable/disable vibration: uem_gpio.c
+gpio_vibrator_en_pin
+;
+;For flash light control: uem_gpio.c, camera_hw.c
+gpio_flashlight_en_pin
+;
+;To enable camera AF function: camera_hw.c
+gpio_af_enable_pin
+;Camera control pins: camera_hw.c, camera_para.c
+gpio_camera_power_en_pin
+@gpio_camera_reset_pin
+@gpio_camera_cmpdn_pin
+@gpio_camera_cmpdn_sub_pin
+@gpio_camera_reset_sub_pin
+@gpio_flashlight_enable_pin
+@gpio_af_enable_pin
+gpio_camera_mclk_pin
+;
+;Camera module control pins: for example, PAP1320_custom.h
+gpio_camera_module_power_pin
+gpio_camera_module_reset_pin
+gpio_camera_module_ready_pin
+;
+;Cap-Touch power enable pin
+@gpio_ctp_power_enable_pin
+;
+;Cap-Touch I2C pins
+@gpio_ctp_i2c_scl_pin
+@gpio_ctp_i2c_sda_pin
+;
+;Cap-Touch eint pin
+@gpio_ctp_eint_pin
+;
+;Cap-Touch reset pin
+@gpio_ctp_reset_pin
+;
+;SCCB pins: sccb.h
+@gpio_sccb_serial_clk_pin
+@gpio_sccb_serial_data_pin
+;
+;PXS I2C pins
+@gpio_pxs_i2c_scl_pin
+@gpio_pxs_i2c_sda_pin
+;
+;ALS I2C pins
+gpio_als_i2c_scl_pin
+gpio_als_i2c_sda_pin
+;
+;TV out swtich pin: auxmain.c
+gpio_tv_out_switch_pin
+;
+;WIFI enable pin: gl_hpi.c
+@gpio_wifi_enable_pin
+;WiF EINT enable pin
+@gpio_wifi_eint_enable_pin
+;WiFi ext 32k pin
+@gpio_wifi_32k_pin
+;WiFi ext reset pin
+@gpio_wifi_ext_rst_pin
+;WiFi coclock pin
+@gpio_wifi_coclock_pin
+;enable wifi PMU
+gpio_wifi_pmu_enable_pin
+;Reset wifi SYSRST_B
+gpio_wifi_sysrst_b_pin
+;
+;USB/UART switch pin: usb_custom.c
+gpio_usb_uart_switch_pin
+gpio_earphone_usb_uart_switch_pin
+;
+;UART enable pin: auxmain.c
+gpio_uart_enable_pin
+;
+;specify GPIO pin for 32KHz clock output
+gpio_32k_ctrl_pin
+;
+;simplus related pins
+gpio_simplug_ldo_switch
+gpio_sim_msdc_switch
+gpio_ext_sd_ldo_switch
+;
+;SW T_flash related pins
+gpio_t_card_ldo_switch
+;
+;touchpad power pins: touchpad_custom.h
+gpio_touchpad_ldo_pw_pin
+gpio_touchpad_low_pw_pin
+;
+;GPS power on pin
+@gpio_gps_power_pin
+;GPS reset pin
+@gpio_gps_reset_pin
+;GPS standby pin
+@gpio_gps_standby_pin
+;GPS sync pin
+@gpio_gps_sync_pin
+;GPS ext 32k pin
+@gpio_gps_32k_pin
+;GPS uart tx pin
+@gpio_gps_utxd_pin
+;GPS uart rx pin
+@gpio_gps_urxd_pin
+;GPS uart rts pin
+@gpio_gps_urts_pin
+;GPS uart cts pin
+@gpio_gps_ucts_pin
+;
+;NFC VEN pin
+@gpio_nfc_ven_pin
+;NFC GPIO4 pin
+@gpio_nfc_firm_pin
+;NFC IRQ
+@gpio_nfc_eint_pin
+;
+;TDMB Power and Control Pin
+@gpio_tdmb_power_pin
+gpio_tdmb_spi_reset_pin
+gpio_tdmb_spi_eint_pin
+;
+;MT6302 SPI CS pins
+@gpio_MT6302_cs_pin
+@gpio_MT6302_cs2_pin
+;MT6302 SPI clk pins
+@gpio_MT6302_clk_pin
+@gpio_MT6302_clk2_pin
+;MT6302 SPI data pins
+@gpio_MT6302_dat_pin
+@gpio_MT6302_dat2_pin
+;
+;MT6306 sim switch controller pin
+@gpio_sim_switch_dat_pin
+;MT6306 sim switch controller pin
+@gpio_sim_switch_clk_pin
+;
+;USB EDGE card 2-step current limit
+@gpio_edgecard_current_limit_pin
+
+;For XENON flash light control
+gpio_xenon_flash_on_pin
+gpio_xenon_charge_pin
+gpio_xenon_trigger_pin
+gpio_xenon_ready_pin
+
+;For CMMB I2C control pin
+gpio_cmmb_reset_pin
+gpio_cmmb_i2c_sda_pin
+gpio_cmmb_i2c_scl_pin
+gpio_cmmb_power_on_pin
+gpio_cmmb_ap_en_pin
+@gpio_cmmb_spi_eint_pin
+gpio_cmmb_spi_cs_n_pin
+gpio_cmmb_spi_sck_pin
+gpio_cmmb_spi_mosi_pin
+gpio_cmmb_spi_miso_pin
+
+;For LCD TE control pin
+gpio_lcd_te_pin
+
+;For Direct Sensor
+gpio_dcam_lcd_cs_pin
+gpio_dcam_lcd_rd_pin
+
+;For PMU with External Charger
+gpio_ext_chr_ctrl_pin
+gpio_ext_chr_iset_ctrl_pin
+;ys1 add for PMU with External Charger
+gpio_ext_chr_det_pin
+; for Micro SD card detection
+gpio_SD_det_pin
+
+;For general purpose debug
+gpio_reserve0_pin
+gpio_reserve1_pin
+gpio_reserve2_pin
+gpio_reserve3_pin
+gpio_reserve4_pin
+gpio_reserve5_pin
+gpio_reserve6_pin
+gpio_reserve7_pin
+gpio_reserve8_pin
+gpio_reserve9_pin
+gpio_reserve10_pin
+gpio_reserve11_pin
+gpio_reserve12_pin
+gpio_reserve13_pin
+gpio_reserve14_pin
+gpio_reserve15_pin
+
+;For kbdmain_joustick
+gpio_ball_scl_pin
+gpio_ball_sda_pin
+gpio_ball_en_pin
+
+;For kbd_OFN
+@gpio_ofn_scl_pin
+@gpio_ofn_sda_pin
+@gpio_ofn_shtdwn_pin
+@gpio_ofn_rst_pin
+@gpio_ofn_motion_pin
+;For BT co_clock
+@gpio_bt_co_clock_pin
+
+gpio_muic_sccb_sda_pin
+gpio_muic_sccb_scl_pin
+
+;For TWOMICNR I2C control pin
+gpio_2micNR_scl_pin
+gpio_2micNR_sda_pin
+gpio_2micNR_bypass_pin
+gpio_2micNR_13mhz_pin
+gpio_2micNR_rst_pin
+gpio_2micNR_pwdn_pin
+
+;for I2S
+gpio_edi_clk
+gpio_edi_data
+gpio_edi_ws
+
+;For qwerty extend for keypad
+@gpio_kbd_extend_QWERTY_pin
+
+;For mATV control pin
+@gpio_matv_reset_pin
+@gpio_matv_power_en_pin
+@gpio_matv_i2c_clk_pin
+@gpio_matv_i2c_dat_pin
+
+;For I2S interface
+@gpio_i2s_clk_pin
+@gpio_i2s_data_pin
+@gpio_i2s_ws_pin
+
+;For Keypad use
+*gpio_keypad_col0_pin
+*gpio_keypad_col1_pin
+*gpio_keypad_col2_pin
+*gpio_keypad_col3_pin
+*gpio_keypad_col4_pin
+*gpio_keypad_col5_pin
+*gpio_keypad_col6_pin
+*gpio_keypad_col7_pin
+*gpio_keypad_col8_pin
+*gpio_keypad_col9_pin
+*gpio_keypad_row0_pin
+*gpio_keypad_row1_pin
+*gpio_keypad_row2_pin
+*gpio_keypad_row3_pin
+*gpio_keypad_row4_pin
+*gpio_keypad_row5_pin
+*gpio_keypad_row6_pin
+*gpio_keypad_row7_pin
+*gpio_keypad_row8_pin
+*gpio_keypad_row9_pin
+
+
+;For AST1001 interface
+@gpio_ast_cs_pin
+@gpio_ast_addr1_pin
+@gpio_ast_rst_pin
+@gpio_ast_pwn_pin
+@gpio_ast_ldo_pin
+@gpio_ast_clk32k_pin
+@gpio_ast_intr_pin
+@gpio_ast_wakeup_intr_pin
+@gpio_ast_rfconf_intr_pin
+@gpio_ast_wakeup_pin
+@gpio_ast_ast3001_wa_clk_pin
+
+;For Gpio Macro Name
+GPIO_FDD_BAND_SUPPORT_DETECT_1ST_PIN
+GPIO_FDD_BAND_SUPPORT_DETECT_2ND_PIN
+GPIO_FDD_BAND_SUPPORT_DETECT_3RD_PIN
+
+;MT6290 For MSDC card detect
+@gpio_msdc_cd_pin
+@gpio_msdc_wp_pin
+
+;MT6290 For phone AP wake up MD
+@GPIO_AP_WAKE_MD_PIN
+
+;MT6290 For sim hot plug
+@gpio_usim1_hot_swap
+@gpio_usim2_hot_swap
+
+;MT6290/MT6582/MT6592 LTE CoEX
+@gpio_tdm_req
+
+;MT6290/MT6290m VCORE I2C buck Exist , 1 : Yes ; 0 : No
+EXTbuck_i2cdev_exist
+
+;MT6290MD->AP wakeup workaround;20140318
+gpio_MD2AP_EINT
+
+[GPIO_MODE]
+GPIO = _M_GPIO
+EINT = _M_EINT
+EDICK = _M_EDICK
+EDIDAT = _M_EDIDAT
+EDIWS = _M_EDIWS
+EDI0CK = _M_EDI0CK
+EDI0DAT = _M_EDI0DAT
+EDI0WS = _M_EDI0WS
+EDI1CK = _M_EDI1CK
+EDI1DAT = _M_EDI1DAT
+EDI1WS = _M_EDI1WS
+
+[GPIO_FREQ]
+gpio_bt_power_pin = mode_f32k_ck
+gpio_fm_32k_pin = mode_f32k_ck
+
+
+[gpio_drv.h_HEADER]
+#ifndef _GPIO_DRV_H
+#define _GPIO_DRV_H
+
+[gpio_drv.h_TAILER]
+#endif /* _GPIO_DRV_H */
+
+[gpio_var.c_HEADER]
+#ifdef __CUST_NEW__
+#include "gpio_drv.h"
+#include "gpio_def.h"
+#include "kal_public_api.h"
+#include "gpio_sw.h"
+#include "dcl.h"
+
+[gpio_var.c_TAILER]
+#endif /* __CUST_NEW__ */
diff --git a/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_MT6252.cmp b/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_MT6252.cmp
new file mode 100644
index 0000000..d20601d
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_MT6252.cmp
@@ -0,0 +1,187 @@
+[GPIO_EXT_TABLE]
+NUM_GPIO_EXT = 22
+
+[GPIO_EXT_NAME0]
+GPIOEXT_NAME=SP_MODE0_BIT0
+[GPIO_EXT__SEL0]
+0(EMI_EA0)
+1(LPA0)
+2
+3(SEN2LCM_A0)
+
+[GPIO_EXT_NAME1]
+GPIOEXT_NAME=SP_MODE0_BIT2
+[GPIO_EXT__SEL1]
+0(EMI_EA1)
+1(LRD_B)
+2
+3
+
+[GPIO_EXT_NAME2]
+GPIOEXT_NAME=SP_MODE0_BIT4
+[GPIO_EXT__SEL2]
+0(EMI_EA2)
+1(LWR_B)
+2
+3(SEN2LCM_WR_B)
+
+[GPIO_EXT_NAME3]
+GPIOEXT_NAME=SP_MODE0_BIT6
+[GPIO_EXT__SEL3]
+0(EMI_EA3)
+1(NLD0)
+2(LSCK)
+3(CMDAT0)
+
+[GPIO_EXT_NAME4]
+GPIOEXT_NAME=SP_MODE0_BIT8
+[GPIO_EXT__SEL4]
+0(EMI_EA4)
+1(NLD1)
+2(LSA0)
+3(CMDAT1)
+
+[GPIO_EXT_NAME5]
+GPIOEXT_NAME=SP_MODE0_BIT10
+[GPIO_EXT__SEL5]
+0(EMI_EA5)
+1(NLD2)
+2(LSDA)
+3(CMDAT2)
+
+[GPIO_EXT_NAME6]
+GPIOEXT_NAME=SP_MODE0_BIT12
+[GPIO_EXT__SEL6]
+0(EMI_EA6)
+1(NLD3)
+2(LSDI)
+3(CMDAT3)
+
+[GPIO_EXT_NAME7]
+GPIOEXT_NAME=SP_MODE0_BIT14
+[GPIO_EXT__SEL7]
+0(EMI_EA7)
+1(NLD4)
+2
+3(CMDAT4)
+
+[GPIO_EXT_NAME8]
+GPIOEXT_NAME=SP_MODE0_BIT16
+[GPIO_EXT__SEL8]
+0(EMI_EA8)
+1(NLD5)
+2
+3(CMDAT5)
+
+[GPIO_EXT_NAME9]
+GPIOEXT_NAME=SP_MODE0_BIT18
+[GPIO_EXT__SEL9]
+0(EMI_EA9)
+1(NLD6)
+2
+3(CMDAT6)
+
+[GPIO_EXT_NAME10]
+GPIOEXT_NAME=SP_MODE0_BIT20
+[GPIO_EXT__SEL10]
+0(EMI_EA10)
+1(NLD7)
+2
+3(CMDAT7)
+
+[GPIO_EXT_NAME11]
+GPIOEXT_NAME=SP_MODE0_BIT22
+[GPIO_EXT__SEL11]
+0(EMI_EA11)
+1(NLD8)
+2
+3
+
+[GPIO_EXT_NAME12]
+GPIOEXT_NAME=SP_MODE0_BIT24
+[GPIO_EXT__SEL12]
+0(EMI_EA12)
+1(NLD9)
+2(CMMCLK)
+3(CMMCLK)
+
+[GPIO_EXT_NAME13]
+GPIOEXT_NAME=SP_MODE0_BIT26
+[GPIO_EXT__SEL13]
+0(EMI_EA13)
+1(NLD10)
+2(CAM_CSK)
+3(CMPCLK)
+
+[GPIO_EXT_NAME14]
+GPIOEXT_NAME=SP_MODE0_BIT28
+[GPIO_EXT__SEL14]
+0(EMI_EA14)
+1(NLD11)
+2(CAM_CSD)
+3(HSYNC)
+
+[GPIO_EXT_NAME15]
+GPIOEXT_NAME=SP_MODE0_BIT30
+[GPIO_EXT__SEL15]
+0(EMI_EA15)
+1(NLD12)
+2(CMPDN)
+3(VSYNC)
+
+[GPIO_EXT_NAME16]
+GPIOEXT_NAME=SP_MODE1_BIT0
+[GPIO_EXT__SEL16]
+0(EMI_EA23)
+1
+2
+3(LSCE0_B)
+
+[GPIO_EXT_NAME17]
+GPIOEXT_NAME=SP_MODE1_BIT2
+[GPIO_EXT__SEL17]
+0(EMI_EA24)
+1
+2
+3(LPCE0_B)
+
+[GPIO_EXT_NAME18]
+GPIOEXT_NAME=SP_MODE1_BIT4
+[GPIO_EXT__SEL18]
+0(EMI_ED6)
+1(JRTCK)
+2(CMRST)
+3(LSCE1_B)
+4(SEN2LCM_CS_B)
+5(CAM_SDA)
+6(LPCE1_B)
+7
+
+[GPIO_EXT_NAME19]
+GPIOEXT_NAME=SP_MODE1_BIT8
+[GPIO_EXT__SEL19]
+0(EMI_ED7)
+1(JRTCK)
+2(CMPDN)
+3(LPCE1_B)
+4(SEN2LCM_CS_B)
+5(CAM_SCL)
+6(LSCE1_B)
+7
+
+[GPIO_EXT_NAME20]
+GPIOEXT_NAME=SP_MODE1_BIT12
+[GPIO_EXT__SEL20]
+0(URXD1)
+1(EINT2)
+2(LSCK)
+3
+
+[GPIO_EXT_NAME21]
+GPIOEXT_NAME=SP_MODE1_BIT14
+[GPIO_EXT__SEL21]
+0(UTXD1)
+1(EINT3)
+2(LSDA)
+3
+
diff --git a/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_MT6270.cmp b/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_MT6270.cmp
new file mode 100644
index 0000000..e2b12b8
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_MT6270.cmp
@@ -0,0 +1,133 @@
+[GPIO_EXT_TABLE]
+NUM_GPIO_EXT = 13
+
+
+[GPIO_EXT_NAME0]
+GPIOEXT_NAME=CLKSEL1
+[GPIO_EXT__SEL0]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME1]
+GPIOEXT_NAME=CLKSEL2
+[GPIO_EXT__SEL1]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME2]
+GPIOEXT_NAME=CLKSEL3
+[GPIO_EXT__SEL2]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME3]
+GPIOEXT_NAME=CLKSEL4
+[GPIO_EXT__SEL3]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME4]
+GPIOEXT_NAME=CLKSEL5
+[GPIO_EXT__SEL4]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME5]
+GPIOEXT_NAME=CLKSEL6
+[GPIO_EXT__SEL5]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME6]
+GPIOEXT_NAME=CLKSEL7
+[GPIO_EXT__SEL6]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME7]
+GPIOEXT_NAME=CLKSEL8
+[GPIO_EXT__SEL7]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME8]
+GPIOEXT_NAME=CLKSEL9
+[GPIO_EXT__SEL8]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME9]
+GPIOEXT_NAME=CLKSEL10
+[GPIO_EXT__SEL9]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME10]
+GPIOEXT_NAME=CLKSEL11
+[GPIO_EXT__SEL10]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME11]
+GPIOEXT_NAME=CLKSEL12
+[GPIO_EXT__SEL11]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME12]
+GPIOEXT_NAME=CLKSEL13
+[GPIO_EXT__SEL12]
+0
+1
+2
+3
+4
+5
\ No newline at end of file
diff --git a/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_MT6276.cmp b/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_MT6276.cmp
new file mode 100644
index 0000000..e2b12b8
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_MT6276.cmp
@@ -0,0 +1,133 @@
+[GPIO_EXT_TABLE]
+NUM_GPIO_EXT = 13
+
+
+[GPIO_EXT_NAME0]
+GPIOEXT_NAME=CLKSEL1
+[GPIO_EXT__SEL0]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME1]
+GPIOEXT_NAME=CLKSEL2
+[GPIO_EXT__SEL1]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME2]
+GPIOEXT_NAME=CLKSEL3
+[GPIO_EXT__SEL2]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME3]
+GPIOEXT_NAME=CLKSEL4
+[GPIO_EXT__SEL3]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME4]
+GPIOEXT_NAME=CLKSEL5
+[GPIO_EXT__SEL4]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME5]
+GPIOEXT_NAME=CLKSEL6
+[GPIO_EXT__SEL5]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME6]
+GPIOEXT_NAME=CLKSEL7
+[GPIO_EXT__SEL6]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME7]
+GPIOEXT_NAME=CLKSEL8
+[GPIO_EXT__SEL7]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME8]
+GPIOEXT_NAME=CLKSEL9
+[GPIO_EXT__SEL8]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME9]
+GPIOEXT_NAME=CLKSEL10
+[GPIO_EXT__SEL9]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME10]
+GPIOEXT_NAME=CLKSEL11
+[GPIO_EXT__SEL10]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME11]
+GPIOEXT_NAME=CLKSEL12
+[GPIO_EXT__SEL11]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME12]
+GPIOEXT_NAME=CLKSEL13
+[GPIO_EXT__SEL12]
+0
+1
+2
+3
+4
+5
\ No newline at end of file
diff --git a/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_MT6276M.cmp b/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_MT6276M.cmp
new file mode 100644
index 0000000..e2b12b8
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_MT6276M.cmp
@@ -0,0 +1,133 @@
+[GPIO_EXT_TABLE]
+NUM_GPIO_EXT = 13
+
+
+[GPIO_EXT_NAME0]
+GPIOEXT_NAME=CLKSEL1
+[GPIO_EXT__SEL0]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME1]
+GPIOEXT_NAME=CLKSEL2
+[GPIO_EXT__SEL1]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME2]
+GPIOEXT_NAME=CLKSEL3
+[GPIO_EXT__SEL2]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME3]
+GPIOEXT_NAME=CLKSEL4
+[GPIO_EXT__SEL3]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME4]
+GPIOEXT_NAME=CLKSEL5
+[GPIO_EXT__SEL4]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME5]
+GPIOEXT_NAME=CLKSEL6
+[GPIO_EXT__SEL5]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME6]
+GPIOEXT_NAME=CLKSEL7
+[GPIO_EXT__SEL6]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME7]
+GPIOEXT_NAME=CLKSEL8
+[GPIO_EXT__SEL7]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME8]
+GPIOEXT_NAME=CLKSEL9
+[GPIO_EXT__SEL8]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME9]
+GPIOEXT_NAME=CLKSEL10
+[GPIO_EXT__SEL9]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME10]
+GPIOEXT_NAME=CLKSEL11
+[GPIO_EXT__SEL10]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME11]
+GPIOEXT_NAME=CLKSEL12
+[GPIO_EXT__SEL11]
+0
+1
+2
+3
+4
+5
+
+[GPIO_EXT_NAME12]
+GPIOEXT_NAME=CLKSEL13
+[GPIO_EXT__SEL12]
+0
+1
+2
+3
+4
+5
\ No newline at end of file
diff --git a/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_NC.cmp b/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_NC.cmp
new file mode 100644
index 0000000..a20f307
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_NC.cmp
@@ -0,0 +1,3 @@
+[GPIO_EXT_TABLE]
+NUM_GPIO_EXT = 0
+
diff --git a/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_NCGPIOEXT.cmp b/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_NCGPIOEXT.cmp
new file mode 100644
index 0000000..a20f307
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/GPIO_EXT_NCGPIOEXT.cmp
@@ -0,0 +1,3 @@
+[GPIO_EXT_TABLE]
+NUM_GPIO_EXT = 0
+
diff --git a/mcu/custom/driver/drv/Drv_Tool/GPIO_protect.cmp b/mcu/custom/driver/drv/Drv_Tool/GPIO_protect.cmp
new file mode 100644
index 0000000..edf518c
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/GPIO_protect.cmp
@@ -0,0 +1,27 @@
+; Pull_en |Pull_sel |Def_dir |In |Out |Inv |Out_High
+[PROTECT]
+;GPS
+PROTECT_0 = gpio_wifi_enable_pin 0 0 1 0 1 0 0
+PROTECT_1 = gpio_wifi_32k_pin 0 0 1 0 1 0 0
+PROTECT_2 = gpio_wifi_ext_rst_pin 0 0 1 0 1 0 1
+;BT
+PROTECT_3 = gpio_bt_power_pin 0 0 1 0 1 0 0
+PROTECT_4 = gpio_bt_wakeup_pin 0 0 1 0 1 0 0
+PROTECT_5 = gpio_bt_32k_pin 0 0 1 0 1 0 0
+PROTECT_6 = gpio_bt_utxd3_pin 0 0 1 0 1 0 0
+PROTECT_7 = gpio_bt_urxd3_pin 1 1 0 1 1 0 0
+PROTECT_8 = gpio_bt_ucts3_pin 0 0 1 0 1 0 0
+PROTECT_9 = gpio_bt_urts3_pin 0 0 1 0 1 0 0
+PROTECT_10 = gpio_bt_pcmclk_pin 0 0 1 0 1 0 0
+PROTECT_11 = gpio_bt_pcmsync_pin 0 0 1 0 1 0 0
+PROTECT_12 = gpio_bt_pcmin_pin 1 0 0 1 1 0 0
+PROTECT_13 = gpio_bt_pcmout_pin 0 0 1 0 1 0 0
+PROTECT_14 = gpio_bt_reset_pin 0 0 1 0 1 0 0
+;WIFI
+PROTECT_15 = gpio_gps_power_pin 1 0 1 0 1 0 0
+PROTECT_16 = gpio_gps_urxd_pin 0 0 1 0 1 0 0
+PROTECT_17 = gpio_gps_utxd_pin 0 0 1 0 1 0 0
+;QWERTY key
+PROTECT_18 = gpio_kbd_extend_QWERTY_pin 0 0 1 1 1 0 0
+;BT
+PROTECT_19 = gpio_bt_eint_pin 0 0 1 0 1 0 0
diff --git a/mcu/custom/driver/drv/Drv_Tool/Keypad.cmp b/mcu/custom/driver/drv/Drv_Tool/Keypad.cmp
new file mode 100644
index 0000000..be45be8
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/Keypad.cmp
@@ -0,0 +1,134 @@
+[Key_definition]
+DEVICE_KEY_0
+DEVICE_KEY_1
+DEVICE_KEY_2
+DEVICE_KEY_3
+DEVICE_KEY_4
+DEVICE_KEY_5
+DEVICE_KEY_6
+DEVICE_KEY_7
+DEVICE_KEY_8
+DEVICE_KEY_9
+DEVICE_KEY_STAR
+DEVICE_KEY_HASH
+DEVICE_KEY_VOL_UP
+DEVICE_KEY_VOL_DOWN
+DEVICE_KEY_UP
+DEVICE_KEY_DOWN
+DEVICE_KEY_LEFT
+DEVICE_KEY_RIGHT
+DEVICE_KEY_MENU
+DEVICE_KEY_FUNCTION
+DEVICE_KEY_SK_LEFT
+DEVICE_KEY_SK_RIGHT
+DEVICE_KEY_SEND
+DEVICE_KEY_END
+DEVICE_KEY_POWER
+DEVICE_KEY_CLEAR
+DEVICE_KEY_EXT_FUNC1
+DEVICE_KEY_EXT_FUNC2
+DEVICE_KEY_MP3_PLAY_STOP
+DEVICE_KEY_MP3_FWD
+DEVICE_KEY_MP3_BACK
+DEVICE_KEY_NONE
+DEVICE_KEY_EXT_A
+DEVICE_KEY_EXT_B
+DEVICE_KEY_A
+DEVICE_KEY_B
+DEVICE_KEY_C
+DEVICE_KEY_D
+DEVICE_KEY_E
+DEVICE_KEY_F
+DEVICE_KEY_G
+DEVICE_KEY_H
+DEVICE_KEY_I
+DEVICE_KEY_J
+DEVICE_KEY_K
+DEVICE_KEY_L
+DEVICE_KEY_M
+DEVICE_KEY_N
+DEVICE_KEY_O
+DEVICE_KEY_P
+DEVICE_KEY_Q
+DEVICE_KEY_R
+DEVICE_KEY_S
+DEVICE_KEY_T
+DEVICE_KEY_U
+DEVICE_KEY_V
+DEVICE_KEY_W
+DEVICE_KEY_X
+DEVICE_KEY_Y
+DEVICE_KEY_Z
+DEVICE_KEY_ENTER
+DEVICE_KEY_SPACE
+DEVICE_KEY_TAB
+DEVICE_KEY_DEL
+DEVICE_KEY_ALT
+DEVICE_KEY_CTRL
+DEVICE_KEY_WIN
+DEVICE_KEY_SHIFT
+DEVICE_KEY_QUESTION
+DEVICE_KEY_PERIOD
+DEVICE_KEY_COMMA
+DEVICE_KEY_EXCLAMATION
+DEVICE_KEY_APOSTROPHE
+DEVICE_KEY_AT
+DEVICE_KEY_SEND2
+DEVICE_KEY_BACKQUOTE
+DEVICE_KEY_DASH
+DEVICE_KEY_EQUAL
+DEVICE_KEY_BACKSPACE
+DEVICE_KEY_OPEN_PARENS
+DEVICE_KEY_CLOSE_PARENS
+DEVICE_KEY_OPEN_SQUARE
+DEVICE_KEY_CLOSE_SQUARE
+DEVICE_KEY_OPEN_BRACE
+DEVICE_KEY_CLOSE_BRACE
+DEVICE_KEY_BACKSLASH
+DEVICE_KEY_SEMICOLON
+DEVICE_KEY_SLASH
+DEVICE_KEY_DOLLAR
+DEVICE_KEY_PERCENT
+DEVICE_KEY_CARET
+DEVICE_KEY_AND
+DEVICE_KEY_QUOTE
+DEVICE_KEY_PLUS
+DEVICE_KEY_LESS_THAN
+DEVICE_KEY_GREAT_THAN
+DEVICE_KEY_UNDERSCORE
+DEVICE_KEY_PIPE
+DEVICE_KEY_TILDE
+DEVICE_KEY_CAPS_LOCK
+DEVICE_KEY_NUM_LOCK
+DEVICE_KEY_FN
+DEVICE_KEY_SYMBOL
+DEVICE_KEY_EMAIL
+DEVICE_KEY_MESSAGE
+DEVICE_KEY_CAMERA
+DEVICE_KEY_ESC
+DEVICE_KEY_QWERTY_MENU
+DEVICE_KEY_OK
+DEVICE_KEY_F1
+DEVICE_KEY_F2
+DEVICE_KEY_F3
+DEVICE_KEY_F4
+DEVICE_KEY_F5
+DEVICE_KEY_F6
+DEVICE_KEY_F7
+DEVICE_KEY_F8
+DEVICE_KEY_F9
+DEVICE_KEY_F10
+DEVICE_KEY_F11
+DEVICE_KEY_F12
+DEVICE_KEY_BACK
+DEVICE_KEY_HOME
+
+
+[keypad_drv.h_HEADER]
+#ifndef _KEYPAD_DRV_H
+#define _KEYPAD_DRV_H
+
+[keypad_drv.h_TAILER]
+#endif /* _KEYPAD_DRV_H*/
+
+
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6205B.fig b/mcu/custom/driver/drv/Drv_Tool/MT6205B.fig
new file mode 100644
index 0000000..26ab79b
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6205B.fig
@@ -0,0 +1,43 @@
+[Chip Type]
+Chip = MT6205B
+
+[GPIO]
+GPIO0 = Mode0(GPIO0) Mode1(DAICLK) Mode2(LPT_CK) Mode3(TDMA_CK) PD
+GPIO1 = Mode0(GPIO1) Mode1(DAIPCMOUT) Mode2(LPT_D2) Mode3(TDMA_D1) PD
+GPIO2 = Mode0(GPIO2) Mode1(DAIPCMIN) Mode2(LPT_D1) Mode3(TDMA_D0) PU
+GPIO3 = Mode0(GPIO3) Mode1(DAIRST) Mode2(LPT_D0) Mode3(TDMA_FS) PU
+GPIO4 = Mode0(GPIO4) Mode1(BPI_BUS4) Mode2() Mode3() PD
+GPIO5 = Mode0(GPIO5) Mode1(BPI_BUS5) Mode2() Mode3() PD
+GPIO6 = Mode0(GPIO6) Mode1(BPI_BUS6) Mode2(BFE_PRB0) Mode3() PD
+GPIO7 = Mode0(GPIO7) Mode1(BSI_BUS7) Mode2(BSI_CS1) Mode3() PD
+GPIO8 = Mode0(GPIO8) Mode1(LCD_DATA) Mode2() Mode3() PD
+GPIO9 = Mode0(GPIO9) Mode1(LCD_A0) Mode2() Mode3() PD
+GPIO10 = Mode0(GPIO10) Mode1(LCD_CLK) Mode2() Mode3() PD
+GPIO11 = Mode0(GPIO11) Mode1(LCD_CS0) Mode2() Mode3() PU
+GPIO12 = Mode0(GPIO12) Mode1(LCD_CS1) Mode2() Mode3(D1_TID0) PU
+GPIO13 = Mode0(GPIO13) Mode1(13MHz) Mode2() Mode3() PD
+GPIO14 = Mode0(GPIO14) Mode1() Mode2() Mode3() PD
+GPIO15 = Mode0(GPIO15) Mode1() Mode2() Mode3() PD
+GPIO16 = Mode0(GPIO16) Mode1(PWM) Mode2() Mode3() PD
+GPIO17 = Mode0(GPIO17) Mode1(UCTS2) Mode2(UDSR1) Mode3() PU
+GPIO18 = Mode0(GPIO18) Mode1(URTS2) Mode2(UDTR1) Mode3() PU
+GPIO19 = Mode0(GPIO19) Mode1(URXD2) Mode2() Mode3() PU
+GPIO20 = Mode0(GPIO20) Mode1(UTXD2) Mode2() Mode3() PU
+GPIO21 = Mode0(GPIO21) Mode1(UREF_CLK) Mode2(IRQ) Mode3() PU
+
+[GPO]
+GPO0 = Mode0(GPO0) Mode1(XLCDE) Mode2(EA22) Mode3()
+GPO1 = Mode0(GPO1) Mode1(SRCLKENAN) Mode2(PWM2) Mode3()
+GPO2 = Mode0(GPO2) Mode1(SRCLKENA) Mode2() Mode3()
+GPO3 = Mode0(GPO2) Mode1(ALERTER) Mode2() Mode3()
+
+[EINT]
+EINT_COUNT = 3
+EINT_DEBOUNCE_TIME_COUNT = 3
+
+[ADC]
+ADC_COUNT = 5
+
+[Keypad]
+KEY_ROW = 5
+KEY_COLUMN = 5
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6217.fig b/mcu/custom/driver/drv/Drv_Tool/MT6217.fig
new file mode 100644
index 0000000..f65d029
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6217.fig
@@ -0,0 +1,72 @@
+[Chip Type]
+Chip = MT6217
+
+[GPIO]
+GPIO0 = Mode0(GPIO0) Mode1() Mode2(DSP_GPO3) Mode3() PD
+GPIO1 = Mode0(GPIO1) Mode1(DICK) Mode2() Mode3() PD
+GPIO2 = Mode0(GPIO2) Mode1(DID) Mode2() Mode3() PD
+GPIO3 = Mode0(GPIO3) Mode1(DIMS) Mode2() Mode3() PD
+GPIO4 = Mode0(GPIO4) Mode1(DSP_CLK) Mode2(DSPLCK) Mode3(TRASD4) PD
+GPIO5 = Mode0(GPIO5) Mode1(AHB_CLK) Mode2(DSPLD3) Mode3(TRASD3) PD
+GPIO6 = Mode0(GPIO6) Mode1(ARM_CLK) Mode2(DSPLD2) Mode3(TRASD2) PD
+GPIO7 = Mode0(GPIO7) Mode1(SLOW_CK) Mode2(DSPLD1) Mode3(TRASD1) PD
+GPIO8 = Mode0(GPIO8) Mode1(F32K_CK) Mode2(DSPLD0) Mode3(TRASD0) PD
+GPIO9 = Mode0(GPIO9) Mode1() Mode2() Mode3(TRARSYNC) PD
+GPIO10 = Mode0(GPIO10) Mode1(BPI_BUS6) Mode2() Mode3() PD
+
+GPIO11 = Mode0(GPIO11) Mode1(BPI_BUS7) Mode2(6.5MHz) Mode3(26MHz) PD
+GPIO12 = Mode0(GPIO12) Mode1(BPI_BUS8) Mode2(13MHz) Mode3(26MHz) PD
+GPIO13 = Mode0(GPIO13) Mode1(BPI_BUS9) Mode2(BSI_CS1) Mode3() PD
+GPIO14 = Mode0(GPIO14) Mode1(MCINS) Mode2() Mode3() PU
+GPIO15 = Mode0(GPIO15) Mode1(MCWP) Mode2() Mode3() PU
+GPIO16 = Mode0(GPIO16) Mode1(LSCK) Mode2() Mode3(TBTXEN) PD
+GPIO17 = Mode0(GPIO17) Mode1(LSA0) Mode2() Mode3(TDTIRQ) PD
+GPIO18 = Mode0(GPIO18) Mode1(LSDA) Mode2() Mode3(TCTIRQ2) PD
+GPIO19 = Mode0(GPIO19) Mode1(LSCE0#) Mode2(DSP_TID0) Mode3(TCTIRQ1) PU
+GPIO20 = Mode0(GPIO20) Mode1(LSCE1#) Mode2(LPCE2#) Mode3(TEVTVAL) PU
+
+GPIO21 = Mode0(GPIO21) Mode1(PWM1) Mode2(DSP_GPO0) Mode3(TBTXFS) PD
+GPIO22 = Mode0(GPIO22) Mode1(PWM2) Mode2(DSP_GPO1) Mode3(TBRXEN) PD
+GPIO23 = Mode0(GPIO23) Mode1(ALERTER) Mode2(DSP_GPO2) Mode3(BTRXFS) PD
+GPIO24 = Mode0(GPIO24) Mode1(LPCE1#) Mode2(NCE1#) Mode3(MCU_TID0) PU
+GPIO25 = Mode0(GPIO25) Mode1(NRNB) Mode2(DSP_TID1) Mode3(MCU_TID1) PU
+GPIO26 = Mode0(GPIO26) Mode1(NCLE) Mode2(DSP_TID2) Mode3(MCU_TID2) PD
+GPIO27 = Mode0(GPIO27) Mode1(NALE) Mode2(DSP_TID3) Mode3(MCU_TID3) PD
+GPIO28 = Mode0(GPIO28) Mode1(NWE#) Mode2(DSP_TID4) Mode3(MCU_DID) PU
+GPIO29 = Mode0(GPIO29) Mode1(NRE#) Mode2(DSP_TID5) Mode3(MCU_DFS) PU
+GPIO30 = Mode0(GPIO30) Mode1(NCE0#) Mode2(DSP_TID6) Mode3(MCU_DCK) PU
+
+GPIO31 = Mode0(GPIO31) Mode1(SRCLKENAI) Mode2() Mode3() PD
+GPIO32 = Mode0(GPIO32) Mode1(SIMSEL) Mode2() Mode3() PD
+GPIO33 = Mode0(GPIO33) Mode1(URXD3) Mode2() Mode3() PU
+GPIO34 = Mode0(GPIO34) Mode1(UTXD3) Mode2() Mode3() PU
+GPIO35 = Mode0(GPIO35) Mode1(URXD2) Mode2(UCTS3) Mode3() PU
+GPIO36 = Mode0(GPIO36) Mode1(UTXD2) Mode2(URTS3) Mode3() PU
+GPIO37 = Mode0(GPIO37) Mode1(IRDA_RXD) Mode2(UCTS2) Mode3() PU
+GPIO38 = Mode0(GPIO38) Mode1(IRDA_TXD) Mode2(URTS2) Mode3() PU
+GPIO39 = Mode0(GPIO39) Mode1(IRDA_PDN) Mode2() Mode3() PU
+GPIO40 = Mode0(GPIO40) Mode1(ECS7#) Mode2() Mode3() PU
+
+GPIO41 = Mode0(GPIO41) Mode1(MIRQ) Mode2(13MHz) Mode3(6.5MHz) PU
+GPIO42 = Mode0(GPIO42) Mode1(MFIQ) Mode2() Mode3() PU
+GPIO43 = Mode0(GPIO43) Mode1(DAICLK) Mode2(TDMA_CK) Mode3(TRACLK) PU
+GPIO44 = Mode0(GPIO44) Mode1(DAIPCMOUT) Mode2(TDMA_D1) Mode3(TRASYNC) PD
+GPIO45 = Mode0(GPIO45) Mode1(DAIPCMIN) Mode2(TDMA_D2) Mode3(TRASD7) PU
+GPIO46 = Mode0(GPIO46) Mode1(DAISYNC) Mode2(BFEPRBO) Mode3(TRASD5) PU
+GPIO47 = Mode0(GPIO47) Mode1(DAIRST) Mode2(TDMA_FS) Mode3(TRASD6) PU
+
+[GPO]
+GPO0 = Mode0(GPO0) Mode1(SRCLKENA) Mode2() Mode3()
+GPO1 = Mode0(GPO1) Mode1(SRCLKENAN) Mode2() Mode3()
+GPO2 = Mode0(GPO2) Mode1(EPDN#) Mode2() Mode3()
+
+[EINT]
+EINT_COUNT = 8
+EINT_DEBOUNCE_TIME_COUNT = 4
+
+[ADC]
+ADC_COUNT = 7
+
+[Keypad]
+KEY_ROW = 6
+KEY_COLUMN = 7
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6219.fig b/mcu/custom/driver/drv/Drv_Tool/MT6219.fig
new file mode 100644
index 0000000..9c89441
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6219.fig
@@ -0,0 +1,83 @@
+[Chip Type]
+Chip = MT6219
+
+[GPIO]
+GPIO0 = Mode0(GPIO0) Mode1() Mode2(DSP_GPO3) Mode3() PD
+GPIO1 = Mode0(GPIO1) Mode1(DICK) Mode2() Mode3() PD
+GPIO2 = Mode0(GPIO2) Mode1(DID) Mode2() Mode3() PD
+GPIO3 = Mode0(GPIO3) Mode1(DIMS) Mode2() Mode3() PD
+GPIO4 = Mode0(GPIO4) Mode1(DSP_CLK) Mode2(DSPLCK) Mode3(TRASD4) PD
+GPIO5 = Mode0(GPIO5) Mode1(AHB_CLK) Mode2(DSPLD3) Mode3(TRASD3) PD
+GPIO6 = Mode0(GPIO6) Mode1(ARM_CLK) Mode2(DSPLD2) Mode3(TRASD2) PD
+GPIO7 = Mode0(GPIO7) Mode1(SLOW_CK) Mode2(DSPLD1) Mode3(TRASD1) PD
+GPIO8 = Mode0(GPIO8) Mode1(SCL) Mode2(DSPLD0) Mode3(TRASD0) PD
+GPIO9 = Mode0(GPIO9) Mode1(SDA) Mode2(DSPLSYNC) Mode3(TRARSYNC) PD
+GPIO10 = Mode0(GPIO10) Mode1(BPI_BUS6) Mode2() Mode3() PD
+
+GPIO11 = Mode0(GPIO11) Mode1(BPI_BUS7) Mode2() Mode3() PD
+GPIO12 = Mode0(GPIO12) Mode1(BPI_BUS8) Mode2(13MHz) Mode3(32KHz) PD
+GPIO13 = Mode0(GPIO13) Mode1(BPI_BUS9) Mode2(BSI_CS1) Mode3() PD
+GPIO14 = Mode0(GPIO14) Mode1(MCINS) Mode2() Mode3() PU
+GPIO15 = Mode0(GPIO15) Mode1(MCWP) Mode2() Mode3() PU
+GPIO16 = Mode0(GPIO16) Mode1(LSCK) Mode2(TDMA_CK) Mode3(TBTXEN) PD
+GPIO17 = Mode0(GPIO17) Mode1(LSA0) Mode2(TDMA_D1) Mode3(TDTIRQ) PD
+GPIO18 = Mode0(GPIO18) Mode1(LSDA) Mode2(TDMA_D0) Mode3(TCTIRQ2) PD
+GPIO19 = Mode0(GPIO19) Mode1(LSCE0#) Mode2(TDMA_FS) Mode3(TCTIRQ1) PU
+GPIO20 = Mode0(GPIO20) Mode1(LSCE1#) Mode2(LPCE2#) Mode3(TEVTVAL) PU
+
+GPIO21 = Mode0(GPIO21) Mode1(PWM1) Mode2(DSP_GPO0) Mode3(TBTXFS) PD
+GPIO22 = Mode0(GPIO22) Mode1(PWM2) Mode2(DSP_GPO1) Mode3(TBRXEN) PD
+GPIO23 = Mode0(GPIO23) Mode1(ALERTER) Mode2(DSP_GPO2) Mode3(BTRXFS) PD
+GPIO24 = Mode0(GPIO24) Mode1(LPCE1#) Mode2(DSP_TID0) Mode3(MCU_TID0) PU
+GPIO25 = Mode0(GPIO25) Mode1(NRNB) Mode2(DSP_TID1) Mode3(MCU_TID1) PU
+GPIO26 = Mode0(GPIO26) Mode1(NCLE) Mode2(DSP_TID2) Mode3(MCU_TID2) PD
+GPIO27 = Mode0(GPIO27) Mode1(NALE) Mode2(DSP_TID3) Mode3(MCU_TID3) PD
+GPIO28 = Mode0(GPIO28) Mode1(NWE#) Mode2(DSP_TID4) Mode3(MCU_DID) PU
+GPIO29 = Mode0(GPIO29) Mode1(NRE#) Mode2(DSP_TID5) Mode3(MCU_DFS) PU
+GPIO30 = Mode0(GPIO30) Mode1(NCE#) Mode2(DSP_TID6) Mode3(MCU_DCK) PU
+
+GPIO31 = Mode0(GPIO31) Mode1(SRCLKENAI) Mode2() Mode3() PD
+GPIO32 = Mode0(GPIO32) Mode1(SIMSEL) Mode2() Mode3() PD
+GPIO33 = Mode0(GPIO33) Mode1(URXD3) Mode2() Mode3() PU
+GPIO34 = Mode0(GPIO34) Mode1(UTXD3) Mode2() Mode3() PU
+GPIO35 = Mode0(GPIO35) Mode1(URXD2) Mode2(UCTS3) Mode3() PU
+GPIO36 = Mode0(GPIO36) Mode1(UTXD2) Mode2(URTS3) Mode3() PU
+GPIO37 = Mode0(GPIO37) Mode1(IRDA_RXD) Mode2(UCTS2) Mode3() PU
+GPIO38 = Mode0(GPIO38) Mode1(IRDA_TXD) Mode2(URTS2) Mode3() PU
+GPIO39 = Mode0(GPIO39) Mode1(IRDA_PDN) Mode2() Mode3() PU
+GPIO40 = Mode0(GPIO40) Mode1(ECS7#) Mode2() Mode3() PU
+
+GPIO41 = Mode0(GPIO41) Mode1(MIRQ) Mode2(13MHz) Mode3(32KHz) PU
+GPIO42 = Mode0(GPIO42) Mode1(MFIQ) Mode2() Mode3() PU
+GPIO43 = Mode0(GPIO43) Mode1(DAICLK) Mode2(DSPLD7) Mode3(TRACLK) PU
+GPIO44 = Mode0(GPIO44) Mode1(DAIPCMOUT) Mode2(DSPLD6) Mode3(TRASYNC) PD
+GPIO45 = Mode0(GPIO45) Mode1(DAIPCMIN) Mode2(DSPLD5) Mode3(TRASD7) PU
+GPIO46 = Mode0(GPIO46) Mode1(DAISYNC) Mode2(BFEPRBO) Mode3(TRASD5) PU
+GPIO47 = Mode0(GPIO47) Mode1(DAIRST) Mode2(DSPLD4) Mode3(TRASD6) PU
+GPIO48 = Mode0(GPIO48) Mode1(CMRST) Mode2() Mode3() Z
+GPIO49 = Mode0(GPIO49) Mode1(CMPDN) Mode2() Mode3() Z
+GPIO50 = Mode0(GPIO50) Mode1(CMDAT1) Mode2() Mode3() PD
+
+GPIO51 = Mode0(GPIO51) Mode1(CMDAT0) Mode2() Mode3() PD
+GPIO52 = Mode0(GPIO52) Mode1(ECS6#) Mode2() Mode3() PU
+GPIO53 = Mode0(GPIO53) Mode1(ECS5#) Mode2() Mode3() PU
+GPIO54 = Mode0(GPIO54) Mode1(ECS4#) Mode2() Mode3() PU
+
+
+[GPO]
+GPO0 = Mode0(GPO0) Mode1(SRCLKENA) Mode2() Mode3()
+GPO1 = Mode0(GPO1) Mode1(SRCLKENAN) Mode2() Mode3()
+GPO2 = Mode0(GPO2) Mode1(EPDN#) Mode2() Mode3()
+GPO3 = Mode0(GPO3) Mode1(EA24) Mode2() Mode3()
+GPO4 = Mode0(GPO4) Mode1(EA25) Mode2(13MHz) Mode3(32KHz)
+
+[EINT]
+EINT_COUNT = 8
+EINT_DEBOUNCE_TIME_COUNT = 4
+
+[ADC]
+ADC_COUNT = 7
+
+[Keypad]
+KEY_ROW = 6
+KEY_COLUMN = 7
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6223.fig b/mcu/custom/driver/drv/Drv_Tool/MT6223.fig
new file mode 100644
index 0000000..7ec94f3
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6223.fig
@@ -0,0 +1,76 @@
+[Chip Type]
+Chip = MT6223
+
+[GPIO]
+GPIO0 = Mode0(GPIO0) Mode1(LCD_D8) Mode2() Mode3() PD
+GPIO1 = Mode0(GPIO1) Mode1(LCD_D7) Mode2() Mode3() PD
+GPIO2 = Mode0(GPIO2) Mode1(LCD_D6) Mode2() Mode3() PD
+GPIO3 = Mode0(GPIO3) Mode1(LCD_D5) Mode2() Mode3() PD
+GPIO4 = Mode0(GPIO4) Mode1(LCD_D4) Mode2() Mode3() PD
+GPIO5 = Mode0(GPIO5) Mode1(LCD_D3) Mode2() Mode3() PD
+GPIO6 = Mode0(GPIO6) Mode1(LCD_D2) Mode2() Mode3() PD
+GPIO7 = Mode0(GPIO7) Mode1(LCD_D1) Mode2() Mode3() PD
+GPIO8 = Mode0(GPIO8) Mode1(LCD_RSTB) Mode2() Mode3() PU
+GPIO9 = Mode0(GPIO9) Mode1(LCD_WR_B) Mode2() Mode3() PU
+GPIO10 = Mode0(GPIO10) Mode1(LCD_RD_B) Mode2(LCD_SCLK) Mode3() PU
+
+GPIO11 = Mode0(GPIO11) Mode1(LCD_D0) Mode2(LCD_SDA) Mode3() PD
+GPIO12 = Mode0(GPIO12) Mode1(LCD_A0) Mode2(LCD_SA0) Mode3() PU
+GPIO13 = Mode0(GPIO13) Mode1(LCD_CS0_B) Mode2(LCD_SCE0_B) Mode3() PU
+GPIO14 = Mode0(GPIO14) Mode1(LCD_CS1_B) Mode2(LCD_SCE1_B) Mode3(EINT7) PU
+GPIO15 = Mode0(GPIO15) Mode1(DAICLK) Mode2(EDICK) Mode3() PU
+GPIO16 = Mode0(GPIO16) Mode1(DAIPCMOUT) Mode2(EDIDAT) Mode3() PD
+GPIO17 = Mode0(GPIO17) Mode1(DAIPCMIN) Mode2() Mode3() PU
+GPIO18 = Mode0(GPIO18) Mode1(DAIRST) Mode2() Mode3() PU
+GPIO19 = Mode0(GPIO19) Mode1(DAISYNC) Mode2(EDIWS) Mode3() PU
+GPIO20 = Mode0(GPIO20) Mode1(BPI_BUS6) Mode2(XADMUX) Mode3() Z
+
+GPIO21 = Mode0(GPIO21) Mode1(BPI_BUS7) Mode2(BSI_RFIN) Mode3(clk_out0) PD
+GPIO22 = Mode0(GPIO22) Mode1(BPI_BUS8) Mode2(KCOL5) Mode3(clk_out1) PU
+GPIO23 = Mode0(GPIO23) Mode1(BPI_BUS9) Mode2(BSI_CS1) Mode3(clk_out2) PD
+GPIO24 = Mode0(GPIO24) Mode1(ALERTER) Mode2() Mode3() PD
+GPIO25 = Mode0(GPIO25) Mode1(PWM) Mode2() Mode3() PD
+GPIO26 = Mode0(GPIO26) Mode1(JTRST_B) Mode2(EINT4) Mode3() PD
+GPIO27 = Mode0(GPIO27) Mode1(JTDI) Mode2(EINT5) Mode3() PU
+GPIO28 = Mode0(GPIO28) Mode1(JTMS) Mode2(EINT6) Mode3() PU
+GPIO29 = Mode0(GPIO29) Mode1(WATCHDOG) Mode2() Mode3() PD
+GPIO30 = Mode0(GPIO30) Mode1(EA0) Mode2(EA25) Mode3() PD
+
+GPIO31 = Mode0(GPIO31) Mode1(SRCLKENAI) Mode2(PWR_KEY) Mode3() PD
+GPIO32 = Mode0(GPIO32) Mode1(KCOL4) Mode2() Mode3() PU
+GPIO33 = Mode0(GPIO33) Mode1(KCOL3) Mode2() Mode3() PU
+GPIO34 = Mode0(GPIO34) Mode1(KCOL2) Mode2() Mode3() PU
+GPIO35 = Mode0(GPIO35) Mode1(KCOL1) Mode2() Mode3() PU
+GPIO36 = Mode0(GPIO36) Mode1(KCOL0) Mode2() Mode3() PU
+GPIO37 = Mode0(GPIO37) Mode1(KROW4) Mode2() Mode3() Z
+GPIO38 = Mode0(GPIO38) Mode1(KROW3) Mode2() Mode3() Z
+GPIO39 = Mode0(GPIO39) Mode1(KROW2) Mode2() Mode3() Z
+GPIO40 = Mode0(GPIO40) Mode1(KROW1) Mode2() Mode3() Z
+
+GPIO41 = Mode0(GPIO41) Mode1(KROW0) Mode2() Mode3() Z
+GPIO42 = Mode0(GPIO42) Mode1(EINT2) Mode2(MIRQ) Mode3() PU
+GPIO43 = Mode0(GPIO43) Mode1(EINT3) Mode2() Mode3() PU
+GPIO44 = Mode0(UTXD1) Mode1(GPIO44) Mode2() Mode3() PU
+GPIO45 = Mode0(GPIO45) Mode1(UCTS1_B) Mode2() Mode3(SCL) PU
+GPIO46 = Mode0(GPIO46) Mode1(URTS1_B) Mode2() Mode3(SDA) PU
+GPIO47 = Mode0(GPIO47) Mode1(UTXD3) Mode2(UCTS2_B) Mode3(clk_out3) PU
+GPIO48 = Mode0(GPIO48) Mode1(URXD3) Mode2(URTS2_B) Mode3(clk_out4) PU
+GPIO49 = Mode0(GPIO49) Mode1(URXD2) Mode2(clk_out5) Mode3() PU
+GPIO50 = Mode0(URXD1) Mode1(GPIO50) Mode2() Mode3() PU
+
+GPIO51 = Mode0(GPIO51) Mode1(UTXD2) Mode2() Mode3(VIBRATOREN) PU
+GPIO52 = Mode0(GPIO52) Mode1(MFIQ) Mode2(ECS3_B) Mode3() PU
+
+
+[GPO]
+
+[EINT]
+EINT_COUNT = 8
+EINT_DEBOUNCE_TIME_COUNT = 4
+
+[ADC]
+ADC_COUNT = 7
+
+[Keypad]
+KEY_ROW = 5
+KEY_COLUMN = 7
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6225.fig b/mcu/custom/driver/drv/Drv_Tool/MT6225.fig
new file mode 100644
index 0000000..a7df3a8
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6225.fig
@@ -0,0 +1,77 @@
+[Chip Type]
+Chip = MT6225
+
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1() MODE2() MODE3(EINT4) PU
+GPIO1 = MODE0(GPIO1) MODE1() MODE2() MODE3(EINT5) PU
+GPIO2 = MODE0(GPIO2) MODE1() MODE2(UCTS1) MODE3(EINT6) PU
+GPIO3 = MODE0(GPIO3) MODE1(BSI_RFIN) MODE2(URTS1) MODE3(EINT7) PU
+GPIO4 = MODE0(GPIO4) MODE1(DAIRST) MODE2(IRDA_PDN) MODE3(DSP_CLK) PU
+GPIO5 = MODE0(GPIO5) MODE1(EDICK) MODE2(26MHZ) MODE3(AHB_CLK) PD
+GPIO6 = MODE0(GPIO6) MODE1(EDIWS) MODE2(32KHZ) MODE3(ARM_CLK) PD
+GPIO7 = MODE0(GPIO7) MODE1(EDIDAT) MODE2() MODE3(SLOW_CLK) PD
+GPIO8 = MODE0(GPIO8) MODE1(SCL) MODE2() MODE3() PU
+GPIO9 = MODE0(GPIO9) MODE1(SDA) MODE2() MODE3() PU
+GPIO10= MODE0(GPIO10) MODE1(CMRST) MODE2(DRF_DATA) MODE3() PD
+GPIO11= MODE0(GPIO11) MODE1(CMPDN) MODE2(DRF_EN) MODE3() PD
+GPIO12= MODE0(GPIO12) MODE1(CMVREF) MODE2(MIRQ) MODE3() PD/PU
+GPIO13= MODE0(GPIO13) MODE1(CMHREF) MODE2(MFIQ) MODE3() PD/PU
+GPIO14= MODE0(GPIO14) MODE1(CMMCLK) MODE2(26MHZ) MODE3(6.5MHZ) PD
+GPIO15= MODE0(GPIO15) MODE1(CMDAT7) MODE2(MCDA7) MODE3() PD
+GPIO16= MODE0(GPIO16) MODE1(CMDAT6) MODE2(MCDA6) MODE3(DICK) PD
+GPIO17= MODE0(GPIO17) MODE1(CMDAT5) MODE2(MCDA5) MODE3(DID) PD
+GPIO18= MODE0(GPIO18) MODE1(CMDAT4) MODE2(MCDA4) MODE3(DIMS) PD
+GPIO19= MODE0(GPIO19) MODE1(CMDAT3) MODE2(DSP_GPO3) MODE3(TBTXEN) PD
+GPIO20= MODE0(GPIO20) MODE1(CMDAT2) MODE2(DSP_GPO2) MODE3(TBTXFS) PD
+GPIO21= MODE0(GPIO21) MODE1(CMDAT1) MODE2(DSP_GPO1) MODE3(TBRXEN) PD
+GPIO22= MODE0(GPIO22) MODE1(CMDAT0) MODE2(DSP_GPO0) MODE3(TBRXFS) PD
+GPIO23= MODE0() MODE1() MODE2() MODE3() PD/PU
+GPIO24= MODE0() MODE1() MODE2() MODE3() PD/PU
+GPIO25= MODE0(GPIO25) MODE1(BPI_BUS6) MODE2(PWM1) MODE3(13MHZ) PD
+GPIO26= MODE0(GPIO26) MODE1(BPI_BUS7) MODE2(PWM2) MODE3(32KHZ) PD
+GPIO27= MODE0(GPIO27) MODE1(BPI_BUS8) MODE2(ALERTER) MODE3(26MHZ) PD
+GPIO28= MODE0(GPIO28) MODE1(BPI_BUS9) MODE2(BSI_CS1) MODE3() PD
+GPIO29= MODE0(GPIO29) MODE1(LSCK) MODE2(TDMA_CK) MODE3(DSP_TID0) PU
+GPIO30= MODE0(GPIO30) MODE1(LSA0) MODE2(TDMA_D1) MODE3(TDTIRQ) PU
+GPIO31= MODE0(GPIO31) MODE1(LSDA) MODE2(TDMA_D0) MODE3(TCTIRQ2) PU
+GPIO32= MODE0(GPIO32) MODE1(LSCE0B) MODE2(TDMA_FS) MODE3(TCTIRQ1) PU
+GPIO33= MODE0(GPIO33) MODE1(LSCE1B) MODE2(LPCE2B) MODE3(TEVTVAL) PU
+GPIO34= MODE0(GPIO34) MODE1(LPCE1B) MODE2(NCE1B) MODE3() PU
+GPIO35= MODE0(GPIO35) MODE1(NLD17) MODE2(KCOL5) MODE3(VPP65) PD
+GPIO36= MODE0(GPIO36) MODE1(NLD16) MODE2(KCOL6) MODE3() PD
+GPIO37= MODE0(GPIO37) MODE1(NRNB) MODE2(DSP_TID1) MODE3() PU
+GPIO38= MODE0(GPIO38) MODE1(NCLE) MODE2(DSP_TID2) MODE3() PD
+GPIO39= MODE0(GPIO39) MODE1(NALE) MODE2(DSP_TID3) MODE3() PD
+GPIO40= MODE0(GPIO40) MODE1(NWEB) MODE2(DSP_TID4) MODE3() PU
+GPIO41= MODE0(GPIO41) MODE1(NREB) MODE2(DSP_TID5) MODE3() PU
+GPIO42= MODE0(GPIO42) MODE1(NCEB0) MODE2(DSP_TID6) MODE3() PU
+GPIO43= MODE0(GPIO43) MODE1(SRCLKENAI) MODE2() MODE3() PD
+GPIO44= MODE0(GPIO44) MODE1(MCWP) MODE2() MODE3() PU
+GPIO45= MODE0(GPIO45) MODE1(MCINS) MODE2() MODE3() PU
+GPIO46= MODE0(GPIO46) MODE1(SIMSEL) MODE2() MODE3() PD
+GPIO47= MODE0(GPIO47) MODE1(URXD2) MODE2(UCTS3) MODE3(IRDA_RXD) PU
+GPIO48= MODE0(GPIO48) MODE1(UTXD2) MODE2(URTS3) MODE3(IRDA_TXD) PU
+GPIO49= MODE0(GPIO49) MODE1(URXD3) MODE2(UCTS2) MODE3() PU
+GPIO50= MODE0(GPIO50) MODE1(UTXD3) MODE2(URTS2) MODE3() PU
+GPIO51= MODE0(GPIO51) MODE1(DAICLK) MODE2() MODE3() PU
+GPIO52= MODE0(GPIO52) MODE1(DAIPCMOUT) MODE2() MODE3() PD
+GPIO53= MODE0(GPIO53) MODE1(DAIPCMIN) MODE2() MODE3() PU
+GPIO54= MODE0(GPIO54) MODE1(DAISYNC) MODE2() MODE3() PU
+
+[GPO]
+GPO0 = MODE0(GPO0) MODE1(SRCLKENA) MODE2() MODE3()
+GPO1 = MODE0(GPO1) MODE1(EA24) MODE2(26MHZ) MODE3(32KHZ)
+GPO2 = MODE0(GPO2) MODE1(EA25) MODE2(32KHZ) MODE3(26MHZ)
+GPO3 = MODE0(GPO3) MODE1(EPDN_B) MODE2(6.5MHZ) MODE3(26MHZ)
+
+[EINT]
+EINT_COUNT=8
+EINT_DEBOUNE_TIME_COUNT=4
+
+[ADC]
+ADC_COUNT=7
+
+[KEYPAD]
+KEY_ROW=6
+KEY_COLUMN=7
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6227.fig b/mcu/custom/driver/drv/Drv_Tool/MT6227.fig
new file mode 100644
index 0000000..0f03088
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6227.fig
@@ -0,0 +1,85 @@
+[Chip Type]
+Chip = MT6227
+
+[GPIO]
+GPIO0 = Mode0(GPIO0) Mode1(DICL) Mode2(DSP_GPO3) Mode3() PD
+GPIO1 = Mode0(GPIO1) Mode1(BSI_RFIN) Mode2() Mode3() PD
+GPIO2 = Mode0(GPIO2) Mode1(DID) Mode2() Mode3() PD
+GPIO3 = Mode0(GPIO3) Mode1(DIMS) Mode2() Mode3() PD
+GPIO4 = Mode0(GPIO4) Mode1(DSP_CLK) Mode2(DSPLCK) Mode3(EDICK) PD
+GPIO5 = Mode0(GPIO5) Mode1(AHB_CLK) Mode2(DSPLD3) Mode3(EDIWS) PD
+GPIO6 = Mode0(GPIO6) Mode1(ARM_CLK) Mode2(DSPLD2) Mode3(CMFLASH) PD
+GPIO7 = Mode0(GPIO7) Mode1(SLOW_CK) Mode2(DSPLD1) Mode3(EDIDAT) PD
+GPIO8 = Mode0(GPIO8) Mode1(SCL) Mode2(DSPLD0) Mode3() PD
+GPIO9 = Mode0(GPIO9) Mode1(SDA) Mode2(DSPLSYNC) Mode3() PD
+GPIO10 = Mode0(GPIO10) Mode1(BPI_BUS6) Mode2() Mode3() PD
+
+GPIO11 = Mode0(GPIO11) Mode1(BPI_BUS7) Mode2(65MHz) Mode3(26MHz) PD
+GPIO12 = Mode0(GPIO12) Mode1(BPI_BUS8) Mode2(13MHz) Mode3(32KHz) PD
+GPIO13 = Mode0(GPIO13) Mode1(BPI_BUS9) Mode2(BSI_CS1) Mode3() PD
+GPIO14 = Mode0(GPIO14) Mode1(MCINS) Mode2() Mode3() PU
+GPIO15 = Mode0(GPIO15) Mode1(MCWP) Mode2() Mode3() PU
+GPIO16 = Mode0(GPIO16) Mode1(LSCK) Mode2(TDMA_CK) Mode3(TBTXEN) PU
+GPIO17 = Mode0(GPIO17) Mode1(LSA0) Mode2(TDMA_D1) Mode3(TDTIRQ) PU
+GPIO18 = Mode0(GPIO18) Mode1(LSDA) Mode2(TDMA_D0) Mode3(TCTIRQ2) PU
+GPIO19 = Mode0(GPIO19) Mode1(LSCE0#) Mode2(TDMA_FS) Mode3(TCTIRQ1) PU
+GPIO20 = Mode0(GPIO20) Mode1(LSCE1#) Mode2(LPCE2#) Mode3(TEVTVAL) PU
+
+GPIO21 = Mode0(GPIO21) Mode1(PWM1) Mode2(DSP_GPO0) Mode3(TBTXFS) PD
+GPIO22 = Mode0(GPIO22) Mode1(PWM2) Mode2(DSP_GPO1) Mode3(TBRXEN) PD
+GPIO23 = Mode0(GPIO23) Mode1(ALERTER) Mode2(DSP_GPO2) Mode3(BTRXFS) PD
+GPIO24 = Mode0(GPIO24) Mode1(LPCE1#) Mode2(NCE1#) Mode3(MCU_TID0) PU
+GPIO25 = Mode0(GPIO25) Mode1(NRNB) Mode2(DSP_TID1) Mode3(MCU_TID1) PU
+GPIO26 = Mode0(GPIO26) Mode1(NCLE) Mode2(DSP_TID2) Mode3(MCU_TID2) PD
+GPIO27 = Mode0(GPIO27) Mode1(NALE) Mode2(DSP_TID3) Mode3(MCU_TID3) PD
+GPIO28 = Mode0(GPIO28) Mode1(NWE#) Mode2(DSP_TID4) Mode3(MCU_DID) PU
+GPIO29 = Mode0(GPIO29) Mode1(NRE#) Mode2(DSP_TID5) Mode3(MCU_DFS) PU
+GPIO30 = Mode0(GPIO30) Mode1(NCE#) Mode2(DSP_TID6) Mode3(MCU_DCK) PU
+
+GPIO31 = Mode0(GPIO31) Mode1(SRCLKENAI) Mode2() Mode3() PD
+GPIO32 = Mode0(GPIO32) Mode1(SIMSEL) Mode2() Mode3() PD
+GPIO33 = Mode0(GPIO33) Mode1(URXD3) Mode2(EINT7) Mode3() PU
+GPIO34 = Mode0(GPIO34) Mode1(UTXD3) Mode2(EINT5) Mode3() PU
+GPIO35 = Mode0(GPIO35) Mode1(URXD2) Mode2(UCTS3) Mode3(EINT6) PU
+GPIO36 = Mode0(GPIO36) Mode1(UTXD2) Mode2(URTS3) Mode3(EINT4) PU
+GPIO37 = Mode0(GPIO37) Mode1(IRDA_RXD) Mode2(UCTS2) Mode3() PU
+GPIO38 = Mode0(GPIO38) Mode1(IRDA_TXD) Mode2(URTS2) Mode3() PU
+GPIO39 = Mode0(GPIO39) Mode1(IRDA_PDN) Mode2() Mode3() PU
+GPIO40 = Mode0(GPIO40) Mode1(ECS7#) Mode2() Mode3() PU
+
+GPIO41 = Mode0(GPIO41) Mode1(MIRQ) Mode2(13MHz) Mode3(32KHz) PU
+GPIO42 = Mode0(GPIO42) Mode1(MFIQ) Mode2() Mode3() PU
+GPIO43 = Mode0(GPIO43) Mode1(DAICLK) Mode2(DSPLD7) Mode3() PU
+GPIO44 = Mode0(GPIO44) Mode1(DAIPCMOUT) Mode2(DSPLD6) Mode3() PD
+GPIO45 = Mode0(GPIO45) Mode1(DAIPCMIN) Mode2(DSPLD5) Mode3() PU
+GPIO46 = Mode0(GPIO46) Mode1(DAISYNC) Mode2(BFEPRBO) Mode3() PU
+GPIO47 = Mode0(GPIO47) Mode1(DAIRST) Mode2(DSPLD4) Mode3() PU
+GPIO48 = Mode0(GPIO48) Mode1(CMRST) Mode2() Mode3() PD
+GPIO49 = Mode0(GPIO49) Mode1(CMPDN) Mode2() Mode3() PD
+GPIO50 = Mode0(GPIO50) Mode1(CMDAT1) Mode2(MCDA5) Mode3() PD
+
+GPIO51 = Mode0(GPIO51) Mode1(CMDAT0) Mode2(MCDA4) Mode3() PD
+GPIO52 = Mode0(GPIO52) Mode1(ECS6#) Mode2() Mode3() PU
+GPIO53 = Mode0(GPIO53) Mode1(ECS5#) Mode2() Mode3() PU
+GPIO54 = Mode0(GPIO54) Mode1(ECS4#) Mode2() Mode3() PU
+GPIO55 = Mode0(GPIO55) Mode1(NLD16) Mode2(MCDA6) Mode3() PD
+GPIO56 = Mode0(GPIO56) Mode1(NLD17) Mode2(MCDA7) Mode3(DSP_TID0) PD
+
+
+[GPO]
+GPO0 = Mode0(GPO0) Mode1(SRCLKENA) Mode2() Mode3()
+GPO1 = Mode0(GPO1) Mode1(SRCLKENAN) Mode2() Mode3()
+GPO2 = Mode0(GPO2) Mode1(EPDN#) Mode2(6.5MHz) Mode3(26MHz)
+GPO3 = Mode0(GPO3) Mode1(EA24) Mode2() Mode3()
+GPO4 = Mode0(GPO4) Mode1(EA25) Mode2(13MHz) Mode3(32KHz)
+
+[EINT]
+EINT_COUNT = 8
+EINT_DEBOUNCE_TIME_COUNT = 4
+
+[ADC]
+ADC_COUNT = 7
+
+[Keypad]
+KEY_ROW = 6
+KEY_COLUMN = 7
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6228.fig b/mcu/custom/driver/drv/Drv_Tool/MT6228.fig
new file mode 100644
index 0000000..39861cf
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6228.fig
@@ -0,0 +1,95 @@
+[Chip Type]
+Chip = MT6228
+
+[GPIO]
+GPIO0 = Mode0(GPIO0) Mode1(CMFLASH) Mode2() Mode3(DSP_TID5) PD
+GPIO1 = Mode0(GPIO1) Mode1(BSI_RFIN) Mode2() Mode3() PD
+GPIO2 = Mode0(GPIO2) Mode1(SCL) Mode2() Mode3() PU
+GPIO3 = Mode0(GPIO3) Mode1(SDA) Mode2() Mode3() PU
+GPIO4 = Mode0(GPIO4) Mode1(EDICK) Mode2(URXD2) Mode3(SWDBGD7) Z
+GPIO5 = Mode0(GPIO5) Mode1(EDIWS) Mode2(UTXD2) Mode3(SWDBGD6) Z
+GPIO6 = Mode0(GPIO6) Mode1(EDIDAT) Mode2() Mode3(SWDBGD5) Z
+GPIO7 = Mode0(GPIO7) Mode1() Mode2(USBVBUSON) Mode3(SWDBGD4) Z
+GPIO8 = Mode0(GPIO8) Mode1(32kHz) Mode2(USBVBUSCHG) Mode3(SWDBGF) Z
+GPIO9 = Mode0(GPIO9) Mode1(26MHz) Mode2(13MHz) Mode3(SWDBGE) Z
+GPIO10 = Mode0(GPIO10) Mode1(NLD16) Mode2(MCDA5) Mode3(DID) PD
+GPIO11 = Mode0(GPIO11) Mode1(NLD17) Mode2(MCDA4) Mode3(DSP_TID1) PD
+GPIO12 = Mode0(GPIO12) Mode1(CMRST) Mode2() Mode3() PD
+GPIO13 = Mode0(GPIO13) Mode1(CMPDN) Mode2() Mode3() PD
+GPIO14 = Mode0(GPIO14) Mode1(CMDAT1) Mode2(MCDA6) Mode3() PD
+GPIO15 = Mode0(GPIO15) Mode1(CMDAT0) Mode2(MCDA7) Mode3() PD
+GPIO16 = Mode0(GPIO16) Mode1(BPI_BUS6) Mode2() Mode3() PD
+GPIO17 = Mode0(GPIO17) Mode1(BPI_BUS7) Mode2(13MHz) Mode3(26MHz) PD
+GPIO18 = Mode0(GPIO18) Mode1(BPI_BUS8) Mode2(6.5MHz) Mode3(32KHz) PD
+GPIO19 = Mode0(GPIO19) Mode1(BPI_BUS9) Mode2(BSI_CS1) Mode3(BFEPRBO) PD
+GPIO20 = Mode0(GPIO20) Mode1(LSCK) Mode2(TDMA_CK) Mode3(TBTXEN) PU
+GPIO21 = Mode0(GPIO21) Mode1(LSA0) Mode2(TDMA_D1) Mode3(TDTIRQ) PU
+GPIO22 = Mode0(GPIO22) Mode1(LSDA) Mode2(TDMA_D0) Mode3(TCTIRQ2) PU
+GPIO23 = Mode0(GPIO23) Mode1(LSCE0#) Mode2(TDMA_FS) Mode3(TCTIRQ1) PU
+GPIO24 = Mode0(GPIO24) Mode1(LSCE1#) Mode2(LPCE2#) Mode3(TEVTVAL) PU
+GPIO25 = Mode0(GPIO25) Mode1(LPCE1#) Mode2(NCE1#) Mode3(DSP_TID0) PU
+GPIO26 = Mode0(NRNB) Mode1(GPIO26) Mode2(USBSESSVLD) Mode3(SWDBGD2) PU
+GPIO27 = Mode0(NCLE) Mode1(GPIO27) Mode2(USBVBUSVLD) Mode3(SWDBGD1) PD
+GPIO28 = Mode0(NALE) Mode1(GPIO28) Mode2(USBSESSEND) Mode3(SWDBGD0) PD
+GPIO29 = Mode0(NWE#) Mode1(GPIO29) Mode2() Mode3() PU
+GPIO30 = Mode0(NRE#) Mode1(GPIO30) Mode2(USBVBUSDSC) Mode3(SWDBGCK) PU
+GPIO31 = Mode0(NCE#) Mode1(GPIO31) Mode2() Mode3() PU
+GPIO32 = Mode0(GPIO32) Mode1(PWM1) Mode2(TBTXFS) Mode3(DSP_TID2) PD
+GPIO33 = Mode0(GPIO33) Mode1(PWM2) Mode2(TBRXEN) Mode3(DSP_TID3) PD
+GPIO34 = Mode0(GPIO34) Mode1(ALERTER) Mode2(TBRXFS) Mode3(DSP_TID4) PD
+GPIO35 = Mode0(GPIO35) Mode1(SRCLKENAI) Mode2() Mode3() PD
+GPIO36 = Mode0(GPIO36) Mode1(MIRQ) Mode2(6.5MHz) Mode3(32KHz) PU
+GPIO37 = Mode0(GPIO37) Mode1(URXD2) Mode2(UCTS3) Mode3() PU
+GPIO38 = Mode0(GPIO38) Mode1(UTXD2) Mode2(URTS3) Mode3() PU
+GPIO39 = Mode0(GPIO39) Mode1(URXD3) Mode2() Mode3() PU
+GPIO40 = Mode0(GPIO40) Mode1(UTXD3) Mode2() Mode3(DSP_TID6) PU
+GPIO41 = Mode0(GPIO41) Mode1(IRDA_RXD) Mode2(UCTS2) Mode3(SWDBG15) PU
+GPIO42 = Mode0(GPIO42) Mode1(IRDA_TXD) Mode2(URTS2) Mode3(SWDBG14) PU
+GPIO43 = Mode0(GPIO43) Mode1(IRDA_PDN) Mode2() Mode3(SWDBG13) PU
+GPIO44 = Mode0(KROW5) Mode1(GPIO44) Mode2(ARM_CK) Mode3(TV_CK) Z
+GPIO45 = Mode0(KROW4) Mode1(GPIO45) Mode2(AHB_CK) Mode3(AHB_CK) Z
+GPIO46 = Mode0(KROW3) Mode1(GPIO46) Mode2(FTV_CK) Mode3(SLOW_CK) Z
+GPIO47 = Mode0(KROW2) Mode1(GPIO47) Mode2(FMCU_CK) Mode3(FUSB_CK) Z
+GPIO48 = Mode0(GPIO48) Mode1(SIMSEL) Mode2() Mode3() PD
+GPIO49 = Mode0(GPIO49) Mode1(DAICLK) Mode2() Mode3(SWDBGD12) PU
+GPIO50 = Mode0(GPIO50) Mode1(DAIPCMOUT) Mode2() Mode3(SWDBGD11) PD
+GPIO51 = Mode0(GPIO51) Mode1(DAIPCMIN) Mode2() Mode3(SWDBGD10) PU
+GPIO52 = Mode0(GPIO52) Mode1(DAIRST) Mode2() Mode3(SWDBG9) PU
+GPIO53 = Mode0(GPIO53) Mode1(DAISYNC) Mode2() Mode3(SWDBG8) PU
+GPIO54 = Mode0(NLD8) Mode1(GPIO54) Mode2() Mode3(SWDBGA1) PD
+GPIO55 = Mode0(NLD9) Mode1(GPIO55) Mode2() Mode3(SWDBGA0) PD
+GPIO56 = Mode0(NLD10) Mode1(GPIO56) Mode2() Mode3(SWDBGROE) PD
+GPIO57 = Mode0(NLD11) Mode1(GPIO57) Mode2() Mode3(SWDBGRD) PD
+GPIO58 = Mode0(NLD12) Mode1(GPIO58) Mode2() Mode3(SWDBGWR) PD
+GPIO59 = Mode0(NLD13) Mode1(GPIO59) Mode2() Mode3(SWDBGPKT) PD
+GPIO60 = Mode0(NLD14) Mode1(GPIO60) Mode2() Mode3(DICK) PD
+GPIO61 = Mode0(NLD15) Mode1(GPIO61) Mode2() Mode3(DMS) PD
+GPIO62 = Mode0(CMDAT2) Mode1(GPIO62) Mode2() Mode3() PD
+GPIO63 = Mode0(GPIO63) Mode1(MFIQ) Mode2(USBID) Mode3(SWDBGD3) PU
+GPIO64 = Mode0(NULL) Mode1() Mode2() Mode3() PD
+GPIO65 = Mode0(NULL) Mode1() Mode2() Mode3() PD
+GPIO66 = Mode0(NULL) Mode1() Mode2() Mode3() PD
+GPIO67 = Mode0(NULL) Mode1() Mode2() Mode3() PD
+GPIO68 = Mode0(CMDAT3) Mode1(GPIO68) Mode2() Mode3() PD
+GPIO69 = Mode0(CMDAT4) Mode1(GPIO69) Mode2() Mode3() PD
+GPIO70 = Mode0(CMDAT5) Mode1(GPIO70) Mode2() Mode3() PD
+GPIO71 = Mode0(CMDAT6) Mode1(GPIO71) Mode2() Mode3() PD
+GPIO72 = Mode0(CMDAT7) Mode1(GPIO72) Mode2() Mode3() PD
+GPIO73 = Mode0(CMDAT8) Mode1(GPIO73) Mode2() Mode3() PD
+GPIO74 = Mode0(CMDAT9) Mode1(GPIO74) Mode2() Mode3() PD
+
+[GPO]
+GPO0 = Mode0(GPO0) Mode1(SRCLKENAN) Mode2() Mode3()
+GPO1 = Mode0(GPO1) Mode1(SRCLKENA) Mode2() Mode3()
+GPO2 = Mode0(GPO2) Mode1(EPDN#) Mode2(26MHz) Mode3(13MHz)
+
+[EINT]
+EINT_COUNT = 8
+EINT_DEBOUNCE_TIME_COUNT = 4
+
+[ADC]
+ADC_COUNT = 7
+
+[Keypad]
+KEY_ROW = 6
+KEY_COLUMN = 7
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6229.fig b/mcu/custom/driver/drv/Drv_Tool/MT6229.fig
new file mode 100644
index 0000000..46ea0a2
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6229.fig
@@ -0,0 +1,95 @@
+[Chip Type]
+Chip = MT6229
+
+[GPIO]
+GPIO0 = Mode0(GPIO0) Mode1(CMFLASH) Mode2() Mode3(D2_TID5) PD
+GPIO1 = Mode0(GPIO1) Mode1(BSI_RFIN) Mode2() Mode3() PD
+GPIO2 = Mode0(GPIO2) Mode1(SCL) Mode2() Mode3() PU
+GPIO3 = Mode0(GPIO3) Mode1(SDA) Mode2() Mode3() PU
+GPIO4 = Mode0(GPIO4) Mode1(EDICK) Mode2(URXD2) Mode3(SWDBGD7) Z
+GPIO5 = Mode0(GPIO5) Mode1(EDIWS) Mode2(UTXD2) Mode3(SWDBGD6) Z
+GPIO6 = Mode0(GPIO6) Mode1(EDIDAT) Mode2() Mode3(SWDBGD5) Z
+GPIO7 = Mode0(GPIO7) Mode1() Mode2(USBVBUSON) Mode3(SWDBGD4) Z
+GPIO8 = Mode0(GPIO8) Mode1(32kHz) Mode2(USBVBUSCHG) Mode3(SWDBGF) Z
+GPIO9 = Mode0(GPIO9) Mode1(26MHz) Mode2(13MHz) Mode3(SWDBGE) Z
+GPIO10 = Mode0(GPIO10) Mode1(NLD16) Mode2(MCDA5) Mode3(D2ID) PD
+GPIO11 = Mode0(GPIO11) Mode1(NLD17) Mode2(MCDA4) Mode3(D2_TID1) PD
+GPIO12 = Mode0(GPIO12) Mode1(CMRST) Mode2() Mode3(D1_TID0) PD
+GPIO13 = Mode0(GPIO13) Mode1(CMPDN) Mode2() Mode3(D1_TID1) PD
+GPIO14 = Mode0(GPIO14) Mode1(CMDAT1) Mode2() Mode3(D1IMS) Z
+GPIO15 = Mode0(GPIO15) Mode1(CMDAT0) Mode2() Mode3(D1ICK) Z
+GPIO16 = Mode0(GPIO16) Mode1(BPI_BUS6) Mode2() Mode3() PD
+GPIO17 = Mode0(GPIO17) Mode1(BPI_BUS7) Mode2(13MHz) Mode3(26MHz) PD
+GPIO18 = Mode0(GPIO18) Mode1(BPI_BUS8) Mode2(6.5MHz) Mode3(32KHz) PD
+GPIO19 = Mode0(GPIO19) Mode1(BPI_BUS9) Mode2(BSI_CS1) Mode3(BFEPRBO) PD
+GPIO20 = Mode0(GPIO20) Mode1(LSCK) Mode2(TDMA_CK) Mode3(TBTXEN) PU
+GPIO21 = Mode0(GPIO21) Mode1(LSA0) Mode2(TDMA_D1) Mode3(TDTIRQ) PU
+GPIO22 = Mode0(GPIO22) Mode1(LSDA) Mode2(TDMA_D0) Mode3(TCTIRQ2) PU
+GPIO23 = Mode0(GPIO23) Mode1(LSCE0#) Mode2(TDMA_FS) Mode3(TCTIRQ1) PU
+GPIO24 = Mode0(GPIO24) Mode1(LSCE1#) Mode2(LPCE2#) Mode3(TEVTVAL) PU
+GPIO25 = Mode0(GPIO25) Mode1(LPCE1#) Mode2(NCE1#) Mode3(D2_TID0) PU
+GPIO26 = Mode0(NRNB) Mode1(GPIO26) Mode2(USBSESSVLD) Mode3(SWDBGD2) PU
+GPIO27 = Mode0(NCLE) Mode1(GPIO27) Mode2(USBVBUSVLD) Mode3(SWDBGD1) PD
+GPIO28 = Mode0(NALE) Mode1(GPIO28) Mode2(USBSESSEND) Mode3(SWDBGD0) PD
+GPIO29 = Mode0(NWE#) Mode1(GPIO29) Mode2() Mode3() PU
+GPIO30 = Mode0(NRE#) Mode1(GPIO30) Mode2(USBVBUSDSC) Mode3(SWDBGCK) PU
+GPIO31 = Mode0(NCE#) Mode1(GPIO31) Mode2() Mode3() PU
+GPIO32 = Mode0(GPIO32) Mode1(PWM1) Mode2(TBTXFS0) Mode3(DSP_TID2) PD
+GPIO33 = Mode0(GPIO33) Mode1(PWM2) Mode2(TBRXEN) Mode3(DSP_TID3) PD
+GPIO34 = Mode0(GPIO34) Mode1(ALERTER) Mode2(TBRXFS) Mode3(DSP_TID4) PD
+GPIO35 = Mode0(GPIO35) Mode1(SRCLKENAI) Mode2() Mode3() PD
+GPIO36 = Mode0(GPIO36) Mode1(MIRQ) Mode2(6.5MHz) Mode3(32KHz) PU
+GPIO37 = Mode0(GPIO37) Mode1(URXD2) Mode2(UCTS3) Mode3() PU
+GPIO38 = Mode0(GPIO38) Mode1(UTXD2) Mode2(URTS3) Mode3() PU
+GPIO39 = Mode0(GPIO39) Mode1(URXD3) Mode2() Mode3(D1ID) PU
+GPIO40 = Mode0(GPIO40) Mode1(UTXD3) Mode2() Mode3(D2_TID6) PU
+GPIO41 = Mode0(GPIO41) Mode1(IRDA_RXD) Mode2(UCTS2) Mode3(SWDBG15) PU
+GPIO42 = Mode0(GPIO42) Mode1(IRDA_TXD) Mode2(URTS2) Mode3(SWDBG14) PU
+GPIO43 = Mode0(GPIO43) Mode1(IRDA_PDN) Mode2() Mode3(SWDBG13) PU
+GPIO44 = Mode0(KROW5) Mode1(GPIO44) Mode2(ARM_CK) Mode3(TV_CK) Z
+GPIO45 = Mode0(KROW4) Mode1(GPIO45) Mode2(AHB_CK) Mode3(DSP_CK) Z
+GPIO46 = Mode0(KROW3) Mode1(GPIO46) Mode2(FTV_CK) Mode3(SLOW_CK) Z
+GPIO47 = Mode0(KROW2) Mode1(GPIO47) Mode2(FMCU_CK) Mode3(FUSB_CK) Z
+GPIO48 = Mode0(GPIO48) Mode1(SIMSEL) Mode2() Mode3() PD
+GPIO49 = Mode0(GPIO49) Mode1(DAICLK) Mode2() Mode3(SWDBGD12) PU
+GPIO50 = Mode0(GPIO50) Mode1(DAIPCMOUT) Mode2() Mode3(SWDBGD11) PD
+GPIO51 = Mode0(GPIO51) Mode1(DAIPCMIN) Mode2() Mode3(SWDBGD10) PU
+GPIO52 = Mode0(GPIO52) Mode1(DAIRST) Mode2() Mode3(SWDBG9) PU
+GPIO53 = Mode0(GPIO53) Mode1(DAISYNC) Mode2() Mode3(SWDBG8) PU
+GPIO54 = Mode0(NLD8) Mode1(GPIO54) Mode2(TBTXEN1) Mode3(SWDBGA1) PD
+GPIO55 = Mode0(NLD9) Mode1(GPIO55) Mode2(TBTXEN2) Mode3(SWDBGA0) PD
+GPIO56 = Mode0(NLD10) Mode1(GPIO56) Mode2(TBTXEN3) Mode3(SWDBGROE) PD
+GPIO57 = Mode0(NLD11) Mode1(GPIO57) Mode2(TBTXFS1) Mode3(SWDBGRD) PD
+GPIO58 = Mode0(NLD12) Mode1(GPIO58) Mode2(TBTXFS2) Mode3(SWDBGWR) PD
+GPIO59 = Mode0(NLD13) Mode1(GPIO59) Mode2(TBTXFS3) Mode3(SWDBGPKT) PD
+GPIO60 = Mode0(NLD14) Mode1(GPIO60) Mode2() Mode3(D2ICK) PD
+GPIO61 = Mode0(NLD15) Mode1(GPIO61) Mode2() Mode3(D2IMS) PD
+GPIO62 = Mode0(CMDAT2) Mode1(GPIO62) Mode2() Mode3() PD
+GPIO63 = Mode0(GPIO63) Mode1(MFIQ) Mode2(USBID) Mode3(SWDBGD3) PU
+GPIO64 = Mode0() Mode1() Mode2() Mode3() Z
+GPIO65 = Mode0() Mode1() Mode2() Mode3() Z
+GPIO66 = Mode0() Mode1() Mode2() Mode3() Z
+GPIO67 = Mode0() Mode1() Mode2() Mode3() Z
+GPIO68 = Mode0(CMDAT3) Mode1(GPIO68) Mode2() Mode3() PD
+GPIO69 = Mode0(CMDAT4) Mode1(GPIO69) Mode2() Mode3() PD
+GPIO70 = Mode0(CMDAT5) Mode1(GPIO70) Mode2() Mode3() PD
+GPIO71 = Mode0(CMDAT6) Mode1(GPIO71) Mode2() Mode3() PD
+GPIO72 = Mode0(CMDAT7) Mode1(GPIO72) Mode2() Mode3() PD
+GPIO73 = Mode0(CMDAT8) Mode1(GPIO73) Mode2() Mode3() PD
+GPIO74 = Mode0(CMDAT9) Mode1(GPIO74) Mode2() Mode3() PD
+
+[GPO]
+GPO0 = Mode0(GPO0) Mode1(SRCLKENA) Mode2() Mode3()
+GPO1 = Mode0(GPO1) Mode1(SRCLKENAN) Mode2() Mode3()
+GPO2 = Mode0(GPO2) Mode1(EPDN#) Mode2(26MHz) Mode3(13MHz)
+
+[EINT]
+EINT_COUNT = 9
+EINT_DEBOUNCE_TIME_COUNT = 9
+
+[ADC]
+ADC_COUNT = 7
+
+[Keypad]
+KEY_ROW = 6
+KEY_COLUMN = 7
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6235.fig b/mcu/custom/driver/drv/Drv_Tool/MT6235.fig
new file mode 100644
index 0000000..39367c7
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6235.fig
@@ -0,0 +1,97 @@
+[Chip Type]
+Chip = MT6235
+GPIO_Pull_Sel=1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(CMRST) MODE2(CLKM0) MODE3(DSP_GPO0) PUPD
+GPIO1 = MODE0(GPIO1) MODE1(CMPDN) MODE2() MODE3(DSP_GPO1) PUPD
+GPIO2 = MODE0(GPIO2) MODE1(CMVREF) MODE2(TBTXEN) MODE3(D1_TID0) PUPD
+GPIO3 = MODE0(GPIO3) MODE1(CMHREF) MODE2(TBTXFS) MODE3() PUPD
+GPIO4 = MODE0(GPIO4) MODE1(CMPCLK) MODE2(TBRXEN) MODE3(D1_TID1) PUPD
+GPIO5 = MODE0(GPIO5) MODE1(CMMCLK) MODE2(TBRXFS) MODE3() PUPD
+GPIO6 = MODE0(GPIO6) MODE1(CMDAT7) MODE2() MODE3(D1ICK) PUPD
+GPIO7 = MODE0(GPIO7) MODE1(CMDAT6) MODE2() MODE3(D1ID) PUPD
+GPIO8 = MODE0(GPIO8) MODE1(CMDAT5) MODE2() MODE3(D1IMS) PUPD
+GPIO9 = MODE0(GPIO9) MODE1(CMDAT4) MODE2() MODE3(D2ICK) PUPD
+GPIO10= MODE0(GPIO10) MODE1(CMDAT3) MODE2() MODE3(D2ID) PUPD
+GPIO11= MODE0(GPIO11) MODE1(CMDAT2) MODE2() MODE3(D2IMS) PUPD
+GPIO12= MODE0(GPIO12) MODE1(CMDAT1) MODE2() MODE3(D2_TID0) PUPD
+GPIO13= MODE0(GPIO13) MODE1(CMDAT0) MODE2() MODE3(D2_TID1) PUPD
+GPIO14= MODE0(GPIO14) MODE1(CMFLASH) MODE2() MODE3(D2_TID2) PUPD
+GPIO15= MODE0(GPIO15) MODE1(SCL) MODE2() MODE3(D2_TID3) PUPD
+GPIO16= MODE0(GPIO16) MODE1(SDA) MODE2() MODE3(D2_TID4) PUPD
+GPIO17= MODE0(GPIO17) MODE1(PWM2) MODE2() MODE3(D2_TID5) PUPD
+GPIO18= MODE0(GPIO18) MODE1(PWM3) MODE2() MODE3(D2_TID6) PUPD
+GPIO19= MODE0(GPIO19) MODE1(BPI_BUS3) MODE2() MODE3() PUPD
+GPIO20= MODE0(GPIO20) MODE1(BPI_BUS6) MODE2() MODE3() PUPD
+GPIO21= MODE0(GPIO21) MODE1(BPI_BUS7) MODE2() MODE3() PUPD
+GPIO22= MODE0(GPIO22) MODE1(BPI_BUS8) MODE2() MODE3() PUPD
+GPIO23= MODE0(GPIO23) MODE1(BPI_BUS9) MODE2(BSI_CS1) MODE3() PUPD
+GPIO24= MODE0(GPIO24) MODE1(LSCK) MODE2(DSP_GPO2) MODE3(IRQ0) PUPD
+GPIO25= MODE0(GPIO25) MODE1(LSA0) MODE2(DSP_GPO3) MODE3(IRQ1) PUPD
+GPIO26= MODE0(GPIO26) MODE1(LSDA) MODE2(CLKM1) MODE3(TDTIRQ) PUPD
+GPIO27= MODE0(GPIO27) MODE1(LSCE0B) MODE2(CLKM2) MODE3(TCTIRQ2) PUPD
+GPIO28= MODE0(GPIO28) MODE1(LSCE1B) MODE2(LPCE2B) MODE3(TCTIRQ1) PUPD
+GPIO29= MODE0(GPIO29) MODE1(LPCE1B) MODE2(NCE1B) MODE3(TEVTVAL) PUPD
+GPIO30= MODE0(GPIO30) MODE1(LPTE) MODE2() MODE3() PUPD
+GPIO31= MODE0(GPIO31) MODE1(NLD17) MODE2() MODE3() PUPD
+GPIO32= MODE0(GPIO32) MODE1(NLD16) MODE2() MODE3() PUPD
+GPIO33= MODE0(GPIO33) MODE1(NRNB) MODE2() MODE3() PUPD
+GPIO34= MODE0(GPIO34) MODE1(NCLE) MODE2() MODE3() PUPD
+GPIO35= MODE0(GPIO35) MODE1(NALE) MODE2() MODE3() PUPD
+GPIO36= MODE0(GPIO36) MODE1(NWEB) MODE2() MODE3() PUPD
+GPIO37= MODE0(GPIO37) MODE1(NREB) MODE2() MODE3() PUPD
+GPIO38= MODE0(GPIO38) MODE1(NCE0B) MODE2() MODE3() PUPD
+GPIO39= MODE0(GPIO39) MODE1(PWM0) MODE2() MODE3() PUPD
+GPIO40= MODE0(GPIO40) MODE1(PWM1) MODE2(BSI_RFIN) MODE3() PUPD
+GPIO41= MODE0(GPIO41) MODE1(SRCLKENA) MODE2() MODE3() PUPD
+GPIO42= MODE0(GPIO42) MODE1(SRCLKENAN) MODE2() MODE3() PUPD
+GPIO43= MODE0(GPIO43) MODE1(SRCLKENAI) MODE2() MODE3() PUPD
+GPIO44= MODE0(GPIO44) MODE1(EINT3) MODE2() MODE3(IRQ2) PUPD
+GPIO45= MODE0(GPIO45) MODE1(EINT4) MODE2() MODE3(CLKM3) PUPD
+GPIO46= MODE0(GPIO46) MODE1(EINT5) MODE2(EDICK) MODE3() PUPD
+GPIO47= MODE0(GPIO47) MODE1(EINT6) MODE2(EDIWS) MODE3() PUPD
+GPIO48= MODE0(GPIO48) MODE1(EINT7) MODE2(EDIDAT) MODE3() PUPD
+GPIO49= MODE0(GPIO49) MODE1(UCTS1) MODE2(UCTS2) MODE3() PUPD
+GPIO50= MODE0(GPIO50) MODE1(URTS1) MODE2(URTS2) MODE3() PUPD
+GPIO51= MODE0(GPIO51) MODE1(URXD2) MODE2(UCTS3) MODE3() PUPD
+GPIO52= MODE0(GPIO52) MODE1(UTXD2) MODE2(URTS3) MODE3() PUPD
+GPIO53= MODE0(GPIO53) MODE1(URXD3) MODE2(IRDA_RXD) MODE3() PUPD
+GPIO54= MODE0(GPIO54) MODE1(UTXD3) MODE2(IRDA_TXD) MODE3() PUPD
+GPIO55= MODE0(GPIO55) MODE1(KCOL7) MODE2(IRDA_PDN) MODE3() PUPD
+GPIO56= MODE0(GPIO56) MODE1(KCOL6) MODE2() MODE3() PUPD
+GPIO57= MODE0(GPIO57) MODE1(KROW7) MODE2(CLKM4) MODE3() PUPD
+GPIO58= MODE0(GPIO58) MODE1(KROW6) MODE2() MODE3() PUPD
+GPIO59= MODE0(GPIO59) MODE1(DAICLK) MODE2() MODE3() PUPD
+GPIO60= MODE0(GPIO60) MODE1(DAIPCMOUT) MODE2() MODE3() PUPD
+GPIO61= MODE0(GPIO61) MODE1(DAIPCMIN) MODE2() MODE3() PUPD
+GPIO62= MODE0(GPIO62) MODE1(DAIRST) MODE2() MODE3() PUPD
+GPIO63= MODE0(GPIO63) MODE1(DAISYNC) MODE2() MODE3() PUPD
+GPIO64= MODE0(GPIO64) MODE1(EA26) MODE2(CLKM5) MODE3() PUPD
+GPIO65= MODE0(GPIO65) MODE1(EADMUX) MODE2(CLKM6) MODE3() PUPD
+GPIO66= MODE0(GPIO66) MODE1(NFIQ) MODE2(CLKM7) MODE3() PUPD
+GPIO67= MODE0(GPIO67) MODE1(MCCM0) MODE2() MODE3(TDMA_CK) PUPD
+GPIO68= MODE0(GPIO68) MODE1(MCDA0) MODE2() MODE3(TDMA_D1) PUPD
+GPIO69= MODE0(GPIO69) MODE1(MCDA1) MODE2() MODE3(TDMA_D0) PUPD
+GPIO70= MODE0(GPIO70) MODE1(MCDA2) MODE2() MODE3(TDMA_FS) PUPD
+GPIO71= MODE0(GPIO71) MODE1(MCDA3) MODE2() MODE3() PUPD
+GPIO72= MODE0(GPIO72) MODE1(MCCK) MODE2() MODE3() PUPD
+GPIO73= MODE0(GPIO73) MODE1(MCPWRON) MODE2(CLKM8) MODE3() PUPD
+GPIO74= MODE0(GPIO74) MODE1(MCWP) MODE2(CLKM9) MODE3() PUPD
+GPIO75= MODE0(GPIO75) MODE1(MCINS) MODE2() MODE3() PUPD
+GPIO76 = MODE0(GPIO76) MODE1(SCLK2) MODE2() MODE3() Z
+GPIO77 = MODE0(GPIO77) MODE1(SIO2) MODE2() MODE3() Z
+GPIO78 = MODE0(GPIO78) MODE1(SRST2) MODE2() MODE3() Z
+
+[GPO]
+
+[EINT]
+EINT_COUNT=8
+EINT_DEBOUNCE_TIME_COUNT=8
+
+[ADC]
+ADC_COUNT=7
+
+[KEYPAD]
+KEY_ROW=8
+KEY_COLUMN=9
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6236.fig b/mcu/custom/driver/drv/Drv_Tool/MT6236.fig
new file mode 100644
index 0000000..2073e49
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6236.fig
@@ -0,0 +1,86 @@
+[Chip Type]
+Chip = MT6236
+GPIO_Pull_Sel=1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(BPI_BUS0) MODE2() MODE3() PD
+GPIO1 = MODE0(GPIO1) MODE1(BPI_BUS1) MODE2() MODE3() PD
+GPIO2 = MODE0(GPIO2) MODE1(BPI_BUS2) MODE2() MODE3() PD
+GPIO3 = MODE0(GPIO3) MODE1(BPI_BUS3) MODE2() MODE3() PD
+GPIO4 = MODE0(GPIO4) MODE1(BPI_BUS4) MODE2() MODE3() PD
+GPIO5 = MODE0(GPIO5) MODE1(BPI_BUS5) MODE2() MODE3() PD
+GPIO6 = MODE0(GPIO6) MODE1(BPI_BUS6) MODE2() MODE3() PD
+GPIO7 = MODE0(GPIO7) MODE1(BPI_BUS7) MODE2() MODE3() PD
+GPIO8 = MODE0(GPIO8) MODE1(BPI_BUS8) MODE2(CLKM0) MODE3(MC0INS) PD
+GPIO9 = MODE0(GPIO9) MODE1(BPI_BUS9) MODE2() MODE3() PD
+GPIO10 = MODE0(GPIO10) MODE1(SPI_CS_N) MODE2(MC1CM0) MODE3(MC0DA7) PU
+GPIO11 = MODE0(GPIO11) MODE1(SPI_SCK) MODE2(MC1DA0) MODE3(MC0DA6) PU
+GPIO12 = MODE0(GPIO12) MODE1(SPI_MOSI) MODE2(MC1CK) MODE3(MC0DA5) PU
+GPIO13 = MODE0(GPIO13) MODE1(SPI_MISO) MODE2(MC1DA1) MODE3(MC0DA4) PU
+GPIO14 = MODE0(GPIO14) MODE1(KCOL7) MODE2(EDICK) MODE3(LPCE2B) PU
+GPIO15 = MODE0(GPIO15) MODE1(KCOL6) MODE2(EDIWS) MODE3(BT2WIFI_0) PU
+GPIO16 = MODE0(GPIO16) MODE1(KROW7) MODE2(EDIDAT) MODE3(URXD3) PD
+GPIO17 = MODE0(GPIO17) MODE1(KROW6) MODE2(CLKM1) MODE3(UTXD3) PD
+GPIO18 = MODE0(GPIO18) MODE1(CMRST) MODE2(D2_TID0) MODE3(D1ICK) PD
+GPIO19 = MODE0(GPIO19) MODE1(CMPDN) MODE2(D2_TID1) MODE3(D1ID) PD
+GPIO20 = MODE0(GPIO20) MODE1(CMVREF) MODE2(CLKM3) MODE3(D1IMS) PD
+GPIO21 = MODE0(GPIO21) MODE1(CMHREF) MODE2(D1_TID0) MODE3(D2ICK) PD
+GPIO22 = MODE0(GPIO22) MODE1(CMPCLK) MODE2(D1_TID1) MODE3(D2ID) PD
+GPIO23 = MODE0(GPIO23) MODE1(CMMCLK) MODE2(debug0) MODE3(D2IMS) PD
+GPIO24 = MODE0(GPIO24) MODE1(CMDAT9) MODE2(debug1) MODE3(TDTIRQ) PD
+GPIO25 = MODE0(GPIO25) MODE1(CMDAT8) MODE2(debug2) MODE3(TCTIRQ1) PD
+GPIO26 = MODE0(GPIO26) MODE1(CMDAT7) MODE2(debug3) MODE3(TBTXEN) PD
+GPIO27 = MODE0(GPIO27) MODE1(CMDAT6) MODE2(debug4) MODE3(TBTXFS) PD
+GPIO28 = MODE0(GPIO28) MODE1(CMFLASH) MODE2(debug5) MODE3(TBRXEN) PD
+GPIO29 = MODE0(GPIO29) MODE1(SCL) MODE2(debug6) MODE3(TBRXFS) PU
+GPIO30 = MODE0(GPIO30) MODE1(SDA) MODE2(debug7) MODE3(TCTIRQ2) PU
+GPIO31 = MODE0(GPIO31) MODE1(LSA0) MODE2(URXD2) MODE3(CLKM3) PD
+GPIO32 = MODE0(GPIO32) MODE1(LSCK) MODE2(UTXD2) MODE3(CLKM4) PD
+GPIO33 = MODE0(GPIO33) MODE1(LSDA) MODE2(CAM_STROBE) MODE3(LPCE2B) PD
+GPIO34 = MODE0(GPIO34) MODE1(LPCE1B) MODE2(LSCE0B) MODE3() PU
+GPIO35 = MODE0(GPIO35) MODE1(LPCE0B) MODE2(LSCE1B) MODE3() PU
+GPIO36 = MODE0(GPIO36) MODE1(LPTE) MODE2(CLKM2) MODE3(TEVTVAL) PD
+GPIO37 = MODE0(GPIO37) MODE1(NLD17) MODE2(CAM_MECH0) MODE3() PD
+GPIO38 = MODE0(GPIO38) MODE1(NLD16) MODE2(CAM_MECH1) MODE3() PD
+GPIO39 = MODE0(GPIO39) MODE1(URXD3) MODE2(UCTS2) MODE3(D2_TID4) PU
+GPIO40 = MODE0(GPIO40) MODE1(UTXD3) MODE2(URTS2) MODE3(D2_TID5) PU
+GPIO41 = MODE0(GPIO41) MODE1(EINT0) MODE2(CLKM4) MODE3(D2_TID6) PU
+GPIO42 = MODE0(GPIO42) MODE1(EINT1) MODE2(EDICK) MODE3(CLKM5) PU
+GPIO43 = MODE0(GPIO43) MODE1(EINT2) MODE2(EDIWS) MODE3(UTXD1) PU
+GPIO44 = MODE0(GPIO44) MODE1(EINT3) MODE2(EDIDAT) MODE3(URXD1) PU
+GPIO45 = MODE0(GPIO45) MODE1(URXD2) MODE2(UCTS3) MODE3(D2_TID2) PU
+GPIO46 = MODE0(GPIO46) MODE1(UTXD2) MODE2(URTS3) MODE3(D2_TID3) PU
+GPIO47 = MODE0(GPIO47) MODE1(DAICLK) MODE2(EDIDAT) MODE3(MC1CK) PD
+GPIO48 = MODE0(GPIO48) MODE1(DAIPCMOUT) MODE2(EDICK) MODE3(MC1CM0) PD
+GPIO49 = MODE0(GPIO49) MODE1(DAIPCMIN) MODE2(EDIWS) MODE3(MC1DA0) PD
+GPIO50 = MODE0(GPIO50) MODE1(DAIRST) MODE2(LPCE2B) MODE3(MC1INS) PD
+GPIO51 = MODE0(GPIO51) MODE1(DAISYNC) MODE2(MC1DA1) MODE3(NCE1B) PD
+GPIO52 = MODE0(GPIO52) MODE1(EINT4) MODE2(UCTS1) MODE3(TDMA_D1) PU
+GPIO53 = MODE0(GPIO53) MODE1(EINT5) MODE2(URTS1) MODE3(TDMA_CK) PU
+GPIO54 = MODE0(GPIO54) MODE1(EINT6) MODE2(LPCE1B) MODE3(TDMA_D0) PU
+GPIO55 = MODE0(GPIO55) MODE1(IRDA_TXD) MODE2(PWM3) MODE3(TDMA_FS) PU
+GPIO56 = MODE0(GPIO56) MODE1(IRDA_RXD) MODE2(PWM4) MODE3(UCTS1) PU
+GPIO57 = MODE0(GPIO57) MODE1(IRDA_PDN) MODE2(PWM5) MODE3(URTS1) PU
+GPIO58 = MODE0(GPIO58) MODE1(UTXD1) MODE2(CLKM4) MODE3(ARM7_JTRST_B) PU
+GPIO59 = MODE0(GPIO59) MODE1(PWM3) MODE2(URXD2) MODE3(ARM7_JTCK) PD
+GPIO60 = MODE0(GPIO60) MODE1(PWM4) MODE2(UTXD2) MODE3(ARM7_JTDI) PD
+GPIO61 = MODE0(GPIO61) MODE1(PWM5) MODE2(URXD3) MODE3(ARM7_JTMS) PD
+GPIO62 = MODE0(GPIO62) MODE1(PWM6) MODE2(UTXD3) MODE3(ARM7_JTDO) PD
+GPIO63 = MODE0(GPIO63) MODE1(CLKM5) MODE2(WIFI2BT) MODE3(ARM7_JRTCK) PD
+GPIO64 = MODE0(GPIO64) MODE1(URXD1) MODE2(BT2WIFI_0) MODE3(SRCLKENAI) PU
+GPIO65 = MODE0(GPIO65) MODE1(IO_SIM2) MODE2() MODE3() PD
+GPIO66 = MODE0(GPIO66) MODE1(CLK_SIM2) MODE2() MODE3() PD
+GPIO67 = MODE0(GPIO67) MODE1(RST_SIM2) MODE2() MODE3() PD
+
+[GPO]
+
+[EINT]
+EINT_COUNT=11
+EINT_DEBOUNCE_TIME_COUNT=11
+
+[ADC]
+ADC_COUNT=8
+
+[KEYPAD]
+KEY_ROW=8
+KEY_COLUMN=9
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6238.fig b/mcu/custom/driver/drv/Drv_Tool/MT6238.fig
new file mode 100644
index 0000000..9f16620
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6238.fig
@@ -0,0 +1,103 @@
+[Chip Type]
+Chip = MT6238
+GPIO_Pull_Sel=1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(CMRST) MODE2(DRF_DATA) MODE3(D1_TID0) PU
+GPIO1 = MODE0(GPIO1) MODE1(CMPDN) MODE2(DRF_EN) MODE3(D1_TID1) PU
+GPIO2 = MODE0(GPIO2) MODE1(CMDAT1) MODE2(D2_TID0) MODE3(D1ICK) PU
+GPIO3 = MODE0(GPIO3) MODE1(CMDAT0) MODE2(D2_TID1) MODE3(D1ID) PU
+GPIO4 = MODE0(GPIO4) MODE1(CMFLASH) MODE2(D2_TID2) MODE3(D1IMS) PD
+GPIO5 = MODE0(GPIO5) MODE1(SCL) MODE2(D2_TID3) MODE3(D2ICK) PU
+GPIO6 = MODE0(GPIO6) MODE1(SDA) MODE2(D2_TID4) MODE3(D2ID) PU
+GPIO7 = MODE0(GPIO7) MODE1(PWM2) MODE2(D2_TID5) MODE3(D2IMS) PU
+GPIO8 = MODE0(GPIO8) MODE1(PWM3) MODE2(D2_TID6) MODE3(CLKM3) PU
+GPIO9 = MODE0(GPIO9) MODE1(BPI_BUS3) MODE2() MODE3() PD
+GPIO10= MODE0(GPIO10) MODE1(BPI_BUS6) MODE2() MODE3() PD
+GPIO11= MODE0(GPIO11) MODE1(BPI_BUS7) MODE2() MODE3() PD
+GPIO12= MODE0(GPIO12) MODE1(BPI_BUS8) MODE2() MODE3() PD
+GPIO13= MODE0(GPIO13) MODE1(BPI_BUS9) MODE2(BSI_CS1) MODE3() PD
+GPIO14= MODE0(GPIO14) MODE1(LSCK) MODE2(TDMA_CK) MODE3() PU
+GPIO15= MODE0(GPIO15) MODE1(LSA0) MODE2(TDMA_D1) MODE3(TDTIRQ) PU
+GPIO16= MODE0(GPIO16) MODE1(LSDA) MODE2(TDMA_D0) MODE3(TCTIRQ2) PU
+GPIO17= MODE0(GPIO17) MODE1(LSCE0B) MODE2(TDMA_FS) MODE3(TCTIRQ1) PU
+GPIO18= MODE0(GPIO18) MODE1(LSCE1B) MODE2(LPCE2B) MODE3(TEVTVAL) PU
+GPIO19= MODE0(GPIO19) MODE1(LPCE1B) MODE2(NCE1B) MODE3() PU
+GPIO20= MODE0(GPIO20) MODE1(NLD17) MODE2() MODE3() PD
+GPIO21= MODE0(GPIO21) MODE1(NLD16) MODE2() MODE3() PD
+GPIO22= MODE0(GPIO22) MODE1(NRNB) MODE2() MODE3() PU
+GPIO23= MODE0(GPIO23) MODE1(NCLE) MODE2() MODE3() PD
+GPIO24= MODE0(GPIO24) MODE1(NALE) MODE2() MODE3() PD
+GPIO25= MODE0(GPIO25) MODE1(NWEB) MODE2() MODE3() PU
+GPIO26= MODE0(GPIO26) MODE1(NREB) MODE2() MODE3() PU
+GPIO27= MODE0(GPIO27) MODE1(NCE0B) MODE2() MODE3() PU
+GPIO28= MODE0(GPIO28) MODE1(PWM0) MODE2() MODE3() PD
+GPIO29= MODE0(GPIO29) MODE1(PWM1) MODE2(BSI_RFIN) MODE3() PD
+GPIO30= MODE0(GPIO30) MODE1(SRCLKENA) MODE2() MODE3() PU
+GPIO31= MODE0(GPIO31) MODE1(SRCLKENAN) MODE2() MODE3(EDICK) PU
+GPIO32= MODE0(GPIO32) MODE1(SRCLKENAI) MODE2() MODE3() PD
+GPIO33= MODE0(GPIO33) MODE1(EINT3) MODE2(DSP_GPO2) MODE3(TBTXFS) PU
+GPIO34= MODE0(GPIO34) MODE1(EINT4) MODE2(DSP_GPO1) MODE3(TBRXEN) PU
+GPIO35= MODE0(GPIO35) MODE1(EINT5) MODE2(DSP_GPO0) MODE3(TBRXFS) PU
+GPIO36= MODE0(GPIO36) MODE1(EINT6) MODE2(EDIWS) MODE3() PU
+GPIO37= MODE0(GPIO37) MODE1(EINT7) MODE2(EDIDAT) MODE3() PU
+GPIO38= MODE0(GPIO38) MODE1(SPI_CS_N) MODE2(CAM_MECH1) MODE3() PU
+GPIO39= MODE0(GPIO39) MODE1(SPI_SCK) MODE2(MC1DA1) MODE3(CAM_STROBE) PD
+GPIO40= MODE0(GPIO40) MODE1(SPI_MOSI) MODE2() MODE3() PU
+GPIO41= MODE0(GPIO41) MODE1(SPI_MISO) MODE2(MIRQ) MODE3() PU
+GPIO42= MODE0(GPIO42) MODE1(UCTS1) MODE2() MODE3(UCTS2) PU
+GPIO43= MODE0(GPIO43) MODE1(URTS1) MODE2() MODE3(URTS2) PU
+GPIO44= MODE0(GPIO44) MODE1(URXD2) MODE2(UCTS3) MODE3() PU
+GPIO45= MODE0(GPIO45) MODE1(UTXD2) MODE2(URTS3) MODE3() PU
+GPIO46= MODE0(GPIO46) MODE1(URXD3) MODE2(UCTS2) MODE3() PU
+GPIO47= MODE0(GPIO47) MODE1(UTXD3) MODE2(URTS2) MODE3() PU
+GPIO48= MODE0(GPIO48) MODE1(KCOL7) MODE2() MODE3() PU
+GPIO49= MODE0(GPIO49) MODE1(KCOL6) MODE2() MODE3() PU
+GPIO50= MODE0(GPIO50) MODE1(KROW7) MODE2(CLKM6) MODE3() PU
+GPIO51= MODE0(GPIO51) MODE1(KROW6) MODE2() MODE3() PU
+GPIO52= MODE0(GPIO52) MODE1(DAICLK) MODE2() MODE3() PD
+GPIO53= MODE0(GPIO53) MODE1(DAIPCMOUT) MODE2() MODE3() PD
+GPIO54= MODE0(GPIO54) MODE1(DAIPCMIN) MODE2() MODE3() PD
+GPIO55= MODE0(GPIO55) MODE1(DAIRST) MODE2(CLKM7) MODE3() PD
+GPIO56= MODE0(GPIO56) MODE1(DAISYNC) MODE2() MODE3() PD
+GPIO57= MODE0(GPIO57) MODE1(EA26) MODE2(CLKM0) MODE3() PU
+GPIO58= MODE0(GPIO58) MODE1(EADMUX) MODE2(CLKM1) MODE3() PD
+GPIO59= MODE0(GPIO59) MODE1(MC0CM0) MODE2() MODE3() PU
+GPIO60= MODE0(GPIO60) MODE1(MC0DA0) MODE2() MODE3() PU
+GPIO61= MODE0(GPIO61) MODE1(MC0DA1) MODE2() MODE3() PU
+GPIO62= MODE0(GPIO62) MODE1(MC0DA2) MODE2() MODE3() PU
+GPIO63= MODE0(GPIO63) MODE1(MC0DA3) MODE2() MODE3() PD
+GPIO64= MODE0(GPIO64) MODE1(MC0CK) MODE2() MODE3() PU
+GPIO65= MODE0(GPIO65) MODE1(MC0PWRON) MODE2(CLKM2) MODE3() PU
+GPIO66= MODE0(GPIO66) MODE1(MC0WP) MODE2() MODE3() PU
+GPIO67= MODE0(GPIO67) MODE1(MC0INS) MODE2() MODE3() PU
+GPIO68= MODE0(GPIO68) MODE1(MC1CM0) MODE2(MC0DA7) MODE3() PU
+GPIO69= MODE0(GPIO69) MODE1(MC1DA0) MODE2(MC0DA6) MODE3() PU
+GPIO70= MODE0(GPIO70) MODE1(MC1CK) MODE2(MC0DA5) MODE3() PU
+GPIO71= MODE0(GPIO71) MODE1(MC1PWRON) MODE2(MC0DA4) MODE3() PU
+GPIO72= MODE0(GPIO72) MODE1(MC1WP) MODE2() MODE3() PU
+GPIO73= MODE0(GPIO73) MODE1(MC1INS) MODE2() MODE3() PU
+GPIO74= MODE0(GPIO74) MODE1(PAD_SIO2) MODE2() MODE3() PU
+GPIO75= MODE0(GPIO75) MODE1(PAD_SRST2) MODE2() MODE3() PU
+GPIO76= MODE0(GPIO76) MODE1(PAD_SCLK2) MODE2() MODE3() PU
+GPIO77= MODE0(GPIO77) MODE1(EINT0) MODE2(CLKM4) MODE3() PU
+GPIO78= MODE0(GPIO78) MODE1(EINT1) MODE2(CLKM5) MODE3() PU
+GPIO79= MODE0(GPIO79) MODE1(EINT2) MODE2(DSP_GPO3) MODE3(TBTXEN) PU
+GPIO80= MODE0(GPIO80) MODE1(LPTE) MODE2() MODE3() PD
+GPIO81= MODE0(GPIO81) MODE1(IRDA_TXD) MODE2() MODE3() PU
+GPIO82= MODE0(GPIO82) MODE1(IRDA_RXD) MODE2() MODE3() PD
+GPIO83= MODE0(GPIO83) MODE1(IRDA_PDN) MODE2() MODE3() PD
+GPIO84= MODE0(GPIO84) MODE1(USB_DRVVBUS) MODE2() MODE3() PD
+
+[GPO]
+
+[EINT]
+EINT_COUNT = 8
+EINT_DEBOUNCE_TIME_COUNT = 8
+
+[ADC]
+ADC_COUNT = 7
+
+[Keypad]
+KEY_ROW = 8
+KEY_COLUMN = 9
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6251.fig b/mcu/custom/driver/drv/Drv_Tool/MT6251.fig
new file mode 100644
index 0000000..c56d8f8
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6251.fig
@@ -0,0 +1,73 @@
+[Chip Type]
+Chip = MT6251
+GPIO_Pull_Sel = 1
+GPIO_ModeNum=8
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(BPI_BUS0) MODE2() MODE3() MODE4(dbg_rf_test_sdatai) MODE5() MODE6(dbg_mon[0]) MODE7(usb_dp_in) PD
+GPIO1 = MODE0(GPIO1) MODE1(BPI_BUS1) MODE2() MODE3() MODE4(dbg_rf_test_en) MODE5() MODE6(dbg_mon[1]) MODE7(usb_dm_in) PD
+GPIO2 = MODE0(GPIO2) MODE1(BPI_BUS2) MODE2() MODE3() MODE4(dbg_rf_test_sclk) MODE5() MODE6(dbg_mon[2]) MODE7(usb_sd_in) PD
+GPIO3 = MODE0(GPIO3) MODE1(BPI_BUS3) MODE2() MODE3() MODE4(dbg_rf_test_auxout) MODE5() MODE6(dbg_mon[3]) MODE7(usb_dp_out) PD
+GPIO4 = MODE0(GPIO4) MODE1(LSDI) MODE2() MODE3() MODE4(dbg_rf_test_dcxodelay) MODE5(D1ID) MODE6(dbg_mon[4]) MODE7(usb_dm_out) PU
+GPIO5 = MODE0(GPIO5) MODE1(LSDA) MODE2() MODE3() MODE4(dbg_rf_test_enext) MODE5(D1ICK) MODE6(dbg_mon[5]) MODE7(usb_out_en_b) PU
+GPIO6 = MODE0(GPIO6) MODE1(LSCE0B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO7 = MODE0(GPIO7) MODE1(LRSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO8 = MODE0(GPIO8) MODE1(URXD2) MODE2(UCTS1) MODE3(LSA0) MODE4(dbg_rf_test_enbt) MODE5() MODE6(CLKSQ_SEL) MODE7(usb_suspend) PU
+GPIO9 = MODE0(GPIO9) MODE1(EINT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO10 = MODE0(GPIO10) MODE1(URTS1) MODE2(SDA) MODE3() MODE4(dbg_rf_test_enbb) MODE5() MODE6() MODE7() PU
+GPIO11 = MODE0(GPIO11) MODE1(UTXD1) MODE2(SCL) MODE3(PWM1) MODE4(dbg_rf_test_sdatao) MODE5() MODE6() MODE7() PU
+GPIO12 = MODE0(GPIO12) MODE1(UTXD2) MODE2(URTS1) MODE3(LCD_TE) MODE4(dbg_rf_test_sdatai) MODE5() MODE6(dbg_mon[6]) MODE7() PU
+GPIO13 = MODE0(GPIO13) MODE1(URXD1) MODE2(PWM0) MODE3() MODE4(dbg_rf_test_en) MODE5() MODE6() MODE7() PU
+GPIO14 = MODE0(GPIO14) MODE1(UCTS1) MODE2(SCL) MODE3(URXD2) MODE4(dbg_rf_test_sclk) MODE5() MODE6() MODE7() PU
+GPIO15 = MODE0(GPIO15) MODE1(KCOL2) MODE2(SDA) MODE3(UTXD2) MODE4(dbg_fm_ids_out[0]) MODE5(D1IMS) MODE6(dbg_mon[6]) MODE7(CLKSW_ABIST_HMON_DATA[3]) PU
+GPIO16 = MODE0(GPIO16) MODE1(KROW0) MODE2(tdma_evtval) MODE3(UCTS2) MODE4(dbg_fm_ids_out[1]) MODE5(D2ID) MODE6(dbg_mon[8]) MODE7(CLKSW_ABIST_HMON_DATA[2]) PD
+GPIO17 = MODE0(GPIO17) MODE1(KROW3) MODE2(tdma_dtirq_f) MODE3() MODE4(dbg_fm_ids_out[2]) MODE5(D2ICK) MODE6(dbg_mon[9]) MODE7(CLKSW_ABIST_HMON_DATA[1]) PD
+GPIO18 = MODE0(GPIO18) MODE1(KCOL1) MODE2(ctirq1_irq_b) MODE3(daiclk) MODE4(dbg_fm_ids_out[3]) MODE5(D2IMS) MODE6(dbg_mon[10]) MODE7(CLKSW_ABIST_HMON_DATA[0]) PU
+GPIO19 = MODE0(GPIO19) MODE1(KROW4) MODE2(ctirq2_irq_b) MODE3(EDIDAT) MODE4(dbg_fm_ids_out[4]) MODE5(D1_TID0) MODE6(dbg_mon[11]) MODE7(CLKSW_ABIST_LMON_DATA[3]) PD
+GPIO20 = MODE0(GPIO20) MODE1(KCOL0) MODE2(tdma_btxen) MODE3(EDICK) MODE4(dbg_fm_ids_out[5]) MODE5(D1_TID1) MODE6(dbg_mon[12]) MODE7(CLKSW_ABIST_LMON_DATA[2]) PU
+GPIO21 = MODE0(GPIO21) MODE1(KCOL3) MODE2(tdma_btxfs) MODE3(EDIWS) MODE4(dbg_fm_ids_out[6]) MODE5(D2_TID0) MODE6(dbg_mon[13]) MODE7(CLKSW_ABIST_LMON_DATA[1]) PU
+GPIO22 = MODE0(GPIO22) MODE1(KCOL4) MODE2(URTS2) MODE3(daipcmout) MODE4(dbg_fm_ids_out[7]) MODE5(D2_TID1) MODE6(tdma_sdat[0]) MODE7(CLKSW_ABIST_LMON_DATA[0]) PU
+GPIO23 = MODE0(GPIO23) MODE1(KROW1) MODE2(clock_off) MODE3(daipcmin) MODE4(dbg_fm_ids_out[8]) MODE5(D2_TID2) MODE6(tdma_sdat[1]) MODE7(MIXED_ABIST_HMON_DATA[3]) PD
+GPIO24 = MODE0(GPIO24) MODE1(KROW2) MODE2(mdsrclkena) MODE3(dairst) MODE4(dbg_fm_ids_out[9]) MODE5(D2_TID3) MODE6(tdma_fs) MODE7(MIXED_ABIST_HMON_DATA[2]) PD
+GPIO25 = MODE0(GPIO25) MODE1(KROW5) MODE2(SRCLKENAI) MODE3(daisync) MODE4(dbg_fm_ids_out[10]) MODE5(D2_TID4) MODE6(tdma_ck) MODE7(MIXED_ABIST_HMON_DATA[1]) PD
+GPIO26 = MODE0(GPIO26) MODE1(EINT1) MODE2(tdma_brxen) MODE3(BPI_BUS4) MODE4(dbg_fm_ids_out[11]) MODE5(D2_TID5) MODE6(dbg_mon[14]) MODE7() PU
+GPIO27 = MODE0(GPIO27) MODE1(JRTCK) MODE2(tdma_brxfs) MODE3(BPI_BUS5) MODE4(dbg_fm_ids_out[12]) MODE5(D2_TID6) MODE6(dbg_mon[15]) MODE7(MIXED_ABIST_HMON_DATA[0]) PD
+GPIO28 = MODE0(GPIO28) MODE1(MC0CK) MODE2(CLKM0) MODE3() MODE4() MODE5() MODE6() MODE7(MIXED_ABIST_LMON_DATA[3]) PD
+GPIO29 = MODE0(GPIO29) MODE1(MC0CM0) MODE2(CLKM1) MODE3() MODE4(dbg_srclkena) MODE5() MODE6() MODE7(MIXED_ABIST_LMON_DATA[2]) PD
+GPIO30 = MODE0(GPIO30) MODE1(MC0DA0) MODE2(CLKM2) MODE3() MODE4() MODE5() MODE6() MODE7(MIXED_ABIST_LMON_DATA[1]) PD
+GPIO31 = MODE0(GPIO31) MODE1(JRTCK) MODE2(CLKM3) MODE3(LSA0) MODE4() MODE5() MODE6() MODE7(MIXED_ABIST_LMON_DATA[0]) PD
+GPIO32 = MODEGPIO(GPIO32) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO33 = MODEGPIO(GPIO33) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO34 = MODEGPIO(GPIO34) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO35 = NONGPIO(GPIO35) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO36 = NONGPIO(GPIO36) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO37 = NONGPIO(GPIO37) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO38 = NONGPIO(GPIO38) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+
+
+[GPO]
+
+[EINT]
+EINT_COUNT = 2
+EINT_DEBOUNCE_TIME_COUNT = 2
+
+[EINT_EX_PIN]
+0
+1
+
+[ADC]
+ADC_COUNT=3
+
+[ADC_INT_CH]
+0 = ADC_VBAT
+1 = ADC_VISENSE
+2 = ADC_VCHARGER
+
+[ADC_EX_CH]
+6
+7
+8
+
+[KEYPAD]
+KEY_ROW = 6
+KEY_COLUMN = 9
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6252.fig b/mcu/custom/driver/drv/Drv_Tool/MT6252.fig
new file mode 100644
index 0000000..bcd9778
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6252.fig
@@ -0,0 +1,121 @@
+[Chip Type]
+Chip = MT6252
+GPIO_Pull_Sel=1
+GPIO_ModeNum=8
+GPIO_Extend_Config=1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(PWM) MODE2(CLKSQ_SEL) MODE3(MCWP) MODE4(emi_ed0) MODE5(sf_debug_out0) MODE6(usb_debug_out0) MODE7(usb_debug_out8) PUPD
+GPIO1 = MODE0(GPIO1) MODE1(KCOL6) MODE2(EINT4) MODE3(CLKO0) MODE4(emi_ed1) MODE5(sf_debug_out3) MODE6(usb_debug_out1) MODE7(usb_debug_out9) PUPD
+GPIO2 = MODE0(GPIO2) MODE1(KCOL5) MODE2(TDMA_EVTVAL) MODE3(CAM_SDA) MODE4(emi_ed2) MODE5(sf_debug_out1) MODE6(MIXEDSYS_MON_DATA0) MODE7() PUPD
+GPIO3 = MODE0(GPIO3) MODE1(KCOL4) MODE2(TDMA_BTXEN) MODE3(CAM_SCL) MODE4(emi_ed3) MODE5(CLKO1) MODE6() MODE7() PUPD
+GPIO4 = MODE0(GPIO4) MODE1(KCOL3) MODE2(UCTS1_B) MODE3(BSI_CLK) MODE4(emi_ed4) MODE5(sf_debug_out2) MODE6(MIXEDSYS_MON_DATA0) MODE7(DBG_RF_TEST_AUXOUT_O) PUPD
+GPIO5 = MODE0(GPIO5) MODE1(KCOL2) MODE2(TDMA_CTIRQ2_B) MODE3(D1_ID) MODE4(emi_ed5) MODE5(URXD3) MODE6() MODE7() PUPD
+GPIO6 = MODE0(GPIO6) MODE1(KCOL1) MODE2(TDMA_CTIRQ1_B) MODE3(D1_ICK) MODE4(emi_ed6) MODE5(EDICK) MODE6(usb_debug_out2) MODE7(usb_debug_out10) PUPD
+GPIO7 = MODE0(GPIO7) MODE1(KCOL0) MODE2(TDMA_DTIRQ_B) MODE3(D1_IMS) MODE4(emi_ed7) MODE5(sf_debug_out4) MODE6(usb_debug_out3) MODE7(usb_debug_out11) PUPD
+GPIO8 = MODE0(GPIO8) MODE1(KROW5) MODE2(EINT5) MODE3(CLKO3) MODE4(emi_ed8) MODE5(EDIDAT) MODE6(MIXEDSYS_MON_DATA1) MODE7() PUPD
+GPIO9 = MODE0(GPIO9) MODE1(KROW4) MODE2(TDMA_SDAT0) MODE3(SRCLKENA) MODE4(emi_ed9) MODE5(EDIWS) MODE6() MODE7() PUPD
+GPIO10 = MODE0(GPIO10) MODE1(KROW3) MODE2(URTS1_B) MODE3(BSI_EN) MODE4(LSA0) MODE5(sf_debug_out5) MODE6(MIXEDSYS_MON_DATA1) MODE7(DBG_RF_TEST_EN_DCXO_O) PUPD
+GPIO11 = MODE0(GPIO11) MODE1(KROW2) MODE2(TDMA_BTXFS) MODE3(D2_ID) MODE4(LSCK) MODE5(UTXD3) MODE6() MODE7() PUPD
+GPIO12 = MODE0(GPIO12) MODE1(KROW1) MODE2(TDMA_BRXEN) MODE3(D2_ICK) MODE4(LSDA) MODE5() MODE6() MODE7() PUPD
+GPIO13 = MODE0(GPIO13) MODE1(KROW0) MODE2(TDMA_BRXFS) MODE3(D2_IMS) MODE4(LSDI) MODE5(sf_debug_out6) MODE6(usb_debug_out4) MODE7(usb_debug_out12) PUPD
+GPIO14 = MODE0(GPIO14) MODE1(CORE_ECS2_B) MODE2(LPCE0_B) MODE3(LSCE0_B) MODE4(emi_ecs1_b) MODE5() MODE6(SEN2LCM_CS_B) MODE7() PUPD
+GPIO15 = MODE0(GPIO15) MODE1(dai_clk) MODE2(TDMA_SDAT1) MODE3(EDICK) MODE4(emi_ed10) MODE5() MODE6() MODE7() PUPD
+GPIO16 = MODE0(GPIO16) MODE1(dai_pcmout) MODE2(TDMA_FS) MODE3(EDIDAT) MODE4(emi_ed11) MODE5() MODE6() MODE7() PUPD
+GPIO17 = MODE0(GPIO17) MODE1(dai_pcmin) MODE2() MODE3(BSI_DATO) MODE4(emi_ed12) MODE5(sf_debug_out7) MODE6(MIXEDSYS_MON_DATA2) MODE7(DBG_RF_TEST_DCXODELAY_O) PUPD
+GPIO18 = MODE0(GPIO18) MODE1(dai_rstb) MODE2() MODE3(BSI_DATI) MODE4(emi_ed13) MODE5(sf_debug_out8) MODE6(MIXEDSYS_MON_DATA3) MODE7(DBG_RF_TEST_EN_O) PUPD
+GPIO19 = MODE0(GPIO19) MODE1(dai_sync) MODE2(TDMA_CK) MODE3(EDIWS) MODE4(emi_ed14) MODE5() MODE6() MODE7() PUPD
+GPIO20 = MODE0(GPIO20) MODE1(URXD3) MODE2(UCTS2_B) MODE3() MODE4(emi_ea18) MODE5(sf_debug_out10) MODE6(usb_debug_out5) MODE7(usb_debug_out13) PUPD
+GPIO21 = MODE0(GPIO21) MODE1(UTXD3) MODE2(URTS2_B) MODE3() MODE4(emi_ea19) MODE5(sf_debug_out11) MODE6(usb_debug_out6) MODE7(usb_debug_out14) PUPD
+GPIO22 = MODE0(GPIO22) MODE1(URXD2) MODE2(UCTS1_B) MODE3(CAM_SCL) MODE4(emi_ea20) MODE5(sf_debug_out12) MODE6(MIXEDSYS_MON_DATA4) MODE7(DBG_RF_TEST_SCLK_O) PUPD
+GPIO23 = MODE0(GPIO23) MODE1(UTXD2) MODE2(URTS1_B) MODE3(CAM_SDA) MODE4(emi_ea21) MODE5(CLKO2_32K) MODE6(MIXEDSYS_MON_DATA5) MODE7(DBG_RF_TEST_SDATAI_O) PUPD
+GPIO24 = MODE0(GPIO24) MODE1(UCTS1_B) MODE2(CAM_SCL) MODE3(NLD13) MODE4(emi_eub_b) MODE5(EINT5) MODE6() MODE7() PUPD
+GPIO25 = MODE0(GPIO25) MODE1(URTS1_B) MODE2(CAM_SDA) MODE3(NLD14) MODE4(emi_elb_b) MODE5(EINT6) MODE6() MODE7() PUPD
+GPIO26 = MODE0(GPIO26) MODE1(EINT0) MODE2() MODE3(CLKO4) MODE4() MODE5(sf_debug_out14) MODE6(mixedsys_mon_data[6]) MODE7(DBG_RF_TEST_SDATAO_O) PUPD
+GPIO27 = MODE0(GPIO27) MODE1(EINT1) MODE2() MODE3(CLKO3) MODE4() MODE5(sf_debug_out15) MODE6(mixedsys_mon_data[7]) MODE7() PUPD
+GPIO28 = MODE0(GPIO28) MODE1(bpi_bus4) MODE2() MODE3() MODE4(emi_eadv_b) MODE5() MODE6() MODE7() PUPD
+GPIO29 = MODE0(GPIO29) MODE1(SIMIO) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO30 = MODE0(GPIO30) MODE1(SIMCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO31 = MODE0(GPIO31) MODE1(SIMRST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO32 = MODE0(GPIO32) MODE1() MODE2() MODE3() MODE4(emi_ed15) MODE5(sf_debug_out9) MODE6(usb_debug_out7) MODE7(usb_debug_out15) PUPD
+GPIO33 = MODE0(GPIO33) MODE1(CLKO2_32K) MODE2() MODE3(LSCE1B) MODE4(emi_ea16) MODE5() MODE6() MODE7() PUPD
+GPIO34 = MODE0(GPIO34) MODE1(CLKO6) MODE2(SRCLKENA) MODE3() MODE4(emi_ea17) MODE5(sf_debug_out13) MODE6() MODE7() PUPD
+GPIO35 = MODE0(GPIO35) MODE1(SRCLKENAI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO36 = MODE0(GPIO36) MODE1(MCINS) MODE2() MODE3(NLD15) MODE4(emi_erd_b) MODE5(EINT6) MODE6() MODE7() PUPD
+GPIO37 = MODE0(GPIO37) MODE1(MCCK) MODE2() MODE3() MODE4(emi_eclk) MODE5() MODE6() MODE7(DBG_RF_TEST_SCLK_I) PUPD
+GPIO38 = MODE0(GPIO38) MODE1(MCDA0) MODE2() MODE3() MODE4(emi_ewait) MODE5() MODE6() MODE7(DBG_RF_TEST_EN_I) PUPD
+GPIO39 = MODE0(GPIO39) MODE1(MCCM0) MODE2() MODE3() MODE4(emi_ewr_b) MODE5() MODE6() MODE7(DBG_RF_TEST_SDATAI_I) PUPD
+GPIO40 = MODE0(GPIO40) MODE1(LPTE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO41 = MODE0(GPIO41) MODE1(LRSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO42 = NONGPIO() MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO43 = MODE0(GPIO43) MODE1(KCOL7) MODE2(EINT2) MODE3(CLKO2) MODE4(LSCK) MODE5(jrtck) MODE6() MODE7() PUPD
+GPIO44 = MODE0(GPIO44) MODE1(KROW6) MODE2() MODE3() MODE4(LSDA) MODE5() MODE6() MODE7() PUPD
+GPIO45 = MODE0(GPIO45) MODE1(KROW7) MODE2(EINT3) MODE3(CLKO5) MODE4(CAM_SDA) MODE5() MODE6() MODE7() PUPD
+GPIO46 = MODE0(GPIO46) MODE1() MODE2() MODE3() MODE4(jrtck) MODE5() MODE6() MODE7() PUPD
+GPIO47 = MODE0(GPIO47) MODE1(cmdat0) MODE2(CAM_CSD) MODE3(D2_TID0) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO48 = MODE0(GPIO48) MODE1(cmdat1) MODE2(LSDA) MODE3(D2_TID1) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO49 = MODE0(GPIO49) MODE1(cmdat2) MODE2() MODE3(D2_TID2) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO50 = MODE0(GPIO50) MODE1(cmdat3) MODE2() MODE3(D2_TID3) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO51 = MODE0(GPIO51) MODE1(cmdat4) MODE2() MODE3(D2_TID4) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO52 = MODE0(GPIO52) MODE1(cmdat5) MODE2() MODE3(D2_TID5) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO53 = MODE0(GPIO53) MODE1(cmdat6) MODE2() MODE3(D2_TID6) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO54 = MODE0(GPIO54) MODE1(cmdat7) MODE2() MODE3(D1_TID0) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO55 = MODE0(GPIO55) MODE1(cmhref) MODE2() MODE3(D1_TID1) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO56 = MODE0(GPIO56) MODE1(cmvref) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO57 = MODE0(GPIO57) MODE1(cmpdn) MODE2(LSCK) MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO58 = MODE0(GPIO58) MODE1(cmmclk) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO59 = MODE0(GPIO59) MODE1(cmpclk) MODE2(CAM_CSK) MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO60 = MODE0(GPIO60) MODE1(cmrst) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO61 = MODE0(GPIO61) MODE1(EDICK) MODE2() MODE3(BPI_BUS5) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO62 = MODE0(GPIO62) MODE1(EDIDAT) MODE2() MODE3(BPI_BUS6) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO63 = MODE0(GPIO63) MODE1(EDIWS) MODE2() MODE3(BPI_BUS7) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO64 = MODE0(GPIO64) MODE1(SCK) MODE2(LSCK) MODE3(CLKO2_32K) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO65 = MODE0(GPIO65) MODE1(SWP) MODE2(LSA0) MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO66 = MODE0(GPIO66) MODE1(SHOLD) MODE2(LSCE0_B) MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO67 = MODE0(GPIO67) MODE1(SCS) MODE2(LSCE1_B) MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO68 = MODE0(GPIO68) MODE1(SIN) MODE2(LSDI) MODE3(EINT3) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO69 = MODE0(GPIO69) MODE1(SOUT) MODE2(LSDA) MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO70 = MODE0(GPIO70) MODE1() MODE2(EINT4) MODE3(CLKO2_32K) MODE4(CAM_SCL) MODE5() MODE6() MODE7() PUPD
+
+[GPO]
+
+[EINT]
+EINT_COUNT=12
+EINT_DEBOUNCE_TIME_COUNT=12
+
+[EINT_EX_PIN]
+0
+1
+2
+3
+4
+5
+6
+8
+9
+10
+11
+12
+
+[EINT_INT_PIN]
+7 = CHR_USB_EINT_NO
+
+[EINT_INT_TIME_DELAY]
+EINT7 = 40
+
+[ADC]
+ADC_COUNT=3
+
+[ADC_INT_CH]
+0 = ADC_VBAT
+1 = ADC_VISENSE
+2 = ADC_VCHARGER
+
+[ADC_EX_CH]
+3
+4
+5
+
+[KEYPAD]
+KEY_ROW=8
+KEY_COLUMN=9
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6253.fig b/mcu/custom/driver/drv/Drv_Tool/MT6253.fig
new file mode 100644
index 0000000..abdbc8d
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6253.fig
@@ -0,0 +1,103 @@
+[Chip Type]
+Chip = MT6253
+GPIO_Pull_Sel=1
+
+[GPIO]
+
+GPIO0 = MODE0(GPIO0) MODE1(PWM) MODE2(CLKSQ_SEL) MODE3(Alerter) PUPD
+GPIO1 = MODE0(GPIO1) MODE1(KCOL6) MODE2(EINT4) MODE3() PUPD
+GPIO2 = MODE0(GPIO2) MODE1(KCOL5) MODE2() MODE3() PUPD
+GPIO3 = MODE0(GPIO3) MODE1(KCOL4) MODE2(clko1) MODE3() PUPD
+GPIO4 = MODE0(GPIO4) MODE1(KCOL3) MODE2() MODE3() PUPD
+GPIO5 = MODE0(GPIO5) MODE1(KCOL2) MODE2() MODE3() PUPD
+GPIO6 = MODE0(GPIO6) MODE1(KCOL1) MODE2() MODE3() PUPD
+GPIO7 = MODE0(GPIO7) MODE1(KCOL0) MODE2() MODE3() PUPD
+GPIO8 = MODE0(GPIO8) MODE1(KROW5) MODE2(EINT5) MODE3() PUPD
+GPIO9 = MODE0(GPIO9) MODE1(KROW4) MODE2() MODE3(SRCLKENA) PUPD
+GPIO10 = MODE0(GPIO10) MODE1(KROW3) MODE2() MODE3() PUPD
+GPIO11 = MODE0(GPIO11) MODE1(KROW2) MODE2() MODE3() PUPD
+GPIO12 = MODE0(GPIO12) MODE1(KROW1) MODE2() MODE3() PUPD
+GPIO13 = MODE0(GPIO13) MODE1(KROW0) MODE2() MODE3() PUPD
+GPIO14 = MODE0(GPIO14) MODE1(ECS2_B) MODE2(MFIQ) MODE3() PUPD
+GPIO15 = MODE0(GPIO15) MODE1(DAICLK) MODE2(clko5) MODE3() PUPD
+GPIO16 = MODE0(GPIO16) MODE1(DAIPCMOUT) MODE2() MODE3() PUPD
+GPIO17 = MODE0(GPIO17) MODE1() MODE2(DAIPCMIN) MODE3(IRDA_PDN) PUPD
+GPIO18 = MODE0(GPIO18) MODE1(DAIRST) MODE2(clko0) MODE3(IRDA_TX) PUPD
+GPIO19 = MODE0(GPIO19) MODE1(DAISYNC) MODE2(XADMUX) MODE3() PUPD
+GPIO20 = MODE0(GPIO20) MODE1(URXD3) MODE2(UCTS2_B) MODE3() PUPD
+GPIO21 = MODE0(GPIO21) MODE1(UTXD3) MODE2(URTS2_B) MODE3() PUPD
+GPIO22 = MODE0(GPIO22) MODE1(URXD2) MODE2(LCD_TE) MODE3(IRDA_RX) PUPD
+GPIO23 = MODE0(GPIO23) MODE1(UTXD2) MODE2(EDIDAT) MODE3(IRDA_TX) PUPD
+GPIO24 = MODE0(GPIO24) MODE1(UCTS1_B) MODE2(CAM_SCL) MODE3() PUPD
+GPIO25 = MODE0(GPIO25) MODE1(URTS1_B) MODE2(CAM_SDA) MODE3() PUPD
+GPIO26 = MODE0(GPIO26) MODE1(NCEB[0]) MODE2() MODE3() PUPD
+GPIO27 = MODE0(GPIO27) MODE1(NREB) MODE2() MODE3() PUPD
+GPIO28 = MODE0(GPIO28) MODE1(NWEB) MODE2() MODE3() PUPD
+GPIO29 = MODE0(GPIO29) MODE1(NALE) MODE2() MODE3() PUPD
+GPIO30 = MODE0(GPIO30) MODE1(NCLE) MODE2() MODE3() PUPD
+GPIO31 = MODE0(GPIO31) MODE1(NRNB) MODE2() MODE3() PUPD
+GPIO32 = MODE0(GPIO32) MODE1(NLD0) MODE2() MODE3() PUPD
+GPIO33 = MODE0(GPIO33) MODE1(NLD1) MODE2() MODE3() PUPD
+GPIO34 = MODE0(GPIO34) MODE1(NLD2) MODE2() MODE3() PUPD
+GPIO35 = MODE0(GPIO35) MODE1(NLD3) MODE2() MODE3() PUPD
+GPIO36 = MODE0(GPIO36) MODE1(NLD4) MODE2() MODE3() PUPD
+GPIO37 = MODE0(GPIO37) MODE1(NLD5) MODE2() MODE3() PUPD
+GPIO38 = MODE0(GPIO38) MODE1(NLD6) MODE2() MODE3() PUPD
+GPIO39 = MODE0(GPIO39) MODE1(NLD7) MODE2() MODE3() PUPD
+GPIO40 = MODE0(GPIO40) MODE1(NLD8) MODE2(EDICK) MODE3(RF_AUXOUT) PUPD
+GPIO41 = MODE0(GPIO41) MODE1(LWRB) MODE2() MODE3() PUPD
+GPIO42 = MODE0(GPIO42) MODE1(LPA0) MODE2() MODE3(BSI_CLK) PUPD
+GPIO43 = MODE0(GPIO43) MODE1(LRDB) MODE2() MODE3() PUPD
+GPIO44 = MODE0(GPIO44) MODE1(LRSTB) MODE2() MODE3(BSI_EN) PUPD
+GPIO45 = MODE0(GPIO45) MODE1(LPCE0B) MODE2() MODE3(BSI_DATO) PUPD
+GPIO46 = MODE0(GPIO46) MODE1(LPCE1B) MODE2(NCEB[1]) MODE3(BSI_DATI) PUPD
+GPIO47 = MODE0(GPIO47) MODE1(CMDAT0) MODE2() MODE3() PUPD
+GPIO48 = MODE0(GPIO48) MODE1(CMDAT1) MODE2() MODE3() PUPD
+GPIO49 = MODE0(GPIO49) MODE1(CMDAT2) MODE2() MODE3() PUPD
+GPIO50 = MODE0(GPIO50) MODE1(CMDAT3) MODE2() MODE3() PUPD
+GPIO51 = MODE0(GPIO51) MODE1(CMDAT4) MODE2() MODE3() PUPD
+GPIO52 = MODE0(GPIO52) MODE1(CMDAT5) MODE2() MODE3() PUPD
+GPIO53 = MODE0(GPIO53) MODE1(CMDAT6) MODE2() MODE3() PUPD
+GPIO54 = MODE0(GPIO54) MODE1(CMDAT7) MODE2() MODE3() PUPD
+GPIO55 = MODE0(GPIO55) MODE1(CMHREF) MODE2() MODE3() PUPD
+GPIO56 = MODE0(GPIO56) MODE1(CMVREF) MODE2() MODE3() PUPD
+GPIO57 = MODE0(GPIO57) MODE1(CMPDN) MODE2() MODE3() PUPD
+GPIO58 = MODE0(GPIO58) MODE1(CMMCLK) MODE2() MODE3() PUPD
+GPIO59 = MODE0(GPIO59) MODE1(CMPCLK) MODE2() MODE3() PUPD
+GPIO60 = MODE0(GPIO60) MODE1(CMRST) MODE2() MODE3() PUPD
+GPIO61 = MODE0(GPIO61) MODE1(EINT3) MODE2(clko4) MODE3() PUPD
+GPIO62 = MODE0(GPIO62) MODE1(EINT2) MODE2(MIRQ) MODE3(clko3) PUPD
+GPIO63 = MODE0(GPIO63) MODE1(EINT1) MODE2() MODE3() PUPD
+GPIO64 = MODE0(GPIO64) MODE1(EINT0) MODE2() MODE3() PUPD
+GPIO65 = MODE0(GPIO65) MODE1(MCINS) MODE2() MODE3() PUPD
+GPIO66 = MODE0(GPIO66) MODE1(MCWP) MODE2() MODE3() PUPD
+GPIO67 = MODE0(GPIO67) MODE1(MCCK) MODE2() MODE3() PUPD
+GPIO68 = MODE0(GPIO68) MODE1(MCDA3) MODE2() MODE3() PUPD
+GPIO69 = MODE0(GPIO69) MODE1(MCDA2) MODE2() MODE3() PUPD
+GPIO70 = MODE0(GPIO70) MODE1(MCDA1) MODE2() MODE3() PUPD
+GPIO71 = MODE0(GPIO71) MODE1(MCDA0) MODE2() MODE3() PUPD
+GPIO72 = MODE0(GPIO72) MODE1() MODE2() MODE3() PUPD
+GPIO73 = MODE0(GPIO73) MODE1() MODE2() MODE3() PUPD
+GPIO74 = MODE0(GPIO74) MODE1(clko6) MODE2() MODE3(SRCLKENA) PUPD
+GPIO75 = MODE0(GPIO75) MODE1() MODE2() MODE3(clko2) PUPD
+GPIO76 = MODE0(GPIO76) MODE1(IRDA_PDN) MODE2(EINT6) MODE3(EDIWS) PUPD
+GPIO77 = MODE0(GPIO77) MODE1(SRCLKENAI) MODE2() MODE3() PUPD
+GPIO78 = MODE0(GPIO78) MODE1(SCLK2) MODE2() MODE3() Z
+GPIO79 = MODE0(GPIO79) MODE1(SRST2) MODE2() MODE3() Z
+GPIO80 = MODE0(GPIO80) MODE1(SIO2) MODE2() MODE3() Z
+GPIO81 = MODE0(GPIO81) MODE1(BPI_BUS4) MODE2() MODE3() PUPD
+
+
+[GPO]
+
+[EINT]
+EINT_COUNT=10
+EINT_DEBOUNCE_TIME_COUNT=10
+
+[ADC]
+ADC_COUNT=6
+
+[KEYPAD]
+;MT6253 use EXTEND_QWERTY_KEYPAD option. MT6253 is original ROW=6
+KEY_ROW=8
+KEY_COLUMN=9
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6255.fig b/mcu/custom/driver/drv/Drv_Tool/MT6255.fig
new file mode 100644
index 0000000..a6f6f49
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6255.fig
@@ -0,0 +1,136 @@
+[Chip Type]
+Chip = MT6255
+GPIO_Pull_Sel=1
+GPIO_ModeNum=8
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO1 = MODE0(GPIO1) MODE1(BPI_BUS1) MODE2(EINT5) MODE3(PWM1) MODE4(CLKM4) MODE5(MC0WP) MODE6() MODE7() PD
+GPIO2 = MODE0(GPIO2) MODE1(BPI_BUS2) MODE2(EINT6) MODE3(PWM2) MODE4(CLKM5) MODE5(MC0WP) MODE6() MODE7() PD
+GPIO3 = MODE0(GPIO3) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO4 = MODE0(GPIO4) MODE1(BPI_BUS4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO5 = MODE0(GPIO5) MODE1(MC0CM0) MODE2(ARM7_JTRST_B) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO6 = MODE0(GPIO6) MODE1(MC0DA0) MODE2(ARM7_JTCK) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO7 = MODE0(GPIO7) MODE1(MC0DA1) MODE2(ARM7_JTDI) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO8 = MODE0(GPIO8) MODE1(MC0DA2) MODE2(ARM7_JTMS) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO9 = MODE0(GPIO9) MODE1(MC0DA3) MODE2(ARM7_JTDO) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO10 = MODE0(GPIO10) MODE1(MC0CK) MODE2(ARM7_JRTCK) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO11 = MODE0(GPIO11) MODE1(MC1CM0) MODE2(NLD11) MODE3(EDIWS) MODE4(SPI_SCK) MODE5(MC0DA4) MODE6() MODE7() PU
+GPIO12 = MODE0(GPIO12) MODE1(MC1DA0) MODE2(NLD10) MODE3(EDIDAT) MODE4(SPI_MOSI) MODE5(MC0DA5) MODE6() MODE7() PU
+GPIO13 = MODE0(GPIO13) MODE1(MC1DA1) MODE2(NLD9) MODE3(SPI_MISO) MODE4() MODE5(MC0DA6) MODE6() MODE7() PU
+GPIO14 = MODE0(GPIO14) MODE1(MC1CK) MODE2(NLD12) MODE3(EDICK) MODE4(SPI_CS_N) MODE5(MC0DA7) MODE6() MODE7() PU
+GPIO15 = MODE0(GPIO15) MODE1(LSA0) MODE2(EINT3) MODE3(EDICK) MODE4(CLKM1) MODE5(TDMA_SDAT[1]) MODE6() MODE7() PD
+GPIO16 = MODE0(GPIO16) MODE1(LSCK) MODE2(EINT4) MODE3(EDIWS) MODE4(CLKM2) MODE5(TDMA_CK) MODE6() MODE7() PU
+GPIO17 = MODE0(GPIO17) MODE1(LSDA) MODE2(SRCLKENAI) MODE3(EDIDAT) MODE4(CLKM3) MODE5(TDMA_SDAT[0]) MODE6(PWM_IN) MODE7() PU
+GPIO18 = MODE0(GPIO18) MODE1(LPCE1B) MODE2(SRCLKENAI) MODE3(KCOL7) MODE4(LSCE0B) MODE5(PWM0) MODE6(CLKM0) MODE7(NCE1B) PU
+GPIO19 = MODE0(GPIO19) MODE1(LPCE0B) MODE2() MODE3() MODE4(LSCE1B) MODE5(TDMA_FS) MODE6() MODE7() PU
+GPIO20 = MODE0(GPIO20) MODE1(LPTE) MODE2() MODE3() MODE4() MODE5(TDMA_EVTVAL) MODE6() MODE7() PD
+GPIO21 = MODE0(GPIO21) MODE1(LRSTB) MODE2() MODE3() MODE4() MODE5(TDMA_DTIRQ_F) MODE6() MODE7() PU
+GPIO22 = MODE0(GPIO22) MODE1(LRDB) MODE2() MODE3() MODE4() MODE5(CTIRQ1_IRQ_B) MODE6() MODE7() PU
+GPIO23 = MODE0(GPIO23) MODE1(LPA0) MODE2() MODE3() MODE4() MODE5(CTIRQ2_IRQ_B) MODE6() MODE7() PD
+GPIO24 = MODE0(GPIO24) MODE1(LWRB) MODE2() MODE3() MODE4() MODE5(TDMA_BTXEN) MODE6() MODE7() PU
+GPIO25 = MODE0(GPIO25) MODE1(NLD8) MODE2() MODE3() MODE4() MODE5(TDMA_BTXFS) MODE6() MODE7() PD
+GPIO26 = MODE0(GPIO26) MODE1(NLD7) MODE2() MODE3() MODE4() MODE5(TDMA_BRXEN) MODE6() MODE7() PD
+GPIO27 = MODE0(GPIO27) MODE1(NLD6) MODE2() MODE3() MODE4() MODE5(TDMA_BRXFS) MODE6() MODE7() PD
+GPIO28 = MODE0(GPIO28) MODE1(NLD5) MODE2() MODE3() MODE4() MODE5(CLOCK_OFF) MODE6() MODE7() PD
+GPIO29 = MODE0(GPIO29) MODE1(NLD4) MODE2() MODE3() MODE4() MODE5(MDSRCLKENA) MODE6() MODE7() PD
+GPIO30 = MODE0(GPIO30) MODE1(NLD3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO31 = MODE0(GPIO31) MODE1(NLD2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO32 = MODE0(GPIO32) MODE1(NLD1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO33 = MODE0(GPIO33) MODE1(NLD0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO34 = MODE0(GPIO34) MODE1(NRNB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO35 = MODE0(GPIO35) MODE1(NCLE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO36 = MODE0(GPIO36) MODE1(NALE) MODE2(MC0RST) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO37 = MODE0(GPIO37) MODE1(NWEB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO38 = MODE0(GPIO38) MODE1(NREB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO39 = MODE0(GPIO39) MODE1(NCE0B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO40 = MODE0(GPIO40) MODE1(CMRST) MODE2(D1_TID0) MODE3() MODE4(DBG_MON[0]) MODE5() MODE6() MODE7() PD
+GPIO41 = MODE0(GPIO41) MODE1(CMPDN) MODE2(D1_TID1) MODE3() MODE4(DBG_MON[1]) MODE5(DBG_BT_IDS_IN) MODE6() MODE7(DBG_FM_IDS_OUT[12]) PD
+GPIO42 = MODE0(GPIO42) MODE1(CMVREF) MODE2() MODE3() MODE4(DBG_MON[2]) MODE5(DBG_BT_IDS_OUT[11]) MODE6(DBG_RF_TEST_SDATAI) MODE7(DBG_FM_IDS_OUT[11]) PD
+GPIO43 = MODE0(GPIO43) MODE1(CMHREF) MODE2() MODE3() MODE4(DBG_MON[3]) MODE5(DBG_BT_IDS_OUT[10]) MODE6(DBG_RF_TEST_EN) MODE7(DBG_FM_IDS_OUT[10]) PD
+GPIO44 = MODE0(GPIO44) MODE1(CMPCLK) MODE2() MODE3() MODE4(DBG_MON[4]) MODE5(DBG_BT_IDS_OUT[9]) MODE6(DBG_RF_TEST_SCLK) MODE7(DBG_FM_IDS_OUT[9]) PD
+GPIO45 = MODE0(GPIO45) MODE1(CMMCLK) MODE2() MODE3(BPI_BUS5) MODE4(DBG_MON[5]) MODE5(DBG_BT_IDS_OUT[8]) MODE6(DBG_RF_TEST_AUXOUT) MODE7(DBG_FM_IDS_OUT[8]) PD
+GPIO46 = MODE0(GPIO46) MODE1(CMDAT7) MODE2() MODE3(BPI_BUS6) MODE4(DBG_MON[6]) MODE5(DBG_BT_IDS_OUT[7]) MODE6(DBG_RF_TEST_DCXODELAY) MODE7(DBG_FM_IDS_OUT[7]) PD
+GPIO47 = MODE0(GPIO47) MODE1(CMDAT6) MODE2() MODE3(BPI_BUS7) MODE4(DBG_MON[7]) MODE5(DBG_BT_IDS_OUT[6]) MODE6(DBG_RF_TEST_ENEXT) MODE7(DBG_FM_IDS_OUT[6]) PD
+GPIO48 = MODE0(GPIO48) MODE1(CMDAT5) MODE2() MODE3(BPI_BUS8) MODE4(DBG_MON[8]) MODE5(DBG_BT_IDS_OUT[5]) MODE6(DBG_RF_TEST_ENBT) MODE7(DBG_FM_IDS_OUT[5]) PD
+GPIO49 = MODE0(GPIO49) MODE1(CMDAT4) MODE2() MODE3(BPI_BUS9) MODE4(DBG_MON[9]) MODE5(DBG_BT_IDS_OUT[4]) MODE6(DBG_RF_TEST_ENBB) MODE7(DBG_FM_IDS_OUT[4]) PD
+GPIO50 = MODE0(GPIO50) MODE1(CMDAT3) MODE2() MODE3() MODE4(DBG_MON[10]) MODE5(DBG_BT_IDS_OUT[3]) MODE6(DBG_RF_TEST_SDATAO) MODE7(DBG_FM_IDS_OUT[3]) PD
+GPIO51 = MODE0(GPIO51) MODE1(CMDAT2) MODE2(D2_TID2) MODE3(D1IMS) MODE4(DBG_MON[11]) MODE5(DBG_BT_IDS_OUT[2]) MODE6(DBG_RF_TEST_SDATAI) MODE7(DBG_FM_IDS_OUT[2]) PD
+GPIO52 = MODE0(GPIO52) MODE1(CMDAT1) MODE2(D2_TID0) MODE3(D1ICK) MODE4(DBG_MON[12]) MODE5(DBG_BT_IDS_OUT[1]) MODE6(DBG_RF_TEST_EN) MODE7(DBG_FM_IDS_OUT[1]) PD
+GPIO53 = MODE0(GPIO53) MODE1(CMDAT0) MODE2(D2_TID1) MODE3(D1ID) MODE4(DBG_MON[13]) MODE5(DBG_BT_IDS_OUT[0]) MODE6(DBG_RF_TEST_SCLK) MODE7(DBG_FM_IDS_OUT[0]) PD
+GPIO54 = MODE0(GPIO54) MODE1(SCL) MODE2(D2_TID3) MODE3(D2ICK) MODE4(DBG_MON[14]) MODE5(DBG_SRCLKENA) MODE6() MODE7() PU
+GPIO55 = MODE0(GPIO55) MODE1(SDA) MODE2(D2_TID4) MODE3(D2ID) MODE4(DBG_MON[15]) MODE5() MODE6() MODE7() PU
+GPIO56 = MODE0() MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO57 = MODE0(GPIO57) MODE1(URXD1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO58 = MODE0(GPIO58) MODE1(UTXD1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO59 = MODE0(GPIO59) MODE1(UCTS1) MODE2(EINT10) MODE3(NLD16) MODE4(KROW6) MODE5(IRDA_TXD) MODE6(UTXD3) MODE7(PTA0) PU
+GPIO60 = MODE0(GPIO60) MODE1(URTS1) MODE2(EINT9) MODE3(NLD17) MODE4(KCOL7) MODE5(IRDA_RXD) MODE6(URXD3) MODE7(PTA1) PU
+GPIO61 = MODE0(GPIO61) MODE1(URXD2) MODE2(UCTS3) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO62 = MODE0(GPIO62) MODE1(UTXD2) MODE2(URTS3) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO63 = MODE0() MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO64 = MODE0() MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO65 = MODE0(GPIO65) MODE1(DAICLK) MODE2(KCOL7) MODE3(IRDA_RXD) MODE4(EDICK) MODE5(SPI_CS_N) MODE6(PWM_IN) MODE7() PD
+GPIO66 = MODE0(GPIO66) MODE1(DAIPCMOUT) MODE2(KROW6) MODE3(IRDA_TXD) MODE4(EDIWS) MODE5(SPI_SCK) MODE6() MODE7() PD
+GPIO67 = MODE0(GPIO67) MODE1(DAIPCMIN) MODE2(KROW7) MODE3(IRDA_PDN) MODE4(EDIDAT) MODE5(SPI_MOSI) MODE6() MODE7() PD
+GPIO68 = MODE0(GPIO68) MODE1(DAIRST) MODE2(MC0INS) MODE3(SPI_MISO) MODE4() MODE5() MODE6(UCTS2) MODE7() PU
+GPIO69 = MODE0(GPIO69) MODE1(DAISYNC) MODE2(MC0WP) MODE3() MODE4(KROW6) MODE5(CLKM8) MODE6(URTS2) MODE7() PD
+GPIO70 = MODE0(GPIO70) MODE1(MC0INS) MODE2(NLD15) MODE3(EDICK) MODE4(SPI_CS_N) MODE5(CLKM9) MODE6(D2_TID5) MODE7(D2IMS) PU
+GPIO71 = MODE0(GPIO71) MODE1(EINT11) MODE2(MC0WP) MODE3(NLD14) MODE4(KROW6) MODE5(EDIWS) MODE6(CLKM10) MODE7(D2_TID6) PU
+GPIO72 = MODE0(GPIO72) MODE1(EINT0) MODE2(SPI_SCK) MODE3(LPCE2B) MODE4(NLD17) MODE5() MODE6() MODE7() PU
+GPIO73 = MODE0(GPIO73) MODE1(EINT1) MODE2(KCOL7) MODE3(SPI_MOSI) MODE4(NLD16) MODE5() MODE6() MODE7() PU
+GPIO74 = MODE0(GPIO74) MODE1(EINT2) MODE2(NLD13) MODE3(KROW7) MODE4(EDIDAT) MODE5(SPI_MISO) MODE6(PWM_IN) MODE7() PU
+GPIO75 = MODE0(GPIO75) MODE1(KCOL6) MODE2(SRCLKENAI) MODE3(MC0INS) MODE4(IRDA_PDN) MODE5(PWM3) MODE6(CLKM6) MODE7(PTA0) PU
+GPIO76 = MODE0(GPIO76) MODE1(KCOL5) MODE2(EINT7) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO77 = MODE0(GPIO77) MODE1(KCOL4) MODE2(EINT8) MODE3(URXD3) MODE4() MODE5() MODE6(CLKSW_ABIST_HMON_DATA[3]) MODE7(MIXED_ABIST_HMON_DATA[3]) PU
+GPIO78 = MODE0(GPIO78) MODE1(KCOL3) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_ABIST_HMON_DATA[2]) MODE7(MIXED_ABIST_HMON_DATA[2]) PU
+GPIO79 = MODE0(GPIO79) MODE1(KCOL2) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_ABIST_HMON_DATA[1]) MODE7(MIXED_ABIST_HMON_DATA[1]) PU
+GPIO80 = MODE0(GPIO80) MODE1(KCOL1) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_ABIST_HMON_DATA[0]) MODE7(MIXED_ABIST_HMON_DATA[0]) PU
+GPIO81 = MODE0(GPIO81) MODE1(KCOL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO82 = MODE0(GPIO82) MODE1(KROW5) MODE2(UTXD3) MODE3(PWM4) MODE4(CLKM7) MODE5(PTA1) MODE6() MODE7() PD
+GPIO83 = MODE0(GPIO83) MODE1(KROW4) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_ABIST_LMON_DATA[3]) MODE7(MIXED_ABIST_LMON_DATA[3]) PD
+GPIO84 = MODE0(GPIO84) MODE1(KROW3) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_ABIST_LMON_DATA[2]) MODE7(MIXED_ABIST_LMON_DATA[2]) PD
+GPIO85 = MODE0(GPIO85) MODE1(KROW2) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_ABIST_LMON_DATA[1]) MODE7(MIXED_ABIST_LMON_DATA[1]) PD
+GPIO86 = MODE0(GPIO86) MODE1(KROW1) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_ABIST_LMON_DATA[0]) MODE7(MIXED_ABIST_LMON_DATA[0]) PD
+GPIO87 = MODE0(GPIO87) MODE1(KROW0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+
+[GPO]
+
+[EINT]
+EINT_COUNT=12
+EINT_DEBOUNCE_TIME_COUNT=12
+
+[EINT_EX_PIN]
+0
+1
+2
+3
+4
+5
+6
+7
+8
+9
+10
+11
+
+
+[ADC]
+ADC_COUNT=3
+
+[ADC_INT_CH]
+0 = ADC_VBAT
+1 = ADC_VISENSE
+2 = ADC_VCHARGER
+3 = ADC_VBATTMP
+4 = ADC_PCBTMP
+5 = ADC_CHR_USB
+
+
+[ADC_EX_CH]
+6
+7
+8
+
+[KEYPAD]
+KEY_ROW=8
+KEY_COLUMN=9
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6255MP.fig b/mcu/custom/driver/drv/Drv_Tool/MT6255MP.fig
new file mode 100644
index 0000000..bd06523
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6255MP.fig
@@ -0,0 +1,189 @@
+[Chip Type]
+Chip = MT6255
+GPIO_ModeNum = 8
+GPIO_Pull_Sel=1
+PMIC_Config=1
+PMIC_Volt_Format = 1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(SPI_MOSI) MODE2(CLKM1) MODE3(SCL) MODE4(LSCE1B) MODE5(BPI_BUS6) MODE6(dbg_usb_din[0]) MODE7() PD
+GPIO1 = MODE0(GPIO1) MODE1(SPI_MISO) MODE2(PWM_B) MODE3(UCTS2) MODE4(EINT12) MODE5(BPI_BUS7) MODE6(dbg_usb_din[1]) MODE7() PD
+GPIO2 = MODE0(GPIO2) MODE1(SPI_SCK) MODE2(SRCLKENAN) MODE3(URTS2) MODE4(PTA1) MODE5(BPI_BUS8) MODE6(dbg_usb_din[2]) MODE7() PD
+GPIO3 = MODE0(GPIO3) MODE1(SPI_CS_N) MODE2() MODE3(SDA) MODE4(PTA0) MODE5(BPI_BUS9) MODE6(dbg_usb_din[3]) MODE7() PD
+GPIO4 = MODE0(GPIO4) MODE1(URXD1) MODE2() MODE3(MC2INS) MODE4(PTA1) MODE5(PWM_C) MODE6(dbg_usb_din[4]) MODE7(UTXD1) PU
+GPIO5 = MODE0(GPIO5) MODE1(UTXD1) MODE2(CLKM3) MODE3(MC1INS) MODE4(PTA0) MODE5() MODE6(dbg_usb_din[5]) MODE7(URXD1) PU
+GPIO6 = MODE0(GPIO6) MODE1(UCTS1) MODE2(URXD3) MODE3(EINT7) MODE4(SRCLKENAI) MODE5(SCL) MODE6(dbg_usb_din[6]) MODE7() PU
+GPIO7 = MODE0(GPIO7) MODE1(URTS1) MODE2(UTXD3) MODE3(EINT8) MODE4(SRCLKENA) MODE5(SDA) MODE6(dbg_usb_din[7]) MODE7() PU
+GPIO8 = MODE0(GPIO8) MODE1(URXD2) MODE2(UCTS3) MODE3(MC2INS) MODE4(PTA1) MODE5(CLKM2) MODE6(dbg_usb_din[8]) MODE7(UTXD2) PD
+GPIO9 = MODE0(GPIO9) MODE1(UTXD2) MODE2(URTS3) MODE3(MC1INS) MODE4(PTA0) MODE5() MODE6() MODE7(URXD2) PD
+GPIO10 = MODE0(GPIO10) MODE1(LSA0) MODE2(URXD3) MODE3(PWM_IN) MODE4(EDICK) MODE5(SRCLKENA) MODE6(TDMA_SDAT[1]) MODE7(UTXD3) PD
+GPIO11 = MODE0(GPIO11) MODE1(LSCK) MODE2(UTXD3) MODE3(PWM_A) MODE4(EDIWS) MODE5(SRCLKENAI) MODE6() MODE7(URXD3) PD
+GPIO12 = MODE0(GPIO12) MODE1(LSDA) MODE2(LPCE3B) MODE3(EINT10) MODE4(EDIDAT) MODE5(SRCLKENAN) MODE6(TDMA_SDAT[0]) MODE7() PD
+GPIO13 = MODE0(GPIO13) MODE1(LPCE2B) MODE2(LSCE1B) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO14 = MODE0(GPIO14) MODE1(LPCE1B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO15 = MODE0(GPIO15) MODE1(LPCE0B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO16 = MODE0(GPIO16) MODE1(LPTE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO17 = MODE0(GPIO17) MODE1(LRSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO18 = MODE0(GPIO18) MODE1(LRDB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO19 = MODE0(GPIO19) MODE1(LPA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO20 = MODE0(GPIO20) MODE1(LWRB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO21 = MODE0(GPIO21) MODE1(NLD17) MODE2(URXD3) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO22 = MODE0(GPIO22) MODE1(NLD16) MODE2(UTXD3) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO23 = MODE0(GPIO23) MODE1(NLD15) MODE2(SFIO0) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO24 = MODE0(GPIO24) MODE1(NLD14) MODE2(SFIO1) MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[12]) MODE7() PD
+GPIO25 = MODE0(GPIO25) MODE1(NLD13) MODE2(SFIO3) MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_A_FUNC_DCK) MODE7(dbg_MIXED_A_FUNC_DCK) PD
+GPIO26 = MODE0(GPIO26) MODE1(NLD12) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO27 = MODE0(GPIO27) MODE1(NLD11) MODE2(SFCS) MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[11]) MODE7() PD
+GPIO28 = MODE0(GPIO28) MODE1(NLD10) MODE2(SFIO2) MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[10]) MODE7() PD
+GPIO29 = MODE0(GPIO29) MODE1(NLD9) MODE2(SFCLK) MODE3() MODE4() MODE5(dbg_usb_dout[9]) MODE6(dbg_CLKSW_DIO[9]) MODE7() PD
+GPIO30 = MODE0(GPIO30) MODE1(NLD8) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[8]) MODE6(dbg_CLKSW_DIO[8]) MODE7() PD
+GPIO31 = MODE0(GPIO31) MODE1(NLD7) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[7]) MODE6(dbg_CLKSW_DIO[7]) MODE7(dbg_MIXED_DIO[7]) PD
+GPIO32 = MODE0(GPIO32) MODE1(NLD6) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[6]) MODE6(dbg_CLKSW_DIO[6]) MODE7(dbg_MIXED_DIO[6]) PD
+GPIO33 = MODE0(GPIO33) MODE1(NLD5) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[5]) MODE6(dbg_CLKSW_DIO[5]) MODE7(dbg_MIXED_DIO[5]) PD
+GPIO34 = MODE0(GPIO34) MODE1(NLD4) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[4]) MODE6(dbg_CLKSW_DIO[4]) MODE7(dbg_MIXED_DIO[4]) PD
+GPIO35 = MODE0(GPIO35) MODE1(NLD3) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[3]) MODE6(dbg_CLKSW_DIO[3]) MODE7(dbg_MIXED_DIO[3]) PD
+GPIO36 = MODE0(GPIO36) MODE1(NLD2) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[2]) MODE6(dbg_CLKSW_DIO[2]) MODE7(dbg_MIXED_DIO[2]) PD
+GPIO37 = MODE0(GPIO37) MODE1(NLD1) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[1]) MODE6(dbg_CLKSW_DIO[1]) MODE7(dbg_MIXED_DIO[1]) PD
+GPIO38 = MODE0(GPIO38) MODE1(NLD0) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[0]) MODE6(dbg_CLKSW_DIO[0]) MODE7(dbg_MIXED_DIO[0]) PD
+GPIO39 = MODE0(GPIO39) MODE1(NRNB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO40 = MODE0(GPIO40) MODE1(NCLE) MODE2(KROW7) MODE3(MC1DA4) MODE4() MODE5() MODE6() MODE7() PD
+GPIO41 = MODE0(GPIO41) MODE1(NALE) MODE2(KCOL7) MODE3(MC1DA5) MODE4() MODE5() MODE6() MODE7() PD
+GPIO42 = MODE0(GPIO42) MODE1(NWEB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO43 = MODE0(GPIO43) MODE1(NREB) MODE2() MODE3(MC1DA7) MODE4() MODE5() MODE6() MODE7() PU
+GPIO44 = MODE0(GPIO44) MODE1(NCE0B) MODE2(KROW6) MODE3(MC1DA6) MODE4() MODE5() MODE6() MODE7() PU
+GPIO45 = MODE0(GPIO45) MODE1(CMRST) MODE2() MODE3(D2_TID1) MODE4(dbg_mon[0]) MODE5() MODE6() MODE7() PD
+GPIO46 = MODE0(GPIO46) MODE1(CMPDN) MODE2() MODE3(D2_TID2) MODE4(dbg_mon[1]) MODE5(dbg_bt_ids_in) MODE6() MODE7(dbg_fm_ids_out[12]) PD
+GPIO47 = MODE0(GPIO47) MODE1(CMVSYNC) MODE2() MODE3() MODE4(dbg_mon[2]) MODE5(dbg_bt_ids_out[11]) MODE6(dbg_rf_test_sdatai) MODE7(dbg_fm_ids_out[11]) PD
+GPIO48 = MODE0(GPIO48) MODE1(CMHSYNC) MODE2() MODE3() MODE4(dbg_mon[3]) MODE5(dbg_bt_ids_out[10]) MODE6(dbg_rf_test_en) MODE7(dbg_fm_ids_out[10]) PD
+GPIO49 = MODE0(GPIO49) MODE1(CMPCLK) MODE2(CM_SSCK) MODE3() MODE4(dbg_mon[4]) MODE5(dbg_bt_ids_out[9]) MODE6(dbg_rf_test_sclk) MODE7(dbg_fm_ids_out[9]) PD
+GPIO50 = MODE0(GPIO50) MODE1(CMMCLK) MODE2() MODE3() MODE4(dbg_mon[5]) MODE5(dbg_bt_ids_out[8]) MODE6(dbg_rf_test_auxout) MODE7(dbg_fm_ids_out[8]) PD
+GPIO51 = MODE0(GPIO51) MODE1(CMDAT7) MODE2(BPI_BUS6) MODE3(D2_TID3) MODE4(dbg_mon[6]) MODE5(dbg_bt_ids_out[7]) MODE6(dbg_rf_test_dcxodelay) MODE7(dbg_fm_ids_out[7]) PD
+GPIO52 = MODE0(GPIO52) MODE1(CMDAT6) MODE2(BPI_BUS7) MODE3(D2_TID4) MODE4(dbg_mon[7]) MODE5(dbg_bt_ids_out[6]) MODE6(dbg_rf_test_enext) MODE7(dbg_fm_ids_out[6]) PD
+GPIO53 = MODE0(GPIO53) MODE1(CMDAT5) MODE2(BPI_BUS8) MODE3(D2_TID5) MODE4(dbg_mon[8]) MODE5(dbg_bt_ids_out[5]) MODE6(dbg_rf_test_enbt) MODE7(dbg_fm_ids_out[5]) PD
+GPIO54 = MODE0(GPIO54) MODE1(CMDAT4) MODE2(BPI_BUS9) MODE3(D2_TID6) MODE4(dbg_mon[9]) MODE5(dbg_bt_ids_out[4]) MODE6(dbg_rf_test_enbb) MODE7(dbg_fm_ids_out[4]) PD
+GPIO55 = MODE0(GPIO55) MODE1(CMDAT3) MODE2() MODE3(D2_TID7) MODE4(dbg_mon[10]) MODE5(dbg_bt_ids_out[3]) MODE6(dbg_rf_test_sdatao) MODE7(dbg_fm_ids_out[3]) PD
+GPIO56 = MODE0(GPIO56) MODE1(CMDAT2) MODE2() MODE3(D2_TID0) MODE4(dbg_mon[11]) MODE5(dbg_bt_ids_out[2]) MODE6(dbg_rf_test_sdatai) MODE7(dbg_fm_ids_out[2]) PD
+GPIO57 = MODE0(GPIO57) MODE1(CMDAT1) MODE2() MODE3() MODE4(dbg_mon[12]) MODE5(dbg_bt_ids_out[1]) MODE6(dbg_rf_test_en) MODE7(dbg_fm_ids_out[1]) PD
+GPIO58 = MODE0(GPIO58) MODE1(CMDAT0) MODE2(CM_SSDA) MODE3(D2ICK) MODE4(dbg_mon[13]) MODE5(dbg_bt_ids_out[0]) MODE6(dbg_rf_test_sclk) MODE7(dbg_fm_ids_out[0]) PD
+GPIO59 = MODE0(GPIO59) MODE1(SCL) MODE2() MODE3(D2ID) MODE4(dbg_mon[14]) MODE5(dbg_srclkena) MODE6(dbg_ABBSYS_DIO[0]) MODE7(dbg_MIXED_DIO[0]) PD
+GPIO60 = MODE0(GPIO60) MODE1(SDA) MODE2() MODE3(D2IMS) MODE4(dbg_mon[15]) MODE5() MODE6(dbg_ABBSYS_DIO[1]) MODE7(dbg_MIXED_DIO[1]) PD
+GPIO61 = MODE0(GPIO61) MODE1(EINT0) MODE2(LSCE0B) MODE3(CLKM6) MODE4() MODE5(NCE1B) MODE6(dbg_ABBSYS_DIO[2]) MODE7(dbg_MIXED_DIO[2]) PD
+GPIO62 = MODE0(GPIO62) MODE1(EINT1) MODE2(CIRQ0) MODE3(CLKM7) MODE4() MODE5() MODE6(dbg_ABBSYS_DIO[3]) MODE7(dbg_MIXED_DIO[3]) PD
+GPIO63 = MODE0(GPIO63) MODE1(EINT2) MODE2(CIRQ1) MODE3() MODE4() MODE5() MODE6(dbg_ABBSYS_DIO[4]) MODE7(dbg_MIXED_DIO[4]) PD
+GPIO64 = MODE0(GPIO64) MODE1(EINT3) MODE2(CIRQ2) MODE3(UCTS3) MODE4() MODE5() MODE6(dbg_ABBSYS_DIO[5]) MODE7(dbg_MIXED_DIO[5]) PD
+GPIO65 = MODE0(GPIO65) MODE1(EINT4) MODE2(PWM_C) MODE3(URTS3) MODE4(LSDI) MODE5() MODE6(dbg_ABBSYS_DIO[6]) MODE7(dbg_MIXED_DIO[6]) PD
+GPIO66 = MODE0(GPIO66) MODE1(DAICLK) MODE2(KROW6) MODE3(MC1INS) MODE4() MODE5() MODE6(dbg_ABBSYS_DIO[7]) MODE7(dbg_MIXED_DIO[7]) PD
+GPIO67 = MODE0(GPIO67) MODE1(DAIPCMOUT) MODE2(EDICK) MODE3(KCOL7) MODE4(SRCLKENAN) MODE5() MODE6(dbg_ABBSYS_DIO[8]) MODE7() PD
+GPIO68 = MODE0(GPIO68) MODE1(DAIPCMIN) MODE2(EDIWS) MODE3(CLKM4) MODE4(SCL) MODE5() MODE6(dbg_ABBSYS_DIO[9]) MODE7() PD
+GPIO69 = MODE0(GPIO69) MODE1(DAIRST) MODE2(EDIDAT) MODE3(SRCLKENA) MODE4(SDA) MODE5() MODE6(dbg_ABBSYS_DIO[10]) MODE7() PD
+GPIO70 = MODE0(GPIO70) MODE1(DAISYNC) MODE2(KROW7) MODE3(LSDI) MODE4(PWM_IN) MODE5() MODE6(dbg_ABBSYS_A_FUNC_DCK) MODE7(dbg_MIXED_A_FUNC_DCK) PD
+GPIO71 = MODE0(GPIO71) MODE1(KCOL6) MODE2(MC2INS) MODE3(LSDI) MODE4(PWM_IN) MODE5(EINT4) MODE6() MODE7() PU
+GPIO72 = MODE0(GPIO72) MODE1(KCOL5) MODE2(EINT5) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO73 = MODE0(GPIO73) MODE1(KCOL4) MODE2(SCL) MODE3() MODE4() MODE5(CLKSW_HMON_DATA[3]) MODE6(ABBSYS_HMON_DATA[3]) MODE7(MIXED_HMON_DATA[3]) PU
+GPIO74 = MODE0(GPIO74) MODE1(KCOL3) MODE2() MODE3() MODE4() MODE5(CLKSW_HMON_DATA[2]) MODE6(ABBSYS_HMON_DATA[2]) MODE7(MIXED_HMON_DATA[2]) PU
+GPIO75 = MODE0(GPIO75) MODE1(KCOL2) MODE2() MODE3() MODE4() MODE5(CLKSW_HMON_DATA[1]) MODE6(ABBSYS_HMON_DATA[1]) MODE7(MIXED_HMON_DATA[1]) PU
+GPIO76 = MODE0(GPIO76) MODE1(KCOL1) MODE2() MODE3() MODE4() MODE5(CLKSW_HMON_DATA[0]) MODE6(ABBSYS_HMON_DATA[0]) MODE7(MIXED_HMON_DATA[0]) PU
+GPIO77 = MODE0(GPIO77) MODE1(KCOL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO78 = MODE0(GPIO78) MODE1(KROW5) MODE2(EINT11) MODE3(SRCLKENAI) MODE4(MC2WP) MODE5(CLKSW_LMON_DATA[3]) MODE6(ABBSYS_LMON_DATA[3]) MODE7(MIXED_LMON_DATA[3]) PD
+GPIO79 = MODE0(GPIO79) MODE1(KROW4) MODE2(PWM_D) MODE3(CLKM5) MODE4(MC1WP) MODE5(EINT6) MODE6(dbg_ABBSYS_DIO[11]) MODE7() PD
+GPIO80 = MODE0(GPIO80) MODE1(KROW3) MODE2(SDA) MODE3() MODE4() MODE5() MODE6(dbg_ABBSYS_DIO[12]) MODE7() PD
+GPIO81 = MODE0(GPIO81) MODE1(KROW2) MODE2() MODE3() MODE4() MODE5(CLKSW_LMON_DATA[2]) MODE6(ABBSYS_LMON_DATA[2]) MODE7(MIXED_LMON_DATA[2]) PD
+GPIO82 = MODE0(GPIO82) MODE1(KROW1) MODE2() MODE3() MODE4() MODE5(CLKSW_LMON_DATA[1]) MODE6(ABBSYS_LMON_DATA[1]) MODE7(MIXED_LMON_DATA[1]) PD
+GPIO83 = MODE0(GPIO83) MODE1(KROW0) MODE2() MODE3() MODE4() MODE5(CLKSW_LMON_DATA[0]) MODE6(ABBSYS_LMON_DATA[0]) MODE7(MIXED_LMON_DATA[0]) PD
+GPIO84 = MODE0(GPIO84) MODE1(MC1RST) MODE2(MC1WP) MODE3(LSCE0B) MODE4(PTA1) MODE5() MODE6() MODE7() PU
+GPIO85 = MODE0(GPIO85) MODE1(MC1CK_FB) MODE2(MC2WP) MODE3() MODE4(PTA0) MODE5(BT_DBGI_N) MODE6() MODE7() PU
+GPIO86 = MODE0(GPIO86) MODE1(MC1CM0) MODE2() MODE3() MODE4() MODE5(BT_TRST_B) MODE6(dbg_mon[0]) MODE7(dbg_usb_dio[0]) PU
+GPIO87 = MODE0(GPIO87) MODE1(MC1DA0) MODE2() MODE3() MODE4() MODE5(BT_TCK) MODE6(dbg_mon[1]) MODE7(dbg_usb_dio[1]) PU
+GPIO88 = MODE0(GPIO88) MODE1(MC1DA1) MODE2() MODE3() MODE4() MODE5(BT_TDI) MODE6(dbg_mon[2]) MODE7(dbg_usb_dio[2]) PU
+GPIO89 = MODE0(GPIO89) MODE1(MC1DA2) MODE2() MODE3() MODE4() MODE5(BT_TMS) MODE6(dbg_mon[3]) MODE7(dbg_usb_dio[3]) PU
+GPIO90 = MODE0(GPIO90) MODE1(MC1DA3) MODE2() MODE3() MODE4() MODE5(BT_TDO) MODE6(dbg_mon[4]) MODE7(dbg_usb_dio[4]) PU
+GPIO91 = MODE0(GPIO91) MODE1(MC1CK) MODE2(EINT13) MODE3() MODE4() MODE5(BT_DBGACK_N) MODE6() MODE7() PU
+GPIO92 = MODE0(GPIO92) MODE1(MC2CM0) MODE2(MC1DA4) MODE3(KROW7) MODE4(URXD2) MODE5(PTA1) MODE6(dbg_mon[5]) MODE7(dbg_usb_dio[5]) PD
+GPIO93 = MODE0(GPIO93) MODE1(MC2DA0) MODE2(MC1DA5) MODE3(KCOL7) MODE4(UTXD2) MODE5(PTA0) MODE6(dbg_mon[6]) MODE7(dbg_usb_dio[6]) PD
+GPIO94 = MODE0(GPIO94) MODE1(MC2DA1) MODE2(MC1DA6) MODE3(KROW6) MODE4(PWM_A) MODE5(EDICK) MODE6(dbg_mon[7]) MODE7(dbg_usb_dio[7]) PD
+GPIO95 = MODE0(GPIO95) MODE1(MC2CK) MODE2(MC1DA7) MODE3(PWM_IN) MODE4(CLKM0) MODE5(SRCLKENAI) MODE6() MODE7() PD
+GPIO96 = MODE0(GPIO96) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_mon[10]) MODE7(dbg_usb_dio[10]) PD
+GPIO97 = MODE0(GPIO97) MODE1(BPI_BUS1) MODE2(LSCE0B) MODE3() MODE4() MODE5() MODE6(dbg_mon[11]) MODE7(dbg_usb_dio[11]) PD
+GPIO98 = MODE0(GPIO98) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_mon[12]) MODE7(dbg_usb_dio[12]) PD
+GPIO99 = MODE0(GPIO99) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_mon[13]) MODE7(dbg_usb_dio[13]) PD
+GPIO100 = MODE0(GPIO100) MODE1(BPI_BUS4) MODE2(MC2INS) MODE3(LSCE1B) MODE4() MODE5() MODE6(dbg_mon[14]) MODE7(dbg_usb_dio[14]) PD
+GPIO101 = MODE0(GPIO101) MODE1(BPI_BUS5) MODE2(MC1INS) MODE3(EINT14) MODE4() MODE5(SRCLKENAI) MODE6(dbg_mon[15]) MODE7(dbg_usb_dio[15]) PD
+GPIO102 = MODE0(GPIO102) MODE1(MC2DA2) MODE2(EINT6) MODE3() MODE4(PWM_D) MODE5(EDIWS) MODE6(dbg_mon[8]) MODE7(dbg_usb_dio[8]) PD
+GPIO103 = MODE0(GPIO103) MODE1(MC2DA3) MODE2(EINT9) MODE3() MODE4(MC1INS) MODE5(EDIDAT) MODE6(dbg_mon[9]) MODE7(dbg_usb_dio[9]) PD
+GPIO104 = MODE0(GPIO104) MODE1(EINT5) MODE2(MC1INS) MODE3(PWM_IN) MODE4(CLKM8) MODE5() MODE6() MODE7() PD
+
+[GPO]
+
+[EINT]
+EINT_COUNT=16
+EINT_DEBOUNCE_TIME_COUNT=16
+
+[EINT_EX_PIN]
+0
+1
+2
+3
+4
+5
+6
+7
+8
+9
+10
+11
+12
+13
+14
+22
+
+[EINT_INT_PIN]
+
+
+[ADC]
+ADC_COUNT = 5
+
+[ADC_INT_CH]
+0 = ADC_VBAT
+1 = ADC_VISENSE
+2 = ADC_VCHARGER
+3 = ADC_VBATTMP
+
+
+[ADC_EX_CH]
+6
+7
+13
+14
+15
+
+
+[KEYPAD]
+KEY_ROW=8
+KEY_COLUMN=9
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6255NP.fig b/mcu/custom/driver/drv/Drv_Tool/MT6255NP.fig
new file mode 100644
index 0000000..25c8dd3
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6255NP.fig
@@ -0,0 +1,189 @@
+[Chip Type]
+Chip = MT6255
+GPIO_ModeNum = 8
+GPIO_Pull_Sel=1
+PMIC_Config=1
+PMIC_Volt_Format = 1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(SPI_MOSI) MODE2(CLKM1) MODE3(SCL) MODE4(LSCE1B) MODE5(BPI_BUS6) MODE6(dbg_usb_din[0]) MODE7() PD
+GPIO1 = MODE0(GPIO1) MODE1(SPI_MISO) MODE2(PWM_B) MODE3(UCTS2) MODE4(EINT12) MODE5(BPI_BUS7) MODE6(dbg_usb_din[1]) MODE7() PD
+GPIO2 = MODE0(GPIO2) MODE1(SPI_SCK) MODE2(SRCLKENAN) MODE3(URTS2) MODE4(PTA1) MODE5(BPI_BUS8) MODE6(dbg_usb_din[2]) MODE7() PD
+GPIO3 = MODE0(GPIO3) MODE1(SPI_CS_N) MODE2() MODE3(SDA) MODE4(PTA0) MODE5(BPI_BUS9) MODE6(dbg_usb_din[3]) MODE7() PD
+GPIO4 = MODE0(GPIO4) MODE1(URXD1) MODE2() MODE3(MC2INS) MODE4(PTA1) MODE5(PWM_C) MODE6(dbg_usb_din[4]) MODE7(UTXD1) PU
+GPIO5 = MODE0(GPIO5) MODE1(UTXD1) MODE2(CLKM3) MODE3(MC1INS) MODE4(PTA0) MODE5() MODE6(dbg_usb_din[5]) MODE7(URXD1) PU
+GPIO6 = MODE0(GPIO6) MODE1(UCTS1) MODE2(URXD3) MODE3(EINT7) MODE4(SRCLKENAI) MODE5(SCL) MODE6(dbg_usb_din[6]) MODE7() PU
+GPIO7 = MODE0(GPIO7) MODE1(URTS1) MODE2(UTXD3) MODE3(EINT8) MODE4(SRCLKENA) MODE5(SDA) MODE6(dbg_usb_din[7]) MODE7() PU
+GPIO8 = MODE0(GPIO8) MODE1(URXD2) MODE2(UCTS3) MODE3(MC2INS) MODE4(PTA1) MODE5(CLKM2) MODE6(dbg_usb_din[8]) MODE7(UTXD2) PD
+GPIO9 = MODE0(GPIO9) MODE1(UTXD2) MODE2(URTS3) MODE3(MC1INS) MODE4(PTA0) MODE5() MODE6() MODE7(URXD2) PD
+GPIO10 = MODE0(GPIO10) MODE1(LSA0) MODE2(URXD3) MODE3(PWM_IN) MODE4(EDICK) MODE5(SRCLKENA) MODE6(TDMA_SDAT[1]) MODE7(UTXD3) PD
+GPIO11 = MODE0(GPIO11) MODE1(LSCK) MODE2(UTXD3) MODE3(PWM_A) MODE4(EDIWS) MODE5(SRCLKENAI) MODE6() MODE7(URXD3) PD
+GPIO12 = MODE0(GPIO12) MODE1(LSDA) MODE2(LPCE3B) MODE3(EINT10) MODE4(EDIDAT) MODE5(SRCLKENAN) MODE6(TDMA_SDAT[0]) MODE7() PD
+GPIO13 = MODE0(GPIO13) MODE1(LPCE2B) MODE2(LSCE1B) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO14 = MODE0(GPIO14) MODE1(LPCE1B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO15 = MODE0(GPIO15) MODE1(LPCE0B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO16 = MODE0(GPIO16) MODE1(LPTE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO17 = MODE0(GPIO17) MODE1(LRSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO18 = MODE0(GPIO18) MODE1(LRDB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO19 = MODE0(GPIO19) MODE1(LPA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO20 = MODE0(GPIO20) MODE1(LWRB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO21 = MODE0(GPIO21) MODE1(NLD17) MODE2(URXD3) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO22 = MODE0(GPIO22) MODE1(NLD16) MODE2(UTXD3) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO23 = MODE0(GPIO23) MODE1(NLD15) MODE2(SFIO0) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO24 = MODE0(GPIO24) MODE1(NLD14) MODE2(SFIO1) MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[12]) MODE7() PD
+GPIO25 = MODE0(GPIO25) MODE1(NLD13) MODE2(SFIO3) MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_A_FUNC_DCK) MODE7(dbg_MIXED_A_FUNC_DCK) PD
+GPIO26 = MODE0(GPIO26) MODE1(NLD12) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO27 = MODE0(GPIO27) MODE1(NLD11) MODE2(SFCS) MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[11]) MODE7() PD
+GPIO28 = MODE0(GPIO28) MODE1(NLD10) MODE2(SFIO2) MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[10]) MODE7() PD
+GPIO29 = MODE0(GPIO29) MODE1(NLD9) MODE2(SFCLK) MODE3() MODE4() MODE5(dbg_usb_dout[9]) MODE6(dbg_CLKSW_DIO[9]) MODE7() PD
+GPIO30 = MODE0(GPIO30) MODE1(NLD8) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[8]) MODE6(dbg_CLKSW_DIO[8]) MODE7() PD
+GPIO31 = MODE0(GPIO31) MODE1(NLD7) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[7]) MODE6(dbg_CLKSW_DIO[7]) MODE7(dbg_MIXED_DIO[7]) PD
+GPIO32 = MODE0(GPIO32) MODE1(NLD6) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[6]) MODE6(dbg_CLKSW_DIO[6]) MODE7(dbg_MIXED_DIO[6]) PD
+GPIO33 = MODE0(GPIO33) MODE1(NLD5) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[5]) MODE6(dbg_CLKSW_DIO[5]) MODE7(dbg_MIXED_DIO[5]) PD
+GPIO34 = MODE0(GPIO34) MODE1(NLD4) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[4]) MODE6(dbg_CLKSW_DIO[4]) MODE7(dbg_MIXED_DIO[4]) PD
+GPIO35 = MODE0(GPIO35) MODE1(NLD3) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[3]) MODE6(dbg_CLKSW_DIO[3]) MODE7(dbg_MIXED_DIO[3]) PD
+GPIO36 = MODE0(GPIO36) MODE1(NLD2) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[2]) MODE6(dbg_CLKSW_DIO[2]) MODE7(dbg_MIXED_DIO[2]) PD
+GPIO37 = MODE0(GPIO37) MODE1(NLD1) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[1]) MODE6(dbg_CLKSW_DIO[1]) MODE7(dbg_MIXED_DIO[1]) PD
+GPIO38 = MODE0(GPIO38) MODE1(NLD0) MODE2() MODE3() MODE4() MODE5(dbg_usb_dout[0]) MODE6(dbg_CLKSW_DIO[0]) MODE7(dbg_MIXED_DIO[0]) PD
+GPIO39 = MODE0(GPIO39) MODE1(NRNB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO40 = MODE0(GPIO40) MODE1(NCLE) MODE2(KROW7) MODE3(MC1DA4) MODE4() MODE5() MODE6() MODE7() PD
+GPIO41 = MODE0(GPIO41) MODE1(NALE) MODE2(KCOL7) MODE3(MC1DA5) MODE4() MODE5() MODE6() MODE7() PD
+GPIO42 = MODE0(GPIO42) MODE1(NWEB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO43 = MODE0(GPIO43) MODE1(NREB) MODE2() MODE3(MC1DA7) MODE4() MODE5() MODE6() MODE7() PU
+GPIO44 = MODE0(GPIO44) MODE1(NCE0B) MODE2(KROW6) MODE3(MC1DA6) MODE4() MODE5() MODE6() MODE7() PU
+GPIO45 = MODE0(GPIO45) MODE1(CMRST) MODE2() MODE3(D2_TID1) MODE4(dbg_mon[0]) MODE5() MODE6() MODE7() PD
+GPIO46 = MODE0(GPIO46) MODE1(CMPDN) MODE2() MODE3(D2_TID2) MODE4(dbg_mon[1]) MODE5(dbg_bt_ids_in) MODE6() MODE7(dbg_fm_ids_out[12]) PD
+GPIO47 = MODE0(GPIO47) MODE1(CMVSYNC) MODE2() MODE3() MODE4(dbg_mon[2]) MODE5(dbg_bt_ids_out[11]) MODE6(dbg_rf_test_sdatai) MODE7(dbg_fm_ids_out[11]) PD
+GPIO48 = MODE0(GPIO48) MODE1(CMHSYNC) MODE2() MODE3() MODE4(dbg_mon[3]) MODE5(dbg_bt_ids_out[10]) MODE6(dbg_rf_test_en) MODE7(dbg_fm_ids_out[10]) PD
+GPIO49 = MODE0(GPIO49) MODE1(CMPCLK) MODE2(CM_SSCK) MODE3() MODE4(dbg_mon[4]) MODE5(dbg_bt_ids_out[9]) MODE6(dbg_rf_test_sclk) MODE7(dbg_fm_ids_out[9]) PD
+GPIO50 = MODE0(GPIO50) MODE1(CMMCLK) MODE2() MODE3() MODE4(dbg_mon[5]) MODE5(dbg_bt_ids_out[8]) MODE6(dbg_rf_test_auxout) MODE7(dbg_fm_ids_out[8]) PD
+GPIO51 = MODE0(GPIO51) MODE1(CMDAT7) MODE2(BPI_BUS6) MODE3(D2_TID3) MODE4(dbg_mon[6]) MODE5(dbg_bt_ids_out[7]) MODE6(dbg_rf_test_dcxodelay) MODE7(dbg_fm_ids_out[7]) PD
+GPIO52 = MODE0(GPIO52) MODE1(CMDAT6) MODE2(BPI_BUS7) MODE3(D2_TID4) MODE4(dbg_mon[7]) MODE5(dbg_bt_ids_out[6]) MODE6(dbg_rf_test_enext) MODE7(dbg_fm_ids_out[6]) PD
+GPIO53 = MODE0(GPIO53) MODE1(CMDAT5) MODE2(BPI_BUS8) MODE3(D2_TID5) MODE4(dbg_mon[8]) MODE5(dbg_bt_ids_out[5]) MODE6(dbg_rf_test_enbt) MODE7(dbg_fm_ids_out[5]) PD
+GPIO54 = MODE0(GPIO54) MODE1(CMDAT4) MODE2(BPI_BUS9) MODE3(D2_TID6) MODE4(dbg_mon[9]) MODE5(dbg_bt_ids_out[4]) MODE6(dbg_rf_test_enbb) MODE7(dbg_fm_ids_out[4]) PD
+GPIO55 = MODE0(GPIO55) MODE1(CMDAT3) MODE2() MODE3(D2_TID7) MODE4(dbg_mon[10]) MODE5(dbg_bt_ids_out[3]) MODE6(dbg_rf_test_sdatao) MODE7(dbg_fm_ids_out[3]) PD
+GPIO56 = MODE0(GPIO56) MODE1(CMDAT2) MODE2() MODE3(D2_TID0) MODE4(dbg_mon[11]) MODE5(dbg_bt_ids_out[2]) MODE6(dbg_rf_test_sdatai) MODE7(dbg_fm_ids_out[2]) PD
+GPIO57 = MODE0(GPIO57) MODE1(CMDAT1) MODE2() MODE3() MODE4(dbg_mon[12]) MODE5(dbg_bt_ids_out[1]) MODE6(dbg_rf_test_en) MODE7(dbg_fm_ids_out[1]) PD
+GPIO58 = MODE0(GPIO58) MODE1(CMDAT0) MODE2(CM_SSDA) MODE3(D2ICK) MODE4(dbg_mon[13]) MODE5(dbg_bt_ids_out[0]) MODE6(dbg_rf_test_sclk) MODE7(dbg_fm_ids_out[0]) PD
+GPIO59 = MODE0(GPIO59) MODE1(SCL) MODE2() MODE3(D2ID) MODE4(dbg_mon[14]) MODE5(dbg_srclkena) MODE6(dbg_ABBSYS_DIO[0]) MODE7(dbg_MIXED_DIO[0]) PD
+GPIO60 = MODE0(GPIO60) MODE1(SDA) MODE2() MODE3(D2IMS) MODE4(dbg_mon[15]) MODE5() MODE6(dbg_ABBSYS_DIO[1]) MODE7(dbg_MIXED_DIO[1]) PD
+GPIO61 = MODE0(GPIO61) MODE1(EINT0) MODE2(LSCE0B) MODE3(CLKM6) MODE4() MODE5(NCE1B) MODE6(dbg_ABBSYS_DIO[2]) MODE7(dbg_MIXED_DIO[2]) PD
+GPIO62 = MODE0(GPIO62) MODE1(EINT1) MODE2(CIRQ0) MODE3(CLKM7) MODE4() MODE5() MODE6(dbg_ABBSYS_DIO[3]) MODE7(dbg_MIXED_DIO[3]) PD
+GPIO63 = MODE0(GPIO63) MODE1(EINT2) MODE2(CIRQ1) MODE3() MODE4() MODE5() MODE6(dbg_ABBSYS_DIO[4]) MODE7(dbg_MIXED_DIO[4]) PD
+GPIO64 = MODE0(GPIO64) MODE1(EINT3) MODE2(CIRQ2) MODE3(UCTS3) MODE4() MODE5() MODE6(dbg_ABBSYS_DIO[5]) MODE7(dbg_MIXED_DIO[5]) PD
+GPIO65 = MODE0(GPIO65) MODE1(EINT4) MODE2(PWM_C) MODE3(URTS3) MODE4(LSDI) MODE5() MODE6(dbg_ABBSYS_DIO[6]) MODE7(dbg_MIXED_DIO[6]) PD
+GPIO66 = MODE0(GPIO66) MODE1(DAICLK) MODE2(KROW6) MODE3(MC1INS) MODE4() MODE5() MODE6(dbg_ABBSYS_DIO[7]) MODE7(dbg_MIXED_DIO[7]) PD
+GPIO67 = MODE0(GPIO67) MODE1(DAIPCMOUT) MODE2(EDICK) MODE3(KCOL7) MODE4(SRCLKENAN) MODE5() MODE6(dbg_ABBSYS_DIO[8]) MODE7() PD
+GPIO68 = MODE0(GPIO68) MODE1(DAIPCMIN) MODE2(EDIWS) MODE3(CLKM4) MODE4(SCL) MODE5() MODE6(dbg_ABBSYS_DIO[9]) MODE7() PD
+GPIO69 = MODE0(GPIO69) MODE1(DAIRST) MODE2(EDIDAT) MODE3(SRCLKENA) MODE4(SDA) MODE5() MODE6(dbg_ABBSYS_DIO[10]) MODE7() PD
+GPIO70 = MODE0(GPIO70) MODE1(DAISYNC) MODE2(KROW7) MODE3(LSDI) MODE4(PWM_IN) MODE5() MODE6(dbg_ABBSYS_A_FUNC_DCK) MODE7(dbg_MIXED_A_FUNC_DCK) PD
+GPIO71 = MODE0(GPIO71) MODE1(KCOL6) MODE2(MC2INS) MODE3(LSDI) MODE4(PWM_IN) MODE5(EINT4) MODE6() MODE7() PU
+GPIO72 = MODE0(GPIO72) MODE1(KCOL5) MODE2(EINT5) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO73 = MODE0(GPIO73) MODE1(KCOL4) MODE2(SCL) MODE3() MODE4() MODE5(CLKSW_HMON_DATA[3]) MODE6(ABBSYS_HMON_DATA[3]) MODE7(MIXED_HMON_DATA[3]) PU
+GPIO74 = MODE0(GPIO74) MODE1(KCOL3) MODE2() MODE3() MODE4() MODE5(CLKSW_HMON_DATA[2]) MODE6(ABBSYS_HMON_DATA[2]) MODE7(MIXED_HMON_DATA[2]) PU
+GPIO75 = MODE0(GPIO75) MODE1(KCOL2) MODE2() MODE3() MODE4() MODE5(CLKSW_HMON_DATA[1]) MODE6(ABBSYS_HMON_DATA[1]) MODE7(MIXED_HMON_DATA[1]) PU
+GPIO76 = MODE0(GPIO76) MODE1(KCOL1) MODE2() MODE3() MODE4() MODE5(CLKSW_HMON_DATA[0]) MODE6(ABBSYS_HMON_DATA[0]) MODE7(MIXED_HMON_DATA[0]) PU
+GPIO77 = MODE0(GPIO77) MODE1(KCOL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO78 = MODE0(GPIO78) MODE1(KROW5) MODE2(EINT11) MODE3(SRCLKENAI) MODE4(MC2WP) MODE5(CLKSW_LMON_DATA[3]) MODE6(ABBSYS_LMON_DATA[3]) MODE7(MIXED_LMON_DATA[3]) PD
+GPIO79 = MODE0(GPIO79) MODE1(KROW4) MODE2(PWM_D) MODE3(CLKM5) MODE4(MC1WP) MODE5(EINT6) MODE6(dbg_ABBSYS_DIO[11]) MODE7() PD
+GPIO80 = MODE0(GPIO80) MODE1(KROW3) MODE2(SDA) MODE3() MODE4() MODE5() MODE6(dbg_ABBSYS_DIO[12]) MODE7() PD
+GPIO81 = MODE0(GPIO81) MODE1(KROW2) MODE2() MODE3() MODE4() MODE5(CLKSW_LMON_DATA[2]) MODE6(ABBSYS_LMON_DATA[2]) MODE7(MIXED_LMON_DATA[2]) PD
+GPIO82 = MODE0(GPIO82) MODE1(KROW1) MODE2() MODE3() MODE4() MODE5(CLKSW_LMON_DATA[1]) MODE6(ABBSYS_LMON_DATA[1]) MODE7(MIXED_LMON_DATA[1]) PD
+GPIO83 = MODE0(GPIO83) MODE1(KROW0) MODE2() MODE3() MODE4() MODE5(CLKSW_LMON_DATA[0]) MODE6(ABBSYS_LMON_DATA[0]) MODE7(MIXED_LMON_DATA[0]) PD
+GPIO84 = MODE0(GPIO84) MODE1(MC1RST) MODE2(MC1WP) MODE3(LSCE0B) MODE4(PTA1) MODE5() MODE6() MODE7() PD
+GPIO85 = MODE0(GPIO85) MODE1(MC1CK_FB) MODE2(MC2WP) MODE3() MODE4(PTA0) MODE5(BT_DBGI_N) MODE6() MODE7() PU
+GPIO86 = MODE0(GPIO86) MODE1(MC1CM0) MODE2() MODE3() MODE4() MODE5(BT_TRST_B) MODE6(dbg_mon[0]) MODE7(dbg_usb_dio[0]) PU
+GPIO87 = MODE0(GPIO87) MODE1(MC1DA0) MODE2() MODE3() MODE4() MODE5(BT_TCK) MODE6(dbg_mon[1]) MODE7(dbg_usb_dio[1]) PU
+GPIO88 = MODE0(GPIO88) MODE1(MC1DA1) MODE2() MODE3() MODE4() MODE5(BT_TDI) MODE6(dbg_mon[2]) MODE7(dbg_usb_dio[2]) PU
+GPIO89 = MODE0(GPIO89) MODE1(MC1DA2) MODE2() MODE3() MODE4() MODE5(BT_TMS) MODE6(dbg_mon[3]) MODE7(dbg_usb_dio[3]) PU
+GPIO90 = MODE0(GPIO90) MODE1(MC1DA3) MODE2() MODE3() MODE4() MODE5(BT_TDO) MODE6(dbg_mon[4]) MODE7(dbg_usb_dio[4]) PU
+GPIO91 = MODE0(GPIO91) MODE1(MC1CK) MODE2(EINT13) MODE3() MODE4() MODE5(BT_DBGACK_N) MODE6() MODE7() PU
+GPIO92 = MODE0(GPIO92) MODE1(MC2CM0) MODE2(MC1DA4) MODE3(KROW7) MODE4(URXD2) MODE5(PTA1) MODE6(dbg_mon[5]) MODE7(dbg_usb_dio[5]) PD
+GPIO93 = MODE0(GPIO93) MODE1(MC2DA0) MODE2(MC1DA5) MODE3(KCOL7) MODE4(UTXD2) MODE5(PTA0) MODE6(dbg_mon[6]) MODE7(dbg_usb_dio[6]) PD
+GPIO94 = MODE0(GPIO94) MODE1(MC2DA1) MODE2(MC1DA6) MODE3(KROW6) MODE4(PWM_A) MODE5(EDICK) MODE6(dbg_mon[7]) MODE7(dbg_usb_dio[7]) PD
+GPIO95 = MODE0(GPIO95) MODE1(MC2CK) MODE2(MC1DA7) MODE3(PWM_IN) MODE4(CLKM0) MODE5() MODE6() MODE7() PD
+GPIO96 = MODE0(GPIO96) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_mon[10]) MODE7(dbg_usb_dio[10]) PD
+GPIO97 = MODE0(GPIO97) MODE1(BPI_BUS1) MODE2(LSCE0B) MODE3() MODE4() MODE5() MODE6(dbg_mon[11]) MODE7(dbg_usb_dio[11]) PD
+GPIO98 = MODE0(GPIO98) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_mon[12]) MODE7(dbg_usb_dio[12]) PD
+GPIO99 = MODE0(GPIO99) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_mon[13]) MODE7(dbg_usb_dio[13]) PD
+GPIO100 = MODE0(GPIO100) MODE1(BPI_BUS4) MODE2(MC2INS) MODE3(LSCE1B) MODE4() MODE5() MODE6(dbg_mon[14]) MODE7(dbg_usb_dio[14]) PD
+GPIO101 = MODE0(GPIO101) MODE1(BPI_BUS5) MODE2(MC1INS) MODE3(EINT14) MODE4() MODE5() MODE6(dbg_mon[15]) MODE7(dbg_usb_dio[15]) PD
+GPIO102 = MODE0(GPIO102) MODE1(MC2DA2) MODE2(EINT6) MODE3() MODE4(PWM_D) MODE5(EDIWS) MODE6(dbg_mon[8]) MODE7(dbg_usb_dio[8]) PD
+GPIO103 = MODE0(GPIO103) MODE1(MC2DA3) MODE2(EINT9) MODE3() MODE4(MC1INS) MODE5(EDIDAT) MODE6(dbg_mon[9]) MODE7(dbg_usb_dio[9]) PD
+GPIO104 = MODE0(GPIO104) MODE1(EINT5) MODE2(MC1INS) MODE3(PWM_IN) MODE4(CLKM8) MODE5() MODE6() MODE7() PD
+
+[GPO]
+
+[EINT]
+EINT_COUNT=16
+EINT_DEBOUNCE_TIME_COUNT=16
+
+[EINT_EX_PIN]
+0
+1
+2
+3
+4
+5
+6
+7
+8
+9
+10
+11
+12
+13
+14
+22
+
+[EINT_INT_PIN]
+
+
+[ADC]
+ADC_COUNT = 5
+
+[ADC_INT_CH]
+0 = ADC_VBAT
+1 = ADC_VISENSE
+2 = ADC_VCHARGER
+3 = ADC_VBATTMP
+
+
+[ADC_EX_CH]
+6
+7
+13
+14
+15
+
+
+[KEYPAD]
+KEY_ROW=8
+KEY_COLUMN=9
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6256NP.fig b/mcu/custom/driver/drv/Drv_Tool/MT6256NP.fig
new file mode 100644
index 0000000..10f779f
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6256NP.fig
@@ -0,0 +1,154 @@
+[Chip Type]
+Chip = MT6256
+GPIO_Pull_Sel=1
+PMIC_Config=1
+PMIC_Volt_Format=1
+GPIO_ModeNum=8
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(SPI_MOSI) MODE2(CLKM1) MODE3(SCL) MODE4() MODE5(BPI_BUS6) MODE6() MODE7() PD
+GPIO1 = MODE0(GPIO1) MODE1(SPI_MISO) MODE2(PWM_B) MODE3(UCTS2) MODE4() MODE5(BPI_BUS7) MODE6() MODE7() PD
+GPIO2 = MODE0(GPIO2) MODE1(SPI_SCK) MODE2(SRCLKENAN) MODE3(URTS2) MODE4(PTA1) MODE5(BPI_BUS8) MODE6() MODE7() PD
+GPIO3 = MODE0(GPIO3) MODE1(SPI_CS_N) MODE2() MODE3(SDA) MODE4(PTA0) MODE5(BPI_BUS9) MODE6() MODE7() PD
+GPIO4 = MODE0(GPIO4) MODE1(URXD1) MODE2() MODE3(MC2INS) MODE4(PTA1) MODE5(PWM_C) MODE6() MODE7(UTXD1) PU
+GPIO5 = MODE0(GPIO5) MODE1(UTXD1) MODE2(CLKM3) MODE3(MC1INS) MODE4(PTA0) MODE5() MODE6() MODE7(URXD1) PU
+GPIO6 = MODE0(GPIO6) MODE1(UCTS1) MODE2(URXD3) MODE3(EINT7) MODE4(SRCLKENAI) MODE5(SCL) MODE6() MODE7() PU
+GPIO7 = MODE0(GPIO7) MODE1(URTS1) MODE2(UTXD3) MODE3(EINT8) MODE4(SRCLKENA) MODE5(SDA) MODE6() MODE7() PU
+GPIO8 = MODE0(GPIO8) MODE1(URXD2) MODE2(UCTS3) MODE3(MC2INS) MODE4(PTA1) MODE5(CLKM2) MODE6() MODE7(UTXD2) PD
+GPIO9 = MODE0(GPIO9) MODE1(UTXD2) MODE2(URTS3) MODE3(MC1INS) MODE4(PTA0) MODE5() MODE6() MODE7(URXD2) PD
+GPIO10 = MODE0(GPIO10) MODE1(LSA0) MODE2(URXD3) MODE3(PWM_IN) MODE4(EDICK) MODE5(SRCLKENA) MODE6(TDMA_SDAT[1]) MODE7(UTXD3) PD
+GPIO11 = MODE0(GPIO11) MODE1(LSCK) MODE2(UTXD3) MODE3(PWM_A) MODE4(EDIWS) MODE5(SRCLKENAI) MODE6() MODE7(URXD3) PD
+GPIO12 = MODE0(GPIO12) MODE1(LSDA) MODE2(LPCE3B) MODE3(EINT10) MODE4(EDIDAT) MODE5(SRCLKENAN) MODE6(TDMA_SDAT[0]) MODE7() PD
+GPIO13 = MODE0(GPIO13) MODE1(LPCE2B) MODE2(LSCE1B) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO14 = MODE0(GPIO14) MODE1(LPCE1B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO15 = MODE0(GPIO15) MODE1(LPCE0B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO16 = MODE0(GPIO16) MODE1(LPTE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO17 = MODE0(GPIO17) MODE1(LRSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO18 = MODE0(GPIO18) MODE1(LRDB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO19 = MODE0(GPIO19) MODE1(LPA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO20 = MODE0(GPIO20) MODE1(LWRB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO21 = MODE0(GPIO21) MODE1(NLD17) MODE2(URXD3) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO22 = MODE0(GPIO22) MODE1(NLD16) MODE2(UTXD3) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO23 = MODE0(GPIO23) MODE1(NLD15) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO24 = MODE0(GPIO24) MODE1(NLD14) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO25 = MODE0(GPIO25) MODE1(NLD13) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_A_FUNC_DCK) MODE7(dbg_MIXED_A_FUNC_DCK) PD
+GPIO26 = MODE0(GPIO26) MODE1(NLD12) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[12]) MODE7() PD
+GPIO27 = MODE0(GPIO27) MODE1(NLD11) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[11]) MODE7() PD
+GPIO28 = MODE0(GPIO28) MODE1(NLD10) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[10]) MODE7() PD
+GPIO29 = MODE0(GPIO29) MODE1(NLD9) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[9]) MODE7() PD
+GPIO30 = MODE0(GPIO30) MODE1(NLD8) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[8]) MODE7() PD
+GPIO31 = MODE0(GPIO31) MODE1(NLD7) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[7]) MODE7(dbg_MIXED_DIO[7]) PD
+GPIO32 = MODE0(GPIO32) MODE1(NLD6) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[6]) MODE7(dbg_MIXED_DIO[6]) PD
+GPIO33 = MODE0(GPIO33) MODE1(NLD5) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[5]) MODE7(dbg_MIXED_DIO[5]) PD
+GPIO34 = MODE0(GPIO34) MODE1(NLD4) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[4]) MODE7(dbg_MIXED_DIO[4]) PD
+GPIO35 = MODE0(GPIO35) MODE1(NLD3) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[3]) MODE7(dbg_MIXED_DIO[3]) PD
+GPIO36 = MODE0(GPIO36) MODE1(NLD2) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[2]) MODE7(dbg_MIXED_DIO[2]) PD
+GPIO37 = MODE0(GPIO37) MODE1(NLD1) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[1]) MODE7(dbg_MIXED_DIO[1]) PD
+GPIO38 = MODE0(GPIO38) MODE1(NLD0) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[0]) MODE7(dbg_MIXED_DIO[0]) PD
+GPIO39 = MODE0(GPIO39) MODE1(NRNB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO40 = MODE0(GPIO40) MODE1(NCLE) MODE2(KROW7) MODE3(MC1DA4) MODE4() MODE5() MODE6() MODE7() PD
+GPIO41 = MODE0(GPIO41) MODE1(NALE) MODE2(KCOL7) MODE3(MC1DA5) MODE4() MODE5() MODE6() MODE7() PD
+GPIO42 = MODE0(GPIO42) MODE1(NWEB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO43 = MODE0(GPIO43) MODE1(NREB) MODE2() MODE3(MC1DA7) MODE4() MODE5() MODE6() MODE7() PU
+GPIO44 = MODE0(GPIO44) MODE1(NCE0B) MODE2(KROW6) MODE3(MC1DA6) MODE4() MODE5() MODE6() MODE7() PU
+GPIO45 = MODE0(GPIO45) MODE1(CMRST) MODE2() MODE3(D2_TID1) MODE4(dbg_mon[0]) MODE5() MODE6() MODE7() PD
+GPIO46 = MODE0(GPIO46) MODE1(CMPDN) MODE2() MODE3(D2_TID2) MODE4(dbg_mon[1]) MODE5(dbg_bt_ids_in) MODE6() MODE7(dbg_fm_ids_out[12]) PD
+GPIO47 = MODE0(GPIO47) MODE1(CMVSYNC) MODE2() MODE3() MODE4(dbg_mon[2]) MODE5(dbg_bt_ids_out[11]) MODE6(dbg_rf_test_sdatai) MODE7(dbg_fm_ids_out[11]) PD
+GPIO48 = MODE0(GPIO48) MODE1(CMHSYNC) MODE2() MODE3() MODE4(dbg_mon[3]) MODE5(dbg_bt_ids_out[10]) MODE6(dbg_rf_test_en) MODE7(dbg_fm_ids_out[10]) PD
+GPIO49 = MODE0(GPIO49) MODE1(CMPCLK) MODE2(CM_SSCK) MODE3() MODE4(dbg_mon[4]) MODE5(dbg_bt_ids_out[9]) MODE6(dbg_rf_test_sclk) MODE7(dbg_fm_ids_out[9]) PD
+GPIO50 = MODE0(GPIO50) MODE1(CMMCLK) MODE2() MODE3() MODE4(dbg_mon[5]) MODE5(dbg_bt_ids_out[8]) MODE6(dbg_rf_test_auxout) MODE7(dbg_fm_ids_out[8]) PD
+GPIO51 = MODE0(GPIO51) MODE1(CMDAT7) MODE2(BPI_BUS6) MODE3(D2_TID3) MODE4(dbg_mon[6]) MODE5(dbg_bt_ids_out[7]) MODE6(dbg_rf_test_dcxodelay) MODE7(dbg_fm_ids_out[7]) PD
+GPIO52 = MODE0(GPIO52) MODE1(CMDAT6) MODE2(BPI_BUS7) MODE3(D2_TID4) MODE4(dbg_mon[7]) MODE5(dbg_bt_ids_out[6]) MODE6(dbg_rf_test_enext) MODE7(dbg_fm_ids_out[6]) PD
+GPIO53 = MODE0(GPIO53) MODE1(CMDAT5) MODE2(BPI_BUS8) MODE3(D2_TID5) MODE4(dbg_mon[8]) MODE5(dbg_bt_ids_out[5]) MODE6(dbg_rf_test_enbt) MODE7(dbg_fm_ids_out[5]) PD
+GPIO54 = MODE0(GPIO54) MODE1(CMDAT4) MODE2(BPI_BUS9) MODE3(D2_TID6) MODE4(dbg_mon[9]) MODE5(dbg_bt_ids_out[4]) MODE6(dbg_rf_test_enbb) MODE7(dbg_fm_ids_out[4]) PD
+GPIO55 = MODE0(GPIO55) MODE1(CMDAT3) MODE2() MODE3(D2_TID7) MODE4(dbg_mon[10]) MODE5(dbg_bt_ids_out[3]) MODE6(dbg_rf_test_sdatao) MODE7(dbg_fm_ids_out[3]) PD
+GPIO56 = MODE0(GPIO56) MODE1(CMDAT2) MODE2() MODE3(D2_TID0) MODE4(dbg_mon[11]) MODE5(dbg_bt_ids_out[2]) MODE6(dbg_rf_test_sdatai) MODE7(dbg_fm_ids_out[2]) PD
+GPIO57 = MODE0(GPIO57) MODE1(CMDAT1) MODE2() MODE3() MODE4(dbg_mon[12]) MODE5(dbg_bt_ids_out[1]) MODE6(dbg_rf_test_en) MODE7(dbg_fm_ids_out[1]) PD
+GPIO58 = MODE0(GPIO58) MODE1(CMDAT0) MODE2(CM_SSDA) MODE3(D2ICK) MODE4(dbg_mon[13]) MODE5(dbg_bt_ids_out[0]) MODE6(dbg_rf_test_sclk) MODE7(dbg_fm_ids_out[0]) PD
+GPIO59 = MODE0(GPIO59) MODE1(SCL) MODE2() MODE3(D2ID) MODE4(dbg_mon[14]) MODE5(dbg_srclkena) MODE6() MODE7() PD
+GPIO60 = MODE0(GPIO60) MODE1(SDA) MODE2() MODE3(D2IMS) MODE4(dbg_mon[15]) MODE5() MODE6() MODE7() PD
+GPIO61 = MODE0(GPIO61) MODE1(EINT0) MODE2(LSCE0B) MODE3() MODE4() MODE5(NCE1B) MODE6() MODE7() PD
+GPIO62 = MODE0(GPIO62) MODE1(EINT1) MODE2(CIRQ0) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO63 = MODE0(GPIO63) MODE1(EINT2) MODE2(CIRQ1) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO64 = MODE0(GPIO64) MODE1(EINT3) MODE2(CIRQ2) MODE3(UCTS3) MODE4() MODE5() MODE6() MODE7() PD
+GPIO65 = MODE0(GPIO65) MODE1(EINT4) MODE2(PWM_C) MODE3(URTS3) MODE4(LSDI) MODE5() MODE6() MODE7() PD
+GPIO66 = MODE0(GPIO66) MODE1(DAICLK) MODE2(KROW6) MODE3(MC1INS) MODE4() MODE5() MODE6() MODE7() PD
+GPIO67 = MODE0(GPIO67) MODE1(DAIPCMOUT) MODE2(EDICK) MODE3(KCOL7) MODE4(SRCLKENAN) MODE5() MODE6() MODE7() PD
+GPIO68 = MODE0(GPIO68) MODE1(DAIPCMIN) MODE2(EDIWS) MODE3(CLKM4) MODE4(SCL) MODE5() MODE6() MODE7() PD
+GPIO69 = MODE0(GPIO69) MODE1(DAIRST) MODE2(EDIDAT) MODE3(SRCLKENA) MODE4(SDA) MODE5() MODE6() MODE7() PD
+GPIO70 = MODE0(GPIO70) MODE1(DAISYNC) MODE2(KROW7) MODE3(LSDI) MODE4(PWM_IN) MODE5() MODE6() MODE7() PD
+GPIO71 = MODE0(GPIO71) MODE1(KCOL6) MODE2(MC2INS) MODE3(LSDI) MODE4(PWM_IN) MODE5(EINT4) MODE6() MODE7() PU
+GPIO72 = MODE0(GPIO72) MODE1(KCOL5) MODE2(EINT5) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO73 = MODE0(GPIO73) MODE1(KCOL4) MODE2(SCL) MODE3() MODE4() MODE5() MODE6(CLKSW_HMON_DATA[3]) MODE7(MIXED_HMON_DATA[3]) PU
+GPIO74 = MODE0(GPIO74) MODE1(KCOL3) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_HMON_DATA[2]) MODE7(MIXED_HMON_DATA[2]) PU
+GPIO75 = MODE0(GPIO75) MODE1(KCOL2) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_HMON_DATA[1]) MODE7(MIXED_HMON_DATA[1]) PU
+GPIO76 = MODE0(GPIO76) MODE1(KCOL1) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_HMON_DATA[0]) MODE7(MIXED_HMON_DATA[0]) PU
+GPIO77 = MODE0(GPIO77) MODE1(KCOL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO78 = MODE0(GPIO78) MODE1(KROW5) MODE2(EINT11) MODE3(SRCLKENAI) MODE4(MC2WP) MODE5() MODE6() MODE7() PD
+GPIO79 = MODE0(GPIO79) MODE1(KROW4) MODE2(PWM_D) MODE3(CLKM5) MODE4(MC1WP) MODE5(EINT6) MODE6(CLKSW_LMON_DATA[3]) MODE7(MIXED_LMON_DATA[3]) PD
+GPIO80 = MODE0(GPIO80) MODE1(KROW3) MODE2(SDA) MODE3() MODE4() MODE5() MODE6(CLKSW_LMON_DATA[2]) MODE7(MIXED_LMON_DATA[2]) PD
+GPIO81 = MODE0(GPIO81) MODE1(KROW2) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_LMON_DATA[1]) MODE7(MIXED_LMON_DATA[1]) PD
+GPIO82 = MODE0(GPIO82) MODE1(KROW1) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_LMON_DATA[0]) MODE7(MIXED_LMON_DATA[0]) PD
+GPIO83 = MODE0(GPIO83) MODE1(KROW0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO84 = MODE0(GPIO84) MODE1(MC1RST) MODE2(MC1WP) MODE3() MODE4(PTA1) MODE5() MODE6() MODE7() PU
+GPIO85 = MODE0(GPIO85) MODE1(MC1CK_FB) MODE2(MC2WP) MODE3() MODE4(PTA0) MODE5(BT_DBGI_N) MODE6() MODE7() PU
+GPIO86 = MODE0(GPIO86) MODE1(MC1CM0) MODE2() MODE3() MODE4() MODE5(BT_TRST_B) MODE6() MODE7() PU
+GPIO87 = MODE0(GPIO87) MODE1(MC1DA0) MODE2() MODE3() MODE4() MODE5(BT_TCK) MODE6() MODE7() PU
+GPIO88 = MODE0(GPIO88) MODE1(MC1DA1) MODE2() MODE3() MODE4() MODE5(BT_TDI) MODE6() MODE7() PU
+GPIO89 = MODE0(GPIO89) MODE1(MC1DA2) MODE2() MODE3() MODE4() MODE5(BT_TMS) MODE6() MODE7() PU
+GPIO90 = MODE0(GPIO90) MODE1(MC1DA3) MODE2() MODE3() MODE4() MODE5(BT_TDO) MODE6() MODE7() PU
+GPIO91 = MODE0(GPIO91) MODE1(MC1CK) MODE2() MODE3() MODE4() MODE5(BT_DBGACK_N) MODE6() MODE7() PU
+GPIO92 = MODE0(GPIO92) MODE1(MC2CM0) MODE2(MC1DA4) MODE3(KROW7) MODE4(URXD2) MODE5(PTA1) MODE6() MODE7() PD
+GPIO93 = MODE0(GPIO93) MODE1(MC2DA0) MODE2(MC1DA5) MODE3(KCOL7) MODE4(UTXD2) MODE5(PTA0) MODE6() MODE7() PD
+GPIO94 = MODE0(GPIO94) MODE1(MC2DA1) MODE2(MC1DA6) MODE3(KROW6) MODE4(PWM_A) MODE5(EDICK) MODE6() MODE7() PD
+GPIO95 = MODE0(GPIO95) MODE1(MC2CK) MODE2(MC1DA7) MODE3(PWM_IN) MODE4(CLKM0) MODE5() MODE6() MODE7() PD
+GPIO96 = MODE0(GPIO96) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO97 = MODE0(GPIO97) MODE1(BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO98 = MODE0(GPIO98) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO99 = MODE0(GPIO99) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO100 = MODE0(GPIO100) MODE1(BPI_BUS4) MODE2(MC2INS) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO101 = MODE0(GPIO101) MODE1(BPI_BUS5) MODE2(MC1INS) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO102 = MODE0(GPIO102) MODE1(MC2DA2) MODE2(EINT6) MODE3() MODE4(PWM_D) MODE5(EDIWS) MODE6() MODE7() PD
+GPIO103 = MODE0(GPIO103) MODE1(MC2DA3) MODE2(EINT9) MODE3() MODE4(MC1INS) MODE5(EDIDAT) MODE6() MODE7() PD
+GPIO104 = MODE0(GPIO104) MODE1(EINT5) MODE2(MC1INS) MODE3(PWM_IN) MODE4() MODE5() MODE6() MODE7() PD
+
+[GPO]
+
+[EINT]
+EINT_COUNT=12
+EINT_DEBOUNCE_TIME_COUNT=12
+
+[EINT_EX_PIN]
+0
+1
+2
+3
+4
+5
+6
+7
+8
+9
+10
+11
+
+[ADC]
+ADC_COUNT=3
+
+[ADC_INT_CH]
+0 = ADC_VBAT
+1 = ADC_VISENSE
+2 = ADC_VCHARGER
+3 = ADC_VBATTMP
+4 = ADC_PCBTMP
+5 = ADC_CHR_USB
+
+
+[ADC_EX_CH]
+6
+7
+8
+
+[KEYPAD]
+KEY_ROW=8
+KEY_COLUMN=9
\ No newline at end of file
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6256NP.fig.bak b/mcu/custom/driver/drv/Drv_Tool/MT6256NP.fig.bak
new file mode 100644
index 0000000..5a9ae18
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6256NP.fig.bak
@@ -0,0 +1,154 @@
+[Chip Type]
+Chip = MT6256
+GPIO_Pull_Sel=1
+PMIC_Config=0
+PMIC_Volt_Format=1
+GPIO_ModeNum=8
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(SPI_MOSI) MODE2(CLKM1) MODE3(SCL) MODE4() MODE5(BPI_BUS6) MODE6() MODE7() PD
+GPIO1 = MODE0(GPIO1) MODE1(SPI_MISO) MODE2(PWM_B) MODE3(UCTS2) MODE4() MODE5(BPI_BUS7) MODE6() MODE7() PD
+GPIO2 = MODE0(GPIO2) MODE1(SPI_SCK) MODE2(SRCLKENAN) MODE3(URTS2) MODE4(PTA1) MODE5(BPI_BUS8) MODE6() MODE7() PD
+GPIO3 = MODE0(GPIO3) MODE1(SPI_CS_N) MODE2() MODE3(SDA) MODE4(PTA0) MODE5(BPI_BUS9) MODE6() MODE7() PD
+GPIO4 = MODE0(GPIO4) MODE1(URXD1) MODE2() MODE3(MC2INS) MODE4(PTA1) MODE5(PWM_C) MODE6() MODE7(UTXD1) PU
+GPIO5 = MODE0(GPIO5) MODE1(UTXD1) MODE2(CLKM3) MODE3(MC1INS) MODE4(PTA0) MODE5() MODE6() MODE7(URXD1) PU
+GPIO6 = MODE0(GPIO6) MODE1(UCTS1) MODE2(URXD3) MODE3(EINT7) MODE4(SRCLKENAI) MODE5(SCL) MODE6() MODE7() PD
+GPIO7 = MODE0(GPIO7) MODE1(URTS1) MODE2(UTXD3) MODE3(EINT8) MODE4(SRCLKENA) MODE5(SDA) MODE6() MODE7() PD
+GPIO8 = MODE0(GPIO8) MODE1(URXD2) MODE2(UCTS3) MODE3(MC2INS) MODE4(PTA1) MODE5(CLKM2) MODE6() MODE7(UTXD2) PD
+GPIO9 = MODE0(GPIO9) MODE1(UTXD2) MODE2(URTS3) MODE3(MC1INS) MODE4(PTA0) MODE5() MODE6() MODE7(URXD2) PD
+GPIO10 = MODE0(GPIO10) MODE1(LSA0) MODE2(URXD3) MODE3(PWM_IN) MODE4(EDICK) MODE5(SRCLKENA) MODE6(TDMA_SDAT[1]) MODE7(UTXD3) PD
+GPIO11 = MODE0(GPIO11) MODE1(LSCK) MODE2(UTXD3) MODE3(PWM_A) MODE4(EDIWS) MODE5(SRCLKENAI) MODE6() MODE7(URXD3) PD
+GPIO12 = MODE0(GPIO12) MODE1(LSDA) MODE2(LPCE3B) MODE3(EINT10) MODE4(EDIDAT) MODE5(SRCLKENAN) MODE6(TDMA_SDAT[0]) MODE7() PD
+GPIO13 = MODE0(GPIO13) MODE1(LPCE2B) MODE2(LSCE1B) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO14 = MODE0(GPIO14) MODE1(LPCE1B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO15 = MODE0(GPIO15) MODE1(LPCE0B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO16 = MODE0(GPIO16) MODE1(LPTE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO17 = MODE0(GPIO17) MODE1(LRSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO18 = MODE0(GPIO18) MODE1(LRDB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO19 = MODE0(GPIO19) MODE1(LPA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO20 = MODE0(GPIO20) MODE1(LWRB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO21 = MODE0(GPIO21) MODE1(NLD17) MODE2(URXD3) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO22 = MODE0(GPIO22) MODE1(NLD16) MODE2(UTXD3) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO23 = MODE0(GPIO23) MODE1(NLD15) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO24 = MODE0(GPIO24) MODE1(NLD14) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO25 = MODE0(GPIO25) MODE1(NLD13) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_A_FUNC_DCK) MODE7(dbg_MIXED_A_FUNC_DCK) PD
+GPIO26 = MODE0(GPIO26) MODE1(NLD12) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[12]) MODE7() PD
+GPIO27 = MODE0(GPIO27) MODE1(NLD11) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[11]) MODE7() PD
+GPIO28 = MODE0(GPIO28) MODE1(NLD10) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[10]) MODE7() PD
+GPIO29 = MODE0(GPIO29) MODE1(NLD9) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[9]) MODE7() PD
+GPIO30 = MODE0(GPIO30) MODE1(NLD8) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[8]) MODE7() PD
+GPIO31 = MODE0(GPIO31) MODE1(NLD7) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[7]) MODE7(dbg_MIXED_DIO[7]) PD
+GPIO32 = MODE0(GPIO32) MODE1(NLD6) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[6]) MODE7(dbg_MIXED_DIO[6]) PD
+GPIO33 = MODE0(GPIO33) MODE1(NLD5) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[5]) MODE7(dbg_MIXED_DIO[5]) PD
+GPIO34 = MODE0(GPIO34) MODE1(NLD4) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[4]) MODE7(dbg_MIXED_DIO[4]) PD
+GPIO35 = MODE0(GPIO35) MODE1(NLD3) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[3]) MODE7(dbg_MIXED_DIO[3]) PD
+GPIO36 = MODE0(GPIO36) MODE1(NLD2) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[2]) MODE7(dbg_MIXED_DIO[2]) PD
+GPIO37 = MODE0(GPIO37) MODE1(NLD1) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[1]) MODE7(dbg_MIXED_DIO[1]) PD
+GPIO38 = MODE0(GPIO38) MODE1(NLD0) MODE2() MODE3() MODE4() MODE5() MODE6(dbg_CLKSW_DIO[0]) MODE7(dbg_MIXED_DIO[0]) PD
+GPIO39 = MODE0(GPIO39) MODE1(NRNB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO40 = MODE0(GPIO40) MODE1(NCLE) MODE2(KROW7) MODE3(MC1DA4) MODE4() MODE5() MODE6() MODE7() PD
+GPIO41 = MODE0(GPIO41) MODE1(NALE) MODE2(KCOL7) MODE3(MC1DA5) MODE4() MODE5() MODE6() MODE7() PD
+GPIO42 = MODE0(GPIO42) MODE1(NWEB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO43 = MODE0(GPIO43) MODE1(NREB) MODE2() MODE3(MC1DA7) MODE4() MODE5() MODE6() MODE7() PU
+GPIO44 = MODE0(GPIO44) MODE1(NCE0B) MODE2(KROW6) MODE3(MC1DA6) MODE4() MODE5() MODE6() MODE7() PU
+GPIO45 = MODE0(GPIO45) MODE1(CMRST) MODE2() MODE3(D2_TID1) MODE4(dbg_mon[0]) MODE5() MODE6() MODE7() PD
+GPIO46 = MODE0(GPIO46) MODE1(CMPDN) MODE2() MODE3(D2_TID2) MODE4(dbg_mon[1]) MODE5(dbg_bt_ids_in) MODE6() MODE7(dbg_fm_ids_out[12]) PD
+GPIO47 = MODE0(GPIO47) MODE1(CMVSYNC) MODE2() MODE3() MODE4(dbg_mon[2]) MODE5(dbg_bt_ids_out[11]) MODE6(dbg_rf_test_sdatai) MODE7(dbg_fm_ids_out[11]) PD
+GPIO48 = MODE0(GPIO48) MODE1(CMHSYNC) MODE2() MODE3() MODE4(dbg_mon[3]) MODE5(dbg_bt_ids_out[10]) MODE6(dbg_rf_test_en) MODE7(dbg_fm_ids_out[10]) PD
+GPIO49 = MODE0(GPIO49) MODE1(CMPCLK) MODE2(CM_SSCK) MODE3() MODE4(dbg_mon[4]) MODE5(dbg_bt_ids_out[9]) MODE6(dbg_rf_test_sclk) MODE7(dbg_fm_ids_out[9]) PD
+GPIO50 = MODE0(GPIO50) MODE1(CMMCLK) MODE2() MODE3() MODE4(dbg_mon[5]) MODE5(dbg_bt_ids_out[8]) MODE6(dbg_rf_test_auxout) MODE7(dbg_fm_ids_out[8]) PD
+GPIO51 = MODE0(GPIO51) MODE1(CMDAT7) MODE2(BPI_BUS6) MODE3(D2_TID3) MODE4(dbg_mon[6]) MODE5(dbg_bt_ids_out[7]) MODE6(dbg_rf_test_dcxodelay) MODE7(dbg_fm_ids_out[7]) PD
+GPIO52 = MODE0(GPIO52) MODE1(CMDAT6) MODE2(BPI_BUS7) MODE3(D2_TID4) MODE4(dbg_mon[7]) MODE5(dbg_bt_ids_out[6]) MODE6(dbg_rf_test_enext) MODE7(dbg_fm_ids_out[6]) PD
+GPIO53 = MODE0(GPIO53) MODE1(CMDAT5) MODE2(BPI_BUS8) MODE3(D2_TID5) MODE4(dbg_mon[8]) MODE5(dbg_bt_ids_out[5]) MODE6(dbg_rf_test_enbt) MODE7(dbg_fm_ids_out[5]) PD
+GPIO54 = MODE0(GPIO54) MODE1(CMDAT4) MODE2(BPI_BUS9) MODE3(D2_TID6) MODE4(dbg_mon[9]) MODE5(dbg_bt_ids_out[4]) MODE6(dbg_rf_test_enbb) MODE7(dbg_fm_ids_out[4]) PD
+GPIO55 = MODE0(GPIO55) MODE1(CMDAT3) MODE2() MODE3(D2_TID7) MODE4(dbg_mon[10]) MODE5(dbg_bt_ids_out[3]) MODE6(dbg_rf_test_sdatao) MODE7(dbg_fm_ids_out[3]) PD
+GPIO56 = MODE0(GPIO56) MODE1(CMDAT2) MODE2() MODE3(D2_TID0) MODE4(dbg_mon[11]) MODE5(dbg_bt_ids_out[2]) MODE6(dbg_rf_test_sdatai) MODE7(dbg_fm_ids_out[2]) PD
+GPIO57 = MODE0(GPIO57) MODE1(CMDAT1) MODE2() MODE3() MODE4(dbg_mon[12]) MODE5(dbg_bt_ids_out[1]) MODE6(dbg_rf_test_en) MODE7(dbg_fm_ids_out[1]) PD
+GPIO58 = MODE0(GPIO58) MODE1(CMDAT0) MODE2(CM_SSDA) MODE3(D2ICK) MODE4(dbg_mon[13]) MODE5(dbg_bt_ids_out[0]) MODE6(dbg_rf_test_sclk) MODE7(dbg_fm_ids_out[0]) PD
+GPIO59 = MODE0(GPIO59) MODE1(SCL) MODE2() MODE3(D2ID) MODE4(dbg_mon[14]) MODE5(dbg_srclkena) MODE6() MODE7() PD
+GPIO60 = MODE0(GPIO60) MODE1(SDA) MODE2() MODE3(D2IMS) MODE4(dbg_mon[15]) MODE5() MODE6() MODE7() PD
+GPIO61 = MODE0(GPIO61) MODE1(EINT0) MODE2(LSCE0B) MODE3() MODE4() MODE5(NCE1B) MODE6() MODE7() PD
+GPIO62 = MODE0(GPIO62) MODE1(EINT1) MODE2(CIRQ0) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO63 = MODE0(GPIO63) MODE1(EINT2) MODE2(CIRQ1) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO64 = MODE0(GPIO64) MODE1(EINT3) MODE2(CIRQ2) MODE3(UCTS3) MODE4() MODE5() MODE6() MODE7() PD
+GPIO65 = MODE0(GPIO65) MODE1(EINT4) MODE2(PWM_C) MODE3(URTS3) MODE4(LSDI) MODE5() MODE6() MODE7() PD
+GPIO66 = MODE0(GPIO66) MODE1(DAICLK) MODE2(KROW6) MODE3(MC1INS) MODE4() MODE5() MODE6() MODE7() PD
+GPIO67 = MODE0(GPIO67) MODE1(DAIPCMOUT) MODE2(EDICK) MODE3(KCOL7) MODE4(SRCLKENAN) MODE5() MODE6() MODE7() PD
+GPIO68 = MODE0(GPIO68) MODE1(DAIPCMIN) MODE2(EDIWS) MODE3(CLKM4) MODE4(SCL) MODE5() MODE6() MODE7() PD
+GPIO69 = MODE0(GPIO69) MODE1(DAIRST) MODE2(EDIDAT) MODE3(SRCLKENA) MODE4(SDA) MODE5() MODE6() MODE7() PD
+GPIO70 = MODE0(GPIO70) MODE1(DAISYNC) MODE2(KROW7) MODE3(LSDI) MODE4(PWM_IN) MODE5() MODE6() MODE7() PD
+GPIO71 = MODE0(GPIO71) MODE1(KCOL6) MODE2(MC2INS) MODE3(LSDI) MODE4(PWM_IN) MODE5(EINT4) MODE6() MODE7() PU
+GPIO72 = MODE0(GPIO72) MODE1(KCOL5) MODE2(EINT5) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO73 = MODE0(GPIO73) MODE1(KCOL4) MODE2(SCL) MODE3() MODE4() MODE5() MODE6(CLKSW_HMON_DATA[3]) MODE7(MIXED_HMON_DATA[3]) PU
+GPIO74 = MODE0(GPIO74) MODE1(KCOL3) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_HMON_DATA[2]) MODE7(MIXED_HMON_DATA[2]) PU
+GPIO75 = MODE0(GPIO75) MODE1(KCOL2) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_HMON_DATA[1]) MODE7(MIXED_HMON_DATA[1]) PU
+GPIO76 = MODE0(GPIO76) MODE1(KCOL1) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_HMON_DATA[0]) MODE7(MIXED_HMON_DATA[0]) PU
+GPIO77 = MODE0(GPIO77) MODE1(KCOL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO78 = MODE0(GPIO78) MODE1(KROW5) MODE2(EINT11) MODE3(SRCLKENAI) MODE4(MC2WP) MODE5() MODE6() MODE7() PD
+GPIO79 = MODE0(GPIO79) MODE1(KROW4) MODE2(PWM_D) MODE3(CLKM5) MODE4(MC1WP) MODE5(EINT6) MODE6(CLKSW_LMON_DATA[3]) MODE7(MIXED_LMON_DATA[3]) PD
+GPIO80 = MODE0(GPIO80) MODE1(KROW3) MODE2(SDA) MODE3() MODE4() MODE5() MODE6(CLKSW_LMON_DATA[2]) MODE7(MIXED_LMON_DATA[2]) PD
+GPIO81 = MODE0(GPIO81) MODE1(KROW2) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_LMON_DATA[1]) MODE7(MIXED_LMON_DATA[1]) PD
+GPIO82 = MODE0(GPIO82) MODE1(KROW1) MODE2() MODE3() MODE4() MODE5() MODE6(CLKSW_LMON_DATA[0]) MODE7(MIXED_LMON_DATA[0]) PD
+GPIO83 = MODE0(GPIO83) MODE1(KROW0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO84 = MODE0(GPIO84) MODE1(MC1RST) MODE2(MC1WP) MODE3() MODE4(PTA1) MODE5() MODE6() MODE7() PU
+GPIO85 = MODE0(GPIO85) MODE1(MC1CK_FB) MODE2(MC2WP) MODE3() MODE4(PTA0) MODE5(BT_DBGI_N) MODE6() MODE7() PU
+GPIO86 = MODE0(GPIO86) MODE1(MC1CM0) MODE2() MODE3() MODE4() MODE5(BT_TRST_B) MODE6() MODE7() PU
+GPIO87 = MODE0(GPIO87) MODE1(MC1DA0) MODE2() MODE3() MODE4() MODE5(BT_TCK) MODE6() MODE7() PU
+GPIO88 = MODE0(GPIO88) MODE1(MC1DA1) MODE2() MODE3() MODE4() MODE5(BT_TDI) MODE6() MODE7() PU
+GPIO89 = MODE0(GPIO89) MODE1(MC1DA2) MODE2() MODE3() MODE4() MODE5(BT_TMS) MODE6() MODE7() PU
+GPIO90 = MODE0(GPIO90) MODE1(MC1DA3) MODE2() MODE3() MODE4() MODE5(BT_TDO) MODE6() MODE7() PU
+GPIO91 = MODE0(GPIO91) MODE1(MC1CK) MODE2() MODE3() MODE4() MODE5(BT_DBGACK_N) MODE6() MODE7() PU
+GPIO92 = MODE0(GPIO92) MODE1(MC2CM0) MODE2(MC1DA4) MODE3(KROW7) MODE4(URXD2) MODE5(PTA1) MODE6() MODE7() PD
+GPIO93 = MODE0(GPIO93) MODE1(MC2DA0) MODE2(MC1DA5) MODE3(KCOL7) MODE4(UTXD2) MODE5(PTA0) MODE6() MODE7() PD
+GPIO94 = MODE0(GPIO94) MODE1(MC2DA1) MODE2(MC1DA6) MODE3(KROW6) MODE4(PWM_A) MODE5(EDICK) MODE6() MODE7() PD
+GPIO95 = MODE0(GPIO95) MODE1(MC2CK) MODE2(MC1DA7) MODE3(PWM_IN) MODE4(CLKM0) MODE5() MODE6() MODE7() PD
+GPIO96 = MODE0(GPIO96) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO97 = MODE0(GPIO97) MODE1(BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO98 = MODE0(GPIO98) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO99 = MODE0(GPIO99) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO100 = MODE0(GPIO100) MODE1(BPI_BUS4) MODE2(MC2INS) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO101 = MODE0(GPIO101) MODE1(BPI_BUS5) MODE2(MC1INS) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO102 = MODE0(GPIO102) MODE1(MC2DA2) MODE2(EINT6) MODE3() MODE4(PWM_D) MODE5(EDIWS) MODE6() MODE7() PD
+GPIO103 = MODE0(GPIO103) MODE1(MC2DA3) MODE2(EINT9) MODE3() MODE4(MC1INS) MODE5(EDIDAT) MODE6() MODE7() PD
+GPIO104 = MODE0(GPIO104) MODE1(EINT5) MODE2(MC1INS) MODE3(PWM_IN) MODE4() MODE5() MODE6() MODE7() PD
+
+[GPO]
+
+[EINT]
+EINT_COUNT=12
+EINT_DEBOUNCE_TIME_COUNT=12
+
+[EINT_EX_PIN]
+0
+1
+2
+3
+4
+5
+6
+7
+8
+9
+10
+11
+
+[ADC]
+ADC_COUNT=3
+
+[ADC_INT_CH]
+0 = ADC_VBAT
+1 = ADC_VISENSE
+2 = ADC_VCHARGER
+3 = ADC_VBATTMP
+4 = ADC_PCBTMP
+5 = ADC_CHR_USB
+
+
+[ADC_EX_CH]
+6
+7
+8
+
+[KEYPAD]
+KEY_ROW=8
+KEY_COLUMN=9
\ No newline at end of file
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6268.fig b/mcu/custom/driver/drv/Drv_Tool/MT6268.fig
new file mode 100644
index 0000000..02f72d2
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6268.fig
@@ -0,0 +1,118 @@
+[Chip Type]
+Chip = MT6268
+GPIO_Pull_Sel=1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(BPI_BUS0) MODE2() MODE3() PUPD
+GPIO1 = MODE0(GPIO1) MODE1(BPI_BUS1) MODE2() MODE3() PUPD
+GPIO2 = MODE0(GPIO2) MODE1(BPI_BUS2) MODE2() MODE3() PUPD
+GPIO3 = MODE0(GPIO3) MODE1(BPI_BUS3) MODE2() MODE3() PUPD
+GPIO4 = MODE0(GPIO4) MODE1(BPI_BUS9) MODE2() MODE3() PUPD
+GPIO5 = MODE0(GPIO5) MODE1(BPI_BUS10) MODE2() MODE3() PUPD
+GPIO6 = MODE0(GPIO6) MODE1(BPI_BUS16) MODE2() MODE3() PUPD
+GPIO7 = MODE0(GPIO7) MODE1(BPI_BUS17) MODE2() MODE3() PUPD
+GPIO8 = MODE0(GPIO8) MODE1(BPI_BUS18) MODE2() MODE3() PUPD
+GPIO9 = MODE0(GPIO9) MODE1(BPI_BUS19) MODE2() MODE3() PUPD
+GPIO10= MODE0(GPIO10) MODE1(BSI0_CS1) MODE2() MODE3() PUPD
+GPIO11= MODE0(GPIO11) MODE1(BSI1_CS0) MODE2() MODE3() PUPD
+GPIO12= MODE0(GPIO12) MODE1(BSI1_CS1) MODE2() MODE3() PUPD
+GPIO13= MODE0(GPIO13) MODE1(BSI1_DATA) MODE2() MODE3() PUPD
+GPIO14= MODE0(GPIO14) MODE1(BSI1_CLK) MODE2() MODE3() PUPD
+GPIO15= MODE0(GPIO15) MODE1(BSI_DIN) MODE2() MODE3() PUPD
+GPIO16= MODE0(GPIO16) MODE1(CMMCLK) MODE2(LOG_DATA[15]) MODE3(TDTIRQ) PUPD
+GPIO17= MODE0(GPIO17) MODE1(I:CMPCLK) MODE2(LOG_DATA[14]) MODE3(TCTIRQ1) PUPD
+GPIO18= MODE0(GPIO18) MODE1(CMRST) MODE2(LOG_DATA[13]) MODE3(TBTXEN) PUPD
+GPIO19= MODE0(GPIO19) MODE1(CMPDN) MODE2(LOG_DATA[12]) MODE3(TBTXFS) PUPD
+GPIO20= MODE0(GPIO20) MODE1(CMVREF) MODE2(LOG_DATA[11]) MODE3(TBRXEN) PUPD
+GPIO21= MODE0(GPIO21) MODE1(CMHREF) MODE2(LOG_DATA[10]) MODE3(TBRXFS) PUPD
+GPIO22= MODE0(GPIO22) MODE1(CMDAT9) MODE2(LOG_DATA[9]) MODE3(D1ICK) PUPD
+GPIO23= MODE0(GPIO23) MODE1(CMDAT8) MODE2(LOG_DATA[8]) MODE3(D1ID) PUPD
+GPIO24= MODE0(GPIO24) MODE1(CMDAT7) MODE2(LOG_DATA[7]) MODE3(D1IMS) PUPD
+GPIO25= MODE0(GPIO25) MODE1(CMDAT6) MODE2(LOG_DATA[6]) MODE3(D2ICK) PUPD
+GPIO26= MODE0(GPIO26) MODE1(CMDAT5) MODE2(LOG_DATA[5]) MODE3(D2ID) PUPD
+GPIO27= MODE0(GPIO27) MODE1(CMDAT4) MODE2(LOG_DATA[4]) MODE3(D2IMS) PUPD
+GPIO28= MODE0(GPIO28) MODE1(CMDAT3) MODE2(LOG_DATA[3]) MODE3(TCTIRQ2) PUPD
+GPIO29= MODE0(GPIO29) MODE1(CMDAT2) MODE2(LOG_DATA[2]) MODE3(TEVTVAL) PUPD
+GPIO30= MODE0(GPIO30) MODE1(CMDAT1) MODE2(LOG_DATA[1]) MODE3(D2_TID0) PUPD
+GPIO31= MODE0(GPIO31) MODE1(CMDAT0) MODE2(LOG_DATA[0]) MODE3(D2_TID1) PUPD
+GPIO32= MODE0(GPIO32) MODE1(CMFLASH) MODE2(X4W_LOG_CLK) MODE3(D2_TID2) PUPD
+GPIO33= MODE0(GPIO33) MODE1(SCL) MODE2(LOG_SLOT_STRB) MODE3(D2_TID3) PUPD
+GPIO34= MODE0(GPIO34) MODE1(SDA) MODE2(LOG_DATA_RDY) MODE3(D2_TID4) PUPD
+GPIO35= MODE0(GPIO35) MODE1(PWM1_OUT) MODE2(DEBUG6) MODE3(D2_TID5) PUPD
+GPIO36= MODE0(GPIO36) MODE1(PWM2_OUT) MODE2(DEBUG7) MODE3(D2_TID6) PUPD
+GPIO37= MODE0(GPIO37) MODE1(IRQ0) MODE2(CLKM0) MODE3(D1_TID0) PUPD
+GPIO38= MODE0(GPIO38) MODE1(IRQ1) MODE2(CLKM1) MODE3(D1_TID1) PUPD
+GPIO39= MODE0(GPIO39) MODE1(SRCLKENAI) MODE2() MODE3() PUPD
+GPIO40= MODE0(GPIO40) MODE1(SCL_DUAL) MODE2() MODE3() PUPD
+GPIO41= MODE0(GPIO41) MODE1(SDA_DUAL) MODE2() MODE3() PUPD
+GPIO42= MODE0(GPIO42) MODE1(PASEL) MODE2() MODE3() PUPD
+GPIO43= MODE0(GPIO43) MODE1(IRQ2) MODE2(CLKM2) MODE3(I:EXT_FRAME_SYNC) PUPD
+GPIO44= MODE0(GPIO44) MODE1(IRQ3) MODE2(CLKM3) MODE3() PUPD
+GPIO45= MODE0(GPIO45) MODE1(SPI_CS) MODE2(CAM_MECH1) MODE3(TDMA_D1) PUPD
+GPIO46= MODE0(GPIO46) MODE1(SPI_SCK) MODE2(CAM_STROBE) MODE3(TDMA_CK) PUPD
+GPIO47= MODE0(GPIO47) MODE1(SPI_MOSI) MODE2(SRCCLKENAI2) MODE3(TDMA_D0) PUPD
+GPIO48= MODE0(GPIO48) MODE1(SPI_MISO) MODE2(CAM_MECH0) MODE3(TDMA_FS) PUPD
+GPIO49= MODE0(GPIO49) MODE1(EINT2) MODE2() MODE3() PUPD
+GPIO50= MODE0(GPIO50) MODE1(EINT3) MODE2() MODE3() PUPD
+GPIO51= MODE0(GPIO51) MODE1(DAICLK) MODE2() MODE3() PUPD
+GPIO52= MODE0(GPIO52) MODE1(DAIPCMOUT) MODE2() MODE3() PUPD
+GPIO53= MODE0(GPIO53) MODE1(DAIPCMIN) MODE2() MODE3() PUPD
+GPIO54= MODE0(GPIO54) MODE1(DAISYNC) MODE2() MODE3() PUPD
+GPIO55= MODE0(GPIO55) MODE1(DAIRST) MODE2() MODE3() PUPD
+GPIO56= MODE0(GPIO56) MODE1(URXD2) MODE2() MODE3() PUPD
+GPIO57= MODE0(GPIO57) MODE1(UTXD2) MODE2() MODE3() PUPD
+GPIO58= MODE0(GPIO58) MODE1(URTS2) MODE2() MODE3() PUPD
+GPIO59= MODE0(GPIO59) MODE1(UCTS2) MODE2() MODE3() PUPD
+GPIO60= MODE0(GPIO60) MODE1(MIRQ) MODE2(CLKM2) MODE3() PUPD
+GPIO61= MODE0(GPIO61) MODE1(LSCK) MODE2(EDICK) MODE3(VM[0]) PUPD
+GPIO62= MODE0(GPIO62) MODE1(LSA0) MODE2(EDIWS) MODE3(VM[1]) PUPD
+GPIO63= MODE0(GPIO63) MODE1(LSDA) MODE2(EDIDAT) MODE3(DEBUG8) PUPD
+GPIO64= MODE0(GPIO64) MODE1(LSCE0B) MODE2(CLKM4) MODE3(DEBUG9) PUPD
+GPIO65= MODE0(GPIO65) MODE1(LSCE1B) MODE2(LPCE2B) MODE3(DEBUG10) PUPD
+GPIO66= MODE0(GPIO66) MODE1(LPCE1B) MODE2(NCE1B) MODE3(DEBUG11) PUPD
+GPIO67= MODE0(GPIO67) MODE1(LPTE) MODE2() MODE3(DEBUG12) PUPD
+GPIO68= MODE0(GPIO68) MODE1(NLD17) MODE2() MODE3(DEBUG13) PUPD
+GPIO69= MODE0(GPIO69) MODE1(NLD16) MODE2() MODE3(DEBUG14) PUPD
+GPIO70= MODE0(GPIO70) MODE1(PWM3_OUT) MODE2() MODE3() PUPD
+GPIO71= MODE0(GPIO71) MODE1(PWM4_OUT) MODE2() MODE3() PUPD
+GPIO72= MODE0(GPIO72) MODE1(PWM5_OUT) MODE2() MODE3() PUPD
+GPIO73= MODE0(GPIO73) MODE1(PWM6_OUT) MODE2() MODE3() PUPD
+GPIO74= MODE0(GPIO74) MODE1(URTS1) MODE2() MODE3() PUPD
+GPIO75= MODE0(GPIO75) MODE1(UCTS1) MODE2() MODE3() PUPD
+GPIO76= MODE0(GPIO76) MODE1(URXD3) MODE2(IRDA_RXD) MODE3() PUPD
+GPIO77= MODE0(GPIO77) MODE1(UTXD3) MODE2(IRDA_TXD) MODE3() PUPD
+GPIO78= MODE0(GPIO78) MODE1(IRQ4) MODE2(IRDA_PDN) MODE3(DEBUG15) PUPD
+GPIO79= MODE0(GPIO79) MODE1(IRQ5) MODE2() MODE3() PUPD
+GPIO80= MODE0(GPIO80) MODE1(IRQ6) MODE2(CLKM2) MODE3() PUPD
+GPIO81= MODE0(GPIO81) MODE1(USB_DRVVBUS) MODE2(CLKM3) MODE3() PUPD
+GPIO82= MODE0(GPIO82) MODE1(EINT6) MODE2(CLKM4) MODE3() PUPD
+GPIO83= MODE0(GPIO83) MODE1(EINT7) MODE2(CLKM5) MODE3() PUPD
+GPIO84= MODE0(GPIO84) MODE1(MC1CM0) MODE2() MODE3(DEBUG0) PUPD
+GPIO85= MODE0(GPIO85) MODE1(MC1DA0) MODE2(CLKM0) MODE3(DEBUG1) PUPD
+GPIO86= MODE0(GPIO86) MODE1(MC1DA1) MODE2(IMC0DA4) MODE3(DEBUG2) PUPD
+GPIO87= MODE0(GPIO87) MODE1(MC1CK) MODE2(IMC0DA5) MODE3(DEBUG3) PUPD
+GPIO88= MODE0(GPIO88) MODE1(MC1WP) MODE2(IMC0DA6) MODE3(DEBUG4) PUPD
+GPIO89= MODE0(GPIO89) MODE1(MC1INS) MODE2(IMC0DA7) MODE3(DEBUG5) PUPD
+GPIO90= MODE0(GPIO90) MODE1(KCOL7) MODE2(CLKM1) MODE3() PUPD
+GPIO91= MODE0(GPIO91) MODE1(KCOL6) MODE2() MODE3() PUPD
+GPIO92= MODE0(GPIO92) MODE1(KROW7) MODE2() MODE3() PUPD
+GPIO93= MODE0(GPIO93) MODE1(KROW6) MODE2() MODE3() PUPD
+GPIO94= MODE0(GPIO94) MODE1(EINT0) MODE2() MODE3() PUPD
+GPIO95= MODE0(GPIO95) MODE1(EINT1) MODE2() MODE3() PUPD
+GPIO96= MODE0(GPIO96) MODE1(EINT4) MODE2() MODE3() PUPD
+GPIO97= MODE0(GPIO97) MODE1(EINT5) MODE2() MODE3() PUPD
+GPIO98= MODE0(GPIO98) MODE1() MODE2(CLKM2) MODE3() PUPD
+GPIO99= MODE0(GPIO99) MODE1() MODE2(CLKM3) MODE3() PUPD
+
+[GPO]
+
+[EINT]
+EINT_COUNT=14
+EINT_DEBOUNCE_TIME_COUNT=14
+
+[ADC]
+ADC_COUNT=10
+
+[KEYPAD]
+KEY_ROW=8
+KEY_COLUMN=9
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6268A.fig b/mcu/custom/driver/drv/Drv_Tool/MT6268A.fig
new file mode 100644
index 0000000..901e301
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6268A.fig
@@ -0,0 +1,119 @@
+[Chip Type]
+Chip = MT6268A
+GPIO_Pull_Sel=1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(O:BPI_BUS0) MODE2() MODE3() PUPD
+GPIO1 = MODE0(GPIO1) MODE1(O:BPI_BUS1) MODE2() MODE3() PUPD
+GPIO2 = MODE0(GPIO2) MODE1(O:BPI_BUS2) MODE2() MODE3() PUPD
+GPIO3 = MODE0(GPIO3) MODE1(O:BPI_BUS3) MODE2() MODE3() PUPD
+GPIO4 = MODE0(GPIO4) MODE1(O:BPI_BUS9) MODE2() MODE3() PUPD
+GPIO5 = MODE0(GPIO5) MODE1(O:BPI_BUS10) MODE2() MODE3() PUPD
+GPIO6 = MODE0(GPIO6) MODE1(O:BPI_BUS16) MODE2() MODE3() PUPD
+GPIO7 = MODE0(GPIO7) MODE1(O:BPI_BUS17) MODE2() MODE3() PUPD
+GPIO8 = MODE0(GPIO8) MODE1(O:BPI_BUS18) MODE2() MODE3() PUPD
+GPIO9 = MODE0(GPIO9) MODE1(O:BPI_BUS19) MODE2() MODE3() PUPD
+GPIO10= MODE0(GPIO10) MODE1(O:BSI0_CS1) MODE2() MODE3() PUPD
+GPIO11= MODE0(GPIO11) MODE1(O:BSI1_CS0) MODE2() MODE3() PUPD
+GPIO12= MODE0(GPIO12) MODE1(O:BSI1_CS1) MODE2() MODE3() PUPD
+GPIO13= MODE0(GPIO13) MODE1(BSI1_DATA) MODE2() MODE3() PUPD
+GPIO14= MODE0(GPIO14) MODE1(O:BSI1_CLK) MODE2() MODE3() PUPD
+GPIO15= MODE0(GPIO15) MODE1(I0:BSI_DIN) MODE2() MODE3() PUPD
+GPIO16= MODE0(GPIO16) MODE1(O:CMRST) MODE2(O:TDTIRQ) MODE3(O:TBTXEN) PUPD
+GPIO17= MODE0(GPIO17) MODE1(O:CMPDN) MODE2(O:TCTIRQ1) MODE3(O:TBTXFS) PUPD
+GPIO18= MODE0(GPIO18) MODE1(I0:CMVREF) MODE2(O:TCTIRQ2) MODE3(O:TBRXEN) PUPD
+GPIO19= MODE0(GPIO19) MODE1(I0:CMHREF) MODE2(O:TEVTVAL) MODE3(O:TBRXFS) PUPD
+GPIO20= MODE0(GPIO20) MODE1(I0:CMDAT9) MODE2() MODE3(I0:D1ICK) PUPD
+GPIO21= MODE0(GPIO21) MODE1(I0:CMDAT8) MODE2() MODE3(IO0:D1ID) PUPD
+GPIO22= MODE0(GPIO22) MODE1(I0:CMDAT7) MODE2() MODE3(I0:D1IMS) PUPD
+GPIO23= MODE0(GPIO23) MODE1(I0:CMDAT6) MODE2() MODE3(I0:D2ICK) PUPD
+GPIO24= MODE0(GPIO24) MODE1(I0:CMDAT5) MODE2() MODE3(IO0:D2ID) PUPD
+GPIO25= MODE0(GPIO25) MODE1(I0:CMDAT4) MODE2() MODE3(I0:D2IMS) PUPD
+GPIO26= MODE0(GPIO26) MODE1(I0:CMDAT1) MODE2() MODE3(O:D2_TID0) PUPD
+GPIO27= MODE0(GPIO27) MODE1(I0:CMDAT0) MODE2() MODE3(O:D2_TID1) PUPD
+GPIO28= MODE0(GPIO28) MODE1(O:CMFLASH) MODE2() MODE3(O:D2_TID2) PUPD
+GPIO29= MODE0(GPIO29) MODE1(IO1:SCL0) MODE2() MODE3(O:D2_TID3) PUPD
+GPIO30= MODE0(GPIO30) MODE1(IO1:SDA0) MODE2() MODE3(O:D2_TID4) PUPD
+GPIO31= MODE0(GPIO31) MODE1(O:PWM0) MODE2() MODE3(O:D2_TID5) PUPD
+GPIO32= MODE0(GPIO32) MODE1(O:PWM1) MODE2() MODE3(O:D2_TID6) PUPD
+GPIO33= MODE0(GPIO33) MODE1(I1:IRQ0) MODE2(O:CLKM0) MODE3(O:D1_TID0) PUPD
+GPIO34= MODE0(GPIO34) MODE1(I1:IRQ1) MODE2(O:CLKM1) MODE3(O:D1_TID1) PUPD
+GPIO35= MODE0(GPIO35) MODE1(I0:SRCLKENAI) MODE2() MODE3() PUPD
+GPIO36= MODE0(GPIO36) MODE1(IO1:SCL1) MODE2() MODE3() PUPD
+GPIO37= MODE0(GPIO37) MODE1(IO1:SDA1) MODE2() MODE3() PUPD
+GPIO38= MODE0(GPIO38) MODE1(O:PASEL) MODE2() MODE3() PUPD
+GPIO39= MODE0(GPIO39) MODE1(I1:IRQ2) MODE2(O:CLKM2) MODE3() PUPD
+GPIO40= MODE0(GPIO40) MODE1(I1:IRQ3) MODE2(O:CLKM3) MODE3() PUPD
+GPIO41= MODE0(GPIO41) MODE1(O:SPI_CS) MODE2(O:CAM_MECH1) MODE3(O:TDMA_D1) PUPD
+GPIO42= MODE0(GPIO42) MODE1(O:SPI_SCK) MODE2(IO0:CAM_STROBE) MODE3(O:TDMA_CK) PUPD
+GPIO43= MODE0(GPIO43) MODE1(O:SPI_MOSI) MODE2() MODE3(O:TDMA_D0) PUPD
+GPIO44= MODE0(GPIO44) MODE1(I1:SPI_MISO) MODE2(O:CAM_MECH0) MODE3(O:TDMA_FS) PUPD
+GPIO45= MODE0(GPIO45) MODE1(I1:EINT2) MODE2() MODE3() PUPD
+GPIO46= MODE0(GPIO46) MODE1(I1:EINT3) MODE2() MODE3() PUPD
+GPIO47= MODE0(GPIO47) MODE1(O:DAICLK) MODE2() MODE3() PUPD
+GPIO48= MODE0(GPIO48) MODE1(O:DAIPCMOUT) MODE2() MODE3() PUPD
+GPIO49= MODE0(GPIO49) MODE1(I0:DAIPCMIN) MODE2() MODE3() PUPD
+GPIO50= MODE0(GPIO50) MODE1(O:DAISYNC) MODE2() MODE3() PUPD
+GPIO51= MODE0(GPIO51) MODE1(I1:DAIRST) MODE2() MODE3() PUPD
+GPIO52= MODE0(GPIO52) MODE1(I1:URXD2) MODE2() MODE3() PUPD
+GPIO53= MODE0(GPIO53) MODE1(O:UTXD2) MODE2() MODE3() PUPD
+GPIO54= MODE0(GPIO54) MODE1(O:URTS2) MODE2() MODE3() PUPD
+GPIO55= MODE0(GPIO55) MODE1(I1:UCTS2) MODE2() MODE3() PUPD
+GPIO56= MODE0(GPIO56) MODE1(I1:MIRQ) MODE2() MODE3() PUPD
+GPIO57= MODE0(GPIO57) MODE1(O:TRACEPKT0) MODE2(O:X4W_LOG_CLK) MODE3() PUPD
+GPIO58= MODE0(GPIO58) MODE1(O:TRACEPKT1) MODE2(O:LOG_SLOT_STRB) MODE3() PUPD
+GPIO59= MODE0(GPIO59) MODE1(O:TRACEPKT2) MODE2(O:LOG_DATA_RDY) MODE3() PUPD
+GPIO60= MODE0(GPIO60) MODE1(O:TRACEPKT3) MODE2(O:LOG_DATA[0]) MODE3(O:DBG_DATA[0]) PUPD
+GPIO61= MODE0(GPIO61) MODE1(O:TRACEPKT4) MODE2(O:LOG_DATA[1]) MODE3(O:DBG_DATA[1]) PUPD
+GPIO62= MODE0(GPIO62) MODE1(O:TRACEPKT5) MODE2(O:LOG_DATA[2]) MODE3(O:DBG_DATA[2]) PUPD
+GPIO63= MODE0(GPIO63) MODE1(O:TRACEPKT6) MODE2(O:LOG_DATA[3]) MODE3(O:DBG_DATA[3]) PUPD
+GPIO64= MODE0(GPIO64) MODE1(O:TRACEPKT7) MODE2(O:LOG_DATA[4]) MODE3(O:DBG_DATA[4]) PUPD
+GPIO65= MODE0(GPIO65) MODE1(O:TRACEPKT8) MODE2(O:LOG_DATA[5]) MODE3(O:DBG_DATA[5]) PUPD
+GPIO66= MODE0(GPIO66) MODE1(O:TRACEPKT9) MODE2(O:LOG_DATA[6]) MODE3(O:DBG_DATA[6]) PUPD
+GPIO67= MODE0(GPIO67) MODE1(O:TRACEPKT10) MODE2(O:LOG_DATA[7]) MODE3(O:DBG_DATA[7]) PUPD
+GPIO68= MODE0(GPIO68) MODE1(O:TRACEPKT11) MODE2(O:LOG_DATA[8]) MODE3(O:DBG_DATA[8]) PUPD
+GPIO69= MODE0(GPIO69) MODE1(O:TRACEPKT12) MODE2(O:LOG_DATA[9]) MODE3(O:DBG_DATA[9]) PUPD
+GPIO70= MODE0(GPIO70) MODE1(O:TRACEPKT13) MODE2(O:LOG_DATA[10]) MODE3(O:DBG_DATA[10]) PUPD
+GPIO71= MODE0(GPIO71) MODE1(O:TRACEPKT14) MODE2(O:LOG_DATA[11]) MODE3(O:DBG_DATA[11]) PUPD
+GPIO72= MODE0(GPIO72) MODE1(O:TRACEPKT15) MODE2(O:LOG_DATA[12]) MODE3(O:DBG_DATA[12]) PUPD
+GPIO73= MODE0(GPIO73) MODE1(O:TRACESYNC) MODE2(O:LOG_DATA[13]) MODE3(O:DBG_DATA[13]) PUPD
+GPIO74= MODE0(GPIO74) MODE1(O:TRACECLK) MODE2(O:LOG_DATA[14]) MODE3(O:DBG_DATA[14]) PUPD
+GPIO75= MODE0(GPIO75) MODE1(O:PIPESTAT0) MODE2(O:LOG_DATA[15]) MODE3(O:DBG_DATA[15]) PUPD
+GPIO76= MODE0(GPIO76) MODE1(O:PIPESTAT1) MODE2() MODE3(O:AUX_PEN_IRQ) PUPD
+GPIO77= MODE0(GPIO77) MODE1(O:PIPESTAT2) MODE2() MODE3() PUPD
+GPIO78= MODE0(GPIO78) MODE1(O:LSCK) MODE2(IO0:EDICK) MODE3(O:VM[0]) PUPD
+GPIO79= MODE0(GPIO79) MODE1(O:LSA0) MODE2(IO0:EDIWS) MODE3(O:VM[1]) PUPD
+GPIO80= MODE0(GPIO80) MODE1(O:LSDA) MODE2(IO0:EDIDAT) MODE3() PUPD
+GPIO81= MODE0(GPIO81) MODE1(O:LSCE0B) MODE2(O:CLKM4) MODE3() PUPD
+GPIO82= MODE0(GPIO82) MODE1(O:LSCE1B) MODE2(O:LPCE2B) MODE3() PUPD
+GPIO83= MODE0(GPIO83) MODE1(O:LPCE1B) MODE2(O:NCE1B) MODE3() PUPD
+GPIO84= MODE0(GPIO84) MODE1(I0:LPTE) MODE2() MODE3() PUPD
+GPIO85= MODE0(GPIO85) MODE1(NLD17) MODE2() MODE3() PUPD
+GPIO86= MODE0(GPIO86) MODE1(NLD16) MODE2() MODE3() PUPD
+GPIO87= MODE0(GPIO87) MODE1(O:PWM2) MODE2() MODE3() PUPD
+GPIO88= MODE0(GPIO88) MODE1(O:PWM3) MODE2() MODE3() PUPD
+GPIO89= MODE0(GPIO89) MODE1(O:PWM4) MODE2() MODE3() PUPD
+GPIO90= MODE0(GPIO90) MODE1(O:PWM5) MODE2() MODE3() PUPD
+GPIO91= MODE0(GPIO91) MODE1(O:URTS1) MODE2() MODE3() PUPD
+GPIO92= MODE0(GPIO92) MODE1(I:UCTS1) MODE2() MODE3() PUPD
+GPIO93= MODE0(GPIO93) MODE1(I1:URXD3) MODE2(I1:IRDA_RXD) MODE3() PUPD
+GPIO94= MODE0(GPIO94) MODE1(O:UTXD3) MODE2(O:IRDA_TXD) MODE3() PUPD
+GPIO95= MODE0(GPIO95) MODE1(I1:IRQ4) MODE2(O:IRDA_PDN) MODE3() PUPD
+GPIO96= MODE0(GPIO96) MODE1(I1:IRQ5) MODE2() MODE3() PUPD
+GPIO97= MODE0(GPIO97) MODE1() MODE2(O:CLKM2) MODE3() PUPD
+GPIO98= MODE0(GPIO98) MODE1(O:USB_DRVVBUS) MODE2(O:CLKM3) MODE3() PUPD
+GPIO99= MODE0(GPIO99) MODE1(I1:EINT6) MODE2(O:CLKM4) MODE3() PUPD
+GPIO100= MODE0(GPIO100) MODE1(I1:EINT7) MODE2(O:CLKM5) MODE3() PUPD
+
+[GPO]
+
+[EINT]
+EINT_COUNT=14
+EINT_DEBOUNCE_TIME_COUNT=14
+
+[ADC]
+ADC_COUNT=9
+
+[KEYPAD]
+KEY_ROW=8
+KEY_COLUMN=9
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6268B.fig b/mcu/custom/driver/drv/Drv_Tool/MT6268B.fig
new file mode 100644
index 0000000..3d9789e
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6268B.fig
@@ -0,0 +1,118 @@
+[Chip Type]
+Chip = MT6268
+GPIO_Pull_Sel=1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(O:BPI_BUS0) MODE2() MODE3() PUPD
+GPIO1 = MODE0(GPIO1) MODE1(O:BPI_BUS1) MODE2() MODE3() PUPD
+GPIO2 = MODE0(GPIO2) MODE1(O:BPI_BUS2) MODE2() MODE3() PUPD
+GPIO3 = MODE0(GPIO3) MODE1(O:BPI_BUS3) MODE2() MODE3() PUPD
+GPIO4 = MODE0(GPIO4) MODE1(O:BPI_BUS9) MODE2() MODE3() PUPD
+GPIO5 = MODE0(GPIO5) MODE1(O:BPI_BUS10) MODE2() MODE3() PUPD
+GPIO6 = MODE0(GPIO6) MODE1(O:BPI_BUS16) MODE2() MODE3() PUPD
+GPIO7 = MODE0(GPIO7) MODE1(O:BPI_BUS17) MODE2() MODE3() PUPD
+GPIO8 = MODE0(GPIO8) MODE1(O:BPI_BUS18) MODE2() MODE3() PUPD
+GPIO9 = MODE0(GPIO9) MODE1(O:BPI_BUS19) MODE2() MODE3() PUPD
+GPIO10= MODE0(GPIO10) MODE1(O:BSI0_CS1) MODE2() MODE3() PUPD
+GPIO11= MODE0(GPIO11) MODE1(O:BSI1_CS0) MODE2() MODE3() PUPD
+GPIO12= MODE0(GPIO12) MODE1(O:BSI1_CS1) MODE2() MODE3() PUPD
+GPIO13= MODE0(GPIO13) MODE1(BSI1_DATA) MODE2() MODE3() PUPD
+GPIO14= MODE0(GPIO14) MODE1(O:BSI1_CLK) MODE2() MODE3() PUPD
+GPIO15= MODE0(GPIO15) MODE1(I0:BSI_DIN) MODE2() MODE3() PUPD
+GPIO16= MODE0(GPIO16) MODE1(O:CMMCLK) MODE2(O:LOG_DATA[15]) MODE3(O:TDTIRQ) PUPD
+GPIO17= MODE0(GPIO17) MODE1(I:CMPCLK) MODE2(O:LOG_DATA[14]) MODE3(O:TCTIRQ1) PUPD
+GPIO18= MODE0(GPIO18) MODE1(O:CMRST) MODE2(O:LOG_DATA[13]) MODE3(O:TBTXEN) PUPD
+GPIO19= MODE0(GPIO19) MODE1(O:CMPDN) MODE2(O:LOG_DATA[12]) MODE3(O:TBTXFS) PUPD
+GPIO20= MODE0(GPIO20) MODE1(I0:CMVREF) MODE2(O:LOG_DATA[11]) MODE3(O:TBRXEN) PUPD
+GPIO21= MODE0(GPIO21) MODE1(I0:CMHREF) MODE2(O:LOG_DATA[10]) MODE3(O:TBRXFS) PUPD
+GPIO22= MODE0(GPIO22) MODE1(I0:CMDAT9) MODE2(O:LOG_DATA[9]) MODE3(I0:D1ICK) PUPD
+GPIO23= MODE0(GPIO23) MODE1(I0:CMDAT8) MODE2(O:LOG_DATA[8]) MODE3(IO0:D1ID) PUPD
+GPIO24= MODE0(GPIO24) MODE1(I0:CMDAT7) MODE2(O:LOG_DATA[7]) MODE3(I0:D1IMS) PUPD
+GPIO25= MODE0(GPIO25) MODE1(I0:CMDAT6) MODE2(O:LOG_DATA[6]) MODE3(I0:D2ICK) PUPD
+GPIO26= MODE0(GPIO26) MODE1(I0:CMDAT5) MODE2(O:LOG_DATA[5]) MODE3(IO0:D2ID) PUPD
+GPIO27= MODE0(GPIO27) MODE1(I0:CMDAT4) MODE2(O:LOG_DATA[4]) MODE3(I0:D2IMS) PUPD
+GPIO28= MODE0(GPIO28) MODE1(I0:CMDAT3) MODE2(O:LOG_DATA[3]) MODE3(O:TCTIRQ2) PUPD
+GPIO29= MODE0(GPIO29) MODE1(I0:CMDAT2) MODE2(O:LOG_DATA[2]) MODE3(O:TEVTVAL) PUPD
+GPIO30= MODE0(GPIO30) MODE1(I0:CMDAT1) MODE2(O:LOG_DATA[1]) MODE3(O:D2_TID0) PUPD
+GPIO31= MODE0(GPIO31) MODE1(I0:CMDAT0) MODE2(O:LOG_DATA[0]) MODE3(O:D2_TID1) PUPD
+GPIO32= MODE0(GPIO32) MODE1(O:CMFLASH) MODE2(O:X4W_LOG_CLK) MODE3(O:D2_TID2) PUPD
+GPIO33= MODE0(GPIO33) MODE1(IO1:SCL) MODE2(O:LOG_SLOT_STRB) MODE3(O:D2_TID3) PUPD
+GPIO34= MODE0(GPIO34) MODE1(IO1:SDA) MODE2(O:LOG_DATA_RDY) MODE3(O:D2_TID4) PUPD
+GPIO35= MODE0(GPIO35) MODE1(O:PWM1_OUT) MODE2(O:DEBUG6) MODE3(O:D2_TID5) PUPD
+GPIO36= MODE0(GPIO36) MODE1(O:PWM2_OUT) MODE2(O:DEBUG7) MODE3(O:D2_TID6) PUPD
+GPIO37= MODE0(GPIO37) MODE1(I1:IRQ0) MODE2(O:CLKM0) MODE3(O:D1_TID0) PUPD
+GPIO38= MODE0(GPIO38) MODE1(I1:IRQ1) MODE2(O:CLKM1) MODE3(O:D1_TID1) PUPD
+GPIO39= MODE0(GPIO39) MODE1(I0:SRCLKENAI) MODE2() MODE3() PUPD
+GPIO40= MODE0(GPIO40) MODE1(IO1:SCL_DUAL) MODE2() MODE3() PUPD
+GPIO41= MODE0(GPIO41) MODE1(IO1:SDA_DUAL) MODE2() MODE3() PUPD
+GPIO42= MODE0(GPIO42) MODE1(O:PASEL) MODE2() MODE3() PUPD
+GPIO43= MODE0(GPIO43) MODE1(I1:IRQ2) MODE2(O:CLKM2) MODE3(I:EXT_FRAME_SYNC) PUPD
+GPIO44= MODE0(GPIO44) MODE1(I1:IRQ3) MODE2(O:CLKM3) MODE3() PUPD
+GPIO45= MODE0(GPIO45) MODE1(O:SPI_CS) MODE2(O:CAM_MECH1) MODE3(O:TDMA_D1) PUPD
+GPIO46= MODE0(GPIO46) MODE1(O:SPI_SCK) MODE2(IO0:CAM_STROBE) MODE3(O:TDMA_CK) PUPD
+GPIO47= MODE0(GPIO47) MODE1(O:SPI_MOSI) MODE2(I0:SRCCLKENAI2) MODE3(O:TDMA_D0) PUPD
+GPIO48= MODE0(GPIO48) MODE1(I1:SPI_MISO) MODE2(O:CAM_MECH0) MODE3(O:TDMA_FS) PUPD
+GPIO49= MODE0(GPIO49) MODE1(I1:EINT2) MODE2() MODE3() PUPD
+GPIO50= MODE0(GPIO50) MODE1(I1:EINT3) MODE2() MODE3() PUPD
+GPIO51= MODE0(GPIO51) MODE1(O:DAICLK) MODE2() MODE3() PUPD
+GPIO52= MODE0(GPIO52) MODE1(O:DAIPCMOUT) MODE2() MODE3() PUPD
+GPIO53= MODE0(GPIO53) MODE1(I0:DAIPCMIN) MODE2() MODE3() PUPD
+GPIO54= MODE0(GPIO54) MODE1(O:DAISYNC) MODE2() MODE3() PUPD
+GPIO55= MODE0(GPIO55) MODE1(I1:DAIRST) MODE2() MODE3() PUPD
+GPIO56= MODE0(GPIO56) MODE1(I1:URXD2) MODE2() MODE3() PUPD
+GPIO57= MODE0(GPIO57) MODE1(O:UTXD2) MODE2() MODE3() PUPD
+GPIO58= MODE0(GPIO58) MODE1(O:URTS2) MODE2() MODE3() PUPD
+GPIO59= MODE0(GPIO59) MODE1(I1:UCTS2) MODE2() MODE3() PUPD
+GPIO60= MODE0(GPIO60) MODE1(I1:MIRQ) MODE2(O:CLKM2) MODE3() PUPD
+GPIO61= MODE0(GPIO61) MODE1(O:LSCK) MODE2(IO0:EDICK) MODE3(O:VM[0]) PUPD
+GPIO62= MODE0(GPIO62) MODE1(O:LSA0) MODE2(IO0:EDIWS) MODE3(O:VM[1]) PUPD
+GPIO63= MODE0(GPIO63) MODE1(O:LSDA) MODE2(IO0:EDIDAT) MODE3(O:DEBUG8) PUPD
+GPIO64= MODE0(GPIO64) MODE1(O:LSCE0B) MODE2(O:CLKM4) MODE3(O:DEBUG9) PUPD
+GPIO65= MODE0(GPIO65) MODE1(O:LSCE1B) MODE2(O:LPCE2B) MODE3(O:DEBUG10) PUPD
+GPIO66= MODE0(GPIO66) MODE1(O:LPCE1B) MODE2(O:NCE1B) MODE3(O:DEBUG11) PUPD
+GPIO67= MODE0(GPIO67) MODE1(I0:LPTE) MODE2() MODE3(O:DEBUG12) PUPD
+GPIO68= MODE0(GPIO68) MODE1(NLD17) MODE2() MODE3(O:DEBUG13) PUPD
+GPIO69= MODE0(GPIO69) MODE1(NLD16) MODE2() MODE3(O:DEBUG14) PUPD
+GPIO70= MODE0(GPIO70) MODE1(O:PWM3_OUT) MODE2() MODE3() PUPD
+GPIO71= MODE0(GPIO71) MODE1(O:PWM4_OUT) MODE2() MODE3() PUPD
+GPIO72= MODE0(GPIO72) MODE1(O:PWM5_OUT) MODE2() MODE3() PUPD
+GPIO73= MODE0(GPIO73) MODE1(O:PWM6_OUT) MODE2() MODE3() PUPD
+GPIO74= MODE0(GPIO74) MODE1(O:URTS1) MODE2() MODE3() PUPD
+GPIO75= MODE0(GPIO75) MODE1(I1:UCTS1) MODE2() MODE3() PUPD
+GPIO76= MODE0(GPIO76) MODE1(I1:URXD3) MODE2(I1:IRDA_RXD) MODE3() PUPD
+GPIO77= MODE0(GPIO77) MODE1(O:UTXD3) MODE2(O:IRDA_TXD) MODE3() PUPD
+GPIO78= MODE0(GPIO78) MODE1(I1:IRQ4) MODE2(O:IRDA_PDN) MODE3(O:DEBUG15) PUPD
+GPIO79= MODE0(GPIO79) MODE1(I1:IRQ5) MODE2() MODE3() PUPD
+GPIO80= MODE0(GPIO80) MODE1(I1:IRQ6) MODE2(O:CLKM2) MODE3() PUPD
+GPIO81= MODE0(GPIO81) MODE1(O:USB_DRVVBUS) MODE2(O:CLKM3) MODE3() PUPD
+GPIO82= MODE0(GPIO82) MODE1(I1:EINT6) MODE2(O:CLKM4) MODE3() PUPD
+GPIO83= MODE0(GPIO83) MODE1(I1:EINT7) MODE2(O:CLKM5) MODE3() PUPD
+GPIO84= MODE0(GPIO84) MODE1(IO0:MC1CM0) MODE2() MODE3(O:DEBUG0) PUPD
+GPIO85= MODE0(GPIO85) MODE1(IO0:MC1DA0) MODE2(O:CLKM0) MODE3(O:DEBUG1) PUPD
+GPIO86= MODE0(GPIO86) MODE1(IO0:MC1DA1) MODE2(IO:MC0DA4) MODE3(O:DEBUG2) PUPD
+GPIO87= MODE0(GPIO87) MODE1(IO0:MC1CK) MODE2(IO:MC0DA5) MODE3(O:DEBUG3) PUPD
+GPIO88= MODE0(GPIO88) MODE1(I0:MC1WP) MODE2(IO:MC0DA6) MODE3(O:DEBUG4) PUPD
+GPIO89= MODE0(GPIO89) MODE1(I0:MC1INS) MODE2(IO:MC0DA7) MODE3(O:DEBUG5) PUPD
+GPIO90= MODE0(GPIO90) MODE1(I1:KCOL7) MODE2(O:CLKM1) MODE3() PUPD
+GPIO91= MODE0(GPIO91) MODE1(I1:KCOL6) MODE2() MODE3() PUPD
+GPIO92= MODE0(GPIO92) MODE1(KROW7) MODE2() MODE3() PUPD
+GPIO93= MODE0(GPIO93) MODE1(KROW6) MODE2() MODE3() PUPD
+GPIO94= MODE0(GPIO94) MODE1(I1:EINT0) MODE2() MODE3() PUPD
+GPIO95= MODE0(GPIO95) MODE1(I1:EINT1) MODE2() MODE3() PUPD
+GPIO96= MODE0(GPIO96) MODE1(I1:EINT4) MODE2() MODE3() PUPD
+GPIO97= MODE0(GPIO97) MODE1(I1:EINT5) MODE2() MODE3() PUPD
+GPIO98= MODE0(GPIO98) MODE1() MODE2(O:CLKM2) MODE3() PUPD
+GPIO99= MODE0(GPIO99) MODE1() MODE2(O:CLKM3) MODE3() PUPD
+
+[GPO]
+
+[EINT]
+EINT_COUNT=14
+EINT_DEBOUNCE_TIME_COUNT=14
+
+[ADC]
+ADC_COUNT=10
+
+[KEYPAD]
+KEY_ROW=8
+KEY_COLUMN=8
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6268T.fig b/mcu/custom/driver/drv/Drv_Tool/MT6268T.fig
new file mode 100644
index 0000000..62c8b36
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6268T.fig
@@ -0,0 +1,33 @@
+[Chip Type]
+Chip = MT6268T
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(O:TDMA_CTIRQ1_B) MODE2(O:PWM1) MODE3() PU
+GPIO1 = MODE0(GPIO1) MODE1(O:TDMA_CTIRQ2_B) MODE2(O:PWM2) MODE3() PU
+GPIO2 = MODE0(GPIO2) MODE1(O:O:TDMA_BTXEN) MODE2(O:TDMA_CK) MODE3() PU
+GPIO3 = MODE0(GPIO3) MODE1(O:TDMA_BTXFS) MODE2(O:TDMA_FS) MODE3() PU
+GPIO4 = MODE0(GPIO4) MODE1(O:TDMA_BRXEN) MODE2(O:TDMA_SDAT[0]) MODE3() PU
+GPIO5 = MODE0(GPIO5) MODE1(O:TDMA_BRXFS) MODE2(O:TDMA_SDAT[1]) MODE3() PU
+GPIO6 = MODE0(GPIO6) MODE1(I:BSI_DIN) MODE2() MODE3() PU
+GPIO7 = MODE0(GPIO7) MODE1(O:DSP1_TID[0]) MODE2() MODE3() PU
+GPIO8 = MODE0(GPIO8) MODE1(O:DSP1_TID[1]) MODE2() MODE3() PU
+GPIO9 = MODE0(GPIO9) MODE1(O:DSP2_TID[0]) MODE2() MODE3() PU
+GPIO10= MODE0(GPIO10) MODE1(O:DSP2_TID[1]) MODE2() MODE3() PU
+GPIO11= MODE0(GPIO11) MODE1(O:DSP2_TID[2]) MODE2() MODE3() PU
+GPIO12= MODE0(GPIO12) MODE1(O:DSP2_TID[3]) MODE2() MODE3() PU
+GPIO13= MODE0(GPIO13) MODE1(O:DSP2_TID[4]) MODE2() MODE3() PU
+GPIO14= MODE0(GPIO14) MODE1(O:DSP2_TID[5]) MODE2() MODE3() PU
+GPIO15= MODE0(GPIO15) MODE1(O:DSP2_TID[6]) MODE2() MODE3() PU
+
+[GPO]
+
+[EINT]
+EINT_COUNT = 8
+EINT_DEBOUNCE_TIME_COUNT = 4
+
+[ADC]
+ADC_COUNT=8
+
+[KEYPAD]
+KEY_ROW=7
+KEY_COLUMN=8
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6270A.fig b/mcu/custom/driver/drv/Drv_Tool/MT6270A.fig
new file mode 100644
index 0000000..31a2931
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6270A.fig
@@ -0,0 +1,48 @@
+[Chip Type]
+Chip = MT6270A
+GPIO_Pull_Sel=1
+PMIC_Config=0
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(EINT3) MODE2() MODE3() PU
+GPIO1 = MODE0(GPIO1) MODE1(EINT2) MODE2() MODE3() PU
+GPIO2 = MODE0(GPIO2) MODE1(TRACEPKT7) MODE2(USB_DRVVBUS) MODE3(DEBUG0) PU
+GPIO3 = MODE0(GPIO3) MODE1(TRACEPKT6) MODE2(CLKM0) MODE3(DEBUG1) PU
+GPIO4 = MODE0(GPIO4) MODE1(TRACEPKT5) MODE2(CLKM1) MODE3(DEBUG2) PU
+GPIO5 = MODE0(GPIO5) MODE1(TRACEPKT4) MODE2(CLKM2) MODE3(DEBUG3) PU
+GPIO6 = MODE0(GPIO6) MODE1(TRACEPKT3) MODE2(CLKM3) MODE3(DEBUG4) PU
+GPIO7 = MODE0(GPIO7) MODE1(TRACEPKT2) MODE2(CLKM4) MODE3(DEBUG5) PU
+GPIO8 = MODE0(GPIO8) MODE1(TRACEPKT1) MODE2(CLKM5) MODE3(DEBUG6) PU
+GPIO9 = MODE0(GPIO9) MODE1(TRACEPKT0) MODE2() MODE3(DEBUG7) PU
+GPIO10 = MODE0(GPIO10) MODE1(FPGA_IRQ30_B) MODE2(HSL_ETM_DATA15) MODE3() PU
+GPIO11 = MODE0(GPIO11) MODE1(FPGA_IRQ29_B) MODE2(HSL_ETM_DATA14) MODE3() PU
+GPIO12 = MODE0(GPIO12) MODE1(FPGA_IRQ28_B) MODE2(HSL_ETM_DATA13) MODE3() PU
+GPIO13 = MODE0(GPIO13) MODE1(FPGA_IRQ27_B) MODE2(HSL_ETM_DATA12) MODE3() PU
+GPIO14 = MODE0(GPIO14) MODE1(FPGA_IRQ26_B) MODE2(HSL_ETM_DATA11) MODE3() PU
+GPIO15 = MODE0(GPIO15) MODE1(FPGA_IRQ25_B) MODE2(HSL_ETM_DATA10) MODE3() PU
+GPIO16 = MODE0(GPIO16) MODE1(FPGA_IRQ24_B) MODE2(HSL_ETM_DATA9) MODE3() PU
+GPIO17 = MODE0(GPIO17) MODE1(FPGA_IRQ23_B) MODE2(HSL_ETM_DATA8) MODE3() PU
+GPIO18 = MODE0(GPIO18) MODE1(FPGA_IRQ22_B) MODE2(HSL_ETM_DATA7) MODE3() PU
+GPIO19 = MODE0(GPIO19) MODE1(FPGA_IRQ21_B) MODE2(HSL_ETM_DATA6) MODE3() PU
+GPIO20 = MODE0(GPIO20) MODE1(FPGA_IRQ20_B) MODE2(HSL_ETM_DATA5) MODE3() PU
+GPIO21 = MODE0(GPIO21) MODE1(FPGA_IRQ19_B) MODE2(HSL_ETM_DATA4) MODE3() PU
+GPIO22 = MODE0(GPIO22) MODE1(FPGA_IRQ18_B) MODE2(HSL_ETM_DATA3) MODE3() PU
+GPIO23 = MODE0(GPIO23) MODE1(FPGA_IRQ17_B) MODE2(HSL_ETM_DATA2) MODE3() PU
+GPIO24 = MODE0(GPIO24) MODE1(FPGA_IRQ16_B) MODE2(HSL_ETM_DATA1) MODE3() PU
+GPIO25 = MODE0(GPIO25) MODE1(FPGA_IRQ15_B) MODE2(HSL_ETM_DATA0) MODE3() PU
+GPIO26 = MODE0(GPIO26) MODE1(FPGA_IRQ14_B) MODE2(HSL_ETM_CLKOUT) MODE3() PU
+GPIO27 = MODE0(GPIO27) MODE1(NCE1_B) MODE2(LPECS2_B) MODE3() PU
+
+
+[GPO]
+
+[EINT]
+EINT_COUNT=4
+EINT_DEBOUNCE_TIME_COUNT=4
+
+[ADC]
+ADC_COUNT=1
+
+[KEYPAD]
+KEY_ROW=8
+KEY_COLUMN=9
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6270MP.fig b/mcu/custom/driver/drv/Drv_Tool/MT6270MP.fig
new file mode 100644
index 0000000..0358f72
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6270MP.fig
@@ -0,0 +1,184 @@
+[Chip Type]
+Chip = MT6270MP
+GPIO_ModeNum = 5
+GPIO_Pull_Sel = 1
+GPIO_Extend_Config=1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(MC0INS) MODE2(MC2INS) MODE3(EINT9) MODE4() PU
+GPIO1 = MODE0(GPIO1) MODE1(BSI1_DATA1) MODE2(BSI1_CS1) MODE3() MODE4() PD
+GPIO2 = MODE0(GPIO2) MODE1(BSI0_CS1) MODE2(URTS2) MODE3() MODE4() PD
+GPIO3 = MODE0(GPIO3) MODE1(VM0) MODE2() MODE3(EXT_FRAME_SYNC) MODE4() PD
+GPIO4 = MODE0(GPIO4) MODE1(VM1) MODE2(EDI0DAT) MODE3() MODE4() PD
+GPIO5 = MODE0(GPIO5) MODE1(DUAL_BPI_BUS13) MODE2(EDI1WS) MODE3(EXT_FRAME_SYNC) MODE4(CLKM9) PD
+GPIO6 = MODE0(GPIO6) MODE1(DUAL_BPI_BUS9) MODE2(EDI1CK) MODE3(USB_DRVVBUS) MODE4(UCTS2) PD
+GPIO7 = MODE0(GPIO7) MODE1(DUAL_BPI_BUS6) MODE2(EDI0CK) MODE3() MODE4() PD
+GPIO8 = MODE0(GPIO8) MODE1(DUAL_BPI_BUS7) MODE2(EDI0WS) MODE3() MODE4(CLKM10) PD
+GPIO9 = MODE0(GPIO9) MODE1(DUAL_BPI_BUS14) MODE2(EDI1DAT) MODE3(CLKM1) MODE4() PD
+GPIO10 = MODE0(GPIO10) MODE1(DUAL_BPI_BUS8) MODE2() MODE3(URTS1) MODE4() PD
+GPIO11 = MODE0(GPIO11) MODE1(URXD1) MODE2(UTXD1) MODE3(CLKM7) MODE4() PU
+GPIO12 = MODE0(GPIO12) MODE1(UTXD1) MODE2(URXD1) MODE3(CLKM8) MODE4() --
+GPIO13 = MODE0(GPIO13) MODE1(URXD2) MODE2(UTXD2) MODE3(EINT7) MODE4(CINT0) PU
+GPIO14 = MODE0(GPIO14) MODE1(UTXD2) MODE2(URXD2) MODE3(EINT6) MODE4(SRCLKENAI0) --
+GPIO15 = MODE0(GPIO15) MODE1(DAICLK) MODE2(EDI0CK) MODE3(IRDA_PDN) MODE4(UCTS1) PD
+GPIO16 = MODE0(GPIO16) MODE1(DAIPCMOUT) MODE2(EDI0WS) MODE3(PTA0) MODE4() PD
+GPIO17 = MODE0(GPIO17) MODE1(DAIPCMIN) MODE2(EDI0DAT) MODE3(URXD3) MODE4(UTXD3) PD
+GPIO18 = MODE0(GPIO18) MODE1(DAISYNC) MODE2(EDI1CK) MODE3(UTXD3) MODE4(URXD3) PD
+GPIO19 = MODE0(GPIO19) MODE1(DAIRST) MODE2(EDI1WS) MODE3(SRCLKENAI1) MODE4(PTA1) PD
+GPIO20 = MODE0(GPIO20) MODE1(EINT3) MODE2(EDI1DAT) MODE3(TDD_SYNC) MODE4(CINT1) PU
+GPIO21 = MODE0(GPIO21) MODE1(EINT4) MODE2(GPS_SYNC) MODE3(SRCLKENAI2) MODE4() PU
+GPIO22 = MODE0(GPIO22) MODE1(MCU_JTRST_B) MODE2() MODE3() MODE4() PD
+GPIO23 = MODE0(GPIO23) MODE1(MCU_JTCK) MODE2() MODE3() MODE4() PU
+GPIO24 = MODE0(GPIO24) MODE1(MCU_JTDI) MODE2() MODE3() MODE4() PU
+GPIO25 = MODE0(GPIO25) MODE1(MCU_JTMS) MODE2() MODE3() MODE4() PU
+GPIO26 = MODE0(GPIO26) MODE1(MCU_JTDO) MODE2() MODE3() MODE4() --
+GPIO27 = MODE0(GPIO27) MODE1(MCU_JRTCK) MODE2() MODE3() MODE4() --
+GPIO28 = MODE0(GPIO28) MODE1(SWCLKTCK) MODE2() MODE3() MODE4() PU
+GPIO29 = MODE0(GPIO29) MODE1(SWDIOTMS) MODE2() MODE3() MODE4() PU
+GPIO30 = MODE0(GPIO30) MODE1(PWM1_OUT) MODE2(MC1WP) MODE3() MODE4() PD
+GPIO31 = MODE0(GPIO31) MODE1(PWM2_OUT) MODE2(DSP_JTRST_B) MODE3(EINT8) MODE4(CINT0) PD
+GPIO32 = MODE0(GPIO32) MODE1(PWM3_OUT) MODE2() MODE3(CLKM3) MODE4() PD
+GPIO33 = MODE0(GPIO33) MODE1(EINT0) MODE2(CLKM4) MODE3() MODE4(CINT1) PU
+GPIO34 = MODE0(GPIO34) MODE1(EINT1) MODE2(CLKM5) MODE3(GPS_SYNC) MODE4() PU
+GPIO35 = MODE0(GPIO35) MODE1(EINT2) MODE2(TDD_SYNC) MODE3(LPCE3B) MODE4() PU
+GPIO36 = MODE0(GPIO36) MODE1(KCOL7) MODE2(URXD3) MODE3(IRDA_TXD) MODE4() PU
+GPIO37 = MODE0(GPIO37) MODE1(KCOL6) MODE2(UTXD3) MODE3(PWM4_OUT) MODE4() PU
+GPIO38 = MODE0(GPIO38) MODE1(KCOL5) MODE2(EINT14) MODE3(SPI1_CS) MODE4() PU
+GPIO39 = MODE0(GPIO39) MODE1(KCOL4) MODE2(EINT15) MODE3(SPI1_MOSI) MODE4() PU
+GPIO40 = MODE0(GPIO40) MODE1(KCOL3) MODE2(PWM5_OUT) MODE3(URTS1) MODE4() PU
+GPIO41 = MODE0(GPIO41) MODE1(KCOL2) MODE2(PWM6_OUT) MODE3(UCTS1) MODE4() PU
+GPIO42 = MODE0(GPIO42) MODE1(KCOL1) MODE2() MODE3() MODE4() PU
+GPIO43 = MODE0(GPIO43) MODE1(KCOL0) MODE2() MODE3() MODE4() PU
+GPIO44 = MODE0(GPIO44) MODE1(KROW7) MODE2(URTS2) MODE3(IRDA_RXD) MODE4() --
+GPIO45 = MODE0(GPIO45) MODE1(KROW6) MODE2(UCTS2) MODE3(CLKM6) MODE4() --
+GPIO46 = MODE0(GPIO46) MODE1(KROW5) MODE2(EINT16) MODE3(SPI1_MISO) MODE4() --
+GPIO47 = MODE0(GPIO47) MODE1(KROW4) MODE2(EINT17) MODE3(SPI1_SCK) MODE4() --
+GPIO48 = MODE0(GPIO48) MODE1(KROW3) MODE2() MODE3() MODE4() --
+GPIO49 = MODE0(GPIO49) MODE1(KROW2) MODE2() MODE3() MODE4() --
+GPIO50 = MODE0(GPIO50) MODE1(KROW1) MODE2() MODE3() MODE4() --
+GPIO51 = MODE0(GPIO51) MODE1(KROW0) MODE2() MODE3() MODE4() --
+GPIO52 = MODE0(GPIO52) MODE1(SCL) MODE2() MODE3(DEBUG_OUT[17]) MODE4() PU
+GPIO53 = MODE0(GPIO53) MODE1(SDA) MODE2() MODE3(DEBUG_OUT[16]) MODE4() PU
+GPIO54 = MODE0(GPIO54) MODE1(CMRST) MODE2() MODE3(DEBUG_OUT[13]) MODE4() PD
+GPIO55 = MODE0(GPIO55) MODE1(CMPDN) MODE2(BT_MDS_IN) MODE3(DEBUG_OUT[12]) MODE4() PD
+GPIO56 = MODE0(GPIO56) MODE1(CMVREF) MODE2() MODE3(DEBUG_OUT[11]) MODE4() PD
+GPIO57 = MODE0(GPIO57) MODE1(CMHREF) MODE2() MODE3(DEBUG_OUT[10]) MODE4() PD
+GPIO58 = MODE0(GPIO58) MODE1(CMDAT9) MODE2() MODE3(DEBUG_OUT[9]) MODE4() PD
+GPIO59 = MODE0(GPIO59) MODE1(CMDAT8) MODE2() MODE3(DEBUG_OUT[8]) MODE4() PD
+GPIO60 = MODE0(GPIO60) MODE1(CMDAT7) MODE2() MODE3(DEBUG_OUT[7]) MODE4() PD
+GPIO61 = MODE0(GPIO61) MODE1(CMDAT6) MODE2() MODE3(DEBUG_OUT[6]) MODE4() PD
+GPIO62 = MODE0(GPIO62) MODE1(CMDAT5) MODE2() MODE3(DEBUG_OUT[5]) MODE4() PD
+GPIO63 = MODE0(GPIO63) MODE1(CMDAT4) MODE2() MODE3(DEBUG_OUT[4]) MODE4() PD
+GPIO64 = MODE0(GPIO64) MODE1(CMDAT3) MODE2() MODE3(DEBUG_OUT[3]) MODE4() PD
+GPIO65 = MODE0(GPIO65) MODE1(CMDAT2) MODE2() MODE3(DEBUG_OUT[2]) MODE4() PD
+GPIO66 = MODE0(GPIO66) MODE1(CMDAT1) MODE2(PTA0) MODE3(DEBUG_OUT[1]) MODE4() PD
+GPIO67 = MODE0(GPIO67) MODE1(CMDAT0) MODE2(PTA1) MODE3(DEBUG_OUT[0]) MODE4() PD
+GPIO68 = MODE0(GPIO68) MODE1(CMPCLK) MODE2() MODE3(DEBUG_OUT[14]) MODE4() PD
+GPIO69 = MODE0(GPIO69) MODE1(CMMCLK) MODE2(PLL_TCLK_650M_CK) MODE3(DEBUG_OUT[15]) MODE4() PD
+GPIO70 = MODE0(GPIO70) MODE1(LSCK) MODE2(NCE1B) MODE3(MC2WP) MODE4(DSP_JTDI) PD
+GPIO71 = MODE0(GPIO71) MODE1(LSA0) MODE2() MODE3(CLKM11) MODE4(DSP_JTMS) PD
+GPIO72 = MODE0(GPIO72) MODE1(LSDA) MODE2() MODE3(CLKM12) MODE4(DSP_JTDO) PD
+GPIO73 = MODE0(GPIO73) MODE1(LSCE0B) MODE2(USB_DRVVBUS) MODE3(EINT11) MODE4(DSP_EMU_B) --
+GPIO74 = MODE0(GPIO74) MODE1(LSCE1B) MODE2(IRDA_TXD) MODE3(LPCE2B) MODE4(DSP_JTCK) PU
+GPIO75 = MODE0(GPIO75) MODE1(LPCE1B) MODE2() MODE3(IRDA_RXD) MODE4() PU
+GPIO76 = MODE0(GPIO76) MODE1(LPTE) MODE2() MODE3() MODE4() PD
+GPIO77 = MODE0(GPIO77) MODE1(NLD17) MODE2(EINT12) MODE3() MODE4(CINT0) PD
+GPIO78 = MODE0(GPIO78) MODE1(NLD16) MODE2(EINT13) MODE3() MODE4() PD
+GPIO79 = MODE0(GPIO79) MODE1(NRNB) MODE2() MODE3() MODE4() PU
+GPIO80 = MODE0(GPIO80) MODE1(NCLE) MODE2() MODE3(SRCLKENAI3) MODE4() --
+GPIO81 = MODE0(GPIO81) MODE1(NALE) MODE2() MODE3(SRCLKENAI4) MODE4() --
+GPIO82 = MODE0(GPIO82) MODE1(NWEB) MODE2() MODE3() MODE4() --
+GPIO83 = MODE0(GPIO83) MODE1(NREB) MODE2() MODE3() MODE4() --
+GPIO84 = MODE0(GPIO84) MODE1(NCE0B) MODE2() MODE3() MODE4() --
+GPIO85 = MODE0(GPIO85) MODE1(MC2CM0) MODE2() MODE3(DEBUG_OUT[21]) MODE4() PU
+GPIO86 = MODE0(GPIO86) MODE1(MC2DA0) MODE2(MC0DA7) MODE3(DEBUG_OUT[20]) MODE4() PU
+GPIO87 = MODE0(GPIO87) MODE1(MC2DA1) MODE2(MC0DA6) MODE3(DEBUG_OUT[19]) MODE4() PU
+GPIO88 = MODE0(GPIO88) MODE1(MC2DA2) MODE2(MC0DA5) MODE3(EINT4) MODE4(DEBUG_OUT[31]) PU
+GPIO89 = MODE0(GPIO89) MODE1(MC2DA3) MODE2(MC0DA4) MODE3(EINT5) MODE4() PU
+GPIO90 = MODE0(GPIO90) MODE1(MC2CK) MODE2() MODE3(DEBUG_OUT[22]) MODE4(BT_JTMS) PU
+GPIO91 = MODE0(GPIO91) MODE1(MC2CK_FB) MODE2(MC1INS) MODE3(IRDA_PDN) MODE4() PU
+GPIO92 = MODE0(GPIO92) MODE1(MC0CM0) MODE2() MODE3(DEBUG_OUT[29]) MODE4() PU
+GPIO93 = MODE0(GPIO93) MODE1(MC0DA0) MODE2() MODE3(DEBUG_OUT[28]) MODE4() PU
+GPIO94 = MODE0(GPIO94) MODE1(MC0DA1) MODE2() MODE3(DEBUG_OUT[27]) MODE4() PU
+GPIO95 = MODE0(GPIO95) MODE1(MC0DA2) MODE2() MODE3(DEBUG_OUT[26]) MODE4() PU
+GPIO96 = MODE0(GPIO96) MODE1(MC0DA3) MODE2() MODE3(DEBUG_OUT[25]) MODE4() PU
+GPIO97 = MODE0(GPIO97) MODE1(MC0CK) MODE2() MODE3(DEBUG_OUT[30]) MODE4() PU
+GPIO98 = MODE0(GPIO98) MODE1(MC0CK_FB) MODE2() MODE3(DEBUG_OUT[23]) MODE4() PU
+GPIO99 = MODE0(GPIO99) MODE1(MC0WP) MODE2(EINT10) MODE3(CLKM2) MODE4(BT_JTDI) PU
+GPIO100 = MODE0(GPIO100) MODE1(MC0RST) MODE2() MODE3(DEBUG_OUT[24]) MODE4() --
+GPIO101 = MODE0(GPIO101) MODE1(MC1CM0) MODE2(SPI0_CS) MODE3(BT_JRTCK) MODE4() PU
+GPIO102 = MODE0(GPIO102) MODE1(MC1DA0) MODE2(SPI0_MOSI) MODE3(BT_JTRST_B) MODE4() PU
+GPIO103 = MODE0(GPIO103) MODE1(MC1DA1) MODE2(SPI0_MISO) MODE3(BT_JTCK) MODE4() PU
+GPIO104 = MODE0(GPIO104) MODE1(MC1CK) MODE2(SPI0_SCK) MODE3(BT_JTDO) MODE4() PU
+GPIO105 = MODE0(GPIO105) MODE1(MC1CK_FB) MODE2() MODE3(DEBUG_OUT[18]) MODE4(CLKM13) PU
+GPIO106 = MODE0(GPIO106) MODE1() MODE2() MODE3() MODE4() --
+GPIO107 = MODE0(GPIO107) MODE1() MODE2() MODE3() MODE4() --
+GPIO108 = MODE0(GPIO108) MODE1() MODE2() MODE3() MODE4() --
+GPIO109 = MODE0(GPIO109) MODE1() MODE2() MODE3() MODE4() PD
+
+[GPO]
+
+[EINT]
+EINT_COUNT = 29
+EINT_DEBOUNCE_TIME_COUNT = 29
+
+[EINT_EX_PIN]
+0
+1
+2
+3
+4
+5
+6
+7
+8
+9
+10
+11
+12
+13
+14
+15
+16
+17
+18
+19
+20
+21
+23
+24
+25
+26
+27
+28
+30
+
+[EINT_INT_PIN]
+22 = OTG_IDPIN_EINT_NO
+29 = CHR_USB_EINT_NO
+31 = FM_EINT_NO
+
+[EINT_INT_TIME_DELAY]
+EINT22 = 50
+EINT29 = 40
+EINT31 = 0
+
+[ADC]
+ADC_COUNT = 5
+
+[ADC_INT_CH]
+0 = ADC_VBAT
+1 = ADC_VISENSE
+2 = ADC_VCHARGER
+3 = ADC_VBATTMP
+
+[ADC_EX_CH]
+4
+5
+6
+7
+8
+
+[KEYPAD]
+KEY_ROW = 8
+KEY_COLUMN = 9
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6276.fig b/mcu/custom/driver/drv/Drv_Tool/MT6276.fig
new file mode 100644
index 0000000..89f6588
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6276.fig
@@ -0,0 +1,141 @@
+[Chip Type]
+Chip = MT6276
+GPIO_Pull_Sel = 1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1() MODE2() MODE3() PUPD
+GPIO1 = MODE0(GPIO1) MODE1() MODE2() MODE3() PUPD
+GPIO2 = MODE0(GPIO2) MODE1() MODE2() MODE3() PUPD
+GPIO3 = MODE0(GPIO3) MODE1() MODE2() MODE3() PD
+GPIO4 = MODE0(GPIO4) MODE1(MC0INS) MODE2(MC2INS) MODE3(EINT9) PU
+GPIO5 = MODE0(GPIO5) MODE1(BSI1_DATA1) MODE2(BSI1_CS1) MODE3(DSP_JTRST_B) PD
+GPIO6 = MODE0(GPIO6) MODE1(BSI0_CS1) MODE2(URTS2) MODE3(DSP_JTCK) PD
+GPIO7 = MODE0(GPIO7) MODE1(VM0) MODE2() MODE3(EXT_FRAME_SYNC) PD
+GPIO8 = MODE0(GPIO8) MODE1(VM1) MODE2(EDI0DAT) MODE3() PD
+GPIO9 = MODE0(GPIO9) MODE1(DUAL_BPI_BUS6) MODE2(EDI0CK) MODE3() PD
+GPIO10 = MODE0(GPIO10) MODE1(DUAL_BPI_BUS7) MODE2(EDI0WS) MODE3() PD
+GPIO11 = MODE0(GPIO11) MODE1(DUAL_BPI_BUS9) MODE2(EDI1CK) MODE3(USB_DRVVBUS) PD
+GPIO12 = MODE0(GPIO12) MODE1(DUAL_BPI_BUS13) MODE2(EDI1WS) MODE3(EXT_FRAME_SYNC) PD
+GPIO13 = MODE0(GPIO13) MODE1(DUAL_BPI_BUS14) MODE2(EDI1DAT) MODE3(CLKM1) PD
+GPIO14 = MODE0(GPIO14) MODE1(EINT0) MODE2(CLKM4) MODE3() PU
+GPIO15 = MODE0(GPIO15) MODE1(EINT1) MODE2(CLKM5) MODE3(GPS_SYNC) PU
+GPIO16 = MODE0(GPIO16) MODE1(EINT2) MODE2(UCTS2) MODE3(DSP_JTDI) PU
+GPIO17 = MODE0(GPIO17) MODE1(DUAL_BPI_BUS8) MODE2() MODE3(GPS_SYNC) PD
+GPIO18 = MODE0(GPIO18) MODE1(KCOL7) MODE2(URXD3) MODE3(IRDA_TXD) PU
+GPIO19 = MODE0(GPIO19) MODE1(KCOL6) MODE2(UTXD3) MODE3(PWM4_OUT) PU
+GPIO20 = MODE0(GPIO20) MODE1(KCOL5) MODE2(EINT14) MODE3(SPI_CS) PU
+GPIO21 = MODE0(GPIO21) MODE1(KCOL4) MODE2(EINT15) MODE3(SPI_MOSI) PU
+GPIO22 = MODE0(GPIO22) MODE1(KCOL3) MODE2(PWM5_OUT) MODE3(URTS1) PU
+GPIO23 = MODE0(GPIO23) MODE1(KCOL2) MODE2(PWM6_OUT) MODE3(UCTS1) PU
+GPIO24 = MODE0(GPIO24) MODE1(KCOL1) MODE2() MODE3() PU
+GPIO25 = MODE0(GPIO25) MODE1(KCOL0) MODE2() MODE3() PU
+GPIO26 = MODE0(GPIO26) MODE1(KROW7) MODE2(URTS2) MODE3(IRDA_RXD) PUPD
+GPIO27 = MODE0(GPIO27) MODE1(KROW6) MODE2(UCTS2) MODE3(CLKM6) PUPD
+GPIO28 = MODE0(GPIO28) MODE1(KROW5) MODE2(EINT16) MODE3(SPI_MISO) PUPD
+GPIO29 = MODE0(GPIO29) MODE1(KROW4) MODE2(EINT17) MODE3(SPI_SCK) PUPD
+GPIO30 = MODE0(GPIO30) MODE1(KROW3) MODE2(EINT6) MODE3(SRCLKENAI) PUPD
+GPIO31 = MODE0(GPIO31) MODE1(KROW2) MODE2(EINT7) MODE3() PUPD
+GPIO32 = MODE0(GPIO32) MODE1(KROW1) MODE2() MODE3() PUPD
+GPIO33 = MODE0(GPIO33) MODE1(KROW0) MODE2() MODE3() PUPD
+GPIO34 = MODE0(GPIO34) MODE1(URXD1) MODE2() MODE3() PU
+GPIO35 = MODE0(GPIO35) MODE1(UTXD1) MODE2() MODE3() PUPD
+GPIO36 = MODE0(GPIO36) MODE1(MCU_JTRST_B) MODE2() MODE3() PD
+GPIO37 = MODE0(GPIO37) MODE1(MCU_JTCK) MODE2() MODE3() PU
+GPIO38 = MODE0(GPIO38) MODE1(MCU_JTDI) MODE2() MODE3() PU
+GPIO39 = MODE0(GPIO39) MODE1(MCU_JTMS) MODE2() MODE3() PU
+GPIO40 = MODE0(GPIO40) MODE1(MCU_JTDO) MODE2() MODE3() PUPD
+GPIO41 = MODE0(GPIO41) MODE1(MCU_JRTCK) MODE2() MODE3() PUPD
+GPIO42 = MODE0(GPIO42) MODE1(SWCLKTCK) MODE2() MODE3() PU
+GPIO43 = MODE0(GPIO43) MODE1(SWDIOTMS) MODE2() MODE3() PU
+GPIO44 = MODE0(GPIO44) MODE1(DAICLK) MODE2(EDI0CK) MODE3(IRDA_PDN) PD
+GPIO45 = MODE0(GPIO45) MODE1(DAIPCMOUT) MODE2(EDI0WS) MODE3(PTA0) PD
+GPIO46 = MODE0(GPIO46) MODE1(DAIPCMIN) MODE2(EDI0DAT) MODE3(URXD3) PD
+GPIO47 = MODE0(GPIO47) MODE1(DAISYNC) MODE2(EDI1CK) MODE3(UTXD3) PD
+GPIO48 = MODE0(GPIO48) MODE1(DAIRST) MODE2(EDI1WS) MODE3(SRCLKENAI) PD
+GPIO49 = MODE0(GPIO49) MODE1(PWM1_OUT) MODE2(MC1WP) MODE3() PD
+GPIO50 = MODE0(GPIO50) MODE1(PWM2_OUT) MODE2(PTA1) MODE3(EINT8) PD
+GPIO51 = MODE0(GPIO51) MODE1(PWM3_OUT) MODE2(BT_JTDI) MODE3(CLKM3) PD
+GPIO52 = MODE0(GPIO52) MODE1(URXD2) MODE2() MODE3() PU
+GPIO53 = MODE0(GPIO53) MODE1(UTXD2) MODE2() MODE3() PUPD
+GPIO54 = MODE0(GPIO54) MODE1(EINT3) MODE2(UCTS1) MODE3(DEBUG_OUT[31]) PU
+GPIO55 = MODE0(GPIO55) MODE1(MC1CM0) MODE2(SPI_CS) MODE3(BT_JRTCK) PU
+GPIO56 = MODE0(GPIO56) MODE1(MC1DA0) MODE2(SPI_MOSI) MODE3(BT_JTRST_B) PU
+GPIO57 = MODE0(GPIO57) MODE1(MC1DA1) MODE2(SPI_MISO) MODE3(BT_JTCK) PU
+GPIO58 = MODE0(GPIO58) MODE1(MC1CK) MODE2(SPI_SCK) MODE3(BT_JTDO) PU
+GPIO59 = MODE0(GPIO59) MODE1(MC1CK_FB) MODE2(EDI1DAT) MODE3(DEBUG_OUT[18]) PU
+GPIO60 = MODE0(GPIO60) MODE1(CMMCLK) MODE2(PLL_TCLK_650M_CK) MODE3(DEBUG_OUT[15]) PD
+GPIO61 = MODE0(GPIO61) MODE1(CMPCLK) MODE2() MODE3(DEBUG_OUT[14]) PD
+GPIO62 = MODE0(GPIO62) MODE1(CMRST) MODE2() MODE3(DEBUG_OUT[13]) PD
+GPIO63 = MODE0(GPIO63) MODE1(CMPDN) MODE2(BT_MDS_IN) MODE3(DEBUG_OUT[12]) PD
+GPIO64 = MODE0(GPIO64) MODE1(CMVREF) MODE2() MODE3(DEBUG_OUT[11]) PD
+GPIO65 = MODE0(GPIO65) MODE1(CMHREF) MODE2() MODE3(DEBUG_OUT[10]) PD
+GPIO66 = MODE0(GPIO66) MODE1(CMDAT9) MODE2() MODE3(DEBUG_OUT[9]) PD
+GPIO67 = MODE0(GPIO67) MODE1(CMDAT8) MODE2() MODE3(DEBUG_OUT[8]) PD
+GPIO68 = MODE0(GPIO68) MODE1(CMDAT7) MODE2() MODE3(DEBUG_OUT[7]) PD
+GPIO69 = MODE0(GPIO69) MODE1(CMDAT6) MODE2() MODE3(DEBUG_OUT[6]) PD
+GPIO70 = MODE0(GPIO70) MODE1(CMDAT5) MODE2() MODE3(DEBUG_OUT[5]) PD
+GPIO71 = MODE0(GPIO71) MODE1(CMDAT4) MODE2() MODE3(DEBUG_OUT[4]) PD
+GPIO72 = MODE0(GPIO72) MODE1(CMDAT3) MODE2() MODE3(DEBUG_OUT[3]) PD
+GPIO73 = MODE0(GPIO73) MODE1(CMDAT2) MODE2() MODE3(DEBUG_OUT[2]) PD
+GPIO74 = MODE0(GPIO74) MODE1(CMDAT1) MODE2(PTA0) MODE3(DEBUG_OUT[1]) PD
+GPIO75 = MODE0(GPIO75) MODE1(CMDAT0) MODE2(PTA1) MODE3(DEBUG_OUT[0]) PD
+GPIO76 = MODE0(GPIO76) MODE1(SCL) MODE2() MODE3(DEBUG_OUT[17]) PU
+GPIO77 = MODE0(GPIO77) MODE1(SDA) MODE2() MODE3(DEBUG_OUT[16]) PU
+GPIO78 = MODE0(GPIO78) MODE1(LSCK) MODE2(USB_DRVVBUS) MODE3(MC2WP) PD
+GPIO79 = MODE0(GPIO79) MODE1(LSA0) MODE2(MC1DA2) MODE3(DSP_JTMS) PD
+GPIO80 = MODE0(GPIO80) MODE1(LSDA) MODE2(MC1DA3) MODE3(DSP_JTDO) PD
+GPIO81 = MODE0(GPIO81) MODE1(LSCE0B) MODE2(URTS1) MODE3(EINT11) PUPD
+GPIO82 = MODE0(GPIO82) MODE1(LSCE1B) MODE2(IRDA_TXD) MODE3(LPCE2B) PU
+GPIO83 = MODE0(GPIO83) MODE1(LPCE1B) MODE2(NCE1B) MODE3(IRDA_RXD) PU
+GPIO84 = MODE0(GPIO84) MODE1(LPTE) MODE2() MODE3() PD
+GPIO85 = MODE0(GPIO85) MODE1(NLD17) MODE2(EINT12) MODE3(DSP_EMU_B) PD
+GPIO86 = MODE0(GPIO86) MODE1(NLD16) MODE2(EINT13) MODE3(BT_JTMS) PD
+GPIO87 = MODE0(GPIO87) MODE1(MC2CM0) MODE2() MODE3(DEBUG_OUT[21]) PU
+GPIO88 = MODE0(GPIO88) MODE1(MC2DA0) MODE2(MC0DA7) MODE3(DEBUG_OUT[20]) PU
+GPIO89 = MODE0(GPIO89) MODE1(MC2DA1) MODE2(MC0DA6) MODE3(DEBUG_OUT[19]) PU
+GPIO90 = MODE0(GPIO90) MODE1(MC2DA2) MODE2(MC0DA5) MODE3(EINT4) PU
+GPIO91 = MODE0(GPIO91) MODE1(MC2DA3) MODE2(MC0DA4) MODE3(EINT5) PU
+GPIO92 = MODE0(GPIO92) MODE1(MC2CK) MODE2() MODE3(DEBUG_OUT[22]) PU
+GPIO93 = MODE0(GPIO93) MODE1(MC2CK_FB) MODE2(MC1INS) MODE3(IRDA_PDN) PU
+GPIO94 = MODE0(GPIO94) MODE1(MC0CM0) MODE2() MODE3(DEBUG_OUT[29]) PU
+GPIO95 = MODE0(GPIO95) MODE1(MC0DA0) MODE2() MODE3(DEBUG_OUT[28]) PU
+GPIO96 = MODE0(GPIO96) MODE1(MC0DA1) MODE2() MODE3(DEBUG_OUT[27]) PU
+GPIO97 = MODE0(GPIO97) MODE1(MC0DA2) MODE2() MODE3(DEBUG_OUT[26]) PU
+GPIO98 = MODE0(GPIO98) MODE1(MC0DA3) MODE2() MODE3(DEBUG_OUT[25]) PU
+GPIO99 = MODE0(GPIO99) MODE1(MC0CK) MODE2() MODE3(DEBUG_OUT[30]) PU
+GPIO100 = MODE0(GPIO100) MODE1(MC0CK_FB) MODE2() MODE3(DEBUG_OUT[23]) PU
+GPIO101 = MODE0(GPIO101) MODE1(MC0WP) MODE2(EINT10) MODE3(CLKM2) PU
+GPIO102 = MODE0(GPIO102) MODE1(MC0RST) MODE2() MODE3(DEBUG_OUT[24]) PUPD
+GPIO103 = MODE0(GPIO103) MODE1(NRNB) MODE2() MODE3() PU
+GPIO104 = MODE0(GPIO104) MODE1(NCLE) MODE2() MODE3() PUPD
+GPIO105 = MODE0(GPIO105) MODE1(NALE) MODE2() MODE3() PUPD
+GPIO106 = MODE0(GPIO106) MODE1(NWEB) MODE2() MODE3() PUPD
+GPIO107 = MODE0(GPIO107) MODE1(NREB) MODE2() MODE3() PUPD
+GPIO108 = MODE0(GPIO108) MODE1(NCE0B) MODE2() MODE3() PUPD
+
+[GPO]
+
+[EINT]
+EINT_COUNT = 32
+EINT_DEBOUNCE_TIME_COUNT = 32
+
+
+[ADC]
+ADC_COUNT = 5
+
+[ADC_INT_CH]
+0 = ADC_VBAT
+1 = ADC_VISENSE
+2 = ADC_VCHARGER
+3 = ADC_VBATTMP
+
+[ADC_EX_CH]
+4
+5
+6
+7
+8
+
+[KEYPAD]
+KEY_ROW = 8
+KEY_COLUMN = 9
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6276M.fig b/mcu/custom/driver/drv/Drv_Tool/MT6276M.fig
new file mode 100644
index 0000000..bc9aed8
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6276M.fig
@@ -0,0 +1,186 @@
+[Chip Type]
+Chip = MT6276M
+GPIO_ModeNum = 5
+GPIO_Pull_Sel = 1
+PMIC_Config = 1
+PMIC_Volt_Format = 1
+GPIO_Extend_Config=1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(MC0INS) MODE2(MC2INS) MODE3(EINT9) MODE4() PU
+GPIO1 = MODE0(GPIO1) MODE1(BSI1_DATA1) MODE2(BSI1_CS1) MODE3() MODE4() PD
+GPIO2 = MODE0() MODE1() MODE2() MODE3() MODE4() PD
+GPIO3 = MODE0(GPIO3) MODE1(VM0) MODE2() MODE3(EXT_FRAME_SYNC) MODE4() PD
+GPIO4 = MODE0(GPIO4) MODE1(VM1) MODE2(EDI0DAT) MODE3() MODE4() PD
+GPIO5 = MODE0(GPIO5) MODE1(DUAL_BPI_BUS13) MODE2(EDI1WS) MODE3(EXT_FRAME_SYNC) MODE4(CLKM9) PD
+GPIO6 = MODE0(GPIO6) MODE1(DUAL_BPI_BUS9) MODE2(EDI1CK) MODE3(USB_DRVVBUS) MODE4(UCTS2) PD
+GPIO7 = MODE0(GPIO7) MODE1(DUAL_BPI_BUS6) MODE2(EDI0CK) MODE3() MODE4() PD
+GPIO8 = MODE0(GPIO8) MODE1(DUAL_BPI_BUS7) MODE2(EDI0WS) MODE3() MODE4(CLKM10) PD
+GPIO9 = MODE0(GPIO9) MODE1(DUAL_BPI_BUS14) MODE2(EDI1DAT) MODE3(CLKM1) MODE4() PD
+GPIO10 = MODE0(GPIO10) MODE1(DUAL_BPI_BUS8) MODE2() MODE3(URTS1) MODE4() PD
+GPIO11 = MODE0(GPIO11) MODE1(URXD1) MODE2(UTXD1) MODE3(CLKM7) MODE4() PU
+GPIO12 = MODE0(GPIO12) MODE1(UTXD1) MODE2(URXD1) MODE3(CLKM8) MODE4() --
+GPIO13 = MODE0(GPIO13) MODE1(URXD2) MODE2(UTXD2) MODE3(EINT7) MODE4(CINT0) PU
+GPIO14 = MODE0(GPIO14) MODE1(UTXD2) MODE2(URXD2) MODE3(EINT6) MODE4(SRCLKENAI0) --
+GPIO15 = MODE0(GPIO15) MODE1(DAICLK) MODE2(EDI0CK) MODE3(IRDA_PDN) MODE4(UCTS1) PD
+GPIO16 = MODE0(GPIO16) MODE1(DAIPCMOUT) MODE2(EDI0WS) MODE3(PTA0) MODE4() PD
+GPIO17 = MODE0(GPIO17) MODE1(DAIPCMIN) MODE2(EDI0DAT) MODE3(URXD3) MODE4(UTXD3) PD
+GPIO18 = MODE0(GPIO18) MODE1(DAISYNC) MODE2(EDI1CK) MODE3(UTXD3) MODE4(URXD3) PD
+GPIO19 = MODE0(GPIO19) MODE1(DAIRST) MODE2(EDI1WS) MODE3(SRCLKENAI1) MODE4(PTA1) PD
+GPIO20 = MODE0(GPIO20) MODE1(EINT3) MODE2(EDI1DAT) MODE3() MODE4(CINT1) PU
+GPIO21 = MODE0(GPIO21) MODE1(EINT4) MODE2(GPS_SYNC) MODE3(SRCLKENAI2) MODE4() PU
+GPIO22 = MODE0(GPIO22) MODE1(MCU_JTRST_B) MODE2() MODE3() MODE4() PD
+GPIO23 = MODE0(GPIO23) MODE1(MCU_JTCK) MODE2() MODE3() MODE4() PU
+GPIO24 = MODE0(GPIO24) MODE1(MCU_JTDI) MODE2() MODE3() MODE4() PU
+GPIO25 = MODE0(GPIO25) MODE1(MCU_JTMS) MODE2() MODE3() MODE4() PU
+GPIO26 = MODE0(GPIO26) MODE1(MCU_JTDO) MODE2() MODE3() MODE4() --
+GPIO27 = MODE0(GPIO27) MODE1(MCU_JRTCK) MODE2() MODE3() MODE4() --
+GPIO28 = MODE0(GPIO28) MODE1(SWCLKTCK) MODE2() MODE3() MODE4() PU
+GPIO29 = MODE0(GPIO29) MODE1(SWDIOTMS) MODE2() MODE3() MODE4() PU
+GPIO30 = MODE0(GPIO30) MODE1(PWM1_OUT) MODE2(MC1WP) MODE3() MODE4() PD
+GPIO31 = MODE0(GPIO31) MODE1(PWM2_OUT) MODE2(DSP_JTRST_B) MODE3(EINT8) MODE4(CINT0) PD
+GPIO32 = MODE0(GPIO32) MODE1(PWM3_OUT) MODE2() MODE3(CLKM3) MODE4() PD
+GPIO33 = MODE0(GPIO33) MODE1(EINT0) MODE2(CLKM4) MODE3() MODE4(CINT1) PU
+GPIO34 = MODE0(GPIO34) MODE1(EINT1) MODE2(CLKM5) MODE3(GPS_SYNC) MODE4() PU
+GPIO35 = MODE0(GPIO35) MODE1(EINT2) MODE2() MODE3() MODE4() PU
+GPIO36 = MODE0(GPIO36) MODE1(KCOL7) MODE2(URXD3) MODE3(IRDA_TXD) MODE4() PU
+GPIO37 = MODE0(GPIO37) MODE1(KCOL6) MODE2(UTXD3) MODE3(PWM4_OUT) MODE4() PU
+GPIO38 = MODE0(GPIO38) MODE1(KCOL5) MODE2(EINT14) MODE3(SPI1_CS) MODE4() PU
+GPIO39 = MODE0(GPIO39) MODE1(KCOL4) MODE2(EINT15) MODE3(SPI1_MOSI) MODE4() PU
+GPIO40 = MODE0(GPIO40) MODE1(KCOL3) MODE2(PWM5_OUT) MODE3(URTS1) MODE4() PU
+GPIO41 = MODE0(GPIO41) MODE1(KCOL2) MODE2(PWM6_OUT) MODE3(UCTS1) MODE4() PU
+GPIO42 = MODE0(GPIO42) MODE1(KCOL1) MODE2() MODE3() MODE4() PU
+GPIO43 = MODE0(GPIO43) MODE1(KCOL0) MODE2() MODE3() MODE4() PU
+GPIO44 = MODE0(GPIO44) MODE1(KROW7) MODE2(URTS2) MODE3(IRDA_RXD) MODE4() --
+GPIO45 = MODE0(GPIO45) MODE1(KROW6) MODE2(UCTS2) MODE3(CLKM6) MODE4() --
+GPIO46 = MODE0(GPIO46) MODE1(KROW5) MODE2(EINT16) MODE3(SPI1_MISO) MODE4() --
+GPIO47 = MODE0(GPIO47) MODE1(KROW4) MODE2(EINT17) MODE3(SPI1_SCK) MODE4() --
+GPIO48 = MODE0(GPIO48) MODE1(KROW3) MODE2() MODE3() MODE4() --
+GPIO49 = MODE0(GPIO49) MODE1(KROW2) MODE2() MODE3() MODE4() --
+GPIO50 = MODE0(GPIO50) MODE1(KROW1) MODE2() MODE3() MODE4() --
+GPIO51 = MODE0(GPIO51) MODE1(KROW0) MODE2() MODE3() MODE4() --
+GPIO52 = MODE0(GPIO52) MODE1(SCL) MODE2() MODE3(DEBUG_OUT[17]) MODE4() PU
+GPIO53 = MODE0(GPIO53) MODE1(SDA) MODE2() MODE3(DEBUG_OUT[16]) MODE4() PU
+GPIO54 = MODE0(GPIO54) MODE1(CMRST) MODE2() MODE3(DEBUG_OUT[13]) MODE4() PD
+GPIO55 = MODE0(GPIO55) MODE1(CMPDN) MODE2(BT_MDS_IN) MODE3(DEBUG_OUT[12]) MODE4() PD
+GPIO56 = MODE0(GPIO56) MODE1(CMVREF) MODE2() MODE3(DEBUG_OUT[11]) MODE4() PD
+GPIO57 = MODE0(GPIO57) MODE1(CMHREF) MODE2() MODE3(DEBUG_OUT[10]) MODE4() PD
+GPIO58 = MODE0(GPIO58) MODE1(CMDAT9) MODE2() MODE3(DEBUG_OUT[9]) MODE4() PD
+GPIO59 = MODE0(GPIO59) MODE1(CMDAT8) MODE2() MODE3(DEBUG_OUT[8]) MODE4() PD
+GPIO60 = MODE0(GPIO60) MODE1(CMDAT7) MODE2() MODE3(DEBUG_OUT[7]) MODE4() PD
+GPIO61 = MODE0(GPIO61) MODE1(CMDAT6) MODE2() MODE3(DEBUG_OUT[6]) MODE4() PD
+GPIO62 = MODE0(GPIO62) MODE1(CMDAT5) MODE2() MODE3(DEBUG_OUT[5]) MODE4() PD
+GPIO63 = MODE0(GPIO63) MODE1(CMDAT4) MODE2() MODE3(DEBUG_OUT[4]) MODE4() PD
+GPIO64 = MODE0(GPIO64) MODE1(CMDAT3) MODE2() MODE3(DEBUG_OUT[3]) MODE4() PD
+GPIO65 = MODE0(GPIO65) MODE1(CMDAT2) MODE2() MODE3(DEBUG_OUT[2]) MODE4() PD
+GPIO66 = MODE0(GPIO66) MODE1(CMDAT1) MODE2(PTA0) MODE3(DEBUG_OUT[1]) MODE4() PD
+GPIO67 = MODE0(GPIO67) MODE1(CMDAT0) MODE2(PTA1) MODE3(DEBUG_OUT[0]) MODE4() PD
+GPIO68 = MODE0(GPIO68) MODE1(CMPCLK) MODE2() MODE3(DEBUG_OUT[14]) MODE4() PD
+GPIO69 = MODE0() MODE1() MODE2() MODE3() MODE4() PD
+GPIO70 = MODE0(GPIO70) MODE1(LSCK) MODE2(NCE1B) MODE3(MC2WP) MODE4(DSP_JTDI) PD
+GPIO71 = MODE0(GPIO71) MODE1(LSA0) MODE2() MODE3(CLKM11) MODE4(DSP_JTMS) PD
+GPIO72 = MODE0(GPIO72) MODE1(LSDA) MODE2() MODE3(CLKM12) MODE4(DSP_JTDO) PD
+GPIO73 = MODE0(GPIO73) MODE1(LSCE0B) MODE2(USB_DRVVBUS) MODE3(EINT11) MODE4(DSP_EMU_B) --
+GPIO74 = MODE0(GPIO74) MODE1() MODE2() MODE3() MODE4() PU
+GPIO75 = MODE0() MODE1() MODE2() MODE3() MODE4() PU
+GPIO76 = MODE0(GPIO76) MODE1(LPTE) MODE2() MODE3() MODE4() PD
+GPIO77 = MODE0() MODE1() MODE2() MODE3() MODE4() PD
+GPIO78 = MODE0(GPIO78) MODE1(NLD16) MODE2(EINT13) MODE3() MODE4() PD
+GPIO79 = MODE0(GPIO79) MODE1(NRNB) MODE2() MODE3() MODE4() PU
+GPIO80 = MODE0(GPIO80) MODE1(NCLE) MODE2() MODE3(SRCLKENAI3) MODE4() --
+GPIO81 = MODE0(GPIO81) MODE1(NALE) MODE2() MODE3(SRCLKENAI4) MODE4() --
+GPIO82 = MODE0(GPIO82) MODE1(NWEB) MODE2() MODE3() MODE4() --
+GPIO83 = MODE0(GPIO83) MODE1(NREB) MODE2() MODE3() MODE4() --
+GPIO84 = MODE0(GPIO84) MODE1(NCE0B) MODE2() MODE3() MODE4() --
+GPIO85 = MODE0(GPIO85) MODE1(MC2CM0) MODE2() MODE3(DEBUG_OUT[21]) MODE4() PU
+GPIO86 = MODE0() MODE1() MODE2() MODE3() MODE4() PU
+GPIO87 = MODE0() MODE1() MODE2() MODE3() MODE4() PU
+GPIO88 = MODE0() MODE1() MODE2() MODE3() MODE4() PU
+GPIO89 = MODE0() MODE1() MODE2() MODE3() MODE4() PU
+GPIO90 = MODE0() MODE1() MODE2() MODE3() MODE4() PU
+GPIO91 = MODE0() MODE1() MODE2() MODE3() MODE4() PU
+GPIO92 = MODE0(GPIO92) MODE1(MC0CM0) MODE2() MODE3(DEBUG_OUT[29]) MODE4() PU
+GPIO93 = MODE0(GPIO93) MODE1(MC0DA0) MODE2() MODE3(DEBUG_OUT[28]) MODE4() PU
+GPIO94 = MODE0(GPIO94) MODE1(MC0DA1) MODE2() MODE3(DEBUG_OUT[27]) MODE4() PU
+GPIO95 = MODE0(GPIO95) MODE1(MC0DA2) MODE2() MODE3(DEBUG_OUT[26]) MODE4() PU
+GPIO96 = MODE0(GPIO96) MODE1(MC0DA3) MODE2() MODE3(DEBUG_OUT[25]) MODE4() PU
+GPIO97 = MODE0(GPIO97) MODE1(MC0CK) MODE2() MODE3(DEBUG_OUT[30]) MODE4() PU
+GPIO98 = MODE0(GPIO98) MODE1(MC0CK_FB) MODE2() MODE3(DEBUG_OUT[23]) MODE4() PU
+GPIO99 = MODE0(GPIO99) MODE1(MC0WP) MODE2(EINT10) MODE3(CLKM2) MODE4(BT_JTDI) PU
+GPIO100 = MODE0(GPIO100) MODE1(MC0RST) MODE2() MODE3(DEBUG_OUT[24]) MODE4() --
+GPIO101 = MODE0(GPIO101) MODE1(MC1CM0) MODE2(SPI0_CS) MODE3(BT_JRTCK) MODE4() PU
+GPIO102 = MODE0(GPIO102) MODE1(MC1DA0) MODE2(SPI0_MOSI) MODE3(BT_JTRST_B) MODE4() PU
+GPIO103 = MODE0(GPIO103) MODE1(MC1DA1) MODE2(SPI0_MISO) MODE3(BT_JTCK) MODE4() PU
+GPIO104 = MODE0(GPIO104) MODE1(MC1CK) MODE2(SPI0_SCK) MODE3(BT_JTDO) MODE4() PU
+GPIO105 = MODE0(GPIO105) MODE1(MC1CK_FB) MODE2() MODE3(DEBUG_OUT[18]) MODE4(CLKM13) PU
+GPIO106 = MODE0(GPIO106) MODE1() MODE2() MODE3() MODE4() --
+GPIO107 = MODE0(GPIO107) MODE1() MODE2() MODE3() MODE4() --
+GPIO108 = MODE0(GPIO108) MODE1() MODE2() MODE3() MODE4() --
+GPIO109 = MODE0(GPIO109) MODE1() MODE2() MODE3() MODE4() PD
+
+[GPO]
+
+[EINT]
+EINT_COUNT = 29
+EINT_DEBOUNCE_TIME_COUNT = 29
+
+[EINT_EX_PIN]
+0
+1
+2
+3
+4
+5
+6
+7
+8
+9
+10
+11
+12
+13
+14
+15
+16
+17
+18
+19
+20
+21
+23
+24
+25
+26
+27
+28
+30
+
+[EINT_INT_PIN]
+22 = OTG_IDPIN_EINT_NO
+29 = CHR_USB_EINT_NO
+31 = FM_EINT_NO
+
+[EINT_INT_TIME_DELAY]
+EINT22 = 50
+EINT29 = 40
+EINT31 = 0
+
+[ADC]
+ADC_COUNT = 5
+
+[ADC_INT_CH]
+0 = ADC_VBAT
+1 = ADC_VISENSE
+2 = ADC_VCHARGER
+3 = ADC_VBATTMP
+
+[ADC_EX_CH]
+4
+5
+6
+7
+8
+
+[KEYPAD]
+KEY_ROW = 8
+KEY_COLUMN = 9
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6276MP.fig b/mcu/custom/driver/drv/Drv_Tool/MT6276MP.fig
new file mode 100644
index 0000000..6278ee5
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6276MP.fig
@@ -0,0 +1,184 @@
+[Chip Type]
+Chip = MT6276MP
+GPIO_ModeNum = 5
+GPIO_Pull_Sel = 1
+GPIO_Extend_Config=1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(MC0INS) MODE2(MC2INS) MODE3(EINT9) MODE4() PU
+GPIO1 = MODE0(GPIO1) MODE1(BSI1_DATA1) MODE2(BSI1_CS1) MODE3() MODE4() PD
+GPIO2 = MODE0(GPIO2) MODE1(BSI0_CS1) MODE2(URTS2) MODE3() MODE4() PD
+GPIO3 = MODE0(GPIO3) MODE1(VM0) MODE2() MODE3(EXT_FRAME_SYNC) MODE4() PD
+GPIO4 = MODE0(GPIO4) MODE1(VM1) MODE2(EDI0DAT) MODE3() MODE4() PD
+GPIO5 = MODE0(GPIO5) MODE1(DUAL_BPI_BUS13) MODE2(EDI1WS) MODE3(EXT_FRAME_SYNC) MODE4(CLKM9) PD
+GPIO6 = MODE0(GPIO6) MODE1(DUAL_BPI_BUS9) MODE2(EDI1CK) MODE3(USB_DRVVBUS) MODE4(UCTS2) PD
+GPIO7 = MODE0(GPIO7) MODE1(DUAL_BPI_BUS6) MODE2(EDI0CK) MODE3() MODE4() PD
+GPIO8 = MODE0(GPIO8) MODE1(DUAL_BPI_BUS7) MODE2(EDI0WS) MODE3() MODE4(CLKM10) PD
+GPIO9 = MODE0(GPIO9) MODE1(DUAL_BPI_BUS14) MODE2(EDI1DAT) MODE3(CLKM1) MODE4() PD
+GPIO10 = MODE0(GPIO10) MODE1(DUAL_BPI_BUS8) MODE2() MODE3(URTS1) MODE4() PD
+GPIO11 = MODE0(GPIO11) MODE1(URXD1) MODE2(UTXD1) MODE3(CLKM7) MODE4() PU
+GPIO12 = MODE0(GPIO12) MODE1(UTXD1) MODE2(URXD1) MODE3(CLKM8) MODE4() --
+GPIO13 = MODE0(GPIO13) MODE1(URXD2) MODE2(UTXD2) MODE3(EINT7) MODE4(CINT0) PU
+GPIO14 = MODE0(GPIO14) MODE1(UTXD2) MODE2(URXD2) MODE3(EINT6) MODE4(SRCLKENAI0) --
+GPIO15 = MODE0(GPIO15) MODE1(DAICLK) MODE2(EDI0CK) MODE3(IRDA_PDN) MODE4(UCTS1) PD
+GPIO16 = MODE0(GPIO16) MODE1(DAIPCMOUT) MODE2(EDI0WS) MODE3(PTA0) MODE4() PD
+GPIO17 = MODE0(GPIO17) MODE1(DAIPCMIN) MODE2(EDI0DAT) MODE3(URXD3) MODE4(UTXD3) PD
+GPIO18 = MODE0(GPIO18) MODE1(DAISYNC) MODE2(EDI1CK) MODE3(UTXD3) MODE4(URXD3) PD
+GPIO19 = MODE0(GPIO19) MODE1(DAIRST) MODE2(EDI1WS) MODE3(SRCLKENAI1) MODE4(PTA1) PD
+GPIO20 = MODE0(GPIO20) MODE1(EINT3) MODE2(EDI1DAT) MODE3(TDD_SYNC) MODE4(CINT1) PU
+GPIO21 = MODE0(GPIO21) MODE1(EINT4) MODE2(GPS_SYNC) MODE3(SRCLKENAI2) MODE4() PU
+GPIO22 = MODE0(GPIO22) MODE1(MCU_JTRST_B) MODE2() MODE3() MODE4() PD
+GPIO23 = MODE0(GPIO23) MODE1(MCU_JTCK) MODE2() MODE3() MODE4() PU
+GPIO24 = MODE0(GPIO24) MODE1(MCU_JTDI) MODE2() MODE3() MODE4() PU
+GPIO25 = MODE0(GPIO25) MODE1(MCU_JTMS) MODE2() MODE3() MODE4() PU
+GPIO26 = MODE0(GPIO26) MODE1(MCU_JTDO) MODE2() MODE3() MODE4() --
+GPIO27 = MODE0(GPIO27) MODE1(MCU_JRTCK) MODE2() MODE3() MODE4() --
+GPIO28 = MODE0(GPIO28) MODE1(SWCLKTCK) MODE2() MODE3() MODE4() PU
+GPIO29 = MODE0(GPIO29) MODE1(SWDIOTMS) MODE2() MODE3() MODE4() PU
+GPIO30 = MODE0(GPIO30) MODE1(PWM1_OUT) MODE2(MC1WP) MODE3() MODE4() PD
+GPIO31 = MODE0(GPIO31) MODE1(PWM2_OUT) MODE2(DSP_JTRST_B) MODE3(EINT8) MODE4(CINT0) PD
+GPIO32 = MODE0(GPIO32) MODE1(PWM3_OUT) MODE2() MODE3(CLKM3) MODE4() PD
+GPIO33 = MODE0(GPIO33) MODE1(EINT0) MODE2(CLKM4) MODE3() MODE4(CINT1) PU
+GPIO34 = MODE0(GPIO34) MODE1(EINT1) MODE2(CLKM5) MODE3(GPS_SYNC) MODE4() PU
+GPIO35 = MODE0(GPIO35) MODE1(EINT2) MODE2(TDD_SYNC) MODE3(LPCE3B) MODE4() PU
+GPIO36 = MODE0(GPIO36) MODE1(KCOL7) MODE2(URXD3) MODE3(IRDA_TXD) MODE4() PU
+GPIO37 = MODE0(GPIO37) MODE1(KCOL6) MODE2(UTXD3) MODE3(PWM4_OUT) MODE4() PU
+GPIO38 = MODE0(GPIO38) MODE1(KCOL5) MODE2(EINT14) MODE3(SPI1_CS) MODE4() PU
+GPIO39 = MODE0(GPIO39) MODE1(KCOL4) MODE2(EINT15) MODE3(SPI1_MOSI) MODE4() PU
+GPIO40 = MODE0(GPIO40) MODE1(KCOL3) MODE2(PWM5_OUT) MODE3(URTS1) MODE4() PU
+GPIO41 = MODE0(GPIO41) MODE1(KCOL2) MODE2(PWM6_OUT) MODE3(UCTS1) MODE4() PU
+GPIO42 = MODE0(GPIO42) MODE1(KCOL1) MODE2() MODE3() MODE4() PU
+GPIO43 = MODE0(GPIO43) MODE1(KCOL0) MODE2() MODE3() MODE4() PU
+GPIO44 = MODE0(GPIO44) MODE1(KROW7) MODE2(URTS2) MODE3(IRDA_RXD) MODE4() --
+GPIO45 = MODE0(GPIO45) MODE1(KROW6) MODE2(UCTS2) MODE3(CLKM6) MODE4() --
+GPIO46 = MODE0(GPIO46) MODE1(KROW5) MODE2(EINT16) MODE3(SPI1_MISO) MODE4() --
+GPIO47 = MODE0(GPIO47) MODE1(KROW4) MODE2(EINT17) MODE3(SPI1_SCK) MODE4() --
+GPIO48 = MODE0(GPIO48) MODE1(KROW3) MODE2() MODE3() MODE4() --
+GPIO49 = MODE0(GPIO49) MODE1(KROW2) MODE2() MODE3() MODE4() --
+GPIO50 = MODE0(GPIO50) MODE1(KROW1) MODE2() MODE3() MODE4() --
+GPIO51 = MODE0(GPIO51) MODE1(KROW0) MODE2() MODE3() MODE4() --
+GPIO52 = MODE0(GPIO52) MODE1(SCL) MODE2() MODE3(DEBUG_OUT[17]) MODE4() PU
+GPIO53 = MODE0(GPIO53) MODE1(SDA) MODE2() MODE3(DEBUG_OUT[16]) MODE4() PU
+GPIO54 = MODE0(GPIO54) MODE1(CMRST) MODE2() MODE3(DEBUG_OUT[13]) MODE4() PD
+GPIO55 = MODE0(GPIO55) MODE1(CMPDN) MODE2(BT_MDS_IN) MODE3(DEBUG_OUT[12]) MODE4() PD
+GPIO56 = MODE0(GPIO56) MODE1(CMVREF) MODE2() MODE3(DEBUG_OUT[11]) MODE4() PD
+GPIO57 = MODE0(GPIO57) MODE1(CMHREF) MODE2() MODE3(DEBUG_OUT[10]) MODE4() PD
+GPIO58 = MODE0(GPIO58) MODE1(CMDAT9) MODE2() MODE3(DEBUG_OUT[9]) MODE4() PD
+GPIO59 = MODE0(GPIO59) MODE1(CMDAT8) MODE2() MODE3(DEBUG_OUT[8]) MODE4() PD
+GPIO60 = MODE0(GPIO60) MODE1(CMDAT7) MODE2() MODE3(DEBUG_OUT[7]) MODE4() PD
+GPIO61 = MODE0(GPIO61) MODE1(CMDAT6) MODE2() MODE3(DEBUG_OUT[6]) MODE4() PD
+GPIO62 = MODE0(GPIO62) MODE1(CMDAT5) MODE2() MODE3(DEBUG_OUT[5]) MODE4() PD
+GPIO63 = MODE0(GPIO63) MODE1(CMDAT4) MODE2() MODE3(DEBUG_OUT[4]) MODE4() PD
+GPIO64 = MODE0(GPIO64) MODE1(CMDAT3) MODE2() MODE3(DEBUG_OUT[3]) MODE4() PD
+GPIO65 = MODE0(GPIO65) MODE1(CMDAT2) MODE2() MODE3(DEBUG_OUT[2]) MODE4() PD
+GPIO66 = MODE0(GPIO66) MODE1(CMDAT1) MODE2(PTA0) MODE3(DEBUG_OUT[1]) MODE4() PD
+GPIO67 = MODE0(GPIO67) MODE1(CMDAT0) MODE2(PTA1) MODE3(DEBUG_OUT[0]) MODE4() PD
+GPIO68 = MODE0(GPIO68) MODE1(CMPCLK) MODE2() MODE3(DEBUG_OUT[14]) MODE4() PD
+GPIO69 = MODE0(GPIO69) MODE1(CMMCLK) MODE2(PLL_TCLK_650M_CK) MODE3(DEBUG_OUT[15]) MODE4() PD
+GPIO70 = MODE0(GPIO70) MODE1(LSCK) MODE2(NCE1B) MODE3(MC2WP) MODE4(DSP_JTDI) PD
+GPIO71 = MODE0(GPIO71) MODE1(LSA0) MODE2() MODE3(CLKM11) MODE4(DSP_JTMS) PD
+GPIO72 = MODE0(GPIO72) MODE1(LSDA) MODE2() MODE3(CLKM12) MODE4(DSP_JTDO) PD
+GPIO73 = MODE0(GPIO73) MODE1(LSCE0B) MODE2(USB_DRVVBUS) MODE3(EINT11) MODE4(DSP_EMU_B) --
+GPIO74 = MODE0(GPIO74) MODE1(LSCE1B) MODE2(IRDA_TXD) MODE3(LPCE2B) MODE4(DSP_JTCK) PU
+GPIO75 = MODE0(GPIO75) MODE1(LPCE1B) MODE2() MODE3(IRDA_RXD) MODE4() PU
+GPIO76 = MODE0(GPIO76) MODE1(LPTE) MODE2() MODE3() MODE4() PD
+GPIO77 = MODE0(GPIO77) MODE1(NLD17) MODE2(EINT12) MODE3() MODE4(CINT0) PD
+GPIO78 = MODE0(GPIO78) MODE1(NLD16) MODE2(EINT13) MODE3() MODE4() PD
+GPIO79 = MODE0(GPIO79) MODE1(NRNB) MODE2() MODE3() MODE4() PU
+GPIO80 = MODE0(GPIO80) MODE1(NCLE) MODE2() MODE3(SRCLKENAI3) MODE4() --
+GPIO81 = MODE0(GPIO81) MODE1(NALE) MODE2() MODE3(SRCLKENAI4) MODE4() --
+GPIO82 = MODE0(GPIO82) MODE1(NWEB) MODE2() MODE3() MODE4() --
+GPIO83 = MODE0(GPIO83) MODE1(NREB) MODE2() MODE3() MODE4() --
+GPIO84 = MODE0(GPIO84) MODE1(NCE0B) MODE2() MODE3() MODE4() --
+GPIO85 = MODE0(GPIO85) MODE1(MC2CM0) MODE2() MODE3(DEBUG_OUT[21]) MODE4() PU
+GPIO86 = MODE0(GPIO86) MODE1(MC2DA0) MODE2(MC0DA7) MODE3(DEBUG_OUT[20]) MODE4() PU
+GPIO87 = MODE0(GPIO87) MODE1(MC2DA1) MODE2(MC0DA6) MODE3(DEBUG_OUT[19]) MODE4() PU
+GPIO88 = MODE0(GPIO88) MODE1(MC2DA2) MODE2(MC0DA5) MODE3(EINT4) MODE4(DEBUG_OUT[31]) PU
+GPIO89 = MODE0(GPIO89) MODE1(MC2DA3) MODE2(MC0DA4) MODE3(EINT5) MODE4() PU
+GPIO90 = MODE0(GPIO90) MODE1(MC2CK) MODE2() MODE3(DEBUG_OUT[22]) MODE4(BT_JTMS) PU
+GPIO91 = MODE0(GPIO91) MODE1(MC2CK_FB) MODE2(MC1INS) MODE3(IRDA_PDN) MODE4() PU
+GPIO92 = MODE0(GPIO92) MODE1(MC0CM0) MODE2() MODE3(DEBUG_OUT[29]) MODE4() PU
+GPIO93 = MODE0(GPIO93) MODE1(MC0DA0) MODE2() MODE3(DEBUG_OUT[28]) MODE4() PU
+GPIO94 = MODE0(GPIO94) MODE1(MC0DA1) MODE2() MODE3(DEBUG_OUT[27]) MODE4() PU
+GPIO95 = MODE0(GPIO95) MODE1(MC0DA2) MODE2() MODE3(DEBUG_OUT[26]) MODE4() PU
+GPIO96 = MODE0(GPIO96) MODE1(MC0DA3) MODE2() MODE3(DEBUG_OUT[25]) MODE4() PU
+GPIO97 = MODE0(GPIO97) MODE1(MC0CK) MODE2() MODE3(DEBUG_OUT[30]) MODE4() PU
+GPIO98 = MODE0(GPIO98) MODE1(MC0CK_FB) MODE2() MODE3(DEBUG_OUT[23]) MODE4() PU
+GPIO99 = MODE0(GPIO99) MODE1(MC0WP) MODE2(EINT10) MODE3(CLKM2) MODE4(BT_JTDI) PU
+GPIO100 = MODE0(GPIO100) MODE1(MC0RST) MODE2() MODE3(DEBUG_OUT[24]) MODE4() --
+GPIO101 = MODE0(GPIO101) MODE1(MC1CM0) MODE2(SPI0_CS) MODE3(BT_JRTCK) MODE4() PU
+GPIO102 = MODE0(GPIO102) MODE1(MC1DA0) MODE2(SPI0_MOSI) MODE3(BT_JTRST_B) MODE4() PU
+GPIO103 = MODE0(GPIO103) MODE1(MC1DA1) MODE2(SPI0_MISO) MODE3(BT_JTCK) MODE4() PU
+GPIO104 = MODE0(GPIO104) MODE1(MC1CK) MODE2(SPI0_SCK) MODE3(BT_JTDO) MODE4() PU
+GPIO105 = MODE0(GPIO105) MODE1(MC1CK_FB) MODE2() MODE3(DEBUG_OUT[18]) MODE4(CLKM13) PU
+GPIO106 = MODE0(GPIO106) MODE1() MODE2() MODE3() MODE4() --
+GPIO107 = MODE0(GPIO107) MODE1() MODE2() MODE3() MODE4() --
+GPIO108 = MODE0(GPIO108) MODE1() MODE2() MODE3() MODE4() --
+GPIO109 = MODE0(GPIO109) MODE1() MODE2() MODE3() MODE4() PD
+
+[GPO]
+
+[EINT]
+EINT_COUNT = 29
+EINT_DEBOUNCE_TIME_COUNT = 29
+
+[EINT_EX_PIN]
+0
+1
+2
+3
+4
+5
+6
+7
+8
+9
+10
+11
+12
+13
+14
+15
+16
+17
+18
+19
+20
+21
+23
+24
+25
+26
+27
+28
+30
+
+[EINT_INT_PIN]
+22 = OTG_IDPIN_EINT_NO
+29 = CHR_USB_EINT_NO
+31 = FM_EINT_NO
+
+[EINT_INT_TIME_DELAY]
+EINT22 = 50
+EINT29 = 40
+EINT31 = 0
+
+[ADC]
+ADC_COUNT = 5
+
+[ADC_INT_CH]
+0 = ADC_VBAT
+1 = ADC_VISENSE
+2 = ADC_VCHARGER
+3 = ADC_VBATTMP
+
+[ADC_EX_CH]
+4
+5
+6
+7
+8
+
+[KEYPAD]
+KEY_ROW = 8
+KEY_COLUMN = 9
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6280NS_1.fig b/mcu/custom/driver/drv/Drv_Tool/MT6280NS_1.fig
new file mode 100644
index 0000000..2f4e6b7
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6280NS_1.fig
@@ -0,0 +1,133 @@
+[Chip Type]
+Chip = MT6280NS
+GPIO_ModeNum = 9
+GPIO_Pull_Sel=1
+PMIC_Config=1
+PMIC_Volt_Format = 1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(NLD0) MODE2() MODE3(EINT0) MODE4(CINT0) MODE5(SDIO_INTB) MODE6(MCWP) MODE7(DEBUGOUT6) MODE8(DEBUGOUT1) PU
+GPIO1 = MODE0(GPIO1) MODE1(NLD1) MODE2() MODE3(EINT1) MODE4(CINT1) MODE5(MCINS) MODE6(CLKM0) MODE7(DEBUGOUT7) MODE8(DEBUGOUT0) PU
+GPIO2 = MODE0(GPIO2) MODE1(NLD2) MODE2(DEBUGOUT8) MODE3(U1RXD) MODE4(U1TXD) MODE5(DEBUGOUT5) MODE6(U0RXD) MODE7(SCL) MODE8(DSPJTCK) PU
+GPIO3 = MODE0(GPIO3) MODE1(NLD3) MODE2(DEBUGOUT9) MODE3(U1TXD) MODE4(U1RXD) MODE5(DEBUGOUT6) MODE6(U0TXD) MODE7(SDA) MODE8(DSPJTMS) PU
+GPIO4 = MODE0(GPIO4) MODE1(NLD4) MODE2(DAIPCMIN) MODE3(DEBUGOUT10) MODE4() MODE5(DEBUGOUT7) MODE6(U1RTS) MODE7(DEBUGOUT2) MODE8(DSPJTD) PU
+GPIO5 = MODE0(GPIO5) MODE1(NLD5) MODE2(DAICLK) MODE3() MODE4() MODE5() MODE6(U1CTS) MODE7(DEBUGOUT3) MODE8(DCXO32K) PD
+GPIO6 = MODE0(GPIO6) MODE1(NLD6) MODE2(DAISYNC) MODE3() MODE4() MODE5() MODE6(U0CTS) MODE7(DEBUGOUT6) MODE8(DEBUGOUT0) PU
+GPIO7 = MODE0(GPIO7) MODE1(NLD7) MODE2(DAIPCMOUT) MODE3() MODE4(BSIACS) MODE5(CLKM1) MODE6(U0RTS) MODE7(DEBUGOUT8) MODE8() PU
+GPIO8 = MODE0(GPIO8) MODE1(NLD8) MODE2() MODE3(CLK32K) MODE4() MODE5() MODE6(DEBUGOUT6) MODE7() MODE8() PD
+GPIO9 = MODE0(GPIO9) MODE1(NLD9) MODE2() MODE3(DSPJTCK) MODE4(DEBUGOUT10) MODE5(BSIACS) MODE6(DEBUGOUT7) MODE7(MCUJTDO) MODE8() PD
+GPIO10 = MODE0(GPIO10) MODE1(NLD10) MODE2() MODE3(DSPJTMS) MODE4() MODE5(BSIADATAO) MODE6(DEBUGOUT8) MODE7(MCUJTDI) MODE8() PD
+GPIO11 = MODE0(GPIO11) MODE1(NLD11) MODE2() MODE3(DSPJTD) MODE4() MODE5(BSIADATAI) MODE6(DEBUGOUT9) MODE7(MCUJTCK) MODE8() PD
+GPIO12 = MODE0(GPIO12) MODE1(NLD12) MODE2() MODE3() MODE4() MODE5(BSIACLK) MODE6(DEBUGOUT10) MODE7(MCUJTMS) MODE8() PD
+GPIO13 = MODE0(GPIO13) MODE1(NLD13) MODE2() MODE3() MODE4() MODE5() MODE6(DEBUGOUT11) MODE7(MCUJTRSTB) MODE8() PD
+GPIO14 = MODE0(GPIO14) MODE1(NLD14) MODE2() MODE3(U0RXD) MODE4() MODE5() MODE6(DEBUGOUT12) MODE7() MODE8() PU
+GPIO15 = MODE0(GPIO15) MODE1(NLD15) MODE2(WCDMA_EXT_FRAME_SYNC) MODE3(U0TXD) MODE4() MODE5() MODE6(DEBUGOUT13) MODE7() MODE8() PU
+GPIO16 = MODE0(GPIO16) MODE1(BSIB0CS0) MODE2(BSIB4CS1) MODE3(CLK32K) MODE4(USBIDDIG) MODE5(BSIACLK) MODE6(DAIRST) MODE7(CLKM0) MODE8(EINT0) PU
+GPIO17 = MODE0(GPIO17) MODE1(CLK32K) MODE2() MODE3(BSIADATAO) MODE4(MCINS) MODE5(CLKM0) MODE6(PWM) MODE7(DEBUGOUT6) MODE8() PD
+GPIO18 = MODE0(GPIO18) MODE1() MODE2() MODE3() MODE4(NLD0) MODE5() MODE6() MODE7(DEBUGOUT0) MODE8() PD
+GPIO19 = MODE0(GPIO19) MODE1() MODE2() MODE3() MODE4(NLD1) MODE5() MODE6() MODE7(DEBUGOUT1) MODE8() PD
+GPIO20 = MODE0(GPIO20) MODE1() MODE2() MODE3() MODE4(NLD2) MODE5() MODE6() MODE7(DEBUGOUT2) MODE8() PD
+GPIO21 = MODE0(GPIO21) MODE1() MODE2() MODE3() MODE4(NLD3) MODE5() MODE6() MODE7(DEBUGOUT3) MODE8() PD
+GPIO22 = MODE0(GPIO22) MODE1() MODE2() MODE3() MODE4(NLD4) MODE5() MODE6() MODE7(DEBUGOUT4) MODE8() PD
+GPIO23 = MODE0(GPIO23) MODE1() MODE2() MODE3() MODE4(NLD5) MODE5() MODE6() MODE7(DEBUGOUT5) MODE8() PD
+GPIO24 = MODE0(GPIO24) MODE1() MODE2() MODE3() MODE4(NLD6) MODE5() MODE6() MODE7(DEBUGOUT6) MODE8() PD
+GPIO25 = MODE0(GPIO25) MODE1() MODE2() MODE3() MODE4(NLD7) MODE5() MODE6() MODE7(DEBUGOUT7) MODE8() PD
+GPIO26 = MODE0(GPIO26) MODE1(U1RTS) MODE2(BSIB2CLK) MODE3(CLKM0) MODE4(LPCE0B) MODE5(DEBUGOUT11) MODE6() MODE7(DEBUGOUT6) MODE8() PD
+GPIO27 = MODE0(GPIO27) MODE1(DEBUGOUT12) MODE2(BSIB2DATA) MODE3(MCUJRTCK) MODE4(LPCE1B) MODE5(BSIADATAI) MODE6() MODE7(DEBUGOUT6) MODE8(DEBUGOUT1) PD
+GPIO28 = MODE0(GPIO28) MODE1(U1CTS) MODE2() MODE3() MODE4(LPRSTB) MODE5(DEBUGOUT13) MODE6() MODE7(DEBUGOUT7) MODE8(DEBUGOUT1) PD
+GPIO29 = MODE0(GPIO29) MODE1() MODE2() MODE3() MODE4(LPRDB) MODE5(CLKM1) MODE6(EINT2) MODE7(DEBUGOUT14) MODE8() --
+GPIO30 = MODE0(GPIO30) MODE1() MODE2() MODE3(LPTE) MODE4(LPWRB) MODE5(WCDMA_EXT_FRAME_SYNC) MODE6(EINT3) MODE7(DEBUGOUT15) MODE8() PD
+GPIO31 = MODE0(GPIO31) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO32 = MODE0(GPIO32) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO33 = MODE0(GPIO33) MODE1() MODE2() MODE3() MODE4(BPIBUS8) MODE5() MODE6() MODE7() MODE8() PD
+GPIO34 = MODE0(GPIO34) MODE1(SRCLKENA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO35 = MODE0(GPIO35) MODE1(VM0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO36 = MODE0(GPIO36) MODE1(VM1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO37 = MODE0(GPIO37) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO38 = MODE0(GPIO38) MODE1(BPIBUS12) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO39 = MODE0(GPIO39) MODE1(BPIBUS13) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO40 = MODE0(GPIO40) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO41 = MODE0(GPIO41) MODE1() MODE2() MODE3() MODE4(BPIBUS0) MODE5() MODE6() MODE7() MODE8() PD
+GPIO42 = MODE0(GPIO42) MODE1() MODE2() MODE3() MODE4(BPIBUS1) MODE5() MODE6() MODE7() MODE8() PD
+GPIO43 = MODE0(GPIO43) MODE1() MODE2() MODE3() MODE4(BPIBUS2) MODE5() MODE6() MODE7() MODE8() PD
+GPIO44 = MODE0(GPIO44) MODE1() MODE2() MODE3() MODE4(BPIBUS3) MODE5() MODE6() MODE7() MODE8() PD
+GPIO45 = MODE0(GPIO45) MODE1() MODE2(BSIC0DATA) MODE3() MODE4(BPIBUS4) MODE5() MODE6() MODE7() MODE8() PD
+GPIO46 = MODE0(GPIO46) MODE1() MODE2(BSIC0CLK) MODE3() MODE4(BPIBUS5) MODE5() MODE6() MODE7() MODE8() PD
+GPIO47 = MODE0(GPIO47) MODE1() MODE2() MODE3() MODE4(BPIBUS6) MODE5() MODE6() MODE7() MODE8() PD
+GPIO48 = MODE0(GPIO48) MODE1() MODE2() MODE3() MODE4(BPIBUS7) MODE5() MODE6() MODE7() MODE8() PD
+GPIO49 = MODE0(GPIO49) MODE1() MODE2() MODE3(GPS_SYNC) MODE4(USBDRVVBUS) MODE5(WCDMA_EXT_FRAME_SYNC) MODE6(CLKM0) MODE7(DEBUGOUT11) MODE8() PD
+GPIO50 = MODE0(GPIO50) MODE1() MODE2() MODE3() MODE4(U2RXD) MODE5(U2TXD) MODE6() MODE7() MODE8() PD
+GPIO51 = MODE0(GPIO51) MODE1() MODE2() MODE3() MODE4(U2TXD) MODE5(U2RXD) MODE6() MODE7() MODE8() PU
+GPIO52 = MODE0(GPIO52) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO53 = MODE0(GPIO53) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO54 = MODE0(GPIO54) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO55 = MODE0(GPIO55) MODE1(SDA) MODE2(BSIB1DATA) MODE3(U2RXD) MODE4(CLK32K) MODE5(DAIPCMIN) MODE6(U1CTS) MODE7() MODE8() PU
+GPIO56 = MODE0(GPIO56) MODE1(SCL) MODE2(BSIB1CS1) MODE3(U2TXD) MODE4() MODE5(DAICLK) MODE6(U1RTS) MODE7() MODE8() PU
+GPIO57 = MODE0(GPIO57) MODE1() MODE2(BSIB1CLK) MODE3(U2CTS) MODE4() MODE5(DAIPCMOUT) MODE6(U0CTS) MODE7() MODE8() PD
+GPIO58 = MODE0(GPIO58) MODE1() MODE2(BSIB1CS0) MODE3(U2RTS) MODE4() MODE5(DAISYNC) MODE6(U0RTS) MODE7() MODE8() PD
+GPIO59 = MODE0(GPIO59) MODE1() MODE2() MODE3(U0RXD) MODE4(U0TXD) MODE5(U2RXD) MODE6(U2TXD) MODE7() MODE8() PU
+GPIO60 = MODE0(GPIO60) MODE1() MODE2() MODE3(U0TXD) MODE4(U0RXD) MODE5(U2TXD) MODE6(U2RXD) MODE7() MODE8() PU
+GPIO61 = MODE0(GPIO61) MODE1(MCCM) MODE2(SPICS) MODE3(SDRESP) MODE4(DEBUGOUT0) MODE5(DSPJTCK) MODE6(BSIADATAI) MODE7(MCUJTDO) MODE8(DEBUGOUT7) PU
+GPIO62 = MODE0(GPIO62) MODE1(MCDA0) MODE2(SPIMOSI) MODE3(SDDATA0) MODE4(DEBUGOUT1) MODE5(DSPJTMS) MODE6(BSIACLK) MODE7(MCUJTDI) MODE8(DEBUGOUT6) PU
+GPIO63 = MODE0(GPIO63) MODE1(MCDA1) MODE2(SPIMISO) MODE3(SDDATA1) MODE4(DEBUGOUT2) MODE5(DSPJTD) MODE6(BSIACS) MODE7(MCUJTCK) MODE8(DEBUGOUT5) PU
+GPIO64 = MODE0(GPIO64) MODE1(MCDA2) MODE2(SPISCK) MODE3(SDDATA2) MODE4(DEBUGOUT3) MODE5(CLKM0) MODE6(BSIADATAO) MODE7(MCUJTMS) MODE8(DEBUGOUT4) PU
+GPIO65 = MODE0(GPIO65) MODE1(MCDA3) MODE2(WCDMA_EXT_FRAME_SYNC) MODE3(SDDATA3) MODE4(DEBUGOUT4) MODE5(CLKM1) MODE6(BSIADATAO) MODE7(MCUJTRSTB) MODE8(DEBUGOUT3) PU
+GPIO66 = MODE0(GPIO66) MODE1(MCCK) MODE2(DSPJTCK) MODE3(SDCLK) MODE4(DEBUGOUT5) MODE5(BPIBUS14) MODE6(BPIBUS15) MODE7(BSIACLK) MODE8(DEBUGOUT2) PU
+GPIO67 = MODE0(GPIO67) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO68 = MODE0(GPIO68) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO69 = MODE0(GPIO69) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() --
+GPIO70 = MODE0(GPIO70) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO71 = MODE0(GPIO71) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO72 = MODE0(GPIO72) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO73 = MODE0(GPIO73) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO74 = MODE0(GPIO74) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO75 = MODE0(GPIO75) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO76 = MODE0(GPIO76) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO77 = MODE0(GPIO77) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO78 = MODE0(GPIO78) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO79 = MODE0(GPIO79) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO80 = MODE0(GPIO80) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO81 = MODE0(GPIO81) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO82 = MODE0(GPIO82) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO83 = MODE0(GPIO83) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO84 = MODE0(GPIO84) MODE1(NRNB) MODE2(SFIO2) MODE3(SCL) MODE4(U0RXD) MODE5(U0TXD) MODE6(SDCLK_OUT) MODE7(DEBUGOUT0) MODE8() PU
+GPIO85 = MODE0(GPIO85) MODE1(NWEB) MODE2(SFIO1) MODE3(SDA) MODE4(U0TXD) MODE5(U0RXD) MODE6(SDIO_INTB) MODE7(DEBUGOUT1) MODE8() PU
+GPIO86 = MODE0(GPIO86) MODE1(NREB) MODE2(SFIO0) MODE3(BSIB3CLK) MODE4(U1RTS) MODE5() MODE6() MODE7(DEBUGOUT2) MODE8() PU
+GPIO87 = MODE0(GPIO87) MODE1(NCLE) MODE2(SFCS) MODE3(BSIB3CS0) MODE4(U0RTS) MODE5() MODE6() MODE7(DEBUGOUT3) MODE8() PU
+GPIO88 = MODE0(GPIO88) MODE1(NALE) MODE2(SFCLK) MODE3(BSIB3DATA) MODE4(U1CTS) MODE5(SDA) MODE6() MODE7(DEBUGOUT4) MODE8() PD
+GPIO89 = MODE0(GPIO89) MODE1(NCE0B) MODE2(SFIO3) MODE3(BSIB3CS1) MODE4(U0CTS) MODE5(SCL) MODE6() MODE7(DEBUGOUT5) MODE8(WCDMA_EXT_FRAME_SYNC) PU
+GPIO90 = MODE0(GPIO90) MODE1(WATCHDOG) MODE2(GPS_SYNC) MODE3(SRCLKENAI) MODE4() MODE5() MODE6() MODE7(CLK32K) MODE8() PD
+GPIO91 = MODE0(GPIO91) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO92 = MODE0(GPIO92) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO93 = MODE0(GPIO93) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO94 = MODE0(GPIO94) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO95 = MODE0(GPIO95) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO96 = MODE0(GPIO96) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() --
+GPIO97 = MODE0(GPIO97) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() --
+GPIO98 = MODE0(GPIO98) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() --
+GPIO99 = MODE0(GPIO99) MODE1() MODE2(BSIB2CS0) MODE3(CLK32K) MODE4(LPA0) MODE5(DAIRST) MODE6(CLKM1) MODE7(DEBUGOUT12) MODE8(DEBUGOUT5) --
+GPIO100 = MODE0(GPIO100) MODE1() MODE2() MODE3() MODE4() MODE5(SCL) MODE6(U2RXD) MODE7() MODE8() --
+GPIO101 = MODE0(GPIO101) MODE1() MODE2() MODE3(EINT2) MODE4() MODE5(SDA) MODE6(U2TXD) MODE7() MODE8() --
+GPIO102 = MODE0(GPIO102) MODE1() MODE2() MODE3(EINT3) MODE4() MODE5() MODE6() MODE7() MODE8() --
+GPIO103 = MODE0(GPIO103) MODE1() MODE2() MODE3(U2RXD) MODE4(CLKM0) MODE5(SDA) MODE6() MODE7() MODE8() --
+GPIO104 = MODE0(GPIO104) MODE1() MODE2() MODE3(U2TXD) MODE4(CLKM1) MODE5(SCL) MODE6() MODE7() MODE8() --
+
+
+[GPO]
+
+[EINT]
+EINT_COUNT = 4
+EINT_DEBOUNCE_TIME_COUNT = 4
+
+[ADC]
+ADC_COUNT = 1
+
+[KEYPAD]
+KEY_ROW = 0
+KEY_COLUMN = 0
+
+
+
+
+
+
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6280SP_1.fig b/mcu/custom/driver/drv/Drv_Tool/MT6280SP_1.fig
new file mode 100644
index 0000000..4f5ddfe
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6280SP_1.fig
@@ -0,0 +1,130 @@
+[Chip Type]
+Chip = MT6280SP
+GPIO_ModeNum = 9
+GPIO_Pull_Sel=1
+PMIC_Config=1
+PMIC_Volt_Format = 1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(NLD0) MODE2() MODE3(EINT0) MODE4(CINT0) MODE5(SDIO_INTB) MODE6(MCWP) MODE7(DEBUGOUT6) MODE8(DEBUGOUT1) PU
+GPIO1 = MODE0(GPIO1) MODE1(NLD1) MODE2() MODE3(EINT1) MODE4(CINT1) MODE5(MCINS) MODE6(CLKM0) MODE7(DEBUGOUT7) MODE8(DEBUGOUT0) PU
+GPIO2 = MODE0(GPIO2) MODE1(NLD2) MODE2(DEBUGOUT8) MODE3(U1RXD) MODE4(U1TXD) MODE5(DEBUGOUT5) MODE6(U0RXD) MODE7(SCL) MODE8(DSPJTCK) PU
+GPIO3 = MODE0(GPIO3) MODE1(NLD3) MODE2(DEBUGOUT9) MODE3(U1TXD) MODE4(U1RXD) MODE5(DEBUGOUT6) MODE6(U0TXD) MODE7(SDA) MODE8(DSPJTMS) PU
+GPIO4 = MODE0(GPIO4) MODE1(NLD4) MODE2(DAIPCMIN) MODE3(DEBUGOUT10) MODE4() MODE5(DEBUGOUT7) MODE6(U1RTS) MODE7(DEBUGOUT2) MODE8(DSPJTD) PU
+GPIO5 = MODE0(GPIO5) MODE1(NLD5) MODE2(DAICLK) MODE3() MODE4() MODE5() MODE6(U1CTS) MODE7(DEBUGOUT3) MODE8(DCXO32K) PD
+GPIO6 = MODE0(GPIO6) MODE1(NLD6) MODE2(DAISYNC) MODE3() MODE4() MODE5() MODE6(U0CTS) MODE7(DEBUGOUT6) MODE8(DEBUGOUT0) PU
+GPIO7 = MODE0(GPIO7) MODE1(NLD7) MODE2(DAIPCMOUT) MODE3() MODE4(BSIACS) MODE5(CLKM1) MODE6(U0RTS) MODE7(DEBUGOUT8) MODE8() PU
+GPIO8 = MODE0(GPIO8) MODE1(NLD8) MODE2() MODE3(CLK32K) MODE4() MODE5() MODE6(DEBUGOUT6) MODE7() MODE8() PD
+GPIO9 = MODE0(GPIO9) MODE1(NLD9) MODE2() MODE3(DSPJTCK) MODE4(DEBUGOUT10) MODE5(BSIACS) MODE6(DEBUGOUT7) MODE7(MCUJTDO) MODE8() PD
+GPIO10 = MODE0(GPIO10) MODE1(NLD10) MODE2() MODE3(DSPJTMS) MODE4() MODE5(BSIADATAO) MODE6(DEBUGOUT8) MODE7(MCUJTDI) MODE8() PD
+GPIO11 = MODE0(GPIO11) MODE1(NLD11) MODE2() MODE3(DSPJTD) MODE4() MODE5(BSIADATAI) MODE6(DEBUGOUT9) MODE7(MCUJTCK) MODE8() PD
+GPIO12 = MODE0(GPIO12) MODE1(NLD12) MODE2() MODE3() MODE4() MODE5(BSIACLK) MODE6(DEBUGOUT10) MODE7(MCUJTMS) MODE8() PD
+GPIO13 = MODE0(GPIO13) MODE1(NLD13) MODE2() MODE3() MODE4() MODE5() MODE6(DEBUGOUT11) MODE7(MCUJTRSTB) MODE8() PD
+GPIO14 = MODE0(GPIO14) MODE1(NLD14) MODE2() MODE3(U0RXD) MODE4() MODE5() MODE6(DEBUGOUT12) MODE7() MODE8() PU
+GPIO15 = MODE0(GPIO15) MODE1(NLD15) MODE2(WCDMA_EXT_FRAME_SYNC) MODE3(U0TXD) MODE4() MODE5() MODE6(DEBUGOUT13) MODE7() MODE8() PU
+GPIO16 = MODE0(GPIO16) MODE1(BSIB0CS0) MODE2(BSIB4CS1) MODE3(CLK32K) MODE4(USBIDDIG) MODE5(BSIACLK) MODE6(DAIRST) MODE7(CLKM0) MODE8(EINT0) PU
+GPIO17 = MODE0(GPIO17) MODE1(CLK32K) MODE2() MODE3(BSIADATAO) MODE4(MCINS) MODE5(CLKM0) MODE6(PWM) MODE7(DEBUGOUT6) MODE8() PD
+GPIO18 = MODE0(GPIO18) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO19 = MODE0(GPIO19) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO20 = MODE0(GPIO20) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO21 = MODE0(GPIO21) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO22 = MODE0(GPIO22) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO23 = MODE0(GPIO23) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO24 = MODE0(GPIO24) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO25 = MODE0(GPIO25) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO26 = MODE0(GPIO26) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO27 = MODE0(GPIO27) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO28 = MODE0(GPIO28) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO29 = MODE0(GPIO29) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() --
+GPIO30 = MODE0(GPIO30) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO31 = MODE0(GPIO31) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO32 = MODE0(GPIO32) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO33 = MODE0(GPIO33) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO34 = MODE0(GPIO34) MODE1(SRCLKENA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO35 = MODE0(GPIO35) MODE1(VM0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO36 = MODE0(GPIO36) MODE1(VM1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO37 = MODE0(GPIO37) MODE1(BPIBUS6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO38 = MODE0(GPIO38) MODE1(BPIBUS12) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO39 = MODE0(GPIO39) MODE1(BPIBUS13) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO40 = MODE0(GPIO40) MODE1(BPIBUS8) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO41 = MODE0(GPIO41) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO42 = MODE0(GPIO42) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO43 = MODE0(GPIO43) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO44 = MODE0(GPIO44) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO45 = MODE0(GPIO45) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO46 = MODE0(GPIO46) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO47 = MODE0(GPIO47) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO48 = MODE0(GPIO48) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO49 = MODE0(GPIO49) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO50 = MODE0(GPIO50) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO51 = MODE0(GPIO51) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO52 = MODE0(GPIO52) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO53 = MODE0(GPIO53) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO54 = MODE0(GPIO54) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO55 = MODE0(GPIO55) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO56 = MODE0(GPIO56) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO57 = MODE0(GPIO57) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO58 = MODE0(GPIO58) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO59 = MODE0(GPIO59) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO60 = MODE0(GPIO60) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO61 = MODE0(GPIO61) MODE1(MCCM) MODE2(SPICS) MODE3(SDRESP) MODE4(DEBUGOUT0) MODE5(DSPJTCK) MODE6(BSIADATAI) MODE7(MCUJTDO) MODE8(DEBUGOUT7) PU
+GPIO62 = MODE0(GPIO62) MODE1(MCDA0) MODE2(SPIMOSI) MODE3(SDDATA0) MODE4(DEBUGOUT1) MODE5(DSPJTMS) MODE6(BSIACLK) MODE7(MCUJTDI) MODE8(DEBUGOUT6) PU
+GPIO63 = MODE0(GPIO63) MODE1(MCDA1) MODE2(SPIMISO) MODE3(SDDATA1) MODE4(DEBUGOUT2) MODE5(DSPJTD) MODE6(BSIACS) MODE7(MCUJTCK) MODE8(DEBUGOUT5) PU
+GPIO64 = MODE0(GPIO64) MODE1(MCDA2) MODE2(SPISCK) MODE3(SDDATA2) MODE4(DEBUGOUT3) MODE5(CLKM0) MODE6(BSIADATAO) MODE7(MCUJTMS) MODE8(DEBUGOUT4) PU
+GPIO65 = MODE0(GPIO65) MODE1(MCDA3) MODE2(WCDMA_EXT_FRAME_SYNC) MODE3(SDDATA3) MODE4(DEBUGOUT4) MODE5(CLKM1) MODE6(BSIADATAO) MODE7(MCUJTRSTB) MODE8(DEBUGOUT3) PU
+GPIO66 = MODE0(GPIO66) MODE1(MCCK) MODE2(DSPJTCK) MODE3(SDCLK) MODE4(DEBUGOUT5) MODE5(BPIBUS14) MODE6(BPIBUS15) MODE7(BSIACLK) MODE8(DEBUGOUT2) PU
+GPIO67 = MODE0(GPIO67) MODE1(DAIPCMOUT) MODE2(DEBUGOUT1) MODE3(DSPJTMS) MODE4(DEBUGOUT6) MODE5(BSIADATAI) MODE6(MON_EDQ8D) MODE7(MON_ECATQ) MODE8(EINT0) PD
+GPIO68 = MODE0(GPIO68) MODE1(DAIPCMIN) MODE2(BSIB0CLK) MODE3(BPIBUS14) MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO69 = MODE0(GPIO69) MODE1(DAISYNC) MODE2(DEBUGOUT0) MODE3(BSIACS) MODE4(DEBUGOUT7) MODE5(BSIADATAO) MODE6(DSPJTD) MODE7(MON_ECKE) MODE8(MCWP) --
+GPIO70 = MODE0(GPIO70) MODE1(SCL) MODE2(BSIB0CS1) MODE3(BPIBUS15) MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO71 = MODE0(GPIO71) MODE1(SDA) MODE2(BSIB0DATA) MODE3() MODE4() MODE5() MODE6(DEBUGOUT13) MODE7() MODE8() PU
+GPIO72 = MODE0(GPIO72) MODE1(DAICLK) MODE2(BSIB0DATA) MODE3() MODE4(EINT0) MODE5(BSIACS) MODE6(DEBUGOUT14) MODE7(MON_EWRB) MODE8() PD
+GPIO73 = MODE0(GPIO73) MODE1(BPIBUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO74 = MODE0(GPIO74) MODE1(BPIBUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO75 = MODE0(GPIO75) MODE1(BPIBUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO76 = MODE0(GPIO76) MODE1(BPIBUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PD
+GPIO77 = MODE0(GPIO77) MODE1(BPIBUS4) MODE2() MODE3() MODE4(BSIC1DATA) MODE5() MODE6() MODE7() MODE8() PD
+GPIO78 = MODE0(GPIO78) MODE1() MODE2() MODE3(U2TXD) MODE4(U2RXD) MODE5() MODE6() MODE7(MON_ECASB) MODE8() PD
+GPIO79 = MODE0(GPIO79) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(MON_ERASB) MODE8() PD
+GPIO80 = MODE0(GPIO80) MODE1(BPIBUS5) MODE2() MODE3() MODE4(BSIC1CLK) MODE5() MODE6() MODE7() MODE8() PD
+GPIO81 = MODE0(GPIO81) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6(MON_EDQS1) MODE7(MON_EDTQ) MODE8() PD
+GPIO82 = MODE0(GPIO82) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6(MON_EDQS0) MODE7(MON_ECACLK) MODE8() PU
+GPIO83 = MODE0(GPIO83) MODE1() MODE2() MODE3(U2RXD) MODE4(U2TXD) MODE5() MODE6(MON_EDQ0D) MODE7(MON_EDCLK) MODE8() PU
+GPIO84 = MODE0(GPIO84) MODE1(NRNB) MODE2(SFIO2) MODE3(SCL) MODE4(U0RXD) MODE5(U0TXD) MODE6(SDCLK_OUT) MODE7(DEBUGOUT0) MODE8() PU
+GPIO85 = MODE0(GPIO85) MODE1(NWEB) MODE2(SFIO1) MODE3(SDA) MODE4(U0TXD) MODE5(U0RXD) MODE6(SDIO_INTB) MODE7(DEBUGOUT1) MODE8() PU
+GPIO86 = MODE0(GPIO86) MODE1(NREB) MODE2(SFIO0) MODE3(BSIB3CLK) MODE4(U1RTS) MODE5() MODE6() MODE7(DEBUGOUT2) MODE8() PU
+GPIO87 = MODE0(GPIO87) MODE1(NCLE) MODE2(SFCS) MODE3(BSIB3CS0) MODE4(U0RTS) MODE5() MODE6() MODE7(DEBUGOUT3) MODE8() PU
+GPIO88 = MODE0(GPIO88) MODE1(NALE) MODE2(SFCLK) MODE3(BSIB3DATA) MODE4(U1CTS) MODE5(SDA) MODE6() MODE7(DEBUGOUT4) MODE8() PD
+GPIO89 = MODE0(GPIO89) MODE1(NCE0B) MODE2(SFIO3) MODE3(BSIB3CS1) MODE4(U0CTS) MODE5(SCL) MODE6() MODE7(DEBUGOUT5) MODE8(WCDMA_EXT_FRAME_SYNC) PU
+GPIO90 = MODE0(GPIO90) MODE1(WATCHDOG) MODE2(GPS_SYNC) MODE3(SRCLKENAI) MODE4() MODE5() MODE6() MODE7(CLK32K) MODE8() PD
+GPIO91 = MODE0(GPIO91) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO92 = MODE0(GPIO92) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO93 = MODE0(GPIO93) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO94 = MODE0(GPIO94) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO95 = MODE0(GPIO95) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() PU
+GPIO96 = MODE0(GPIO96) MODE1(U0RXD) MODE2(U0TXD) MODE3(U2RXD) MODE4(U2TXD) MODE5() MODE6() MODE7() MODE8() --
+GPIO97 = MODE0(GPIO97) MODE1(U0TXD) MODE2(U0RXD) MODE3(U2TXD) MODE4(U2RXD) MODE5() MODE6() MODE7() MODE8() --
+GPIO98 = MODE0(GPIO98) MODE1(MCINS) MODE2(WCDMA_EXT_FRAME_SYNC) MODE3(CLKM1) MODE4(EINT0) MODE5(CINT0) MODE6() MODE7() MODE8() --
+GPIO99 = MODE0(GPIO99) MODE1() MODE2(BSIB2CS0) MODE3(CLK32K) MODE4(LPA0) MODE5(DAIRST) MODE6(CLKM1) MODE7(DEBUGOUT12) MODE8(DEBUGOUT5) --
+GPIO100 = MODE0(GPIO100) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() --
+GPIO101 = MODE0(GPIO101) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() --
+GPIO102 = MODE0(GPIO102) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() MODE8() --
+GPIO103 = MODE0(GPIO103) MODE1() MODE2() MODE3(U2RXD) MODE4(CLKM0) MODE5(SDA) MODE6() MODE7() MODE8() --
+GPIO104 = MODE0(GPIO104) MODE1() MODE2() MODE3(U2TXD) MODE4(CLKM1) MODE5(SCL) MODE6() MODE7() MODE8() --
+
+
+[GPO]
+
+[EINT]
+EINT_COUNT = 4
+EINT_DEBOUNCE_TIME_COUNT = 4
+
+[ADC]
+ADC_COUNT = 1
+
+[KEYPAD]
+KEY_ROW = 0
+KEY_COLUMN = 0
+
+
+
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6290.fig b/mcu/custom/driver/drv/Drv_Tool/MT6290.fig
new file mode 100644
index 0000000..78f052e
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6290.fig
@@ -0,0 +1,50 @@
+[Chip Type]
+Chip = MT6290
+IOMUX_ModeNum = 6
+GPIO_COUNT = 64
+GPIO_Pull_Sel = 1
+PMIC_Config=1
+
+[EINT]
+EINT_COUNT = 16
+EINT_DEBOUNCE_TIME_COUNT = 255
+DEDICATED_EINT_COUNT = 4
+
+[IOMUX_MODE]
+SEL_NFI_0 = MODE0(NFI) MODE1() MODE2(SRCLKEN_OUT) MODE3(EHPI_SLV) MODE4(GPIO) MODE5(DBG)
+SEL_NFI_1 = MODE0(NFI) MODE1() MODE2() MODE3(EHPI_SLV) MODE4(GPO) MODE5(DBG)
+SEL_NFI_2 = MODE0(NFI) MODE1() MODE2(PCM) MODE3(EHPI_SLV) MODE4(GPIO) MODE5(DBG)
+SEL_NFI_3 = MODE0(NFI) MODE1() MODE2(IDC) MODE3(EHPI_SLV) MODE4(GPIO) MODE5(DBG)
+SEL_NFI_4 = MODE0(NFI) MODE1() MODE2(AGPS_OUT) MODE3(EHPI_SLV) MODE4(GPIO) MODE5(DBG)
+SEL_JTAG = MODE0(TDO) MODE1(2GDSP_SICE) MODE2(MD32) MODE3() MODE4() MODE5(DBG)
+SEL_SPI0 = MODE0(SPI) MODE1(STP0) MODE2() MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_SPI1 = MODE0(SPI) MODE1(STP0) MODE2() MODE3(SRCLKEN_OUT) MODE4(GPIO) MODE5(DBG)
+SEL_SUART0 = MODE0(SUART0) MODE1(EXT_FRAME_SYNC) MODE2() MODE3() MODE4() MODE5()
+SEL_SDIO = MODE0(SDIO) MODE1(F32K_CLK_OUT) MODE2() MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_MSDC0P_0 = MODE0(MSDC0P) MODE1(STP1) MODE2(MAS_CCDDIF) MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_MSDC0P_1 = MODE0(MSDC0P) MODE1(STP1) MODE2(MAS_CCDDIF) MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_MSDC0P_2 = MODE0(MSDC0P) MODE1(STP1) MODE2(SLV_CCDDIF) MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_MSDC1P = MODE0(MSDC1P) MODE1() MODE2(SLV_CCDDIF) MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_PMIC_BSI = MODE0(PMIC_BSI) MODE1() MODE2() MODE3(SRCLKEN_OUT) MODE4(GPIO) MODE5(DBG)
+SEL_RFIC1_BSI = MODE0(RFIC1_BSI) MODE1() MODE2() MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_MISC_BSI_0 = MODE0(MISC_BSI) MODE1(MIPI) MODE2(USIM) MODE3() MODE4(GPO/GPIO58) MODE5(DBG)
+SEL_MISC_BSI_1 = MODE0(MISC_BSI) MODE1() MODE2() MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_I2C = MODE0(I2C) MODE1() MODE2() MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_BPI_0 = MODE0(BPI) MODE1() MODE2() MODE3() MODE4() MODE5(DBG)
+SEL_BPI_1 = MODE0(BPI) MODE1() MODE2() MODE3() MODE4() MODE5(DBG)
+SEL_BPI_2 = MODE0(BPI) MODE1() MODE2() MODE3() MODE4() MODE5(DBG)
+SEL_BPI_3 = MODE0(BPI) MODE1() MODE2() MODE3() MODE4() MODE5(DBG)
+SEL_BPI_4 = MODE0(BPI) MODE1() MODE2() MODE3() MODE4() MODE5(DBG)
+SEL_BPI_5 = MODE0(BPI) MODE1() MODE2() MODE3() MODE4() MODE5(DBG)
+SEL_USIM1 = MODE0(USIM0) MODE1() MODE2() MODE3() MODE4(GPO) MODE5(DBG)
+SEL_USIM2 = MODE0(USIM1) MODE1(F32K_CLK_OUT) MODE2() MODE3() MODE4(GPO) MODE5(DBG)
+SEL_GPIO_0_0 = MODE0(LED) MODE1(STP0_1) MODE2(CA_INTF) MODE3(MII) MODE4(GPIO) MODE5(DBG)
+SEL_GPIO_0_1 = MODE0(LED) MODE1(STP0) MODE2(CA_INTF) MODE3(MII) MODE4(GPIO) MODE5(DBG)
+SEL_GPIO_1 = MODE0(LED) MODE1(STP0) MODE2(CA_INTF) MODE3(MII) MODE4(GPIO) MODE5(DBG)
+SEL_GPIO_2_0 = MODE0(LED) MODE1(STP0) MODE2(CA_INTF) MODE3(MII) MODE4(GPIO) MODE5(DBG)
+SEL_GPIO_2_1 = MODE0(LED) MODE1(STP0) MODE2(CA_INTF) MODE3(MII) MODE4(GPIO) MODE5(DBG)
+SEL_GPIO_3 = MODE0(LED) MODE1(STP1) MODE2(CA_INTF) MODE3(MII) MODE4(GPIO) MODE5(DBG)
+SEL_GPIO_4 = MODE0(IDC) MODE1(STP1) MODE2(MAS_CCDDIF) MODE3(MII) MODE4(GPIO) MODE5(DBG)
+SEL_SDIO_INT = MODE0(SDIO_HOST_INTB) MODE1() MODE2() MODE3() MODE4(GPO) MODE5(DBG)
+SEL_DMCMDPHY = MODE0(GPO) MODE1() MODE2() MODE3() MODE4() MODE5(DBG)
+
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6290m.fig b/mcu/custom/driver/drv/Drv_Tool/MT6290m.fig
new file mode 100644
index 0000000..7436a16
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6290m.fig
@@ -0,0 +1,51 @@
+[Chip Type]
+Chip = MT6290m
+IOMUX_ModeNum = 6
+GPIO_COUNT = 64
+GPIO_Pull_Sel = 1
+PMIC_Config=1
+
+[EINT]
+EINT_COUNT = 16
+EINT_DEBOUNCE_TIME_COUNT = 255
+DEDICATED_EINT_COUNT = 4
+
+[IOMUX_MODE]
+SEL_NFI_0 = MODE0(NFI) MODE1() MODE2(SRCLKEN_OUT) MODE3(EHPI_SLV) MODE4(GPIO) MODE5(DBG)
+SEL_NFI_1 = MODE0(NFI) MODE1() MODE2() MODE3(EHPI_SLV) MODE4(GPO) MODE5(DBG)
+SEL_NFI_2 = MODE0(NFI) MODE1() MODE2(PCM) MODE3(EHPI_SLV) MODE4(GPIO) MODE5(DBG)
+SEL_NFI_3 = MODE0(NFI) MODE1() MODE2(IDC) MODE3(EHPI_SLV) MODE4(GPIO) MODE5(DBG)
+SEL_NFI_4 = MODE0(NFI) MODE1() MODE2(AGPS_OUT) MODE3(EHPI_SLV) MODE4(GPIO) MODE5(DBG)
+SEL_JTAG = MODE0(TDO) MODE1(2GDSP_SICE) MODE2(MD32) MODE3() MODE4() MODE5(DBG)
+SEL_SPI0 = MODE0(SPI) MODE1(STP0) MODE2() MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_SPI1 = MODE0(SPI) MODE1(STP0) MODE2() MODE3(SRCLKEN_OUT) MODE4(GPIO) MODE5(DBG)
+SEL_SUART0 = MODE0(SUART0) MODE1(EXT_FRAME_SYNC) MODE2() MODE3() MODE4() MODE5()
+SEL_SDIO = MODE0(SDIO) MODE1(F32K_CLK_OUT) MODE2() MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_MSDC0P_0 = MODE0(MSDC0P) MODE1(STP1) MODE2(MAS_CCDDIF) MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_MSDC0P_1 = MODE0(MSDC0P) MODE1(STP1) MODE2(MAS_CCDDIF) MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_MSDC0P_2 = MODE0(MSDC0P) MODE1(STP1) MODE2(SLV_CCDDIF) MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_MSDC1P = MODE0(MSDC1P) MODE1() MODE2(SLV_CCDDIF) MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_PMIC_BSI = MODE0(PMIC_BSI) MODE1() MODE2() MODE3(SRCLKEN_OUT) MODE4(GPIO) MODE5(DBG)
+SEL_RFIC1_BSI = MODE0(RFIC1_BSI) MODE1() MODE2() MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_MISC_BSI_0 = MODE0(MISC_BSI) MODE1(MIPI) MODE2(USIM) MODE3() MODE4(GPO/GPIO58) MODE5(DBG)
+SEL_MISC_BSI_1 = MODE0(MISC_BSI) MODE1() MODE2() MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_I2C = MODE0(I2C) MODE1() MODE2() MODE3() MODE4(GPIO) MODE5(DBG)
+SEL_BPI_0 = MODE0(BPI) MODE1() MODE2() MODE3() MODE4() MODE5(DBG)
+SEL_BPI_1 = MODE0(BPI) MODE1() MODE2() MODE3() MODE4() MODE5(DBG)
+SEL_BPI_2 = MODE0(BPI) MODE1() MODE2() MODE3() MODE4() MODE5(DBG)
+SEL_BPI_3 = MODE0(BPI) MODE1() MODE2() MODE3() MODE4() MODE5(DBG)
+SEL_BPI_4 = MODE0(BPI) MODE1() MODE2() MODE3() MODE4() MODE5(DBG)
+SEL_BPI_5 = MODE0(BPI) MODE1() MODE2() MODE3() MODE4() MODE5(DBG)
+SEL_USIM1 = MODE0(USIM0) MODE1() MODE2() MODE3() MODE4(GPO) MODE5(DBG)
+SEL_USIM2 = MODE0(USIM1) MODE1(F32K_CLK_OUT) MODE2() MODE3() MODE4(GPO) MODE5(DBG)
+SEL_GPIO_0_0 = MODE0(LED) MODE1(STP0_1) MODE2(CA_INTF) MODE3(MII) MODE4(GPIO) MODE5(DBG)
+SEL_GPIO_0_1 = MODE0(LED) MODE1(STP0) MODE2(CA_INTF) MODE3(MII) MODE4(GPIO) MODE5(DBG)
+SEL_GPIO_1 = MODE0(LED) MODE1(STP0) MODE2(CA_INTF) MODE3(MII) MODE4(GPIO) MODE5(DBG)
+SEL_GPIO_2_0 = MODE0(LED) MODE1(STP0) MODE2(CA_INTF) MODE3(MII) MODE4(GPIO) MODE5(DBG)
+SEL_GPIO_2_1 = MODE0(LED) MODE1(STP0) MODE2(CA_INTF) MODE3(MII) MODE4(GPIO) MODE5(DBG)
+SEL_GPIO_3 = MODE0(LED) MODE1(STP1) MODE2(CA_INTF) MODE3(MII) MODE4(GPIO) MODE5(DBG)
+SEL_GPIO_4 = MODE0(IDC) MODE1(STP1) MODE2(MAS_CCDDIF) MODE3(MII) MODE4(GPIO) MODE5(DBG)
+SEL_SDIO_INT = MODE0(SDIO_HOST_INTB) MODE1() MODE2() MODE3() MODE4(GPO) MODE5(DBG)
+SEL_DMCMDPHY = MODE0(GPO) MODE1() MODE2() MODE3() MODE4() MODE5(DBG)
+
+
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6516.fig b/mcu/custom/driver/drv/Drv_Tool/MT6516.fig
new file mode 100644
index 0000000..dde3394
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6516.fig
@@ -0,0 +1,22 @@
+[Chip Type]
+Chip = MT6516
+GPIO_Pull_Sel=1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(BPI_BUS6) MODE2() MODE3() PUPD
+GPIO1 = MODE0(GPIO1) MODE1(BPI_BUS7) MODE2() MODE3() PUPD
+GPIO2 = MODE0(GPIO2) MODE1(BPI_BUS8) MODE2() MODE3() PUPD
+GPIO3 = MODE0(GPIO3) MODE1(BPI_BUS9) MODE2() MODE3() PUPD
+
+[GPO]
+
+[EINT]
+EINT_COUNT=24
+EINT_DEBOUNE_TIME_COUNT=24
+
+[ADC]
+ADC_COUNT=7
+
+[KEYPAD]
+KEY_ROW=0
+KEY_COLUMN=0
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6573.fig b/mcu/custom/driver/drv/Drv_Tool/MT6573.fig
new file mode 100644
index 0000000..0420a12
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6573.fig
@@ -0,0 +1,249 @@
+[Chip Type]
+Chip = MT6573
+GPIO_Pull_Sel = 1
+PMIC_Config = 1
+GPIO_ModeNum = 8
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(EINT5) MODE2(I2S0_CK) MODE3(CLKM5) MODE4(PWM4) MODE5() MODE6(dbg1_bus[11]) MODE7() PU
+GPIO1 = MODE0(GPIO1) MODE1(EINT6) MODE2(I2S0_WS) MODE3(CLKM3) MODE4(PWM5) MODE5() MODE6(dbg1_bus[12]) MODE7() PU
+GPIO2 = MODE0(GPIO2) MODE1(EINT7) MODE2(I2S0_DAT) MODE3(CLKM4) MODE4(PWM6) MODE5(usb_drvvbus) MODE6(dbg1_bus[13]) MODE7() PU
+GPIO3 = MODE0(GPIO3) MODE1(URXD1) MODE2(EINT8) MODE3(IRDA_RXD) MODE4() MODE5() MODE6() MODE7() PU
+GPIO4 = MODE0(GPIO4) MODE1(UTXD1) MODE2(EINT9) MODE3(IRDA_TXD) MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO5 = MODE0(GPIO5) MODE1(URXD2) MODE2(EINT12) MODE3() MODE4() MODE5() MODE6(dbg1_bus[14]) MODE7() PU
+GPIO6 = MODE0(GPIO6) MODE1(UTXD2) MODE2(EINT13) MODE3() MODE4() MODE5() MODE6(dbg1_bus[15]) MODE7() PU
+GPIO7 = MODE0(GPIO7) MODE1(PWM3) MODE2(CLKM2) MODE3(I2S0_DAT) MODE4(EINT10) MODE5() MODE6() MODE7() PUPD
+GPIO8 = MODE0(GPIO8) MODE1(PWM2) MODE2(CLKM1) MODE3(I2S0_WS) MODE4(EINT9) MODE5() MODE6() MODE7() PUPD
+GPIO9 = MODE0(GPIO9) MODE1(PWM1) MODE2(CLKM0) MODE3(I2S0_CK) MODE4(EINT8) MODE5() MODE6() MODE7() PUPD
+GPIO10 = MODE0(GPIO10) MODE1(VM0) MODE2(URTS2) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO11 = MODE0(GPIO11) MODE1(VM1) MODE2(UCTS2) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO12 = MODE0(GPIO12) MODE1(DUAL_BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO13 = MODE0(GPIO13) MODE1(DUAL_BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO14 = MODE0(GPIO14) MODE1(DUAL_BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO15 = MODE0(GPIO15) MODE1(DUAL_BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO16 = MODE0(GPIO16) MODE1(DUAL_BPI_BUS4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO17 = MODE0(GPIO17) MODE1(DUAL_BPI_BUS5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO18 = MODE0(GPIO18) MODE1(DUAL_BPI_BUS6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO19 = MODE0(GPIO19) MODE1(DUAL_BPI_BUS7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO20 = MODE0(GPIO20) MODE1(DUAL_BPI_BUS9) MODE2() MODE3(DSP_JTMS) MODE4() MODE5() MODE6() MODE7() PD
+GPIO21 = MODE0(GPIO21) MODE1(DUAL_BPI_BUS10) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO22 = MODE0(GPIO22) MODE1(DUAL_BPI_BUS11) MODE2(URTS1) MODE3(DSP_JTDI) MODE4(SDA1) MODE5() MODE6() MODE7() PD
+GPIO23 = MODE0(GPIO23) MODE1(DUAL_BPI_BUS12) MODE2(UCTS1) MODE3() MODE4(SCL1) MODE5() MODE6() MODE7() PD
+GPIO24 = MODE0(GPIO24) MODE1(DUAL_BPI_BUS13) MODE2(URXD1) MODE3(URXD4) MODE4(SDA0) MODE5() MODE6() MODE7() PD
+GPIO25 = MODE0(GPIO25) MODE1(DUAL_BPI_BUS14) MODE2(UTXD1) MODE3(UTXD4) MODE4(SCL0) MODE5() MODE6() MODE7() PD
+GPIO26 = MODE0(GPIO26) MODE1(DUAL_BPI_BUS8) MODE2(gps_sync) MODE3(DSP_JTDO) MODE4() MODE5() MODE6() MODE7() PD
+GPIO27 = MODE0(GPIO27) MODE1(BSI1_CLK) MODE2() MODE3() MODE4(URTS2) MODE5() MODE6() MODE7() PD
+GPIO28 = MODE0(GPIO28) MODE1(BSI1_DATA) MODE2() MODE3() MODE4(UCTS2) MODE5() MODE6() MODE7() PD
+GPIO29 = MODE0(GPIO29) MODE1(BSI1_DATA1) MODE2(BSI1_CS1) MODE3() MODE4(URTS3) MODE5(DSP_JTRST_B) MODE6() MODE7() PD
+GPIO30 = MODE0(GPIO30) MODE1(BSI1_CS0) MODE2() MODE3() MODE4(UCTS3) MODE5(DSP_EMU_B) MODE6() MODE7() PD
+GPIO31 = MODE0(GPIO31) MODE1(BSI0_CLK) MODE2(URXD2) MODE3(EINT15) MODE4() MODE5() MODE6() MODE7() PD
+GPIO32 = MODE0(GPIO32) MODE1(BSI0_DATA) MODE2(UTXD2) MODE3(EINT12) MODE4() MODE5() MODE6() MODE7() PD
+GPIO33 = MODE0(GPIO33) MODE1(BSI0_CS1) MODE2(URXD3) MODE3(UCTS2) MODE4(EINT13) MODE5(DSP_JTCK) MODE6() MODE7() PD
+GPIO34 = MODE0(GPIO34) MODE1(BSI0_CS0) MODE2(UTXD3) MODE3(URTS2) MODE4(EINT14) MODE5() MODE6() MODE7() PD
+GPIO35 = MODE0(GPIO35) MODE1(KCOL7) MODE2(SPI_CS_N) MODE3(MC3CM0) MODE4(EINT10) MODE5(I2S1_WS) MODE6(dbg2_bus[0]) MODE7() PU
+GPIO36 = MODE0(GPIO36) MODE1(KCOL6) MODE2(SPI_SCK) MODE3(MC3CK) MODE4(EINT11) MODE5(I2S1_DAT) MODE6(dbg2_bus[1]) MODE7() PU
+GPIO37 = MODE0(GPIO37) MODE1(KCOL5) MODE2() MODE3(MC3DA1) MODE4(EINT12) MODE5(I2S1_CK) MODE6(dbg2_bus[2]) MODE7() PU
+GPIO38 = MODE0(GPIO38) MODE1(KCOL4) MODE2(SPI_MOSI) MODE3(MC3DA2) MODE4(EINT13) MODE5(URXD3) MODE6(dbg2_bus[3]) MODE7() PU
+GPIO39 = MODE0(GPIO39) MODE1(KCOL3) MODE2(SPI_MISO) MODE3(MC3DA3) MODE4(EINT14) MODE5(UTXD3) MODE6(dbg2_bus[4]) MODE7() PU
+GPIO40 = MODE0(GPIO40) MODE1(KCOL2) MODE2() MODE3(MC3DA0) MODE4(PWM4) MODE5(URXD1) MODE6(dbg2_bus[5]) MODE7() PU
+GPIO41 = MODE0(GPIO41) MODE1(KCOL1) MODE2() MODE3() MODE4(PWM5) MODE5(UTXD1) MODE6(dbg2_bus[6]) MODE7() PU
+GPIO42 = MODE0(GPIO42) MODE1(KCOL0) MODE2() MODE3() MODE4() MODE5() MODE6(dbg2_bus[7]) MODE7() PU
+GPIO43 = MODE0(GPIO43) MODE1(KROW7) MODE2(MC1CM0) MODE3(MC2CM0) MODE4(EINT15) MODE5(URXD4) MODE6(dbg2_bus[8]) MODE7() PD
+GPIO44 = MODE0(GPIO44) MODE1(KROW6) MODE2(MC1CK) MODE3(MC2DA0) MODE4(EINT12) MODE5(UTXD4) MODE6(dbg2_bus[9]) MODE7() PD
+GPIO45 = MODE0(GPIO45) MODE1(KROW5) MODE2(MC1DA1) MODE3(MC2DA1) MODE4(EINT13) MODE5(PWM6) MODE6(dbg2_bus[10]) MODE7() PD
+GPIO46 = MODE0(GPIO46) MODE1(KROW4) MODE2(MC1DA2) MODE3(MC2DA2) MODE4(EINT14) MODE5() MODE6(dbg2_bus[11]) MODE7() PD
+GPIO47 = MODE0(GPIO47) MODE1(KROW3) MODE2(MC1DA3) MODE3(MC2DA3) MODE4(EINT15) MODE5() MODE6(dbg2_bus[12]) MODE7() PD
+GPIO48 = MODE0(GPIO48) MODE1(KROW2) MODE2(MC1DA0) MODE3(MC2CK) MODE4(IRDA_PDN) MODE5() MODE6(dbg2_bus[13]) MODE7() PD
+GPIO49 = MODE0(GPIO49) MODE1(KROW1) MODE2() MODE3() MODE4(IRDA_RXD) MODE5() MODE6(dbg2_bus[14]) MODE7() PD
+GPIO50 = MODE0(GPIO50) MODE1(KROW0) MODE2() MODE3() MODE4(IRDA_TXD) MODE5() MODE6(dbg2_bus[15]) MODE7() PD
+GPIO51 = MODE0(GPIO51) MODE1(MC0INS) MODE2(PWM6) MODE3(CLKM1) MODE4(EINT11) MODE5(IRDA_PDN) MODE6() MODE7() PU
+GPIO52 = MODE0(GPIO52) MODE1(MC1INS) MODE2(PWM5) MODE3(CLKM2) MODE4(EINT12) MODE5() MODE6() MODE7() PU
+GPIO53 = MODE0(GPIO53) MODE1(MC0CM0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO54 = MODE0(GPIO54) MODE1(MC0DA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO55 = MODE0(GPIO55) MODE1(MC0DA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO56 = MODE0(GPIO56) MODE1(MC0DA2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO57 = MODE0(GPIO57) MODE1(MC0DA3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO58 = MODE0(GPIO58) MODE1(MC0CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO59 = MODE0(GPIO59) MODE1(MC0CK_FB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO60 = MODE0(GPIO60) MODE1(MC0RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO61 = MODE0(GPIO61) MODE1(MC0WP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO62 = MODE0(GPIO62) MODE1(MC1CM0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO63 = MODE0(GPIO63) MODE1(MC1DA0) MODE2(MC0DA4) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO64 = MODE0(GPIO64) MODE1(MC1DA1) MODE2(MC0DA5) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO65 = MODE0(GPIO65) MODE1(MC1DA2) MODE2(MC0DA6) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO66 = MODE0(GPIO66) MODE1(MC1DA3) MODE2(MC0DA7) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO67 = MODE0(GPIO67) MODE1(MC1CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO68 = MODE0(GPIO68) MODE1(MC1CK_FB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO69 = MODE0(GPIO69) MODE1(MC1WP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO70 = MODE0(GPIO70) MODE1(MC2CM0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO71 = MODE0(GPIO71) MODE1(MC2DA0) MODE2(MC0DA4) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO72 = MODE0(GPIO72) MODE1(MC2DA1) MODE2(MC0DA5) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO73 = MODE0(GPIO73) MODE1(MC2DA2) MODE2(MC0DA6) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO74 = MODE0(GPIO74) MODE1(MC2DA3) MODE2(MC0DA7) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO75 = MODE0(GPIO75) MODE1(MC2CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO76 = MODE0(GPIO76) MODE1(CMMCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO77 = MODE0(GPIO77) MODE1(CMPCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO78 = MODE0(GPIO78) MODE1(CMRST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO79 = MODE0(GPIO79) MODE1(CMPDN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO80 = MODE0(GPIO80) MODE1(CMVREF) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO81 = MODE0(GPIO81) MODE1(CMHREF) MODE2() MODE3(I2S1_WS) MODE4(DSP_GPO2) MODE5(TBTXFS) MODE6() MODE7() PD
+GPIO82 = MODE0(GPIO82) MODE1(CMDAT9) MODE2() MODE3(I2S1_DAT) MODE4(DSP_GPO1) MODE5(TBRXEN) MODE6() MODE7() PD
+GPIO83 = MODE0(GPIO83) MODE1(CMDAT8) MODE2() MODE3(I2S1_CK) MODE4(DSP_GPO0) MODE5(TBRXFS) MODE6() MODE7() PD
+GPIO84 = MODE0(GPIO84) MODE1(CMDAT7) MODE2(MC2CM0) MODE3(SPI_CS_N) MODE4() MODE5() MODE6() MODE7() PD
+GPIO85 = MODE0(GPIO85) MODE1(CMDAT6) MODE2(MC2DA0) MODE3(SPI_SCK) MODE4() MODE5() MODE6() MODE7() PD
+GPIO86 = MODE0(GPIO86) MODE1(CMDAT5) MODE2(MC2DA1) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO87 = MODE0(GPIO87) MODE1(CMDAT4) MODE2(MC2DA2) MODE3(SPI_MOSI) MODE4() MODE5() MODE6() MODE7() PD
+GPIO88 = MODE0(GPIO88) MODE1(CMDAT3) MODE2(MC2DA3) MODE3(SPI_MISO) MODE4() MODE5() MODE6() MODE7() PD
+GPIO89 = MODE0(GPIO89) MODE1(CMDAT2) MODE2(MC2CK) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO90 = MODE0(GPIO90) MODE1(CMDAT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO91 = MODE0(GPIO91) MODE1(CMDAT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO92 = MODE0(GPIO92) MODE1(SCL1) MODE2(EINT10) MODE3(URXD4) MODE4() MODE5() MODE6(dbg3_bus[0]) MODE7() PU
+GPIO93 = MODE0(GPIO93) MODE1(SDA1) MODE2(EINT11) MODE3(UTXD4) MODE4() MODE5() MODE6(dbg3_bus[1]) MODE7() PU
+GPIO94 = MODE0(GPIO94) MODE1(PWM4) MODE2() MODE3(EINT7) MODE4() MODE5(CLKM3) MODE6(dbg3_bus[2]) MODE7() PD
+GPIO95 = MODE0(GPIO95) MODE1(CMFLASH) MODE2(PWM4) MODE3(EINT8) MODE4() MODE5() MODE6() MODE7() PD
+GPIO96 = MODE0(GPIO96) MODE1(CAM_MECHSH0) MODE2(PWM5) MODE3(EINT9) MODE4() MODE5() MODE6() MODE7() PD
+GPIO97 = MODE0(GPIO97) MODE1(CAM_MECHSH1) MODE2(PWM6) MODE3(EINT10) MODE4() MODE5() MODE6() MODE7() PD
+GPIO98 = MODE0(GPIO98) MODE1(CAM_STROBE) MODE2() MODE3(EINT11) MODE4() MODE5() MODE6() MODE7() PD
+GPIO99 = MODE0(GPIO99) MODE1(PWM1) MODE2(CLKM0) MODE3(EINT5) MODE4() MODE5() MODE6(dbg3_bus[3]) MODE7() PD
+GPIO100 = MODE0(GPIO100) MODE1(PWM2) MODE2(CLKM1) MODE3(EINT6) MODE4() MODE5() MODE6(dbg3_bus[4]) MODE7() PD
+GPIO101 = MODE0(GPIO101) MODE1(PWM3) MODE2(usb_drvvbus) MODE3(EINT12) MODE4() MODE5(CLKM3) MODE6(dbg3_bus[5]) MODE7() PD
+GPIO102 = MODE0(GPIO102) MODE1(LSCK) MODE2(I2S1_CK) MODE3() MODE4(TDMA_CK) MODE5() MODE6() MODE7() PD
+GPIO103 = MODE0(GPIO103) MODE1(LSA0) MODE2(I2S1_WS) MODE3(SCL0) MODE4(TDMA_D1) MODE5(TDTIRQ) MODE6() MODE7() PD
+GPIO104 = MODE0(GPIO104) MODE1(LSDA) MODE2(I2S1_DAT) MODE3(SDA0) MODE4(TDMA_D0) MODE5(TCTIRQ2) MODE6() MODE7() PD
+GPIO105 = MODE0(GPIO105) MODE1(LSCE0B) MODE2() MODE3(CLKM3) MODE4(TDMA_FS) MODE5(TCTIRQ1) MODE6() MODE7() PU
+GPIO106 = MODE0(GPIO106) MODE1(LSCE1B) MODE2(EINT13) MODE3(CLKM4) MODE4(LPCE2B) MODE5(TEVTVAL) MODE6() MODE7() PU
+GPIO107 = MODE0(GPIO107) MODE1(DPICK) MODE2(IRDA_RXD) MODE3(CLKM1) MODE4(SCL0) MODE5(EINT10) MODE6() MODE7() PD
+GPIO108 = MODE0(GPIO108) MODE1(DPIDE) MODE2(IRDA_TXD) MODE3(CLKM2) MODE4(SDA0) MODE5(EINT11) MODE6() MODE7() PD
+GPIO109 = MODE0(GPIO109) MODE1(DPIVSYNC) MODE2(MC2INS) MODE3(CLKM3) MODE4(SCL1) MODE5(EINT12) MODE6() MODE7() PD
+GPIO110 = MODE0(GPIO110) MODE1(DPIHSYNC) MODE2(MC3INS) MODE3(IRDA_PDN) MODE4(SDA1) MODE5(EINT13) MODE6() MODE7() PD
+GPIO111 = MODE0(GPIO111) MODE1(DPIR_PO[7]) MODE2(MC2CM0) MODE3(SPI_CS_N) MODE4(I2S0_CK) MODE5(EINT0) MODE6(dbg4_bus[0]) MODE7() PD
+GPIO112 = MODE0(GPIO112) MODE1(DPIR_PO[6]) MODE2(MC2DA0) MODE3(SPI_SCK) MODE4(I2S0_WS) MODE5(EINT1) MODE6(dbg4_bus[1]) MODE7() PD
+GPIO113 = MODE0(GPIO113) MODE1(DPIR_PO[5]) MODE2(MC3CM0) MODE3(URXD1) MODE4(I2S0_DAT) MODE5(EINT2) MODE6(dbg4_bus[2]) MODE7() PD
+GPIO114 = MODE0(GPIO114) MODE1(DPIR_PO[4]) MODE2(MC3DA0) MODE3(UTXD1) MODE4(I2S1_WS) MODE5(EINT3) MODE6(dbg4_bus[3]) MODE7() PD
+GPIO115 = MODE0(GPIO115) MODE1(DPIR_PO[3]) MODE2(CLKM0) MODE3(URTS1) MODE4(I2S1_DAT) MODE5(EINT4) MODE6(dbg4_bus[4]) MODE7() PD
+GPIO116 = MODE0(GPIO116) MODE1(DPIR_PO[2]) MODE2(CLKM5) MODE3(UCTS1) MODE4(I2S1_CK) MODE5(EINT5) MODE6(dbg4_bus[5]) MODE7() PD
+GPIO117 = MODE0(GPIO117) MODE1(DPIR_PO[1]) MODE2(CLKM2) MODE3(MC2INS) MODE4(PWM4) MODE5(EINT6) MODE6(dbg4_bus[6]) MODE7() PD
+GPIO118 = MODE0(GPIO118) MODE1(DPIR_PO[0]) MODE2() MODE3(MC3INS) MODE4(PWM5) MODE5(EINT7) MODE6(dbg4_bus[7]) MODE7() PD
+GPIO119 = MODE0(GPIO119) MODE1(DPIG_PO[7]) MODE2(MC2DA1) MODE3() MODE4() MODE5(EINT8) MODE6(dbg4_bus[8]) MODE7() PD
+GPIO120 = MODE0(GPIO120) MODE1(DPIG_PO[6]) MODE2(MC2DA2) MODE3(SPI_MOSI) MODE4(I2S1_WS) MODE5(EINT9) MODE6(dbg4_bus[9]) MODE7() PD
+GPIO121 = MODE0(GPIO121) MODE1(DPIG_PO[5]) MODE2(MC3DA1) MODE3(URXD2) MODE4(IRDA_RXD) MODE5(EINT10) MODE6(dbg4_bus[10]) MODE7() PD
+GPIO122 = MODE0(GPIO122) MODE1(DPIG_PO[4]) MODE2(MC3DA2) MODE3(UTXD2) MODE4(IRDA_TXD) MODE5(EINT11) MODE6(dbg4_bus[11]) MODE7() PD
+GPIO123 = MODE0(GPIO123) MODE1(DPIG_PO[3]) MODE2(MC3DA3) MODE3(URTS2) MODE4(PWM3) MODE5(EINT12) MODE6(dbg4_bus[12]) MODE7() PD
+GPIO124 = MODE0(GPIO124) MODE1(DPIG_PO[2]) MODE2(MC3CK) MODE3(UCTS2) MODE4(PWM4) MODE5(EINT13) MODE6(dbg4_bus[13]) MODE7() PD
+GPIO125 = MODE0(GPIO125) MODE1(DPIG_PO[1]) MODE2() MODE3() MODE4(PWM6) MODE5(EINT14) MODE6(dbg4_bus[14]) MODE7() PD
+GPIO126 = MODE0(GPIO126) MODE1(DPIG_PO[0]) MODE2() MODE3() MODE4() MODE5(EINT15) MODE6(dbg4_bus[15]) MODE7() PD
+GPIO127 = MODE0(GPIO127) MODE1(DPIB_PO[7]) MODE2(MC2DA3) MODE3(SPI_MISO) MODE4(I2S1_DAT) MODE5(EINT12) MODE6(dbg4_bus[16]) MODE7() PD
+GPIO128 = MODE0(GPIO128) MODE1(DPIB_PO[6]) MODE2(MC2CK) MODE3(URXD3) MODE4(I2S1_CK) MODE5(EINT13) MODE6(dbg4_bus[17]) MODE7() PD
+GPIO129 = MODE0(GPIO129) MODE1(DPIB_PO[5]) MODE2() MODE3(UTXD3) MODE4(URXD4) MODE5(EINT14) MODE6(dbg4_bus[18]) MODE7() PD
+GPIO130 = MODE0(GPIO130) MODE1(DPIB_PO[4]) MODE2() MODE3(URTS3) MODE4(UTXD4) MODE5(EINT15) MODE6(dbg4_bus[19]) MODE7() PD
+GPIO131 = MODE0(GPIO131) MODE1(DPIB_PO[3]) MODE2() MODE3(UCTS3) MODE4(URTS4) MODE5(IRDA_PDN) MODE6(dbg4_bus[20]) MODE7() PD
+GPIO132 = MODE0(GPIO132) MODE1(DPIB_PO[2]) MODE2() MODE3() MODE4(UCTS4) MODE5(PWM1) MODE6(dbg4_bus[21]) MODE7() PD
+GPIO133 = MODE0(GPIO133) MODE1(DPIB_PO[1]) MODE2() MODE3() MODE4() MODE5(PWM2) MODE6(dbg4_bus[22]) MODE7() PD
+GPIO134 = MODE0(GPIO134) MODE1(DPIB_PO[0]) MODE2() MODE3() MODE4() MODE5() MODE6(dbg4_bus[23]) MODE7() PD
+GPIO135 = MODE0(GPIO135) MODE1(LPCE1B) MODE2(NCE1B) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO136 = MODE0(GPIO136) MODE1(LPCE0B) MODE2(DPIDE) MODE3() MODE4(MC3CM0) MODE5(SPI_CS_N) MODE6() MODE7() PU
+GPIO137 = MODE0(GPIO137) MODE1(LPTE) MODE2(DPICK) MODE3(IRDA_RXD) MODE4(MC3DA0) MODE5(SPI_SCK) MODE6() MODE7() PD
+GPIO138 = MODE0(GPIO138) MODE1(LRSTB) MODE2() MODE3(IRDA_TXD) MODE4(MC3DA1) MODE5() MODE6() MODE7() PUPD
+GPIO139 = MODE0(GPIO139) MODE1(LRDB) MODE2(DPIHSYNC) MODE3() MODE4(MC3DA2) MODE5(SPI_MOSI) MODE6() MODE7() PUPD
+GPIO140 = MODE0(GPIO140) MODE1(LPA0) MODE2() MODE3() MODE4(MC3DA3) MODE5(SPI_MISO) MODE6() MODE7() PUPD
+GPIO141 = MODE0(GPIO141) MODE1(LWRB) MODE2(DPIVSYNC) MODE3() MODE4(MC3CK) MODE5(EINT14) MODE6() MODE7() PUPD
+GPIO142 = MODE0(GPIO142) MODE1(I2S1_CK) MODE2(SPI_CS_N) MODE3(MC2CK) MODE4(IRDA_RXD) MODE5(EINT14) MODE6() MODE7() PUPD
+GPIO143 = MODE0(GPIO143) MODE1(I2S1_WS) MODE2(SPI_SCK) MODE3(MC2DA3) MODE4(IRDA_TXD) MODE5(EINT15) MODE6() MODE7() PUPD
+GPIO144 = MODE0(GPIO144) MODE1(I2S1_DAT) MODE2() MODE3(MC2DA2) MODE4(URTS2) MODE5(EINT12) MODE6() MODE7() PUPD
+GPIO145 = MODE0(GPIO145) MODE1(I2S0_CK) MODE2(SPI_MOSI) MODE3(MC2DA1) MODE4(UCTS2) MODE5(EINT13) MODE6() MODE7() PUPD
+GPIO146 = MODE0(GPIO146) MODE1(I2S0_WS) MODE2(SPI_MISO) MODE3(MC2DA0) MODE4(URTS3) MODE5(EINT14) MODE6() MODE7() PUPD
+GPIO147 = MODE0(GPIO147) MODE1(I2S0_DAT) MODE2(IRDA_PDN) MODE3(MC2CM0) MODE4(UCTS3) MODE5(EINT15) MODE6() MODE7() PUPD
+GPIO148 = MODE0(GPIO148) MODE1(MC3CM0) MODE2(I2S0_DAT) MODE3() MODE4() MODE5(EINT13) MODE6() MODE7() PUPD
+GPIO149 = MODE0(GPIO149) MODE1(MC3DA0) MODE2(PWM4) MODE3(DAIRST) MODE4() MODE5(EINT12) MODE6() MODE7() PUPD
+GPIO150 = MODE0(GPIO150) MODE1(MC3DA1) MODE2(PWM5) MODE3(DAISYNC) MODE4() MODE5(EINT11) MODE6() MODE7() PUPD
+GPIO151 = MODE0(GPIO151) MODE1(MC3DA2) MODE2(PWM6) MODE3(DAIPCMIN) MODE4(CLKM3) MODE5(EINT10) MODE6() MODE7() PUPD
+GPIO152 = MODE0(GPIO152) MODE1(MC3DA3) MODE2(I2S0_CK) MODE3(DAIPCMOUT) MODE4(CLKM2) MODE5(EINT9) MODE6() MODE7() PUPD
+GPIO153 = MODE0(GPIO153) MODE1(MC3CK) MODE2(I2S0_WS) MODE3(DAICLK) MODE4(CLKM1) MODE5(EINT8) MODE6() MODE7() PUPD
+GPIO154 = MODE0(GPIO154) MODE1(NLD15) MODE2(MC3CM0) MODE3(SPI_CS_N) MODE4(CLKM0) MODE5(EINT15) MODE6() MODE7() PD
+GPIO155 = MODE0(GPIO155) MODE1(NLD14) MODE2(MC3DA0) MODE3(SPI_SCK) MODE4(CLKM1) MODE5(EINT14) MODE6() MODE7() PD
+GPIO156 = MODE0(GPIO156) MODE1(NLD13) MODE2(MC3DA1) MODE3() MODE4(CLKM2) MODE5(EINT13) MODE6() MODE7() PD
+GPIO157 = MODE0(GPIO157) MODE1(NLD12) MODE2(MC3DA2) MODE3(SPI_MOSI) MODE4(CLKM5) MODE5(EINT12) MODE6() MODE7() PD
+GPIO158 = MODE0(GPIO158) MODE1(NLD11) MODE2(MC3DA3) MODE3(SPI_MISO) MODE4(PWM4) MODE5(EINT15) MODE6() MODE7() PD
+GPIO159 = MODE0(GPIO159) MODE1(NLD10) MODE2(MC3CK) MODE3() MODE4(PWM5) MODE5(EINT14) MODE6() MODE7() PD
+GPIO160 = MODE0(GPIO160) MODE1(NLD9) MODE2() MODE3() MODE4(PWM6) MODE5(EINT13) MODE6() MODE7() PD
+GPIO161 = MODE0(GPIO161) MODE1(NLD8) MODE2() MODE3() MODE4() MODE5(EINT12) MODE6() MODE7() PD
+GPIO162 = MODE0(GPIO162) MODE1(NLD7) MODE2() MODE3(I2S0_CK) MODE4() MODE5(EINT11) MODE6() MODE7() PD
+GPIO163 = MODE0(GPIO163) MODE1(NLD6) MODE2() MODE3(I2S0_WS) MODE4() MODE5(EINT10) MODE6() MODE7() PD
+GPIO164 = MODE0(GPIO164) MODE1(NLD5) MODE2() MODE3(I2S0_DAT) MODE4() MODE5(EINT9) MODE6() MODE7() PD
+GPIO165 = MODE0(GPIO165) MODE1(NLD4) MODE2() MODE3() MODE4() MODE5(EINT8) MODE6() MODE7() PD
+GPIO166 = MODE0(GPIO166) MODE1(NLD3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO167 = MODE0(GPIO167) MODE1(NLD2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO168 = MODE0(GPIO168) MODE1(NLD1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO169 = MODE0(GPIO169) MODE1(NLD0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO170 = MODE0(GPIO170) MODE1(NRNB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO171 = MODE0(GPIO171) MODE1(NCLE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO172 = MODE0(GPIO172) MODE1(NALE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO173 = MODE0(GPIO173) MODE1(NWEB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO174 = MODE0(GPIO174) MODE1(NREB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO175 = MODE0(GPIO175) MODE1(NCE0B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO176 = MODE0(GPIO176) MODE1(DAICLK) MODE2(I2S0_CK) MODE3(IRDA_PDN) MODE4() MODE5() MODE6() MODE7() PD
+GPIO177 = MODE0(GPIO177) MODE1(DAIPCMOUT) MODE2(I2S0_DAT) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO178 = MODE0(GPIO178) MODE1(DAIPCMIN) MODE2() MODE3(URXD3) MODE4() MODE5() MODE6() MODE7() PD
+GPIO179 = MODE0(GPIO179) MODE1(DAISYNC) MODE2(I2S0_WS) MODE3(UTXD3) MODE4() MODE5() MODE6() MODE7() PD
+GPIO180 = MODE0(GPIO180) MODE1(DAIRST) MODE2() MODE3(CLKM5) MODE4() MODE5() MODE6() MODE7() PU
+GPIO181 = MODE0(GPIO181) MODE1(SCL0) MODE2(EINT14) MODE3() MODE4() MODE5() MODE6(dbg1_bus[0]) MODE7() PU
+GPIO182 = MODE0(GPIO182) MODE1(SDA0) MODE2(EINT15) MODE3() MODE4() MODE5() MODE6(dbg1_bus[1]) MODE7() PU
+GPIO183 = MODE0(GPIO183) MODE1(URXD3) MODE2(EINT12) MODE3(PWM4) MODE4(CLKM3) MODE5() MODE6(dbg1_bus[2]) MODE7() PU
+GPIO184 = MODE0(GPIO184) MODE1(UTXD3) MODE2(EINT13) MODE3(PWM5) MODE4(CLKM4) MODE5() MODE6(dbg1_bus[3]) MODE7() PU
+GPIO185 = MODE0(GPIO185) MODE1(URXD4) MODE2(EINT14) MODE3() MODE4() MODE5() MODE6(dbg1_bus[4]) MODE7() PU
+GPIO186 = MODE0(GPIO186) MODE1(UTXD4) MODE2(EINT15) MODE3(MC3DA0) MODE4() MODE5() MODE6(dbg1_bus[5]) MODE7() PU
+GPIO187 = MODE0(GPIO187) MODE1(EINT0) MODE2(SPI_CS_N) MODE3(MC3CM0) MODE4() MODE5() MODE6(dbg1_bus[6]) MODE7() PU
+GPIO188 = MODE0(GPIO188) MODE1(EINT1) MODE2(SPI_SCK) MODE3(MC3CK) MODE4(IRDA_PDN) MODE5() MODE6(dbg1_bus[7]) MODE7() PU
+GPIO189 = MODE0(GPIO189) MODE1(EINT2) MODE2() MODE3(MC3DA1) MODE4(DSP_GPO3) MODE5(TBTXEN) MODE6(dbg1_bus[8]) MODE7() PU
+GPIO190 = MODE0(GPIO190) MODE1(EINT3) MODE2(SPI_MOSI) MODE3(MC3DA2) MODE4(PWM6) MODE5() MODE6(dbg1_bus[9]) MODE7() PU
+GPIO191 = MODE0(GPIO191) MODE1(EINT4) MODE2(SPI_MISO) MODE3(MC3DA3) MODE4(HDQ_ONEWIRE) MODE5() MODE6(dbg1_bus[10]) MODE7() PU
+GPIO192 = MODE0(GPIO192) MODE1(MCU_JTRST_B) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO193 = MODE0(GPIO193) MODE1(MCU_JTCK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO194 = MODE0(GPIO194) MODE1(MCU_JTDI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO195 = MODE0(GPIO195) MODE1(MCU_JTMS) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO196 = MODE0(GPIO196) MODE1(MCU_JTDO) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO197 = MODE0(GPIO197) MODE1(MCU_JRTCK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PUPD
+GPIO198 = MODE0(GPIO198) MODE1(SWCLKTCK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO199 = MODE0(GPIO199) MODE1(SWDIOTMS) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO200 = MODE0(GPIO200) MODE1(I2S1_CK) MODE2() MODE3(IRDA_RXD) MODE4(URTS4) MODE5(EINT8) MODE6() MODE7() PD
+GPIO201 = MODE0(GPIO201) MODE1(I2S1_WS) MODE2() MODE3(IRDA_TXD) MODE4(UCTS4) MODE5(EINT9) MODE6(dbg3_bus[6]) MODE7() PD
+GPIO202 = MODE0(GPIO202) MODE1(I2S1_DAT) MODE2() MODE3(IRDA_PDN) MODE4() MODE5(EINT13) MODE6(dbg3_bus[7]) MODE7() PD
+
+[GPO]
+
+[EINT]
+EINT_COUNT = 16
+EINT_DEBOUNCE_TIME_COUNT = 16
+
+[EINT_EX_PIN]
+0
+1
+2
+3
+4
+5
+6
+7
+8
+9
+10
+11
+12
+13
+14
+15
+
+[ADC]
+ADC_COUNT = 5
+
+[ADC_EX_PIN]
+4
+5
+6
+7
+8
+
+[KEYPAD]
+KEY_ROW = 8
+KEY_COLUMN = 9
+
diff --git a/mcu/custom/driver/drv/Drv_Tool/MT6575_NP.fig b/mcu/custom/driver/drv/Drv_Tool/MT6575_NP.fig
new file mode 100644
index 0000000..d9c6ae1
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/MT6575_NP.fig
@@ -0,0 +1,291 @@
+[Chip Type]
+Chip = MT6575
+GPIO_Pull_Sel = 1
+GPIO_ModeNum = 8
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(EINT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU/PD
+GPIO1 = MODE0(GPIO1) MODE1(EINT3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU/PD
+GPIO2 = MODE0(GPIO2) MODE1(EINT2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU/PD
+GPIO3 = MODE0(GPIO3) MODE1(EINT5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU/PD
+GPIO4 = MODE0(GPIO4) MODE1(EINT4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU/PD
+GPIO5 = MODE0(GPIO5) MODE1(EINT6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU/PD
+GPIO6 = MODE0(GPIO6) MODE1(EINT7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU/PD
+GPIO7 = MODE0(GPIO7) MODE1(EINT8) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU/PD
+GPIO8 = MODE0(GPIO8) MODE1(EINT10) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU/PD
+GPIO9 = MODE0(GPIO9) MODE1(EINT9) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU/PD
+GPIO10 = MODE0(GPIO10) MODE1(EINT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU/PD
+GPIO11 = MODE0(GPIO11) MODE1(EINT11) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU/PD
+GPIO12 = MODE0(GPIO12) MODE1(LPA0) MODE2(EINT16) MODE3(PWM4) MODE4() MODE5() MODE6() MODE7() PD
+GPIO13 = MODE0(GPIO13) MODE1(LPCE1B) MODE2(EINT14) MODE3(PWM2) MODE4() MODE5() MODE6() MODE7() PU
+GPIO14 = MODE0(GPIO14) MODE1(LPTE) MODE2(EINT12) MODE3(PWM0) MODE4() MODE5() MODE6() MODE7() PD
+GPIO15 = MODE0(GPIO15) MODE1(LWRB) MODE2(EINT18) MODE3(PWM6) MODE4() MODE5() MODE6() MODE7() PU
+GPIO16 = MODE0(GPIO16) MODE1(LPCE0B) MODE2(EINT15) MODE3(PWM3) MODE4() MODE5() MODE6() MODE7() PU
+GPIO17 = MODE0(GPIO17) MODE1(LRDB) MODE2(EINT17) MODE3(PWM5) MODE4() MODE5() MODE6() MODE7() PU
+GPIO18 = MODE0(GPIO18) MODE1(LRSTB) MODE2(EINT13) MODE3(PWM1) MODE4() MODE5() MODE6() MODE7() PU
+GPIO19 = MODE0(GPIO19) MODE1(DPIHSYNC) MODE2(EINT22) MODE3(CM2PCLK) MODE4() MODE5() MODE6() MODE7() PD
+GPIO20 = MODE0(GPIO20) MODE1(DPIB_PO_6) MODE2(EINT8) MODE3() MODE4() MODE5() MODE6(DBG_OUT0_17) MODE7() PD
+GPIO21 = MODE0(GPIO21) MODE1(DPIVSYNC) MODE2(EINT21) MODE3(CM2VREF) MODE4() MODE5() MODE6() MODE7() PD
+GPIO22 = MODE0(GPIO22) MODE1(DPIR_PO_5) MODE2(EINT25) MODE3(CM2DAT5) MODE4() MODE5() MODE6(DBG_OUT0_10) MODE7() PD
+GPIO23 = MODE0(GPIO23) MODE1(DPIB_PO_2) MODE2(EINT12) MODE3(I2S1_CK) MODE4() MODE5() MODE6(DBG_OUT0_21) MODE7() PD
+GPIO24 = MODE0(GPIO24) MODE1(DPIB_PO_5) MODE2(EINT9) MODE3(I2S0_CK) MODE4() MODE5() MODE6(DBG_OUT0_18) MODE7() PD
+GPIO25 = MODE0(GPIO25) MODE1(DPIB_PO_0) MODE2(EINT14) MODE3(I2S1_WS) MODE4() MODE5() MODE6(DBG_OUT0_23) MODE7() PD
+GPIO26 = MODE0(GPIO26) MODE1(DPIR_PO_7) MODE2(EINT23) MODE3(CM2DAT7) MODE4() MODE5() MODE6(DBG_OUT0_8) MODE7() PD
+GPIO27 = MODE0(GPIO27) MODE1(DPIR_PO_4) MODE2(EINT26) MODE3(CM2DAT4) MODE4() MODE5() MODE6(DBG_OUT0_11) MODE7() PD
+GPIO28 = MODE0(GPIO28) MODE1(DPIG_PO_3) MODE2(EINT3) MODE3() MODE4() MODE5() MODE6(DBG_OUT0_4) MODE7() PD
+GPIO29 = MODE0(GPIO29) MODE1(DPIB_PO_4) MODE2(EINT10) MODE3(I2S0_DAT) MODE4() MODE5() MODE6(DBG_OUT0_19) MODE7() PD
+GPIO30 = MODE0(GPIO30) MODE1(DPIDE) MODE2(EINT20) MODE3(CM2HREF) MODE4() MODE5() MODE6() MODE7() PD
+GPIO31 = MODE0(GPIO31) MODE1(DPIB_PO_3) MODE2(EINT11) MODE3(I2S0_WS) MODE4() MODE5() MODE6(DBG_OUT0_20) MODE7() PD
+GPIO32 = MODE0(GPIO32) MODE1(DPIR_PO_6) MODE2(EINT24) MODE3(CM2DAT6) MODE4() MODE5() MODE6(DBG_OUT0_9) MODE7() PD
+GPIO33 = MODE0(GPIO33) MODE1(DPIG_PO_2) MODE2(EINT4) MODE3() MODE4() MODE5() MODE6(DBG_OUT0_5) MODE7() PD
+GPIO34 = MODE0(GPIO34) MODE1(DPIG_PO_7) MODE2(EINT31) MODE3(CM2RST) MODE4() MODE5() MODE6(DBG_OUT0_0) MODE7() PD
+GPIO35 = MODE0(GPIO35) MODE1(DPIR_PO_2) MODE2(EINT28) MODE3(CM2DAT2) MODE4() MODE5() MODE6(DBG_OUT0_13) MODE7() PD
+GPIO36 = MODE0(GPIO36) MODE1(DPIB_PO_1) MODE2(EINT13) MODE3(I2S1_DAT) MODE4() MODE5() MODE6(DBG_OUT0_22) MODE7() PD
+GPIO37 = MODE0(GPIO37) MODE1(DPIG_PO_0) MODE2(EINT6) MODE3() MODE4() MODE5() MODE6(DBG_OUT0_7) MODE7() PD
+GPIO38 = MODE0(GPIO38) MODE1(DPIG_PO_6) MODE2(EINT0) MODE3(CM2PDN) MODE4() MODE5() MODE6(DBG_OUT0_1) MODE7() PD
+GPIO39 = MODE0(GPIO39) MODE1(DPIG_PO_4) MODE2(EINT2) MODE3() MODE4() MODE5() MODE6(DBG_OUT0_3) MODE7() PD
+GPIO40 = MODE0(GPIO40) MODE1(DPIR_PO_3) MODE2(EINT27) MODE3(CM2DAT3) MODE4() MODE5() MODE6(DBG_OUT0_12) MODE7() PD
+GPIO41 = MODE0(GPIO41) MODE1(DPICK) MODE2(EINT19) MODE3(CM2MCLK) MODE4() MODE5() MODE6() MODE7() PD
+GPIO42 = MODE0(GPIO42) MODE1(DPIB_PO_7) MODE2(EINT7) MODE3() MODE4() MODE5() MODE6(DBG_OUT0_16) MODE7() PD
+GPIO43 = MODE0(GPIO43) MODE1(DPIG_PO_1) MODE2(EINT5) MODE3() MODE4() MODE5() MODE6(DBG_OUT0_6) MODE7() PD
+GPIO44 = MODE0(GPIO44) MODE1(DPIR_PO_0) MODE2(EINT30) MODE3(CM2DAT0) MODE4() MODE5() MODE6(DBG_OUT0_15) MODE7() PD
+GPIO45 = MODE0(GPIO45) MODE1(DPIR_PO_1) MODE2(EINT29) MODE3(CM2DAT1) MODE4() MODE5() MODE6(DBG_OUT0_14) MODE7() PD
+GPIO46 = MODE0(GPIO46) MODE1(DPIG_PO_5) MODE2(EINT1) MODE3() MODE4() MODE5() MODE6(DBG_OUT0_2) MODE7() PD
+GPIO47 = MODE0(GPIO47) MODE1(LSCE0B) MODE2() MODE3(URXD3) MODE4(SCL_2) MODE5(TDMA_FS) MODE6(TCTIRQ1) MODE7() PU
+GPIO48 = MODE0(GPIO48) MODE1(LSDI) MODE2() MODE3(UTXD2) MODE4(SDA_1) MODE5() MODE6() MODE7() PD
+GPIO49 = MODE0(GPIO49) MODE1(LSA0) MODE2(MD_TXD1) MODE3(MD_RXD1) MODE4(SDA_0) MODE5(TDMA_D1) MODE6(TDTIRQ) MODE7() PD
+GPIO50 = MODE0(GPIO50) MODE1(LSCE1B) MODE2() MODE3(UTXD3) MODE4(SDA_2) MODE5() MODE6(TEVTVAL) MODE7() PU
+GPIO51 = MODE0(GPIO51) MODE1(LSCK) MODE2(MD_RXD1) MODE3(MD_TXD1) MODE4(SCL_0) MODE5(TDMA_CK) MODE6() MODE7() PD
+GPIO52 = MODE0(GPIO52) MODE1(LSDA) MODE2() MODE3(URXD2) MODE4(SCL_1) MODE5(TDMA_D0) MODE6(TCTIRQ2) MODE7() PD
+GPIO53 = MODE0(GPIO53) MODE1(I2S0_DAT) MODE2() MODE3(CLKM4) MODE4(I2S1_DAT) MODE5() MODE6(DBG_OUT0_24) MODE7() PD
+GPIO54 = MODE0(GPIO54) MODE1(I2S0_WS) MODE2() MODE3(CLKM5) MODE4(I2S1_WS) MODE5() MODE6(DBG_OUT0_25) MODE7() PD
+GPIO55 = MODE0(GPIO55) MODE1(I2S0_CK) MODE2(EINT15) MODE3(CLKM3) MODE4(I2S1_CK) MODE5() MODE6(DBG_OUT0_26) MODE7() PD
+GPIO56 = MODE0(GPIO56) MODE1(I2S1_CK) MODE2() MODE3(IRDA_RXD) MODE4(I2S0_CK) MODE5() MODE6(DBG_OUT0_27) MODE7() PD
+GPIO57 = MODE0(GPIO57) MODE1(I2S1_WS) MODE2(EINT1) MODE3(IRDA_PDN) MODE4(I2S0_WS) MODE5() MODE6(DBG_OUT0_28) MODE7() PD
+GPIO58 = MODE0(GPIO58) MODE1(I2S1_DAT) MODE2(EINT0) MODE3(IRDA_TXD) MODE4(I2S0_DAT) MODE5() MODE6(DBG_OUT0_29) MODE7() PD
+GPIO59 = MODE0(GPIO59) MODE1(DAIRSTB) MODE2(EINT8) MODE3(PWM6) MODE4(MD_RXD2) MODE5() MODE6() MODE7() PD
+GPIO60 = MODE0(GPIO60) MODE1(EINT8) MODE2(EINT5) MODE3(PWM3) MODE4(WATCHDOG_RSTB) MODE5(DSP_GPO3) MODE6() MODE7() PD
+GPIO61 = MODE0(GPIO61) MODE1(EINT9) MODE2(EINT6) MODE3(PWM4) MODE4(GPS_SYNC) MODE5(WATCHDOG_RSTB) MODE6() MODE7() PD
+GPIO62 = MODE0(GPIO62) MODE1(DAIPCMOUT) MODE2(EINT2) MODE3(PWM0) MODE4(I2S0_DAT) MODE5() MODE6() MODE7() PD
+GPIO63 = MODE0(GPIO63) MODE1(DAICLK) MODE2(EINT3) MODE3(PWM1) MODE4(I2S0_CK) MODE5() MODE6() MODE7() PD
+GPIO64 = MODE0(GPIO64) MODE1(DAIPCMIN) MODE2(EINT4) MODE3(PWM2) MODE4() MODE5() MODE6() MODE7() PD
+GPIO65 = MODE0(GPIO65) MODE1(BTSYNC) MODE2(EINT7) MODE3(PWM5) MODE4(I2S0_WS) MODE5() MODE6() MODE7() PD
+GPIO66 = MODE0(GPIO66) MODE1(PWM2) MODE2(EINT10) MODE3(IRDA_RXD) MODE4(URXD3) MODE5(UTXD3) MODE6(DBG_OUT1_17) MODE7() PD
+GPIO67 = MODE0(GPIO67) MODE1(PWM1) MODE2(EINT9) MODE3(IRDA_PDN) MODE4(MD_TXD2) MODE5(USB_DRVVBUS) MODE6(DBG_OUT1_16) MODE7() PD
+GPIO68 = MODE0(GPIO68) MODE1(PWM3) MODE2(EINT11) MODE3(IRDA_TXD) MODE4(UTXD3) MODE5(URXD3) MODE6(DBG_OUT1_18) MODE7() PD
+GPIO69 = MODE0(GPIO69) MODE1(EINT3) MODE2(PWM3) MODE3(MD_RXD1) MODE4(CLKM2) MODE5(SPI_MO) MODE6(DBG_IN_9) MODE7() PD
+GPIO70 = MODE0(GPIO70) MODE1(EINT0) MODE2(PWM0) MODE3(URXD2) MODE4(CLKM5) MODE5(SPI_CSN) MODE6(DBG_IN_6) MODE7() PD
+GPIO71 = MODE0(GPIO71) MODE1(UTXD3) MODE2(EINT17) MODE3(URXD3) MODE4(PWM6) MODE5(DSP_EMU_B) MODE6(DBG_IN_3) MODE7() PU
+GPIO72 = MODE0(GPIO72) MODE1(EINT4) MODE2(PWM4) MODE3(MD_TXD2) MODE4(CLKM1) MODE5(GPS_SYNC) MODE6(DBG_IN_10) MODE7() PD
+GPIO73 = MODE0(GPIO73) MODE1(EINT7) MODE2(CLKM0) MODE3(IRDA_TXD) MODE4(I2S0_WS) MODE5(USB_DRVVBUS) MODE6(DBG_IN_13) MODE7() PD
+GPIO74 = MODE0(GPIO74) MODE1(UTXD2) MODE2(EINT13) MODE3(URXD2) MODE4(PWM2) MODE5(DSP_JTCK) MODE6(DBG_IN_15) MODE7() PU
+GPIO75 = MODE0(GPIO75) MODE1(EINT6) MODE2(PWM6) MODE3(IRDA_RXD) MODE4(I2S0_DAT) MODE5(MD_RXD2) MODE6(DBG_IN_12) MODE7() PD
+GPIO76 = MODE0(GPIO76) MODE1(EINT1) MODE2(PWM1) MODE3(UTXD2) MODE4(CLKM4) MODE5(SPI_CLK) MODE6(DBG_IN_7) MODE7() PD
+GPIO77 = MODE0(GPIO77) MODE1(URXD2) MODE2(EINT12) MODE3(UTXD2) MODE4(PWM1) MODE5(DSP_JTRST_B) MODE6(DBG_IN_14) MODE7() PU
+GPIO78 = MODE0(GPIO78) MODE1(EINT5) MODE2(PWM5) MODE3(IRDA_PDN) MODE4(I2S0_CK) MODE5(USB_DRVVBUS) MODE6(DBG_IN_11) MODE7() PD
+GPIO79 = MODE0(GPIO79) MODE1(URXD3) MODE2(EINT16) MODE3(UTXD3) MODE4(PWM5) MODE5(DSP_JTDO) MODE6(DBG_IN_2) MODE7() PU
+GPIO80 = MODE0(GPIO80) MODE1(UCTS2) MODE2(EINT14) MODE3(MD_TXD2) MODE4(PWM3) MODE5(DSP_JTMS) MODE6() MODE7() PD
+GPIO81 = MODE0(GPIO81) MODE1(EINT2) MODE2(PWM2) MODE3(MD_TXD1) MODE4(CLKM3) MODE5(SPI_MI) MODE6(DBG_IN_8) MODE7() PD
+GPIO82 = MODE0(GPIO82) MODE1(URTS2) MODE2(EINT15) MODE3(MD_RXD2) MODE4(PWM4) MODE5(DSP_JTDI) MODE6() MODE7() PD
+GPIO83 = MODE0(GPIO83) MODE1(SPI_CSN) MODE2(EINT18) MODE3(IRDA_PDN) MODE4(SPI_CSN) MODE5() MODE6() MODE7() PD
+GPIO84 = MODE0(GPIO84) MODE1(SPI_MI) MODE2(EINT20) MODE3(IRDA_TXD) MODE4(SPI_MO) MODE5() MODE6() MODE7() PD
+GPIO85 = MODE0(GPIO85) MODE1(SPI_MO) MODE2(EINT21) MODE3(CLKM5) MODE4(SPI_MI) MODE5() MODE6() MODE7() PD
+GPIO86 = MODE0(GPIO86) MODE1(SPI_CLK) MODE2(EINT19) MODE3(IRDA_RXD) MODE4(SPI_CLK) MODE5() MODE6(DBG_OUT0_30) MODE7() PD
+GPIO87 = MODE0(GPIO87) MODE1(SCL_0) MODE2(EINT22) MODE3(CLKM4) MODE4() MODE5() MODE6(DBG_IN_0) MODE7() PU
+GPIO88 = MODE0(GPIO88) MODE1(SDA_0) MODE2(EINT23) MODE3(CLKM3) MODE4() MODE5() MODE6(DBG_IN_1) MODE7() PU
+GPIO89 = MODE0(GPIO89) MODE1(MSDC3_DAT2) MODE2(EINT28) MODE3(URXD3) MODE4(CLKM1) MODE5(UTXD3) MODE6(DBG_OUT1_4) MODE7() PU
+GPIO90 = MODE0(GPIO90) MODE1(MSDC3_DAT1) MODE2(EINT27) MODE3(MD_RXD2) MODE4(CLKM2) MODE5(MD_TXD2) MODE6(DBG_OUT1_0) MODE7() PU
+GPIO91 = MODE0(GPIO91) MODE1(MSDC3_CMD) MODE2(EINT25) MODE3(MD_RXD1) MODE4(CLKM4) MODE5(MD_TXD1) MODE6(DBG_OUT1_1) MODE7() PU
+GPIO92 = MODE0(GPIO92) MODE1(MSDC3_CLK) MODE2(EINT24) MODE3(MD_TXD1) MODE4(CLKM5) MODE5(MD_RXD1) MODE6(DBG_OUT1_2) MODE7() PU
+GPIO93 = MODE0(GPIO93) MODE1(MSDC3_DAT3) MODE2(EINT29) MODE3(UTXD3) MODE4(CLKM0) MODE5(URXD3) MODE6(DBG_OUT1_3) MODE7() PU
+GPIO94 = MODE0(GPIO94) MODE1(MSDC3_DAT0) MODE2(EINT26) MODE3(MD_TXD2) MODE4(CLKM3) MODE5(MD_RXD2) MODE6(DBG_OUT0_31) MODE7() PU
+GPIO95 = MODE0(GPIO95) MODE1(KP_ROW2) MODE2(EINT8) MODE3(CLKM2) MODE4(I2S1_DAT) MODE5() MODE6(DBG_IN_29) MODE7() PD
+GPIO96 = MODE0(GPIO96) MODE1(KP_COL7) MODE2(EINT5) MODE3(CLKM5) MODE4(I2S0_DAT) MODE5() MODE6(DBG_IN_16) MODE7() PD
+GPIO97 = MODE0(GPIO97) MODE1(KP_ROW1) MODE2(EINT7) MODE3(CLKM3) MODE4(I2S1_CK) MODE5() MODE6(DBG_IN_30) MODE7() PD
+GPIO98 = MODE0(GPIO98) MODE1(KP_ROW0) MODE2(EINT6) MODE3(CLKM4) MODE4(I2S0_WS) MODE5() MODE6(DBG_IN_31) MODE7() PD
+GPIO99 = MODE0(GPIO99) MODE1(KP_ROW3) MODE2(EINT9) MODE3(CLKM1) MODE4(I2S1_WS) MODE5() MODE6(DBG_IN_28) MODE7() PD
+GPIO100 = MODE0(GPIO100) MODE1(KP_COL5) MODE2(EINT3) MODE3(PWM5) MODE4(DSP_JTCK) MODE5() MODE6(DBG_IN_18) MODE7() PD
+GPIO101 = MODE0(GPIO101) MODE1(KP_COL3) MODE2(EINT1) MODE3(PWM3) MODE4(DSP_JTRST_B) MODE5() MODE6(DBG_IN_20) MODE7() PD
+GPIO102 = MODE0(GPIO102) MODE1(KP_COL4) MODE2(EINT2) MODE3(PWM4) MODE4(DSP_EMU_B) MODE5() MODE6(DBG_IN_19) MODE7() PD
+GPIO103 = MODE0(GPIO103) MODE1(KP_COL0) MODE2(EINT30) MODE3(PWM0) MODE4(DSP_JTDI) MODE5() MODE6(DBG_IN_23) MODE7() PU
+GPIO104 = MODE0(GPIO104) MODE1(KP_ROW4) MODE2(EINT10) MODE3(CLKM0) MODE4(SCL_0) MODE5() MODE6(DBG_IN_27) MODE7() PD
+GPIO105 = MODE0(GPIO105) MODE1(KP_COL2) MODE2(EINT0) MODE3(PWM2) MODE4(DSP_JTDO) MODE5() MODE6(DBG_IN_21) MODE7() PD
+GPIO106 = MODE0(GPIO106) MODE1(KP_ROW5) MODE2(EINT11) MODE3(IRDA_PDN) MODE4(SDA_0) MODE5() MODE6(DBG_IN_26) MODE7() PD
+GPIO107 = MODE0(GPIO107) MODE1(KP_ROW7) MODE2(EINT13) MODE3(IRDA_TXD) MODE4(SDA_1) MODE5() MODE6(DBG_IN_24) MODE7() PD
+GPIO108 = MODE0(GPIO108) MODE1(KP_COL1) MODE2(EINT31) MODE3(PWM1) MODE4(DSP_JTMS) MODE5() MODE6(DBG_IN_22) MODE7() PU
+GPIO109 = MODE0(GPIO109) MODE1(KP_COL6) MODE2(EINT4) MODE3(PWM6) MODE4(I2S0_CK) MODE5() MODE6(DBG_IN_17) MODE7() PD
+GPIO110 = MODE0(GPIO110) MODE1(KP_ROW6) MODE2(EINT12) MODE3(IRDA_RXD) MODE4(SCL_1) MODE5(EXT_FRAME_SYNC) MODE6(DBG_IN_25) MODE7() PD
+GPIO111 = MODE0(GPIO111) MODE1(DUAL_BPI_BUS3) MODE2(EINT17) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_22) MODE7() PD
+GPIO112 = MODE0(GPIO112) MODE1(TDD_AFC_SW) MODE2(EINT29) MODE3(IRDA_TXD) MODE4(SDA_1) MODE5() MODE6() MODE7() PD
+GPIO113 = MODE0(GPIO113) MODE1(DUAL_BPI_BUS1) MODE2(EINT15) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_20) MODE7() PD
+GPIO114 = MODE0(GPIO114) MODE1(DUAL_BPI_BUS4) MODE2(EINT18) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_23) MODE7() PD
+GPIO115 = MODE0(GPIO115) MODE1(DUAL_BPI_BUS0) MODE2(EINT14) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_19) MODE7() PD
+GPIO116 = MODE0(GPIO116) MODE1(DUAL_BPI_BUS5) MODE2(EINT19) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_24) MODE7() PD
+GPIO117 = MODE0(GPIO117) MODE1(DUAL_BPI_BUS2) MODE2(EINT16) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_21) MODE7() PD
+GPIO118 = MODE0(GPIO118) MODE1(DUAL_BPI_BUS8) MODE2(EINT0) MODE3(GPS_SYNC) MODE4() MODE5() MODE6(DBG_OUT1_27) MODE7() PD
+GPIO119 = MODE0(GPIO119) MODE1(DUAL_BPI_BUS9) MODE2(EINT22) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_28) MODE7() PD
+GPIO120 = MODE0(GPIO120) MODE1(DUAL_BPI_BUS7) MODE2(EINT21) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_26) MODE7() PD
+GPIO121 = MODE0(GPIO121) MODE1(DUAL_BPI_BUS6) MODE2(EINT20) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_25) MODE7() PD
+GPIO122 = MODE0(GPIO122) MODE1(TDD_TIMINGSYNC) MODE2(EINT28) MODE3(IRDA_RXD) MODE4(SCL_1) MODE5() MODE6() MODE7() PD
+GPIO123 = MODE0(GPIO123) MODE1(DUAL_BPI_BUS10) MODE2(EINT23) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_29) MODE7() PD
+GPIO124 = MODE0(GPIO124) MODE1(DUAL_BPI_BUS14) MODE2(EINT27) MODE3(IRDA_PDN) MODE4(SDA_0) MODE5() MODE6() MODE7() PD
+GPIO125 = MODE0(GPIO125) MODE1(DUAL_BPI_BUS13) MODE2(EINT26) MODE3(EXT_FRAME_SYNC) MODE4(SCL_0) MODE5() MODE6() MODE7() PD
+GPIO126 = MODE0(GPIO126) MODE1(DUAL_BPI_BUS11) MODE2(EINT24) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_30) MODE7() PD
+GPIO127 = MODE0(GPIO127) MODE1(DUAL_BPI_BUS12) MODE2(EINT25) MODE3(EXT_FRAME_SYNC) MODE4() MODE5() MODE6(DBG_OUT1_31) MODE7() PD
+GPIO128 = MODE0(GPIO128) MODE1(VM1) MODE2(EINT31) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO129 = MODE0(GPIO129) MODE1(VM0) MODE2(EINT30) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO130 = MODE0(GPIO130) MODE1(BSI0_CS1) MODE2(EINT4) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO131 = MODE0(GPIO131) MODE1(BSI1_DATA) MODE2(EINT6) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO132 = MODE0(GPIO132) MODE1(BSI1_DATA1) MODE2(EINT8) MODE3(BSI1_CS1) MODE4() MODE5() MODE6() MODE7() PD
+GPIO133 = MODE0(GPIO133) MODE1(BSI1_CS0) MODE2(EINT7) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO134 = MODE0(GPIO134) MODE1(BSI1_CLK) MODE2(EINT5) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO135 = MODE0(GPIO135) MODE1(BSI0_DATA) MODE2(EINT3) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO136 = MODE0(GPIO136) MODE1(BSI0_CS0) MODE2(EINT1) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO137 = MODE0(GPIO137) MODE1(BSI0_CLK) MODE2(EINT2) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO138 = MODE0(GPIO138) MODE1(CLKM2) MODE2(EINT9) MODE3(PWM0) MODE4(IRDA_PDN) MODE5() MODE6() MODE7() PU/PD
+GPIO139 = MODE0(GPIO139) MODE1(CLKM1) MODE2(EINT10) MODE3(PWM5) MODE4(IRDA_RXD) MODE5() MODE6() MODE7() PU/PD
+GPIO140 = MODE0(GPIO140) MODE1(CLKM0) MODE2(EINT11) MODE3(PWM6) MODE4(IRDA_TXD) MODE5() MODE6() MODE7() PU/PD
+GPIO141 = MODE0(GPIO141) MODE1(IDDIG) MODE2(EINT12) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO142 = MODE0(GPIO142) MODE1(SDA_2) MODE2(EINT14) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO143 = MODE0(GPIO143) MODE1(PACTRL2) MODE2(EINT19) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_15) MODE7() PU/PD
+GPIO144 = MODE0(GPIO144) MODE1(PMUCTRL0) MODE2(EINT15) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_11) MODE7() PU/PD
+GPIO145 = MODE0(GPIO145) MODE1(SCL_2) MODE2(EINT13) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO146 = MODE0(GPIO146) MODE1(PACTRL1) MODE2(EINT18) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_14) MODE7() PU/PD
+GPIO147 = MODE0(GPIO147) MODE1(PMUCTRL1) MODE2(EINT16) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_12) MODE7() PU/PD
+GPIO148 = MODE0(GPIO148) MODE1(PACTRL0) MODE2(EINT17) MODE3() MODE4() MODE5() MODE6(DBG_OUT1_13) MODE7() PU/PD
+GPIO149 = MODE0(GPIO149) MODE1(SWCLKTCK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO150 = MODE0(GPIO150) MODE1(SWDIOTMS) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO151 = MODE0(GPIO151) MODE1(JTCK) MODE2(DSP_JTCK) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO152 = MODE0(GPIO152) MODE1(JTDO) MODE2(DSP_JTDO) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO153 = MODE0(GPIO153) MODE1(JTRST_B) MODE2(DSP_JTRST_B) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO154 = MODE0(GPIO154) MODE1(JTDI) MODE2(DSP_JTDI) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO155 = MODE0(GPIO155) MODE1(JRTCK) MODE2(DSP_EMU_B) MODE3() MODE4() MODE5() MODE6() MODE7() PU/PD
+GPIO156 = MODE0(GPIO156) MODE1(JTMS) MODE2(DSP_JTMS) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO157 = MODE0(GPIO157) MODE1(UTXD1) MODE2(EINT20) MODE3(URXD1) MODE4(MD_RXD1) MODE5() MODE6() MODE7() PU
+GPIO158 = MODE0(GPIO158) MODE1(UTXD4) MODE2(EINT24) MODE3(URXD4) MODE4(MD_RXD2) MODE5() MODE6(DBG_IN_5) MODE7() PU
+GPIO159 = MODE0(GPIO159) MODE1(URXD4) MODE2(EINT23) MODE3(UTXD4) MODE4(MD_TXD2) MODE5() MODE6(DBG_IN_4) MODE7() PU
+GPIO160 = MODE0(GPIO160) MODE1(URXD1) MODE2() MODE3(UTXD1) MODE4(MD_TXD1) MODE5() MODE6() MODE7() PU
+GPIO161 = MODE0(GPIO161) MODE1(URTS1) MODE2(EINT22) MODE3(MD_RXD1) MODE4() MODE5() MODE6() MODE7() PD
+GPIO162 = MODE0(GPIO162) MODE1(UCTS1) MODE2(EINT21) MODE3(MD_TXD1) MODE4() MODE5() MODE6() MODE7() PD
+GPIO163 = MODE0(GPIO163) MODE1(MSDC0_INSI) MODE2(EINT25) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO164 = MODE0(GPIO164) MODE1(MSDC0_DAT6) MODE2(EINT2) MODE3(SPI_MI) MODE4(NLD11) MODE5() MODE6() MODE7() PU
+GPIO165 = MODE0(GPIO165) MODE1(MSDC0_DAT7) MODE2(EINT3) MODE3(SPI_MO) MODE4(NLD3) MODE5() MODE6() MODE7() PU
+GPIO166 = MODE0(GPIO166) MODE1(MSDC0_DAT5) MODE2(EINT1) MODE3(SPI_CLK) MODE4(NLD2) MODE5() MODE6() MODE7() PU
+GPIO167 = MODE0(GPIO167) MODE1(MSDC0_RSTB) MODE2(NCLE) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO168 = MODE0(GPIO168) MODE1(MSDC0_DAT4) MODE2(EINT0) MODE3(SPI_CSN) MODE4(NLD10) MODE5() MODE6() MODE7() PU
+GPIO169 = MODE0(GPIO169) MODE1(MSDC0_DAT2) MODE2(EINT30) MODE3(NLD9) MODE4() MODE5() MODE6() MODE7() PU
+GPIO170 = MODE0(GPIO170) MODE1(MSDC0_DAT3) MODE2(EINT31) MODE3(NLD1) MODE4() MODE5() MODE6() MODE7() PU
+GPIO171 = MODE0(GPIO171) MODE1(MSDC0_CMD) MODE2(EINT27) MODE3(NRNB) MODE4() MODE5() MODE6() MODE7() PU
+GPIO172 = MODE0(GPIO172) MODE1(MSDC0_CLK) MODE2(EINT26) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO173 = MODE0(GPIO173) MODE1(MSDC0_DAT1) MODE2(EINT29) MODE3(NLD0) MODE4() MODE5() MODE6() MODE7() PU
+GPIO174 = MODE0(GPIO174) MODE1(MSDC0_SDWPI) MODE2(EINT4) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO175 = MODE0(GPIO175) MODE1(MSDC0_DAT0) MODE2(EINT28) MODE3(NLD8) MODE4() MODE5() MODE6() MODE7() PU
+GPIO176 = MODE0(GPIO176) MODE1(MSDC1_DAT1) MODE2(EINT7) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO177 = MODE0(GPIO177) MODE1(MSDC1_DAT2) MODE2(EINT8) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO178 = MODE0(GPIO178) MODE1(MSDC1_DAT0) MODE2(EINT6) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO179 = MODE0(GPIO179) MODE1(MSDC1_DAT3) MODE2(EINT9) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO180 = MODE0(GPIO180) MODE1(MSDC1_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO181 = MODE0(GPIO181) MODE1(MSDC1_CMD) MODE2(EINT5) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO182 = MODE0(GPIO182) MODE1(MSDC2_CLK) MODE2(EINT10) MODE3() MODE4(UTXD2) MODE5() MODE6(DBG_OUT1_5) MODE7() PU
+GPIO183 = MODE0(GPIO183) MODE1(MSDC2_DAT3) MODE2(EINT15) MODE3(UTXD2) MODE4(SPI_MO) MODE5(SPI_MI) MODE6(DBG_OUT1_10) MODE7() PU
+GPIO184 = MODE0(GPIO184) MODE1(MSDC2_CMD) MODE2(EINT11) MODE3(IRDA_PDN) MODE4(URXD2) MODE5() MODE6(DBG_OUT1_6) MODE7() PU
+GPIO185 = MODE0(GPIO185) MODE1(MSDC2_DAT2) MODE2(EINT14) MODE3(URXD2) MODE4(SPI_MI) MODE5(SPI_MO) MODE6(DBG_OUT1_9) MODE7() PU
+GPIO186 = MODE0(GPIO186) MODE1(MSDC2_DAT0) MODE2(EINT12) MODE3(IRDA_RXD) MODE4(SPI_CSN) MODE5(SPI_CSN) MODE6(DBG_OUT1_7) MODE7() PU
+GPIO187 = MODE0(GPIO187) MODE1(MSDC2_DAT1) MODE2(EINT13) MODE3(IRDA_TXD) MODE4(SPI_CLK) MODE5(SPI_CLK) MODE6(DBG_OUT1_8) MODE7() PU
+GPIO188 = MODE0(GPIO188) MODE1(NLD12) MODE2(EINT2) MODE3(CLKM3) MODE4(PWM3) MODE5() MODE6() MODE7() PD
+GPIO189 = MODE0(GPIO189) MODE1(NLD6) MODE2(EINT28) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO190 = MODE0(GPIO190) MODE1(NREB) MODE2(EINT17) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO191 = MODE0(GPIO191) MODE1(NLD3) MODE2(EINT25) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO192 = MODE0(GPIO192) MODE1(NLD11) MODE2(EINT1) MODE3(CLKM4) MODE4(PWM2) MODE5() MODE6() MODE7() PD
+GPIO193 = MODE0(GPIO193) MODE1(NLD5) MODE2(EINT27) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO194 = MODE0(GPIO194) MODE1(NLD9) MODE2(EINT31) MODE3(URXD3) MODE4(PWM0) MODE5() MODE6() MODE7() PD
+GPIO195 = MODE0(GPIO195) MODE1(NCEB1) MODE2(EINT20) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO196 = MODE0(GPIO196) MODE1(NLD10) MODE2(EINT0) MODE3(CLKM5) MODE4(PWM1) MODE5() MODE6() MODE7() PD
+GPIO197 = MODE0(GPIO197) MODE1(NCEB0) MODE2(EINT19) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO198 = MODE0(GPIO198) MODE1(NLD4) MODE2(EINT26) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO199 = MODE0(GPIO199) MODE1(NWEB) MODE2(EINT18) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO200 = MODE0(GPIO200) MODE1(NALE) MODE2(EINT16) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO201 = MODE0(GPIO201) MODE1(NLD15) MODE2(EINT5) MODE3(CLKM0) MODE4(PWM6) MODE5() MODE6() MODE7() PD
+GPIO202 = MODE0(GPIO202) MODE1(NLD14) MODE2(EINT4) MODE3(CLKM1) MODE4(PWM5) MODE5() MODE6() MODE7() PD
+GPIO203 = MODE0(GPIO203) MODE1(NLD2) MODE2(EINT24) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO204 = MODE0(GPIO204) MODE1(NRNB) MODE2(EINT21) MODE3() MODE4() MODE5() MODE6() MODE7() PU
+GPIO205 = MODE0(GPIO205) MODE1(NLD1) MODE2(EINT23) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO206 = MODE0(GPIO206) MODE1(NLD8) MODE2(EINT30) MODE3(UTXD3) MODE4(GPS_SYNC) MODE5() MODE6() MODE7() PD
+GPIO207 = MODE0(GPIO207) MODE1(NLD7) MODE2(EINT29) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO208 = MODE0(GPIO208) MODE1(NCLE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO209 = MODE0(GPIO209) MODE1(NLD13) MODE2(EINT3) MODE3(CLKM2) MODE4(PWM4) MODE5() MODE6() MODE7() PD
+GPIO210 = MODE0(GPIO210) MODE1(NLD0) MODE2(EINT22) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO211 = MODE0(GPIO211) MODE1(CMDAT2) MODE2(EINT20) MODE3(CAM_CSD2_S1) MODE4(TBRXFS) MODE5() MODE6() MODE7() PD
+GPIO212 = MODE0(GPIO212) MODE1(CMMCLK) MODE2(EINT6) MODE3(CMMCLK_S1) MODE4() MODE5() MODE6() MODE7() PD
+GPIO213 = MODE0(GPIO213) MODE1(CMDAT7) MODE2(EINT15) MODE3(CAM_CSD3_S2) MODE4() MODE5() MODE6() MODE7() PD
+GPIO214 = MODE0(GPIO214) MODE1(CMDAT0) MODE2(EINT22) MODE3(CAM_CSD0_S1) MODE4(TBTXFS) MODE5() MODE6() MODE7() PD
+GPIO215 = MODE0(GPIO215) MODE1(CMDAT4) MODE2(EINT18) MODE3(CAM_CSD0_S2) MODE4() MODE5() MODE6() MODE7() PD
+GPIO216 = MODE0(GPIO216) MODE1(CMDAT6) MODE2(EINT16) MODE3(CAM_CSD2_S2) MODE4() MODE5() MODE6() MODE7() PD
+GPIO217 = MODE0(GPIO217) MODE1(CMDAT3) MODE2(EINT19) MODE3(CAM_CSD3_S1) MODE4() MODE5() MODE6() MODE7() PD
+GPIO218 = MODE0(GPIO218) MODE1(CMDAT8) MODE2(EINT23) MODE3() MODE4(DSP_GPO0) MODE5() MODE6() MODE7() PD
+GPIO219 = MODE0(GPIO219) MODE1(CMDAT9) MODE2(EINT24) MODE3() MODE4(DSP_GPO1) MODE5() MODE6() MODE7() PD
+GPIO220 = MODE0(GPIO220) MODE1(PWM4) MODE2(EINT9) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO221 = MODE0(GPIO221) MODE1(CMRST) MODE2(EINT12) MODE3(CMPDN_S2) MODE4() MODE5() MODE6() MODE7() PD
+GPIO222 = MODE0(GPIO222) MODE1(SCL_1) MODE2(EINT7) MODE3(SCL_1) MODE4() MODE5() MODE6(DBG_IN_32) MODE7() PU
+GPIO223 = MODE0(GPIO223) MODE1(CMDAT5) MODE2(EINT17) MODE3(CAM_CSD1_S2) MODE4() MODE5() MODE6() MODE7() PD
+GPIO224 = MODE0(GPIO224) MODE1(SDA_1) MODE2(EINT8) MODE3(SDA_1) MODE4() MODE5() MODE6() MODE7() PU
+GPIO225 = MODE0(GPIO225) MODE1(CMVREF) MODE2(EINT11) MODE3() MODE4() MODE5() MODE6() MODE7() PD
+GPIO226 = MODE0(GPIO226) MODE1(CMPCLK) MODE2(EINT13) MODE3(CAM_CSK_S1) MODE4() MODE5() MODE6() MODE7() PD
+GPIO227 = MODE0(GPIO227) MODE1(CMHREF) MODE2(EINT10) MODE3(CAM_CSK_S2) MODE4() MODE5() MODE6() MODE7() PD
+GPIO228 = MODE0(GPIO228) MODE1(CMPDN) MODE2(EINT14) MODE3(CMPDN_S1) MODE4() MODE5() MODE6() MODE7() PD
+GPIO229 = MODE0(GPIO229) MODE1(CMDAT1) MODE2(EINT21) MODE3(CAM_CSD1_S1) MODE4(TBRXEN) MODE5() MODE6() MODE7() PD
+GPIO230 = MODE0(GPIO230) MODE1(CMFLASH) MODE2(EINT26) MODE3(CMMCLK_S2) MODE4(DSP_GPO2) MODE5() MODE6() MODE7() PD
+GPIO231 = MODE0(GPIO231) MODE1(SRCLKENAI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD
+
+[GPO]
+
+[EINT]
+EINT_COUNT = 29
+EINT_DEBOUNCE_TIME_COUNT = 29
+
+[EINT_EX_PIN]
+0
+1
+2
+3
+4
+5
+6
+7
+8
+9
+10
+11
+12
+13
+14
+15
+16
+17
+18
+19
+20
+21
+22
+23
+24
+25
+26
+30
+31
+
+[ADC]
+ADC_COUNT = 5
+
+[ADC_EX_PIN]
+0
+1
+2
+3
+4
+
+[KEYPAD]
+KEY_ROW = 8
+KEY_COLUMN = 9
+
+
diff --git a/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6236PMU.cmp b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6236PMU.cmp
new file mode 100644
index 0000000..1162d77
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6236PMU.cmp
@@ -0,0 +1,171 @@
+[PMIC_TABLE]
+NUM_LDO = 15
+
+[LDO_NAME1]
+LDO_NAME=VCORE
+[CONFIGURABLE1]
+CONFIG=YES
+[LDO_VOLTAGE_SEL1]
+1.2
+1.1
+1.0
+0.9
+[LDO_VOLTAGE_CAL1]
+CAL_STEP=20
+
+[LDO_NAME2]
+LDO_NAME=VIO
+[CONFIGURABLE2]
+CONFIG=NO
+[LDO_VOLTAGE_SEL2]
+2.8
+[LDO_VOLTAGE_CAL2]
+CAL_STEP=30
+
+[LDO_NAME3]
+LDO_NAME=VRF
+[CONFIGURABLE3]
+CONFIG=NO
+[LDO_VOLTAGE_SEL3]
+2.8
+[LDO_VOLTAGE_CAL3]
+CAL_STEP=30
+
+[LDO_NAME4]
+LDO_NAME=VA
+[CONFIGURABLE4]
+CONFIG=NO
+[LDO_VOLTAGE_SEL4]
+2.8
+[LDO_VOLTAGE_CAL4]
+CAL_STEP=30
+
+[LDO_NAME5]
+LDO_NAME=VTCXO
+[CONFIGURABLE5]
+CONFIG=NO
+[LDO_VOLTAGE_SEL5]
+2.8
+[LDO_VOLTAGE_CAL5]
+CAL_STEP=30
+
+[LDO_NAME6]
+LDO_NAME=VRTC
+[CONFIGURABLE6]
+CONFIG=NO
+[LDO_VOLTAGE_SEL6]
+2.6
+[LDO_VOLTAGE_CAL6]
+CAL_STEP=30
+
+[LDO_NAME7]
+LDO_NAME=VM
+[CONFIGURABLE7]
+CONFIG=NO
+[LDO_VOLTAGE_SEL7]
+2.8
+1.8
+[LDO_VOLTAGE_CAL7]
+CAL_STEP=30
+
+[LDO_NAME8]
+LDO_NAME=VSIM
+[CONFIGURABLE8]
+CONFIG=YES
+[LDO_VOLTAGE_SEL8]
+2.8
+1.8
+[LDO_VOLTAGE_CAL8]
+CAL_STEP=30
+
+[LDO_NAME9]
+LDO_NAME=VSIM2
+[CONFIGURABLE9]
+CONFIG=YES
+[LDO_VOLTAGE_SEL9]
+2.8
+2.5
+1.8
+1.3
+[LDO_VOLTAGE_CAL9]
+CAL_STEP=30
+
+[LDO_NAME10]
+LDO_NAME=VMC
+[CONFIGURABLE10]
+CONFIG=NO
+[LDO_VOLTAGE_SEL10]
+2.5
+1.8
+1.5
+[LDO_VOLTAGE_CAL10]
+CAL_STEP=30
+
+[LDO_NAME11]
+LDO_NAME=VBT
+[CONFIGURABLE11]
+CONFIG=NO
+[LDO_VOLTAGE_SEL11]
+2.8
+3.0
+[LDO_VOLTAGE_CAL11]
+CAL_STEP=30
+
+[LDO_NAME12]
+LDO_NAME=VUSB
+[CONFIGURABLE12]
+CONFIG=NO
+[LDO_VOLTAGE_SEL12]
+3.3
+[LDO_VOLTAGE_CAL12]
+CAL_STEP=30
+
+[LDO_NAME13]
+LDO_NAME=VCAMD
+[CONFIGURABLE13]
+CONFIG=NO
+[LDO_VOLTAGE_SEL13]
+2.8
+1.8
+1.5
+1.3
+[LDO_VOLTAGE_CAL13]
+CAL_STEP=30
+
+[LDO_NAME14]
+LDO_NAME=VCAMA
+[CONFIGURABLE14]
+CONFIG=NO
+[LDO_VOLTAGE_SEL14]
+2.8
+1.8
+1.5
+1.3
+[LDO_VOLTAGE_CAL14]
+CAL_STEP=30
+
+[LDO_NAME15]
+LDO_NAME=VIBR
+[CONFIGURABLE15]
+CONFIG=NO
+[LDO_VOLTAGE_SEL15]
+2.8
+1.8
+1.5
+1.3
+[LDO_VOLTAGE_CAL15]
+CAL_STEP=30
+
+[pmic_drv.h_HEADER]
+#ifndef _PMIC_DRV_H
+#define _PMIC_DRV_H
+
+[pmic_drv.h_TAILER]
+#endif /* _PMIC_DRV_H */
+
+[pmic_drv.c_HEADER]
+#ifdef __CUST_NEW__
+#include "pmic_drv.h"
+
+[pmic_drv.c_TAILER]
+#endif /* __CUST_NEW__ */
diff --git a/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6251PMUNONMP.cmp b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6251PMUNONMP.cmp
new file mode 100644
index 0000000..5b7439d
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6251PMUNONMP.cmp
@@ -0,0 +1,125 @@
+[PMIC_TABLE]
+NUM_LDO = 8
+
+[LDO_NAME1]
+LDO_NAME=VRF
+[CONFIGURABLE1]
+CONFIG=NO
+[LDO_VOLTAGE_SEL1]
+2.8
+[LDO_VOLTAGE_CAL1]
+CAL_STEP=20
+
+[LDO_NAME2]
+LDO_NAME=VTCXO
+[CONFIGURABLE2]
+CONFIG=NO
+[LDO_VOLTAGE_SEL2]
+2.8
+[LDO_VOLTAGE_CAL2]
+CAL_STEP=20
+
+[LDO_NAME3]
+LDO_NAME=VUSB
+[CONFIGURABLE3]
+CONFIG=NO
+[LDO_VOLTAGE_SEL3]
+3.3
+[LDO_VOLTAGE_CAL3]
+CAL_STEP=20
+[INTERNAL_USE3]
+INTERNAL = YES
+[INTERNAL_CAL_LEVEL3]
+INT_CAL_LEVEL = 0
+[INTERNAL_APPLICATION3]
+INT_APPLICATION=USB
+[INTERNAL_VOLT_SEL3]
+INT_VOLT_SEL = 3.3
+
+[LDO_NAME4]
+LDO_NAME=VSF
+[CONFIGURABLE4]
+CONFIG = NO
+[LDO_VOLTAGE_SEL4]
+1.8
+[LDO_VOLTAGE_CAL4]
+CAL_STEP=20
+[INTERNAL_USE4]
+INTERNAL = YES
+[INTERNAL_CAL_LEVEL4]
+INT_CAL_LEVEL = 0
+[INTERNAL_APPLICATION4]
+INT_APPLICATION=SF
+[INTERNAL_VOLT_SEL4]
+INT_VOLT_SEL = 1.8
+
+[LDO_NAME5]
+LDO_NAME=VSIM
+[CONFIGURABLE5]
+CONFIG=YES
+[LDO_VOLTAGE_SEL5]
+1.8
+3
+[LDO_VOLTAGE_CAL5]
+CAL_STEP=20
+
+[LDO_NAME6]
+LDO_NAME=VSIM2
+[CONFIGURABLE6]
+CONFIG=YES
+[LDO_VOLTAGE_SEL6]
+1.3
+1.5
+1.8
+2.5
+2.8
+3
+3.3
+[LDO_VOLTAGE_CAL6]
+CAL_STEP=20
+
+[LDO_NAME7]
+LDO_NAME=VIBR
+[CONFIGURABLE7]
+CONFIG=YES
+[LDO_VOLTAGE_SEL7]
+1.3
+1.5
+1.8
+2.5
+2.8
+3
+3.3
+[LDO_VOLTAGE_CAL7]
+CAL_STEP=20
+
+[LDO_NAME8]
+LDO_NAME=VFM
+[CONFIGURABLE8]
+CONFIG=YES
+[LDO_VOLTAGE_SEL8]
+1.3
+1.5
+1.8
+2.5
+2.8
+3
+3.3
+[LDO_VOLTAGE_CAL8]
+CAL_STEP=20
+
+
+
+[pmic_drv.h_HEADER]
+#ifndef _PMIC_DRV_H
+#define _PMIC_DRV_H
+
+[pmic_drv.h_TAILER]
+#endif /* _PMIC_DRV_H */
+
+[pmic_drv.c_HEADER]
+#ifdef __CUST_NEW__
+#include "pmic_drv.h"
+
+[pmic_drv.c_TAILER]
+#endif /* __CUST_NEW__ */
diff --git a/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6255PMUMP.cmp b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6255PMUMP.cmp
new file mode 100644
index 0000000..e0af8a5
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6255PMUMP.cmp
@@ -0,0 +1,121 @@
+[PMIC_TABLE]
+NUM_LDO = 8
+
+[LDO_NAME1]
+LDO_NAME=VRF
+[LDO_ENABLE_CONFIGURABLE1]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL1]
+2.8
+[SlEEP_VOLTAGE_CONFIGURABLE1]
+CONFIGURABLE = NO
+
+[LDO_NAME2]
+LDO_NAME=VCAMA
+[LDO_ENABLE_CONFIGURABLE2]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL2]
+1.5
+1.8
+2.5
+2.8
+[SlEEP_VOLTAGE_CONFIGURABLE2]
+CONFIGURABLE = NO
+
+[LDO_NAME3]
+LDO_NAME=VSIM
+[LDO_ENABLE_CONFIGURABLE3]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL3]
+1.8
+3.0
+[SlEEP_VOLTAGE_CONFIGURABLE3]
+CONFIGURABLE = NO
+
+[LDO_NAME4]
+LDO_NAME=VSIM2
+[LDO_ENABLE_CONFIGURABLE4]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL4]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE4]
+CONFIGURABLE = NO
+
+[LDO_NAME5]
+LDO_NAME=VCAMD
+[LDO_ENABLE_CONFIGURABLE5]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL5]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE5]
+CONFIGURABLE = NO
+
+[LDO_NAME6]
+LDO_NAME=VBT
+[LDO_ENABLE_CONFIGURABLE6]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL6]
+1.5
+1.8
+2.5
+2.8
+3.0
+3.1
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE6]
+CONFIGURABLE = NO
+
+[LDO_NAME7]
+LDO_NAME=VIBR
+[LDO_ENABLE_CONFIGURABLE7]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL7]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE7]
+CONFIGURABLE = NO
+
+[LDO_NAME8]
+LDO_NAME=VMC
+[LDO_ENABLE_CONFIGURABLE8]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL8]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE8]
+CONFIGURABLE = NO
+
+
+[pmic_drv.h_HEADER]
+#include "dcl.h"
+
+[pmic_drv.h_TAILER]
+
+[pmic_drv.c_HEADER]
+#include "dcl.h"
+#include "pmic_drv.h"
+
+[pmic_drv.c_TAILER]
+//end of pmic_drv
diff --git a/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6255PMUNONMP.cmp b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6255PMUNONMP.cmp
new file mode 100644
index 0000000..f60ca32
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6255PMUNONMP.cmp
@@ -0,0 +1,167 @@
+[PMIC_TABLE]
+NUM_LDO = 11
+
+[LDO_NAME1]
+LDO_NAME=VRF
+[CONFIGURABLE1]
+CONFIG=NO
+[LDO_VOLTAGE_SEL1]
+2.8
+[LDO_VOLTAGE_CAL1]
+CAL_STEP=20
+
+[LDO_NAME2]
+LDO_NAME=VTCXO
+[CONFIGURABLE2]
+CONFIG=NO
+[LDO_VOLTAGE_SEL2]
+2.8
+[LDO_VOLTAGE_CAL2]
+CAL_STEP=20
+
+[LDO_NAME3]
+LDO_NAME=VCAMA
+[CONFIGURABLE3]
+CONFIG=YES
+[LDO_VOLTAGE_SEL3]
+1.5
+1.8
+2.5
+2.8
+[LDO_VOLTAGE_CAL3]
+CAL_STEP=20
+
+[LDO_NAME4]
+LDO_NAME=VCAMD
+[CONFIGURABLE4]
+CONFIG=YES
+[LDO_VOLTAGE_SEL4]
+1.5
+1.8
+2.5
+2.8
+[LDO_VOLTAGE_CAL4]
+CAL_STEP=20
+
+[LDO_NAME5]
+LDO_NAME=VUSB
+[CONFIGURABLE5]
+CONFIG=NO
+[LDO_VOLTAGE_SEL5]
+3.3
+[LDO_VOLTAGE_CAL5]
+CAL_STEP=20
+[INTERNAL_USE5]
+INTERNAL = YES
+[INTERNAL_CAL_LEVEL5]
+INT_CAL_LEVEL = 0
+[INTERNAL_APPLICATION5]
+INT_APPLICATION=USB
+[INTERNAL_VOLT_SEL5]
+INT_VOLT_SEL = 3.3
+
+[LDO_NAME6]
+LDO_NAME=VBT
+[CONFIGURABLE6]
+CONFIG=YES
+[LDO_VOLTAGE_SEL6]
+2.8
+3.0
+3.1
+3.3
+[LDO_VOLTAGE_CAL6]
+CAL_STEP=20
+
+[LDO_NAME7]
+LDO_NAME=VSIM
+[CONFIGURABLE7]
+CONFIG=YES
+[LDO_VOLTAGE_SEL7]
+1.8
+3.0
+[LDO_VOLTAGE_CAL7]
+CAL_STEP=20
+
+[LDO_NAME8]
+LDO_NAME=VSIM2
+[CONFIGURABLE8]
+CONFIG=YES
+[LDO_VOLTAGE_SEL8]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[LDO_VOLTAGE_CAL8]
+CAL_STEP=20
+
+[LDO_NAME9]
+LDO_NAME=VIBR
+[CONFIGURABLE9]
+CONFIG=YES
+[LDO_VOLTAGE_SEL9]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[LDO_VOLTAGE_CAL9]
+CAL_STEP=20
+
+[LDO_NAME10]
+LDO_NAME=VMC
+[CONFIGURABLE10]
+CONFIG=YES
+[LDO_VOLTAGE_SEL10]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[LDO_VOLTAGE_CAL10]
+CAL_STEP=20
+
+[LDO_NAME11]
+LDO_NAME=VFM
+[CONFIGURABLE11]
+CONFIG=YES
+[LDO_VOLTAGE_SEL11]
+2.8
+[LDO_VOLTAGE_CAL11]
+CAL_STEP=20
+
+
+[pmic_drv.h_HEADER]
+#ifndef _PMIC_DRV_H
+#define _PMIC_DRV_H
+
+[pmic_drv.h_TAILER]
+#endif /* _PMIC_DRV_H */
+
+[pmic_drv.c_HEADER]
+#ifdef __CUST_NEW__
+#include "pmic_drv.h"
+
+[pmic_drv.c_TAILER]
+#endif /* __CUST_NEW__ */
+
+
+
+[pmic_drv.h_YuSu_HEADER]
+#ifndef _PMIC_DRV_H
+#define _PMIC_DRV_H
+
+[pmic_drv.h_YuSu_TAILER]
+#endif /* _PMIC_DRV_H */
+
+[pmic_drv.c_YuSu_HEADER]
+#include "pmic_drv.h"
+
+[pmic_drv.c_YuSu_TAILER]
+/* End of pmic_drv.c */
diff --git a/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6256PMUMP.cmp b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6256PMUMP.cmp
new file mode 100644
index 0000000..03d7c1c
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6256PMUMP.cmp
@@ -0,0 +1,121 @@
+[PMIC_TABLE]
+NUM_LDO = 8
+
+[LDO_NAME1]
+LDO_NAME=VRF
+[LDO_ENABLE_CONFIGURABLE1]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL1]
+2.8
+[SlEEP_VOLTAGE_CONFIGURABLE1]
+CONFIGURABLE = NO
+
+[LDO_NAME2]
+LDO_NAME=VCAMA
+[LDO_ENABLE_CONFIGURABLE2]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL2]
+1.5
+1.8
+2.5
+2.8
+[SlEEP_VOLTAGE_CONFIGURABLE2]
+CONFIGURABLE = NO
+
+[LDO_NAME3]
+LDO_NAME=VSIM
+[LDO_ENABLE_CONFIGURABLE3]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL3]
+1.8
+3.0
+[SlEEP_VOLTAGE_CONFIGURABLE3]
+CONFIGURABLE = NO
+
+[LDO_NAME4]
+LDO_NAME=VSIM2
+[LDO_ENABLE_CONFIGURABLE4]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL4]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE4]
+CONFIGURABLE = NO
+
+[LDO_NAME5]
+LDO_NAME=VCAMD
+[LDO_ENABLE_CONFIGURABLE5]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL5]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE5]
+CONFIGURABLE = NO
+
+[LDO_NAME6]
+LDO_NAME=VBT
+[LDO_ENABLE_CONFIGURABLE6]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL6]
+1.5
+1.8
+2.5
+2.8
+3.0
+3.1
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE6]
+CONFIGURABLE = NO
+
+[LDO_NAME7]
+LDO_NAME=VIBR
+[LDO_ENABLE_CONFIGURABLE7]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL7]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE7]
+CONFIGURABLE = NO
+
+[LDO_NAME8]
+LDO_NAME=VMC
+[LDO_ENABLE_CONFIGURABLE8]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL8]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE8]
+CONFIGURABLE = NO
+
+
+[pmic_drv.h_HEADER]
+#include "dcl.h"
+
+[pmic_drv.h_TAILER]
+
+[pmic_drv.c_HEADER]
+#include "dcl.h"
+#include "pmic_drv.h"
+
+[pmic_drv.c_TAILER]
+//end of pmic_drv
\ No newline at end of file
diff --git a/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6256PMUNONMP.cmp b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6256PMUNONMP.cmp
new file mode 100644
index 0000000..550bd60
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6256PMUNONMP.cmp
@@ -0,0 +1,121 @@
+[PMIC_TABLE]
+NUM_LDO = 8
+
+[LDO_NAME1]
+LDO_NAME=VRF
+[LDO_ENABLE_CONFIGURABLE1]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL1]
+2.8
+[SlEEP_VOLTAGE_CONFIGURABLE1]
+CONFIGURABLE = NO
+
+[LDO_NAME2]
+LDO_NAME=VCAMA
+[LDO_ENABLE_CONFIGURABLE2]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL2]
+1.5
+1.8
+2.5
+2.8
+[SlEEP_VOLTAGE_CONFIGURABLE2]
+CONFIGURABLE = NO
+
+[LDO_NAME3]
+LDO_NAME=VSIM
+[LDO_ENABLE_CONFIGURABLE3]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL3]
+1.8
+3.0
+[SlEEP_VOLTAGE_CONFIGURABLE3]
+CONFIGURABLE = NO
+
+[LDO_NAME4]
+LDO_NAME=VSIM2
+[LDO_ENABLE_CONFIGURABLE4]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL4]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE4]
+CONFIGURABLE = NO
+
+[LDO_NAME5]
+LDO_NAME=VCAMD
+[LDO_ENABLE_CONFIGURABLE5]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL5]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE5]
+CONFIGURABLE = NO
+
+[LDO_NAME6]
+LDO_NAME=VBT
+[LDO_ENABLE_CONFIGURABLE6]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL6]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE6]
+CONFIGURABLE = NO
+
+[LDO_NAME7]
+LDO_NAME=VIBR
+[LDO_ENABLE_CONFIGURABLE7]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL7]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE7]
+CONFIGURABLE = NO
+
+[LDO_NAME8]
+LDO_NAME=VMC
+[LDO_ENABLE_CONFIGURABLE8]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL8]
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE8]
+CONFIGURABLE = NO
+
+
+[pmic_drv.h_HEADER]
+#include "dcl.h"
+
+[pmic_drv.h_TAILER]
+
+[pmic_drv.c_HEADER]
+#include "dcl.h"
+#include "pmic_drv.h"
+
+[pmic_drv.c_TAILER]
+//end of pmic_drv
\ No newline at end of file
diff --git a/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6276MPMUNONMP.cmp b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6276MPMUNONMP.cmp
new file mode 100644
index 0000000..ad15ce3
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6276MPMUNONMP.cmp
@@ -0,0 +1,185 @@
+[PMIC_TABLE]
+NUM_LDO = 13
+
+[LDO_NAME1]
+LDO_NAME=VRF
+[CONFIGURABLE1]
+CONFIG=NO
+[LDO_VOLTAGE_SEL1]
+2.85
+[LDO_VOLTAGE_CAL1]
+CAL_STEP=20
+
+[LDO_NAME2]
+LDO_NAME=VTCXO
+[CONFIGURABLE2]
+CONFIG=NO
+[LDO_VOLTAGE_SEL2]
+2.75
+[LDO_VOLTAGE_CAL2]
+CAL_STEP=20
+
+[LDO_NAME3]
+LDO_NAME=VCAMA
+[CONFIGURABLE3]
+CONFIG=YES
+[LDO_VOLTAGE_SEL3]
+1.5
+1.8
+2.5
+2.8
+[LDO_VOLTAGE_CAL3]
+CAL_STEP=20
+
+[LDO_NAME4]
+LDO_NAME=VCAMD
+[CONFIGURABLE4]
+CONFIG=YES
+[LDO_VOLTAGE_SEL4]
+1.3
+1.5
+1.8
+2.5
+2.8
+3
+3.3
+[LDO_VOLTAGE_CAL4]
+CAL_STEP=20
+
+
+[LDO_NAME5]
+LDO_NAME=VUSB
+[CONFIGURABLE5]
+CONFIG=NO
+[LDO_VOLTAGE_SEL5]
+3.3
+[LDO_VOLTAGE_CAL5]
+CAL_STEP=20
+[INTERNAL_USE5]
+INTERNAL = YES
+[INTERNAL_CAL_LEVEL5]
+INT_CAL_LEVEL = 0
+[INTERNAL_APPLICATION5]
+INT_APPLICATION=USB
+[INTERNAL_VOLT_SEL5]
+INT_VOLT_SEL = 3.3
+
+[LDO_NAME6]
+LDO_NAME=VBT
+[CONFIGURABLE6]
+CONFIG=YES
+[LDO_VOLTAGE_SEL6]
+1.5
+1.8
+2.5
+2.8
+3.1
+3
+3.3
+[LDO_VOLTAGE_CAL6]
+CAL_STEP=20
+
+[LDO_NAME7]
+LDO_NAME=VSIM
+[CONFIGURABLE7]
+CONFIG=YES
+[LDO_VOLTAGE_SEL7]
+1.8
+3
+[LDO_VOLTAGE_CAL7]
+CAL_STEP=20
+
+[LDO_NAME8]
+LDO_NAME=VSIM2
+[CONFIGURABLE8]
+CONFIG=YES
+[LDO_VOLTAGE_SEL8]
+1.3
+1.5
+1.8
+2.5
+2.8
+3
+3.3
+[LDO_VOLTAGE_CAL8]
+CAL_STEP=20
+
+[LDO_NAME9]
+LDO_NAME=VIBR
+[CONFIGURABLE9]
+CONFIG=YES
+[LDO_VOLTAGE_SEL9]
+1.3
+1.5
+1.8
+2.5
+2.8
+3
+3.3
+[LDO_VOLTAGE_CAL9]
+CAL_STEP=20
+
+[LDO_NAME10]
+LDO_NAME=VMC
+[CONFIGURABLE10]
+CONFIG=YES
+[LDO_VOLTAGE_SEL10]
+1.3
+1.5
+1.8
+2.5
+2.8
+3
+3.3
+[LDO_VOLTAGE_CAL10]
+CAL_STEP=20
+
+[LDO_NAME11]
+LDO_NAME=VCAMA2
+[CONFIGURABLE11]
+CONFIG=YES
+[LDO_VOLTAGE_SEL11]
+1.5
+1.8
+2.5
+2.8
+[LDO_VOLTAGE_CAL11]
+CAL_STEP=20
+
+[LDO_NAME12]
+LDO_NAME=VCAMD2
+[CONFIGURABLE12]
+CONFIG=YES
+[LDO_VOLTAGE_SEL12]
+1.3
+1.5
+1.8
+2.5
+2.8
+3
+3.3
+[LDO_VOLTAGE_CAL12]
+CAL_STEP=20
+
+[LDO_NAME13]
+LDO_NAME=VFM
+[CONFIGURABLE13]
+CONFIG=YES
+[LDO_VOLTAGE_SEL13]
+2.8
+[LDO_VOLTAGE_CAL13]
+CAL_STEP=20
+
+[pmic_drv.h_HEADER]
+#ifndef _PMIC_DRV_H
+#define _PMIC_DRV_H
+
+[pmic_drv.h_TAILER]
+#endif /* _PMIC_DRV_H */
+
+[pmic_drv.c_HEADER]
+#ifdef __CUST_NEW__
+#include "pmic_drv.h"
+
+[pmic_drv.c_TAILER]
+#endif /* __CUST_NEW__ */
diff --git a/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6276PMUNONMP.cmp b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6276PMUNONMP.cmp
new file mode 100644
index 0000000..ad15ce3
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6276PMUNONMP.cmp
@@ -0,0 +1,185 @@
+[PMIC_TABLE]
+NUM_LDO = 13
+
+[LDO_NAME1]
+LDO_NAME=VRF
+[CONFIGURABLE1]
+CONFIG=NO
+[LDO_VOLTAGE_SEL1]
+2.85
+[LDO_VOLTAGE_CAL1]
+CAL_STEP=20
+
+[LDO_NAME2]
+LDO_NAME=VTCXO
+[CONFIGURABLE2]
+CONFIG=NO
+[LDO_VOLTAGE_SEL2]
+2.75
+[LDO_VOLTAGE_CAL2]
+CAL_STEP=20
+
+[LDO_NAME3]
+LDO_NAME=VCAMA
+[CONFIGURABLE3]
+CONFIG=YES
+[LDO_VOLTAGE_SEL3]
+1.5
+1.8
+2.5
+2.8
+[LDO_VOLTAGE_CAL3]
+CAL_STEP=20
+
+[LDO_NAME4]
+LDO_NAME=VCAMD
+[CONFIGURABLE4]
+CONFIG=YES
+[LDO_VOLTAGE_SEL4]
+1.3
+1.5
+1.8
+2.5
+2.8
+3
+3.3
+[LDO_VOLTAGE_CAL4]
+CAL_STEP=20
+
+
+[LDO_NAME5]
+LDO_NAME=VUSB
+[CONFIGURABLE5]
+CONFIG=NO
+[LDO_VOLTAGE_SEL5]
+3.3
+[LDO_VOLTAGE_CAL5]
+CAL_STEP=20
+[INTERNAL_USE5]
+INTERNAL = YES
+[INTERNAL_CAL_LEVEL5]
+INT_CAL_LEVEL = 0
+[INTERNAL_APPLICATION5]
+INT_APPLICATION=USB
+[INTERNAL_VOLT_SEL5]
+INT_VOLT_SEL = 3.3
+
+[LDO_NAME6]
+LDO_NAME=VBT
+[CONFIGURABLE6]
+CONFIG=YES
+[LDO_VOLTAGE_SEL6]
+1.5
+1.8
+2.5
+2.8
+3.1
+3
+3.3
+[LDO_VOLTAGE_CAL6]
+CAL_STEP=20
+
+[LDO_NAME7]
+LDO_NAME=VSIM
+[CONFIGURABLE7]
+CONFIG=YES
+[LDO_VOLTAGE_SEL7]
+1.8
+3
+[LDO_VOLTAGE_CAL7]
+CAL_STEP=20
+
+[LDO_NAME8]
+LDO_NAME=VSIM2
+[CONFIGURABLE8]
+CONFIG=YES
+[LDO_VOLTAGE_SEL8]
+1.3
+1.5
+1.8
+2.5
+2.8
+3
+3.3
+[LDO_VOLTAGE_CAL8]
+CAL_STEP=20
+
+[LDO_NAME9]
+LDO_NAME=VIBR
+[CONFIGURABLE9]
+CONFIG=YES
+[LDO_VOLTAGE_SEL9]
+1.3
+1.5
+1.8
+2.5
+2.8
+3
+3.3
+[LDO_VOLTAGE_CAL9]
+CAL_STEP=20
+
+[LDO_NAME10]
+LDO_NAME=VMC
+[CONFIGURABLE10]
+CONFIG=YES
+[LDO_VOLTAGE_SEL10]
+1.3
+1.5
+1.8
+2.5
+2.8
+3
+3.3
+[LDO_VOLTAGE_CAL10]
+CAL_STEP=20
+
+[LDO_NAME11]
+LDO_NAME=VCAMA2
+[CONFIGURABLE11]
+CONFIG=YES
+[LDO_VOLTAGE_SEL11]
+1.5
+1.8
+2.5
+2.8
+[LDO_VOLTAGE_CAL11]
+CAL_STEP=20
+
+[LDO_NAME12]
+LDO_NAME=VCAMD2
+[CONFIGURABLE12]
+CONFIG=YES
+[LDO_VOLTAGE_SEL12]
+1.3
+1.5
+1.8
+2.5
+2.8
+3
+3.3
+[LDO_VOLTAGE_CAL12]
+CAL_STEP=20
+
+[LDO_NAME13]
+LDO_NAME=VFM
+[CONFIGURABLE13]
+CONFIG=YES
+[LDO_VOLTAGE_SEL13]
+2.8
+[LDO_VOLTAGE_CAL13]
+CAL_STEP=20
+
+[pmic_drv.h_HEADER]
+#ifndef _PMIC_DRV_H
+#define _PMIC_DRV_H
+
+[pmic_drv.h_TAILER]
+#endif /* _PMIC_DRV_H */
+
+[pmic_drv.c_HEADER]
+#ifdef __CUST_NEW__
+#include "pmic_drv.h"
+
+[pmic_drv.c_TAILER]
+#endif /* __CUST_NEW__ */
diff --git a/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6327PMUMP.cmp b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6327PMUMP.cmp
new file mode 100644
index 0000000..00f93d8
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6327PMUMP.cmp
@@ -0,0 +1,36 @@
+[PMIC_TABLE]
+NUM_LDO = 2
+
+[LDO_NAME1]
+LDO_NAME=VSIM
+[LDO_ENABLE_CONFIGURABLE1]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL1]
+1.8
+3.0
+[SlEEP_VOLTAGE_CONFIGURABLE1]
+CONFIGURABLE = NO
+
+[LDO_NAME2]
+LDO_NAME=VMC
+[LDO_ENABLE_CONFIGURABLE2]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL2]
+2.8
+3.0
+3.1
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE2]
+CONFIGURABLE = NO
+
+[pmic_drv.h_HEADER]
+#include "dcl.h"
+
+[pmic_drv.h_TAILER]
+
+[pmic_drv.c_HEADER]
+#include "dcl.h"
+#include "pmic_drv.h"
+
+[pmic_drv.c_TAILER]
+//end of pmic_drv
diff --git a/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6339PMUMP.cmp b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6339PMUMP.cmp
new file mode 100644
index 0000000..0f3b0ac
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/PMIC_MT6339PMUMP.cmp
@@ -0,0 +1,95 @@
+[PMIC_TABLE]
+NUM_LDO = 5
+
+[LDO_NAME1]
+LDO_NAME=VMC
+[LDO_ENABLE_CONFIGURABLE1]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL1]
+1.2
+1.3
+1.5
+1.8
+2.0
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE1]
+CONFIGURABLE = NO
+
+[LDO_NAME2]
+LDO_NAME=VMCH
+[LDO_ENABLE_CONFIGURABLE2]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL2]
+1.2
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE2]
+CONFIGURABLE = NO
+
+[LDO_NAME3]
+LDO_NAME=VSIM
+[LDO_ENABLE_CONFIGURABLE3]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL3]
+1.2
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE3]
+CONFIGURABLE = NO
+
+
+[LDO_NAME4]
+LDO_NAME=VSIM2
+[LDO_ENABLE_CONFIGURABLE4]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL4]
+1.2
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE4]
+CONFIGURABLE = NO
+
+[LDO_NAME5]
+LDO_NAME=VIO28
+[LDO_ENABLE_CONFIGURABLE5]
+CONFIGURABLE = YES
+[LDO_VOLTAGE_SEL5]
+1.2
+1.3
+1.5
+1.8
+2.5
+2.8
+3.0
+3.3
+[SlEEP_VOLTAGE_CONFIGURABLE5]
+CONFIGURABLE = NO
+
+[pmic_drv.h_HEADER]
+#include "dcl.h"
+
+[pmic_drv.h_TAILER]
+
+[pmic_drv.c_HEADER]
+#include "dcl.h"
+#include "pmic_drv.h"
+
+[pmic_drv.c_TAILER]
+//end of pmic_drv
diff --git a/mcu/custom/driver/drv/Drv_Tool/PMIC_NC.cmp b/mcu/custom/driver/drv/Drv_Tool/PMIC_NC.cmp
new file mode 100644
index 0000000..a300c6f
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/PMIC_NC.cmp
@@ -0,0 +1,18 @@
+[PMIC_TABLE]
+NUM_LDO = 0
+
+
+[pmic_drv.h_HEADER]
+#ifndef _PMIC_DRV_H
+#define _PMIC_DRV_H
+
+[pmic_drv.h_TAILER]
+#endif /* _PMIC_DRV_H */
+
+[pmic_drv.c_HEADER]
+#ifdef __CUST_NEW__
+#include "pmic_drv.h"
+#include "dcl.h"
+
+[pmic_drv.c_TAILER]
+#endif /* __CUST_NEW__ */
diff --git a/mcu/custom/driver/drv/Drv_Tool/PMIC_NCPMU.cmp b/mcu/custom/driver/drv/Drv_Tool/PMIC_NCPMU.cmp
new file mode 100644
index 0000000..a300c6f
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/PMIC_NCPMU.cmp
@@ -0,0 +1,18 @@
+[PMIC_TABLE]
+NUM_LDO = 0
+
+
+[pmic_drv.h_HEADER]
+#ifndef _PMIC_DRV_H
+#define _PMIC_DRV_H
+
+[pmic_drv.h_TAILER]
+#endif /* _PMIC_DRV_H */
+
+[pmic_drv.c_HEADER]
+#ifdef __CUST_NEW__
+#include "pmic_drv.h"
+#include "dcl.h"
+
+[pmic_drv.c_TAILER]
+#endif /* __CUST_NEW__ */
diff --git a/mcu/custom/driver/drv/Drv_Tool/TK6280.fig b/mcu/custom/driver/drv/Drv_Tool/TK6280.fig
new file mode 100644
index 0000000..2c028f9
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/TK6280.fig
@@ -0,0 +1,63 @@
+[Chip Type]
+Chip = TK6280
+GPIO_ModeNum = 4
+GPIO_Pull_Sel=1
+PMIC_Config=0
+PMIC_Volt_Format = 1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(EINT3) MODE2() MODE3() PD
+GPIO1 = MODE0(GPIO1) MODE1(EINT2) MODE2() MODE3() PD
+GPIO2 = MODE0(GPIO2) MODE1() MODE2(USB_DRVVBUS) MODE3(DEBUG0) PD
+GPIO3 = MODE0(GPIO3) MODE1() MODE2(CLKM0) MODE3(DEBUG1) PD
+GPIO4 = MODE0(GPIO4) MODE1() MODE2(CLKM1) MODE3(DEBUG2) PD
+GPIO5 = MODE0(GPIO5) MODE1() MODE2(CLKM2) MODE3(DEBUG3) PD
+GPIO6 = MODE0(GPIO6) MODE1() MODE2(CLKM3) MODE3(DEBUG4) PD
+GPIO7 = MODE0(GPIO7) MODE1() MODE2(CLKM4) MODE3(DEBUG5) PD
+GPIO8 = MODE0(GPIO8) MODE1() MODE2(CLKM5) MODE3(DEBUG6) PD
+GPIO9 = MODE0(GPIO9) MODE1() MODE2() MODE3(DEBUG7) PD
+GPIO10 = MODE0(GPIO10) MODE1(FPGA_IRQ30_B) MODE2() MODE3() PD
+GPIO11 = MODE0(GPIO11) MODE1(FPGA_IRQ29_B) MODE2() MODE3() PD
+GPIO12 = MODE0(GPIO12) MODE1(FPGA_IRQ28_B) MODE2() MODE3() PD
+GPIO13 = MODE0(GPIO13) MODE1(FPGA_IRQ27_B) MODE2() MODE3() PD
+GPIO14 = MODE0(GPIO14) MODE1(FPGA_IRQ26_B) MODE2() MODE3() PD
+GPIO15 = MODE0(GPIO15) MODE1(FPGA_IRQ25_B) MODE2() MODE3() PD
+GPIO16 = MODE0(GPIO16) MODE1(FPGA_IRQ24_B) MODE2() MODE3() PD
+GPIO17 = MODE0(GPIO17) MODE1(FPGA_IRQ23_B) MODE2() MODE3() PD
+GPIO18 = MODE0(GPIO18) MODE1(FPGA_IRQ22_B) MODE2() MODE3() PD
+GPIO19 = MODE0(GPIO19) MODE1(FPGA_IRQ21_B) MODE2() MODE3() PD
+GPIO20 = MODE0(GPIO20) MODE1(FPGA_IRQ20_B) MODE2() MODE3() PD
+GPIO21 = MODE0(GPIO21) MODE1(FPGA_IRQ19_B) MODE2() MODE3() PD
+GPIO22 = MODE0(GPIO22) MODE1(FPGA_IRQ18_B) MODE2() MODE3() PD
+GPIO23 = MODE0(GPIO23) MODE1(FPGA_IRQ17_B) MODE2() MODE3() PD
+GPIO24 = MODE0(GPIO24) MODE1(FPGA_IRQ16_B) MODE2() MODE3() PD
+GPIO25 = MODE0(GPIO25) MODE1(FPGA_IRQ15_B) MODE2() MODE3() PD
+GPIO26 = MODE0(GPIO26) MODE1(FPGA_IRQ14_B) MODE2() MODE3() PD
+GPIO27 = MODE0(GPIO27) MODE1(NCE1_B) MODE2(LPECS2_B) MODE3() PD
+
+
+[GPO]
+
+[EINT]
+EINT_COUNT=4
+EINT_DEBOUNCE_TIME_COUNT=4
+
+[EINT_EX_PIN]
+0
+1
+2
+3
+
+[EINT_INT_PIN]
+
+
+[ADC]
+ADC_COUNT = 1
+
+[ADC_INT_CH]
+
+[ADC_EX_CH]
+
+[KEYPAD]
+KEY_ROW=8
+KEY_COLUMN=9
\ No newline at end of file
diff --git a/mcu/custom/driver/drv/Drv_Tool/TK6516.fig b/mcu/custom/driver/drv/Drv_Tool/TK6516.fig
new file mode 100644
index 0000000..476b277
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/TK6516.fig
@@ -0,0 +1,22 @@
+[Chip Type]
+Chip = TK6516
+GPIO_Pull_Sel=1
+
+[GPIO]
+GPIO0 = MODE0(GPIO0) MODE1(BPI_BUS6) MODE2() MODE3() PUPD
+GPIO1 = MODE0(GPIO1) MODE1(BPI_BUS7) MODE2() MODE3() PUPD
+GPIO2 = MODE0(GPIO2) MODE1(BPI_BUS8) MODE2() MODE3() PUPD
+GPIO3 = MODE0(GPIO3) MODE1(BPI_BUS9) MODE2() MODE3() PUPD
+
+[GPO]
+
+[EINT]
+EINT_COUNT=24
+EINT_DEBOUNE_TIME_COUNT=24
+
+[ADC]
+ADC_COUNT=7
+
+[KEYPAD]
+KEY_ROW=0
+KEY_COLUMN=0
diff --git a/mcu/custom/driver/drv/Drv_Tool/UEM.cmp b/mcu/custom/driver/drv/Drv_Tool/UEM.cmp
new file mode 100644
index 0000000..0a45a0e
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/UEM.cmp
@@ -0,0 +1,13 @@
+[UEM]
+MAX_NETNAME_TEXT = 32
+
+[uem_drv.c_HEADER]
+#ifdef __CUST_NEW__
+#include "kal_public_api.h"
+#include "gpio_drv.h"
+#include "custom_em.h"
+#include "custom_equipment.h"
+
+
+[uem_drv.c_TAILER]
+#endif /* __CUST_NEW__ */
diff --git a/mcu/custom/driver/drv/Drv_Tool/iomux.cmp b/mcu/custom/driver/drv/Drv_Tool/iomux.cmp
new file mode 100644
index 0000000..ddb3d88
--- /dev/null
+++ b/mcu/custom/driver/drv/Drv_Tool/iomux.cmp
@@ -0,0 +1,2 @@
+[iomux_drv.c_HEADER]
+#include "iomux_drv.h"
diff --git a/mcu/custom/driver/drv/misc_drv/MT2735_IVT/DEFAULT/temp.txt b/mcu/custom/driver/drv/misc_drv/MT2735_IVT/DEFAULT/temp.txt
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/MT2735_IVT/DEFAULT/temp.txt
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/MT6302_custom.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/MT6302_custom.c
new file mode 100644
index 0000000..3301ba8
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/MT6302_custom.c
@@ -0,0 +1,439 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * MT6302_interface.C
+ *
+ * Project:
+ * --------
+ * Gemini
+ *
+ * Description:
+ * ------------
+ * this file is custom implementation of MT6302 SPI interface
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#include "drv_comm.h"
+#include "gpio_sw.h"
+#include "MT6302_spi.h"
+#include "MT6302_custom.h"
+#include "kal_public_api.h"
+
+#ifndef __CUST_NEW__
+kal_uint8 gpio_MT6302_cs_pin=32;
+kal_uint8 gpio_MT6302_clk_pin=29;
+kal_uint8 gpio_MT6302_dat_pin=31;
+
+//for gemini plus 2rd 6302 spi pins
+kal_uint8 gpio_MT6302_cs2_pin=32;
+kal_uint8 gpio_MT6302_clk2_pin=29;
+kal_uint8 gpio_MT6302_dat2_pin=31;
+#else
+extern const char gpio_MT6302_cs_pin;
+extern const char gpio_MT6302_clk_pin;
+extern const char gpio_MT6302_dat_pin;
+
+//for gemini plus 2rd 6302 spi pins
+extern const char gpio_MT6302_cs2_pin;
+extern const char gpio_MT6302_clk2_pin;
+extern const char gpio_MT6302_dat2_pin;
+#endif
+
+/*
+* FUNCTION
+* MT6302_getLCDSerialInterface
+*
+* DESCRIPTION
+* This function is to return which LCD serial interface we use to implement SPI
+* If customer doesn't use LCD interface, this function should return 0xff
+*
+* CALLS
+*
+* PARAMETERS
+* none
+*
+* RETURNS
+* 0~maximum number of serial interface BB has: the interface we use
+* 0xff: customer doesn't use LCD interface to implement SPI
+*
+*/
+kal_uint32 MT6302_getLCDSerialInterface(kal_uint32 MT6302Interface)
+{
+/* dual SIMIF dual SIM solution doesn't need this
+ if(0 == MT6302Interface){
+ return 1;
+ }
+ else
+*/
+ {
+ ASSERT(0);
+ return 0;
+ }
+}
+
+
+/*
+* FUNCTION
+* MT6302_getSPIInterface
+*
+* DESCRIPTION
+* This function is to return which method do we use to implement SPI interface
+*
+* CALLS
+*
+* PARAMETERS
+* none
+*
+* RETURNS
+* 0: use LCD serial interface
+* 1: use GPIO
+*
+* GLOBALS AFFECTED
+* external_global
+*/
+kal_uint32 MT6302_getSPIInterface(kal_uint32 MT6302Interface)
+{
+/* dual SIMIF dual SIM solution doesn't need this
+ if(0 == MT6302Interface)
+ return MT6302_SPI_USE_LCD; //MT6302_SPI_USE_LCD
+ else if(1 == MT6302Interface)
+ return MT6302_SPI_USE_DEDICATED_GPIO;
+ else
+*/
+ ASSERT(0);
+ //return MT6302_SPI_USE_LCD;
+ //return MT6302_SPI_USE_GPIO;
+ //return MT6302_SPI_USE_DEDICATED_GPIO;
+ return 0;
+}
+
+
+/*
+* FUNCTION
+* MT6302_checkSPIMode
+*
+* DESCRIPTION
+* This function is check the SPI 3 pins are in correct mode, no matter use LCD or GPIO to implement
+* customer should add its check code here, or just return kal_true in case they don't want to protect
+*
+* CALLS
+*
+* PARAMETERS
+* none
+*
+* RETURNS
+* kal_true: control pins are all in correct mode
+* kal_false: control pins are not in correct mode
+*
+*/
+kal_bool MT6302_checkSPIMode(kal_uint32 MT6302Interface)
+{
+/* dual SIMIF dual SIM solution doesn't need this
+ if(MT6302Interface == 0)
+ {
+ if(MT6302_SPI_USE_LCD == MT6302_getSPIInterface(MT6302Interface))
+ {
+ //16 is SPI clk, 18 is SPI dat, 20 is SPI cs
+ //14 is SPI clk, 16 is SPI dat, 18 is SPI cs in MT6238
+ if(1 != GPIO_ReturnMode(46) || 1 != GPIO_ReturnMode(39) || 1 != GPIO_ReturnMode(40))
+ return KAL_FALSE;
+ else
+ return KAL_TRUE;
+ }
+ else if(MT6302_SPI_USE_GPIO == MT6302_getSPIInterface(MT6302Interface) || MT6302_SPI_USE_DEDICATED_GPIO == MT6302_getSPIInterface(MT6302Interface))
+ {
+ if(0 != GPIO_ReturnMode(MT6302_CS_GPIO_NO) || \
+ 0 != GPIO_ReturnMode(MT6302_CLK_GPIO_NO) || \
+ 0 != GPIO_ReturnMode(MT6302_DAT_GPIO_NO) || \
+ 1 != GPIO_ReturnDir(MT6302_CS_GPIO_NO) || \
+ 1 != GPIO_ReturnDir(MT6302_CLK_GPIO_NO) || \
+ 1 != GPIO_ReturnDir(MT6302_DAT_GPIO_NO) || \
+ 1 != GPIO_ReturnDout(MT6302_CS_GPIO_NO) || \
+ 0 != GPIO_ReturnDout(MT6302_CLK_GPIO_NO) || \
+ 0 != GPIO_ReturnDout(MT6302_DAT_GPIO_NO))
+ return KAL_FALSE;
+ else
+ return KAL_TRUE;
+ }
+ }
+ else if(MT6302Interface == 1)
+ {
+ if(MT6302_SPI_USE_LCD == MT6302_getSPIInterface(MT6302Interface))
+ {
+ //16 is SPI clk, 18 is SPI dat, 20 is SPI cs
+ //14 is SPI clk, 16 is SPI dat, 18 is SPI cs in MT6238
+ if(1 != GPIO_ReturnMode(46) || 1 != GPIO_ReturnMode(39) || 1 != GPIO_ReturnMode(40))
+ return KAL_FALSE;
+ else
+ return KAL_TRUE;
+ }
+ else if(MT6302_SPI_USE_GPIO == MT6302_getSPIInterface(MT6302Interface) || MT6302_SPI_USE_DEDICATED_GPIO == MT6302_getSPIInterface(MT6302Interface))
+ {
+ //if(0 != GPIO_ReturnMode(MT6302_CS2_GPIO_NO) || \
+ //0 != GPIO_ReturnMode(MT6302_CLK2_GPIO_NO) || \
+ //0 != GPIO_ReturnMode(MT6302_DAT2_GPIO_NO) || \
+ //1 != GPIO_ReturnDir(MT6302_CS2_GPIO_NO) || \
+ //1 != GPIO_ReturnDir(MT6302_CLK2_GPIO_NO) || \
+ //1 != GPIO_ReturnDir(MT6302_DAT2_GPIO_NO) || \
+ //1 != GPIO_ReturnDout(MT6302_CS2_GPIO_NO) || \
+ //0 != GPIO_ReturnDout(MT6302_CLK2_GPIO_NO) || \
+ //0 != GPIO_ReturnDout(MT6302_DAT2_GPIO_NO))
+ // return KAL_FALSE;
+ //else
+ // return KAL_TRUE;
+ ASSERT(0);
+ }
+ }
+ else
+*/
+ ASSERT(0);
+ return KAL_FALSE;
+}
+
+
+
+/*
+* FUNCTION
+* MT6302_getGPIOCLK
+*
+* DESCRIPTION
+* This function is to return which GPIO we use to implement SPI CLK
+* If customer doesn't GPIO to implement SPI, this function should return 0xff
+* This function is only work when customer used GPIO to implement SPI and CUSTOM_NEW is not defined.
+*
+* CALLS
+*
+* PARAMETERS
+* none
+*
+* RETURNS
+* 0~maximum number of GPIO BB has: the GPIO we use
+* 0xff: customer doesn't use GPIO to implement SPI CLK
+*
+*/
+kal_uint32 MT6302_getGPIOCLK(kal_uint32 MT6302Interface)
+{
+/* dual SIMIF dual SIM solution doesn't need this
+ //return 0xff;
+ if(0 == MT6302Interface)
+ return MT6302_CLK_GPIO_NO;
+ else if(1 == MT6302Interface){
+ //return MT6302_CLK2_GPIO_NO;
+ ASSERT(0);
+ }
+ else
+*/
+ ASSERT(0);
+ return 0;
+}
+
+/*
+* FUNCTION
+* MT6302_getGPIOCLK
+*
+* DESCRIPTION
+* This function is to return which GPIO we use to implement SPI CLK
+* If customer doesn't GPIO to implement SPI, this function should return 0xff
+* This function is only work when customer used GPIO to implement SPI and CUSTOM_NEW is not defined.
+*
+* CALLS
+*
+* PARAMETERS
+* none
+*
+* RETURNS
+* 0~maximum number of GPIO BB has: the GPIO we use
+* 0xff: customer doesn't use GPIO to implement SPI CLK
+*
+*/
+kal_uint32 MT6302_getGPIOCS(kal_uint32 MT6302Interface)
+{
+/* dual SIMIF dual SIM solution doesn't need this
+ //return 0xff;
+ if(0 == MT6302Interface)
+ return MT6302_CS_GPIO_NO;
+ else if(1 == MT6302Interface){
+ //return MT6302_CS2_GPIO_NO;
+ ASSERT(0);
+ }
+ else
+*/
+ ASSERT(0);
+ return 0;
+}
+
+/*
+* FUNCTION
+* MT6302_getGPIOCLK
+*
+* DESCRIPTION
+* This function is to return which GPIO we use to implement SPI CLK
+* If customer doesn't GPIO to implement SPI, this function should return 0xff
+* This function is only work when customer used GPIO to implement SPI and CUSTOM_NEW is not defined.
+*
+* CALLS
+*
+* PARAMETERS
+* none
+*
+* RETURNS
+* 0~maximum number of GPIO BB has: the GPIO we use
+* 0xff: customer doesn't use GPIO to implement SPI CLK
+*
+*/
+kal_uint32 MT6302_getGPIODAT(kal_uint32 MT6302Interface)
+{
+/* dual SIMIF dual SIM solution doesn't need this
+ //return 0xff;
+ if(0 == MT6302Interface)
+ return MT6302_DAT_GPIO_NO;
+ else if(1 == MT6302Interface){
+ //return MT6302_DAT2_GPIO_NO;
+ ASSERT(0);
+ }
+ else
+*/
+ ASSERT(0);
+ return 0;
+}
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/MT6302_custom.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/MT6302_custom.h
new file mode 100644
index 0000000..77b1877
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/MT6302_custom.h
@@ -0,0 +1,134 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * MT6302_custom.h
+ *
+ * Project:
+ * --------
+ * Gemini
+ *
+ * Description:
+ * ------------
+ * this file is the header file of MT6302 custom control
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef __MT6302_CUSTOM_H__
+#define __MT6302_CUSTOM_H__
+
+#ifndef __CUST_NEW__
+extern kal_uint8 gpio_MT6302_cs_pin;
+extern kal_uint8 gpio_MT6302_clk_pin;
+extern kal_uint8 gpio_MT6302_dat_pin;
+#else
+extern const char gpio_MT6302_cs_pin;
+extern const char gpio_MT6302_clk_pin;
+extern const char gpio_MT6302_dat_pin;
+#endif
+
+#define MT6302_CS_GPIO_NO gpio_MT6302_cs_pin
+#define MT6302_CLK_GPIO_NO gpio_MT6302_clk_pin
+#define MT6302_DAT_GPIO_NO gpio_MT6302_dat_pin
+
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/MT6306_custom.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/MT6306_custom.c
new file mode 100644
index 0000000..f7a9b39
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/MT6306_custom.c
@@ -0,0 +1,321 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * MT6302_interface.C
+ *
+ * Project:
+ * --------
+ * Gemini
+ *
+ * Description:
+ * ------------
+ * this file is custom implementation of MT6302 SPI interface
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
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+ *
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+ * removed!
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+ * removed!
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+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#include "drv_comm.h"
+//#include "gpio_sw.h"
+#include "mt6306_i2c.h"
+#include "mt6306_custom.h"
+#include "kal_public_api.h"
+
+extern const char gpio_sim_switch_clk_pin;
+extern const char gpio_sim_switch_dat_pin;
+
+/*
+* FUNCTION
+* MT6306_geti2cInterface
+*
+* DESCRIPTION
+* This function is to return which method do we use to implement SPI interface
+*
+* CALLS
+*
+* PARAMETERS
+* none
+*
+* RETURNS
+* 0: use LCD serial interface
+* 1: use GPIO
+*
+* GLOBALS AFFECTED
+* external_global
+*/
+kal_uint32 MT6306_geti2cInterface(kal_uint32 MT6306Interface)
+{
+ return MT6306_I2C_USE_HW_I2C;
+}
+
+
+/*
+* FUNCTION
+* MT6306_checkSPIMode
+*
+* DESCRIPTION
+* This function is check the SPI 3 pins are in correct mode, no matter use LCD or GPIO to implement
+* customer should add its check code here, or just return kal_true in case they don't want to protect
+*
+* CALLS
+*
+* PARAMETERS
+* none
+*
+* RETURNS
+* kal_true: control pins are all in correct mode
+* kal_false: control pins are not in correct mode
+*
+*/
+kal_bool MT6306_checki2cMode(kal_uint32 MT6306Interface)
+{
+ return KAL_TRUE;
+}
+
+
+
+/*
+* FUNCTION
+* MT6306_getGPIOCLK
+*
+* DESCRIPTION
+* This function is to return which GPIO we use to implement SPI CLK
+* If customer doesn't GPIO to implement SPI, this function should return 0xff
+* This function is only work when customer used GPIO to implement SPI and CUSTOM_NEW is not defined.
+*
+* CALLS
+*
+* PARAMETERS
+* none
+*
+* RETURNS
+* 0~maximum number of GPIO BB has: the GPIO we use
+* 0xff: customer doesn't use GPIO to implement SPI CLK
+*
+*/
+kal_uint32 MT6306_getGPIOCLK(void)
+{
+ return 43;
+}
+
+/*
+* FUNCTION
+* MT6306_getGPIODAT
+*
+* DESCRIPTION
+* This function is to return which GPIO we use to implement SPI dAT
+* If customer doesn't GPIO to implement SPI, this function should return 0xff
+* This function is only work when customer used GPIO to implement SPI and CUSTOM_NEW is not defined.
+*
+* CALLS
+*
+* PARAMETERS
+* none
+*
+* RETURNS
+* 0~maximum number of GPIO BB has: the GPIO we use
+* 0xff: customer doesn't use GPIO to implement SPI CLK
+*
+*/
+kal_uint32 MT6306_getGPIODAT(void)
+{
+ return 44;
+}
+kal_uint8 MT6306_getDeviceAddr(void)
+{
+ return 0x64;
+}
+kal_uint32 MT6306_getVIOLevel()
+{
+ return MT6306_VIO_1V8;
+// return MT6306_VIO_2V8;
+}
+
+kal_bool MT6306_disable_SIM_HOT_SWAP_feature(void)
+{
+ //return KAL_FALSE;
+
+ // MTK internal test
+ return KAL_TRUE;
+}
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/adc_channel.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/adc_channel.c
new file mode 100644
index 0000000..4a4bf0c
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/adc_channel.c
@@ -0,0 +1,227 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * uart_def.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This Module defines ADC channel.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
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+ * removed!
+ * removed!
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+ *
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+ * removed!
+ * removed!
+ * removed!
+ *
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+ * removed!
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+ * removed!
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+ * removed!
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+ * removed!
+ * removed!
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+ * removed!
+ * removed!
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+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+//MSBB remove #include "kal_non_specific_general_types.h"
+
+#ifndef __CUST_NEW__
+#include "kal_general_types.h"
+
+const kal_uint8 ADC_VBAT = 0;
+const kal_uint8 ADC_VBATTMP = 3; // Note::: Not used in MT6268A
+const kal_uint8 ADC_VISENSE = 1;
+const kal_uint8 ADC_ACCESSORYID = 4;
+const kal_uint8 ADC_VCHARGER = 2;
+const kal_uint8 ADC_PCBTMP = 6;
+const kal_uint8 ADC_CHR_USB = 3; // adc to distinguish between charger with usb
+const kal_uint8 ADC_OTG_VBUS = 6;
+const kal_uint8 ADC_RFTMP=5;
+#endif /* __CUST_NEW__ */
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/adc_channel.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/adc_channel.h
new file mode 100644
index 0000000..57e6393
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/adc_channel.h
@@ -0,0 +1,274 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * adc_channel.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is intends for GPT driver.
+ *
+ * Author:
+ * -------
+ * -------
+ * -------
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
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+ *
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+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
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+ * removed!
+ * removed!
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+ * removed!
+ * removed!
+ * removed!
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+ * removed!
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+ * removed!
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+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef _ADC_CHANNEL_H
+#define _ADC_CHANNEL_H
+
+/*voltage to temperature*/
+#define ADC_TEMP_T1 0*1000000 /*0C*/
+#define ADC_TEMP_T2 25*1000000 /*25C*/
+#define ADC_TEMP_T3 50*1000000 /*50C*/
+
+#define ADC_TEMP_NTCR1 26490.0 /*resistor at 0C*/
+#define ADC_TEMP_NTCR2 10000.0 /*resistor at 25C*/
+#define ADC_TEMP_NTCR3 4171.0 /*resistor at 50C*/
+
+#define ADC_TEMP_PUR 24000.0 /*orginal registor*/
+#define ADC_TEMP_AVDD 2800000.0
+#define ADC_TEMP_SCALE 10.0
+
+#define ADC_TEMP_V1 (ADC_TEMP_AVDD*(ADC_TEMP_NTCR1/(ADC_TEMP_NTCR1+ADC_TEMP_PUR))) /*voltage at 0C*/
+#define ADC_TEMP_V2 (ADC_TEMP_AVDD*(ADC_TEMP_NTCR2/(ADC_TEMP_NTCR2+ADC_TEMP_PUR))) /*voltage at 25C*/
+#define ADC_TEMP_V3 (ADC_TEMP_AVDD*(ADC_TEMP_NTCR3/(ADC_TEMP_NTCR3+ADC_TEMP_PUR))) /*voltage at 50C*/
+
+#define ADC_TEMP_M12 (((ADC_TEMP_T1-ADC_TEMP_T2)*ADC_TEMP_SCALE)/(ADC_TEMP_V1-ADC_TEMP_V2)) /*T1T2's slope */
+#define ADC_TEMP_M23 (((ADC_TEMP_T2-ADC_TEMP_T3)*ADC_TEMP_SCALE)/(ADC_TEMP_V2-ADC_TEMP_V3)) /*T2T3's slppe*/
+
+#define ADC_TEMPV2_FACTOR ADC_TEMP_V2
+#define ADC_TEMPA12_FACTOR (ADC_TEMP_T1-ADC_TEMP_M12/ADC_TEMP_SCALE*ADC_TEMP_V1)
+#define ADC_TEMPA23_FACTOR (ADC_TEMP_T2-ADC_TEMP_M23/ADC_TEMP_SCALE*ADC_TEMP_V2)
+#define ADC_TEMPM12_FACTOR ADC_TEMP_M12
+#define ADC_TEMPM23_FACTOR ADC_TEMP_M23
+#define ADC_TEMPSCALE_FACTOR ADC_TEMP_SCALE
+
+
+#define ADC_ISENSE_FACTOR 2.5 //BMT ISENSE RESISTENCE FACTOR 5 = 1/0.2 --> resister use 0.2 Ohm
+
+//only use channels < ADC_MAX_CHANNEL define in mcu\hal\drv_def\drv_features_adc.h
+#define ADC_CALIBRATION_SLOPE_CH0 1232
+#define ADC_CALIBRATION_SLOPE_CH1 1232
+#define ADC_CALIBRATION_SLOPE_CH2 1232
+#define ADC_CALIBRATION_SLOPE_CH3 1232
+#define ADC_CALIBRATION_SLOPE_CH4 1232
+#define ADC_CALIBRATION_SLOPE_CH5 1232
+#define ADC_CALIBRATION_SLOPE_CH6 1232
+#define ADC_CALIBRATION_SLOPE_CH7 1232
+#define ADC_CALIBRATION_SLOPE_CH8 1232
+#define ADC_CALIBRATION_SLOPE_CH9 1232
+#define ADC_CALIBRATION_SLOPE_CH10 1232
+#define ADC_CALIBRATION_SLOPE_CH11 1232
+#define ADC_CALIBRATION_SLOPE_CH12 1232
+#define ADC_CALIBRATION_SLOPE_CH13 1232
+#define ADC_CALIBRATION_SLOPE_CH14 1232
+#define ADC_CALIBRATION_SLOPE_CH15 1232
+#define ADC_CALIBRATION_SLOPE_CH16 1232
+#define ADC_CALIBRATION_SLOPE_CH17 1232
+#define ADC_CALIBRATION_SLOPE_CH18 1232
+#define ADC_CALIBRATION_SLOPE_CH19 1232
+
+#define ADC_CALIBRATION_OFFSET_CH0 28673
+#define ADC_CALIBRATION_OFFSET_CH1 28673
+#define ADC_CALIBRATION_OFFSET_CH2 28673
+#define ADC_CALIBRATION_OFFSET_CH3 28673
+#define ADC_CALIBRATION_OFFSET_CH4 28673
+#define ADC_CALIBRATION_OFFSET_CH5 28673
+#define ADC_CALIBRATION_OFFSET_CH6 28673
+#define ADC_CALIBRATION_OFFSET_CH7 28673
+#define ADC_CALIBRATION_OFFSET_CH8 28673
+#define ADC_CALIBRATION_OFFSET_CH9 28673
+#define ADC_CALIBRATION_OFFSET_CH10 28673
+#define ADC_CALIBRATION_OFFSET_CH11 28673
+#define ADC_CALIBRATION_OFFSET_CH12 28673
+#define ADC_CALIBRATION_OFFSET_CH13 28673
+#define ADC_CALIBRATION_OFFSET_CH14 28673
+#define ADC_CALIBRATION_OFFSET_CH15 28673
+#define ADC_CALIBRATION_OFFSET_CH16 28673
+#define ADC_CALIBRATION_OFFSET_CH17 28673
+#define ADC_CALIBRATION_OFFSET_CH18 28673
+#define ADC_CALIBRATION_OFFSET_CH19 28673
+
+#define ADC_VOLT_FACTOR_CH0 100
+#define ADC_VOLT_FACTOR_CH1 100
+#define ADC_VOLT_FACTOR_CH2 100
+#define ADC_VOLT_FACTOR_CH3 250
+#define ADC_VOLT_FACTOR_CH4 100
+#define ADC_VOLT_FACTOR_CH5 100
+#define ADC_VOLT_FACTOR_CH6 100
+#define ADC_VOLT_FACTOR_CH7 100
+#define ADC_VOLT_FACTOR_CH8 100
+#define ADC_VOLT_FACTOR_CH9 100
+#define ADC_VOLT_FACTOR_CH10 100
+#define ADC_VOLT_FACTOR_CH11 100
+#define ADC_VOLT_FACTOR_CH12 100
+#define ADC_VOLT_FACTOR_CH13 100
+#define ADC_VOLT_FACTOR_CH14 100
+#define ADC_VOLT_FACTOR_CH15 100
+#define ADC_VOLT_FACTOR_CH16 100
+#define ADC_VOLT_FACTOR_CH17 100
+#define ADC_VOLT_FACTOR_CH18 100
+#define ADC_VOLT_FACTOR_CH19 100
+
+#endif /*_ADC_H*/
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/alerter_tone.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/alerter_tone.c
new file mode 100644
index 0000000..4e643f8
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/alerter_tone.c
@@ -0,0 +1,461 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * tone.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is intended for tone table.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#include "drv_comm.h"
+
+#define ALERT_TONE_ENABLE
+
+#ifdef ALERT_TONE_ENABLE
+const kal_uint16 MusicalNoteTable_C1[] = {
+ 16250, /* C0 */
+ 15294, /* C0# */
+ 14444, /* D0 */
+ 14254, /* D0# */
+ 13542, /* E0 */
+ 12897, /* F0 */
+ 12287, /* F0# */
+ 11775, /* G0 */
+ 11304, /* G0# */
+ 10943, /* A0 */
+ 10188, /* A0# */
+ 9849, /* B0 */
+
+ 9673, /* C1 */
+ 9104, /* C1# */
+ 8598, /* D1 */
+ 8553, /* D1# */
+ 7927, /* E1 */
+ 7558, /* F1 */
+ 7437, /* F1# */
+ 6982, /* G1 */
+ 6708, /* G1# */
+ 6220, /* A1 */
+ 6226, /* A1# */
+ 5920, /* B1 */
+
+ 5556, /* C2 */
+ 5234, /* C2# */
+ 5238, /* D2 */
+ 4966, /* D2# */
+ 4663, /* E2 */
+ 4395, /* F2 */
+ 4416, /* F2# */
+ 4145, /* G2 */
+ 3944, /* G2# */
+ 3693, /* A2 */
+ 3736, /* A2# */
+ 3523, /* B2 */
+
+ 3333, /* C3 */
+ 3140, /* C3# */
+ 2968, /* D3 */
+ 2995, /* D3# */
+ 2831, /* E3 */
+ 2668, /* F3 */
+ 2510, /* F3# */
+ 2551, /* G3# */
+ 2415, /* G3# */
+ 2273, /* A3 */
+ 2146, /* A3# */
+ 2033, /* B3 */
+
+ 1916, /* C4 */
+ 1956, /* C4# */
+ 1849, /* D4 */
+ 1742, /* D4# */
+ 1646, /* E4 */
+ 1552, /* F4 */
+ 1464, /* F4# */
+ 1507, /* G4# */
+ 1424, /* G4# */
+ 1343, /* A4 */
+ 1268, /* A4# */
+ 1199, /* B4 */
+
+ 1130, /* C5 */
+ 1173, /* C5# */
+ 1107, /* D5 */
+ 1045, /* D5# */
+ 986, /* E5 */
+ 931, /* F5 */
+ 878, /* F5# */
+ 829, /* G5# */
+ 870, /* G5# */
+ 821, /* A5 */
+ 775, /* A5# */
+ 732, /* B5 */
+
+ 690, /* C6 */
+ 652, /* C6# */
+ 615, /* D6 */
+ 581, /* D6# */
+ 617, /* E6 */
+ 582, /* F6 */
+ 549, /* F6# */
+ 518, /* G6# */
+ 489, /* G6# */
+ 462, /* A6 */
+ 436, /* A6# */
+ 411, /* B6 */
+
+ 444, /* C7 */
+ 419, /* C7# */
+ 395, /* D7 */
+ 373, /* D7# */
+ 352, /* E7 */
+ 332, /* F7 */
+ 314, /* F7# */
+ 296, /* G7# */
+ 280, /* G7# */
+ 264, /* A7 */
+ 291, /* A7# */
+ 274 /* B7 */
+};
+
+const kal_uint16 MusicalNoteTable_C2[] = {
+ 25, /* C0 */
+ 25, /* C0# */
+ 25, /* D0 */
+ 24, /* D0# */
+ 24, /* E0 */
+ 24, /* F0 */
+ 23, /* F0# */
+ 23, /* G0 */
+ 23, /* G0# */
+ 22, /* A0 */
+ 22, /* A0# */
+ 22, /* B0 */
+
+ 21, /* C1 */
+ 21, /* C1# */
+ 21, /* D1 */
+ 20, /* D1# */
+ 20, /* E1 */
+ 20, /* F1 */
+ 19, /* F1# */
+ 19, /* G1 */
+ 19, /* G1# */
+ 19, /* A1 */
+ 18, /* A1# */
+ 18, /* B1 */
+
+ 18, /* C2 */
+ 18, /* C2# */
+ 17, /* D2 */
+ 17, /* D2# */
+ 17, /* E2 */
+ 17, /* F2 */
+ 16, /* F2# */
+ 16, /* G2 */
+ 16, /* G2# */
+ 16, /* A2 */
+ 15, /* A2# */
+ 15, /* B2 */
+
+ 15, /* C3 */
+ 15, /* C3# */
+ 15, /* D3 */
+ 14, /* D3# */
+ 14, /* E3 */
+ 14, /* F3 */
+ 14, /* F3# */
+ 13, /* G3# */
+ 13, /* G3# */
+ 13, /* A3 */
+ 13, /* A3# */
+ 13, /* B3 */
+
+ 13, /* C4 */
+ 12, /* C4# */
+ 12, /* D4 */
+ 12, /* D4# */
+ 12, /* E4 */
+ 12, /* F4 */
+ 12, /* F4# */
+ 11, /* G4# */
+ 11, /* G4# */
+ 11, /* A4 */
+ 11, /* A4# */
+ 11, /* B4 */
+
+ 11, /* C5 */
+ 10, /* C5# */
+ 10, /* D5 */
+ 10, /* D5# */
+ 10, /* E5 */
+ 10, /* F5 */
+ 10, /* F5# */
+ 10, /* G5# */
+ 9, /* G5# */
+ 9, /* A5 */
+ 9, /* A5# */
+ 9, /* B5 */
+
+ 9, /* C6 */
+ 9, /* C6# */
+ 9, /* D6 */
+ 9, /* D6# */
+ 8, /* E6 */
+ 8, /* F6 */
+ 8, /* F6# */
+ 8, /* G6# */
+ 8, /* G6# */
+ 8, /* A6 */
+ 8, /* A6# */
+ 8, /* B6 */
+
+ 7, /* C7 */
+ 7, /* C7# */
+ 7, /* D7 */
+ 7, /* D7# */
+ 7, /* E7 */
+ 7, /* F7 */
+ 7, /* F7# */
+ 7, /* G7# */
+ 7, /* G7# */
+ 7, /* A7 */
+ 6, /* A7# */
+ 6 /* B7 */
+};
+
+const kal_uint16 MusicalNoteTable_Thres[] = {
+ 508, /* C0 */
+ 478, /* C0# */
+ 451, /* D0 */
+ 445, /* D0# */
+ 423, /* E0 */
+ 403, /* F0 */
+ 384, /* F0# */
+ 368, /* G0 */
+ 353, /* G0# */
+ 342, /* A0 */
+ 318, /* A0# */
+ 308, /* B0 */
+
+ 302, /* C1 */
+ 285, /* C1# */
+ 269, /* D1 */
+ 267, /* D1# */
+ 248, /* E1 */
+ 236, /* F1 */
+ 232, /* F1# */
+ 218, /* G1 */
+ 210, /* G1# */
+ 194, /* A1 */
+ 195, /* A1# */
+ 185, /* B1 */
+
+ 174, /* C2 */
+ 164, /* C2# */
+ 164, /* D2 */
+ 155, /* D2# */
+ 146, /* E2 */
+ 137, /* F2 */
+ 138, /* F2# */
+ 130, /* G2 */
+ 123, /* G2# */
+ 115, /* A2 */
+ 117, /* A2# */
+ 110, /* B2 */
+
+ 104, /* C3 */
+ 98, /* C3# */
+ 93, /* D3 */
+ 94, /* D3# */
+ 89, /* E3 */
+ 83, /* F3 */
+ 78, /* F3# */
+ 80, /* G3# */
+ 76, /* G3# */
+ 71, /* A3 */
+ 67, /* A3# */
+ 64, /* B3 */
+
+ 60, /* C4 */
+ 61, /* C4# */
+ 58, /* D4 */
+ 54, /* D4# */
+ 51, /* E4 */
+ 49, /* F4 */
+ 46, /* F4# */
+ 47, /* G4# */
+ 45, /* G4# */
+ 42, /* A4 */
+ 40, /* A4# */
+ 38, /* B4 */
+
+ 35, /* C5 */
+ 37, /* C5# */
+ 35, /* D5 */
+ 33, /* D5# */
+ 31, /* E5 */
+ 29, /* F5 */
+ 27, /* F5# */
+ 26, /* G5# */
+ 27, /* G5# */
+ 26, /* A5 */
+ 24, /* A5# */
+ 23, /* B5 */
+
+ 22, /* C6 */
+ 20, /* C6# */
+ 19, /* D6 */
+ 18, /* D6# */
+ 19, /* E6 */
+ 18, /* F6 */
+ 17, /* F6# */
+ 16, /* G6# */
+ 15, /* G6# */
+ 14, /* A6 */
+ 14, /* A6# */
+ 13, /* B6 */
+
+ 14, /* C7 */
+ 13, /* C7# */
+ 12, /* D7 */
+ 12, /* D7# */
+ 11, /* E7 */
+ 10, /* F7 */
+ 10, /* F7# */
+ 9, /* G7# */
+ 9, /* G7# */
+ 8, /* A7 */
+ 9, /* A7# */
+ 9 /* B7 */
+};
+#endif /*ALERT_TONE_ENABLE*/
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/alerterdrv.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/alerterdrv.c
new file mode 100644
index 0000000..3abe393
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/alerterdrv.c
@@ -0,0 +1,203 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * alerterdrv.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is defined for external interrupt channel.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#include "drv_comm.h"
+#include "alerter_sw.h"
+#include "gpt_sw.h"
+#include "custom_hw_default.h"
+
+#if !defined(DRV_ALERTER_NOT_EXIST)
+extern ALterNoteStruct ALterNote;
+#endif /*!defined(DRV_ALERTER_NOT_EXIST)*/
+
+/*
+* FUNCTION
+* Alter_init
+*
+* DESCRIPTION
+* This function is to intial the Alter module.
+*
+* CALLS
+*
+* PARAMETERS
+* outtype : pwm, pdm
+*
+* RETURNS
+* None
+*
+* GLOBALS AFFECTED
+* external_global
+*/
+void Alter_init(void)
+{
+#if !defined(DRV_ALERTER_NOT_EXIST)
+ GPTI_GetHandle(&ALterNote.handle);
+ ALERTER_Config(m3,c13_1MHZ);
+ ALERTER_Output(pwm);
+#endif /*!defined(DRV_ALERTER_NOT_EXIST)*/
+}
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/aux_custom.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/aux_custom.c
new file mode 100644
index 0000000..bfe00ab
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/aux_custom.c
@@ -0,0 +1,170 @@
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#ifndef __L1_STANDALONE__
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#ifdef TV_OUT_SUPPORT
+/* under construction !*/
+/* under construction !*/
+#endif
+/* under construction !*/
+/* under construction !*/
+#if (defined(__PHONE_CLAMSHELL__) || defined(__PHONE_SLIDE__))
+/* under construction !*/
+/* under construction !*/
+#endif //(defined(__PHONE_CLAMSHELL__) || defined(__PHONE_SLIDE__))
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #ifdef TV_OUT_SUPPORT
+/* under construction !*/
+/* under construction !*/
+ #endif //TV_OUT_SUPPORT
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if (defined(__PHONE_CLAMSHELL__) || defined(__PHONE_SLIDE__))
+/* under construction !*/
+#endif //(defined(__PHONE_CLAMSHELL__) || defined(__PHONE_SLIDE__))
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #ifdef TV_OUT_SUPPORT
+/* under construction !*/
+ #endif //#ifdef TV_OUT_SUPPORT
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #ifdef TV_OUT_SUPPORT
+/* under construction !*/
+ #endif //#ifdef TV_OUT_SUPPORT
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #ifdef TV_OUT_SUPPORT
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #endif //TV_OUT_SUPPORT
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #ifdef TV_OUT_SUPPORT
+/* under construction !*/
+ #endif //TV_OUT_SUPPORT
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif /*__L1_STANDALONE__*/
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/aux_custom.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/aux_custom.h
new file mode 100644
index 0000000..c109e59
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/aux_custom.h
@@ -0,0 +1,120 @@
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#ifndef __AUX_CUSTOM_H__
+/* under construction !*/
+/* under construction !*/
+#ifndef __L1_STANDALONE__
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#ifdef TV_OUT_SUPPORT
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif //TV_OUT_SUPPOR
+/* under construction !*/
+/* under construction !*/
+#if (defined(__PHONE_CLAMSHELL__) || defined(__PHONE_SLIDE__))
+/* under construction !*/
+/* under construction !*/
+#endif //(defined(__PHONE_CLAMSHELL__) || defined(__PHONE_SLIDE__))
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#ifdef TV_OUT_SUPPORT
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif //TV_OUT_SUPPORT
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#ifdef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#else // __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+#endif // __CUST_NEW__
+/* under construction !*/
+#endif //__L1_STANDALONE__
+#endif //__AUX_CUSTOM_H__
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/batvalue.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/batvalue.h
new file mode 100644
index 0000000..6766df9
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/batvalue.h
@@ -0,0 +1 @@
+/* Empty by Anderson */
\ No newline at end of file
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/bt_hw_define.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/bt_hw_define.h
new file mode 100644
index 0000000..77f1352
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/bt_hw_define.h
@@ -0,0 +1,84 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * bt_hw_define.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This Module defines Bluetooth hw definition
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef _BT_HW_DEFINE_H
+#define _BT_HW_DEFINE_H
+
+
+/*UART Definition*/
+#define BT_UART_PORT uart_port3 /* UART port for BCHS */
+
+/*GPIO Definition*/
+/*output*/
+#define BT_GPIO_RESET 39 //GPIO_39 : PMIC reset
+#define BT_GPIO_DSC 4 //GPIO_4 : to disconnect RFComm link
+#define BT_GPIO_POWER 12 //GPIO_12: Power
+/*input*/
+#define BT_GPIO_DATASELECT 3 //GPIO_3: DataSelect
+
+#endif
+
+
+
+
+
+
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/chr_parameter.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/chr_parameter.h
new file mode 100644
index 0000000..914c933
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/chr_parameter.h
@@ -0,0 +1,249 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * chr_parameter.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is defined for charging parameters.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef __CHR_PARAMETER_H__
+#define __CHR_PARAMETER_H__
+//MSBB remove #include "kal_non_specific_general_types.h"
+#include "dcl.h"
+
+//////////////////////////////////////////////////////////////////////////////////
+//////////////////////////////////// Common Part /////////////////////////////////
+//////////////////////////////////////////////////////////////////////////////////
+// Configuration of Battery Type
+#define LI_ION_BATTERY 0
+#define NI_MH_BATTERY 1
+#define CHR_BATTERY_TYPE LI_ION_BATTERY
+
+// Configuration of GPIO (Phase Out?)
+#define CHR_GPIO_CHR_CTRL 31
+#define CHR_GPIO_BATDET 14
+#define CHR_GPIO_VIBRATOR 7
+
+// Configuration of Checking
+#define CHR_CHECK_BATTERY KAL_FALSE
+#define CHR_CHECK_CHARGER_VOLTAGE KAL_TRUE
+#define CHR_CHECK_BATT_TEMP KAL_TRUE
+
+// Configuration of Li / Ni Battery Detect
+#define CHR_TYPICAL_LI_BATTYPE 1100000
+#define CHR_TYPICAL_NI_BATTYPE 1100000
+
+// Configuration of AC/USB Charge Current
+#define CHR_AC_CHARGE_CURRENT PMU_CHARGE_CURRENT_650_00_MA
+#define CHR_USB_CHARGE_CURRENT PMU_CHARGE_CURRENT_450_00_MA
+
+////////////////////////////////////////////////////////////////////
+// PHY Check Threshold //
+////////////////////////////////////////////////////////////////////
+
+// For Battery check, turn on by CHR_CHECK_BATTERY = KAL_TRUE
+#define CHR_BATT_EXIST_ADC_THRESHOLD 4600000
+
+// For V Charge check, turn on by CHR_CHECK_CHARGER_VOLTAGE = KAL_TRUE
+#define CHR_VCHARGER_HIGH 6500000
+#define CHR_VCHARGER_LOW 0
+
+// For Battery Temperature check, turn on by CHR_CHECK_TEMP = KAL_TRUE
+#define CHR_BATTMP_MINUS_40C 2500000
+#define CHR_BATTMP_0C 1469409
+#define CHR_BATTMP_45C 520042
+
+// For I Charge check
+#define CHR_ICHARGE_ON_HIGH 1000000
+#define CHR_ICHARGE_ON_LOW 50000
+#define CHR_ICHARGE_OFF_HIGH 1000000
+
+////////////////////////////////////////////////////////////////////
+// Misc Configuration //
+////////////////////////////////////////////////////////////////////
+
+// For current offset of different mode
+#define CURRENT_OFFSET_IDLE_MODE 100000 /* unit : mA */
+#define CURRENT_OFFSET_TALK_MODE 100000 /* unit : mA */
+#define CURRENT_OFFSET_SWOFF_MODE 100000 /* unit : mA */
+
+// Fast Charge ON/OFF duty configuration for different charge current of Normal Mode
+#define FAST_ICHARGE_HI_NORMAL_ON 7 /* unit : sec */
+#define FAST_ICHARGE_HI_NORMAL_OFF 1 /* unit : sec */
+#define FAST_ICHARGE_MID_NORMAL_ON 8 /* unit : sec */
+#define FAST_ICHARGE_MID_NORMAL_OFF 1 /* unit : sec */
+#define FAST_ICHARGE_LO_NORMAL_ON 9 /* unit : sec */
+#define FAST_ICHARGE_LO_NORMAL_OFF 1 /* unit : sec */
+
+// Fast Charge ON/OFF duty configuration for different charge current of Talk Mode
+#define FAST_ICHARGE_HI_TALK_ON 7 /* unit : sec */
+#define FAST_ICHARGE_HI_TALK_OFF 1 /* unit : sec */
+#define FAST_ICHARGE_MID_TALK_ON 8 /* unit : sec */
+#define FAST_ICHARGE_MID_TALK_OFF 1 /* unit : sec */
+#define FAST_ICHARGE_LO_TALK_ON 9 /* unit : sec */
+#define FAST_ICHARGE_LO_TALK_OFF 1 /* unit : sec */
+
+////////////////////////////////////////////////////////////////////
+// State Transition Configuration //
+////////////////////////////////////////////////////////////////////
+
+// For state transition threshold
+#define CHR_V_PRE2FAST_THRES 3400000
+
+// For Fast Charge State, charge duty adjustment
+#define CHR_FAST_ICHARGE_HIGHLEVEL 600000 /* 600ma,for table search */
+#define CHR_FAST_ICHARGE_LOWLEVEL 400000 /* 400ma,for table search */
+
+#define CHR_I_TOPOFF2FAST_THRES 250000 /* 250ma, TOPOFF->FAST */ // No use right now
+#define CHR_I_TOPOFF2FULL_THRES 120000 /* 120ma, TOPOFF->BATFULL */
+
+//////////////////////////////////////////////////////////////////////////////////
+////////////////////////////////// Individual Part ///////////////////////////////
+//////////////////////////////////////////////////////////////////////////////////
+
+// Start of Li-Ion Battery Configuration
+/* Li-Ion Battery Configuration */
+#define CHR_V_FAST2TOPOFF_THRES_LI 4050000
+#define CHR_V_FULL2FAST_THRES_LI 4110000 /* BATFULL->FAST */
+#define CHR_MAX_VBAT_LI 6000000
+#define CHR_V_PROTECT_HIGH_LI 4050000
+#define CHR_V_PROTECT_LOW_LI 3800000
+// End of Li-Ion Battery Configuration
+
+// Start of Ni-MH Battery
+/* Ni-MH Battery Configuration */
+#define CHR_V_TEMP_FAST2FULL_THRES_NI 414557 /* 50oC, FAST->BATFULL */
+#define CHR_V_FULL2FAST_THRES_NI 4050000
+#define CHR_MAX_VBAT_NI 5500000
+// End of Ni-MH Battery
+
+////////////////////////////////////////////////////////////////////
+// Charge Duty Configuration //
+////////////////////////////////////////////////////////////////////
+/* PRE CHARGE, search table */
+#define PRE_TON_TIME 3 /* unit : second */
+#define PRE_TOFF_TIME 2 /* unit : second */
+
+/* TOPOFF CHARGE, search table */
+#define TOPOFF_TON_TIME 3
+#define TOPOFF_TOFF_TIME 3
+
+/* Only for Pulse Charge Start */
+#define PULSE_POSTFULL_TWAIT_TIME 90
+#define PULSE_POSTFULL_TON_TIME 3
+#define PULSE_POSTFULL_TOFF_TIME 1
+/* Only for Pulse Charge End */
+
+/* Only for Li-Ion Battery Start */
+#define BATFULL_TON_TIME_LI 6 /* unit : second */
+#define BATFULL_TOFF_TIME_LI 0 /* unit : second */
+/* Only for Li-Ion Battery End */
+
+/* Only for Ni-MH Battery Start */
+#define BATFULL_TON_TIME_NI 1 /* unit : second */
+#define BATFULL_TOFF_TIME_NI 9 /* unit : second */
+/* Only for Ni-MH Battery End */
+
+#define CHR_STOP_TOFF_TIME 6
+#define BATHOLD_TOFF_TIME 10
+#define MEASURE_DISCARD_TIME 24 /* unit : ticks */
+
+#endif
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/cmmb_custom_if.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/cmmb_custom_if.c
new file mode 100644
index 0000000..ebbbada
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/cmmb_custom_if.c
@@ -0,0 +1,60 @@
+#if defined(__CMMB_SUPPORT__)
+#include "kal_public_api.h" //MSBB change #include "kal_release.h" // Basic data type
+
+#include "cmmb_custom_if.h"
+#include "gpio_sw.h"
+
+/**
+ * Power on Demodulator
+ *
+ * @param None.
+ *
+ * @return None.
+ */
+void cmmb_power_on_custom(void)
+{
+ DCL_HANDLE cmmb_reset_handle;
+ DCL_HANDLE cmmb_power_on_handle;
+
+ cmmb_reset_handle = DclGPIO_Open(DCL_GPIO, CMMB_GPIO_RESET_PIN);
+ cmmb_power_on_handle = DclGPIO_Open(DCL_GPIO, CMMB_GPIO_POWER_ON_PIN);
+
+ DclGPIO_Control(cmmb_reset_handle, GPIO_CMD_SET_DIR_OUT, NULL);
+ DclGPIO_Control(cmmb_reset_handle, GPIO_CMD_WRITE_LOW, NULL);
+
+ //need wait about 50ms
+ kal_sleep_task(15);
+
+ DclGPIO_Control(cmmb_reset_handle, GPIO_CMD_WRITE_HIGH, NULL);
+
+ //need wait about 50ms
+ kal_sleep_task(15);
+
+ //enable all LDO
+ DclGPIO_Control(cmmb_power_on_handle, GPIO_CMD_SET_DIR_OUT, NULL);
+ DclGPIO_Control(cmmb_power_on_handle, GPIO_CMD_WRITE_HIGH, NULL);
+
+ DclGPIO_Close(cmmb_reset_handle);
+ DclGPIO_Close(cmmb_power_on_handle);
+}
+
+void cmmb_power_off_custom(void)
+{
+ DCL_HANDLE cmmb_reset_handle;
+ DCL_HANDLE cmmb_power_on_handle;
+
+ cmmb_reset_handle = DclGPIO_Open(DCL_GPIO, CMMB_GPIO_RESET_PIN);
+ cmmb_power_on_handle = DclGPIO_Open(DCL_GPIO, CMMB_GPIO_POWER_ON_PIN);
+
+ DclGPIO_Control(cmmb_reset_handle, GPIO_CMD_SET_DIR_OUT, NULL);
+ DclGPIO_Control(cmmb_power_on_handle, GPIO_CMD_SET_DIR_OUT, NULL);
+
+ //pull low reset pin and disable all LDO
+ DclGPIO_Control(cmmb_reset_handle, GPIO_CMD_WRITE_LOW, NULL);
+ DclGPIO_Control(cmmb_power_on_handle, GPIO_CMD_WRITE_LOW, NULL);
+
+ DclGPIO_Close(cmmb_reset_handle);
+ DclGPIO_Close(cmmb_power_on_handle);
+}
+
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/cmmb_custom_if.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/cmmb_custom_if.h
new file mode 100644
index 0000000..0e8f006
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/cmmb_custom_if.h
@@ -0,0 +1,74 @@
+#ifndef CMMB_CUSTOM_IF_H
+#define CMMB_CUSTOM_IF_H
+
+#define INTERFACE_SPIONLY
+#define INNO_DOWNLOAD_FROM_BB
+
+//This define to indicate Innofidei cmmb chip using 26M clk or 20M clk.
+//Because different clk should download different firmware.
+//The following define can define "INNO_26M_FW" or "INNO_20M_FW"
+#define INNO_26M_FW
+
+#ifdef __CUST_NEW__
+
+extern const char gpio_cmmb_power_on_pin;
+extern const char gpio_cmmb_reset_pin;
+extern const char gpio_cmmb_spi_eint_pin;
+extern const char gpio_cmmb_spi_cs_n_pin;
+extern const char gpio_cmmb_spi_sck_pin;
+extern const char gpio_cmmb_spi_mosi_pin;
+extern const char gpio_cmmb_spi_miso_pin;
+
+extern const char gpio_cmmb_spi_eint_pin_M_EINT;
+extern const char gpio_cmmb_reset_pin_M_GPIO;
+extern const char gpio_cmmb_power_on_pin_M_GPIO;
+extern const char gpio_cmmb_spi_cs_n_pin_M_SPI_CS_N;
+extern const char gpio_cmmb_spi_sck_pin_M_SPI_SCK;
+extern const char gpio_cmmb_spi_mosi_pin_M_SPI_MOSI;
+extern const char gpio_cmmb_spi_miso_pin_M_SPI_MISO;
+
+#define CMMB_GPIO_RESET_PIN gpio_cmmb_reset_pin
+#define CMMB_GPIO_POWER_ON_PIN gpio_cmmb_power_on_pin
+#define CMMB_SPI_EINT_GPIO_PIN gpio_cmmb_spi_eint_pin
+#define CMMB_SPI_CS_N_GPIO_PIN gpio_cmmb_spi_cs_n_pin
+#define CMMB_SPI_SCK_GPIO_PIN gpio_cmmb_spi_sck_pin
+#define CMMB_SPI_MOSI_GPIO_PIN gpio_cmmb_spi_mosi_pin
+#define CMMB_SPI_MISO_GPIO_PIN gpio_cmmb_spi_miso_pin
+
+#define CMMB_SPI_EINT_PIN_MODE gpio_cmmb_spi_eint_pin_M_EINT
+#define CMMB_GPIO_RESET_MODE gpio_cmmb_reset_pin_M_GPIO
+#define CMMB_GPIO_PWR_ON_MODE gpio_cmmb_power_on_pin_M_GPIO
+#define CMMB_SPI_CS_N_PIN_MODE gpio_cmmb_spi_cs_n_pin_M_SPI_CS_N
+#define CMMB_SPI_SCK_PIN_MODE gpio_cmmb_spi_sck_pin_M_SPI_SCK
+#define CMMB_SPI_MOSI_PIN_MODE gpio_cmmb_spi_mosi_pin_M_SPI_MOSI
+#define CMMB_SPI_MISO_PIN_MODE gpio_cmmb_spi_miso_pin_M_SPI_MISO
+
+#else //__CUST_NEW__
+
+ enum
+ {
+ //SDIO
+ CMMB_GPIO_MCCM0_PIN = 67,
+ CMMB_GPIO_MCDA0_PIN = 68,
+ CMMB_GPIO_MCDA1_PIN = 69,
+ CMMB_GPIO_MCDA2_PIN = 70,
+ CMMB_GPIO_MCDA3_PIN = 71,
+ CMMB_GPIO_MCCK_PIN = 72,
+
+ CMMB_GPIO_POWER_ON_PIN = 83,
+ CMMB_GPIO_RESET_PIN = 62,
+
+ CMMB_SPI_CS_N_GPIO_PIN = 63,
+ CMMB_SPI_SCK_GPIO_PIN = 59,
+ CMMB_SPI_MOSI_GPIO_PIN = 61,
+ CMMB_SPI_MISO_GPIO_PIN = 60,
+
+ CMMB_SPI_EINT_GPIO_PIN = 48
+
+ };
+#endif //__CUST_NEW__
+
+extern void cmmb_power_on_custom(void);
+extern void cmmb_power_off_custom(void);
+
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_drv_init.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_drv_init.c
new file mode 100644
index 0000000..dde2c75
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_drv_init.c
@@ -0,0 +1,254 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * custom_drv_init.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file defines the driver init functions
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
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+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+//#include "kal_release.h"
+#include "kal_public_api.h"
+
+
+extern void Alter_init(void);
+extern void PWM_initialize(void);
+extern void EINT_Setting_SW_Init(void);
+
+#if defined(__OFN_SUPPORT__)
+extern void OFN_ChipInit(void);
+#endif
+
+#if defined(__NFC_SUPPORT__)
+extern int phDal4Nfc_uart_reset(long level);
+#endif
+
+#if defined(__BTMODULE_MT6236__)||defined(__BTMODULE_MT6276__)
+void Brt_MT6236_76_ARM7_Workaround_Stage_1_Bootloader_Step_0_PowerOn_Once_Only_Fake_BtOff(void);
+#endif
+
+
+void custom_drv_init(void)
+{
+/////////////////////////////////////////////////////////////////////////////////////////////////////////////
+// This Workaround should be placed at 1st line of custom_drv_init.
+#if defined(__BTMODULE_MT6236__)||defined(__BTMODULE_MT6276__)
+ Brt_MT6236_76_ARM7_Workaround_Stage_1_Bootloader_Step_0_PowerOn_Once_Only_Fake_BtOff();
+#endif
+/////////////////////////////////////////////////////////////////////////////////////////////////////////////
+
+ EINT_Setting_SW_Init(); /*initial dct setting sw part, hw part do in bootloader init*/
+
+ //spi_ini(); /* For LCD module */
+ //LCD_FunConfig();
+ Alter_init();
+#ifndef __L1_STANDALONE__
+ PWM_initialize();
+#endif
+#if defined(__OFN_SUPPORT__)
+ OFN_ChipInit();
+#endif
+}
+
+
+
+void custom_drv_deinit(void)
+{
+#ifdef __NFC_SUPPORT__
+ //Do NFC hardware reset for NFC chip enter active mode
+ phDal4Nfc_uart_reset(1);
+ phDal4Nfc_uart_reset(0);
+ phDal4Nfc_uart_reset(1);
+#endif
+}
+
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_equipment.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_equipment.c
new file mode 100644
index 0000000..c694ec5
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_equipment.c
@@ -0,0 +1,692 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * custom_equipment.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * The file contains definition of custom component module configuration
+ * variables, and routines handle for equipment device.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
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+ *
+ * removed!
+ * removed!
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+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef __L1_STANDALONE__
+
+/*
+** Includes
+*/
+#include "kal_public_api.h" //MSBB change #include "kal_release.h"
+#include "kal_general_types.h"
+#include "kal_public_api.h"
+#include "kal_public_defs.h" //MSBB change #include "stack_config.h"
+#include "kal_trace.h"
+#include "nvram_editor_data_item.h"
+#include "stack_types.h"
+#include "syscomp_config.h"
+//MSBB remove #include "custom_config.h"
+#include "stack_buff_pool.h"
+#include "ctrl_buff_pool.h"
+
+#include "device.h"
+#include "l1audio.h"
+#include "resource_audio.h"
+#include "custom_equipment.h"
+#include "custom_hw_default.h"
+#include "custom_em.h"
+
+/*
+** Typedefs
+*/
+
+/*
+** Defines
+*/
+
+/*
+** Extern Functions
+*/
+#ifndef __CUST_NEW__
+extern void GPIO_WriteIO(char data, char port);
+extern void PWM_level(kal_uint8 level);
+extern void PWM2_level(kal_uint8 level);
+#endif /* __CUST_NEW__ */
+//extern void Alter_level(kal_uint8 level);
+
+/*
+** Extern Varibales
+*/
+
+
+/*
+** Globol Varibales
+*/
+
+/*
+** Local Functions
+*/
+
+/*
+** Local Variables
+*/
+//static kal_uint8 l_ext_device_id = EXT_DEV_NONE;
+
+#ifndef __CUST_NEW__
+/***********************************************************
+ **
+ ** GPIO MAPPING TABLE
+ **
+ ***********************************************************/
+
+const unsigned char netname[][MAX_NETNAME_TEXT] = {
+ "GPIO#0",
+ "GPIO#1",
+ "GPIO#2",
+ "GPIO#3",
+ "GPIO#4",
+ "GPIO#5",
+ "GPIO#6",
+ "GPIO#7",
+ "GPIO#8",
+ "GPIO#9",
+ "GPIO#10",
+ "GPIO#11",
+ "GPIO#12",
+ "GPIO#13",
+ "GPIO#14",
+ "GPIO#15",
+ "GPIO#16",
+ "GPIO#17",
+ "GPIO#18",
+ "GPIO#19",
+ "GPIO#20",
+ "GPO#1",
+ "GPO#2",
+ "GPO#3"
+};
+
+
+
+GPIO_MAP_ENTRY gpio_map_tbl[] = {
+/*GPIO_LABEL_LED_LCD */ {GPIO_VAILD, GPIO_PORT_12, netname[GPIO_PORT_12], NULL },
+/*GPIO_LABEL_DEV_LED_KEY */ {GPIO_VAILD, GPIO_PORT_13, netname[GPIO_PORT_13], NULL },
+/*GPIO_LABEL_DEV_LED_STATUS */ {GPIO_VAILD, GPIO_PORT_14, netname[GPIO_PORT_14], NULL },
+/*GPIO_LABEL_DEV_VIBRATOR */ {GPIO_VAILD, GPIO_PORT_15, netname[GPIO_PORT_15], NULL },
+/*GPIO_LABELID_4 */ {GPIO_INVAILD, GPIO_PORT_4, netname[GPIO_PORT_4], NULL },
+/*GPIO_LABELID_5 */ {GPIO_INVAILD, GPIO_PORT_5, netname[GPIO_PORT_5], NULL },
+/*GPIO_LABELID_6 */ {GPIO_INVAILD, GPIO_PORT_6, netname[GPIO_PORT_6], NULL },
+/*GPIO_LABELID_7 */ {GPIO_INVAILD, GPIO_PORT_7, netname[GPIO_PORT_7], NULL },
+/*GPIO_LABELID_8 */ {GPIO_INVAILD, GPIO_PORT_8, netname[GPIO_PORT_8], NULL },
+/*GPIO_LABELID_9 */ {GPIO_INVAILD, GPIO_PORT_9, netname[GPIO_PORT_9], NULL },
+/*GPIO_LABELID_10 */ {GPIO_INVAILD, GPIO_PORT_10, netname[GPIO_PORT_10], NULL },
+/*GPIO_LABELID_11 */ {GPIO_INVAILD, GPIO_PORT_11, netname[GPIO_PORT_11], NULL },
+/*GPIO_LABELID_12 */ {GPIO_INVAILD, GPIO_PORT_12, netname[GPIO_PORT_12], NULL },
+/*GPIO_LABELID_13 */ {GPIO_INVAILD, GPIO_PORT_13, netname[GPIO_PORT_13], NULL },
+/*GPIO_LABELID_14 */ {GPIO_INVAILD, GPIO_PORT_14, netname[GPIO_PORT_14], NULL },
+/*GPIO_LABELID_15 */ {GPIO_INVAILD, GPIO_PORT_15, netname[GPIO_PORT_15], NULL },
+/*GPIO_LABELID_16 */ {GPIO_INVAILD, GPIO_PORT_16, netname[GPIO_PORT_16], NULL },
+/*GPIO_LABELID_17 */ {GPIO_INVAILD, GPIO_PORT_17, netname[GPIO_PORT_17], NULL },
+/*GPIO_LABELID_18 */ {GPIO_INVAILD, GPIO_PORT_18, netname[GPIO_PORT_18], NULL },
+/*GPIO_LABELID_19 */ {GPIO_INVAILD, GPIO_PORT_19, netname[GPIO_PORT_19], NULL },
+/*GPIO_LABELID_20 */ {GPIO_INVAILD, GPIO_PORT_20, netname[GPIO_PORT_20], NULL },
+/*GPO_LABELID_1 */ {GPIO_INVAILD, 0, netname[21], NULL },
+/*GPO_LABELID_2 */ {GPIO_INVAILD, 0, netname[22], NULL },
+/*GPO_LABELID_3 */ {GPIO_INVAILD, 0, netname[23], NULL }
+};
+
+
+
+
+/***********************************************************
+ **
+ ** EINT MAPPING TABLE ( Execution Table )
+ **
+ ***********************************************************/
+
+const unsigned char eintname[][MAX_NETNAME_TEXT] = {
+ "Charger",
+ "Cable",
+ "SendKey",
+ "Earphone",
+ "ClamShell"
+};
+
+GPIO_MAP_ENTRY eint_map_tbl[] = {
+/*EINT_LABELID_0 */ {GPIO_VAILD, 0, eintname[0], NULL },
+/*EINT_LABELID_1 */ {GPIO_VAILD, 1, eintname[1], NULL },
+/*EINT_LABELID_2 */ {GPIO_VAILD, 1, eintname[2], NULL },
+/*EINT_LABELID_3 */ {GPIO_VAILD, 1, eintname[3], NULL },
+/*EINT_LABELID_4 */ {GPIO_INVAILD, 2, eintname[4], NULL },
+};
+
+
+
+/***********************************************************
+ **
+ ** ADC MAPPING TABLE ( Execution Table )
+ **
+ ***********************************************************/
+const unsigned char adcname[][MAX_NETNAME_TEXT] = {
+ "VBAT",
+ "BTemp",
+ "VAUX",
+ "Current",
+ "VChgr"
+};
+
+GPIO_MAP_ENTRY adc_map_tbl[] = {
+/*ADC_LABELID_0 */ {GPIO_VAILD, 0, adcname[0], NULL },
+/*ADC_LABELID_1 */ {GPIO_VAILD, 1, adcname[1], NULL },
+/*ADC_LABELID_2 */ {GPIO_VAILD, 2, adcname[2], NULL },
+/*ADC_LABELID_3 */ {GPIO_VAILD, 3, adcname[3], NULL },
+/*ADC_LABELID_4 */ {GPIO_VAILD, 4, adcname[4], NULL },
+};
+#endif /* __CUST_NEW__*/
+
+/*
+* Function
+* custom_cfg_vbat_level_regulator
+* DESCRIPTION
+* The function is used to convert the vbat value to the end-user level .
+* And it will be call by audio manager.
+* PARAMETERS
+* vbat IN
+* RETURNS
+* kal_uint8
+* GLOBALS AFFECTED
+*/
+kal_uint8 custom_cfg_vbat_level_regulator( kal_uint32 measure_voltage, kal_uint8 *last_level, kal_uint8 *disp_level, kal_uint8 *hit_count )
+{
+ kal_uint8 level=0;
+ //kal_uint8 regulated_level=0;
+
+ for( level=0; level<BATTERY_MAX_LEVEL; level++)
+ if( measure_voltage <= Battery_Level_Info[level] )
+ break;
+
+ if( level > *disp_level )
+ {
+ for( level=0; level<BATTERY_MAX_LEVEL; level++)
+ if( measure_voltage <= (Battery_Level_Info[level] + VBAT_GROWUP_PENALTY) )
+ break;
+ }
+
+ if( level == *last_level )
+ {
+ if( *hit_count >= VBAT_HIT_COUNT_BOUND )
+ {
+ //regulated_level = *disp_level = level;
+ }
+ else
+ {
+ (*hit_count)++;
+ //regulated_level = *disp_level;
+ }
+ }
+ else
+ {
+ *hit_count=1;
+ //regulated_level = *disp_level;
+
+ }
+
+ *last_level = level;
+
+ if( level <= BATTERY_LOW_WARNING )
+ return ( level );
+ else
+ return ( *disp_level );
+
+}
+
+/*
+* custom_cfg_vbat_level_convert
+* DESCRIPTION
+* The function is used to convert the vbat value to the end-user level .
+* And it will be call by audio manager.
+* PARAMETERS
+* vbat IN
+* RETURNS
+* kal_uint8
+* GLOBALS AFFECTED
+*/
+kal_uint8 custom_cfg_vbat_level_convert
+(
+ kal_int32 vbat
+ )
+{
+ /*----------------------------------------------------------------*/
+ /* Local Variables */
+ /*----------------------------------------------------------------*/
+ kal_uint8 level=0; /* the level could be customized by user */
+ /*----------------------------------------------------------------*/
+ /* Code Body */
+ /*----------------------------------------------------------------*/
+
+ for( level=0; level<BATTERY_MAX_LEVEL; level++)
+ if( vbat <= Battery_Level_Info[level] )
+ return level;
+
+ return (BATTERY_MAX_LEVEL-1);
+
+}
+
+/*
+* custom_cfg_vbat_percentage_convert
+* DESCRIPTION
+* The function is used to convert the vbat value to the end-user level .
+* And it will be call by audio manager.
+* PARAMETERS
+* vbat IN
+* RETURNS
+* kal_uint8
+* GLOBALS AFFECTED
+*/
+kal_uint32 custom_cfg_vbat_percentage_convert
+(
+ kal_uint32 vbat
+ )
+{
+ kal_uint32 int_result;
+ double result;
+
+ if( BATLEV_MAX_IDX == 0 )
+ {
+ ASSERT(BATLEV_MAX_VOLTAGE > 0);
+ result = (double)vbat/(double)BATLEV_MAX_VOLTAGE;
+
+ }
+ else if( BATLEV_MAX_IDX > 0 && BATLEV_MAX_IDX < BATTERY_MAX_LEVEL )
+ {
+ ASSERT(Battery_Level_Info[BATLEV_MAX_IDX] > 0);
+ result = (double)vbat/(double)Battery_Level_Info[BATLEV_MAX_IDX] ;
+ }
+ else
+ {
+ result = 0.0;
+ }
+
+ int_result = (kal_uint32) (result * 10000);
+
+ return (int_result);
+}
+
+#ifndef __CUST_NEW__
+/***********************************************************
+ **
+ ** GPIO SETTTING
+ **
+ ***********************************************************/
+
+
+
+/*
+* Function
+* custom_cfg_outward_gpio_port
+* DESCRIPTION
+* The function is used to handle the port number of the outward gpio device.
+* And it will be call by audio manager.
+* PARAMETERS
+* gpio_device_id IN
+* port_num IN/OUT
+* RETURNS
+* kal_bool
+* GLOBALS AFFECTED
+*/
+kal_uint8 custom_cfg_outward_gpio_port( kal_uint8 gpio_device_id /* gpio_device_enum */)
+{
+ if( (gpio_device_id < GPIO_LABELID_MAX) && (gpio_map_tbl[gpio_device_id].vaild != GPIO_INVAILD) )
+ return gpio_map_tbl[gpio_device_id].port;
+ else
+ return 0;
+}
+
+
+
+
+kal_bool custom_cfg_gpio_set_level(kal_uint8 gpio_dev_type, kal_uint8 gpio_dev_level )
+{
+ kal_bool res=KAL_TRUE;
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+ return res;
+}
+
+void custom_start_flashlight(kal_uint8 red_level, kal_uint8 green_level, kal_uint8 blue_level, kal_uint8 duty)
+{
+ custom_cfg_gpio_set_level(GPIO_DEV_LED_STATUS_1, ((red_level>0) ? LED_LIGHT_LEVEL5 : LED_LIGHT_LEVEL0));
+ custom_cfg_gpio_set_level(GPIO_DEV_LED_STATUS_2, ((green_level>0) ? LED_LIGHT_LEVEL5 : LED_LIGHT_LEVEL0));
+ custom_cfg_gpio_set_level(GPIO_DEV_LED_STATUS_3, ((blue_level>0) ? LED_LIGHT_LEVEL5 : LED_LIGHT_LEVEL0));
+#if defined(DRV_PWM_PWM2)
+ PWM2_Configure(PWM2_Level_Info[0][0], duty);
+ PWM2_Start();
+#endif
+}
+
+void custom_stop_flashlight(void)
+{
+ custom_cfg_gpio_set_level(GPIO_DEV_LED_STATUS_1, LED_LIGHT_LEVEL0);
+ custom_cfg_gpio_set_level(GPIO_DEV_LED_STATUS_2, LED_LIGHT_LEVEL0);
+ custom_cfg_gpio_set_level(GPIO_DEV_LED_STATUS_3, LED_LIGHT_LEVEL0);
+#if defined(DRV_PWM_PWM2)
+ PWM2_Stop();
+#endif
+}
+#endif /* __CUST_NEW__ */
+
+#endif /* !__L1_STANDALONE__ */
+
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_equipment.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_equipment.h
new file mode 100644
index 0000000..e837230
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_equipment.h
@@ -0,0 +1,416 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * custom_config.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file provides the custom task index and module index configuration.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
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+ * removed!
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+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef _CUSTOM_EQUIPMENT_H
+#define _CUSTOM_EQUIPMENT_H
+
+#include "kal_general_types.h"
+
+#define VBAT_HIT_COUNT_BOUND 3
+#define VBAT_GROWUP_PENALTY (30 /*mA*/ * 1000 )
+
+// MTK_BEGIN Lisen added
+#define LCD_CLAM_CLOSE_HALFLITE_TO_OFF_TIME 15000
+#define LCD_CLAM_OPEN_HALFLITE_TO_OFF_TIME 15000
+// MTK_END
+
+#define GPIO_OFF 0x0
+#define GPIO_ON 0x1
+
+typedef struct _GPIO_MAP_ENTRY {
+ unsigned char vaild;
+ unsigned char port;
+ const unsigned char *netname;
+ const unsigned char *netname2;
+} GPIO_MAP_ENTRY;
+
+#ifndef __CUST_NEW__
+typedef enum {
+ GPIO_PORT_0 = 0x0,
+ GPIO_PORT_1,
+ GPIO_PORT_2,
+ GPIO_PORT_3,
+ GPIO_PORT_4,
+ GPIO_PORT_5,
+ GPIO_PORT_6,
+ GPIO_PORT_7,
+ GPIO_PORT_8,
+ GPIO_PORT_9,
+ GPIO_PORT_10,
+ GPIO_PORT_11,
+ GPIO_PORT_12,
+ GPIO_PORT_13,
+ GPIO_PORT_14,
+ GPIO_PORT_15,
+ GPIO_PORT_16,
+ GPIO_PORT_17,
+ GPIO_PORT_18,
+ GPIO_PORT_19,
+ GPIO_PORT_20,
+ GPIO_PORT_21,
+ GPIO_PORT_22,
+ GPIO_PORT_23,
+ GPIO_PORT_24,
+ GPIO_PORT_25,
+ GPIO_PORT_26,
+ GPIO_PORT_27,
+ GPIO_PORT_28,
+ GPIO_PORT_29,
+ GPIO_PORT_30,
+ GPIO_PORT_31,
+ GPIO_PORT_32,
+ GPIO_PORT_33,
+ GPIO_PORT_34,
+ GPIO_PORT_35,
+ GPIO_PORT_36,
+ GPIO_PORT_37,
+ GPIO_PORT_38,
+ GPIO_PORT_39,
+ GPIO_PORT_40,
+ GPO_PORT_0,
+ GPO_PORT_1,
+ GPO_PORT_2,
+
+ /* shound NOT modify this value*/
+ GPIO_PORT_MAX
+} GPIO_PORT_ENUM;
+
+
+typedef enum {
+ GPIO_LABEL_LED_LCD = 0x0,
+ GPIO_LABEL_DEV_LED_KEY,
+ GPIO_LABEL_DEV_LED_STATUS,
+ GPIO_LABEL_DEV_VIBRATOR,
+ GPIO_LABELID_4,
+ GPIO_LABELID_5,
+ GPIO_LABELID_6,
+ GPIO_LABELID_7,
+ GPIO_LABELID_8,
+ GPIO_LABELID_9,
+ GPIO_LABELID_11,
+ GPIO_LABELID_10,
+ GPIO_LABELID_12,
+ GPIO_LABELID_13,
+ GPIO_LABELID_14,
+ GPIO_LABELID_15,
+ GPIO_LABELID_16,
+ GPIO_LABELID_17,
+ GPIO_LABELID_18,
+ GPIO_LABELID_19,
+ GPIO_LABELID_20,
+ GPIO_LABELID_21,
+ GPIO_LABELID_22,
+ GPIO_LABELID_23,
+ GPIO_LABELID_24,
+ GPIO_LABELID_25,
+ GPIO_LABELID_26,
+ GPIO_LABELID_27,
+ GPIO_LABELID_28,
+ GPIO_LABELID_29,
+ GPIO_LABELID_30,
+ GPIO_LABELID_31,
+ GPIO_LABELID_32,
+ GPIO_LABELID_33,
+ GPIO_LABELID_34,
+ GPIO_LABELID_35,
+ GPIO_LABELID_36,
+ GPIO_LABELID_37,
+ GPIO_LABELID_38,
+ GPIO_LABELID_39,
+ GPIO_LABELID_40,
+ GPO_LABELID_0,
+ GPO_LABELID_1,
+ GPO_LABELID_2,
+
+ /* shound NOT modify this value*/
+ GPIO_LABELID_MAX
+} GPIO_LABELID_ENUM;
+
+
+typedef enum {
+
+ EINT_LABELID_0 = 0x0,
+ EINT_LABELID_1,
+ EINT_LABELID_2,
+ EINT_LABELID_3,
+ EINT_LABELID_4,
+
+ EINT_LABELID_MAX = EINT_LABELID_4
+
+} EINT_LABELID_ENUM;
+
+typedef enum {
+
+ ADC_LABELID_0 = 0x0,
+ ADC_LABELID_1,
+ ADC_LABELID_2,
+ ADC_LABELID_3,
+ ADC_LABELID_4,
+
+ ADC_LABELID_MAX = ADC_LABELID_4
+
+} ADC_LABELID_ENUM;
+
+#else /* __CUST_NEW__ */
+
+extern const kal_uint8 GPIO_LABELID_MAX;
+extern const kal_uint8 EINT_LABELID_MAX;
+extern const kal_uint8 ADC_LABELID_MAX;
+extern kal_uint8 EmGpioIdxMenu2Tbl[];
+
+#endif /* __CUST_NEW__ */
+
+
+extern GPIO_MAP_ENTRY gpio_map_tbl[];
+extern GPIO_MAP_ENTRY eint_map_tbl[];
+extern GPIO_MAP_ENTRY adc_map_tbl[];
+
+extern void custom_cfg_audio_ec_range
+(
+ kal_uint8 *min_vol, /* min volume level */
+ kal_uint8 *max_vol /* max volume level */
+ );
+
+extern kal_bool custom_cfg_audio_out_device
+(
+ kal_uint8 audio_sound_id, /* audio_id_enum */
+ kal_uint8 *out_device_path /* audio_type_enum */
+ );
+
+extern kal_bool custom_cfg_speech_out_device
+(
+ kal_uint8 ext_device_id, /* ext_device_enum */
+ kal_uint8 *out_device_path /* audio_type_enum */
+ );
+
+extern kal_uint8 custom_cfg_hw_aud_output_path
+(
+ kal_uint8 speaker_id /*audio_type_enum*/
+
+ /* return l1sp audio output device enum */
+);
+
+extern kal_uint8 custom_cfg_hw_aud_input_path
+(
+ kal_uint8 mic_id /* audio_input_path_enum */
+);
+
+
+extern kal_uint8 custom_cfg_outward_gpio_port
+(
+ kal_uint8 gpio_device_id /* gpio_device_enum */
+ );
+
+extern kal_bool custom_cfg_gpio_set_level
+ (
+ kal_uint8 gpio_dev_type, /* gpio_device_enum */
+ kal_uint8 gpio_dev_level
+ );
+
+
+extern kal_uint8 custom_cfg_vbat_level_convert
+(
+ kal_int32 vbat
+ );
+
+extern kal_uint8 custom_cfg_vbat_level_regulator
+(
+ kal_uint32 measure_voltage,
+ kal_uint8 *last_level,
+ kal_uint8 *disp_level,
+ kal_uint8 *hit_count
+ );
+
+extern void custom_start_flashlight(kal_uint8 red_level, kal_uint8 green_level, kal_uint8 blue_level, kal_uint8 duty);
+
+extern void custom_stop_flashlight(void);
+
+#endif /* _CUSTOM_EQUIPMENT_H */
+
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_hw_default.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_hw_default.c
new file mode 100644
index 0000000..03f1a64
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_hw_default.c
@@ -0,0 +1,480 @@
+#if !defined(__LTE_SM__)
+
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * custom_hw_default.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * The file contains definition of custom component module configuration
+ * variables, and routines handle for equipment device.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
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+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+/*
+** Includes
+*/
+
+
+#include "kal_public_api.h" //MSBB change #include "kal_release.h"
+#include "custom_hw_default.h"
+
+#ifndef __L1_STANDALONE__
+
+#include "stack_types.h"
+#include "syscomp_config.h"
+//MSBB remove #include "custom_config.h"
+#include "stack_buff_pool.h"
+#include "ctrl_buff_pool.h"
+
+//#include "custom_nvram_editor_data_item.h"
+#include "nvram_editor_data_item.h"
+#include "l4_nvram_editor.h"
+#endif /* __L1_STANDALONE__ */
+
+
+
+/*
+** Globol Varibales
+*/
+
+#if ( (defined(MT6326)) )
+kal_uint8 PMIC6326_KP_Level_Info[5][2] =
+{
+ /*Freq,duty*/
+ /*Freq, unit is HZ */
+ /*Freq, unit is HZ */
+ /*Duty, uint is % */
+ {200,20}, /*Level 1*/
+ {200,40}, /*Level 2*/
+ {200,60}, /*Level 3*/
+ {200,80}, /*Level 4*/
+ {200,100} /*Level 5*/
+};
+kal_uint8 PMIC6326_MAINLCD_Level_Info[5][2] =
+{
+ /*(Freq,duty)*/
+ /*Freq, unit is HZ */
+ /*Duty, uint is % */
+ {200,20}, /*Level 1*/
+ {200,40}, /*Level 2*/
+ {200,60}, /*Level 3*/
+ {200,80}, /*Level 4*/
+ {200,100} /*Level 5*/
+};
+kal_uint8 PMIC6326_VIBR_Level_Info[5][2] =
+{
+ /*(Freq,duty)*/
+ /*Freq, unit is HZ */
+ /*Duty, uint is % */
+ {200,20}, /*Level 1*/
+ {200,40}, /*Level 2*/
+ {200,60}, /*Level 3*/
+ {200,80}, /*Level 4*/
+ {200,100} /*Level 5*/
+};
+
+#endif // #if ( (defined(MT6326)) )
+
+
+kal_uint32 PWM1_Level_Info[PWM_MAX_LEVEL][2] =
+{
+ /*Freq,duty*/
+ {200,20}, /*Level 1*/
+ {200,40}, /*Level 2*/
+ {200,60}, /*Level 3*/
+ {200,80}, /*Level 4*/
+ {200,100} /*Level 5*/
+};
+
+kal_uint32 PWM2_Level_Info[PWM_MAX_LEVEL][2] =
+{
+ /*Freq,duty*/
+ {200,20}, /*Level 1*/
+ {200,40}, /*Level 2*/
+ {200,60}, /*Level 3*/
+ {200,80}, /*Level 4*/
+ {200,100} /*Level 5*/
+};
+
+kal_uint32 PWM3_Level_Info[PWM_MAX_LEVEL][2] =
+{
+ /*Freq,duty*/
+ {200,20}, /*Level 1*/
+ {200,40}, /*Level 2*/
+ {200,60}, /*Level 3*/
+ {200,80}, /*Level 4*/
+ {200,100} /*Level 5*/
+};
+// PWM4, 5, 6 for old PWN configuration begin
+kal_uint32 PWM4_Level_Info[PWM_MAX_LEVEL][2] =
+{
+ /*Freq,duty*/
+ {200,20}, /*Level 1*/
+ {200,40}, /*Level 2*/
+ {200,60}, /*Level 3*/
+ {200,80}, /*Level 4*/
+ {200,100} /*Level 5*/
+};
+
+// We use PWM5 as LCD backlight
+// And the LCD backlight component is configured insided to invert the signal from PWM
+// So we need to invert duty setting for each level
+kal_uint32 PWM5_Level_Info[PWM_MAX_LEVEL][2] =
+{
+ /*Freq,duty*/
+ {200,80}, /*Level 1*/
+ {200,60}, /*Level 2*/
+ {200,40}, /*Level 3*/
+ {200,20}, /*Level 4*/
+ {200,0} /*Level 5*/
+};
+kal_uint32 PWM6_Level_Info[PWM_MAX_LEVEL][2] =
+{
+ /*Freq,duty*/
+ {200,20}, /*Level 1*/
+ {200,40}, /*Level 2*/
+ {200,60}, /*Level 3*/
+ {200,80}, /*Level 4*/
+ {200,100} /*Level 5*/
+};
+// PWM4, 5, 6 for old PWN configuration end
+
+kal_uint32 Alter_Level_Info[PWM_MAX_LEVEL][2] =
+{
+ /*Freq,duty*/
+ {200,20}, /*Level 1*/
+ {200,40}, /*Level 2*/
+ {200,60}, /*Level 3*/
+ {200,80}, /*Level 4*/
+ {200,100} /*Level 5*/
+};
+
+#if defined(MT6318)
+kal_uint32 PMIC6318_PWM_Level_Info[PWM_MAX_LEVEL][2] =
+{
+ /*Freq,duty*/
+ {200,20}, /*Level 1*/
+ {200,40}, /*Level 2*/
+ {200,60}, /*Level 3*/
+ {200,80}, /*Level 4*/
+ {200,100} /*Level 5*/
+};
+
+kal_uint16 pmic_custom_get_bl_pmw_type(void)
+{
+ // Choose BL_LED or KP_LED. If no use, just return 0.
+ return BL_LED;
+}
+#endif
+
+const kal_uint8 DEFAULT_HARDWARE_YEAR = 4; //2004
+const kal_uint8 DEFAULT_HARDWARE_MON = 1;
+const kal_uint8 DEFAULT_HARDWARE_DAY = 1;
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+
+//50ms * 10 = 0.5 sec
+const kal_uint32 ADC_BOOTUP_EVAL_PERIOD = KAL_TICKS_50_MSEC;
+const kal_uint32 ADC_BOOTUP_EVAL_COUNT = 10;
+
+//10sec * 6 = 1min
+const kal_uint32 ADC_IDLE_EVAL_PERIOD = (2*KAL_TICKS_5_SEC);
+const kal_uint32 ADC_IDLE_EVAL_COUNT = 6;
+
+//5sec * 6 = 30sec
+const kal_uint32 ADC_TALKING_EVAL_PERIOD = (KAL_TICKS_5_SEC);
+const kal_uint32 ADC_TALKING_EVAL_COUNT = 6;
+
+//150 * 10 ms = 1.5 sec (unit : 10ms )
+const kal_uint32 KPD_LONGPRESS_PERIOD = 60;
+
+//50 * 10ms = 0.5 sec (unit : 10ms )
+const kal_uint32 KPD_REPEAT_PERIOD = 50;
+
+#ifndef __L1_STANDALONE__
+
+kal_uint8 MainLCD_Contrast_Level_Info[LCD_CONTRAST_MAX_LEVEL];
+kal_uint8 MainLCD_Bias_Level_Info[LCD_PARAM_MAX_LEVEL];
+kal_uint8 MainLCD_Linerate_Level_Info[LCD_PARAM_MAX_LEVEL];
+kal_uint8 MainLCD_Temp_Level_Info[LCD_PARAM_MAX_LEVEL];
+
+#ifdef DUAL_LCD
+kal_uint8 SubLCD_Contrast_Level_Info[LCD_CONTRAST_MAX_LEVEL];
+kal_uint8 SubLCD_Bias_Level_Info[LCD_PARAM_MAX_LEVEL];
+kal_uint8 SubLCD_Linerate_Level_Info[LCD_PARAM_MAX_LEVEL];
+kal_uint8 SubLCD_Temp_Level_Info[LCD_PARAM_MAX_LEVEL];
+#endif
+
+kal_uint32 Battery_Level_Info[BATTERY_MAX_LEVEL];
+
+
+void custom_init_hardware_level(void *hw_level_struct)
+{
+ kal_uint8 i, j;
+
+ custom_hw_level_struct *hw_level = (custom_hw_level_struct *)hw_level_struct;
+
+ for( i=0; i< LCD_CONTRAST_MAX_LEVEL; i++ )
+ {
+ MainLCD_Contrast_Level_Info[i]= hw_level->MainLCD_Contrast[i];
+#ifdef DUAL_LCD
+ SubLCD_Contrast_Level_Info[i]= hw_level->SubLCD_Contrast[i];
+#endif
+ }
+
+ for( i=0; i< LCD_PARAM_MAX_LEVEL; i++ )
+ {
+ MainLCD_Bias_Level_Info[i]= hw_level->MainLCD_Bias[i];
+ MainLCD_Linerate_Level_Info[i]= hw_level->MainLCD_Linerate[i];
+ MainLCD_Temp_Level_Info[i] = hw_level->MainLCD_Temp[i];
+#ifdef DUAL_LCD
+ SubLCD_Bias_Level_Info[i]= hw_level->SubLCD_Bias[i];
+ SubLCD_Linerate_Level_Info[i]= hw_level->SubLCD_Linerate[i];
+ SubLCD_Temp_Level_Info[i] = hw_level->SubLCD_Temp[i];
+#endif
+ }
+
+ for( i=0; i< BATTERY_MAX_LEVEL; i++ )
+ Battery_Level_Info[i] = hw_level->BatteryLevel[i];
+
+ for( i=0; i<PWM_MAX_LEVEL; i++ )
+ for( j=0; j<2; j++ )
+ {
+ PWM1_Level_Info[i][j] = hw_level->PWM1[i][j];
+ PWM2_Level_Info[i][j] = hw_level->PWM2[i][j];
+ Alter_Level_Info[i][j] = hw_level->PWM3[i][j];
+ }
+
+#if defined(MT6318)
+ for( i=0; i<PWM_MAX_LEVEL; i++ )
+ for( j=0; j<2; j++ )
+ {
+ PMIC6318_PWM_Level_Info[i][j] = hw_level->PMIC6318BLPWM[i][j];
+ }
+#endif
+
+}
+
+#endif /* __L1_STANDALONE__ */
+
+#endif /* end of __LTE_SM__ */
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_hw_default.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_hw_default.h
new file mode 100644
index 0000000..ce4ef97
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_hw_default.h
@@ -0,0 +1,160 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/* Configure which backlight source we use */
+#define EXTERNAL_BL_DRIVER_SOURCE
+//#define INTERNAL_BL_DRIVER_SOURCE
+
+/* LED_MAINLCD PWM Configuration */
+#define PWM_MAX_LEVEL 5
+
+#if defined(__MULTI_LEVEL_BACKLIGHT_SUPPORT__)
+#define PWM_MAX_BACKLIGHT_LEVEL 20
+#else
+#define PWM_MAX_BACKLIGHT_LEVEL PWM_MAX_LEVEL
+#endif // End of #if defined(__MULTI_LEVEL_BACKLIGHT_SUPPORT__)
+
+#if defined(EXTERNAL_BL_DRIVER_SOURCE)
+
+// #define LED_MAINLCD_USE_PWM_1
+// #define LED_MAINLCD_USE_PWM_2
+#define LED_MAINLCD_USE_PWM_3
+//#define LED_MAINLCD_USE_PWM_NONE
+
+#if !defined(LED_MAINLCD_USE_PWM_NONE)
+
+#define EXTERNAL_BL_DRIVER_STEPS PWM_MAX_BACKLIGHT_LEVEL
+
+#else
+
+#define EXTERNAL_BL_DRIVER_STEPS (16)
+
+#endif
+
+#elif defined(INTERNAL_BL_DRIVER_SOURCE)
+
+// #define LED_MAINLCD_USE_PWM_1
+#define LED_MAINLCD_USE_PWM_2
+// #define LED_MAINLCD_USE_PWM_3
+// #define LED_MAINLCD_USE_PWM_NONE
+
+#endif // End of #if defined(__EXTERNAL_BL_DRIVER_SOURCE__)
+
+/* LED_SUBLCD PWM Configuration */
+// #define LED_SUBLCD_USE_PWM_1
+// #define LED_SUBLCD_USE_PWM_2
+// #define LED_SUBLCD_USE_PWM_3
+#define LED_SUBLCD_USE_PWM_NONE
+
+/* LED_KEY PWM Configuration */
+#define LED_KEY_USE_PWM_1
+// #define LED_KEY_USE_PWM_2
+// #define LED_KEY_USE_PWM_3
+// #define LED_KEY_USE_PWM_NONE
+
+/* VIBRATOR PWM Configuration */
+// #define VIBRATOR_USE_PWM_1
+// #define VIBRATOR_USE_PWM_2
+// #define VIBRATOR_USE_PWM_3
+#define VIBRATOR_USE_PWM_NONE
+
+#define LCD_CONTRAST_MAX_LEVEL 15
+#define LCD_PARAM_MAX_LEVEL 5
+#define BATTERY_MAX_LEVEL 10
+
+extern const kal_uint8 DEFAULT_HARDWARE_YEAR;
+extern const kal_uint8 DEFAULT_HARDWARE_MON;
+extern const kal_uint8 DEFAULT_HARDWARE_DAY;
+
+/* For AT command query voltage percentage */
+#define BATLEV_MAX_IDX 0 /* 0: turn off, reference to BATLEV_MAX_VOLTAGE directly */
+#define BATLEV_MAX_VOLTAGE 4200000
+
+
+extern const kal_uint32 ADC_BOOTUP_EVAL_PERIOD;
+extern const kal_uint32 ADC_BOOTUP_EVAL_COUNT;
+extern const kal_uint32 ADC_IDLE_EVAL_PERIOD;
+extern const kal_uint32 ADC_IDLE_EVAL_COUNT;
+extern const kal_uint32 ADC_TALKING_EVAL_PERIOD;
+extern const kal_uint32 ADC_TALKING_EVAL_COUNT;
+
+extern const kal_uint32 KPD_LONGPRESS_PERIOD;
+extern const kal_uint32 KPD_REPEAT_PERIOD;
+
+#if defined(__MULTI_LEVEL_BACKLIGHT_SUPPORT__) && defined(LED_MAINLCD_USE_PWM_1)
+extern kal_uint32 PWM1_Level_Info[PWM_MAX_BACKLIGHT_LEVEL][2];
+#else
+extern kal_uint32 PWM1_Level_Info[PWM_MAX_LEVEL][2];
+#endif
+
+#if defined(__MULTI_LEVEL_BACKLIGHT_SUPPORT__) && defined(LED_MAINLCD_USE_PWM_2)
+extern kal_uint32 PWM2_Level_Info[PWM_MAX_BACKLIGHT_LEVEL][2];
+#else
+extern kal_uint32 PWM2_Level_Info[PWM_MAX_LEVEL][2];
+#endif
+
+#if defined(__MULTI_LEVEL_BACKLIGHT_SUPPORT__) && defined(LED_MAINLCD_USE_PWM_3)
+extern kal_uint32 PWM3_Level_Info[PWM_MAX_BACKLIGHT_LEVEL][2];
+#else
+extern kal_uint32 PWM3_Level_Info[PWM_MAX_LEVEL][2];
+#endif
+
+// PWM4, 5, 6 for old PWN configuration begin
+extern kal_uint32 PWM4_Level_Info[PWM_MAX_LEVEL][2];
+extern kal_uint32 PWM5_Level_Info[PWM_MAX_LEVEL][2];
+extern kal_uint32 PWM6_Level_Info[PWM_MAX_LEVEL][2];
+// PWM4, 5, 6 for old PWN configuration end
+
+extern kal_uint32 Alter_Level_Info[PWM_MAX_LEVEL][2];
+
+extern kal_uint8 MainLCD_Contrast_Level_Info[LCD_CONTRAST_MAX_LEVEL];
+extern kal_uint8 MainLCD_Bias_Level_Info[LCD_PARAM_MAX_LEVEL];
+extern kal_uint8 MainLCD_Linerate_Level_Info[LCD_PARAM_MAX_LEVEL];
+extern kal_uint8 MainLCD_Temp_Level_Info[LCD_PARAM_MAX_LEVEL];
+
+#ifdef DUAL_LCD
+extern kal_uint8 SubLCD_Contrast_Level_Info[LCD_CONTRAST_MAX_LEVEL];
+extern kal_uint8 SubLCD_Bias_Level_Info[LCD_PARAM_MAX_LEVEL];
+extern kal_uint8 SubLCD_Linerate_Level_Info[LCD_PARAM_MAX_LEVEL];
+extern kal_uint8 SubLCD_Temp_Level_Info[LCD_PARAM_MAX_LEVEL];
+#endif
+
+extern kal_uint32 Battery_Level_Info[BATTERY_MAX_LEVEL];
+
+#if defined(MT6318)
+extern kal_uint32 PMIC6318_PWM_Level_Info[PWM_MAX_LEVEL][2];
+extern kal_uint16 pmic_custom_get_bl_pmw_type(void);
+#endif
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_sim_driver.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_sim_driver.c
new file mode 100644
index 0000000..3660d5c
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/custom_sim_driver.c
@@ -0,0 +1,850 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * custom_sim_driver.C
+ *
+ * Project:
+ * --------
+ * Gemini
+ *
+ * Description:
+ * ------------
+ * this file is custom implementation of SIM driver
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
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+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#include "drv_comm.h"
+#include "reg_base.h"
+#include "intrCtrl.h"
+#include "multi_icc_custom.h"
+#include "kal_public_api.h"
+#include "sim_sw_comm.h"
+#include "sim_drv_HW_reg_MTK.h"
+#include "sim_drv_trc.h"
+
+#ifdef __SIM_HOT_SWAP_SUPPORT__
+#include "eint.h"
+#include "ccci_rpc_if.h"
+#if defined(SIM_DRV_FAST_DISCHARGE_BY_PMIC_EINT)
+#include "dcl.h"
+#endif
+#endif
+#if defined(__MTK_TARGET__)
+#ifdef DRV_SIM_ALL_SOLUTION_BUILT
+
+extern void sim_init_hwCb(void);
+extern void DRV_ICC_interface_init(SIM_ICC_APPLICATION application);
+extern kal_bool sim_physicalSlotChanged;
+extern void sim_dump_eint(sim_HW_cb *hw_cb);
+
+/*following is the template for dual SIM platform, I test it on TF68*/
+/****************************************************
+ customer and HW SA please fill from here
+*****************************************************/
+kal_char sim_dbg_custom_str[200];
+#define PLUG_OUT_TIME_COUNT 1 // for plug out detect time can be modified
+
+#if !defined(__SIM_DRV_CO_LOAD_MT6306__)
+#if defined(SIM_DRV_SWITCH_MT6306) || defined(SIM_DRV_GEMINI_WITH_MT6306)
+#define iccSlotNum 4
+#else
+#define iccSlotNum 2
+#endif
+
+#ifdef __SIM_HOT_SWAP_SUPPORT__
+ SIM_ICC_HOT_PLUG iccHotPlugTable[iccSlotNum];
+#endif
+
+const SIM_ICC_HW_SW_MAPPING iccMappingTable[iccSlotNum] =
+{
+ /*
+ logical number, application usage from user's view, do it connect to MT6302, owned by which SIM controller, MT6302 chip #, interface # of this MT6302
+ */
+#if !defined(SIM_DRV_SWITCH_MT6306)
+ {0, SIM_ICC_APPLICATION_PHONE1, MTK_SIMIF0, KAL_FALSE, 0, 1},
+ {1, SIM_ICC_APPLICATION_PHONE2, MTK_SIMIF1, KAL_FALSE, 0, 1},
+#elif defined (SIM_DRV_GEMINI_WITH_MT6306)
+ {0, SIM_ICC_APPLICATION_PHONE1, MTK_SIMIF0, SIM_SWITCH_6306, 0, 0}, //SIM_IF0,switch0, port 0
+ {1, SIM_ICC_APPLICATION_PHONE2, MTK_SIMIF1, SIM_SWITCH_6306, 1, 0}, //SIM_IF1,switch1, port 0
+ {2, SIM_ICC_APPLICATION_PHONE3, MTK_SIMIF0, SIM_SWITCH_6306, 0, 1},
+ {3, SIM_ICC_APPLICATION_PHONE4, MTK_SIMIF1, SIM_SWITCH_6306, 1, 1},
+#else
+ {0, SIM_ICC_APPLICATION_PHONE1, MTK_SIMIF0, SIM_SWITCH_6306, 0, 0},
+ {1, SIM_ICC_APPLICATION_PHONE2, MTK_SIMIF0, SIM_SWITCH_6306, 0, 1},
+ {2, SIM_ICC_APPLICATION_PHONE3, MTK_SIMIF1, SIM_SWITCH_6306, 1, 0},
+ {3, SIM_ICC_APPLICATION_PHONE4, MTK_SIMIF1, SIM_SWITCH_6306, 1, 1},
+#endif
+};
+#else // #if !defined(__SIM_DRV_CO_LOAD_MT6306__)
+extern kal_bool sim_connectMT6306;
+kal_uint32 iccSlotNum = 4;
+
+#ifdef __SIM_HOT_SWAP_SUPPORT__
+ SIM_ICC_HOT_PLUG iccHotPlugTable[4];
+#endif
+
+SIM_ICC_HW_SW_MAPPING *iccMappingTable;
+
+SIM_ICC_HW_SW_MAPPING iccMappingTable_2SIM[2] =
+{
+ {0, SIM_ICC_APPLICATION_PHONE1, MTK_SIMIF0, KAL_FALSE, 0, 1},
+ {1, SIM_ICC_APPLICATION_PHONE2, MTK_SIMIF1, KAL_FALSE, 0, 1},
+};
+
+SIM_ICC_HW_SW_MAPPING iccMappingTable_4SIM[4] =
+{
+#if defined (SIM_DRV_GEMINI_WITH_MT6306)
+ {0, SIM_ICC_APPLICATION_PHONE1, MTK_SIMIF0, SIM_SWITCH_6306, 0, 0}, //SIM_IF0,switch0, port 0
+ {1, SIM_ICC_APPLICATION_PHONE2, MTK_SIMIF1, SIM_SWITCH_6306, 1, 0}, //SIM_IF1,switch1, port 0
+ {2, SIM_ICC_APPLICATION_PHONE3, MTK_SIMIF0, SIM_SWITCH_6306, 0, 1},
+ {3, SIM_ICC_APPLICATION_PHONE4, MTK_SIMIF1, SIM_SWITCH_6306, 1, 1},
+#else
+ {0, SIM_ICC_APPLICATION_PHONE1, MTK_SIMIF0, SIM_SWITCH_6306, 0, 0},
+ {1, SIM_ICC_APPLICATION_PHONE2, MTK_SIMIF0, SIM_SWITCH_6306, 0, 1},
+ {2, SIM_ICC_APPLICATION_PHONE3, MTK_SIMIF1, SIM_SWITCH_6306, 1, 0},
+ {3, SIM_ICC_APPLICATION_PHONE4, MTK_SIMIF1, SIM_SWITCH_6306, 1, 1},
+#endif
+};
+#endif
+
+/****************************************************
+ end of custom table
+*****************************************************/
+
+/****************************************************
+ only SW guys familiar with multiple SIM driver can modify following
+*****************************************************/
+
+void sim_init_all_cb(void)
+{
+ kal_uint32 loopIndex;
+#if defined(__SIM_DRV_CO_LOAD_MT6306__) && defined(SIM_DRV_SWITCH_MT6306)
+ extern void USIM_connect_mt6306(void);
+ USIM_connect_mt6306();
+
+ if (sim_connectMT6306 == KAL_FALSE)
+ {
+ iccSlotNum = 2;
+ iccMappingTable = iccMappingTable_2SIM;
+ }
+ else
+ {
+ iccSlotNum = 4;
+ iccMappingTable = iccMappingTable_4SIM;
+ }
+#endif
+ sim_init_hwCb();
+
+ for(loopIndex = 0; iccSlotNum > loopIndex; loopIndex++)
+ {
+ DRV_ICC_interface_init(iccMappingTable[loopIndex].application);
+ }
+#ifdef SIM_DRV_GEMINI_WITH_MT6306
+ sim_MT6306_init_for_GEMINI();
+#endif
+#if defined(SIM_DRV_DYNAMIC_GET_GPIO_NUM) && defined(__MTK_TARGET__)
+ extern void sim_query_GpioNumOfSimPins(void);
+ sim_query_GpioNumOfSimPins();
+#endif
+}
+
+kal_uint32 sim_get_logicalNum_from_app(SIM_ICC_APPLICATION application)
+{
+ kal_uint32 loopIndex, loopMax = iccSlotNum;
+
+ for(loopIndex = 0; loopIndex < loopMax; loopIndex++)
+ {
+ if(application == iccMappingTable[loopIndex].application)
+ {
+ if(iccSlotNum <= iccMappingTable[loopIndex].logicalNum)
+ ASSERT(0);
+ return iccMappingTable[loopIndex].logicalNum;
+ }
+ }
+
+ return 0xffffffff;
+}
+kal_uint32 sim_get_app_from_logicalNum(kal_uint32 logicalNum)
+{
+ kal_uint32 loopIndex, loopMax = iccSlotNum;
+ if(iccSlotNum <= logicalNum)
+ ASSERT(0);
+ for(loopIndex = 0; loopIndex < loopMax; loopIndex++)
+ {
+ if(logicalNum == iccMappingTable[loopIndex].logicalNum)
+ {
+ return iccMappingTable[loopIndex].application;
+ }
+ }
+
+ return 0xffffffff;
+}
+kal_uint32 sim_get_MT6302_from_logicalNum(kal_uint32 logicalNum)
+{
+ kal_uint32 loopIndex, loopMax = iccSlotNum;
+
+ if(iccSlotNum <= logicalNum)
+ ASSERT(0);
+
+ for(loopIndex = 0; loopIndex < loopMax; loopIndex++)
+ {
+ if(logicalNum == iccMappingTable[loopIndex].logicalNum)
+ {
+ if(SIM_SWITCH_6302 == (SIM_ICC_SWITCHCONTROL) iccMappingTable[loopIndex].needMT6302)
+ return (iccMappingTable[loopIndex].MT6302ChipNum << 8) | (iccMappingTable[loopIndex].MT6302PortNum);
+ else if(SIM_SWITCH_6306 == (SIM_ICC_SWITCHCONTROL) iccMappingTable[loopIndex].needMT6302)
+ return (iccMappingTable[loopIndex].MT6302ChipNum << 8) | (iccMappingTable[loopIndex].MT6302PortNum) | (SIM_SWITCH_6306 << 16);
+ else if(SIM_SWITCH_6314 == (SIM_ICC_SWITCHCONTROL) iccMappingTable[loopIndex].needMT6302)
+ return(iccMappingTable[loopIndex].MT6302ChipNum << 8) | (iccMappingTable[loopIndex].MT6302PortNum) | (SIM_SWITCH_6314 << 16);
+ else
+ return SIM_ICC_MT6302_NONE;
+ }
+ }
+
+ /*there is no this logical number*/
+ ASSERT(0);
+ return 0;
+}
+
+kal_uint32 sim_get_hwCtrl_from_logicalNum(kal_uint32 logicalNum)
+{
+ kal_uint32 loopIndex, loopMax = iccSlotNum;
+
+ if(iccSlotNum <= logicalNum)
+ ASSERT(0);
+
+ for(loopIndex = 0; loopIndex < loopMax; loopIndex++)
+ {
+ if(logicalNum == iccMappingTable[loopIndex].logicalNum)
+ {
+ return iccMappingTable[loopIndex].hwCtrl;
+ }
+ }
+
+ /*there is no this logical number*/
+ ASSERT(0);
+ return 0;
+}
+
+kal_uint32 sim_get_MT6302PeerInterface(kal_uint8 chipNum, kal_uint32 portNum)
+{
+ kal_uint32 loopIndex, loopMax = iccSlotNum;
+
+ for(loopIndex = 0; loopIndex < loopMax; loopIndex++)
+ {
+ if(chipNum == iccMappingTable[loopIndex].MT6302ChipNum && portNum == iccMappingTable[loopIndex].MT6302PortNum)
+ {
+ if(iccSlotNum <= iccMappingTable[loopIndex].logicalNum)
+ ASSERT(0);
+ return iccMappingTable[loopIndex].logicalNum;
+ }
+ }
+
+ /*there is no this logical number*/
+ return SIM_ICC_MT6302_NONE;
+}
+
+#if defined(__MTK_TARGET__)
+kal_uint32 sim_get_ToalInterfaceCount()
+{
+ return iccSlotNum;
+}
+#endif
+
+kal_uint32 get_CAS_icc_logicalNum()
+{
+ kal_uint32 loopIndex, loopMax = iccSlotNum;
+
+ for(loopIndex = 0; loopIndex < loopMax; loopIndex++)
+ {
+ if(SIM_ICC_APPLICATION_CMMB_SMD == iccMappingTable[loopIndex].application)
+ {
+ if(iccSlotNum <= iccMappingTable[loopIndex].logicalNum)
+ ASSERT(0);
+ return iccMappingTable[loopIndex].logicalNum;
+ }
+ }
+
+ /*there is no this logical number*/
+ ASSERT(0);
+ return 0;
+}
+
+kal_uint32 sim_custom_task_2_driver(kal_uint32 taskInterface)
+{
+ return taskInterface;
+}
+
+#ifdef __SIM_HOT_SWAP_SUPPORT__
+void sim_reg_hot_plug_cb(SIM_ICC_APPLICATION application,
+ SIM_HOT_PLUG_CALLBACK hotPlugInCb,
+ SIM_HOT_PLUG_CALLBACK hotPlugOutCb)
+{
+ kal_uint32 loopIndex;
+
+ for(loopIndex = 0; loopIndex < iccSlotNum; loopIndex++)
+ {
+ if(application == iccMappingTable[loopIndex].application)
+ {
+ iccHotPlugTable[loopIndex].application = application;
+ iccHotPlugTable[loopIndex].plugInCb = hotPlugInCb;
+ iccHotPlugTable[loopIndex].plugOutcb = hotPlugOutCb;
+ break;
+ }
+ }
+}
+#if defined(__SIM_HOT_SWAP_POLL_TIMER__)
+extern void sim_hot_swap_poll_timer_rollback(kal_uint32 which_sim);
+void sim_rollback_timer(SIM_ICC_APPLICATION app)
+{
+ if (app <= SIM_ICC_APPLICATION_PHONE2 && app >= SIM_ICC_APPLICATION_PHONE1)
+ {
+ kal_uint32 simInterface = sim_get_logicalNum_from_app(app);
+ sim_HW_cb * hw_cb = (sim_HW_cb *)sim_get_hwCb(simInterface);
+ if (hw_cb->PollTimerStart == KAL_TRUE)
+ {
+ hw_cb->PollTimerStart = KAL_FALSE;
+ sim_hot_swap_poll_timer_rollback(app);
+ kal_sprintf(sim_dbg_custom_str, "\r\n[SIM_CUS_DRV:%d]: rollback when insert", simInterface);
+ DRV_ICC_print_str(sim_dbg_custom_str);
+ }
+ hw_cb->PollTimerPluggedOut = KAL_FALSE;
+ hw_cb->PollTimerEnd = KAL_TRUE;
+ }
+}
+#endif
+void sim_get_card_status(kal_uint32 logicalNum, kal_bool *isRemoved)
+{
+ kal_uint32 loopIndex;
+
+ for(loopIndex = 0; loopIndex < iccSlotNum; loopIndex++)
+ {
+ if(logicalNum == iccHotPlugTable[loopIndex].logicalNum)
+ {
+ *isRemoved = iccHotPlugTable[loopIndex].removed;
+ break;
+ }
+ }
+}
+
+#ifdef __TC01__
+kal_bool sim_get_card_status_tc01(kal_uint32 logicalNum)
+{
+#define GPIO_FOR_SIM1_EINT 47
+#define GPIO_FOR_SIM2_EINT 46
+extern char GPIO_ReadIO(kal_int16 port);
+
+ kal_uint32 loopIndex = 0;
+ kal_bool pin_sts = KAL_FALSE;
+
+ for(loopIndex = 0; loopIndex < iccSlotNum; loopIndex++){
+ if(logicalNum == iccHotPlugTable[loopIndex].logicalNum) break;
+ }
+
+ if (iccHotPlugTable[loopIndex].application == SIM_ICC_APPLICATION_PHONE1)
+ pin_sts = (kal_bool)GPIO_ReadIO(GPIO_FOR_SIM1_EINT);
+ else if (iccHotPlugTable[loopIndex].application == SIM_ICC_APPLICATION_PHONE2)
+ pin_sts = (kal_bool)GPIO_ReadIO(GPIO_FOR_SIM2_EINT);
+
+ return (kal_bool)(pin_sts != iccHotPlugTable[loopIndex].remove_polarity);
+
+}
+#endif
+
+#if defined(SIM_DRV_FAST_DISCHARGE_BY_PMIC_EINT)
+void sim_config_pmic_fast_dischage(SIM_ICC_APPLICATION application, kal_uint32 rm_pol, kal_bool enable)
+{
+ #if defined(SIM_DRV_CTRL_VSIM_BY_SPMI)
+ DCL_HANDLE handle;
+ SPMI_CTRL_EXT_REGISTER_WRITEL cmd;
+
+ handle = DclSPMI_Open(DCL_SPMI, FLAGS_NONE);
+ cmd.type = DCL_MAIN_PMIC;
+ cmd.len = 1;
+
+ if(application == SIM_ICC_APPLICATION_PHONE1) {
+ cmd.addr = RG_LDO_VSIM1_EINT;
+ } else if (application == SIM_ICC_APPLICATION_PHONE2) {
+ cmd.addr = RG_LDO_VSIM2_EINT;
+ } else {
+ SIM_DEBUG_ASSERT(0);
+ }
+
+ // config POLarity and DBounce
+ cmd.value = RG_LDO_VSIMx_EINT_DB_SEL; // 0-5us; 1-10us
+ if (rm_pol != 0) {
+ cmd.value |= RG_LDO_VSIMx_EINT_POL;
+ }
+ DclSPMI_Control(handle, EXT_REGISTER_WRITEL, (DCL_CTRL_DATA_T *)&cmd);
+
+ // config EINT_EN
+ if (enable) {
+ cmd.value |= RG_LDO_VSIMx_EINT_EN;
+ DclSPMI_Control(handle, EXT_REGISTER_WRITEL, (DCL_CTRL_DATA_T *)&cmd);
+ kal_sprintf(sim_dbg_custom_str, "[SIM_CUS_DRV:%d]: Enable PMIC Fast Discharge", application);
+ DRV_ICC_print_str(sim_dbg_custom_str);
+ } else {
+ kal_sprintf(sim_dbg_custom_str, "[SIM_CUS_DRV:%d]: Disable PMIC Fast Discharge", application);
+ DRV_ICC_print_str(sim_dbg_custom_str);
+ }
+
+ DclSPMI_Close(handle);
+ #endif
+}
+#endif
+
+
+void sim_hot_plug_handle(SIM_ICC_HOT_PLUG *hotPlugCnf, kal_bool removed)
+{
+ SIM_ICC_APPLICATION app;
+ //ASSERT(hotPlugCnf->removed != removed);
+ hotPlugCnf->removed = removed;
+
+ if (sim_physicalSlotChanged == KAL_TRUE)
+ app = 1 - hotPlugCnf->application;
+ else
+ app = hotPlugCnf->application;
+
+ if (removed)
+ {
+ if (hotPlugCnf->plugOutcb != NULL)
+ {
+#if defined(__SIM_HOT_SWAP_POLL_TIMER__)
+ SIM_PlugEvent_Poll_Timer_Cb(app);
+#else
+ hotPlugCnf->plugOutcb(app);
+ SIM_PlugEvent_Cb(app);
+#endif
+ }
+ }
+ else
+ {
+ if (hotPlugCnf->plugInCb!= NULL)
+ {
+ hotPlugCnf->plugInCb(app);
+#if defined(__SIM_HOT_SWAP_POLL_TIMER__)
+ sim_rollback_timer(app);
+#endif
+ }
+ }
+}
+
+void sim_hot_plug_eint_cb(SIM_ICC_APPLICATION app)
+{
+ kal_int32 idx;
+ kal_bool removed;
+
+ for (idx = 0; idx < iccSlotNum; idx++)
+ {
+ if(app == iccHotPlugTable[idx].application)
+ break;
+ }
+
+ ASSERT(idx != iccSlotNum);
+
+ removed = (iccHotPlugTable[idx].polarity == iccHotPlugTable[idx].remove_polarity);
+
+ iccHotPlugTable[idx].polarity = !iccHotPlugTable[idx].polarity;
+ EINT_Set_HW_Debounce_Enable(iccHotPlugTable[idx].eintNo, EINT_DISABLE);
+ EINT_Set_Polarity(iccHotPlugTable[idx].eintNo, iccHotPlugTable[idx].polarity);
+ if (removed == KAL_TRUE)
+ EINT_Set_HW_Debounce(iccHotPlugTable[idx].eintNo,iccHotPlugTable[idx].debounceTime); //Removed, Set for Insert, 1s
+ else
+ EINT_Set_HW_Debounce_32KCycle(iccHotPlugTable[idx].eintNo, PLUG_OUT_TIME_COUNT); // Set for Remove
+ EINT_Set_HW_Debounce_Enable(iccHotPlugTable[idx].eintNo, EINT_ENABLE);
+
+ sim_hot_plug_handle(&iccHotPlugTable[idx], removed);
+#if defined (__DUAL_SIM_HOT_SWAP_CO_DECK_SUPPORT__)
+ sim_hot_plug_handle(&iccHotPlugTable[1 - idx], removed); // 1-idx must be legal, or ASSERT will happen in sim_reg_hot_plug_eint
+#endif
+
+#if defined(SIM_DRV_FAST_DISCHARGE_BY_PMIC_EINT)
+ // sim_config_pmic_fast_dischage(app, iccHotPlugTable[idx].remove_polarity, !removed);
+#endif
+
+ if (removed == KAL_TRUE)
+ {
+ MD_TRC_LOG_SIM_DRV_REMOVE_SIM(__LINE__,
+ idx,
+ app,
+ iccHotPlugTable[idx].polarity,
+ iccHotPlugTable[idx].removed,
+ iccHotPlugTable[((idx <= SIM_ICC_APPLICATION_PHONE2) ? (1 - idx) : idx)].polarity,
+ iccHotPlugTable[((idx <= SIM_ICC_APPLICATION_PHONE2) ? (1 - idx) : idx)].removed,
+ drv_get_current_time());
+ }
+ else
+ {
+ MD_TRC_LOG_SIM_DRV_INSERT_SIM(__LINE__,
+ idx,
+ app,
+ iccHotPlugTable[idx].polarity,
+ iccHotPlugTable[idx].removed,
+ iccHotPlugTable[((idx <= SIM_ICC_APPLICATION_PHONE2) ? (1 - idx) : idx)].polarity,
+ iccHotPlugTable[((idx <= SIM_ICC_APPLICATION_PHONE2) ? (1 - idx) : idx)].removed,
+ drv_get_current_time());
+ }
+
+ sim_dump_eint(sim_get_hwCb(sim_get_logicalNum_from_app(app)));
+}
+
+void sim1_hot_plug_eint_cb(void)
+{
+ sim_hot_plug_eint_cb(SIM_ICC_APPLICATION_PHONE1);
+}
+
+void sim2_hot_plug_eint_cb(void)
+{
+ sim_hot_plug_eint_cb(SIM_ICC_APPLICATION_PHONE2);
+}
+
+#if defined(SIM_DRV_SWITCH_MT6306)
+void sim3_hot_plug_eint_cb(void)
+{
+ sim_hot_plug_eint_cb(SIM_ICC_APPLICATION_PHONE3);
+}
+#endif
+
+void sim_reg_hot_plug_eint(SIM_ICC_APPLICATION application,
+ kal_uint32 eintNo,
+ kal_uint32 debounceTime,
+ kal_uint32 polarity,
+ kal_uint32 sensitivity,
+ kal_uint32 socketType)
+{
+ kal_uint32 loopIndex;
+
+ for(loopIndex = 0; loopIndex < iccSlotNum; loopIndex++)
+ {
+ if(application == iccMappingTable[loopIndex].application)
+ {
+ if(iccHotPlugTable[loopIndex].registed == KAL_TRUE)
+ {
+ kal_sprintf(sim_dbg_custom_str, "[SIM_DRV]sim_registed\n\r");
+ DRV_ICC_print_str(sim_dbg_custom_str);
+ return;
+ }
+ else
+ {
+ iccHotPlugTable[loopIndex].logicalNum = iccMappingTable[loopIndex].logicalNum;
+ iccHotPlugTable[loopIndex].application = iccMappingTable[loopIndex].application;
+ iccHotPlugTable[loopIndex].eintNo = eintNo;
+ iccHotPlugTable[loopIndex].debounceTime = debounceTime;
+ iccHotPlugTable[loopIndex].polarity = (kal_bool)polarity;
+ iccHotPlugTable[loopIndex].remove_polarity = (kal_bool)polarity;
+ iccHotPlugTable[loopIndex].sensitivity = sensitivity;
+ iccHotPlugTable[loopIndex].socketType = socketType;
+ iccHotPlugTable[loopIndex].registed = KAL_TRUE;
+#if defined (__DUAL_SIM_HOT_SWAP_CO_DECK_SUPPORT__)
+ ASSERT(1-loopIndex >= 0); // To make it simple
+ iccHotPlugTable[1 - loopIndex].logicalNum = iccMappingTable[1 - loopIndex].logicalNum;
+ iccHotPlugTable[1 - loopIndex].application = iccMappingTable[1 - loopIndex].application;
+ iccHotPlugTable[1 - loopIndex].eintNo = eintNo;
+ iccHotPlugTable[1 - loopIndex].debounceTime = debounceTime;
+ iccHotPlugTable[1 - loopIndex].polarity = (kal_bool)polarity;
+ iccHotPlugTable[1 - loopIndex].remove_polarity = (kal_bool)polarity;
+ iccHotPlugTable[1 - loopIndex].sensitivity = sensitivity;
+ iccHotPlugTable[1 - loopIndex].socketType = socketType;
+ iccHotPlugTable[1 - loopIndex].registed = KAL_TRUE;
+#endif
+ break;
+ }
+ }
+ }
+
+ // need to set HW debounce & sensitivity before registration
+ EINT_Set_HW_Debounce_Enable(eintNo, EINT_DISABLE);
+ //EINT_SW_Debounce_Modify(eintNo, 0); // unit: 10 ms
+ //EINT_Set_HW_Debounce(eintNo, debounceTime * 10); // unit: ms
+ EINT_Set_HW_Debounce_32KCycle(eintNo, PLUG_OUT_TIME_COUNT); // Set for Remove
+ EINT_Set_Sensitivity(eintNo, sensitivity);
+
+ if(application == SIM_ICC_APPLICATION_PHONE1)
+ {
+ EINT_Registration(eintNo, KAL_TRUE, (kal_bool)polarity, sim1_hot_plug_eint_cb, KAL_TRUE);
+ }
+ else if(application == SIM_ICC_APPLICATION_PHONE2)
+ {
+ EINT_Registration(eintNo, KAL_TRUE, (kal_bool)polarity, sim2_hot_plug_eint_cb, KAL_TRUE);
+ }
+#if defined(SIM_DRV_SWITCH_MT6306)
+ else if(application == SIM_ICC_APPLICATION_PHONE3)
+ {
+ EINT_Registration(eintNo, KAL_TRUE, (kal_bool)polarity, sim3_hot_plug_eint_cb, KAL_TRUE);
+ }
+#endif
+
+#if defined(SIM_DRV_FAST_DISCHARGE_BY_PMIC_EINT)
+ sim_config_pmic_fast_dischage(application, polarity, KAL_TRUE);
+#if defined (__DUAL_SIM_HOT_SWAP_CO_DECK_SUPPORT__)
+ ASSERT(1-application >= 0); // To make it simple
+ sim_config_pmic_fast_dischage(1-application, polarity, KAL_TRUE);
+#endif
+#endif
+}
+#endif
+
+void sim_custom_setting_before_turning_on_vsim(kal_uint32 hwInterfaceNo)
+{
+ return;
+}
+
+void sim_custom_setting_after_turning_off_vsim(kal_uint32 hwInterfaceNo)
+{
+ return;
+}
+
+void sim_custom_setting_before_resetting_sim(kal_uint32 hwInterfaceNo)
+{
+ return;
+}
+#if defined (__SIM_HOT_SWAP_SUPPORT__)
+kal_uint32 SIM_EINT_GetAttribute(kal_uint32 simInterface,kal_uint8 *EintName, kal_uint32 EintNameLength, kal_uint32 queryType, void *result, kal_uint32 resultLength)
+{
+ #if !defined( MT6297)
+ return IPC_RPC_EINT_GetAttribute(EintName,EintNameLength,queryType,result,resultLength);
+ #else
+ switch(queryType)
+ {
+ case SIM_HOT_PLUG_EINT_NUMBER:
+ if (simInterface==0)
+ *(kal_uint32*)result=1;
+ else
+ *(kal_uint32*)result=2;
+ break;
+ case SIM_HOT_PLUG_EINT_DEBOUNCETIME:
+ *(kal_uint32*)result = 100;
+ break;
+ case SIM_HOT_PLUG_EINT_POLARITY:
+ *(kal_uint32*)result = 1;
+ break;
+ case SIM_HOT_PLUG_EINT_SOCKETTYPE:
+ *(kal_uint32*)result = 0;
+ break;
+ case SIM_HOT_PLUG_EINT_SENSITIVITY:
+ *(kal_uint32*)result = 0;
+ break;
+ default:
+ ASSERT(0);
+ }
+ #endif
+
+ return 0;
+}
+#endif
+
+#endif
+#else
+kal_bool sim_get_card_status_tc01(kal_uint32 logicalNum){return KAL_TRUE;}
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/e_compass_sensor_hw_define.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/e_compass_sensor_hw_define.h
new file mode 100644
index 0000000..cf12384
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/e_compass_sensor_hw_define.h
@@ -0,0 +1,88 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * e_compass_sensor_hw_define.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This Module defines GPIO for serial interface.
+ *
+ * Author:
+ * Peter Zhang
+ *
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef E_COMPASS_SENSOR_HW_DEFINE_H
+#define E_COMPASS_SENSOR_HW_DEFINE_H
+
+#ifdef __CUST_NEW__
+
+extern const char gpio_e_compass_sensor_sck_pin;
+extern const char gpio_e_compass_sensor_sda_pin;
+extern const char gpio_e_compass_sensor_pwr_pin;
+
+#define E_COMPASS_SENSOR_SCK gpio_e_compass_sensor_sck_pin
+#define E_COMPASS_SENSOR_SDA gpio_e_compass_sensor_sda_pin
+#define E_COMPASS_SENSOR_PWR gpio_e_compass_sensor_pwr_pin
+
+
+#else /* __CUST_NEW__ */
+
+#define E_COMPASS_SENSOR_SCK 25
+#define E_COMPASS_SENSOR_SDA 26
+#define E_COMPASS_SENSOR_PWR 28
+
+#endif /* __CUST_NEW__ */
+
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/eint_def.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/eint_def.c
new file mode 100644
index 0000000..7aadb33
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/eint_def.c
@@ -0,0 +1,490 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * eint_def.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is defined for external interrupt channel.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
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+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#include "drv_comm.h"
+#include "eint.h"
+#include "kal_public_api.h"
+
+#ifdef __CUST_NEW__
+
+#include "eint_drv.h"
+extern const kal_uint8 AUX_EINT_NO;
+extern const kal_uint8 CHRDET_EINT_NO;
+
+#if defined(JOGBALL_SUPPORT)
+extern const kal_uint8 JB_UP_EINT_NO;
+extern const kal_uint8 JB_DOWN_EINT_NO;
+extern const kal_uint8 JB_RIGHT_EINT_NO;
+extern const kal_uint8 JB_LEFT_EINT_NO;
+#endif//#if defined(JOGBALL_SUPPORT)
+
+#if defined(__PHONE_CLAMSHELL__) || defined(__PHONE_SLIDE__)
+extern const kal_uint8 CLAMDET_EINT_NO;
+#endif /* __PHONE_CLAMSHELL__ || __PHONE_SLIDE__ */
+
+#ifdef __USB_ENABLE__
+extern const kal_uint8 USB_EINT_NO;
+#else /* __USB_ENABLE__ */
+extern const kal_uint8 USB_EINT_NO;
+#endif /* __USB_ENABLE__ */
+
+#ifdef __BT_SUPPORT__
+extern const kal_uint8 BT_EINT_NO;
+#endif /* __BT_SUPPORT__ */
+
+#if defined(__CHARGER_USB_DETECT_WIHT_ONE_EINT__)
+extern const kal_uint8 CHR_USB_EINT_NO;
+#endif /* __CHARGER_USB_DETECT_WIHT_ONE_EINT__ */
+
+#ifdef __SWDBG_SUPPORT__
+extern const kal_uint8 SWDBG_EINT_NO;
+#endif /* __SWDBG_SUPPORT__ */
+
+#if defined(MOTION_SENSOR_SUPPORT)
+extern const kal_uint8 MOTION_SENSOR_EINT_NO;
+#endif /* MOTION_SENSOR_SUPPORT */
+
+#if defined(TOUCH_PANEL_SUPPORT) || defined(HAND_WRITING)
+extern const kal_uint8 TOUCH_PANEL_EINT_NO;
+#endif /* TOUCH_PANEL_SUPPORT || HAND_WRITING */
+
+#ifdef __WIFI_SUPPORT__
+extern const kal_uint8 WIFI_EINT_NO;
+#endif /* __WIFI_SUPPORT__ */
+
+#ifdef __OTG_DETECT_IDPIN_WITH_EINT__
+extern const kal_uint8 OTG_IDPIN_EINT_NO;
+#endif
+
+#ifdef __EXTRA_A_B_KEY_SUPPORT__
+extern const kal_uint8 EXTRA_A_KEY_EINT_NO;
+extern const kal_uint8 EXTRA_B_KEY_EINT_NO;
+#endif
+
+#ifdef __GPS_SUPPORT__
+extern const kal_uint8 GPS_EINT_NO;
+#endif /* __GPS_SUPPORT__ */
+#else /* __CUST_NEW__ */
+
+const kal_uint8 AUX_EINT_NO = 3;
+const kal_uint8 CHRDET_EINT_NO = 0;
+
+#if defined(__PHONE_CLAMSHELL__) || defined(__PHONE_SLIDE__)
+const kal_uint8 CLAMDET_EINT_NO = ?;
+#endif /* __PHONE_CLAMSHELL__ || __PHONE_SLIDE__ */
+
+#ifdef __USB_ENABLE__
+const kal_uint8 USB_EINT_NO = 0;
+#else /* __USB_ENABLE__ */
+const kal_uint8 USB_EINT_NO = EINT_CHANNEL_NOT_EXIST;
+#endif /* __USB_ENABLE__ */
+
+#ifdef __BT_SUPPORT__
+const kal_uint8 BT_EINT_NO = 4;
+#endif /* __BT_SUPPORT__ */
+
+#if defined(__CHARGER_USB_DETECT_WIHT_ONE_EINT__)
+const kal_uint8 CHR_USB_EINT_NO = 0;
+#endif /* __CHARGER_USB_DETECT_WIHT_ONE_EINT__ */
+
+#ifdef __SWDBG_SUPPORT__
+const kal_uint8 SWDBG_EINT_NO = EINT_CHANNEL_NOT_EXIST;
+#endif /* __SWDBG_SUPPORT__ */
+
+#if defined(MOTION_SENSOR_SUPPORT)
+const kal_uint8 MOTION_SENSOR_EINT_NO = 4;
+#endif /* MOTION_SENSOR_SUPPORT */
+
+#if defined(TOUCH_PANEL_SUPPORT) || defined(HAND_WRITING)
+const kal_uint8 TOUCH_PANEL_EINT_NO = 2;
+#endif /* TOUCH_PANEL_SUPPORT || HAND_WRITING */
+
+#ifdef __WIFI_SUPPORT__
+const kal_uint8 WIFI_EINT_NO = ?;
+#endif /* __WIFI_SUPPORT__ */
+
+#ifdef __OTG_DETECT_IDPIN_WITH_EINT__
+const kal_uint8 OTG_IDPIN_EINT_NO = ?;
+#endif
+
+#ifdef __EXTRA_A_B_KEY_SUPPORT__
+const kal_uint8 EXTRA_A_KEY_EINT_NO = ?;
+const kal_uint8 EXTRA_B_KEY_EINT_NO = ?;
+#endif
+
+#ifdef __GPS_SUPPORT__
+const kal_uint8 GPS_EINT_NO = EINT_CHANNEL_NOT_EXIST;
+#endif /* __WIFI_SUPPORT__ */
+
+#endif /* __CUST_NEW__ */
+
+#if defined(__CUST_NEW__) && defined(EINT0_DEBOUNCE_TIME_DELAY) && defined(EINT1_DEBOUNCE_TIME_DELAY) && defined(EINT2_DEBOUNCE_TIME_DELAY) && defined(EINT3_DEBOUNCE_TIME_DELAY)
+
+/*Unit: 10ms*/
+kal_uint8 custom_eint_sw_debounce_time_delay[EINT_MAX_CHANNEL] =
+{
+ EINT0_DEBOUNCE_TIME_DELAY,
+ EINT1_DEBOUNCE_TIME_DELAY,
+ EINT2_DEBOUNCE_TIME_DELAY,
+ EINT3_DEBOUNCE_TIME_DELAY
+};
+
+#else /* __CUST_NEW__ */
+
+/*Unit: 10ms*/
+kal_uint8 custom_eint_sw_debounce_time_delay[EINT_MAX_CHANNEL] =
+{
+ 50, /*EINT 0,500ms*/
+ 50, /*EINT 1,500ms*/
+ 50, /*EINT 2,500ms*/
+ 1
+};
+
+#endif /* __CUST_NEW__ */
+
+kal_uint8 *custom_config_eint_sw_debounce_time_delay()
+{
+ return custom_eint_sw_debounce_time_delay;
+}
+
+kal_uint8 custom_eint_get_channel(eint_channel_type type)
+{
+ switch(type)
+ {
+ case aux_eint_chann:
+ return ((kal_uint8)AUX_EINT_NO);
+
+ case chrdet_eint_chann:
+ return ((kal_uint8)CHRDET_EINT_NO);
+
+#if defined(__PHONE_CLAMSHELL__) || defined(__PHONE_SLIDE__)
+ case clamdet_eint_chann:
+ return ((kal_uint8)CLAMDET_EINT_NO);
+#endif /* __PHONE_CLAMSHELL__ || __PHONE_SLIDE__ */
+
+ case usb_eint_chann:
+ return ((kal_uint8)USB_EINT_NO);
+
+#ifdef __BT_SUPPORT__
+ case bt_eint_chann:
+ return ((kal_uint8)BT_EINT_NO);
+#endif /* __BT_SUPPORT__ */
+
+#if defined(__CHARGER_USB_DETECT_WIHT_ONE_EINT__)
+ case chr_usb_eint_chann:
+ return ((kal_uint8)CHR_USB_EINT_NO);
+#endif
+
+#ifdef __SWDBG_SUPPORT__
+ case swdbg_eint_chann:
+ return SWDBG_EINT_NO;
+#endif /* __SWDBG_SUPPORT__ */
+
+#if defined(MOTION_SENSOR_SUPPORT)
+ case motion_senosr_eint_chann:
+ return ((kal_uint8)MOTION_SENSOR_EINT_NO);
+#endif /* MOTION_SENSOR_SUPPORT */
+
+#if defined(TOUCH_PANEL_SUPPORT) || defined(HAND_WRITING)
+ case touch_panel_eint_chann:
+ return TOUCH_PANEL_EINT_NO;
+#endif /* TOUCH_PANEL_SUPPORT || HAND_WRITING */
+
+#ifdef __WIFI_SUPPORT__
+ case wifi_eint_chann:
+ return WIFI_EINT_NO;
+#endif /* __SWDBG_SUPPORT__ */
+#ifdef __TDMB_SUPPORT__
+ case tdmb_eint_chann:
+ return TDMB_EINT_NO;
+#endif /* __TDMB_SUPPORT__ */
+#ifdef __CMMB_SUPPORT__
+ case cmmb_eint_chann:
+ return CMMB_EINT_NO;
+#endif /* __CMMB_SUPPORT__ */
+#ifdef __OTG_DETECT_IDPIN_WITH_EINT__
+ case otg_idpin_eint_chann:
+ return OTG_IDPIN_EINT_NO;
+#endif /* __SWDBG_SUPPORT__ */
+
+#ifdef __EXTRA_A_B_KEY_SUPPORT__
+ case extra_a_key_eint_chann:
+ return EXTRA_A_KEY_EINT_NO;
+
+ case extra_b_key_eint_chann:
+ return EXTRA_B_KEY_EINT_NO;
+#endif
+
+#ifdef __GPS_SUPPORT__
+ case gps_eint_chann:
+ return ((kal_uint8)GPS_EINT_NO);
+#endif /* __GPS_SUPPORT__ */
+#if defined(JOGBALL_SUPPORT)
+ case jogball_up_eint_chann:
+ return JB_UP_EINT_NO;
+ case jogball_down_eint_chann:
+ return JB_DOWN_EINT_NO;
+ case jogball_right_eint_chann:
+ return JB_RIGHT_EINT_NO;
+ case jogball_left_eint_chann:
+ return JB_LEFT_EINT_NO;
+#endif /* JOGBALL_SUPPORT */
+ default:
+ ASSERT(0);
+ }
+ return 100;
+}
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/exif_custom.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/exif_custom.c
new file mode 100644
index 0000000..f6bc76e
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/exif_custom.c
@@ -0,0 +1,92 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * exif_custom.c
+ *
+ * Project:
+ * --------
+ * MT6226,MT6227,MT6228,MT6229
+ *
+ * Description:
+ * ------------
+ * This file is intends for Exif encoder.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#if (!defined(__MAUI_BASIC__)&& !defined(__L1_STANDALONE__) && defined(EXIF_SUPPORT))
+
+#include "exif.h"
+
+#define CusIFD_Encode_Number_of_Entry 2
+
+exif_ASCII* Make="N/A";
+exif_ASCII* Model="N/A";
+
+exif_extend_entry_struct Custom_Specific_Tags[CusIFD_Encode_Number_of_Entry]=
+ {
+ {EXIF_IFD0,{0x010f,EXIF_ASCII,0,&Make}}, //--Make--
+ {EXIF_IFD0,{0x0110,EXIF_ASCII,0,&Model}} //--Model--
+
+ };
+
+//--This Function Call Must be implemented always--
+exif_extend_entry_struct* exif_get_custom_specific_IFD(kal_uint8* Number_of_Entry)
+{
+/*
+ *Number_of_Entry=0;
+ return 0;
+*/
+*Number_of_Entry=CusIFD_Encode_Number_of_Entry;
+ return Custom_Specific_Tags;
+ }
+
+#else /*__MAUI_BASIC__ || __L1_STANDALONE__*/
+#include "drv_comm.h"
+#endif /*__MAUI_BASIC__ || __L1_STANDALONE__*/
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/gpio_def.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/gpio_def.h
new file mode 100644
index 0000000..f706604
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/gpio_def.h
@@ -0,0 +1,132 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * gpio_def.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file provides definition for GPIO mode, direction, pull-up/pull down
+ * enable, data inversion value.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef _GPIO_DEF_H
+#define _GPIO_DEF_H
+
+#define MODE_0 0
+#define MODE_1 1
+#define MODE_2 2
+#define MODE_3 3
+#define MODE_4 4
+#define MODE_5 5
+#define MODE_6 6
+#define MODE_7 7
+#define MODE_NC 0
+
+#define DIR_NULL 0
+#define DIR_INPUT 0
+#define DIR_OUTPUT 1
+
+#define PULL_NULL 1
+#define PULL_DISABLE 0
+#define PULL_ENABLE 1
+
+#define INV_NULL 0
+#define INV_DISABLE 0
+#define INV_ENABLE 1
+
+#define GPIO_CLK0 0
+#define GPIO_CLK1 1
+#define GPIO_CLK2 2
+#define GPIO_CLK3 3
+#define GPIO_CLK4 4
+#define GPIO_CLK5 5
+#define GPIO_CLK6 6
+#define GPIO_CLK7 7
+#define GPIO_CLK8 8
+#define GPIO_CLK9 9
+#define GPIO_CLK10 10
+#define GPIO_CLK11 11
+
+#define DCT_none_clk 0
+
+#if defined (MT6235)
+#define GPIO_CLKSRC_65mHz 0x0
+#define GPIO_CLKSRC_104mHz 0x1
+#define GPIO_CLKSRC_52mHz 0x2
+#define GPIO_CLKSRC_26mHz 0x3
+#define GPIO_CLKSRC_13mHz 0x4
+#define GPIO_CLKSRC_32kHz 0x6
+
+#elif defined (MT6256)
+#define GPIO_CLKSRC_52mHz 0xB
+#define GPIO_CLKSRC_32kHz 0xC
+
+#elif defined(MT6236)
+#define GPIO_CLKSRC_32kHz 0x40
+
+#elif defined(MT6238) || defined(MT6239)
+#define GPIO_CLKSRC_32kHz 0x6
+
+#elif defined(MT6268)
+#define GPIO_CLKSRC_32kHz 0x40
+
+#elif defined(TK6291)
+#define MD_OWNED 0
+#define AP_OWNED 1
+
+#endif
+
+#endif /* _GPIO_DEF_H */
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/gpio_drv.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/gpio_drv.c
new file mode 100644
index 0000000..ad3afe6
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/gpio_drv.c
@@ -0,0 +1,267 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * gpio.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This Module defines the GPIO driver.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#include "drv_comm.h"
+#include "reg_base.h"
+
+#ifdef __CUST_NEW__
+extern void GPIO_setting_init(void);
+kal_bool gpio_debug_enable = KAL_FALSE;
+#endif
+
+/*
+* FUNCTION
+* GPIO_init
+*
+* DESCRIPTION
+* This function is to initialize the GPIO pins as DrvTool setting.
+*
+* CALLS
+* None
+*
+* PARAMETERS
+* None
+*
+* RETURNS
+* None
+*
+* GLOBALS AFFECTED
+* external_global
+*/
+void GPIO_init(void)
+{
+
+#ifdef __CUST_NEW__
+ GPIO_setting_init();
+#endif /* __CUST_NEW__ */
+
+}
+
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/irda_custom.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/irda_custom.c
new file mode 100644
index 0000000..b705911
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/irda_custom.c
@@ -0,0 +1,219 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * irda_custom.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file implements irda customer support
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+ #ifdef __IRDA_SUPPORT__
+#include "drv_comm.h"
+//#include "gpio_sw.h"
+#include "irda_sw.h"
+#include "reg_base.h"
+#include "dcl.h"
+/************************************************************
+ device descriptor parameters
+*************************************************************/
+kal_uint8 device_info[17] = {
+/* hint bits set for COMM, OBEX, LAN, IRMC, TRAN-P
+*/
+ 0xb1, /* set pnp, Modem, Fax and extension bit */
+ 0x25, /* set IrOBEX hint bit and IrCOMM hint bit */
+ 0x00, /* char set = 0 */
+ //'W','C','P','1','C','S','I','I','I',' ', 0x00,
+ 'M','e','d','i','a','T','e','k',' ','I','n','c',' ',0x00,
+};
+/************************************************************
+ customization functinos
+*************************************************************/
+kal_uint8 *irda_get_device_info(void)
+{
+ return (device_info);
+}
+kal_uint16 irda_get_device_info_size(void)
+{
+ return (sizeof(device_info));
+}
+/*The following are for SIR/MIR/FIR mode switch according to
+ different IRDA transceiver*/
+#define IR_TRANSCEIVER_PDN (IRDA_base+0x003c)
+#define __IRDA_AGILENT_3220__
+//#undef __IRDA_AGILENT_3220__
+#if defined(__IRDA_VISHAY_6102__)
+ #ifdef __CUST_NEW__
+ extern const char gpio_irda_mode_switch_pin;
+ #define IRDA_GPIO_MODE_SWITCH gpio_irda_mode_switch_pin
+ #else /* __CUST_NEW__ */
+ #define IRDA_GPIO_MODE_SWITCH 40
+ #endif /* __CUST_NEW__ */
+#endif /* defined(__IRDA_VISHAY_6102__) */
+
+//kal_uint32 test_delay=20;
+#define irda_test_delay 60
+kal_uint8 irda_get_mode_gpio(void)
+{
+#if defined(__IRDA_VISHAY_6102__)
+ return (IRDA_GPIO_MODE_SWITCH);
+#else
+ return 0;
+#endif /* defined(__IRDA_VISHAY_6102__) */
+}
+
+void irda_delay(kal_uint32 count)
+{
+ kal_uint32 i;
+ for(i=0;i<count;i++){};
+}
+void irda_switch_to_sir(void)
+{
+#if defined(__IRDA_VISHAY_6102__)
+ /*Vishay 6614*/
+ DCL_HANDLE handle;
+ handle=DclGPIO_Open(DCL_GPIO,IRDA_GPIO_MODE_SWITCH);
+ #ifndef __CUST_NEW__
+ //GPIO_ModeSetup(IRDA_GPIO_MODE_SWITCH, 0);
+ DclGPIO_Control(handle,GPIO_CMD_SET_MODE_0,0);
+
+ //GPIO_InitIO(OUTPUT, IRDA_GPIO_MODE_SWITCH);
+ DclGPIO_Control(handle,GPIO_CMD_SET_DIR_OUT,0);
+ #endif /* __CUST_NEW__ */
+ //GPIO_WriteIO(0, IRDA_GPIO_MODE_SWITCH);
+ DclGPIO_Control(handle,GPIO_CMD_WRITE_LOW,0);
+ DclGPIO_Close(handle);
+#elif defined(__IRDA_AGILENT_3220__)||defined(__IRDA_VISHAY_6614__)
+ #if 0
+/* under construction !*/
+/* under construction !*/
+ #ifndef __CUST_NEW__
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #endif /* __CUST_NEW__ */
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+ #endif
+ DRV_WriteReg(IR_TRANSCEIVER_PDN,0x1);
+ irda_delay(irda_test_delay);
+ DRV_WriteReg(IR_TRANSCEIVER_PDN,0x5);
+ irda_delay(irda_test_delay);
+ DRV_WriteReg(IR_TRANSCEIVER_PDN,0x4);
+ irda_delay(irda_test_delay);
+ DRV_WriteReg(IR_TRANSCEIVER_PDN,0x0);
+#endif
+}
+void irda_switch_to_mir(void)
+{
+ /*Vishay 6614*/
+#if defined(__IRDA_VISHAY_6102__)
+ DCL_HANDLE handle;
+ handle=DclGPIO_Open(DCL_GPIO,IRDA_GPIO_MODE_SWITCH);
+
+ //GPIO_WriteIO(1, IRDA_GPIO_MODE_SWITCH);
+ DclGPIO_Control(handle,GPIO_CMD_WRITE_HIGH,0);
+ DclGPIO_Close(handle);
+#elif defined(__IRDA_VISHAY_6614__)
+ DRV_WriteReg(IR_TRANSCEIVER_PDN,0x1);
+ irda_delay(irda_test_delay);
+ DRV_WriteReg(IR_TRANSCEIVER_PDN,0x7);
+ irda_delay(irda_test_delay);
+ DRV_WriteReg(IR_TRANSCEIVER_PDN,0x6);
+ irda_delay(irda_test_delay);
+ DRV_WriteReg(IR_TRANSCEIVER_PDN,0x4);
+ irda_delay(irda_test_delay);
+ DRV_WriteReg(IR_TRANSCEIVER_PDN,0x0);
+#endif
+}
+void irda_switch_to_fir(void)
+{
+#if defined(__IRDA_VISHAY_6102__)
+ /*Vishay 6614*/
+ DCL_HANDLE handle;
+ handle=DclGPIO_Open(DCL_GPIO,IRDA_GPIO_MODE_SWITCH);
+
+ //GPIO_WriteIO(1, IRDA_GPIO_MODE_SWITCH);
+ DclGPIO_Control(handle,GPIO_CMD_WRITE_HIGH,0);
+ DclGPIO_Close(handle);
+ /*Vishay 6102, Anilent 3220*/
+#elif defined(__IRDA_AGILENT_3220__)||defined(__IRDA_VISHAY_6614__)
+ DRV_WriteReg(IR_TRANSCEIVER_PDN,0x1);
+ irda_delay(irda_test_delay);
+ DRV_WriteReg(IR_TRANSCEIVER_PDN,0x7);
+ irda_delay(irda_test_delay);
+ DRV_WriteReg(IR_TRANSCEIVER_PDN,0x6);
+ irda_delay(irda_test_delay);
+ DRV_WriteReg(IR_TRANSCEIVER_PDN,0x4);
+ irda_delay(irda_test_delay);
+ DRV_WriteReg(IR_TRANSCEIVER_PDN,0x0);
+#endif
+}
+
+const irda_customize_function_struct irda_custom_func=
+{
+ irda_switch_to_sir,
+ irda_switch_to_mir,
+ irda_switch_to_fir
+};
+
+const irda_customize_function_struct *irda_GetFunc(void)
+{
+ return (&irda_custom_func);
+}
+
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/keypad_def.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/keypad_def.c
new file mode 100644
index 0000000..1e3cdaa
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/keypad_def.c
@@ -0,0 +1,455 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * keypad_def.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is defined for keypad table
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#include "drv_comm.h"
+#include "kbd_table.h"
+#include "reg_base.h"
+#include "keypad_sw.h"
+#include "keypad_hw.h"
+#include "gpio_sw.h"
+#ifdef __CUST_NEW__
+#include "keypad_drv.h"
+#endif /*__CUST_NEW__*/
+
+#if !defined(DRV_KBD_NOT_EXIST)
+const keypad_struct *keypad_Get_Data(void);
+
+#ifdef __KBD_2STEP_KEY_SUPPORT__
+kal_bool keypad_check_fullpress(void);
+kal_bool keypad_is_fullpress(kal_uint8 key);
+#endif
+#ifdef __CUST_NEW__
+ #define Custom_Keypress_Period KEY_PRESS_PERIOD
+ kal_uint8 powerkey_position=POWERKEY_POSITION;
+
+ #ifdef __KBD_2STEP_KEY_SUPPORT__
+ /*the first key*/
+ #define Custom_2Step_Key_Position TWO_STEP_KEY
+ /*the second key for detection*/
+ #define CUSTOM_2STEP_SEC_KEY_ROW SECOND_KEY_ROW
+ #define CUSTOM_2STEP_SEC_KEY_COL SECOND_KEY_COLUMN
+ #endif
+#else /*__CUST_NEW__*/
+ #define Custom_Keypress_Period 2500
+ kal_uint8 powerkey_position=DEVICE_KEY_END;
+ #ifdef __KBD_2STEP_KEY_SUPPORT__
+ /*the first key*/
+ #define Custom_2Step_Key_Position DEVICE_KEY_FUNCTION
+ /*the second key for detection*/
+ #define CUSTOM_2STEP_SEC_KEY_ROW 5
+ #define CUSTOM_2STEP_SEC_KEY_COL 0
+ #endif
+#endif /*__CUST_NEW__*/
+const keypad_struct keypad_custom_def = {
+ /*keypad mapping*/
+ {
+ #ifndef __CUST_NEW__
+ /* row 0 */
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_END,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+
+ /* row 1 */
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_END,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+
+ /* row 2 */
+ DEVICE_KEY_1,
+ DEVICE_KEY_2,
+ DEVICE_KEY_3,
+ DEVICE_KEY_SEND,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_VOL_UP,
+ DEVICE_KEY_END,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+
+ /* row 3 */
+ DEVICE_KEY_4,
+ DEVICE_KEY_5,
+ DEVICE_KEY_6,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_VOL_DOWN,
+ DEVICE_KEY_END,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+
+ /* row 4 */
+ DEVICE_KEY_7,
+ DEVICE_KEY_8,
+ DEVICE_KEY_9,
+ DEVICE_KEY_SK_LEFT,
+ DEVICE_KEY_UP,
+ DEVICE_KEY_SK_RIGHT,
+ DEVICE_KEY_END,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+
+ /* row 5 */
+ DEVICE_KEY_STAR,
+ DEVICE_KEY_0,
+ DEVICE_KEY_HASH,
+ DEVICE_KEY_LEFT,
+ DEVICE_KEY_DOWN,
+ DEVICE_KEY_RIGHT,
+ DEVICE_KEY_END,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+
+ /* row 6 */
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+
+ /* row 7 */
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+ DEVICE_KEY_NONE,
+
+ #else /* __CUST_NEW__ */
+ KEYPAD_MAPPING
+ #endif /* __CUST_NEW__ */
+ },
+ /*power on period*/
+ Custom_Keypress_Period,
+ /*powerkey position*/
+ #ifdef __CUST_NEW__
+ POWERKEY_POSITION
+ #else /* __CUST_NEW__ */
+ /*powerkey position*/
+ DEVICE_KEY_END
+ #endif /* __CUST_NEW__ */
+ };
+const keypad_customize_function_struct keypad_custom_func=
+{
+ keypad_Get_Data
+#ifdef __KBD_2STEP_KEY_SUPPORT__
+ ,keypad_is_fullpress,
+ keypad_check_fullpress
+#endif
+};
+const keypad_customize_function_struct *keypad_GetFunc(void)
+{
+ return (&keypad_custom_func);
+}
+const keypad_struct *keypad_Get_Data(void)
+{
+ return (&keypad_custom_def);
+}
+kal_uint32 Customer_Period_Period(void)
+{
+ return ((kal_uint32) Custom_Keypress_Period);
+}
+
+#ifdef __KBD_2STEP_KEY_SUPPORT__
+/*************************************************************************
+* FUNCTION
+* keypad_is_fullpress
+*
+* DESCRIPTION
+* This function is to check if this is a 2step key
+*
+* PARAMETERS
+* key
+*
+* RETURNS
+* True or False
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+kal_bool keypad_is_fullpress(kal_uint8 key)
+{
+ if(key==Custom_2Step_Key_Position)
+ return KAL_TRUE;
+ else
+ return KAL_FALSE;
+}
+/*************************************************************************
+* FUNCTION
+* keypad_check_fullpress
+*
+* DESCRIPTION
+* This function is to check if 2step key is pressed
+*
+* PARAMETERS
+* none
+*
+* RETURNS
+* True or False
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+kal_bool keypad_check_fullpress(void)
+{
+ kal_uint16 iKey;
+ kal_uint16 key_reg, key_bit, key_status;
+
+ iKey = CUSTOM_2STEP_SEC_KEY_ROW * 9 + CUSTOM_2STEP_SEC_KEY_COL;
+ key_reg = iKey / 16;
+ key_bit = 0x0001 << (iKey & 0xF);
+
+ switch (key_reg) {
+ case low_key:
+ key_status = DRV_Reg(KP_LOW_KEY);
+ break;
+
+#if defined(DRV_KBD_32KEYS_ABOVE)
+ case medium_key:
+ key_status = DRV_Reg(KP_MID_KEY);
+ break;
+#endif
+
+#if defined(DRV_KBD_48KEYS_ABOVE)
+ case medium_key:
+ key_status = DRV_Reg(KP_MID_KEY);
+ break;
+
+ case medium_key1:
+ key_status = DRV_Reg(KP_MID1_KEY);
+ break;
+#endif
+
+#if defined(DRV_KBD_64KEYS_ABOVE)
+ case medium_key:
+ key_status = DRV_Reg(KP_MID_KEY);
+ break;
+
+ case medium_key1:
+ key_status = DRV_Reg(KP_MID1_KEY);
+ break;
+
+ case medium_key2:
+ key_status = DRV_Reg(KP_MID2_KEY);
+ break;
+#endif
+
+ case high_key:
+ key_status = DRV_Reg(KP_HI_KEY);
+ break;
+
+ default:
+ ASSERT(0);
+ break;
+ }
+
+ if ((DRV_Reg(KP_STS) & KP_STS_KEYPRESS) && ((~key_status) & key_bit)) {
+ return KAL_TRUE;
+ }else {
+ return KAL_FALSE;
+ }
+}
+#endif
+
+#else //define (DRV_KBD_NOT_EXIST)
+kal_uint32 Customer_Period_Period(void) { return 0; } //for bmt_main.c
+const keypad_struct keypad_custom_def = {{DEVICE_KEY_NONE},0,0};
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/motion_sensor_hw_define.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/motion_sensor_hw_define.h
new file mode 100644
index 0000000..a0a3889
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/motion_sensor_hw_define.h
@@ -0,0 +1,80 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * motion_sensor_hw_define.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This Module defines GPIO for serial interface.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef MOTION_SENSOR_HW_DEFINE_H
+#define MOTION_SENSOR_HW_DEFINE_H
+
+// How is Motion Sensor mounted ?
+//#define MOTION_SENSOR_FRONT_0
+#define MOTION_SENSOR_FRONT_90
+//#define MOTION_SENSOR_FRONT_180
+//#define MOTION_SENSOR_FRONT_270
+//#define MOTION_SENSOR_BACK_0
+//#define MOTION_SENSOR_BACK_90
+//#define MOTION_SENSOR_BACK_180
+//#define MOTION_SENSOR_BACK_270
+
+#if defined(MXC6202_I2C)
+ //define slave address
+ #define MXC62020
+#endif
+
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/msdc_custom.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/msdc_custom.c
new file mode 100644
index 0000000..c890007
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/msdc_custom.c
@@ -0,0 +1,218 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * msdc_custom.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file implements msdc customer support
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ ****************************************************************************/
+#include "drv_comm.h"
+#include "msdc_api.h"
+
+// it only apply to the SD card io control
+static const msdc_io_ctrl_struct msdc_io_ctrl_sd_custom =
+{
+ MSDC_ODC_8MA, // driving capacity of CMD/BS and SCLK
+ MSDC_ODC_8MA, // driving capacity of data lines
+ MSDC_ODC_SLEW_FAST, // slew rate of CMD/BS and SCLK
+ MSDC_ODC_SLEW_FAST // slew rate of data lines
+};
+
+#if defined(__MSDC_SD_MMC__) && defined(__MSDC2_SD_MMC__)&& !defined(__MSDC_SD_SDIO__)
+static const kal_uint32 msdc_custom = (MSDC_HOT_PLUG|MSDC_WP|MSDC2_HOT_PLUG|MSDC2_WP);
+#elif defined(__MSDC_SD_SDIO__) && defined(__MSDC2_SD_MMC__)
+static const kal_uint32 msdc_custom = (MSDC2_HOT_PLUG|MSDC2_WP|MSDC_SDIO4_SD1);
+#elif defined(__MSDC_SD_MMC__) && defined(__MSDC2_SD_SDIO__)
+static const kal_uint32 msdc_custom = (MSDC_HOT_PLUG|MSDC_WP|MSDC_SD4_SDIO1);
+#else
+static const kal_uint32 msdc_custom = (MSDC_HOT_PLUG|MSDC_WP|MSDC2_HOT_PLUG|MSDC2_WP);
+#endif
+
+kal_uint8 MSDC_GetIOCtrlParam(void)
+{
+ kal_uint8 reg = 0;
+
+ reg = (msdc_io_ctrl_sd_custom.dat_slew << 7) | (msdc_io_ctrl_sd_custom.cmd_clk_slew << 6)
+ |(msdc_io_ctrl_sd_custom.dat_odc<<3)|(msdc_io_ctrl_sd_custom.cmd_clk_odc);
+ return reg;
+}
+
+/*
+ We provide this API because that memory card's layout affect the signal,
+ customer can use this API to tuning the suitable DLT when their layout did need.
+ In addition to solve the bad layout, we can also try to set a higher clk and tuning the DLT here,
+ so that we can run in high CLK stablely.
+
+*/
+kal_int8 MSDC_GetDLTFromOPCLK(kal_uint32 opClk, kal_uint8 *setRED)
+{
+ *setRED = 0;
+
+ if(1000 > opClk) //this means we use a CLK < 1Mhz, should be used to initialize a card
+ return 0xf0;
+ switch(opClk){
+ case 45500: //45.5 MHz CLK, this should be only used on MT6268 with second CLK source
+ *setRED = 1;
+ return 2;
+ break;
+ case 22750: //22.75 MHz CLK, this should be only used on MT6268 with second CLK source
+ return 4;
+ break;
+ case 30500: //30.5 MHz CLK, this should be only used on MT6268 with first CLK source
+ return 4;
+ case 15250: //15.25 MHz CLK, this should be only used on MT6268 with first CLK source
+ return 4;
+ break;
+ default: //deafult return a non-zero value
+ return 1;
+ break;
+ }
+
+}
+
+
+#if defined(__MSDC2_SD_MMC__) || defined(__MSDC2_SD_SDIO__)
+
+static const msdc_io_ctrl_struct msdc_io_ctrl_sd_custom2 =
+{
+ MSDC_ODC_8MA, // driving capacity of CMD/BS and SCLK
+ MSDC_ODC_8MA, // driving capacity of data lines
+ MSDC_ODC_SLEW_FAST, // slew rate of CMD/BS and SCLK
+ MSDC_ODC_SLEW_FAST // slew rate of data lines
+};
+
+kal_uint8 MSDC_GetIOCtrlParam2(void)
+{
+ kal_uint8 reg = 0;
+
+ reg = (msdc_io_ctrl_sd_custom2.dat_slew << 7) | (msdc_io_ctrl_sd_custom2.cmd_clk_slew << 6)
+ |(msdc_io_ctrl_sd_custom2.dat_odc<<3)|(msdc_io_ctrl_sd_custom2.cmd_clk_odc);
+ return reg;
+}
+#endif // __MSDC2_SD_MMC__
+
+kal_uint32 MSDC_GetCustom(void)
+{
+ return msdc_custom;
+}
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/mt6306_custom.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/mt6306_custom.h
new file mode 100644
index 0000000..84f28a8
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/mt6306_custom.h
@@ -0,0 +1,150 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * MT6302_custom.h
+ *
+ * Project:
+ * --------
+ * Gemini
+ *
+ * Description:
+ * ------------
+ * this file is the header file of MT6302 custom control
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef __MT6306_CUSTOM_H__
+#define __MT6306_CUSTOM_H__
+
+#define MT6306_CLK_GPIO_NO gpio_sim_switch_clk_pin
+#define MT6306_DAT_GPIO_NO gpio_sim_switch_dat_pin
+
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/parameter_data_file.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/parameter_data_file.h
new file mode 100644
index 0000000..df2783a
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/parameter_data_file.h
@@ -0,0 +1,100 @@
+#ifndef PARAMETER_DATA_FILE_H
+#define PARAMETER_DATA_FILE_H
+
+#define TWOMICNR_INIT_PARA_LENGTH 29
+
+unsigned char parameter_data_Init[] = {
+ 0xC0,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x52, 0x00, 0x13,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x60, 0x00, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x70, 0x05, 0xC0,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x3A, 0x00, 0x00
+};
+
+#define TWOMICNR_BYPASS_PARA_LENGTH 64
+
+unsigned char parameter_data_bypass_mode[] = {
+ 0xC0,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x34, 0x00, 0x22,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x36, 0x00, 0x1D,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x4A, 0x00, 0x22,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x4C, 0x00, 0x1D,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x3D, 0x01, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x52, 0x00, 0x13,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x60, 0x00, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x70, 0x05, 0xC0,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x3A, 0x00, 0x00
+};
+
+#define TWOMICNR_HANDSET_PARA_LENGTH 134
+
+unsigned char parameter_data_handset_mode[] = {
+ 0xC0,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x34, 0x00, 0xCA,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x3D, 0x02, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x45, 0x01, 0x0F,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x46, 0x00, 0x14,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x47, 0x18, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x57, 0x7F, 0xFF,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x60, 0x00, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x70, 0x05, 0xC0,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xDA, 0x54, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xB3, 0x10, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xB4, 0x10, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xB6, 0x10, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xCE, 0x70, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xCF, 0x04, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1F, 0x0A, 0x01, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1F, 0x0B, 0x00, 0xB0,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x63, 0x00, 0x03,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x52, 0x00, 0x13,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x3A, 0x00, 0x00
+};
+
+#define TWOMICNR_HANDFREE_PARA_LENGTH 281
+
+unsigned char parameter_data_handfree_mode[] = {
+ 0xC0,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x30, 0x02, 0x31,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x34, 0x00, 0x6B,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x3D, 0x04, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x41, 0x01, 0x01,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x44, 0x00, 0x81,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x45, 0x03, 0xCF,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x46, 0x00, 0x11,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x4D, 0x03, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x60, 0x00, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x63, 0x00, 0x03,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x70, 0x05, 0xC0,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x88, 0x38, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x89, 0x00, 0x01,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x8B, 0x00, 0x80,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x8C, 0x00, 0x10,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x92, 0x38, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xA0, 0x10, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xBC, 0x68, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xBD, 0x01, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xBF, 0x70, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xC0, 0x26, 0x80,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xC1, 0x10, 0x80,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xC5, 0x2B, 0x06,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xC6, 0x0C, 0x1F,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xC8, 0x28, 0x79,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xC9, 0x65, 0xAB,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xCA, 0x40, 0x26,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xCB, 0x7F, 0xFF,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xCC, 0x7F, 0xFE,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xF8, 0x04, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xF9, 0x01, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0xFF, 0x4B, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1F, 0x00, 0x7F, 0xFF,
+ 0xFC, 0xF3, 0x3B, 0x1F, 0x0A, 0x0A, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1F, 0x0C, 0x01, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1F, 0x0D, 0x78, 0x00,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x86, 0x00, 0x07,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x87, 0x00, 0x03,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x52, 0x00, 0x13,
+ 0xFC, 0xF3, 0x3B, 0x1E, 0x3A, 0x00, 0x00
+};
+
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pmic_custom.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pmic_custom.c
new file mode 100644
index 0000000..a5a202a
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pmic_custom.c
@@ -0,0 +1,94 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * pmic_custom.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This Module defines the pmic customization settings
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#if defined(MT6327)
+#include "kal_public_api.h" //MSBB change #include "kal_release.h"
+#include "dcl_pmu_common_sw.h"
+
+void pmic6327_customization_init(void)
+{
+ /* Customization */
+#ifdef __FUE__
+
+#else
+
+#endif
+ /* End of customization */
+}
+
+#endif // End of #if defined(MT6327)
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pmu_custom.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pmu_custom.c
new file mode 100644
index 0000000..d4b5b40
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pmu_custom.c
@@ -0,0 +1 @@
+/* This file can be deleted */
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pwmdrv.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pwmdrv.c
new file mode 100644
index 0000000..70a30eb
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pwmdrv.c
@@ -0,0 +1,215 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * pwmdrv.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is defined for external interrupt channel.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#include "drv_comm.h"
+#include "pwm_sw.h"
+#include "custom_hw_default.h"
+//#include "kal_non_specific_general_types.h"
+#include "stack_config.h"
+#include "rwg_sw.h"
+#include "dcl.h"
+
+void PWM_initialize(void)
+{
+#if 0
+#if 0
+#if ( (defined(MT6205)) || (defined(MT6208)) || (defined(FPGA)))
+/* under construction !*/
+#endif /*(MT6205,MT6208)*/
+#if ( (defined(MT6205B)) || (defined(MT6218)) )
+/* under construction !*/
+/* under construction !*/
+#endif /*(MT6205B,MT6218)*/
+#endif
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#if defined(DRV_PWM_PWM2)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+/* under construction !*/
+#if defined(DRV_PWM_PWM3)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif//#if defined(DRV_PWM_PWM3)
+#endif /* end of __LTE_SM__ */
+
+}
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pxs_custom.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pxs_custom.c
new file mode 100644
index 0000000..d2a7f55
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pxs_custom.c
@@ -0,0 +1,104 @@
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * pxs_custom.c
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ *
+ * PXS driver custom file
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *******************************************************************************/
+
+#if defined(__PXS_CM3623__)
+#include "kal_public_api.h" //MSBB change #include "kal_release.h"
+#include "pxs_cm3623.h"
+#include "pxs_custom.h"
+#include "drv_comm.h"
+
+
+
+static kal_uint16 cm3623_thrshold_array[]=
+{
+ 10,
+ 4
+
+};
+
+kal_bool cm3623_sensitivity_level_num(kal_uint16 *pData)
+{
+ *pData = sizeof(cm3623_thrshold_array)/sizeof(kal_uint16);
+ return KAL_TRUE;
+}
+
+kal_bool cm3623_get_sensitivity_table(kal_uint16 **pData)
+{
+ *pData = &cm3623_thrshold_array[0];
+ return KAL_TRUE;
+}
+
+
+kal_bool cm3623_power_enable(kal_bool enable)
+{
+
+//#if defined(LUFFY76V2_DEMO_BB)
+ {
+ // Only for Luffy76 V2
+ // Luffy76 V2 PXS SDA use GPIO101
+ // GPIO101 GPIO mode pull HIGH is controlled by MSDC2 (From 1 to 3)
+ // So we need to configure MSDC1 controller to enable pull HIGH (I2C open gain)
+ kal_uint32 val32;
+
+ // Clear MSDC1 clock gating
+ DRV_WriteReg(0x610D0320, 0x200);
+ // Configure MSDC1 controller to enable PULL HIGH functionality
+ val32 = DRV_Reg32(0x60120018);
+ val32 &= ~(0x00000700);
+ val32 |= (0x00000200);
+ DRV_WriteReg32(0x60120018, val32);
+ }
+//#endif // #if defined(LUFFY76V2_DEMO_BB)
+ return KAL_TRUE;
+}
+
+//kal_uint16 cm3623_get_pxs_threshold(void)
+//{
+// return CM3623_PXS_THRESHOLD;
+//}
+
+
+kal_bool pxs_custom_hw_cmd_handler(PXS_HW_CMD_ENUM cmd, void *pData)
+{
+ switch (cmd)
+ {
+ case PXS_HW_CMD_POWER_ENABLE:
+ return cm3623_power_enable(*((kal_bool *)pData));
+ break;
+ case PXS_HW_CMD_GET_SENSITIVITY_LEVEL_NUM:
+ return cm3623_sensitivity_level_num((kal_uint16 *)pData);
+ break;
+ case PXS_HW_CMD_GET_SENSITIVITY_TABLE:
+ return cm3623_get_sensitivity_table((kal_uint16 **)pData);
+ break;
+ default:
+ return KAL_FALSE;
+ //break;
+ }
+}
+
+
+extern kal_uint16 cm3623_get_pxs_sensitivity_level_num(void);
+extern kal_uint16 *cm3623_get_pxs_sensitivity_level_table(void);
+
+
+
+#endif // #if defined(__PXS_CM3623__)
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pxs_custom.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pxs_custom.h
new file mode 100644
index 0000000..bad40e0
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/pxs_custom.h
@@ -0,0 +1,71 @@
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * pxs_custom.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ *
+ * PXS driver custom header file
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *******************************************************************************/
+#if defined(__PXS_CM3623__)
+#include "kal_public_api.h" //MSBB change #include "kal_release.h"
+#include "drv_comm.h"
+#include "dcl.h"
+
+// Use GPIO to simulate I2C communication interface
+#define USE_SW_I2C
+
+// Use HW I2C
+//#define USE_HW_I2C
+
+
+#if defined(USE_SW_I2C)
+extern const char gpio_pxs_i2c_scl_pin;
+extern const char gpio_pxs_i2c_sda_pin;
+
+//#define CM3623_SCL gpio_pxs_scl_pin
+//#define CM3623_SDA gpio_pxs_sda_pin
+
+#define CM3623_SCL gpio_pxs_i2c_scl_pin
+#define CM3623_SDA gpio_pxs_i2c_sda_pin
+
+#define SCL_GPIO_MODE() DclGPIO_Control(pxs_scl_gpio_dcl_handle,GPIO_CMD_SET_MODE_0,0); //GPIO_ModeSetup(CM3623_SCL, 0)
+#define SCL_HIGH() DclGPIO_Control(pxs_scl_gpio_dcl_handle,GPIO_CMD_WRITE_HIGH,0); //GPIO_WriteIO(1, CM3623_SCL)
+#define SCL_LOW() DclGPIO_Control(pxs_scl_gpio_dcl_handle,GPIO_CMD_WRITE_LOW,0); //GPIO_WriteIO(0, CM3623_SCL)
+#define SCL_OUTPUT() DclGPIO_Control(pxs_scl_gpio_dcl_handle,GPIO_CMD_SET_DIR_OUT,0); //GPIO_InitIO(GPIO_DIR_OUTPUT, CM3623_SCL)
+#define SDA_GPIO_MODE() DclGPIO_Control(pxs_sda_gpio_dcl_handle,GPIO_CMD_SET_MODE_0,0); //GPIO_ModeSetup(CM3623_SDA, 0)
+#define SDA_HIGH() DclGPIO_Control(pxs_sda_gpio_dcl_handle,GPIO_CMD_WRITE_HIGH,0); //GPIO_WriteIO(1, CM3623_SDA)
+#define SDA_LOW() DclGPIO_Control(pxs_sda_gpio_dcl_handle,GPIO_CMD_WRITE_LOW,0); //GPIO_WriteIO(0, CM3623_SDA)
+#define SDA_OUTPUT() DclGPIO_Control(pxs_sda_gpio_dcl_handle,GPIO_CMD_SET_DIR_OUT,0); //GPIO_InitIO(GPIO_DIR_OUTPUT, CM3623_SDA)
+#define SDA_INPUT() DclGPIO_Control(pxs_sda_gpio_dcl_handle,GPIO_CMD_SET_DIR_IN,0); //GPIO_InitIO(GPIO_DIR_INPUT, CM3623_SDA)
+#define SDA_VAL() pxs_GPIO_ReadIO(pxs_sda_gpio_dcl_handle) //GPIO_ReadIO(CM3623_SDA)
+
+#endif // #if defined(USE_SW_I2C)
+
+// PXS EINT
+extern const unsigned char PXS_EINT_NO;
+#define CM3623_EINT PXS_EINT_NO
+
+
+//extern kal_bool cm3623_power_enable(kal_bool enable);
+//extern kal_uint16 cm3623_get_pxs_threshold(void);
+//extern kal_uint16 cm3623_get_pxs_sensitivity_level_num(void);
+//extern kal_uint16 *cm3623_get_pxs_sensitivity_level_table(void);
+
+extern kal_bool pxs_custom_hw_cmd_handler(PXS_HW_CMD_ENUM cmd, void *pData);
+
+
+
+#endif // #if defined(__PXS_CM3623__)
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/sccb_v2_custom.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/sccb_v2_custom.h
new file mode 100644
index 0000000..930831c
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/sccb_v2_custom.h
@@ -0,0 +1,138 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * sccb_v2_custom.c
+ *
+ *
+ * Description:
+ * ------------
+ * SCCB/I2C V2 Driver
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
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+ *
+ * removed!
+ * removed!
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+ * removed!
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+ * removed!
+ *
+ * removed!
+ * removed!
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+ *
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+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ *****************************************************************************/
+//#if (defined(_USE_SCCB_V2_DRIVER_))
+#if (defined(DRV_I2C_25_SERIES))
+
+typedef enum
+{
+ SCCB_OWNER_CAMERA=0,
+ SCCB_OWNER_FM,
+ SCCB_OWNER_TP,
+ SCCB_OWNER_MS,
+ SCCB_NUM_OF_OWNER
+}SCCB_OWNER;
+
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/touch_panel_custom.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/touch_panel_custom.c
new file mode 100644
index 0000000..a2317e2
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/touch_panel_custom.c
@@ -0,0 +1,920 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * keypad_def.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is defined for keypad table
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
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+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#if defined(TOUCH_PANEL_SUPPORT) || defined(HAND_WRITING)
+#include "drv_features.h"
+#include "drv_comm.h"
+#include "eint.h"
+#include "touch_panel_custom.h"
+#include "touch_panel.h"
+#include "touch_panel_spi.h"
+
+
+TouchPanel_custom_data_struct tp_custom_data_def =
+{
+#if defined(DRV_TOUCH_PANEL_CUSTOMER_PARAMETER)
+ TS_DEBOUNCE_TIME,
+ TOUCH_PANEL_CALI_CHECK_OFFSET,
+ MIN_PEN_MOVE_OFFSET,
+ HAND_WRITING_MAX_OFFSET,
+ NONHAND_WRITING_MAX_OFFSET,
+ MAX_STROKE_MOVE_OFFSET,
+ TOUCH_PRESSURE_THRESHOLD_HIGH,
+#if defined(DRV_TOUCH_PANEL_MULTIPLE_PICK)
+ MULTIPLE_POINT_SELECTION,
+#endif //#if defined(DRV_TOUCH_PANEL_MULTIPLE_PICK)
+#if defined(__DRV_TP_DISCARD_SHIFTING__)
+ PRESSURE_CHECK_BOUNDARY,
+ PRESSURE_SHIFTING_BOUNDARY,
+#endif //#if defined(__DRV_TP_DISCARD_SHIFTING__)
+#endif //#if defined(DRV_TOUCH_PANEL_CUSTOMER_PARAMETER)
+ TOUCH_PANEL_FILTER_THRESOLD,
+ /*ADC*/
+ TOUCH_PANEL_ADC_X_START,
+ TOUCH_PANEL_ADC_X_END,
+ TOUCH_PANEL_ADC_Y_START,
+ TOUCH_PANEL_ADC_Y_END,
+ /*Coord.*/
+ TOUCH_PANEL_COORD_X_START,
+ TOUCH_PANEL_COORD_X_END,
+ TOUCH_PANEL_COORD_Y_START,
+ TOUCH_PANEL_COORD_Y_END,
+ /*Size.*/
+ TOUCH_PANEL_X_MILLIMETER,
+ TOUCH_PANEL_Y_MILLIMETER,
+ /*eint level*/
+ TOUCH_PANEL_EINT_DOWN_LEVEL
+};
+
+#if defined(DRV_TP_NO_EXT_EINT)
+
+extern void tp_read_adc(kal_int16 *x, kal_int16 *y);
+extern void tp_irq_enable(kal_bool on);
+#ifdef TOUCH_PANEL_PRESSURE
+ extern kal_bool tp_pressure_check(void);
+#endif /*TOUCH_PANEL_PRESSURE*/
+
+const kal_int16 touch_panel_filter_thresold = TOUCH_PANEL_FILTER_THRESOLD;
+#ifdef TOUCH_PANEL_PRESSURE
+ const kal_uint16 touch_pressure_threshold_high = TOUCH_PRESSURE_THRESHOLD_HIGH;
+ const kal_uint16 touch_pressure_threshold_low = TOUCH_PRESSURE_THRESHOLD_LOW;
+#endif /*TOUCH_PANEL_PRESSURE*/
+
+#else // #if defined(DRV_TP_NO_EXT_EINT)
+
+void tp_read_adc(kal_int16 *x, kal_int16 *y)
+{
+#if !defined(__TOUCH_PANEL_CAPACITY__)
+ kal_uint8 command=0, retry;
+ kal_int16 temp_x=0, temp_y=0, diff_x=0, diff_y=0;
+
+ for(retry=0;retry<TOUCH_PANEL_RETRY;retry++)
+ {
+ /*Y ADC*/
+ command=TOUCH_PANEL_START_BIT|TOUCH_PANEL_X_PLUS|TOUCH_PANEL_12BIT_SAMPLE|
+ TOUCH_PANEL_DIFF_MODE;
+ serial_write_data(command);
+ *y=serial_read_data();
+
+ /*X ADC*/
+ command=TOUCH_PANEL_START_BIT|TOUCH_PANEL_Y_PLUS|TOUCH_PANEL_12BIT_SAMPLE|
+ TOUCH_PANEL_DIFF_MODE;
+ serial_write_data(command);
+ *x=serial_read_data();
+
+ if(temp_x==0&&temp_y==0)
+ {
+ temp_x=*x;
+ temp_y=*y;
+ }
+ else
+ {
+ diff_x=temp_x-*x;
+ diff_y=temp_y-*y;
+ if(diff_x>TOUCH_PANEL_FILTER_THRESOLD||diff_x<-TOUCH_PANEL_FILTER_THRESOLD
+ ||diff_y>TOUCH_PANEL_FILTER_THRESOLD||diff_y<-TOUCH_PANEL_FILTER_THRESOLD)
+ {
+ temp_x=*x;
+ temp_y=*y;
+ *x=4095;
+ *y=4095;
+ }
+ else
+ {
+ if(*x!=4095&&*y!=4095)
+ return;
+ }
+ }
+ }
+#endif //#if !defined(__TOUCH_PANEL_CAPACITY__)
+}
+
+#ifdef TOUCH_PANEL_PRESSURE
+kal_bool tp_pressure_check(void)
+{
+#if !defined(__TOUCH_PANEL_CAPACITY__)
+ kal_uint8 command=0, retry;
+ kal_int16 x, z1, z2;
+ kal_uint32 pressure;
+
+ for(retry=0;retry<TOUCH_PANEL_RETRY;retry++)
+ {
+ /*X ADC*/
+ command=TOUCH_PANEL_START_BIT|TOUCH_PANEL_Y_PLUS|TOUCH_PANEL_12BIT_SAMPLE|
+ TOUCH_PANEL_SINGLE_MODE;
+ serial_write_data(command);
+ x=serial_read_data();
+ //kal_prompt_trace(MOD_TP_TASK, "pressure x value: %d", x);
+
+ /*Z1 ADC*/
+ command=TOUCH_PANEL_START_BIT|TOUCH_PANEL_Z1_POS|TOUCH_PANEL_12BIT_SAMPLE|
+ TOUCH_PANEL_DIFF_MODE;
+ serial_write_data(command);
+ z1=serial_read_data();
+ //kal_prompt_trace(MOD_TP_TASK, "pressure z1 value: %d", z1);
+
+ /*Z2 ADC*/
+ command=TOUCH_PANEL_START_BIT|TOUCH_PANEL_Z2_POS|TOUCH_PANEL_12BIT_SAMPLE|
+ TOUCH_PANEL_DIFF_MODE;
+ serial_write_data(command);
+ z2=serial_read_data();
+ //kal_prompt_trace(MOD_TP_TASK, "pressure z2 value: %d", z2);
+ if((z1 > 0) && (z2 > z1))
+ {
+ pressure = (x*(z2-z1)/z1) >> 2; /* Rx*x/4096*(z2/z1 - 1), assume Rx=1024 */
+ //kal_prompt_trace(MOD_TP_TASK, "pressure: %d", pressure);
+ //if (pressure > TOUCH_PRESSURE_THRESHOLD2)
+ // kal_prompt_trace(MOD_TP_TASK, "pressure is above %d. value: %d", TOUCH_PRESSURE_THRESHOLD2, pressure);
+ if ((pressure > TOUCH_PRESSURE_THRESHOLD_HIGH) || (pressure <= TOUCH_PRESSURE_THRESHOLD_LOW))
+ return KAL_FALSE;
+ else
+ return KAL_TRUE;
+ }
+ }
+ //kal_prompt_trace(MOD_TP_TASK, "pressure: 0 (no value)");
+#endif //#if !defined(__TOUCH_PANEL_CAPACITY__)
+ return KAL_FALSE;
+}
+#endif /*TOUCH_PANEL_PRESSURE*/
+
+void tp_irq_enable(kal_bool on)
+{
+#if !defined(__TOUCH_PANEL_CAPACITY__)
+ kal_uint8 command=0;
+ kal_uint32 savedMask;
+
+#ifdef TOUCH_PANEL_PRESSURE
+ volatile kal_uint32 i;
+ //savedMask = SaveAndSetIRQMask();
+ GPIO_WriteIO(0,SPI_CS_PIN);
+ for (i=0;i<50;i++)
+ {;}
+#endif
+
+ if(on==KAL_TRUE)
+ {
+ command=TOUCH_PANEL_START_BIT|TOUCH_PANEL_PWD_ENBLE;
+ }
+ else
+ {
+ command=TOUCH_PANEL_START_BIT|TOUCH_PANEL_IRQ_DISABLE;
+ }
+ serial_write_data(command);
+ serial_read_data();
+
+#ifdef TOUCH_PANEL_PRESSURE
+ if(on==KAL_TRUE)
+ GPIO_WriteIO(0,SPI_CS_PIN);
+ else
+ GPIO_WriteIO(1,SPI_CS_PIN);
+#endif
+
+ //RestoreIRQMask(savedMask);
+#endif //#if !defined(__TOUCH_PANEL_CAPACITY__)
+}
+
+#endif // #if defined(DRV_TP_NO_EXT_EINT)
+
+TouchPanel_custom_data_struct *tp_Get_Data(void)
+{
+ return (&tp_custom_data_def);
+}
+TouchPanel_customize_function_struct tp_custom_func=
+{
+ tp_Get_Data,
+ tp_read_adc,
+#ifdef TOUCH_PANEL_PRESSURE
+ tp_pressure_check,
+#endif
+ tp_irq_enable
+};
+TouchPanel_customize_function_struct *tp_GetFunc(void)
+{
+ return (&tp_custom_func);
+}
+
+
+
+
+
+
+
+/*************************************************************************
+ * [Set the config for MMI handwriting pad is enabled]
+ *************************************************************************/
+#include "MMI_features.h"
+#ifdef __MMI_HANDWRITING_PAD__
+#include "mmi_frm_gprot.h" /* get tp_area_struct declaraction */
+#include "kbd_table.h"
+
+
+
+/*************************************************************************
+ * [Get the calibration point]
+ *************************************************************************/
+#define NUM_TP_CALIBRATION_POINTS 3
+const mmi_pen_point_struct tp_calibration_point[NUM_TP_CALIBRATION_POINTS]={
+ {TOUCH_PANEL_CALIBRATION_X_1, TOUCH_PANEL_CALIBRATION_Y_1}, /* top-left point */
+ {TOUCH_PANEL_CALIBRATION_X_2, TOUCH_PANEL_CALIBRATION_Y_2}, /* bottom-right point */
+ {TOUCH_PANEL_CALIBRATION_X_3, TOUCH_PANEL_CALIBRATION_Y_3} /* the thrid point */
+ };
+
+
+/*************************************************************************
+ * [handwriting pad information setting]
+ * Define the coordinate for control areas
+ * Below is the reference setting ...
+ *************************************************************************/
+#if defined(__MMI_MAINLCD_176X220__)
+#define TP_SCREEN_ROW_H (9)
+#define TP_SCREEN_ROW_0 (TOUCH_PANEL_COORD_Y_START)
+#define TP_SCREEN_ROW_1 (TOUCH_PANEL_COORD_Y_START+10)
+#define TP_SCREEN_ROW_2 (TOUCH_PANEL_COORD_Y_START+20)
+#define TP_SCREEN_ROW_3 (TOUCH_PANEL_COORD_Y_START+30)
+#define TP_SCREEN_ROW_4 (TOUCH_PANEL_COORD_Y_START+40)
+#define TP_SCREEN_ROW_5 (TOUCH_PANEL_COORD_Y_START+50)
+#define TP_SCREEN_ROW_6 (TOUCH_PANEL_COORD_Y_START+60)
+#define TP_SCREEN_ROW_7 (TOUCH_PANEL_COORD_Y_START+70)
+#define TP_SCREEN_ROW_8 (TOUCH_PANEL_COORD_Y_START+80)
+#define TP_SCREEN_ROW_9 (TOUCH_PANEL_COORD_Y_START+90)
+
+#define TP_SCREEN_COL_W (57)
+#define TP_SCREEN_COL_0 (TOUCH_PANEL_COORD_X_START)
+#define TP_SCREEN_COL_1 (TOUCH_PANEL_COORD_X_START+58)
+#define TP_SCREEN_COL_2 (TOUCH_PANEL_COORD_X_START+116)
+#define TP_SCREEN_COL_3 (TOUCH_PANEL_COORD_X_START+174)
+
+#elif defined(__MMI_MAINLCD_240X320__)
+
+#define TP_SCREEN_ROW_H (19)
+#define TP_SCREEN_ROW_0 (TOUCH_PANEL_COORD_Y_START)
+#define TP_SCREEN_ROW_1 (TOUCH_PANEL_COORD_Y_START+20)
+#define TP_SCREEN_ROW_2 (TOUCH_PANEL_COORD_Y_START+40)
+#define TP_SCREEN_ROW_3 (TOUCH_PANEL_COORD_Y_START+60)
+#define TP_SCREEN_ROW_4 (TOUCH_PANEL_COORD_Y_START+80)
+#define TP_SCREEN_ROW_5 (TOUCH_PANEL_COORD_Y_START+100)
+#define TP_SCREEN_ROW_6 (TOUCH_PANEL_COORD_Y_START+120)
+#define TP_SCREEN_ROW_7 (TOUCH_PANEL_COORD_Y_START+140)
+#define TP_SCREEN_ROW_8 (TOUCH_PANEL_COORD_Y_START+160)
+#define TP_SCREEN_ROW_9 (TOUCH_PANEL_COORD_Y_START+180)
+
+#define TP_SCREEN_COL_W (79)
+#define TP_SCREEN_COL_0 (TOUCH_PANEL_COORD_X_START)
+#define TP_SCREEN_COL_1 (TOUCH_PANEL_COORD_X_START+80)
+#define TP_SCREEN_COL_2 (TOUCH_PANEL_COORD_X_START+160)
+#define TP_SCREEN_COL_3 (TOUCH_PANEL_COORD_X_START+240)
+
+#endif
+
+
+/* If the customer want to handle the pen events, register the function handler here. */
+
+void custom_dummy_pen_hdlr(mmi_pen_point_struct pos)
+{
+}
+
+
+mmi_pen_hdlr custom_extra_func_hdlr[MMI_PEN_EVENT_TYPE_MAX]={
+ NULL, /* MMI_PEN_EVENT_DOWN, */
+ NULL, /* MMI_PEN_EVENT_UP, */
+ NULL, /* MMI_PEN_EVENT_LONG_TAP, */
+ NULL, /* MMI_PEN_EVENT_REPEAT, */
+ NULL, /* MMI_PEN_EVENT_MOVE, */
+ NULL, /* MMI_PEN_EVENT_ABORT, */
+ };
+
+/*
+ * control area:
+ * The points of the region need to be successive and end at {-1,-1}
+ *
+ * TP_SCREEN_COL_0
+ * | TP_SCREEN_COL_1
+ * | | TP_SCREEN_COL_2
+ * | | | TP_SCREEN_COL_3
+ * v v v v
+ * +-----+-----+-----+ <-- TP_SCREEN_ROW_0
+ * | LSK | ^ | RSK |
+ * +-----+-----+-----+ <-- TP_SCREEN_ROW_1
+ * | <-- | v | --> |
+ * +-----+-----+-----+ <-- TP_SCREEN_ROW_2
+ * |Send | C | End |
+ * +-----+-----+-----+ <-- TP_SCREEN_ROW_3
+ * | 1 | 2 | 3 |
+ * +-----+-----+-----+ <-- TP_SCREEN_ROW_4
+ * | 4 | 5 | 6 |
+ * +-----+-----+-----+ <-- TP_SCREEN_ROW_5
+ * | 7 | 8 | 9 |
+ * +-----+-----+-----+ <-- TP_SCREEN_ROW_6
+ * | * | 0 | # |
+ * +-----+-----+-----+ <-- TP_SCREEN_ROW_7
+ *
+ * handwriting area:
+ * The region must be the rectangle and the points should be successive and end at {-1,-1}
+ */
+const mmi_pen_point_struct tp_lsk_region[]= {
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_0},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_0},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_1-1},
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_1-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_up_arrow_region[]={
+ {TP_SCREEN_COL_1, TP_SCREEN_ROW_0},
+ {TP_SCREEN_COL_2-1, TP_SCREEN_ROW_0},
+ {TP_SCREEN_COL_2-1, TP_SCREEN_ROW_1-1},
+ {TP_SCREEN_COL_1, TP_SCREEN_ROW_1-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_rsk_region[]={
+ {TP_SCREEN_COL_2, TP_SCREEN_ROW_0},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_0},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_1-1},
+ {TP_SCREEN_COL_2, TP_SCREEN_ROW_1-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_left_arrow_region[]= {
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_1},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_1},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_2-1},
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_2-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_down_arrow_region[]={
+ {TP_SCREEN_COL_1, TP_SCREEN_ROW_1},
+ {TP_SCREEN_COL_2-1, TP_SCREEN_ROW_1},
+ {TP_SCREEN_COL_2-1, TP_SCREEN_ROW_2-1},
+ {TP_SCREEN_COL_1, TP_SCREEN_ROW_2-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_right_arrow_region[]={
+ {TP_SCREEN_COL_2, TP_SCREEN_ROW_1},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_1},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_2-1},
+ {TP_SCREEN_COL_2, TP_SCREEN_ROW_2-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_send_region[]= {
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_2},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_2},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_3-1},
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_3-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_clean_region[]={
+ {TP_SCREEN_COL_1, TP_SCREEN_ROW_2},
+ {TP_SCREEN_COL_2-1, TP_SCREEN_ROW_2},
+ {TP_SCREEN_COL_2-1, TP_SCREEN_ROW_3-1},
+ {TP_SCREEN_COL_1, TP_SCREEN_ROW_3-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_end_region[]={
+ {TP_SCREEN_COL_2, TP_SCREEN_ROW_2},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_2},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_3-1},
+ {TP_SCREEN_COL_2, TP_SCREEN_ROW_3-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_1_region[]= {
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_3},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_3},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_4-1},
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_4-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_2_region[]={
+ {TP_SCREEN_COL_1, TP_SCREEN_ROW_3},
+ {TP_SCREEN_COL_2-1, TP_SCREEN_ROW_3},
+ {TP_SCREEN_COL_2-1, TP_SCREEN_ROW_4-1},
+ {TP_SCREEN_COL_1, TP_SCREEN_ROW_4-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_3_region[]={
+ {TP_SCREEN_COL_2, TP_SCREEN_ROW_3},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_3},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_4-1},
+ {TP_SCREEN_COL_2, TP_SCREEN_ROW_4-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_4_region[]= {
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_4},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_4},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_5-1},
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_5-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_5_region[]={
+ {TP_SCREEN_COL_1, TP_SCREEN_ROW_4},
+ {TP_SCREEN_COL_2-1, TP_SCREEN_ROW_4},
+ {TP_SCREEN_COL_2-1, TP_SCREEN_ROW_5-1},
+ {TP_SCREEN_COL_1, TP_SCREEN_ROW_5-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_6_region[]={
+ {TP_SCREEN_COL_2, TP_SCREEN_ROW_4},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_4},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_5-1},
+ {TP_SCREEN_COL_2, TP_SCREEN_ROW_5-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_7_region[]= {
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_5},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_5},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_6-1},
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_6-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_8_region[]={
+ {TP_SCREEN_COL_1, TP_SCREEN_ROW_5},
+ {TP_SCREEN_COL_2-1, TP_SCREEN_ROW_5},
+ {TP_SCREEN_COL_2-1, TP_SCREEN_ROW_6-1},
+ {TP_SCREEN_COL_1, TP_SCREEN_ROW_6-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_9_region[]={
+ {TP_SCREEN_COL_2, TP_SCREEN_ROW_5},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_5},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_6-1},
+ {TP_SCREEN_COL_2, TP_SCREEN_ROW_6-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_star_region[]= {
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_6},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_6},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_7-1},
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_7-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_0_region[]={
+ {TP_SCREEN_COL_1, TP_SCREEN_ROW_6},
+ {TP_SCREEN_COL_2-1, TP_SCREEN_ROW_6},
+ {TP_SCREEN_COL_2-1, TP_SCREEN_ROW_7-1},
+ {TP_SCREEN_COL_1, TP_SCREEN_ROW_7-1},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_hash_region[]={
+ {TP_SCREEN_COL_2, TP_SCREEN_ROW_6},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_6},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_7-1},
+ {TP_SCREEN_COL_2, TP_SCREEN_ROW_7-1},
+ {-1,-1}
+ };
+
+
+
+
+
+
+
+
+const mmi_pen_point_struct tp_extra_func_region[]={
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_7},
+ {TP_SCREEN_COL_0+TP_SCREEN_COL_3/4, TP_SCREEN_ROW_7+TP_SCREEN_ROW_H/2},
+ {TP_SCREEN_COL_0+TP_SCREEN_COL_3/2, TP_SCREEN_ROW_7+TP_SCREEN_ROW_H},
+ {TP_SCREEN_COL_0+TP_SCREEN_COL_3*3/4, TP_SCREEN_ROW_7+TP_SCREEN_ROW_H/2},
+ {TP_SCREEN_COL_3-1, TP_SCREEN_ROW_7},
+ {-1,-1}
+ };
+
+const mmi_pen_point_struct tp_handwriting_region[]={
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_2},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_2},
+ {TP_SCREEN_COL_1-1, TP_SCREEN_ROW_8-1},
+ {TP_SCREEN_COL_0, TP_SCREEN_ROW_8-1},
+ {-1,-1}
+ };
+
+/*
+ * The area table information...
+ * 1. tp_area_id_enum
+ *
+ * 2. flag
+ * TP_HANDWRITING_AREA - it is the handwriting area
+ * TP_CONTROL_AREA - it is the control area
+ * TP_MAPPING_KEY - for control area only; Translate the pen event to
+ * the key event
+ * TP_CUSTOM_HANDLE - the custom want to handler pen event by themselves.
+ * TP_HANDWRITING_SUPPORTS_FULL_AREA - extend handwriting area to full touch
+ * pad area when the first stroke down.
+ *
+ * 3. region
+ * control area:
+ * The points of the region need to be successive and end at {-1,-1}
+ *
+ * handwriting area:
+ * The region must be the rectangle and the points should be in clock wise order
+ *
+ * 4. pen_handler_table
+ * NULL - use the default handler
+ * Others - the customers provide the special handlers
+ */
+const tp_area_struct tp_area_table[TP_AREA_MAX_NUM] = {
+ /* Handwriting Area */
+ {
+ TP_AREA_HANDWRITING,
+ TP_HANDWRITING_AREA|TP_HANDWRITING_SUPPORTS_FULL_AREA,
+ tp_handwriting_region,
+ NULL
+ },
+
+ /* Control Area */
+ {
+ TP_CONTROL_AREA_LSK,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_SK_LEFT,
+ tp_lsk_region,
+ NULL
+ },
+ {
+ TP_CONTROL_AREA_UP_ARROW,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_UP,
+ tp_up_arrow_region,
+ NULL
+ },
+ {
+ TP_CONTROL_AREA_RSK,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_SK_RIGHT,
+ tp_rsk_region,
+ NULL
+ },
+
+ {
+ TP_CONTROL_AREA_LEFT_ARROW,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_LEFT,
+ tp_left_arrow_region,
+ NULL
+ },
+ {
+ TP_CONTROL_AREA_DOWN_ARROW,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_DOWN,
+ tp_down_arrow_region,
+ NULL
+ },
+ {
+ TP_CONTROL_AREA_RIGHT_ARROW,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_RIGHT,
+ tp_right_arrow_region,
+ NULL
+ },
+
+ {
+ TP_CONTROL_AREA_SEND,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_SEND,
+ tp_send_region,
+ NULL
+ },
+ {
+ TP_CONTROL_AREA_CLEAN,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_CLEAR,
+ tp_clean_region,
+ NULL
+ },
+ {
+ TP_CONTROL_AREA_END,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_END,
+ tp_end_region,
+ NULL
+ },
+
+ {
+ TP_CONTROL_AREA_1,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_1,
+ tp_1_region,
+ NULL
+ },
+ {
+ TP_CONTROL_AREA_2,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_2,
+ tp_2_region,
+ NULL
+ },
+ {
+ TP_CONTROL_AREA_3,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_3,
+ tp_3_region,
+ NULL
+ },
+
+ {
+ TP_CONTROL_AREA_4,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_4,
+ tp_4_region,
+ NULL
+ },
+ {
+ TP_CONTROL_AREA_5,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_5,
+ tp_5_region,
+ NULL
+ },
+ {
+ TP_CONTROL_AREA_6,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_6,
+ tp_6_region,
+ NULL
+ },
+
+ {
+ TP_CONTROL_AREA_7,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_7,
+ tp_7_region,
+ NULL
+ },
+ {
+ TP_CONTROL_AREA_8,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_8,
+ tp_8_region,
+ NULL
+ },
+ {
+ TP_CONTROL_AREA_9,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_9,
+ tp_9_region,
+ NULL
+ },
+
+ {
+ TP_CONTROL_AREA_STAR,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_STAR,
+ tp_star_region,
+ NULL
+ },
+ {
+ TP_CONTROL_AREA_0,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_0,
+ tp_0_region,
+ NULL
+ },
+ {
+ TP_CONTROL_AREA_HASH,
+ TP_CONTROL_AREA|TP_MAPPING_KEY|DEVICE_KEY_HASH,
+ tp_hash_region,
+ NULL
+ },
+
+
+ {
+ TP_CONTROL_AREA_EXTRA_FUNC,
+ TP_CONTROL_AREA|TP_CUSTOM_HANDLE,
+ tp_extra_func_region,
+ custom_extra_func_hdlr
+ },
+};
+
+#endif /* __MMI_HANDWRITING_PAD__ */
+
+
+
+#endif
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/touch_panel_custom.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/touch_panel_custom.h
new file mode 100644
index 0000000..db46611
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/touch_panel_custom.h
@@ -0,0 +1,383 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * keypad_def.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file is defined for keypad table
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
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+ *
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+ * removed!
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+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef TOUCH_PANEL_CUSTOM_H
+#define TOUCH_PANEL_CUSTOM_H
+#include "eint.h"
+#include "lcd_sw_inc.h"
+
+#define CTP_I2C_LDO VCAMA //MT6276E2 use VACMA, MT6276E1 use VCAMD
+#define CTP_I2C_LDO_VOLTAGE PMU_VOLT_02_800000_V
+
+#define TOUCH_PANEL_COORD_X_START 0
+#define TOUCH_PANEL_COORD_X_END (LCD_WIDTH - 1)
+#define TOUCH_PANEL_COORD_Y_START 0
+#define TOUCH_PANEL_COORD_Y_END (LCD_HEIGHT - 1)
+
+/*ADC*/
+#if defined(__TOUCH_PANEL_CAPACITY__)
+#define TOUCH_PANEL_ADC_X_START 0
+#define TOUCH_PANEL_ADC_X_END (2048*TOUCH_PANEL_COORD_X_END)/479
+#define TOUCH_PANEL_ADC_Y_START 0
+#define TOUCH_PANEL_ADC_Y_END (2048*TOUCH_PANEL_COORD_Y_END)/799
+#else
+#define TOUCH_PANEL_ADC_X_START 230
+#define TOUCH_PANEL_ADC_X_END 3867
+#define TOUCH_PANEL_ADC_Y_START 287
+#define TOUCH_PANEL_ADC_Y_END 3853
+#endif //#if defined(__TOUCH_PANEL_CAPACITY__)
+
+#define TOUCH_PANEL_X_MILLIMETER 42
+#define TOUCH_PANEL_Y_MILLIMETER 70
+#define TOUCH_PANEL_EINT_DOWN_LEVEL LEVEL_LOW
+
+
+/*touch panel control*/
+#define TOUCH_PANEL_START_BIT 0x80
+
+#define TOUCH_PANEL_TEMP0 0x00
+#define TOUCH_PANEL_X_PLUS 0x10
+#define TOUCH_PANEL_VBAT 0x20
+#define TOUCH_PANEL_Z1_POS 0x30
+#define TOUCH_PANEL_Z2_POS 0x40
+#define TOUCH_PANEL_Y_PLUS 0x50
+#define TOUCH_PANEL_TEMP1 0x70
+
+#define TOUCH_PANEL_ADC3 0x20
+#define TOUCH_PANEL_ADC4 0x60
+#define TOUCH_PANEL_12BIT_SAMPLE 0x0
+#define TOUCH_PANEL_8BIT_SAMPLE 0x8
+#define TOUCH_PANEL_DIFF_MODE 0x0
+#define TOUCH_PANEL_SINGLE_MODE 0x4
+
+#define TOUCH_PANEL_PWD_ENBLE 0x0
+#define TOUCH_PANEL_IRQ_DISABLE 0x1
+#define TOUCH_PANEL_PWD_DISABLE 0x3
+#define TOUCH_PANEL_PWD_RESET 0x2
+
+
+/*retry and filter*/
+#ifdef TOUCH_PANEL_PRESSURE
+ #define TOUCH_PANEL_RETRY 1
+ #define TOUCH_PANEL_FILTER_THRESOLD 10000
+ #define TOUCH_PRESSURE_THRESHOLD_LOW 150
+#else /*TOUCH_PANEL_PRESSURE*/
+#define TOUCH_PANEL_RETRY 4
+#define TOUCH_PANEL_FILTER_THRESOLD 50
+#endif /*TOUCH_PANEL_PRESSURE*/
+ #define TOUCH_PRESSURE_THRESHOLD_HIGH 6500
+
+#if defined(DRV_TOUCH_PANEL_CUSTOMER_PARAMETER)
+#define TS_DEBOUNCE_TIME 36*32
+#define TOUCH_PANEL_CALI_CHECK_OFFSET 6
+#define MIN_PEN_MOVE_OFFSET 8
+#define HAND_WRITING_MAX_OFFSET 50
+#define NONHAND_WRITING_MAX_OFFSET 100
+#define MAX_STROKE_MOVE_OFFSET 1
+#if defined(DRV_TOUCH_PANEL_MULTIPLE_PICK)
+#define MULTIPLE_POINT_SELECTION 7
+#endif /*#if defined(DRV_TOUCH_PANEL_MULTIPLE_PICK)*/
+#if defined(__DRV_TP_DISCARD_SHIFTING__)
+#define PRESSURE_CHECK_BOUNDARY 2000
+#define PRESSURE_SHIFTING_BOUNDARY 800
+#endif /*#if defined(__DRV_TP_DISCARD_SHIFTING__)*/
+#endif /*#if defined(DRV_TOUCH_PANEL_CUSTOMER_PARAMETER)*/
+
+/*************************************************************************
+ * [Define the cailbration point only for HAND_WRITING feature ]
+ *************************************************************************/
+/* top-left point */
+#define TOUCH_PANEL_CALIBRATION_X_1 (20)
+#define TOUCH_PANEL_CALIBRATION_Y_1 (170)
+/* bottom-right point */
+#define TOUCH_PANEL_CALIBRATION_X_2 (220)
+#define TOUCH_PANEL_CALIBRATION_Y_2 (270)
+/* 3rd point should be different from the ceter point
+ * such that driver can check it's ADC value
+ */
+#define TOUCH_PANEL_CALIBRATION_X_3 (150)
+#define TOUCH_PANEL_CALIBRATION_Y_3 (250)
+
+
+/*************************************************************************
+ * [handwriting pad information setting]
+ * 1. Define the enum of the control areas
+ *
+ * The flag for control areas or handwriting areas...
+ *
+ * #define TP_MAPPING_KEY (0x00000100)
+ * #define TP_CUSTOM_HANDLE (0x00000200)
+ * #define TP_CONTROL_AREA (0x80000000)
+ * #define TP_HANDWRITING_AREA (0x40000000)
+ * #define TP_HANDWRITING_SUPPORTS_FULL_AREA (0x20000000)
+ *
+ * 2.
+ *************************************************************************/
+typedef enum
+{
+ TP_AREA_HANDWRITING,
+ TP_CONTROL_AREA_LSK,
+ TP_CONTROL_AREA_UP_ARROW,
+ TP_CONTROL_AREA_RSK,
+ TP_CONTROL_AREA_DOWN_ARROW,
+ TP_CONTROL_AREA_LEFT_ARROW,
+ TP_CONTROL_AREA_RIGHT_ARROW,
+
+ TP_CONTROL_AREA_SEND,
+ TP_CONTROL_AREA_CLEAN,
+ TP_CONTROL_AREA_END,
+
+ TP_CONTROL_AREA_1,
+ TP_CONTROL_AREA_2,
+ TP_CONTROL_AREA_3,
+
+ TP_CONTROL_AREA_4,
+ TP_CONTROL_AREA_5,
+ TP_CONTROL_AREA_6,
+
+ TP_CONTROL_AREA_7,
+ TP_CONTROL_AREA_8,
+ TP_CONTROL_AREA_9,
+
+ TP_CONTROL_AREA_STAR,
+ TP_CONTROL_AREA_0,
+ TP_CONTROL_AREA_HASH,
+
+ TP_CONTROL_AREA_EXTRA_FUNC,
+
+ /* don't add the enum after this line */
+ TP_AREA_MAX_NUM
+}tp_area_id_enum;
+
+
+
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/touch_panel_spi.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/touch_panel_spi.c
new file mode 100644
index 0000000..1fe01a1
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/touch_panel_spi.c
@@ -0,0 +1,290 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * serial_interface.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This Module defines Serial Interface.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#if defined(TOUCH_PANEL_SUPPORT) || defined(HAND_WRITING)
+#include "drv_features.h"
+#include "kal_public_api.h" //MSBB change #include "kal_release.h"
+#include "drv_comm.h"
+#include "gpio_hw.h"
+#include "gpio_sw.h"
+#include "touch_panel_spi.h"
+//#include "serial_interface.h"
+
+#if !defined(DRV_TP_NO_EXT_EINT) && !defined(__TOUCH_PANEL_CAPACITY__)
+
+#define ZERO_FIELD_COUNT 0 /*zero filled cycles*/
+void serial_write_data(kal_uint8 data);
+kal_uint16 serial_read_data(void);
+
+
+/*************************************************************************
+* FUNCTION
+* serial_init
+*
+* DESCRIPTION
+* This function initializes serial interface.
+*
+* PARAMETERS
+* None
+* RETURNS
+* None
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void serial_init(void)
+{
+ kal_uint16 delay;
+ kal_int16 x, y;
+
+ GPIO_WriteIO(0,SPI_CS_PIN);
+ GPIO_ModeSetup(SPI_DIN_PIN, 0x0);
+ GPIO_ModeSetup(SPI_CLK_PIN, 0x0);
+ GPIO_ModeSetup(SPI_DOUT_PIN, 0x0);
+ GPIO_ModeSetup(SPI_CS_PIN, 0x0);
+ GPIO_ModeSetup(SPI_BUSY_PIN, 0x0);
+ GPIO_InitIO(OUTPUT,SPI_DIN_PIN);
+ GPIO_InitIO(OUTPUT,SPI_CLK_PIN);
+ GPIO_InitIO(INPUT,SPI_DOUT_PIN);
+ GPIO_InitIO(OUTPUT,SPI_CS_PIN);
+ GPIO_InitIO(INPUT,SPI_BUSY_PIN);
+ GPIO_WriteIO(0,SPI_CS_PIN);
+
+ /*AR7643 needs this, so weird*/
+ for(delay=0;delay<1000;delay++){};
+ //tp_read_adc(&x, &y);
+}
+/*************************************************************************
+* FUNCTION
+* serial_delay
+*
+* DESCRIPTION
+* This function is to add delay.
+*
+* PARAMETERS
+* None
+* RETURNS
+* None
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void serial_delay(void)
+{
+ kal_uint16 delay;
+ for(delay=0;delay<0;delay++){}
+}
+/*************************************************************************
+* FUNCTION
+* serial_write_bit_high
+*
+* DESCRIPTION
+* This function is to set a bit as high.
+*
+* PARAMETERS
+* None
+* RETURNS
+* None
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+/*write 1*/
+void serial_write_bit_high(void)
+{
+ SET_DATA_HIGH(); /* ---- */
+ SET_CLK_LOW(); /* _-_ */
+ serial_delay();
+ SET_CLK_HIGH();
+ serial_delay();
+ SET_CLK_LOW();
+}
+/*************************************************************************
+* FUNCTION
+* serial_write_bit_low
+*
+* DESCRIPTION
+* This function is to set a bit as low.
+*
+* PARAMETERS
+* None
+* RETURNS
+* None
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+/*write 0*/
+void serial_write_bit_low(void)
+{
+ SET_DATA_LOW(); /* ____ */
+ SET_CLK_LOW(); /* _-_ */
+ serial_delay();
+ SET_CLK_HIGH();
+ serial_delay();
+ SET_CLK_LOW();
+}
+/*************************************************************************
+* FUNCTION
+* serial_read_data
+*
+* DESCRIPTION
+* This function is to read data via SPI.
+*
+* PARAMETERS
+* None
+*
+* RETURNS
+* received data
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+/*read*/
+kal_uint16 serial_read_data(void)
+{
+ kal_uint16 data=0;
+ kal_int16 i;
+ kal_uint32 savedMask;
+ kal_uint32 retry=0;
+
+ //savedMask = SaveAndSetIRQMask();
+ SET_CLK_LOW();
+ SET_CLK_HIGH();
+ while(GET_BUSY_BIT())
+ {
+
+ SET_CLK_LOW();
+ SET_CLK_HIGH();
+ retry++;
+ if(retry>1000000)/*give up the read. controller may be broken*/
+ return 0;
+ };
+ for(i=11;i>=0;i--)
+ {
+ //SET_CLK_LOW();
+ //serial_delay();
+ SET_CLK_HIGH();
+ serial_delay();
+ if(GET_DATA_BIT())
+ data |= (1<<i);
+
+ SET_CLK_LOW();
+ serial_delay();
+ }
+ for(i=0;i<ZERO_FIELD_COUNT;i++)
+ {
+ SET_CLK_LOW();
+ serial_delay();
+ SET_CLK_HIGH();
+ SET_CLK_LOW();
+ }
+ data&=0x3fff;
+ //RestoreIRQMask(savedMask);
+ return data;
+}
+/*************************************************************************
+* FUNCTION
+* serial_write_data
+*
+* DESCRIPTION
+* This function is to write data via SPI.
+*
+* PARAMETERS
+* transmitted data
+*
+* RETURNS
+* None
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void serial_write_data(kal_uint8 data)
+{
+ kal_int8 i;
+ //kal_uint32 savedMask;
+ //savedMask = SaveAndSetIRQMask();
+
+ for (i=7;i>=0;i--)
+ { /* data bit 7~0 */
+ if (data & (1<<i))
+ {
+ serial_write_bit_high();
+ }
+ else
+ {
+ serial_write_bit_low();
+ }
+ }
+ SET_DATA_LOW();
+ //RestoreIRQMask(savedMask);
+}
+
+#endif /*!defined(DRV_TP_NO_EXT_EINT)*/
+
+#endif
+
+
+
+
+
+
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/touch_panel_spi.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/touch_panel_spi.h
new file mode 100644
index 0000000..2369ce2
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/touch_panel_spi.h
@@ -0,0 +1,98 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * serial_interface.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This Module defines Serial Interface.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef TOUCH_PANEL_SPI_H
+#define TOUCH_PANEL_SPI_H
+
+#ifdef __CUST_NEW__
+ extern const char gpio_tp_spi_din_pin;
+ extern const char gpio_tp_spi_clk_pin;
+ extern const char gpio_tp_spi_dout_pin;
+ extern const char gpio_tp_spi_cs_pin;
+ extern const char gpio_tp_spi_busy_pin;
+
+ #define SPI_DIN_PIN gpio_tp_spi_din_pin /*GPO*/
+ #define SPI_CLK_PIN gpio_tp_spi_clk_pin /*GPO*/
+ #define SPI_DOUT_PIN gpio_tp_spi_dout_pin /*GPI*/
+ #define SPI_CS_PIN gpio_tp_spi_cs_pin /*GPO*/
+ #define SPI_BUSY_PIN gpio_tp_spi_busy_pin /*GPI*/
+#else /* __CUST_NEW__ */
+#define SPI_DIN_PIN 50 /*GPO*/
+#define SPI_CLK_PIN 5 /*GPO*/
+#define SPI_DOUT_PIN 22 /*GPI*/
+#define SPI_CS_PIN 23 /*GPO*/
+#define SPI_BUSY_PIN 21 /*GPI*/
+#endif /* __CUST_NEW__ */
+
+#define SET_CLK_HIGH() (GPIO_WriteIO(1,SPI_CLK_PIN))
+#define SET_CLK_LOW() (GPIO_WriteIO(0,SPI_CLK_PIN))
+#define SET_DATA_HIGH() GPIO_WriteIO(1,SPI_DIN_PIN)
+#define SET_DATA_LOW() GPIO_WriteIO(0,SPI_DIN_PIN)
+#define GET_DATA_BIT() GPIO_ReadIO(SPI_DOUT_PIN)
+#define GET_BUSY_BIT() GPIO_ReadIO(SPI_BUSY_PIN)
+
+void serial_write_bit_high(void);
+void serial_write_bit_low(void);
+void serial_delay(void);
+void serial_write_data(kal_uint8 data);
+kal_uint16 serial_read_data(void);
+void serial_init(void);
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/tv_custom.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/tv_custom.c
new file mode 100644
index 0000000..6df89fc
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/tv_custom.c
@@ -0,0 +1,75 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * tv_custom.c
+ *
+ * Project:
+ * --------
+ * MT6228, MT6229
+ *
+ * Description:
+ * ------------
+ * MT6228, MT6229 tv output control function
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#include "reg_base.h"
+#include "intrCtrl.h"
+#include "drv_comm.h"
+#include "drvpdn.h"
+#ifdef TV_OUT_SUPPORT
+kal_uint16 tv_gamma_table[5][9]=
+{{0, 103, 291, 534, 822, 1149, 1510, 1903, 2311},
+ {0, 173, 411, 681, 976, 1291, 1621, 1965, 2311},
+ {0, 290, 580, 870, 1160, 1450, 1740, 2030, 2320},
+ {0, 487, 819, 1111, 1378, 1629, 1868, 2097, 2311},
+ {0, 819, 1158, 1418, 1637, 1831, 2005, 2166, 2311}
+};
+#endif//TV_OUT_SUPPORT
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/tv_custom.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/tv_custom.h
new file mode 100644
index 0000000..b217211
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/tv_custom.h
@@ -0,0 +1,65 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * tv_custom.h
+ *
+ * Project:
+ * --------
+ * MT6228, MT6229
+ *
+ * Description:
+ * ------------
+ * MT6228, MT6229 tv output control function
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifdef TV_OUT_SUPPORT
+extern kal_uint16 tv_gamma_table[5][9];
+#endif //TV_OUT_SUPPORT
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/two_mic_NR_custom_if.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/two_mic_NR_custom_if.c
new file mode 100644
index 0000000..f8a1d33
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/two_mic_NR_custom_if.c
@@ -0,0 +1,682 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * two_mic_NR_custom_if.h
+ *
+ * DateTime:
+ * ---------
+ * 9/27/2009 3:10PM
+ *
+ * Project:
+ * --------
+ * 2-mic NR
+ *
+ * Description:
+ * ------------
+ * This file contains the function for the state transition of the FM chip.
+ *
+ * Author:
+ *
+ *
+ **************************************************************************
+ **************************************************************************/
+#if defined(__TWOMICNR_SUPPORT__)
+
+ /*****************************************************************************
+ * System Include Files
+ ****************************************************************************/
+#include "two_mic_NR_custom_if.h"
+#include "kal_public_api.h" //MSBB change #include "kal_release.h" /* Basic data type */
+#include "parameter_data_file.h"
+#include "gpio_sw.h"
+
+/*****************************************************************************
+ * Local Definitions
+ ****************************************************************************/
+#define START_TOKEN 0
+#define STOP_TOKEN 1
+#define DW_TOKEN 2
+#define DR_N_TOKEN 3
+
+/* #define TWOMICNR_I2C_DELAY (0x08) */
+#define TWOMICNR_I2C_DELAY (0x28)
+static kal_uint32 TWOMICNR_I2C_MAX_RETRY_COUNT = 0x100;
+
+#define SET_TWOMICNR_I2C_CLK_OUTPUT GPIO_InitIO(OUTPUT,TWOMICNR_I2C_SCL_GPIO_PIN)
+#define SET_TWOMICNR_I2C_CLK_INPUT GPIO_InitIO(INPUT,TWOMICNR_I2C_SCL_GPIO_PIN)
+#define SET_TWOMICNR_I2C_DATA_OUTPUT GPIO_InitIO(OUTPUT,TWOMICNR_I2C_SDA_GPIO_PIN)
+#define SET_TWOMICNR_I2C_DATA_INPUT GPIO_InitIO(INPUT,TWOMICNR_I2C_SDA_GPIO_PIN)
+#define SET_TWOMICNR_I2C_CLK_HIGH GPIO_WriteIO(1,TWOMICNR_I2C_SCL_GPIO_PIN)
+#define SET_TWOMICNR_I2C_CLK_LOW GPIO_WriteIO(0,TWOMICNR_I2C_SCL_GPIO_PIN)
+#define SET_TWOMICNR_I2C_DATA_HIGH GPIO_WriteIO(1,TWOMICNR_I2C_SDA_GPIO_PIN)
+#define SET_TWOMICNR_I2C_DATA_LOW GPIO_WriteIO(0,TWOMICNR_I2C_SDA_GPIO_PIN)
+#define GET_TWOMICNR_I2C_DATA_BIT GPIO_ReadIO(TWOMICNR_I2C_SDA_GPIO_PIN)
+
+#define TWOMICNR_I2C_RESET_TRANSMISSION \
+ { \
+ SET_TWOMICNR_I2C_DATA_OUTPUT; \
+ SET_TWOMICNR_I2C_DATA_HIGH; \
+ SET_TWOMICNR_I2C_CLK_OUTPUT; \
+ SET_TWOMICNR_I2C_CLK_HIGH; \
+ }
+
+#define TWOMICNR_I2C_START_TRANSMISSION \
+{ \
+ kal_uint8 j_start; \
+ SET_TWOMICNR_I2C_CLK_OUTPUT; \
+ SET_TWOMICNR_I2C_DATA_OUTPUT; \
+ SET_TWOMICNR_I2C_CLK_HIGH; \
+ SET_TWOMICNR_I2C_DATA_HIGH; \
+ for (j_start = 0; j_start < TWOMICNR_I2C_DELAY; j_start++);\
+ SET_TWOMICNR_I2C_DATA_LOW; \
+ for (j_start = 0; j_start < TWOMICNR_I2C_DELAY; j_start++);\
+ SET_TWOMICNR_I2C_CLK_LOW; \
+}
+
+
+
+#define TWOMICNR_I2C_STOP_TRANSMISSION \
+{ \
+ kal_uint8 j_stop; \
+ SET_TWOMICNR_I2C_CLK_OUTPUT; \
+ SET_TWOMICNR_I2C_DATA_OUTPUT; \
+ SET_TWOMICNR_I2C_CLK_LOW; \
+ SET_TWOMICNR_I2C_DATA_LOW; \
+ for (j_stop = 0; j_stop < TWOMICNR_I2C_DELAY; j_stop++);\
+ SET_TWOMICNR_I2C_CLK_HIGH; \
+ for (j_stop = 0; j_stop < TWOMICNR_I2C_DELAY; j_stop++);\
+ SET_TWOMICNR_I2C_DATA_HIGH; \
+}
+
+
+#define NACK_BIT \
+ { \
+ kal_uint8 i_nack; \
+ for (i_nack=0; i_nack<TWOMICNR_I2C_DELAY; i_nack++); \
+ SET_TWOMICNR_I2C_DATA_OUTPUT; \
+ SET_TWOMICNR_I2C_DATA_HIGH; \
+ for (i_nack=0; i_nack<TWOMICNR_I2C_DELAY; i_nack++); \
+ SET_TWOMICNR_I2C_CLK_HIGH; \
+ for (i_nack=0; i_nack<TWOMICNR_I2C_DELAY; i_nack++); \
+ SET_TWOMICNR_I2C_CLK_LOW; \
+ for (i_nack=0;i_nack<TWOMICNR_I2C_DELAY;i_nack++); \
+ }
+
+unsigned short length_twomicBR_para;
+
+/*****************************************************************************
+ * Local Definitions
+ ****************************************************************************/
+
+static kal_bool TWOMICNR_I2C_wait_readComplete(void)
+{
+ kal_uint32 i=0;
+ SET_TWOMICNR_I2C_DATA_INPUT;
+ while(1)
+ {
+ i++;
+ if(GET_TWOMICNR_I2C_DATA_BIT == 0)
+ break;
+ if(i > TWOMICNR_I2C_MAX_RETRY_COUNT)
+ return KAL_FALSE;
+ }
+
+ return KAL_TRUE;
+}
+
+
+/*****************************************************************************
+ Function: Two_Mic_NR_send_byte
+ Parameters:
+ send_byte: the 8-bits data which will be sent out by I2C mode
+ Returns:
+ Side Effects: -
+
+ Description: To send one-byte parameter into FM chip
+*****************************************************************************/
+static void Two_Mic_NR_send_byte(kal_uint8 send_byte)
+{
+ kal_uint8 i_send_byte;
+ kal_uint8 j_send_byte;
+
+ for (i_send_byte = 8; i_send_byte > 0; i_send_byte--) { /* data bit 7~0 */
+ if (send_byte & (1 << (i_send_byte-1))) {
+ SET_TWOMICNR_I2C_DATA_HIGH;
+ }else {
+ SET_TWOMICNR_I2C_DATA_LOW;
+ }
+
+ for (j_send_byte = 0; j_send_byte < TWOMICNR_I2C_DELAY; j_send_byte++);
+ SET_TWOMICNR_I2C_CLK_HIGH;
+ for (j_send_byte = 0; j_send_byte < TWOMICNR_I2C_DELAY; j_send_byte++);
+ SET_TWOMICNR_I2C_CLK_LOW;
+ for (j_send_byte = 0; j_send_byte < TWOMICNR_I2C_DELAY; j_send_byte++);
+ }
+ /* don't care bit, 9th bit */
+ SET_TWOMICNR_I2C_DATA_LOW;
+ SET_TWOMICNR_I2C_DATA_INPUT;
+ SET_TWOMICNR_I2C_CLK_HIGH;
+ for (j_send_byte = 0; j_send_byte < TWOMICNR_I2C_DELAY; j_send_byte++);
+/* ret = TWOMICNR_I2C_wait_readComplete(); */
+ SET_TWOMICNR_I2C_CLK_LOW;
+ SET_TWOMICNR_I2C_DATA_OUTPUT;
+
+ return;
+}
+
+/*****************************************************************************
+ Function: Two_Mic_NR_get_byte
+ Parameters:
+
+ Returns: the 8-bits data which comes from FM chip by I2C mode
+ Side Effects: -
+
+ Description: To fetch the one-byte parameter from FM chip
+*****************************************************************************/
+static kal_uint8 Two_Mic_NR_get_byte(void)
+{
+ signed char i;
+ kal_uint8 j;
+ kal_uint8 get_byte = 0;
+
+ SET_TWOMICNR_I2C_DATA_INPUT;
+
+ for (i = 7; i >= 0; i--) { /* data bit 7~0 */
+ SET_TWOMICNR_I2C_CLK_HIGH;
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ if (GET_TWOMICNR_I2C_DATA_BIT)
+ get_byte |= (1 << i);
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ SET_TWOMICNR_I2C_CLK_LOW;
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ }
+ /* don't care bit, 9th bit */
+ SET_TWOMICNR_I2C_DATA_HIGH;
+ SET_TWOMICNR_I2C_DATA_OUTPUT;
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ SET_TWOMICNR_I2C_CLK_HIGH;
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ SET_TWOMICNR_I2C_CLK_LOW;
+
+ return get_byte;
+}
+
+
+
+/*****************************************************************************
+ Function: Two_Mic_NR_Readback_para
+ Parameters:
+ length_send: the total number of bytes which will be sent out by I2C mode
+ parameter_array: pointer to the parameter array which will be sent out by I2C mode
+ length_receive: the total number of bytes which will be received by I2C mode
+ receive_parameter_array: pointer to the parameter array which will keep the parameters received by I2C mode
+ Returns:
+ Side Effects: -
+
+ Description: To fetch the parameters from FM chip
+*****************************************************************************/
+void Two_Mic_NR_Readback_para(kal_uint32 length_send, unsigned char* send_parameter_array, kal_uint32 length_receive, unsigned char* receive_parameter_array)
+{
+ kal_uint8 i,j;
+
+ TWOMICNR_I2C_START_TRANSMISSION;
+ for (i = 0; i < length_send; i++);
+ {
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ Two_Mic_NR_send_byte(send_parameter_array[i]);
+ }
+/* for (j = 0; j < TWOMICNR_I2C_DELAY; j++); */
+
+ for (i = 0; i < length_receive; i++);
+ {
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ receive_parameter_array[i] = Two_Mic_NR_get_byte();
+ }
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+
+ TWOMICNR_I2C_STOP_TRANSMISSION;
+
+
+ return;
+}
+
+
+/*****************************************************************************
+ Function: Two_Mic_NR_Download
+ Parameters:
+ mode: 0 -> handset mode; 1 -> handfree mode; 2 -> bypass mode; 3 -> Init mode
+ Returns:
+ Side Effects: -
+
+ Description: To download corresponding parameters into FM chip
+*****************************************************************************/
+void Two_Mic_NR_Download(unsigned short mode)
+{
+ kal_uint8 j;
+ unsigned short i_NR_Download_para;
+
+ switch (mode){
+
+ case 0:
+ TWOMICNR_I2C_START_TRANSMISSION;
+ for (i_NR_Download_para = 0; i_NR_Download_para < TWOMICNR_HANDSET_PARA_LENGTH; i_NR_Download_para++)
+ {
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ Two_Mic_NR_send_byte((kal_uint8)(parameter_data_handset_mode[i_NR_Download_para]));
+ }
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ TWOMICNR_I2C_STOP_TRANSMISSION;
+ break;
+ case 1:
+ TWOMICNR_I2C_START_TRANSMISSION;
+ for (i_NR_Download_para = 0; i_NR_Download_para < TWOMICNR_HANDFREE_PARA_LENGTH; i_NR_Download_para++)
+ {
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ Two_Mic_NR_send_byte((kal_uint8)(parameter_data_handfree_mode[i_NR_Download_para]));
+ }
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ TWOMICNR_I2C_STOP_TRANSMISSION;
+ break;
+ case 2:
+ TWOMICNR_I2C_START_TRANSMISSION;
+ for (i_NR_Download_para = 0; i_NR_Download_para < TWOMICNR_BYPASS_PARA_LENGTH; i_NR_Download_para++)
+ {
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ Two_Mic_NR_send_byte((kal_uint8)(parameter_data_bypass_mode[i_NR_Download_para]));
+ }
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ TWOMICNR_I2C_STOP_TRANSMISSION;
+ break;
+ case 3:
+ TWOMICNR_I2C_START_TRANSMISSION;
+ for (i_NR_Download_para = 0; i_NR_Download_para < TWOMICNR_INIT_PARA_LENGTH; i_NR_Download_para++)
+ {
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ Two_Mic_NR_send_byte((kal_uint8)(parameter_data_Init[i_NR_Download_para]));
+ }
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ TWOMICNR_I2C_STOP_TRANSMISSION;
+ break;
+ default:
+ break;
+ }
+
+ return;
+}
+
+
+/*****************************************************************************
+ Function: Two_Mic_NR_chip_Sleep
+ Parameters:
+
+ Returns:
+ Side Effects: -
+
+ Description: To sleep the FM chip.
+ 1. Set PWD low
+ 2. Wait 15ms
+ 3. Turn off the main clock
+****************************************************************************/
+void Two_Mic_NR_chip_Sleep(void)
+{
+ /*Set PWD low */
+ GPIO_WriteIO(0,TWOMICNR_FM_PWDN_GPIO_PIN);
+
+ /*Wait 15ms */
+ kal_sleep_task(4);
+
+ /*Turn off the main clock */
+ GPIO_ModeSetup(TWOMICNR_FM_13MHZ_GPIO_PIN, 0); /* GPIO mode */
+ GPIO_InitIO(OUTPUT,TWOMICNR_FM_13MHZ_GPIO_PIN);
+ GPIO_WriteIO(0,TWOMICNR_FM_13MHZ_GPIO_PIN); /* low voltage */
+
+ return;
+}
+
+
+/*****************************************************************************
+ Function: Two_Mic_NR_chip_Init
+ Parameters:
+
+ Returns:
+ Side Effects: -
+
+ Description: To initialize the FM chip after power on of the handset
+ 1. RST/PWD/BYPASS power on default at low
+ 2. Open main clock
+ 3. Set PWD high
+ 4. Wait 5ms
+ 5. Set RST high
+ 6. Wait 15ms
+*****************************************************************************/
+void Two_Mic_NR_chip_Init(void)
+{
+ /*RST/PWD/BYPASS power on default at low */
+ GPIO_ModeSetup(TWOMICNR_FM_RST_GPIO_PIN, 0); /* GPIO mode */
+ GPIO_InitIO(OUTPUT,TWOMICNR_FM_RST_GPIO_PIN);
+ GPIO_WriteIO(0,TWOMICNR_FM_RST_GPIO_PIN);
+ GPIO_ModeSetup(TWOMICNR_FM_PWDN_GPIO_PIN, 0); /* GPIO mode */
+ GPIO_InitIO(OUTPUT,TWOMICNR_FM_PWDN_GPIO_PIN);
+ GPIO_WriteIO(0,TWOMICNR_FM_PWDN_GPIO_PIN);
+ GPIO_ModeSetup(TWOMICNR_FM_BYPASS_GPIO_PIN, 0); /* GPIO mode */
+ GPIO_InitIO(OUTPUT,TWOMICNR_FM_BYPASS_GPIO_PIN);
+ GPIO_WriteIO(0,TWOMICNR_FM_BYPASS_GPIO_PIN);
+
+ /*Open main clock */
+ (*(volatile kal_uint16 *)(0x84023200)) = 0x3; /* 13MHz */
+ GPIO_ModeSetup(TWOMICNR_FM_13MHZ_GPIO_PIN, 2); /* CLKM2 mode */
+
+ /*Set PWD high */
+ GPIO_WriteIO(1,TWOMICNR_FM_PWDN_GPIO_PIN);
+
+ /*Wait 5ms */
+ /*1 ticks = 4.615ms */
+ kal_sleep_task(2);
+
+ /*Set RST high */
+ GPIO_WriteIO(1,TWOMICNR_FM_RST_GPIO_PIN);
+
+ /*Wait 15ms */
+ kal_sleep_task(4);
+
+ /*Download Init_para */
+ Two_Mic_NR_Download(3);
+
+ /*Enter power-down state */
+ Two_Mic_NR_chip_Sleep();
+
+ return;
+}
+
+/*****************************************************************************
+ Function: FM_chip_Reset
+ Parameters:
+
+ Returns:
+ Side Effects: -
+
+ Description: To reset the FM chip
+ 1. Mute UL path
+ 2. If clock is not running, turn on the main clock first
+ 3. Set BYPASS low
+ 4. Set PWD high
+ 5. Set RST low
+ 6. Wait 1ms.
+ 7. Set RST high
+ 8. Wait 15 ms.
+ 9. Un-mute UL path
+*****************************************************************************/
+void FM_chip_Reset(void)
+{
+ /*Mute UL path */
+
+ /*If clock is not running, turn on the main clock first */
+ (*(volatile unsigned short *)(0x84023200)) = 0x3; /* 13MHz */
+ GPIO_ModeSetup(TWOMICNR_FM_13MHZ_GPIO_PIN, 2); /* CLKM2 mode */
+
+ /*Set BYPASS low */
+ GPIO_WriteIO(0,TWOMICNR_FM_BYPASS_GPIO_PIN);
+
+ /*Set PWD high */
+ GPIO_WriteIO(1,TWOMICNR_FM_PWDN_GPIO_PIN);
+
+ /* Set RST low */
+ GPIO_WriteIO(0,TWOMICNR_FM_RST_GPIO_PIN);
+
+ /* Wait 1ms */
+ kal_sleep_task(2);
+
+ /* Set RST high */
+ GPIO_WriteIO(1,TWOMICNR_FM_RST_GPIO_PIN);
+
+ /* Wait 15ms */
+ kal_sleep_task(4);
+
+ /* Un-mute UL path */
+
+ return;
+}
+
+
+
+/*****************************************************************************
+ Function: Two_Mic_NR_chip_Bypass_mode
+ Parameters:
+
+ Returns:
+ Side Effects: -
+
+ Description: Make the FM chip to enter bypass mode
+*****************************************************************************/
+void Two_Mic_NR_chip_Bypass_mode(void)
+{
+ FM_chip_Reset();
+
+ /* Download bypass parameter */
+ Two_Mic_NR_Download(2);
+
+ /* Wait 100 ms */
+ kal_sleep_task(25);
+
+ /*Set BYPASS high */
+ GPIO_WriteIO(1,TWOMICNR_FM_BYPASS_GPIO_PIN);
+
+ return;
+}
+
+/*****************************************************************************
+ Function: Two_Mic_NR_chip_exit_Bypass_mode
+ Parameters:
+
+ Returns:
+ Side Effects: -
+
+ Description: Make the FM chip to exit bypass mode, into power down mode
+*****************************************************************************/
+void Two_Mic_NR_chip_exit_Bypass_mode(void)
+{
+ /*Set BYPASS low */
+ GPIO_WriteIO(0,TWOMICNR_FM_BYPASS_GPIO_PIN);
+ Two_Mic_NR_chip_Sleep();
+
+ return;
+}
+
+
+/*****************************************************************************
+ Function: Two_Mic_NR_chip_Handset_mode
+ Parameters:
+
+ Returns:
+ Side Effects: -
+
+ Description: Make the FM chip to enter handset mode
+*****************************************************************************/
+void Two_Mic_NR_chip_Handset_mode(void)
+{
+ FM_chip_Reset();
+
+ /* Download handset parameter */
+ Two_Mic_NR_Download(0);
+
+ return;
+}
+
+
+/*****************************************************************************
+ Function: Two_Mic_NR_chip_Handfree_mode
+ Parameters:
+
+ Returns:
+ Side Effects: -
+
+ Description: Make the FM chip to enter handfree mode
+*****************************************************************************/
+void Two_Mic_NR_chip_Handfree_mode(void)
+{
+ FM_chip_Reset();
+
+ /*Download handfree parameter */
+ Two_Mic_NR_Download(1);
+
+ return;
+}
+
+
+
+
+/****************************************************************************************************************************
+ Function: Two_Mic_NR_GPIO_con
+ Parameters:
+ GPIO_pin_name: the GPIO pin to be manipulated. 0 -> reset 1 -> PWDN 2 -> bypass
+ GPIO_pin_voltage : the voltage level which needs to be reached. 0 -> low 1 -> high
+ Returns:
+ Side Effects: -
+
+ Description: To manipulate the GPIO pin according to the command, which comes from PC tools through UART port
+****************************************************************************************************************************/
+void Two_Mic_NR_GPIO_con(unsigned short GPIO_pin_name,unsigned short GPIO_pin_voltage)
+{
+ switch (GPIO_pin_name){
+ case 0:
+ GPIO_ModeSetup(TWOMICNR_FM_RST_GPIO_PIN, 0); /* GPIO mode */
+ GPIO_InitIO(OUTPUT,TWOMICNR_FM_RST_GPIO_PIN);
+ if (GPIO_pin_voltage == 0)
+ {
+ GPIO_WriteIO(0,TWOMICNR_FM_RST_GPIO_PIN);
+ }
+ else
+ {
+ GPIO_WriteIO(1,TWOMICNR_FM_RST_GPIO_PIN);
+ }
+ break;
+ case 1:
+ GPIO_ModeSetup(TWOMICNR_FM_PWDN_GPIO_PIN, 0); /* GPIO mode */
+ GPIO_InitIO(OUTPUT,TWOMICNR_FM_PWDN_GPIO_PIN);
+ if (GPIO_pin_voltage == 0)
+ {
+ GPIO_WriteIO(0,TWOMICNR_FM_PWDN_GPIO_PIN);
+ }
+ else
+ {
+ GPIO_WriteIO(1,TWOMICNR_FM_PWDN_GPIO_PIN);
+ }
+ break;
+ case 2:
+ GPIO_ModeSetup(TWOMICNR_FM_BYPASS_GPIO_PIN, 0); /* GPIO mode */
+ GPIO_InitIO(OUTPUT,TWOMICNR_FM_BYPASS_GPIO_PIN);
+ if (GPIO_pin_voltage == 0)
+ {
+ GPIO_WriteIO(0,TWOMICNR_FM_BYPASS_GPIO_PIN);
+ }
+ else
+ {
+ GPIO_WriteIO(1,TWOMICNR_FM_BYPASS_GPIO_PIN);
+ }
+ break;
+ default:
+ break;
+ }
+
+
+ return;
+}
+
+
+/****************************************************************************************************************************
+ Function: Two_mic_NR_I2C_download_data
+ Parameters:
+ Command_data_to_be_sent: this array contains the command data to be downloaded into the FM2018x chip
+ One_command_data_length : the length of this array
+ Returns:
+ Side Effects: -
+
+ Description: To download the corresponding parameters into FM chip, which comes from PC tools through UART port
+****************************************************************************************************************************/
+void Two_mic_NR_I2C_download_data(unsigned char* Command_data_to_be_sent,kal_uint16 One_command_data_length)
+{
+ kal_uint8 j;
+ kal_uint16 counter;
+
+ TWOMICNR_I2C_START_TRANSMISSION;
+ for (counter = 0; counter < One_command_data_length; counter++)
+ {
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ Two_Mic_NR_send_byte((kal_uint8)(Command_data_to_be_sent[counter]));
+ }
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ TWOMICNR_I2C_STOP_TRANSMISSION;
+
+
+ return;
+}
+
+
+/****************************************************************************************************************************
+ Function: Two_mic_NR_I2C_readback_data
+ Parameters:
+ readback_command_to_be_sent: the chip ID of the FM2018x for reading back operation, '0xC1' now
+ readback_data_length : the length of this array
+ Returns:
+ Side Effects: -
+
+ Description: To download the corresponding parameters into FM chip, which comes from PC tools through UART port
+****************************************************************************************************************************/
+unsigned char Two_mic_NR_I2C_readback_data(unsigned char readback_command_to_be_sent)
+{
+ kal_uint8 j;
+ kal_uint8 return_value;
+
+
+ TWOMICNR_I2C_START_TRANSMISSION;
+
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ Two_Mic_NR_send_byte((kal_uint8)readback_command_to_be_sent);
+
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ return_value = Two_Mic_NR_get_byte();
+
+ for (j = 0; j < TWOMICNR_I2C_DELAY; j++);
+ TWOMICNR_I2C_STOP_TRANSMISSION;
+
+
+ return (unsigned char)return_value;
+}
+
+
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/two_mic_NR_custom_if.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/two_mic_NR_custom_if.h
new file mode 100644
index 0000000..f71a2d1
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/two_mic_NR_custom_if.h
@@ -0,0 +1,109 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * two_mic_NR_custom_if.h
+ *
+ * DateTime:
+ * ---------
+ * 9/27/2009 3:10PM
+ *
+ * Project:
+ * --------
+ * 2-mic NR
+ *
+ * Description:
+ * ------------
+ * This file contains the function for the state transition of the FM chip.
+ *
+ * Author:
+ *
+ *
+ **************************************************************************
+ **************************************************************************/
+
+#ifndef TWO_MIC_NR_CUSTOM_IF_H
+#define TWO_MIC_NR_CUSTOM_IF_H
+
+#include "kal_public_api.h" //MSBB change #include "kal_release.h" /* Basic data type */
+
+#ifdef __CUST_NEW__
+
+extern const char gpio_2micNR_scl_pin;
+extern const char gpio_2micNR_sda_pin;
+extern const char gpio_2micNR_bypass_pin;
+extern const char gpio_2micNR_13mhz_pin;
+extern const char gpio_2micNR_rst_pin;
+extern const char gpio_2micNR_pwdn_pin;
+
+#define TWOMICNR_I2C_SCL_GPIO_PIN gpio_2micNR_scl_pin
+#define TWOMICNR_I2C_SDA_GPIO_PIN gpio_2micNR_sda_pin
+#define TWOMICNR_FM_13MHZ_GPIO_PIN gpio_2micNR_13mhz_pin
+#define TWOMICNR_FM_RST_GPIO_PIN gpio_2micNR_rst_pin
+#define TWOMICNR_FM_PWDN_GPIO_PIN gpio_2micNR_pwdn_pin
+#define TWOMICNR_FM_BYPASS_GPIO_PIN gpio_2micNR_bypass_pin
+
+
+#else //__CUST_NEW__
+
+enum
+{
+ TWOMICNR_I2C_SCL_GPIO_PIN = 36,
+ TWOMICNR_I2C_SDA_GPIO_PIN = 37,
+ TWOMICNR_FM_13MHZ_GPIO_PIN = 43,
+ TWOMICNR_FM_RST_GPIO_PIN = 52,
+ TWOMICNR_FM_PWDN_GPIO_PIN = 53,
+ TWOMICNR_FM_BYPASS_GPIO_PIN = 54
+};
+
+#endif //__CUST_NEW__
+
+
+/***************************************************************************
+ * Function Prototypes
+ **************************************************************************/
+extern void Two_Mic_NR_chip_Handfree_mode(void);
+extern void Two_Mic_NR_chip_Init(void);
+extern void Two_Mic_NR_chip_Handset_mode(void);
+extern void Two_Mic_NR_chip_Bypass_mode(void);
+extern void Two_Mic_NR_chip_exit_Bypass_mode(void);
+extern void Two_Mic_NR_chip_Sleep(void);
+
+extern unsigned char Two_mic_NR_I2C_readback_data(unsigned char readback_command_to_be_sent);
+extern void Two_mic_NR_I2C_download_data(unsigned char* Command_data_to_be_sent,kal_uint16 One_command_data_length);
+extern void Two_Mic_NR_GPIO_con(unsigned short GPIO_pin_name,unsigned short GPIO_pin_voltage);
+#endif
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/uart_def.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/uart_def.c
new file mode 100644
index 0000000..eb960b6
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/uart_def.c
@@ -0,0 +1,482 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * uart_def.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This Module defines the size of UART ring buffer
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
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+ * removed!
+ *
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+ * removed!
+ *
+ * removed!
+ * removed!
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+ *
+ * removed!
+ * removed!
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+ *
+ * removed!
+ * removed!
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+ *
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+ * removed!
+ *
+ * removed!
+ * removed!
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+ * removed!
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+ * removed!
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+ * removed!
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+ * removed!
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+ *
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+ * removed!
+ * removed!
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+ * removed!
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+ *
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+ * removed!
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+ *
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+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
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+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#include "drv_comm.h"
+#include "uart_sw.h"
+
+/*
+1. remove get_mem by using allocate static array
+2. use different buffer size for __PRODUCTION_RELEASE__
+3. the buffer size is depending on the owner instead uart port
+*/
+
+UART_flowCtrlMode *UART_Get_FlowCtrl_Mode(void);
+const UART_rings_struct *UART_Get_Data(void);
+
+
+// define the uart ring buffer size
+#define L4_RX_LENGTH 2048
+#define L4_TX_LENGTH 3584
+#define L4_TXISR_LENGTH 3072
+#define TST_RX_LENGTH 2048
+#define TST_TX_LENGTH 3584
+#define TST_TXISR_LENGTH 3072
+#define CUSTOM_RX_LENGTH 2048
+#define CUSTOM_TX_LENGTH 3584
+#define CUSTOM_TXISR_LENGTH 3072
+
+
+
+//#pragma for D-cacheable, UART have VFIFO therefore use non-cacheable.
+#ifdef __MTK_TARGET__
+//#pragma arm section zidata = "NONCACHEDZI", rwdata = "NONCACHEDRW"
+//#pragma arm section zidata = "INTSRAM_ZI", rwdata = "INTSRAM_RW"
+//liming add :for 6255 bring up(MCU mode)
+// L4 ring buffer
+//__attribute__ ((zero_init, section ("NONCACHEDZI")))
+__attribute__((aligned(8)))
+ kal_uint8 L4_RxRingBuffer[L4_RX_LENGTH];
+//__attribute__ ((zero_init, section ("NONCACHEDZI")))
+__attribute__((aligned(8)))
+ kal_uint8 L4_TxRingBuffer[L4_TX_LENGTH];
+//__attribute__ ((zero_init, section ("NONCACHEDZI")))
+__attribute__((aligned(8)))
+ kal_uint8 L4_TxISRRingBuffer[L4_TXISR_LENGTH];
+
+#if !defined(DRV_MD_1_UART)// for MD only have one uart port,like MT6280
+// tst ring buffer
+__attribute__ ((zero_init, section ("NONCACHEDZI")))
+__attribute__((aligned(8)))
+ kal_uint8 TST_RxRingBuffer[TST_RX_LENGTH];
+__attribute__ ((zero_init, section ("NONCACHEDZI")))
+__attribute__((aligned(8)))
+ kal_uint8 TST_TxRingBuffer[TST_TX_LENGTH];
+__attribute__ ((zero_init, section ("NONCACHEDZI")))
+__attribute__((aligned(8)))
+ kal_uint8 TST_TxISRRingBuffer[TST_TXISR_LENGTH];
+#endif
+
+#ifdef __UART3_SUPPORT__
+// uart3 ring buffer
+__attribute__ ((zero_init, section ("NONCACHEDZI")))
+__attribute__((aligned(8)))
+ kal_uint8 CUSTOM_RxRingBuffer[CUSTOM_RX_LENGTH];
+__attribute__ ((zero_init, section ("NONCACHEDZI")))
+__attribute__((aligned(8)))
+ kal_uint8 CUSTOM_TxRingBuffer[CUSTOM_TX_LENGTH];
+__attribute__ ((zero_init, section ("NONCACHEDZI")))
+__attribute__((aligned(8)))
+ kal_uint8 CUSTOM_TxISRRingBuffer[CUSTOM_TXISR_LENGTH];
+#endif //__UART3_SUPPORT__
+
+
+#else//#ifdef __MTK_TARGET__
+
+kal_uint8 L4_RxRingBuffer[L4_RX_LENGTH];
+kal_uint8 L4_TxRingBuffer[L4_TX_LENGTH];
+kal_uint8 L4_TxISRRingBuffer[L4_TXISR_LENGTH];
+
+kal_uint8 TST_RxRingBuffer[TST_RX_LENGTH];
+kal_uint8 TST_TxRingBuffer[TST_TX_LENGTH];
+kal_uint8 TST_TxISRRingBuffer[TST_TXISR_LENGTH];
+
+#ifdef __UART3_SUPPORT__
+// uart3 ring buffer
+kal_uint8 CUSTOM_RxRingBuffer[CUSTOM_RX_LENGTH];
+kal_uint8 CUSTOM_TxRingBuffer[CUSTOM_TX_LENGTH];
+kal_uint8 CUSTOM_TxISRRingBuffer[CUSTOM_TXISR_LENGTH];
+#endif //__UART3_SUPPORT__
+
+#endif //#ifdef __MTK_TARGET__
+
+
+const UART_rings_struct UART_custom_rings =
+{
+ {
+ {
+ L4_RxRingBuffer,
+ L4_TxRingBuffer,
+ L4_TxISRRingBuffer,
+ sizeof L4_RxRingBuffer,
+ sizeof L4_TxRingBuffer,
+ sizeof L4_TxISRRingBuffer,
+ MOD_L4C,
+ },
+ #if !defined(DRV_MD_1_UART)// for MD only have one uart port,like MT6280
+ {
+ TST_RxRingBuffer,
+ TST_TxRingBuffer,
+ TST_TxISRRingBuffer,
+ sizeof TST_RxRingBuffer,
+ sizeof TST_TxRingBuffer,
+ sizeof TST_TxISRRingBuffer,
+ MOD_TST_READER,
+ },
+ #endif
+ #ifdef __UART3_SUPPORT__
+ {
+ CUSTOM_RxRingBuffer,
+ CUSTOM_TxRingBuffer,
+ CUSTOM_TxISRRingBuffer,
+ sizeof CUSTOM_RxRingBuffer,
+ sizeof CUSTOM_TxRingBuffer,
+ sizeof CUSTOM_TxISRRingBuffer,
+ MOD_UART3_HISR,
+ },
+ #endif // __UART3_SUPPORT__
+ },
+ #ifdef __UART3_SUPPORT__
+ uart_port2/*which one not support VFIFO*/
+ #else
+ uart_port_null/*which one not support VFIFO*/
+ #endif
+};
+const UART_rings_struct *UART_Get_Data(void)
+{
+ return (&UART_custom_rings);
+}
+
+const UART_customize_function_struct uart_custom_func =
+{
+ UART_Get_Data
+};
+
+const UART_customize_function_struct *UART_GetFunc(void)
+{
+ return (&uart_custom_func);
+}
+
+UART_flowCtrlMode UART_GetFlowCtrl(UART_PORT uart_port)
+{
+ UART_flowCtrlMode flow_ctrl;
+
+ switch(uart_port)
+ {
+ case uart_port1:
+//#if defined(__EXT_MODEM__) || defined(EMPTY_MMI) //for g+c or modem
+// flow_ctrl = fc_hw;
+//#else
+ flow_ctrl = fc_none;
+//#endif
+ break;
+ case uart_port2:
+ flow_ctrl=fc_none;
+ break;
+#ifdef __UART3_SUPPORT__
+ case uart_port3:
+ flow_ctrl=fc_none;
+ break;
+#endif
+#ifdef __IRDA_SUPPORT__
+ case uart_port_irda:
+ flow_ctrl=fc_none;
+ break;
+#endif
+#ifdef __USB_ENABLE__
+ case uart_port_usb:
+ flow_ctrl=fc_none;
+ break;
+#endif
+#ifdef __BT_SUPPORT__
+ case uart_port_bluetooth:
+ flow_ctrl=fc_none;
+ break;
+#endif
+ default:
+ flow_ctrl=fc_none;
+ break;
+
+ }
+ return(flow_ctrl);
+}
+
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/uem_gpio.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/uem_gpio.c
new file mode 100644
index 0000000..77c6e02
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/uem_gpio.c
@@ -0,0 +1,267 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * uem_gpio.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * The file contains definition of custom component module configuration
+ * variables, and routines handle for equipment device.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifdef __CUST_NEW__
+#ifndef __L1_STANDALONE__
+
+/*
+** Includes
+*/
+
+#include "device.h"
+#include "custom_equipment.h"
+#include "custom_em.h"
+//MSBB remove #include "kal_non_specific_general_types.h"
+#include "custom_hw_default.h"
+#include "dcl.h"
+
+#ifdef LQT_SUPPORT /* Please don't remove LQT code segments */
+#include "lcd_lqt.h"
+extern kal_uint8 lcd_at_mode;
+#endif /* LQT_SUPPORT */
+
+/*
+** Typedefs
+*/
+
+/*
+** Defines
+*/
+
+/*
+** Extern Functions
+*/
+extern void GPIO_WriteIO(char data, char port);
+extern void GPIO_WriteIO_FAST(char data, char port);
+extern void PWM_level(kal_uint8 level);
+extern void PWM2_level(kal_uint8 level);
+extern void PWM3_level(kal_uint8 level);
+//extern void Alter_level(kal_uint8 level);
+#if (defined(TOUCH_PAD_SUPPORT) && defined(__MTK_TARGET__))
+extern void Touchpad_PowerOn(const kal_bool bOn);
+#endif
+
+/*
+** Extern Varibales
+*/
+extern const char gpio_led_mainbl_en_pin;
+//extern const char gpio_led_keybl_en_pin;
+//extern const char gpio_led_keybl2_en_pin;
+//extern const char gpio_vibrator_en_pin;
+
+/*
+** Globol Varibales
+*/
+
+/*
+** Local Functions
+*/
+
+/*
+** Local Variables
+*/
+/***********************************************************
+ **
+ ** GPIO SETTTING
+ **
+ ***********************************************************/
+
+#if !defined(__FUE__) /* !!CUATION!! for FOTA support */
+/*
+* Function
+* custom_cfg_outward_gpio_port
+* DESCRIPTION
+* The function is used to handle the port number of the outward gpio device.
+* And it will be call by audio manager.
+* PARAMETERS
+* gpio_device_id IN
+* port_num IN/OUT
+* RETURNS
+* kal_bool
+* GLOBALS AFFECTED
+*/
+kal_uint8 custom_cfg_outward_gpio_port(kal_uint8 gpio_device_id /* gpio_device_enum */)
+{
+ if((gpio_device_id < GPIO_LABELID_MAX) && (gpio_map_tbl[gpio_device_id].vaild != GPIO_INVAILD))
+ return gpio_map_tbl[gpio_device_id].port;
+ else
+ return 0;
+}
+#endif
+
+kal_bool custom_cfg_gpio_set_level(kal_uint8 gpio_dev_type, kal_uint8 gpio_dev_level )
+{
+ switch(gpio_dev_type)
+ {
+ case GPIO_DEV_LED_MAINLCD:
+ break;
+
+ case GPIO_DEV_LED_STATUS_1:
+ {
+ DCL_HANDLE handle;
+ handle = DclGPIO_Open(DCL_GPIO,101);
+ //DclGPIO_Control(handle,GPIO_CMD_SET_MODE_0,0);
+ //DclGPIO_Control(handle,GPIO_CMD_SET_DIR_OUT,0);
+ if(gpio_dev_level == LED_LIGHT_LEVEL0)
+ DclGPIO_Control(handle, GPIO_CMD_WRITE_LOW, 0);
+ else
+ DclGPIO_Control(handle, GPIO_CMD_WRITE_HIGH, 0);
+ DclGPIO_Close(handle);
+ }
+ break;
+
+ case GPIO_DEV_LED_STATUS_2:
+ {
+ DCL_HANDLE handle;
+ handle = DclGPIO_Open(DCL_GPIO,102);
+ //DclGPIO_Control(handle,GPIO_CMD_SET_MODE_0,0);
+ //DclGPIO_Control(handle,GPIO_CMD_SET_DIR_OUT,0);
+ if(gpio_dev_level == LED_LIGHT_LEVEL0)
+ DclGPIO_Control(handle,GPIO_CMD_WRITE_LOW, 0);
+ else
+ DclGPIO_Control(handle,GPIO_CMD_WRITE_HIGH, 0);
+ DclGPIO_Close(handle);
+ }
+ break;
+
+ case GPIO_DEV_LED_STATUS_3:
+ {
+ DCL_HANDLE handle;
+ handle = DclGPIO_Open(DCL_GPIO,103);
+ //DclGPIO_Control(handle,GPIO_CMD_SET_MODE_0,0);
+ //DclGPIO_Control(handle,GPIO_CMD_SET_DIR_OUT,0);
+ if(gpio_dev_level == LED_LIGHT_LEVEL0)
+ DclGPIO_Control(handle,GPIO_CMD_WRITE_LOW, 0);
+ else
+ DclGPIO_Control(handle,GPIO_CMD_WRITE_HIGH, 0);
+ DclGPIO_Close(handle);
+ }
+ break;
+
+ case GPIO_DEV_LED_KEY:
+ break;
+
+ case GPIO_DEV_VIBRATOR:
+ {
+#ifdef __MTK_TARGET__
+ DCL_HANDLE handle;
+ PMU_CTRL_LDO_BUCK_SET_EN val;
+ handle = DclPMU_Open(DCL_PMU, FLAGS_NONE);
+ val.mod=VIBR;
+
+ if(gpio_dev_level == LED_LIGHT_LEVEL0)
+ {
+ val.enable = DCL_FALSE;
+ }
+ else
+ {
+ val.enable = DCL_TRUE;
+ }
+
+ DclPMU_Control(handle, LDO_BUCK_SET_EN, (DCL_CTRL_DATA_T *)&val);
+ DclPMU_Close(handle);
+#endif // End of #ifdef __MTK_TARGET__
+ break;
+ }
+
+ default:
+ /* error undefine */
+ return KAL_FALSE;
+ }
+
+ return KAL_TRUE;
+}
+
+void custom_start_flashlight(kal_uint8 red_level, kal_uint8 green_level, kal_uint8 blue_level, kal_uint8 duty)
+{
+ DCL_HANDLE pwm_handle;
+ PWM_CMD_CONFIG_OLD_T old_config;
+
+ custom_cfg_gpio_set_level(GPIO_DEV_LED_STATUS_1, ((red_level>0) ? LED_LIGHT_LEVEL5 : LED_LIGHT_LEVEL0));
+ custom_cfg_gpio_set_level(GPIO_DEV_LED_STATUS_2, ((green_level>0) ? LED_LIGHT_LEVEL5 : LED_LIGHT_LEVEL0));
+ custom_cfg_gpio_set_level(GPIO_DEV_LED_STATUS_3, ((blue_level>0) ? LED_LIGHT_LEVEL5 : LED_LIGHT_LEVEL0));
+
+ pwm_handle = DclPWM_Open(DCL_PWM2,MOD_UEM);
+ old_config.freq = PWM2_Level_Info[0][0];
+ old_config.duty = duty;
+ DclPWM_Control(pwm_handle, PWM_CMD_CONFIG_OLD, (DCL_CTRL_DATA_T*)&old_config);
+ DclPWM_Control(pwm_handle, PWM_CMD_START, 0);
+ DclPWM_Close(pwm_handle);
+}
+
+void custom_stop_flashlight(void)
+{
+ DCL_HANDLE pwm_handle;
+
+ custom_cfg_gpio_set_level(GPIO_DEV_LED_STATUS_1, LED_LIGHT_LEVEL0);
+ custom_cfg_gpio_set_level(GPIO_DEV_LED_STATUS_2, LED_LIGHT_LEVEL0);
+ custom_cfg_gpio_set_level(GPIO_DEV_LED_STATUS_3, LED_LIGHT_LEVEL0);
+
+ pwm_handle = DclPWM_Open(DCL_PWM2,MOD_UEM);
+ DclPWM_Control(pwm_handle, PWM_CMD_STOP, 0);
+ DclPWM_Close(pwm_handle);
+}
+
+#endif /* !__L1_STANDALONE__ */
+
+#endif /* __CUST_NEW__ */
\ No newline at end of file
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/uem_patterns_def.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/uem_patterns_def.h
new file mode 100644
index 0000000..5493741
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/uem_patterns_def.h
@@ -0,0 +1,85 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * uem_patterns_def.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * The file contains definition of custom component module configuration
+ * variables, and routines handle for equipment device.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef UEM_PATTERNS_DEF_H
+#define UEM_PATTERNS_DEF_H
+
+#define TOUCH_FEEDBACK_VIB_DUR 50
+
+#endif /*UEM_PATTERNS_DEF_H*/
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/usb_custom.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/usb_custom.c
new file mode 100644
index 0000000..8be7e49
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/usb_custom.c
@@ -0,0 +1,1451 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * usb_custom.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file implements usb customer support
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#include "drv_comm.h"
+#include "eint.h"
+#include "usb_custom.h"
+//MSBB remove #include "kal_non_specific_general_types.h"
+#include "drv_features.h"
+#include "dcl.h"
+#include "usb_custom_def.h"
+#include "usb_memory_def.h"
+
+
+
+/************************************************************
+ external variables
+*************************************************************/
+#if defined(__USB_ENABLE__)&&defined(__USB_MASS_STORAGE_ENABLE__)
+ #include "usb_msdisk.h"
+ #include "fat_fs.h"
+
+ extern USB_DiskDriver_STRUCT USB_NOR_drv;
+ extern USB_DiskDriver_STRUCT USB_SIMPLUS_drv;
+ #ifdef NAND_SUPPORT
+ extern USB_DiskDriver_STRUCT USB_NAND_drv;
+ #endif /*NAND_SUPPORT*/
+ #ifdef __USB_MASS_STORAGE_CDROM_ENABLE__
+ extern USB_DiskDriver_STRUCT USB_CDROM_drv;
+ #endif /*__USB_MASS_STORAGE_CDROM_ENABLE__*/
+ #ifdef __MSDC_DUAL_CARD_SWITCH__
+ extern USB_DiskDriver_STRUCT USB_tCard_2_drv;
+ #endif /*__MSDC_DUAL_CARD_SWITCH__*/
+ #if defined(__SIM_PLUS__)
+ extern kal_bool g_usb_ms_simplus_exist;
+ #endif /*__SIM_PLUS__*/
+#endif /*#if defined(__USB_ENABLE__)&&defined(__USB_MASS_STORAGE_ENABLE__)*/
+
+
+
+
+#ifdef __CUST_NEW__
+#if (defined(__USB_ENABLE__) && defined(PMIC_6305_USB_FUNCTION))
+extern const char gpio_usb_enable_pin;
+#endif
+#if defined(__USB_ENABLE__) && defined(DRV_PHY_CHARGER_DETECT_BY_EXTERNAL_R)
+extern const char gpio_usb_chr_det_switch_pin;
+#endif
+#endif /* __CUST_NEW__ */
+
+
+
+#ifdef __USB_ENABLE__
+#if defined(__MTK_TARGET__)
+__attribute__((zero_init, section ("NONCACHEDZI"),aligned(16)))
+#endif
+kal_uint8 USB_BUFFER[USB_MAX_MEMORY_SIZE]; // USB total buffer
+#endif
+
+
+
+/************************************************************
+ device descriptor parameters
+*************************************************************/
+
+static const kal_uint16 USB_MANUFACTURER_STRING[] =
+{
+ 0x031a,
+ 'M',
+ 'e',
+ 'd',
+ 'i',
+ 'a',
+ 'T',
+ 'e',
+ 'k',
+ ' ',
+ 'I',
+ 'n',
+ 'c'
+};
+
+static const kal_uint16 USB_PRODUCT_STRING[] =
+{
+ 0x0310,
+ 'P',
+ 'r',
+ 'o',
+ 'd',
+ 'u',
+ 'c',
+ 't'
+};
+
+
+static const USB_DEVICE_PARAM usb_device_param =
+{
+ LEVEL_HIGH, /* cable plugin level */
+ 0x0e8d, /* vendor id */
+ USB_MANUFACTURER_STRING,
+ sizeof(USB_MANUFACTURER_STRING)/sizeof(kal_uint16),
+ USB_PRODUCT_STRING,
+ sizeof(USB_PRODUCT_STRING)/sizeof(kal_uint16)
+};
+
+ /************************************************************
+ mass storage parameters
+*************************************************************/
+
+ /*USB mass storage customize*/
+
+/* Inquire data explanation
+ The length byte(Byte 4) should be always not changed, the mass storage spec define it
+ Byte 8 to 15 is Vendor Information
+ Byte 16 to 31 is Product Identification
+ Byte 32 to 35 is Product Revision Level */
+#ifdef __MTK_TARGET__
+__attribute__ ((section ("NONCACHEDRW"), aligned(4)))
+#endif /* __MTK_TARGET__ */
+kal_uint8 INQUIRE_DATA[] =
+{
+ 0x00,
+ 0x80,
+ 0x00,
+ 0x01,
+ 0x1f, /*length*/
+ 0x00,
+ 0x00,
+ 0x00,
+ 'M',
+ 'E',
+ 'D',
+ 'I',
+ 'A',
+ 'T',
+ 'E',
+ 'K',
+ ' ',
+ 'F',
+ 'L',
+ 'A',
+ 'S',
+ 'H',
+ ' ',
+ 'D',
+ 'I',
+ 'S',
+ 'K',
+ ' ',
+ ' ',
+ ' ',
+ ' ',
+ ' ',
+ '6',
+ '2',
+ '2',
+ '5'
+};
+
+static const kal_uint16 USB_MS_INTERFACE_STRING[] =
+{
+ 0x031c,
+ 'M',
+ 'a',
+ 's',
+ 's',
+ ' ',
+ 'S',
+ 't',
+ 'o',
+ 'r',
+ 'a',
+ 'g',
+ 'e',
+ ' '
+};
+
+
+static const USB_MS_PARAM usb_ms_param =
+{
+ 0x0002, /* Mass storage Product ID */
+ INQUIRE_DATA,
+ sizeof(INQUIRE_DATA)/sizeof(kal_uint8),
+ USB_MS_INTERFACE_STRING,
+ sizeof(USB_MS_INTERFACE_STRING)/sizeof(kal_uint16)
+};
+
+/************************************************************
+ CDC ACM parameters
+*************************************************************/
+
+static const kal_uint16 USB_ACM_COMM_INTERFACE_STRING[] =
+{
+ 0x031A,
+ 'C',
+ 'O',
+ 'M',
+ '(',
+ 'c',
+ 'o',
+ 'm',
+ 'm',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+
+static const kal_uint16 USB_ACM_DATA_INTERFACE_STRING[] =
+{
+ 0x031A,
+ 'C',
+ 'O',
+ 'M',
+ '(',
+ 'd',
+ 'a',
+ 't',
+ 'a',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+
+#if defined(__USB_MULTIPLE_COMPORT_SUPPORT__)
+
+static const kal_uint16 USB_ACM_COMM_INTERFACE_STRING_2[] =
+{
+ 0x031A,
+ 'C',
+ 'O',
+ 'M',
+ '(',
+ 'c',
+ 'o',
+ 'm',
+ 'm',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+
+
+static const kal_uint16 USB_ACM_DATA_INTERFACE_STRING_2[] =
+{
+ 0x031A,
+ 'C',
+ 'O',
+ 'M',
+ '(',
+ 'd',
+ 'a',
+ 't',
+ 'a',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+
+#if defined (__USB_MODEM_CARD_SUPPORT__)
+static const kal_uint16 USB_ACM_COMM_INTERFACE_STRING_3[] =
+{
+ 0x031A,
+ 'C',
+ 'O',
+ 'M',
+ '(',
+ 'c',
+ 'o',
+ 'm',
+ 'm',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+
+
+static const kal_uint16 USB_ACM_DATA_INTERFACE_STRING_3[] =
+{
+ 0x031A,
+ 'C',
+ 'O',
+ 'M',
+ '(',
+ 'd',
+ 'a',
+ 't',
+ 'a',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+
+static const kal_uint16 USB_ACM_COMM_INTERFACE_STRING_4[] =
+{
+ 0x031A,
+ 'C',
+ 'O',
+ 'M',
+ '(',
+ 'c',
+ 'o',
+ 'm',
+ 'm',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+
+
+static const kal_uint16 USB_ACM_DATA_INTERFACE_STRING_4[] =
+{
+ 0x031A,
+ 'C',
+ 'O',
+ 'M',
+ '(',
+ 'd',
+ 'a',
+ 't',
+ 'a',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+
+static const kal_uint16 USB_ACM_COMM_INTERFACE_STRING_5[] =
+{
+ 0x031A,
+ 'C',
+ 'O',
+ 'M',
+ '(',
+ 'c',
+ 'o',
+ 'm',
+ 'm',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+
+
+static const kal_uint16 USB_ACM_DATA_INTERFACE_STRING_5[] =
+{
+ 0x031A,
+ 'C',
+ 'O',
+ 'M',
+ '(',
+ 'd',
+ 'a',
+ 't',
+ 'a',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+#endif
+
+#endif /* defined(__USB_MULTIPLE_COMPORT_SUPPORT__) */
+
+
+
+static const USB_ACM_PARAM usb_acm_param =
+{
+#if !defined (__USB_MODEM_CARD_SUPPORT__)
+ 0x0003, /* CDC ACM Product ID */
+#else
+ 0x00A0, /* CDC ACM Product ID */
+#endif
+ USB_ACM_COMM_INTERFACE_STRING,
+ sizeof(USB_ACM_COMM_INTERFACE_STRING)/sizeof(kal_uint16),
+ USB_ACM_DATA_INTERFACE_STRING,
+ sizeof(USB_ACM_DATA_INTERFACE_STRING)/sizeof(kal_uint16),
+#if defined(__USB_MULTIPLE_COMPORT_SUPPORT__)
+#if !defined (__USB_MODEM_CARD_SUPPORT__)
+ 0x0023, /* dual CDC ACM Product ID */
+#else
+ 0x00A1, /* dual CDC ACM Product ID */
+#endif
+ USB_ACM_COMM_INTERFACE_STRING_2,
+ sizeof(USB_ACM_COMM_INTERFACE_STRING_2)/sizeof(kal_uint16),
+ USB_ACM_DATA_INTERFACE_STRING_2,
+ sizeof(USB_ACM_DATA_INTERFACE_STRING_2)/sizeof(kal_uint16),
+#if defined (__USB_MODEM_CARD_SUPPORT__)
+ 0x00A2, /* dual CDC ACM Product ID */
+ USB_ACM_COMM_INTERFACE_STRING_3,
+ sizeof(USB_ACM_COMM_INTERFACE_STRING_3)/sizeof(kal_uint16),
+ USB_ACM_DATA_INTERFACE_STRING_3,
+ sizeof(USB_ACM_DATA_INTERFACE_STRING_3)/sizeof(kal_uint16),
+#endif
+#endif
+#if defined(__USB_TETHERING__)
+ 0x000A, // ISD Product ID
+ 0x0013, // ISD + COM Product ID
+#endif
+#if defined(__USB_DATA_CONNECTION__)
+ 0x0043, //Data Connection Single port
+ 0x0033, //Data Connection Dual port
+#endif
+#if defined(__USB_MODEM_CARD_SUPPORT__)
+ 0x00A4, //desc_5vcom_product;
+ 0x00A5, //desc_mbim_4vcom_product;
+#endif
+};
+
+
+
+#ifdef WEBCAM_SUPPORT
+
+/************************************************************
+ VIDEO parameters
+*************************************************************/
+
+static const kal_uint16 USB_VIDEO_VC_INTERFACE_STRING[] =
+{
+ 0x031A,
+ 'V',
+ 'I',
+ 'D',
+ 'E',
+ 'O',
+ '(',
+ 'V',
+ 'C',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+
+static const kal_uint16 USB_VIDEO_CT_INTERFACE_STRING[] =
+{
+ 0x031A,
+ 'V',
+ 'I',
+ 'D',
+ 'E',
+ 'O',
+ '(',
+ 'C',
+ 'T',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+
+static const kal_uint16 USB_VIDEO_OUTPUT_INTERFACE_STRING[] =
+{
+ 0x0322,
+ 'V',
+ 'I',
+ 'D',
+ 'E',
+ 'O',
+ '(',
+ 'o',
+ 'u',
+ 't',
+ 'p',
+ 'u',
+ 't',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+
+static const kal_uint16 USB_VIDEO_PU_INTERFACE_STRING[] =
+{
+ 0x031A,
+ 'V',
+ 'I',
+ 'D',
+ 'E',
+ 'O',
+ '(',
+ 'P',
+ 'U',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+
+static const kal_uint16 USB_VIDEO_VS_INTERFACE_STRING[] =
+{
+ 0x031A,
+ 'V',
+ 'I',
+ 'D',
+ 'E',
+ 'O',
+ '(',
+ 'V',
+ 'S',
+ '_',
+ 'i',
+ 'f',
+ ')'
+};
+
+static const USB_VIDEO_PARAM usb_video_param =
+{
+ 0x0004, /* video Product ID */
+#ifdef __COMPOSITE_WEBCAM__
+ 0x0014, // PID (for composite : Webcam+COM)
+#endif
+ USB_VIDEO_VC_INTERFACE_STRING,
+ sizeof(USB_VIDEO_VC_INTERFACE_STRING)/sizeof(kal_uint16),
+ USB_VIDEO_CT_INTERFACE_STRING,
+ sizeof(USB_VIDEO_CT_INTERFACE_STRING)/sizeof(kal_uint16),
+ USB_VIDEO_OUTPUT_INTERFACE_STRING,
+ sizeof(USB_VIDEO_OUTPUT_INTERFACE_STRING)/sizeof(kal_uint16),
+ USB_VIDEO_PU_INTERFACE_STRING,
+ sizeof(USB_VIDEO_PU_INTERFACE_STRING)/sizeof(kal_uint16),
+ USB_VIDEO_VS_INTERFACE_STRING,
+ sizeof(USB_VIDEO_VS_INTERFACE_STRING)/sizeof(kal_uint16)
+};
+#endif /* WEBCAM_SUPPORT */
+
+#ifdef PICTBRIDGE_SUPPORT
+/************************************************************
+ PTP IMAGE parameters
+*************************************************************/
+static const kal_uint16 USB_PTP_IMAGE_INTERFACE_STRING[] =
+{
+ 0x030C,
+ 'I',
+ 'M',
+ 'A',
+ 'G',
+ 'E'
+};
+
+
+/* Must have NULL termination */
+static const kal_uint16 USB_PTP_IMAGE_MANUFACTURER_STRING[] =
+{
+ 'M',
+ 'e',
+ 'd',
+ 'i',
+ 'a',
+ 'T',
+ 'e',
+ 'k',
+ ' ',
+ 'I',
+ 'n',
+ 'c',
+ '.',
+ '\0'
+};
+
+
+/* Must have NULL termination */
+static const kal_uint16 USB_PTP_IMAGE_MODEL_STRING[] =
+{
+ 'M',
+ 'T',
+ 'K',
+ ' ',
+ 'I',
+ 'M',
+ 'A',
+ 'G',
+ 'E',
+ ' ',
+ '\0'
+};
+
+
+/* Must have NULL termination */
+static const kal_uint16 USB_PTP_IMAGE_DEVICE_VERSION_STRING[] =
+{
+ '1',
+ '.',
+ '0',
+ '0',
+ '\0'
+};
+
+
+/* Must have NULL termination */
+static const kal_uint16 USB_PTP_IMAGE_SERIAL_NUMBER_STRING[] =
+{
+ '5',
+ '6',
+ '7',
+ '0',
+ '7',
+ '6',
+ '6',
+ '\0'
+};
+
+
+static const USB_IMAGE_PARAM usb_image_param =
+{
+ 0x0005, /* USB PTP image Product ID */
+ USB_PTP_IMAGE_INTERFACE_STRING,
+ sizeof(USB_PTP_IMAGE_INTERFACE_STRING)/sizeof(kal_uint16),
+ USB_PTP_IMAGE_MANUFACTURER_STRING,
+ sizeof(USB_PTP_IMAGE_MANUFACTURER_STRING)/sizeof(kal_uint16),
+ USB_PTP_IMAGE_MODEL_STRING,
+ sizeof(USB_PTP_IMAGE_MODEL_STRING)/sizeof(kal_uint16),
+ USB_PTP_IMAGE_DEVICE_VERSION_STRING,
+ sizeof(USB_PTP_IMAGE_DEVICE_VERSION_STRING)/sizeof(kal_uint16),
+ USB_PTP_IMAGE_SERIAL_NUMBER_STRING,
+ sizeof(USB_PTP_IMAGE_SERIAL_NUMBER_STRING)/sizeof(kal_uint16)
+};
+
+#endif /* PICTBRIDGE_SUPPORT */
+
+
+#ifdef __MTP_ENABLE__
+/************************************************************
+ MTP IMAGE parameters
+*************************************************************/
+static const kal_uint16 USB_MTP_IMAGE_INTERFACE_STRING[] =
+{
+ 0x0314,
+ 'I',
+ 'M',
+ 'A',
+ 'G',
+ 'E',
+ ' ',
+ 'M',
+ 'T',
+ 'P'
+};
+
+/* Must have NULL termination */
+static const kal_uint16 USB_MTP_IMAGE_MANUFACTURER_STRING[] =
+{
+ 'M',
+ 'e',
+ 'd',
+ 'i',
+ 'a',
+ 'T',
+ 'e',
+ 'k',
+ ' ',
+ 'I',
+ 'n',
+ 'c',
+ '.',
+ ' ',
+ 'M',
+ 'T',
+ 'P',
+ '\0'
+};
+
+/* Must have NULL termination */
+static const kal_uint16 USB_MTP_IMAGE_MODEL_STRING[] =
+{
+ 'M',
+ 'T',
+ 'K',
+ ' ',
+ 'I',
+ 'M',
+ 'A',
+ 'G',
+ 'E',
+ ' ',
+ 'M',
+ 'T',
+ 'P',
+ ' ',
+ '\0'
+};
+
+
+/* Must have NULL termination */
+static const kal_uint16 USB_MTP_IMAGE_DEVICE_VERSION_STRING[] =
+{
+ '2',
+ '.',
+ '0',
+ '0',
+ '\0'
+};
+
+
+/* USB flash disk, must have NULL termination */
+static const kal_uint16 USB_MTP_IMAGE_STORAGE_DESCRIPTION_STRING_1[] =
+{
+ 'P',
+ 'h',
+ 'o',
+ 'n',
+ 'e',
+ '\0'
+};
+
+
+/* USB card disk, must have NULL termination */
+static const kal_uint16 USB_MTP_IMAGE_STORAGE_DESCRIPTION_STRING_2[] =
+{
+ 'C',
+ 'a',
+ 'r',
+ 'd',
+ '\0'
+};
+
+
+/* Must have NULL termination */
+static const kal_uint16 USB_MTP_IMAGE_DEVICE_FRIENDLY_NAME_DEFAULT_VALUE_STRING[] =
+{
+ 'M',
+ 'T',
+ 'K',
+ ' ',
+ 'P',
+ 'h',
+ 'o',
+ 'n',
+ 'e',
+ '\0'
+};
+
+
+/* Must have NULL termination */
+static const kal_uint16 USB_MTP_IMAGE_DEVICE_FRIENDLY_NAME_CURRENT_VALUE_STRING[] =
+{
+ 'M',
+ 'T',
+ 'K',
+ ' ',
+ 'P',
+ 'h',
+ 'o',
+ 'n',
+ 'e',
+ '\0'
+};
+
+
+/* Must have NULL termination */
+static const kal_uint16 USB_MTP_SYNCHRONIZATION_PARTNER_DEFAULT_VALUE_STRING[] =
+{
+ 'W',
+ 'i',
+ 'n',
+ 'd',
+ 'o',
+ 'w',
+ 's',
+ ' ',
+ 'M',
+ 'e',
+ 'd',
+ 'i',
+ 'a',
+ ' ',
+ 'P',
+ 'l',
+ 'a',
+ 'y',
+ 'e',
+ 'r',
+ ' ',
+ '1',
+ '1',
+ '\0'
+};
+
+
+/* Must have NULL termination */
+static const kal_uint16 USB_MTP_SYNCHRONIZATION_PARTNER_CURRENT_VALUE_STRING[] =
+{
+ 'W',
+ 'i',
+ 'n',
+ 'd',
+ 'o',
+ 'w',
+ 's',
+ ' ',
+ 'M',
+ 'e',
+ 'd',
+ 'i',
+ 'a',
+ ' ',
+ 'P',
+ 'l',
+ 'a',
+ 'y',
+ 'e',
+ 'r',
+ ' ',
+ '1',
+ '1',
+ '\0'
+};
+
+
+static const USB_MTP_IMAGE_PARAM usb_mtp_image_param =
+{
+ 0x0050, /* USB MTP image Product ID */
+ USB_MTP_IMAGE_INTERFACE_STRING,
+ sizeof(USB_MTP_IMAGE_INTERFACE_STRING)/sizeof(kal_uint16),
+ USB_MTP_IMAGE_MANUFACTURER_STRING,
+ sizeof(USB_MTP_IMAGE_MANUFACTURER_STRING)/sizeof(kal_uint16),
+ USB_MTP_IMAGE_MODEL_STRING,
+ sizeof(USB_MTP_IMAGE_MODEL_STRING)/sizeof(kal_uint16),
+ USB_MTP_IMAGE_DEVICE_VERSION_STRING,
+ sizeof(USB_MTP_IMAGE_DEVICE_VERSION_STRING)/sizeof(kal_uint16),
+ USB_MTP_IMAGE_STORAGE_DESCRIPTION_STRING_1,
+ sizeof(USB_MTP_IMAGE_STORAGE_DESCRIPTION_STRING_1)/sizeof(kal_uint16),
+ USB_MTP_IMAGE_STORAGE_DESCRIPTION_STRING_2,
+ sizeof(USB_MTP_IMAGE_STORAGE_DESCRIPTION_STRING_2)/sizeof(kal_uint16),
+ USB_MTP_IMAGE_DEVICE_FRIENDLY_NAME_DEFAULT_VALUE_STRING,
+ sizeof(USB_MTP_IMAGE_DEVICE_FRIENDLY_NAME_DEFAULT_VALUE_STRING)/sizeof(kal_uint16),
+ USB_MTP_IMAGE_DEVICE_FRIENDLY_NAME_CURRENT_VALUE_STRING,
+ sizeof(USB_MTP_IMAGE_DEVICE_FRIENDLY_NAME_CURRENT_VALUE_STRING)/sizeof(kal_uint16),
+ USB_MTP_SYNCHRONIZATION_PARTNER_DEFAULT_VALUE_STRING,
+ sizeof(USB_MTP_SYNCHRONIZATION_PARTNER_DEFAULT_VALUE_STRING)/sizeof(kal_uint16),
+ USB_MTP_SYNCHRONIZATION_PARTNER_CURRENT_VALUE_STRING,
+ sizeof(USB_MTP_SYNCHRONIZATION_PARTNER_CURRENT_VALUE_STRING)/sizeof(kal_uint16)
+};
+
+#endif /* __MTP_ENABLE__ */
+
+
+
+#if defined(__OTG_ENABLE__)||defined(__IC_USB_ENABLE__)
+
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#else
+
+
+#if defined(__OTG_ENABLE__)
+
+/* Should put the default driver in the last line */
+kal_uint8 USB_EXT_CLASS_DRV_WEIGHT_TBL[] =
+{
+ 1, /* MS drv */
+#ifdef __USB_HOST_COM_PORT_SUPPORT__
+ 1, /* CDC ACM drv */
+#endif
+ 0 /* Default */
+};
+
+#endif
+
+#endif
+
+#if defined(__IC_USB_ENABLE__)
+
+/* Should put the default driver in the last line */
+kal_uint8 USB_INT_CLASS_DRV_WEIGHT_TBL[] =
+{
+ 1, /* MS drv */
+ 1, /* ICCD drv */
+ 1, /* EEM drv */
+ 0 /* Default */
+};
+
+#endif
+
+
+/*
+1. If "current_follow_spec" is TRUE means only current value <= g_otg_support_max_power will be checked,
+ if it is FALSE. then we will first choose the configuration with max weight number, and then choose a current the which is the most nearnest to the g_otg_support_max_power
+
+2. If all class driver are with the same weight, we will choose the configuration which matches the most class drivers
+ */
+
+
+static const USB_HOST_MATCH_PARAM usb_host_match_rule_param =
+{
+#if defined(__OTG_ENABLE__)
+ USB_EXT_CLASS_DRV_WEIGHT_TBL,
+ sizeof(USB_EXT_CLASS_DRV_WEIGHT_TBL)/sizeof(kal_uint8),
+#endif
+#if defined(__IC_USB_ENABLE__)
+ USB_INT_CLASS_DRV_WEIGHT_TBL,
+ sizeof(USB_INT_CLASS_DRV_WEIGHT_TBL)/sizeof(kal_uint8),
+#endif
+ KAL_FALSE
+};
+
+static const USB_HOST_COMMON_PARAM usb_host_common_param =
+{
+ KAL_TRUE, //support_HNP;
+ KAL_TRUE, //support SRP;
+ KAL_TRUE, //support_Remote_Wakeup;
+ KAL_TRUE, //support_Double_FIFO;
+ 16 //HS ep0 interval; max value is 16, 16 stands for 4 seconds,FS value is (HS-3)
+};
+
+
+#endif /* #if defined(__OTG_ENABLE__)||defined(__IC_USB_ENABLE__) */
+/************************************************************
+ customization functinos
+*************************************************************/
+
+/* get general USB device parameter function*/
+const USB_DEVICE_PARAM *USB_GetDeviceParam(void)
+{
+ return (&usb_device_param);
+}
+
+/* get mass storage USB device parameter function*/
+const USB_MS_PARAM *USB_GetMsParam(void)
+{
+ return (&usb_ms_param);
+}
+
+/* get CDC ACM USB device parameter function*/
+const USB_ACM_PARAM *USB_GetAcmParam(void)
+{
+ return (&usb_acm_param);
+}
+
+#ifdef WEBCAM_SUPPORT
+/* get VIDEO USB device parameter function*/
+const USB_VIDEO_PARAM *USB_GetVideoParam(void)
+{
+ return (&usb_video_param);
+}
+#endif /* WEBCAM_SUPPORT */
+
+#ifdef PICTBRIDGE_SUPPORT
+/* get IMAGE USB device parameter function*/
+const USB_IMAGE_PARAM *USB_GetImageParam(void)
+{
+ return (&usb_image_param);
+}
+#endif /* PICTBRIDGE_SUPPORT */
+
+
+#ifdef __MTP_ENABLE__
+/* get IMAGE USB device parameter function*/
+const USB_MTP_IMAGE_PARAM *USB_MTP_GetImageParam(void)
+{
+ return (&usb_mtp_image_param);
+}
+#endif /* __MTP_ENABLE__ */
+
+#if defined(__OTG_ENABLE__)||defined(__IC_USB_ENABLE__)
+
+const USB_HOST_MATCH_PARAM *USB_Host_GetMatchParam(void)
+{
+ return (&usb_host_match_rule_param);
+}
+
+const USB_HOST_COMMON_PARAM *USB_Host_GetCommonParam(void)
+{
+ return (&usb_host_common_param);
+}
+
+#endif
+
+
+/* get USB custom parameter function*/
+static const USB_CUSTOM_FUNC USB_CustomFunc =
+{
+ USB_GetDeviceParam,
+ USB_GetMsParam,
+ USB_GetAcmParam,
+#ifdef WEBCAM_SUPPORT
+ USB_GetVideoParam,
+#endif
+#ifdef PICTBRIDGE_SUPPORT
+ USB_GetImageParam,
+#endif
+#ifdef __MTP_ENABLE__
+ USB_MTP_GetImageParam,
+#endif
+#if defined(__OTG_ENABLE__)||defined(__IC_USB_ENABLE__)
+ USB_Host_GetMatchParam,
+ USB_Host_GetCommonParam
+#endif
+};
+
+const USB_CUSTOM_FUNC* USB_GetCustomFunc(void)
+{
+ return(&USB_CustomFunc);
+}
+
+/* power control function, enable == KAL_TRUE turn on the power*/
+void USB_PowerControl(kal_bool enable)
+{
+#ifdef __USB_ENABLE__
+ DCL_HANDLE handle;
+ PMU_CTRL_LDO_BUCK_SET_EN val;
+
+ if(enable == KAL_FALSE)
+ return;
+
+ val.enable=enable;
+ val.mod=VUSB;
+ handle=DclPMU_Open(DCL_PMU, FLAGS_NONE);
+ DclPMU_Control(handle, LDO_BUCK_SET_EN, (DCL_CTRL_DATA_T *)&val);
+ DclPMU_Close(handle);
+#endif /*__USB_ENABLE__*/
+}
+
+
+#ifdef __OTG_ENABLE__
+const kal_uint16 g_otg_support_max_power = 100; /*mA*/
+const kal_bool OTG_IDPIN_CABLE_PLUGIN_LEVEL = LEVEL_LOW;
+
+kal_uint16 USBD_Get_Max_Power(void)
+{
+ return g_otg_support_max_power;
+}
+#endif
+
+//#if defined(__OTG_ENABLE__)
+ // When OTG is enabled, we must set this to FALSE, or we may impact OTG functionality while charging
+//const kal_bool usb_default_charge = KAL_FALSE;
+//#else // #if defined(__OTG_ENABLE__)
+//const kal_bool usb_default_charge = KAL_TRUE;
+//#endif // #if defined(__OTG_ENABLE__)
+
+
+kal_bool USB_Default_Charging(void)
+{
+// const kal_bool usb_default_charge
+#if defined(__OTG_ENABLE__)
+ return KAL_FALSE; // When OTG is enabled, we must set this to FALSE, or we may impact OTG functionality while charging
+#endif
+
+#if defined(__USB_COMPLIANCE_CHARGE__)
+ return KAL_FALSE; // follow USB spec : only after set Configuration, USB can drag 500mA current
+#endif
+
+ return KAL_TRUE; // no matter what, USB cable in will drag 500mA current
+}
+
+/************************************************************
+ customization functinos
+*************************************************************/
+void USB_Connect_R_To_DM_Control(kal_bool enable)
+{
+ /*******************************************************
+ * This function only used in 6219/6227/6225/6228/6229/6235.
+ *
+ * If you want to use it, please define
+ * DRV_PHY_CHARGER_DETECT_BY_EXTERNAL_R in project makefile
+ ********************************************************/
+
+#ifdef DRV_PHY_CHARGER_DETECT_BY_EXTERNAL_R
+#ifdef __CUST_NEW__
+ if(enable == KAL_TRUE)
+ GPIO_WriteIO(1, gpio_usb_chr_det_switch_pin);
+ else
+ GPIO_WriteIO(0, gpio_usb_chr_det_switch_pin);
+#endif /* __CUST_NEW__ */
+#endif /* DRV_PHY_CHARGER_DETECT_BY_EXTERNAL_R */
+
+}
+
+
+void custom_usb_ms_init(void)
+{
+#ifndef __UBL__
+#if defined(__USB_ENABLE__)&&defined(__USB_MASS_STORAGE_ENABLE__)
+ #if ((defined(__MSDC_MS__))||(defined(__MSDC_MSPRO__))||(defined(__MSDC_SD_MMC__)) )
+ #ifdef __SIM_PLUS__
+ if(g_usb_ms_simplus_exist == KAL_TRUE)
+ {
+ USB_Ms_Register_DiskDriver(&USB_SIMPLUS_drv);
+ }
+ #endif
+ USB_Ms_Register_DiskDriver(&USB_MSDC_drv);
+ #ifdef __MSDC_DUAL_CARD_SWITCH__
+ USB_Ms_Register_DiskDriver(&USB_tCard_2_drv);
+ #endif
+ #endif
+
+ #ifdef __USB_RAMDISK__
+ USB_Ms_Register_DiskDriver(&USB_RAM_drv);
+ #endif
+
+ #if (!defined(__FS_SYSDRV_ON_NAND__) && !defined( _NAND_FLASH_BOOTING_))
+ if(FS_GetDevPartitions(FS_DEVICE_TYPE_NOR) >= 2)
+ {
+ USB_Ms_Register_DiskDriver(&USB_NOR_drv);
+ }
+ #endif
+
+ //#if defined(NAND_SUPPORT)&&(!defined(__USB_MODEM_CARD_SUPPORT__))
+ #if defined(NAND_SUPPORT)
+ if(FS_GetDevPartitions(FS_DEVICE_TYPE_NAND) >= 2)
+ {
+ USB_Ms_Register_DiskDriver(&USB_NAND_drv);
+ }
+ else if (FS_GetDevPartitions(FS_DEVICE_TYPE_NAND) == 1)
+ {
+ #if (!defined(__FS_SYSDRV_ON_NAND__))
+ USB_Ms_Register_DiskDriver(&USB_NAND_drv);
+ #endif
+ }
+ #endif
+
+ #if (!defined(__FS_SYSDRV_ON_NAND__) && !defined( _NAND_FLASH_BOOTING_)&&!defined(__EMMC_BOOTING__))||defined(NAND_SUPPORT)
+ #if defined(__USB_MASS_STORAGE_CDROM_ENABLE__)
+ USB_Ms_Set_Current_Driver(LOGIC_DRIVE_CDROM);
+ USB_Ms_Register_DiskDriver(&USB_CDROM_drv);
+ USB_Ms_Set_Current_Driver(LOGIC_DRIVE_MS); //always swith current drive to MS
+ #if !(defined(__USB_MODEM_CARD_SUPPORT__)||defined(__USB_DATA_CONNECTION__))
+ //modem_card and data_connect do not support CD-ROM in LOGIC_DRIVE_MS
+ USB_Ms_Register_DiskDriver(&USB_CDROM_drv);
+ #endif
+ #endif
+ #endif
+#endif /*__USB_ENABLE__*/
+#endif /*__UBL__*/
+}
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/usb_custom_def.h b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/usb_custom_def.h
new file mode 100644
index 0000000..1bf033b
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/usb_custom_def.h
@@ -0,0 +1,205 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * usb_custom_def.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file declares usb customization definitions
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+
+
+/* USB VID */
+#define MTK_USB_VID (0x0e8d)
+
+
+/*********************************************/
+/* Device Common */
+/*********************************************/
+#define USB_DESCRIPTOR_SIZE 512
+
+/*********************************************/
+/* CDC ACM Buffer Size */
+/*********************************************/
+#if defined(__HSUPA_SUPPORT__)|| defined(__HSDPA_SUPPORT__)
+ #define USB_TX_RING_BUFFER_1_SIZE (16*2048)
+ #define USB_TX_RING_BUFFER_2_SIZE (16*2048)
+ #define USB_TX_RING_BUFFER_3_SIZE (16*2048)
+ #define USB_TX_RING_BUFFER_4_SIZE (16*2048)
+ #define USB_TX_RING_BUFFER_5_SIZE (16*2048)
+ #define USB_TXISR_RING_BUFFER_SIZE (4*3072)
+#elif defined(__EGPRS_MODE__)
+ #define USB_TX_RING_BUFFER_1_SIZE (4*2048)
+ #define USB_TX_RING_BUFFER_2_SIZE (4*2048)
+ #define USB_TX_RING_BUFFER_3_SIZE (4*2048)
+ #define USB_TX_RING_BUFFER_4_SIZE (4*2048)
+ #define USB_TX_RING_BUFFER_5_SIZE (4*2048)
+ #define USB_TXISR_RING_BUFFER_SIZE (3072)
+#else
+ #define USB_TX_RING_BUFFER_1_SIZE (2048)
+ #define USB_TX_RING_BUFFER_2_SIZE (2048)
+ #define USB_TX_RING_BUFFER_3_SIZE (2048)
+ #define USB_TX_RING_BUFFER_4_SIZE (2048)
+ #define USB_TX_RING_BUFFER_5_SIZE (2048)
+ #define USB_TXISR_RING_BUFFER_SIZE (3072)
+#endif
+
+#define USB_RX_RING_BUFFER_1_SIZE (2048)
+#define USB_RX_RING_BUFFER_2_SIZE (2048)
+#define USB_RX_RING_BUFFER_3_SIZE (2048)
+#define USB_RX_RING_BUFFER_4_SIZE (2048)
+#define USB_RX_RING_BUFFER_5_SIZE (2048)
+
+#ifdef __USB_HIGH_SPEED_COM_PORT_ENABLE__
+// high speed interface RX buffer
+#define USB_ACM_RX_BUFFER_NUM 8
+#define USB_ACM_RX_BUFFER_SIZE 3072
+#else
+#define USB_ACM_RX_BUFFER_NUM 0
+#define USB_ACM_RX_BUFFER_SIZE 0
+#endif
+
+/*********************************************/
+/* Mass Storage Buffer Size */
+/*********************************************/
+#if defined(__LOW_COST_SUPPORT_ULC__)
+#define USBMS_MAX_BUFFERSIZE (4*1024)
+#elif (defined(__LOW_COST_SUPPORT_COMMON__)&&(!defined(__USB_HS_ENABLE__)))
+#define USBMS_MAX_BUFFERSIZE (8*1024)
+#else
+#define USBMS_MAX_BUFFERSIZE (128*1024)
+#endif
+
+/*********************************************/
+/* MTP Buffer Size */
+/*********************************************/
+#define USB_IMAGE_MTP_MAX_BUFFERSIZE USBMS_MAX_BUFFERSIZE
+
+/*********************************************/
+/* Webcam */
+/*********************************************/
+#ifdef __WEBCAM_SUPPORT_ISO_PIPE__
+#define USBVIDEO_MAX_PAYLOAD_LENGTH 512
+#else
+#define USBVIDEO_MAX_PAYLOAD_LENGTH 1024
+#endif
+
+/*********************************************/
+/* Tethering EP0 Buffer */
+/*********************************************/
+#define USB_ISD_EP0_BUFFER_LENGTH 64
+
+/*********************************************/
+/* Host Common */
+/*********************************************/
+#define USBD_MAX_CFG_NUM 8
+#define USBD_MAX_IF_PER_CFG 4
+
+/*********************************************/
+/* Host Class Drivers */
+/*********************************************/
+#define USB_HOST_MAX_MS_NUM 1
+#define USB_HOST_MS_SUPPORT_LUN 8
+#define USB_HOST_MS_MAX_DATA_LENGTH (32*1024)
+#define USB_HOST_MS_ERROR_COUNT 3
+#define USB_HOST_MS_SLEEP_TIME 0x00FF
+
+
+#ifdef __IC_USB_ICCD_SUPPORT__
+#define USB_MAX_ICCD_NUM 1
+#define USB_HOST_ICCD_BUSY_COUNT 10
+#define USB_HOST_ICCD_SLEEP_TIME 0x00FF
+#endif
+
+
+#ifdef __IC_USB_EEM_SUPPORT__
+#define USB_MAX_EEM_NUM 1
+#define EEM_TX_BUFFER_NUM 10
+#define EEM_RX_BUFFER_NUM 10
+#endif
+
diff --git a/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/usb_host_ms_custom.c b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/usb_host_ms_custom.c
new file mode 100644
index 0000000..19b1077
--- /dev/null
+++ b/mcu/custom/driver/drv/misc_drv/_Default_BB/MT2735/usb_host_ms_custom.c
@@ -0,0 +1,141 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * usb_host_ms_custom.c
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * This file implements usb host ms customer support
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#include "drv_comm.h"
+#include "usb_host_ms_custom.h"
+
+
+#ifdef __OTG_ENABLE__
+
+/*
+
+kal_uint8 USBHost_Media_Handle[USB_HOST_MS_SUPPORT_LUN];
+
+
+kal_uint8* USBHost_Get_Media_Hanle(kal_uint8 *p_num)
+{
+ *p_num = sizeof(USBHost_Media_Handle)/sizeof(kal_uint8);
+ return USBHost_Media_Handle;
+}
+
+*/
+
+#endif
+