[Feature]Upload Modem source code
Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/custom/modem/common/custom_port.h b/mcu/custom/modem/common/custom_port.h
new file mode 100644
index 0000000..67f7bc1
--- /dev/null
+++ b/mcu/custom/modem/common/custom_port.h
@@ -0,0 +1,100 @@
+#ifndef _CUSTOM_PORT_H_
+#define _CUSTOM_PORT_H_
+
+#include "kal_public_api.h"
+#include "kal_public_defs.h"
+
+//
+#define PORT_MODE_BITS (3)
+#define PORT_MODE_MASK ((1 << PORT_MODE_BITS) - 1)
+#define PORT_MODE_SHIFT (29)
+
+#define PORT_MODE_NONE (0) //slave mode NONE
+#define PORT_MODE_USB (1) //slave mode USB
+#define PORT_MODE_PCIE (2) //slave mode PCIE
+#define PORT_MODE_USB_AND_PCIE (3) //slave mode USB & PCIE
+#define PORT_MODE_AP (7) //master mode
+
+//
+#define PORT_DIPC_MODE_BITS (3)
+#define PORT_DIPC_MODE_MASK ((1 << PORT_DIPC_MODE_BITS) - 1)
+#define PORT_DIPC_MODE_SHIFT (8)
+
+#define PORT_DIPC_MODE_NOT_SUPPORT (0)
+#define PORT_DIPC_MODE_PCIE_ONLY (1)
+#define PORT_DIPC_MODE_PCIE_ADVANCE (2)
+#define PORT_DIPC_MODE_DUAL_IPC (3)
+#define PORT_DIPC_MODE_USB_ONLY (4)
+
+//only valid when PCIE only mode
+#define PORT_PCIE_ENABLE_BITS (1)
+#define PORT_PCIE_ENABLE_MASK ((1 << PORT_PCIE_ENABLE_BITS) - 1)
+#define PORT_PCIE_ENABLE_SHIFT (1)
+
+#define PORT_PCIE_DISABLE (0) //port is not enabled on PCIE
+#define PORT_PCIE_ENABLE (1) //port is enabled on PCIE
+
+//
+#define PORT_PCIE_STATUS_BITS (1)
+#define PORT_PCIE_STATUS_MASK ((1 << PORT_PCIE_STATUS_BITS) - 1)
+#define PORT_PCIE_STATUS_SHIFT (0)
+
+#define PORT_PCIE_STATUS_LINK_DOWN (0) //pcie link is down (if no PCIE, it's default)
+#define PORT_PCIE_STATUS_LINK_UP (1) //pcie link is up
+
+#define CUSTOM_PORT_GET_MODE(x) ((custom_port(x) >> PORT_MODE_SHIFT) & PORT_MODE_MASK)
+#define CUSTOM_PORT_GET_DIPC_MODE(x) ((custom_port(x) >> PORT_DIPC_MODE_SHIFT) & PORT_DIPC_MODE_MASK)
+#define CUSTOM_PORT_GET_PCIE_ENABLE(x) ((custom_port(x) >> PORT_PCIE_ENABLE_SHIFT) & PORT_PCIE_ENABLE_MASK)
+#define CUSTOM_PORT_GET_PCIE_STATUS(x) ((custom_port(x) >> PORT_PCIE_STATUS_SHIFT) & PORT_PCIE_STATUS_MASK)
+
+typedef enum {
+ CUSTOM_PORT_USER_UNKNOWN = 0,
+ CUSTOM_PORT_USER_LOG = 1,
+ CUSTOM_PORT_USER_META = 2,
+ CUSTOM_PORT_USER_MIPC = 3,
+ CUSTOM_PORT_USER_BINARY_TOOL = 4,
+ CUSTOM_PORT_USER_MBIM = 5,
+ CUSTOM_PORT_USER_AT = 6,
+ CUSTOM_PORT_USER_MAX
+} custom_port_user_enum;
+
+kal_uint32 custom_port(custom_port_user_enum port);
+
+//defintions from AP
+#define DIPC_CONFIG_PATH "V:\\dipc_config"
+
+#define KEY_DUAL_IPC_MODE "dual_ipc_mode"
+#define KEY_MD_LOGGING_INTERFACE "md_logging_interface"
+#define KEY_MD_AT_INTERFACE "md_at_interface"
+#define KEY_MD_PCIE_PORT_CONFIG "md_pcie_port_config"
+
+#define DIPC_CONFIG_PORT_START (uint32_t)0x00000001
+
+// MD Ports
+typedef enum {
+ DIPC_CONFIG_MD_PORT_LOGGING = (DIPC_CONFIG_PORT_START << 0),
+ DIPC_CONFIG_MD_PORT_META = (DIPC_CONFIG_PORT_START << 1),
+ DIPC_CONFIG_MD_PORT_BINARY_TOOL = (DIPC_CONFIG_PORT_START << 2),
+ DIPC_CONFIG_MD_PORT_AT = (DIPC_CONFIG_PORT_START << 3),
+} dipc_config_md_port_enum;
+
+typedef enum {
+ DIPC_MODE_NOT_CONFIG,
+ DIPC_MODE_PCIE_ADV,
+ DIPC_MODE_PCIE_ONLY,
+ DIPC_MODE_DUAL_IPC,
+ DIPC_MODE_USB_ONLY,
+ DIPC_MODE_END = DIPC_MODE_DUAL_IPC,
+} dipc_mode_enum;
+
+typedef enum {
+ DIPC_INTF_NOT_CONFIG,
+ DIPC_INTF_USB,
+ DIPC_INTF_PCIE,
+ DIPC_INTF_USB_AND_PCIE,
+ DIPC_INTF_CLOSED,
+} dipc_port_intf_enum;
+
+
+
+#endif