[Feature]Upload Modem source code
Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/driver/devdrv/eint/inc/Eint_internal.h b/mcu/driver/devdrv/eint/inc/Eint_internal.h
new file mode 100644
index 0000000..cb7ebff
--- /dev/null
+++ b/mcu/driver/devdrv/eint/inc/Eint_internal.h
@@ -0,0 +1,204 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2010
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * Eint_internal.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * Definition for EINT internal usage
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef __EINT_INTERNAL_H__
+#define __EINT_INTERNAL_H__
+
+#include "intrCtrl.h"
+#include "drv_features_gpt.h" /* include this header for "__ENABLE_GPT_PROTECTION__" option */
+
+/*************************************************************************
+ * Define function prototpye
+ *************************************************************************/
+
+/*************************************************************************
+ * Internal definition
+ *************************************************************************/
+
+#if defined(__ENABLE_GPT_PROTECTION__)
+ #define __EINT_SW_DEBOUNCE_V2__
+#else
+ #undef __EINT_SW_DEBOUNCE_V2__
+#endif
+
+#ifndef EINT_NO_HARDWARE_DEBOUNCE
+ #define EINT_NO_HARDWARE_DEBOUNCE 0x00000000
+#endif
+
+#define EINT_CheckHWDebounce(_no) ((1<<_no) & EINT_HARDWARE_DEBOUNCE)
+#define EINT_CheckNotHWDebounce(_no) ((1<<_no) & EINT_NO_HARDWARE_DEBOUNCE)
+
+// MTK02782 add 20110316 {
+#define EINT_CON_CNT_MASK 0x07ff
+#define EINT_CON_CNT_OFFSET 0
+
+#define EINT_CON_PRESCALER_MASK 0x7000
+
+#define EINT_CON_PRESCALER_32KHZ 0x00000000
+#define EINT_CON_PRESCALER_16KHZ 0x00000001
+#define EINT_CON_PRESCALER_8KHZ 0x00000002
+#define EINT_CON_PRESCALER_4KHZ 0x00000003
+#define EINT_CON_PRESCALER_2KHZ 0x00000004
+#define EINT_CON_PRESCALER_1KHZ 0x00000005
+#define EINT_CON_PRESCALER_512HZ 0x00000006
+#define EINT_CON_PRESCALER_256HZ 0x00000007
+#define EINT_CON_PRESCALER_OFFSET 12
+// } MTK02782 add 20110316
+
+/* Array size for debug log of sources that trigger EINTs */
+#define EINT_TRIGGER_SRC_LOG_MAX 16
+
+/* private API */
+extern void EINT_AckInt(kal_uint8 eintno);
+
+/*************************************************************************
+ * Define internal MARCO for EINT_Internal_LISR_Handler()
+ *************************************************************************/
+#if defined(__AST_EINT__) && defined(__AST_TL1_TDD__)
+
+
+
+#endif /* __AST_EINT__ && __AST_TL1_TDD__ */
+
+#endif /* __EINT_INTERNAL_H__ */
+
diff --git a/mcu/driver/devdrv/eint/inc/eint_hw.h b/mcu/driver/devdrv/eint/inc/eint_hw.h
new file mode 100644
index 0000000..47381d1
--- /dev/null
+++ b/mcu/driver/devdrv/eint/inc/eint_hw.h
@@ -0,0 +1,54 @@
+#ifndef __EINT_HW_H__
+#define __EINT_HW_H__
+#include "drv_comm.h"
+
+#define GPIOMUX_BASE_ADDR BASE_MADDR_MDEINT
+#define EINT_ADDR_OFFSET 0x1000
+
+#define GPIOMUX_EINT_SRC1 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x0))
+//#define GPIOMUX_EINT_SRC2 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x4))
+//#define GPIOMUX_EINT_SRC3 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x8))
+//#define GPIOMUX_EINT_SRC4 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0xC))
+#define GPIOMUX_EINT_DB_EN ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x100))
+#define GPIOMUX_EINT_POL ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x180))
+#define GPIOMUX_EINT_TYPE ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x200))
+#define GPIOMUX_EINT_IRQEN ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x280))
+#define GPIOMUX_EINT_IRQSTS ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x300))
+#define GPIOMUX_EINT_DBNCSTS ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x380))
+#define GPIOMUX_EINT_DUR0 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x400))
+#define GPIOMUX_EINT_DUR1 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x404))
+#define GPIOMUX_EINT_DUR2 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x408))
+#define GPIOMUX_EINT_DUR3 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x40C))
+//#define GPIOMUX_EINT_DUR4 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x410))
+//#define GPIOMUX_EINT_DUR5 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x414))
+//#define GPIOMUX_EINT_DUR6 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x418))
+//#define GPIOMUX_EINT_DUR7 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x41C))
+//#define GPIOMUX_EINT_DUR8 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x420))
+//#define GPIOMUX_EINT_DUR9 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x424))
+//#define GPIOMUX_EINT_DUR10 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x428))
+//#define GPIOMUX_EINT_DUR11 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x42C))
+//#define GPIOMUX_EINT_DUR12 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x430))
+//#define GPIOMUX_EINT_DUR13 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x434))
+//#define GPIOMUX_EINT_DUR14 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x438))
+//#define GPIOMUX_EINT_DUR15 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x43C))
+#define GPIOMUX_EINT_DIRQ0 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x800))
+#define GPIOMUX_EINT_DIRQ1 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x804))
+#define GPIOMUX_EINT_DIRQ2 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x808))
+#define GPIOMUX_EINT_DIRQ3 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x80C))
+
+/* GPIO_MUX part Set and Clear Registers*/
+/* ================================================================= */
+#define GPIOMUX_EINT_DB_EN_SET ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x100 + 0x4))
+#define GPIOMUX_EINT_POL_SET ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x180 + 0x4))
+#define GPIOMUX_EINT_TYPE_SET ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x200 + 0x4))
+#define GPIOMUX_EINT_IRQEN_SET ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x280 + 0x4))
+
+
+#define GPIOMUX_EINT_DB_EN_CLR ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x100 + 0x8))
+#define GPIOMUX_EINT_POL_CLR ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x180 + 0x8))
+#define GPIOMUX_EINT_TYPE_CLR ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x200 + 0x8))
+#define GPIOMUX_EINT_IRQEN_CLR ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x280 + 0x8))
+
+#define EINT_L2_STA() REG32(GPIOMUX_EINT_IRQSTS)
+#define EINT_L2_ACK(irq) REG32_WRITE(GPIOMUX_EINT_IRQSTS,(1<<irq))
+#endif
diff --git a/mcu/driver/devdrv/eint/src/dcl_eint.c b/mcu/driver/devdrv/eint/src/dcl_eint.c
new file mode 100644
index 0000000..507b401
--- /dev/null
+++ b/mcu/driver/devdrv/eint/src/dcl_eint.c
@@ -0,0 +1,1845 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+#include "kal_general_types.h"
+#include "kal_public_api.h"
+#include "hisr_config.h"
+#include "reg_base.h"
+#include "intrCtrl.h"
+#include "eint.h"
+#include "dcl.h"
+
+#include "Eint_internal.h"
+#include "kal_internal_api.h"
+#include "eint_sw.h"
+#include "eint_hw.h"
+#include "cpu.h"
+#include "drvpdn.h"
+#include "sync_data.h"
+
+#include "kal_public_api.h"
+
+kal_spinlockid eint_set_lock = 0;
+
+
+eint_func EINT_FUNC;
+//dedicated_eint_func DEINT_FUNC;
+#if defined(__MD93__)
+static EINT_SW_DEBOUNCE_STRUCT eint_sw_debounce[EINT_MAX_CHANNEL];
+//static EINT_SW_DEBOUNCE_STRUCT deint_sw_debounce[DEDICATED_EINT_TOTAL_CHANNEL];
+#ifndef ATEST_DRV_ENABLE
+static kal_uint8 *eint_sw_debounce_time_delay = NULL;
+#else
+kal_uint8 *eint_sw_debounce_time_delay = NULL;
+#endif
+//static kal_uint8 deint_sw_debounce_time_delay[DEDICATED_EINT_TOTAL_CHANNEL] = {0};
+#elif defined(__MD95__)
+#elif defined(__MD97__)
+#elif defined(__MD97P__)
+//
+#else
+#error "no chip match"
+#endif
+/* Variables to sources that triggers EINT interrupt */
+kal_uint8 eint_trigger_src_log[EINT_TRIGGER_SRC_LOG_MAX] = {0x0};
+kal_uint8 eint_trigger_src_ptr = 0;
+
+//static kal_hisrid eint_hisrid;
+//static kal_hisrid deint_hisrid;
+
+extern kal_uint32 eint_is_dedicated;
+extern kal_uint32 eint_is_dedicated_map[EINT_MAX_CHANNEL];
+
+//extern kal_uint32 LockIRQ(void);
+//extern void RestoreIRQ(kal_uint32 irq);
+
+extern kal_uint32 SaveAndSetIRQMask(void);
+extern void RESTOREIRQMASK(kal_uint32 irq);
+extern void BTMT_EINT_HANDLER(kal_uint32* status);
+//extern kal_uint32 DisableIRQ(void);
+//kal_uint32 DEINT_Get_IRQ_ID(kal_uint8 deintno);
+//void DEINT_Registration(kal_uint8 deintno,void (reg_hisr)(void));
+extern kal_spinlockid md1_eint_lock;
+
+void DEINT0_LISR(kal_uint32 irq_id);
+void DEINT1_LISR(kal_uint32 irq_id);
+void DEINT2_LISR(kal_uint32 irq_id);
+void DEINT3_LISR(kal_uint32 irq_id);
+
+//eint creat spinlock
+void eint_create_spinlock(void){
+ if (eint_set_lock == 0){
+ eint_set_lock = kal_create_spinlock("mdeint_");
+ }
+}
+
+/*************************************************************************
+* FUNCTION
+* EINT_Mask
+*
+* DESCRIPTION
+* This function implements mask of dedicated external interrupt source
+*
+* CALLS
+*
+* PARAMETERS
+* eintno - external interrupt vector number
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void EINT_Mask(kal_uint8 eintno)
+{
+ if (eint_is_dedicated & (1 << eintno))
+ {
+ eint_set_l1_eint_enable(eint_is_dedicated_map[eintno], EINT_DISABLE);
+ switch(eint_is_dedicated_map[eintno])
+ {
+ case DEDICATED_EINT0:
+ IRQMask(DEDICATED_EINT_IRQ0);
+ break;
+ case DEDICATED_EINT1:
+ IRQMask(DEDICATED_EINT_IRQ1);
+ break;
+ case DEDICATED_EINT2:
+ IRQMask(DEDICATED_EINT_IRQ2);
+ break;
+ case DEDICATED_EINT3:
+ IRQMask(DEDICATED_EINT_IRQ3);
+ break;
+ default:
+ return;
+ }
+ }
+ else
+ {
+ eint_set_irqen(eintno,EINT_DISABLE);
+ }
+}
+/*
+static void eint_udelay(kal_uint32 usdelay)
+{
+ kal_uint32 clock_count,event_count1,event_count2,delay_count;
+
+ event_count1 = event_count2 = 0;
+
+ clock_count = usdelay*(CPU_FREQUENCY_MHZ);
+ cpu_event_counter_get_cycle(event_count1);
+
+
+ while(1)
+ {
+ cpu_event_counter_get_cycle(event_count2);
+ delay_count = cpu_event_get_duration(event_count1,event_count2);
+ if(delay_count >= clock_count)
+ {
+ break;
+ }
+ }
+}
+*/
+kal_uint32 EINT_Get_Mask_Bits(void)
+{
+ kal_uint32 mask_bit_value;
+ kal_uint32 index, deint_en;
+
+ mask_bit_value = eint_get_irqen();
+
+ //add deint mask
+ for(index=0;index<EINT_TOTAL_CHANNEL;index++)
+ {
+ if (eint_is_dedicated & (1 << index))
+ {
+ deint_en = eint_get_l1_irqen(eint_is_dedicated_map[index]);
+ mask_bit_value |= (deint_en << index);
+ }
+ }
+
+ return ~mask_bit_value;
+}
+
+void EINT_Set_Mask_all(kal_uint32 mask_bits)
+{
+ kal_uint32 index;
+
+ for(index=0;index<EINT_TOTAL_CHANNEL;index++)
+ {
+ if ((eint_is_dedicated & (1 << index)) && (mask_bits & (1<< index)))
+ {
+ eint_set_l1_eint_enable(eint_is_dedicated_map[index], EINT_DISABLE);
+ mask_bits &= (~(1<< index));
+ }
+ }
+ eint_set_mask_all(mask_bits);
+}
+
+void EINT_Set_UnMask_all(kal_uint32 unmask_bits)
+{
+ kal_uint32 index;
+
+ for(index=0;index<EINT_TOTAL_CHANNEL;index++)
+ {
+ if ((eint_is_dedicated & (1 << index)) && (unmask_bits & (1<< index)))
+ {
+ eint_set_l1_eint_enable(eint_is_dedicated_map[index], EINT_ENABLE);
+ unmask_bits &= (~(1<< index));
+ }
+ }
+ eint_set_unmask_all(unmask_bits);
+}
+
+/*************************************************************************
+* FUNCTION
+* EINT_UnMask
+*
+* DESCRIPTION
+* This function implements Unmask of dedicated external interrupt source
+*
+* CALLS
+*
+* PARAMETERS
+* eintno - external interrupt vector number
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void EINT_UnMask(kal_uint8 eintno)
+{
+ if (eint_is_dedicated & (1 << eintno))
+ {
+ switch(eint_is_dedicated_map[eintno])
+ {
+ case DEDICATED_EINT0:
+ {
+ eint_set_l1_eint_enable(DEDICATED_EINT0, EINT_ENABLE);
+ IRQUnmask(DEDICATED_EINT_IRQ0);
+ break;
+ }
+ case DEDICATED_EINT1:
+ {
+ eint_set_l1_eint_enable(DEDICATED_EINT1, EINT_ENABLE);
+ IRQUnmask(DEDICATED_EINT_IRQ1);
+ break;
+ }
+ case DEDICATED_EINT2:
+ {
+ eint_set_l1_eint_enable(DEDICATED_EINT2, EINT_ENABLE);
+ IRQUnmask(DEDICATED_EINT_IRQ2);
+ break;
+ }
+ case DEDICATED_EINT3:
+ {
+ eint_set_l1_eint_enable(DEDICATED_EINT3, EINT_ENABLE);
+ IRQUnmask(DEDICATED_EINT_IRQ3);
+ break;
+ }
+ default:
+ return;
+ }
+
+ }
+ else
+ {
+ eint_set_irqen(eintno,EINT_ENABLE);
+ }
+}
+
+/*************************************************************************
+* FUNCTION
+* DEINT_Mask
+*
+* DESCRIPTION
+* This function implements mask of dedicated external interrupt source
+*
+* CALLS
+*
+* PARAMETERS
+* deintno - external interrupt vector number
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+
+/*************************************************************************
+* FUNCTION
+* EINT_HISR_Entry
+*
+* DESCRIPTION
+* This function implements main external interrupt HISR registered in
+* global ISR jump table, eint_hisr_func.
+*
+* CALLS
+*
+* PARAMETERS
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void EINT_HISR_Entry(void)
+{
+ kal_uint8 index;
+
+ for(index=0;index<EINT_TOTAL_CHANNEL;index++)
+ {
+ if ( !(eint_is_dedicated & (1 << index)) && (EINT_FUNC.eint_active[index] == KAL_TRUE)
+ && (EINT_FUNC.eint_func[index]) )
+ {
+
+ EINT_FUNC.eint_active[index] = KAL_FALSE;
+
+ eint_trigger_src_log[eint_trigger_src_ptr] = index;
+ eint_trigger_src_ptr = (eint_trigger_src_ptr + 1) % EINT_TRIGGER_SRC_LOG_MAX;
+
+ EINT_FUNC.eint_func[index]();
+
+ if (EINT_FUNC.eint_auto_umask[index] == KAL_TRUE)
+ {
+
+ EINT_UnMask(index);
+ }
+ }
+ }
+}
+
+/*************************************************************************
+* FUNCTION
+* DEINT_HISR_Entry
+*
+* DESCRIPTION
+* This function implements main dedicated external interrupt HISR registered in
+* global ISR jump table, eint_hisr_func.
+*
+* CALLS
+*
+* PARAMETERS
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void DEINT_HISR_Entry(void)
+{
+ kal_uint8 index;
+
+ for(index=0;index<EINT_TOTAL_CHANNEL;index++)
+ {
+ if (eint_is_dedicated & (1 << index))
+ {
+ if ( (EINT_FUNC.eint_active[index] == KAL_TRUE) && (EINT_FUNC.eint_func[index]) )
+ {
+
+ EINT_FUNC.eint_active[index] = KAL_FALSE;
+
+ EINT_FUNC.eint_func[index]();
+
+ if (EINT_FUNC.eint_auto_umask[index] == KAL_TRUE)
+ {
+ EINT_UnMask(index);
+ }
+ }
+ }
+ }
+}
+
+
+/*************************************************************************
+* FUNCTION
+* EINT_Internal_LISR_Handler
+*
+* DESCRIPTION
+* Internal function of External Interrupt Service Routine
+*
+* CALLS
+*
+* PARAMETERS
+* The value of EINT_STA
+*
+* RETURNS
+* If the original LISR flow should be bypassed
+*
+*************************************************************************/
+kal_bool EINT_Internal_LISR_Handler(kal_uint32* status)
+{
+ kal_bool retval = KAL_FALSE;
+
+#if defined(__AST_EINT__) && defined(__AST_TL1_TDD__)
+ AST_EINT_HANDLER(status);
+#endif
+
+#if defined(IC_BURNIN_TEST) || defined(IC_MODULE_TEST)
+ BTMT_EINT_HANDLER(status);
+#endif
+
+ return retval;
+}
+extern kal_uint32 eint_src_map[EINT_MAX_CHANNEL];
+/*************************************************************************
+* FUNCTION
+* Register_EINT
+*
+* DESCRIPTION
+* This function implements registration of external interrupts
+*
+* CALLS
+*
+* PARAMETERS
+* eintno - External interrupt vector number
+* Dbounce_En - Debounce control enable
+* ACT_Polarity - Interrupt polarity
+* reg_hisr - Registered hisr
+* auto_umask - A flag instruct the systerm to do unmask after
+* invoking the registered HISR
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTED
+*
+ *************************************************************************/
+void EINT_Registration(kal_uint8 eintno, kal_bool Dbounce_En, kal_bool ACT_Polarity, void (reg_hisr)(void), kal_bool auto_umask)
+{
+// PDN_CLR(PDN_GPIO);
+ //kal_uint32 savedMask;
+
+ /* If EINT Number is out of range, get return address and send it to exception handler */
+ if(eintno >= EINT_TOTAL_CHANNEL)
+ {
+ kal_uint32 retaddr;
+
+ GET_RETURN_ADDRESS(retaddr);
+ kal_fatal_error_handler(KAL_ERROR_DRV_EINT_INVALID_INDEX, retaddr);
+ }
+
+ /*disable eint interrupt*/
+ eint_set_irqen(eintno, EINT_DISABLE);
+ eint_set_debounce_enable(eintno, EINT_DISABLE);
+
+ /*register LISR*/
+ /*dispatch for dedicated eint*/
+ if (eint_is_dedicated & (1<<eintno))
+ {
+ switch(eint_is_dedicated_map[eintno])
+ {
+ case DEDICATED_EINT0:
+ {
+ eint_set_l1_eint_enable(DEDICATED_EINT0, EINT_DISABLE);
+ //IRQ_Register_LISR(DEDICATED_EINT_IRQ0, DEINT0_LISR, "DEINT0 handler");
+ }
+ break;
+ case DEDICATED_EINT1:
+ {
+ eint_set_l1_eint_enable(DEDICATED_EINT1, EINT_DISABLE);
+ //IRQ_Register_LISR(DEDICATED_EINT_IRQ1, DEINT1_LISR, "DEINT1 handler");
+ }
+ break;
+ case DEDICATED_EINT2:
+ {
+ eint_set_l1_eint_enable(DEDICATED_EINT2, EINT_DISABLE);
+ //IRQ_Register_LISR(DEDICATED_EINT_IRQ2, DEINT2_LISR, "DEINT2 handler");
+ }
+ break;
+ case DEDICATED_EINT3:
+ {
+ eint_set_l1_eint_enable(DEDICATED_EINT3, EINT_DISABLE);
+ //IRQ_Register_LISR(DEDICATED_EINT_IRQ3, DEINT3_LISR, "DEINT3 handler");
+ }
+ break;
+ default:
+ break;
+ }
+ }
+ else
+ {
+ //IRQ_Register_LISR(IRQ_EIT_CODE, EINT_LISR, "EINT handler");
+ }
+
+ /* Save and set MCU's I,F bits to disable interrupts */
+// savedMask = LockIRQ();
+
+ /* Set external interrupt polarity */
+ eint_set_pol(eintno,ACT_Polarity);
+ /*only for smartphone chip,follow moly*/
+ gpio_set_eint_src(eintno,eint_src_map[eintno]);
+
+ if (Dbounce_En)
+ {
+ //eint_set_debounce_duration(eintno,EINT_DB_DUR_DEFAULT);
+ eint_set_debounce_enable(eintno,EINT_ENABLE);
+ }
+ else
+ {
+ /*disable debounce */
+ eint_set_debounce_enable(eintno,EINT_DISABLE);
+ }
+
+ /* Save and set MCU's I,F bits to disable interrupts */
+ //savedMask = SaveAndSetIRQMask();
+ kal_take_spinlock(md1_eint_lock, KAL_INFINITE_WAIT);
+ /* Register external interrupt's HISR */
+ EINT_FUNC.eint_func[eintno] = reg_hisr;
+ EINT_FUNC.eint_active[eintno] = KAL_FALSE;
+ EINT_FUNC.eint_auto_umask[eintno] = auto_umask;
+
+ if (eint_is_dedicated & (1<<eintno))
+ {
+ /* register HISR */
+ EINT_L2_ACK(eintno);
+ EINT_UnMask(eintno);
+ kal_give_spinlock(md1_eint_lock);
+ //deint_hisrid = kal_init_hisr(DEINT_HISR);
+ }
+ else
+ {
+ /* register HISR */
+ EINT_L2_ACK(eintno);
+ EINT_UnMask(eintno);
+ IRQSensitivity( IRQ_EIT_CODE, LEVEL_SENSITIVE );
+ /* Enable external interrupt */
+ IRQUnmask( IRQ_EIT_CODE );
+ //RestoreIRQMask(savedMask);
+ kal_give_spinlock(md1_eint_lock);
+ //eint_hisrid = kal_init_hisr(EINT_HISR);
+ }
+}
+
+/*************************************************************************
+* FUNCTION
+* EXTRA_EINT_Registration
+*
+* DESCRIPTION
+* This function implements registration of external interrupts
+*
+* CALLS
+*
+* PARAMETERS
+* eintno - External interrupt vector number
+* ACT_Polarity - Interrupt polarity
+* reg_hisr - Registered hisr
+* auto_umask - A flag instruct the systerm to do unmask after
+* invoking the registered HISR
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void EXTRA_EINT_Registration(kal_uint8 eintno, kal_bool ACT_Polarity, void (reg_hisr)(void), \
+ kal_bool auto_umask)
+{
+ ASSERT((eintno < EINT_TOTAL_CHANNEL) && EINT_CheckHWDebounce(eintno) );
+
+ EINT_Registration(eintno, KAL_FALSE, ACT_Polarity, reg_hisr, auto_umask);
+}
+
+/*************************************************************************
+* FUNCTION
+* EINT_Query_HW_Debounce
+*
+* DESCRIPTION
+* This function dedicates to query the hardware debounce status
+* interrupts.
+*
+* CALLS
+*
+* PARAMETERS
+*
+* RETURNS
+* The hardware debounce disabled indicator bitmask
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+kal_uint32 EINT_Query_HW_Debounce(void)
+{
+ kal_uint8 index;
+ kal_uint32 status = 0x0;
+
+ for (index = 0; index < EINT_TOTAL_CHANNEL; index++)
+ {
+ if ( (EINT_FUNC.eint_func[index]) &&
+ ((EINT_CheckNotHWDebounce(index)) || !eint_get_debounce_enable(index)) )
+ {
+ status |= (0x1 << index);;
+ }
+ }
+
+ return status;
+}
+
+/*************************************************************************
+* FUNCTION
+* EINT_Set_HW_Debounce
+*
+* DESCRIPTION
+* This function dedicates to set the hardware debounce time of external
+* interrupts.
+*
+* CALLS
+*
+* PARAMETERS
+* eintno - External interrupt vector number
+* ms - hardware debounce time (in milli second)
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void EINT_Set_HW_Debounce(kal_uint8 eintno, kal_uint32 ms)
+{
+ kal_uint32 cnt;
+ kal_uint32 debounce_en;
+
+ debounce_en = eint_get_debounce_enable(eintno);
+ eint_set_debounce_enable(eintno,EINT_DISABLE);
+
+ if(ms == 0)
+ {
+ /* set to one 32KHz clock cycle */
+ cnt = 1;
+ }
+ else if(ms <= EINT_HW_DB_TIME_MAX)
+ {
+ /* calculate cnt value based on 32KHz clock cycles */
+#ifdef __FPGA__
+ cnt = (ms*1000)/31;
+#else
+ cnt = ms << 5;
+#endif
+ }
+ else
+ {
+ /* set to maximum count */
+ cnt = EINT_DB_DUR_MAX;
+ }
+
+ eint_set_debounce_duration(eintno,cnt);
+ eint_set_debounce_enable(eintno, debounce_en);
+ EINT_L2_ACK(eintno);
+}
+
+/*************************************************************************
+* FUNCTION
+* EINT_Set_HW_Debounce_32KCycle
+*
+* DESCRIPTION
+* This function dedicates to set the hardware debounce time of external
+* interrupts.
+*
+* CALLS
+*
+* PARAMETERS
+* eintno - External interrupt vector number
+* count_of_32kcycle - hardware debounce time (unit is 32k cycle)
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+
+void EINT_Set_HW_Debounce_32KCycle(kal_uint8 eintno, kal_uint32 count_of_32kcycle)
+{
+ kal_uint32 debounce_en;
+ debounce_en = eint_get_debounce_enable(eintno);
+ eint_set_debounce_enable(eintno,EINT_DISABLE);
+
+ eint_set_debounce_duration(eintno,count_of_32kcycle);
+
+ eint_set_debounce_enable(eintno, debounce_en);
+ EINT_L2_ACK(eintno);
+}
+
+
+/*************************************************************************
+* @brief set the debounce enable parameter of the eint
+* @param eintno : the eint index to be set
+* @param debounce_en : the debounce enable value to set, it should be 0~1
+* 0: enable debounce function
+* 1: disable debounce function
+* @return No return
+*************************************************************************/
+void EINT_Set_HW_Debounce_Enable(kal_uint8 eintno, kal_uint32 debounce_en)
+{
+ eint_set_debounce_enable(eintno,debounce_en);
+// eint_udelay(60);
+}
+
+/*************************************************************************
+* FUNCTION
+* EINT_Set_Polarity
+*
+* DESCRIPTION
+* This function sets the polarity of external interrupts
+*
+* CALLS
+*
+* PARAMETERS
+* eintno - External interrupt vector number
+* ACT_Polarity - Interrupt polarity
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void EINT_Set_Polarity(kal_uint8 eintno, kal_bool ACT_Polarity)
+{
+// kal_uint32 savedMask;
+ kal_uint32 debounce_en;
+
+ /*disable EINT interrupt*/
+ //EINT_Mask(eintno);
+ kal_take_spinlock(eint_set_lock, KAL_INFINITE_WAIT);
+
+ /* Set external interrupt polarity */
+ debounce_en = eint_get_debounce_enable(eintno);
+ eint_set_debounce_enable(eintno, EINT_DISABLE);
+
+// savedMask = SaveAndSetIRQMask();
+ eint_set_pol(eintno,ACT_Polarity);
+
+ eint_set_debounce_enable(eintno, debounce_en);
+
+ EINT_L2_ACK(eintno);
+
+ kal_give_spinlock(eint_set_lock);
+ /*enable EINT interrupt*/
+ //EINT_UnMask(eintno);
+}
+
+
+/*************************************************************************
+* FUNCTION
+* EINT_Set_Sensitivity
+*
+* DESCRIPTION
+* This function dedicates to set the sensitivity of external
+* interrupts.
+*
+* CALLS
+*
+* PARAMETERS
+* eintno - External interrupt vector number
+* sens - EDGE_SENSITIVE or LEVEL_SENSITIVE
+*
+* RETURNS
+* 0 for success; 1 for failure
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+kal_uint32 EINT_Set_Sensitivity(kal_uint8 eintno, kal_bool sens)
+{
+ //kal_uint32 savedMask;
+
+ /* Save and set MCU's I,F bits to disable interrupts */
+ //savedMask = SaveAndSetIRQMask();
+ kal_take_spinlock(md1_eint_lock, KAL_INFINITE_WAIT);
+ if (eint_is_dedicated & (1<<eintno))
+ {
+ switch(eint_is_dedicated_map[eintno])
+ {
+ case DEDICATED_EINT0:
+ {
+ IRQSensitivity( DEDICATED_EINT_IRQ0, sens);
+ }
+ break;
+
+ case DEDICATED_EINT1:
+ {
+ IRQSensitivity( DEDICATED_EINT_IRQ1, sens );
+ }
+ break;
+
+ case DEDICATED_EINT2:
+ {
+ IRQSensitivity( DEDICATED_EINT_IRQ2, sens );
+ }
+ break;
+
+ case DEDICATED_EINT3:
+ {
+ IRQSensitivity( DEDICATED_EINT_IRQ3, sens );
+ }
+ break;
+
+ default:
+ break;
+ }
+ }
+
+ if(sens == EDGE_SENSITIVE)
+ {
+ sens = EINT_EDGE_SENSITIVITY;
+ }
+ else if(sens == LEVEL_SENSITIVE)
+ {
+ sens = EINT_LEVEL_SENSITIVITY;
+ }
+
+ eint_set_type(eintno, sens);
+
+ /* Restore previous MCU's I,F bits setting */
+ //RestoreIRQMask(savedMask);
+ kal_give_spinlock(md1_eint_lock);
+ return 0;
+}
+
+#if defined(__MD93__)
+/*************************************************************************
+* FUNCTION
+* EINT_TIMER_CALLBACK
+*
+* DESCRIPTION
+* This function implements main external interrupt LISR registered in
+* global ISR jump table.
+*
+* CALLS
+*
+* PARAMETERS
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void EINT_TIMER_CALLBACK(void *data)
+{
+ EINT_SW_DEBOUNCE_STRUCT *sw_debounce = (EINT_SW_DEBOUNCE_STRUCT *)data;
+
+ IRQMask(IRQ_EIT_CODE);
+
+ if(sw_debounce->eint_sw_debounce_handle != 0x7f)
+ {
+ DclSGPT_Control(sw_debounce->eint_sw_debounce_handle,SGPT_CMD_STOP,0);
+ DclSGPT_Close(&(sw_debounce->eint_sw_debounce_handle));
+ }
+ EINT_PRINT("\tEINT_TIMER_CALLBACK, sw_debounce->eint_no = %d",sw_debounce->eint_no);
+ sw_debounce->eint_intr_allow = (sw_debounce->eint_intr_allow == KAL_TRUE)? KAL_FALSE: KAL_TRUE;
+
+ /*
+ * This timer is to avoid if interrupt status is changed but
+ * sw_debounce->eint_intr_allow is still in KAL_TRUE state
+ * because of no interrupt
+ */
+ if (sw_debounce->eint_intr_allow)
+ {
+ SGPT_CTRL_START_T start;
+
+ start.u2Tick= eint_sw_debounce_time_delay[sw_debounce->eint_no];
+
+ start.pfCallback=EINT_TIMER_CALLBACK;
+ start.vPara=data;
+ sw_debounce->eint_sw_debounce_handle=DclSGPT_Open(DCL_GPT_CB,0);
+ DclSGPT_Control(sw_debounce->eint_sw_debounce_handle,SGPT_CMD_START,(DCL_CTRL_DATA_T*)&start);
+ }
+ IRQUnmask(IRQ_EIT_CODE);
+ EINT_UnMask(sw_debounce->eint_no);
+}
+
+/*************************************************************************
+* FUNCTION
+* EINT_TIMER_CALLBACK
+*
+* DESCRIPTION
+* This function implements main external interrupt LISR registered in
+* global ISR jump table.
+*
+* CALLS
+*
+* PARAMETERS
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void DEINT_TIMER_CALLBACK(void *data)
+{
+ EINT_SW_DEBOUNCE_STRUCT *sw_debounce = (EINT_SW_DEBOUNCE_STRUCT *)data;
+
+ EINT_Mask(sw_debounce->eint_no);
+
+ if(sw_debounce->eint_sw_debounce_handle != 0x7f)
+ {
+ DclSGPT_Control(sw_debounce->eint_sw_debounce_handle,SGPT_CMD_STOP,0);
+ DclSGPT_Close(&(sw_debounce->eint_sw_debounce_handle));
+ }
+
+ sw_debounce->eint_intr_allow = (sw_debounce->eint_intr_allow == KAL_TRUE)? KAL_FALSE: KAL_TRUE;
+
+ /*
+ * This timer is to avoid if interrupt status is changed but
+ * sw_debounce->eint_intr_allow is still in KAL_TRUE state
+ * because of no interrupt
+ */
+ if (sw_debounce->eint_intr_allow)
+ {
+ SGPT_CTRL_START_T start;
+
+ start.u2Tick= eint_sw_debounce_time_delay[sw_debounce->eint_no];
+
+ start.pfCallback=DEINT_TIMER_CALLBACK;
+ start.vPara=data;
+ sw_debounce->eint_sw_debounce_handle=DclSGPT_Open(DCL_GPT_CB,0);
+ DclSGPT_Control(sw_debounce->eint_sw_debounce_handle,SGPT_CMD_START,(DCL_CTRL_DATA_T*)&start);
+ }
+ EINT_UnMask(sw_debounce->eint_no);
+}
+
+/*************************************************************************
+* FUNCTION
+* EINT_LISR
+*
+* DESCRIPTION
+* Entry function of External Interrupt Service Routine
+*
+* CALLS
+*
+* PARAMETERS
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTE
+*
+*************************************************************************/
+void EINT_LISR(kal_uint32 irq_id)
+{
+ kal_uint8 index;
+ kal_uint32 status,mask_bits;
+
+ status = EINT_L2_STA();
+
+ if (EINT_Internal_LISR_Handler(&status))
+ {
+ return;
+ }
+
+ // for conventional external interrupt!
+ for(index=0;index<EINT_TOTAL_CHANNEL;index++)
+ {
+ //EINT_PRINT("\tEINT triggered!");
+ if ( EINT_CheckHWDebounce(index) )
+ {
+ mask_bits = EINT_Get_Mask_Bits();
+ if (status & EINT_STATUS_EINT(index) && !BU_G_BIT(mask_bits, index))
+ {
+ if(eint_sw_debounce[index].eint_sw_debounce_handle != 0x7f)
+ {
+ DclSGPT_Control(eint_sw_debounce[index].eint_sw_debounce_handle,SGPT_CMD_STOP,0);
+ DclSGPT_Close(&(eint_sw_debounce[index].eint_sw_debounce_handle));
+ }
+ if ( (eint_sw_debounce[index].eint_intr_allow == KAL_FALSE) &&
+ (eint_sw_debounce_time_delay[index] > 0)
+ )
+ {
+ SGPT_CTRL_START_T start;
+ //EINT_PRINT("\tstart timer, eint_sw_debounce_time_delay[%d] = %d",index,eint_sw_debounce_time_delay[index]);
+ eint_sw_debounce[index].eint_sw_debounce_handle=DclSGPT_Open(DCL_GPT_CB,0);
+
+ start.u2Tick=eint_sw_debounce_time_delay[index];
+ start.pfCallback=EINT_TIMER_CALLBACK;
+ start.vPara=&eint_sw_debounce[index];
+ DclSGPT_Control(eint_sw_debounce[index].eint_sw_debounce_handle,SGPT_CMD_START,(DCL_CTRL_DATA_T*)&start);
+
+ EINT_Mask(index);
+ Data_Sync_Barrier();
+ }
+ else
+ {
+ eint_sw_debounce[index].eint_intr_allow = KAL_FALSE;
+ // disable interrupt
+ EINT_Mask(index);
+ Data_Sync_Barrier();
+ //EINT_PRINT("\tEINT trigger HISR");
+ ASSERT(EINT_FUNC.eint_func[index]!=NULL);
+ if ( EINT_FUNC.eint_func[index] )
+ {
+ EINT_FUNC.eint_active[index] = KAL_TRUE;
+
+ kal_activate_hisr_index(EINT_HISR);
+ }
+ }
+ EINT_L2_ACK(index);
+ }
+ }
+ else
+ {
+ if (status & EINT_STATUS_EINT(index))
+ {
+ EINT_Mask(index);
+ Data_Sync_Barrier();
+ ASSERT(EINT_FUNC.eint_func[index]!=NULL);
+ if ( EINT_FUNC.eint_func[index] )
+ {
+ EINT_FUNC.eint_active[index] = KAL_TRUE;
+
+ kal_activate_hisr_index(EINT_HISR);
+ }
+ EINT_L2_ACK(index);
+ }
+ }
+ }
+}
+
+void DEINT_Process(kal_uint8 deintno)
+{
+ kal_uint8 eintno;
+ char eintno_temp;
+ eintno_temp = gpio_get_l1_eint_src(deintno);
+
+ if(eintno_temp==EINT_FAIL)
+ {
+ ASSERT(0);
+ return;
+ }
+ eintno = (kal_uint8)eintno_temp;
+ if ( EINT_CheckHWDebounce(eintno) )
+ {
+ if(eint_sw_debounce[eintno].eint_sw_debounce_handle != 0x7f)
+ {
+ DclSGPT_Control(eint_sw_debounce[eintno].eint_sw_debounce_handle,SGPT_CMD_STOP,0);
+ DclSGPT_Close(&(eint_sw_debounce[eintno].eint_sw_debounce_handle));
+ }
+ if ( (eint_sw_debounce[eintno].eint_intr_allow == KAL_FALSE) &&
+ (eint_sw_debounce_time_delay[eintno] > 0)
+ )
+ {
+ SGPT_CTRL_START_T start;
+ //EINT_PRINT("\tDEINT start timer, eint_sw_debounce_time_delay[index] = %d",eint_sw_debounce_time_delay[deintno]);
+ eint_sw_debounce[eintno].eint_sw_debounce_handle=DclSGPT_Open(DCL_GPT_CB,0);
+
+ start.u2Tick=eint_sw_debounce_time_delay[eintno];
+ start.pfCallback=DEINT_TIMER_CALLBACK;
+ start.vPara=&eint_sw_debounce[eintno];
+ DclSGPT_Control(eint_sw_debounce[eintno].eint_sw_debounce_handle,SGPT_CMD_START,(DCL_CTRL_DATA_T*)&start);
+
+ EINT_Mask(eintno);
+ }
+ else
+ {
+ eint_sw_debounce[eintno].eint_intr_allow = KAL_FALSE;
+ // disable interrupt
+ //EINT_PRINT("\tDEINT trigger HISR");
+ EINT_Mask(eintno);
+ ASSERT(EINT_FUNC.eint_func[eintno]!=NULL);
+ if ( EINT_FUNC.eint_func[eintno] )
+ {
+ EINT_FUNC.eint_active[eintno] = KAL_TRUE;
+
+ kal_activate_hisr_index(DEINT_HISR);
+ }
+ }
+ }
+ else
+ {
+ EINT_Mask(eintno);
+ ASSERT(EINT_FUNC.eint_func[eintno]!=NULL);
+ if ( EINT_FUNC.eint_func[eintno] )
+ {
+ EINT_FUNC.eint_active[eintno] = KAL_TRUE;
+
+ kal_activate_hisr_index(DEINT_HISR);
+ }
+ }
+}
+#elif defined(__MD95__) || defined(__MD97__)|| defined(__MD97P__)
+
+/*************************************************************************
+* FUNCTION
+* EINT_LISR
+*
+* DESCRIPTION
+* Entry function of External Interrupt Service Routine
+*
+* CALLS
+*
+* PARAMETERS
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTE
+*
+*************************************************************************/
+void EINT_LISR(kal_uint32 irq_id)
+{
+ kal_uint8 index;
+ kal_uint32 status,mask_bits;
+
+ status = EINT_L2_STA();
+
+ if (EINT_Internal_LISR_Handler(&status))
+ {
+ return;
+ }
+
+ // for conventional external interrupt!
+ for(index=0;index<EINT_TOTAL_CHANNEL;index++)
+ {
+ //EINT_PRINT("\tEINT triggered!");
+ if ( EINT_CheckHWDebounce(index) )
+ {
+ mask_bits = EINT_Get_Mask_Bits();
+ if (status & EINT_STATUS_EINT(index) && !BU_G_BIT(mask_bits, index))
+ {
+ // disable interrupt
+ EINT_Mask(index);
+ Data_Sync_Barrier();
+ //EINT_PRINT("\tEINT trigger HISR");
+ ASSERT(EINT_FUNC.eint_func[index]!=NULL);
+ if ( EINT_FUNC.eint_func[index] )
+ {
+ EINT_FUNC.eint_active[index] = KAL_TRUE;
+
+ kal_activate_hisr_index(EINT_HISR);
+ }
+ EINT_L2_ACK(index);
+ }
+ }
+ else
+ {
+ if (status & EINT_STATUS_EINT(index))
+ {
+ EINT_Mask(index);
+ Data_Sync_Barrier();
+ ASSERT(EINT_FUNC.eint_func[index]!=NULL);
+ if ( EINT_FUNC.eint_func[index] )
+ {
+ EINT_FUNC.eint_active[index] = KAL_TRUE;
+
+ kal_activate_hisr_index(EINT_HISR);
+ }
+ EINT_L2_ACK(index);
+ }
+ }
+ }
+}
+
+void DEINT_Process(kal_uint8 deintno)
+{
+ kal_uint8 eintno;
+ char eintno_temp;
+ eintno_temp = gpio_get_l1_eint_src(deintno);
+
+ if(eintno_temp==EINT_FAIL)
+ {
+ ASSERT(0);
+ return;
+ }
+ eintno = (kal_uint8)eintno_temp;
+ if ( EINT_CheckHWDebounce(eintno) )
+ {
+ // disable interrupt
+ //EINT_PRINT("\tDEINT trigger HISR");
+ EINT_Mask(eintno);
+ ASSERT(EINT_FUNC.eint_func[eintno]!=NULL);
+ if ( EINT_FUNC.eint_func[eintno] )
+ {
+ EINT_FUNC.eint_active[eintno] = KAL_TRUE;
+
+ kal_activate_hisr_index(DEINT_HISR);
+ }
+ }
+ else
+ {
+ EINT_Mask(eintno);
+ ASSERT(EINT_FUNC.eint_func[eintno]!=NULL);
+ if ( EINT_FUNC.eint_func[eintno] )
+ {
+ EINT_FUNC.eint_active[eintno] = KAL_TRUE;
+
+ kal_activate_hisr_index(DEINT_HISR);
+ }
+ }
+}
+#else
+#error "no chip match"
+#endif
+
+/*************************************************************************
+* FUNCTION
+* DEINT0_LISR
+*
+* DESCRIPTION
+* Entry function of Dedicated External Interrupt 0 Service Routine
+*
+* CALLS
+*
+* PARAMETERS
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTE
+*
+*************************************************************************/
+//void DEINT_LISR(void)
+void DEINT0_LISR(kal_uint32 irq_id)
+{
+ DEINT_Process(DEDICATED_EINT0);
+}
+
+/*************************************************************************
+* FUNCTION
+* DEINT1_LISR
+*
+* DESCRIPTION
+* Entry function of Dedicated External Interrupt 1 Service Routine
+*
+* CALLS
+*
+* PARAMETERS
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTE
+*
+*************************************************************************/
+//void DEINT_LISR(void)
+void DEINT1_LISR(kal_uint32 irq_id)
+{
+ DEINT_Process(DEDICATED_EINT1);
+}
+
+/*************************************************************************
+* FUNCTION
+* DEINT2_LISR
+*
+* DESCRIPTION
+* Entry function of Dedicated External Interrupt 2 Service Routine
+*
+* CALLS
+*
+* PARAMETERS
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTE
+*
+*************************************************************************/
+//void DEINT_LISR(void)
+void DEINT2_LISR(kal_uint32 irq_id)
+{
+ DEINT_Process(DEDICATED_EINT2);
+}
+
+/*************************************************************************
+* FUNCTION
+* DEINT3_LISR
+*
+* DESCRIPTION
+* Entry function of Dedicated External Interrupt 3 Service Routine
+*
+* CALLS
+*
+* PARAMETERS
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTE
+*
+*************************************************************************/
+//void DEINT_LISR(void)
+void DEINT3_LISR(kal_uint32 irq_id)
+{
+ DEINT_Process(DEDICATED_EINT3);
+}
+
+
+
+/*************************************************************************
+* FUNCTION
+* EINT_SaveAndMask
+*
+* DESCRIPTION
+* This function saves and masks the specified external interrupt
+*
+* PARAMETERS
+* eintno - external interrupt vector number
+*
+* RETURNS
+* original mask
+*
+*************************************************************************/
+kal_uint32 EINT_SaveAndMask(kal_uint8 eintno)
+{
+ kal_uint32 eint_mask;//savedMask
+
+
+ /* lockout interrupt */
+ //savedMask = SaveAndSetIRQMask();
+ kal_take_spinlock(md1_eint_lock, KAL_INFINITE_WAIT);
+ /* save EINT mask */
+ eint_mask = EINT_Get_Mask_Bits();
+
+ /* mask EINT */
+ EINT_Mask(eintno);
+
+ /* clear unnecessary bits */
+ eint_mask = eint_mask & (0x0001 << eintno);
+
+ /* un-lockout interrupt */
+ //RestoreIRQMask(savedMask);
+ kal_give_spinlock(md1_eint_lock);
+ return eint_mask;
+}
+
+
+/*************************************************************************
+* FUNCTION
+* EINT_RestoreMask
+*
+* DESCRIPTION
+* This function restores the MASK of the specified external interrupt
+*
+* PARAMETERS
+* val - value to restore
+*
+* RETURNS
+* No return
+*
+*************************************************************************/
+void EINT_RestoreMask(kal_uint8 eintno, kal_uint32 val)
+{
+ //kal_uint32 savedMask;
+
+
+ /* lockout interrupt */
+ //savedMask = SaveAndSetIRQMask();
+ kal_take_spinlock(md1_eint_lock, KAL_INFINITE_WAIT);
+ /*
+ * NoteXXX: The external interrup should already be masked here (via the
+ * EINT_SaveAndMask() call). Only need to change the EINT_MASK
+ * when the external interrupt is originally un-masked.
+ */
+ if (val == 0)
+ {
+ EINT_UnMask(eintno);
+ }
+
+ /* un-lockout interrupt */
+ //RestoreIRQMask(savedMask);
+ kal_give_spinlock(md1_eint_lock);
+}
+#if defined(__MD93__)
+/*************************************************************************
+* FUNCTION
+* EINT_SW_Debounce_Init
+*
+* DESCRIPTION
+* Initialize debounce time
+*
+* CALLS
+*
+* PARAMETERS
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTE
+*
+*************************************************************************/
+void EINT_SW_Debounce_Init(void)
+{
+ kal_uint8 index;
+
+ for (index = 0; index < EINT_TOTAL_CHANNEL; index++)
+ {
+ eint_sw_debounce[index].eint_sw_debounce_handle = 0x7f;
+ if( EINT_CheckHWDebounce(index) )
+ {
+ eint_sw_debounce[index].eint_intr_allow = KAL_FALSE;
+ eint_sw_debounce[index].eint_no = index;
+ }
+ }
+
+ #ifndef ATEST_DRV_ENABLE
+ eint_sw_debounce_time_delay = custom_config_eint_sw_debounce_time_delay();
+ #endif
+}
+
+/*************************************************************************
+* FUNCTION
+* EINT_SW_Debounce_Modify
+*
+* DESCRIPTION
+* Setting debounce time
+*
+* CALLS
+*
+* PARAMETERS
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTE
+*
+*************************************************************************/
+kal_int32 EINT_SW_Debounce_Modify(kal_uint8 eintno, kal_uint8 debounce_time)
+{
+ //kal_uint32 savedMask;
+
+ if ( EINT_CheckNotHWDebounce(eintno))
+ return -1;
+
+ if(NULL == eint_sw_debounce_time_delay)
+ {
+ eint_sw_debounce_time_delay = custom_config_eint_sw_debounce_time_delay();
+ }
+
+ //savedMask = SaveAndSetIRQMask();
+ kal_take_spinlock(md1_eint_lock, KAL_INFINITE_WAIT);
+ eint_sw_debounce_time_delay[eintno] = debounce_time;
+ //RestoreIRQMask(savedMask);
+ kal_give_spinlock(md1_eint_lock);
+ return 1;
+}
+#elif defined(__MD95__)
+#elif defined(__MD97__)
+#elif defined(__MD97P__)
+#else
+#error "no chip match"
+#endif
+/*************************************************************************
+* FUNCTION
+* EINT_SaveAndMaskAll
+*
+* DESCRIPTION
+* This function saves and masks the specified external interrupt
+*
+* PARAMETERS
+* eintno - external interrupt vector number
+*
+* RETURNS
+* original mask
+*
+*************************************************************************/
+kal_uint32 EINT_SaveAndMaskAll(void)
+{
+ kal_uint32 eint_mask, eint_new_mask;//savedMask
+
+#if (EINT_TOTAL_CHANNEL < 32)
+ eint_new_mask = (1<<EINT_TOTAL_CHANNEL)-1;
+#else
+ eint_new_mask = 0xffffffff;
+#endif
+
+ /* lockout interrupt */
+ //savedMask = SaveAndSetIRQMask();
+ kal_take_spinlock(md1_eint_lock, KAL_INFINITE_WAIT);
+ /* save EINT mask */
+ eint_mask = EINT_Get_Mask_Bits();
+
+ /* mask EINT */
+ EINT_Set_Mask_all(eint_new_mask);
+
+ /* un-lockout interrupt */
+ //RestoreIRQMask(savedMask);
+ kal_give_spinlock(md1_eint_lock);
+ return eint_mask;
+}
+
+
+
+/*************************************************************************
+* FUNCTION
+* EINT_RestoreMaskAll
+*
+* DESCRIPTION
+* This function restores the MASK of the specified external interrupt
+*
+* PARAMETERS
+* val - value to restore
+*
+* RETURNS
+* No return
+*
+*************************************************************************/
+void EINT_RestoreMaskAll(kal_uint32 val)
+{
+ //kal_uint32 savedMask;
+#if 0
+/* under construction !*/
+/* under construction !*/
+#if !defined(__HW_US_TIMER_SUPPORT__)
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+#endif
+
+ /* lockout interrupt */
+ //savedMask = SaveAndSetIRQMask();
+ kal_take_spinlock(md1_eint_lock, KAL_INFINITE_WAIT);
+ /*
+ * NoteXXX: The external interrupt should already be masked here (via the
+ * EINT_SaveAndMask() call). Only need to change the EINT_MASK
+ * when the external interrupt is originally un-masked.
+ */
+ EINT_Set_Mask_all(0xffffffff);
+ EINT_Set_UnMask_all(~val);
+
+ /* un-lockout interrupt */
+ //RestoreIRQMask(savedMask);
+ kal_give_spinlock(md1_eint_lock);
+}
+
+
+
+/*************************************************************************
+* FUNCTION
+* EINT_SetSWRegister
+*
+* DESCRIPTION
+* This function set EINT SW interrupt register
+*
+* PARAMETERS
+*
+* RETURNS
+* none
+*
+*************************************************************************/
+void EINT_SetSWRegister(kal_uint8 eintno)
+{
+ //MT6290 not support this register
+}
+
+/*************************************************************************
+* FUNCTION
+* EINT_ResetSWRegister
+*
+* DESCRIPTION
+* This function set EINT SW interrupt register
+*
+* PARAMETERS
+*
+* RETURNS
+* none
+*
+*************************************************************************/
+void EINT_ResetSWRegister(kal_uint8 eintno)
+{
+ //MT6290 not support this register
+}
+
+/*************************************************************************
+* FUNCTION
+* EINT_Set_OwnerShip
+*
+* DESCRIPTION
+* This function sets the ownership of external interrupts
+*
+* CALLS
+*
+* PARAMETERS
+* eintno - External interrupt vector number
+* ownership - 0: MD ownership, 1: AP ownerhship
+*
+* RETURNS
+* 0 for success; -1 for failure
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+kal_int32 EINT_Set_OwnerShip(kal_uint8 eintno, kal_uint8 ownership)
+{
+ eint_set_ownership(eintno,ownership);
+ return EINT_OK;
+}
+
+/*************************************************************************
+* FUNCTION
+* EINT_Set_Source_GPIO
+*
+* DESCRIPTION
+* This function set the signal of source GPIO as input signal of the specified external interrupt
+*
+* PARAMETERS
+* eintno - External interrupt vector number
+* gpiono - the GPIO number to be set as source of the specified external interrupt.
+
+*
+* RETURNS
+* No return
+*
+*************************************************************************/
+
+kal_int32 EINT_Set_Source_GPIO(kal_uint8 eintno, kal_uint8 gpiono)
+{
+ if(gpio_set_eint_src(eintno,gpiono) != EINT_OK)
+ {
+ return EINT_FAIL;
+ }
+
+ return EINT_OK;
+}
+
+/*************************************************************************
+* FUNCTION
+* EINT_Set_Dedicated_Eint
+*
+* DESCRIPTION
+* This function set the specified external interrupt as L1 IRQ, not shared irq.
+*
+* PARAMETERS
+* Deintno - L1 external interrupt ID 0~3
+* eintno - External interrupt vector number
+
+*
+* RETURNS
+* No return
+*
+*************************************************************************/
+ kal_int32 EINT_Set_Dedicated_Eint(kal_uint8 Deintno, kal_uint8 eintno)
+{
+ if(gpio_set_l1_eint(Deintno,eintno,EINT_ENABLE) != EINT_OK)
+ {
+ return EINT_FAIL;
+ }
+
+ return EINT_OK;
+}
+
+ /*************************************************************************
+* FUNCTION
+* DEINT_UnMask
+*
+* DESCRIPTION
+* This function implements Unmask of dedicated external interrupt source
+*
+* CALLS
+*
+* PARAMETERS
+* deintno - external interrupt vector number
+*
+* RETURNS
+* No return
+*
+* GLOBALS AFFECTED
+*
+*************************************************************************/
+void DEINT_Registration(kal_uint8 deintno,void (reg_hisr)(void))
+{
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+}
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
diff --git a/mcu/driver/devdrv/eint/src/drv_eint.c b/mcu/driver/devdrv/eint/src/drv_eint.c
new file mode 100644
index 0000000..78780c2
--- /dev/null
+++ b/mcu/driver/devdrv/eint/src/drv_eint.c
@@ -0,0 +1,449 @@
+#include "eint_sw.h"
+#include "eint_hw.h"
+#include "kal_general_types.h"
+
+/**
+* @brief set the polarity parameter of the eint
+* @param eint : the eint index to be set
+* @param pol : the polarity value to set, it should be 0~1
+* 0: set pol to negative polarity
+* 1: set pol to positive polarity
+* @return EINT_OK : set successful, EINT_FAIL : set failed
+*/
+kal_int32 eint_set_pol(eint_e eint, kal_uint32 pol)
+{
+ if(eint >= EINT_NUM)
+ {
+ EINT_PRINT("\tset eint pol failed,eint is:[%d]",eint);
+ return EINT_FAIL;
+ }
+ if(EINT_POSITIVE_POLARITY == pol)
+ {
+ REG32_WRITE(GPIOMUX_EINT_POL_SET,(1 << eint));
+ }
+ else
+ {
+ REG32_WRITE(GPIOMUX_EINT_POL_CLR,(1 << eint));
+ }
+
+ return EINT_OK;
+}
+
+/**
+ * @brief get eint polarity value of eint
+ * @param eint : The eint to be read.
+ * @return return the eint polarity parameter's value of eint
+ * 0: current is negative polarity
+ * 1: current is positive polarity
+ * EINT_FAIL: eint is out of range
+ */
+kal_int32 gpio_get_eint_pol(eint_e eint)
+{
+ kal_uint32 pol;
+ if(eint >= EINT_NUM)
+ {
+ EINT_PRINT("\t gpio set eint pol failed,eint is:[%d]",eint);
+ return EINT_FAIL;
+ }
+ if(REG32(GPIOMUX_EINT_POL)&(1<<eint))
+ {
+ pol = EINT_POSITIVE_POLARITY;
+ }
+ else
+ {
+ pol = EINT_NEGATIVE_POLARITY;
+ }
+ return pol;
+}
+
+
+
+/**
+* @brief set the debounce enable parameter of the eint
+* @param eint : the eint index to be set
+* @param debounce_en : the debounce enable value to set, it should be 0~1
+* 0: enable debounce function
+* 1: disable debounce function
+* @return EINT_OK : set successful, EINT_FAIL : set failed
+*/
+kal_int32 eint_set_debounce_enable(eint_e eint, kal_uint32 debounce_en)
+{
+ if(eint >= EINT_NUM)
+ {
+ EINT_PRINT("\tset eint debounce failed,eint is:[%d]",eint);
+ return EINT_FAIL;
+ }
+ if(EINT_ENABLE == debounce_en)
+ {
+ REG32_WRITE(GPIOMUX_EINT_DB_EN_SET,(1 << eint));
+ while(!(REG32(GPIOMUX_EINT_DBNCSTS) & (1<<eint)));
+ }
+ else
+ {
+ REG32_WRITE(GPIOMUX_EINT_DB_EN_CLR,(1 << eint));
+ while((REG32(GPIOMUX_EINT_DBNCSTS) & (1<<eint)));
+ }
+ return EINT_OK;
+}
+
+/**
+* @brief set the debounce duration parameter of the eint
+* @param eint : the eint index to be set
+* @param duration : the debounce duration value to set, it should be 0~0x3fff
+* @return EINT_OK : set successful, EINT_FAIL : set failed
+*/
+kal_int32 eint_set_debounce_duration(eint_e eint, kal_uint32 duration)
+{
+ volatile unsigned int *reg_addr;
+ if(eint >= EINT_NUM)
+ {
+ EINT_PRINT("\tset eint debounce failed,eint is:[%d]",eint);
+ return EINT_FAIL;
+ }
+
+ if(duration > EINT_DB_DUR_MAX)
+ {
+ EINT_PRINT("\tset eint debounce failed,debounce duration:[%x] is out of range",duration);
+ return EINT_FAIL;
+ }
+ else
+ {
+ reg_addr = (volatile unsigned int *)((unsigned int)GPIOMUX_EINT_DUR0 + 4*eint);
+ REG32_WRITE(reg_addr,duration);
+ }
+
+ return EINT_OK;
+}
+
+/**
+* @brief set the irqen parameter of the eint
+* @param eint : the eint index to be set
+* @param enable : the irq enable register value to set, it should be 0~1
+* 0: disable eint irq send to cirq/gic module
+* 1: enable eint irq send to cirq/gic module
+* @return EINT_OK : set successful, EINT_FAIL : set failed
+*/
+kal_int32 eint_set_irqen(eint_e eint,kal_uint32 enable)
+{
+ if(eint >= EINT_NUM)
+ {
+ EINT_PRINT("\tset eint irqen failed,eint is:[%d]",eint);
+ return EINT_FAIL;
+ }
+ if(EINT_ENABLE == enable)
+ {
+ REG32_WRITE(GPIOMUX_EINT_IRQEN_SET,(1<<eint));
+ }
+ else if(EINT_DISABLE == enable)
+ {
+ REG32_WRITE(GPIOMUX_EINT_IRQEN_CLR,(1<<eint));
+ }
+ else
+ {
+ EINT_ERR("\tThe irq enable value should be 0 or 1 !!!!");
+ return EINT_FAIL;
+ }
+
+ return EINT_OK;
+}
+
+void eint_set_mask_all(kal_uint32 mask_bits)
+{
+ REG32_WRITE(GPIOMUX_EINT_IRQEN_CLR,mask_bits);
+}
+
+void eint_set_unmask_all(kal_uint32 unmask_bits)
+{
+ REG32_WRITE(GPIOMUX_EINT_IRQEN_SET,unmask_bits);
+}
+
+
+/**
+ * @brief get eint debounce enable value of eint
+ * @param eint : The eint to be read.
+ * @return return the eint debounce parameter's value of eint
+ * 0: current debounce is disable
+ * 1: current debounce is enable
+ * EINT_FAIL: eint is out of range
+ */
+kal_int32 eint_get_debounce_enable(eint_e eint)
+{
+ kal_uint32 debounce;
+ if(eint >= EINT_NUM)
+ {
+ EINT_PRINT("\tset eint debounce failed,eint is:[%d]",eint);
+ return EINT_FAIL;
+ }
+ if(REG32(GPIOMUX_EINT_DB_EN)&(1<<eint))
+ {
+ debounce = EINT_ENABLE;
+ }
+ else
+ {
+ debounce = EINT_DISABLE;
+ }
+ return debounce;
+}
+
+/**
+ * @brief get eint IRQEN value of eint
+ * @return return the eint debounce parameter's value of eint
+ * 0: current eint is unmask
+ * 1: current eint is mask
+ * EINT_FAIL: eint is out of range
+ */
+kal_int32 eint_get_irqen(void)
+{
+ kal_uint32 irqen;
+
+ irqen = REG32(GPIOMUX_EINT_IRQEN);
+ irqen &= ((1<<EINT_TOTAL_CHANNEL) - 1);
+ return irqen;
+}
+
+
+/**
+* @brief set the sensitivity parameter of the eint
+* @param eint : the eint index to be set
+* @param type : the sensitivity value to set, it should be 0~1
+* 0: set sensitivity to edge(pulse)
+* 1: set sensitivity to level
+* @return EINT_OK : set successful, EINT_FAIL : set failed
+*/
+kal_int32 eint_set_type(eint_e eint, kal_uint32 type)
+{
+ if(eint >= EINT_NUM)
+ {
+ EINT_PRINT("\tset eint pol failed,eint is:[%d]",eint);
+ return EINT_FAIL;
+ }
+ if(EINT_LEVEL_SENSITIVITY == type)
+ {
+ REG32_WRITE(GPIOMUX_EINT_TYPE_SET,(1 << eint));
+ }
+ else
+ {
+ REG32_WRITE(GPIOMUX_EINT_TYPE_CLR,(1 << eint));
+ }
+
+ return EINT_OK;
+}
+
+/**
+ * @brief get eint type parameter's value of eint
+ * @param eint : The eint to be read.
+ * @return return the eint type parameter's value of eint
+ * 0: current is edge(pulse) sensitivity
+ * 1: current is level sensitivity
+ * EINT_FAIL: eint is out of range
+ */
+kal_int32 gpio_get_eint_type(eint_e eint)
+{
+ kal_int32 eint_type;
+ if(eint >= EINT_NUM)
+ {
+ EINT_PRINT("\t gpio set eint pol failed,eint is:[%d]",eint);
+ return EINT_FAIL;
+ }
+ if(REG32(GPIOMUX_EINT_TYPE)&(1<<eint))
+ {
+ eint_type = EINT_LEVEL_SENSITIVITY;
+ }
+ else
+ {
+ eint_type = EINT_EDGE_SENSITIVITY;
+ }
+ return eint_type;
+}
+
+
+/**
+* @brief set eint ownership register
+* @param eint : the eint index to set ownerhsip
+* @param ownership : the ownership register bit value to set ,it should be 0~1
+* 0: set ownership to MD
+* 1: set ownership to AP
+* @return GPIO_OK : set successful, EINT_FAIL : set failed
+*/
+kal_int32 eint_set_ownership(kal_uint32 eint,kal_uint32 ownership)
+{
+ return EINT_OK;
+}
+
+/**
+* @brief set the source gpio index parameter of the eint
+* @param eint : the eint index to be set
+* @param gpio_pin : The pin which is to set as source gpio of eint. it should be 0~63
+* @return GPIO_OK : set successful, EINT_FAIL : set failed
+*/
+kal_int32 gpio_set_eint_src(eint_e eint, kal_uint8 gpio_pin)
+{
+ volatile unsigned int* eint_src_reg;
+ kal_uint32 eint_src,eint_src_reg_shift;
+ if((eint >= EINT_NUM)||(gpio_pin >= EINT_SRC_PIN_MAX))
+ {
+ EINT_PRINT("\t gpio seteint src failed! eint:[%d] or gpio_pin:[%d] is out of range",eint,gpio_pin);
+ return EINT_FAIL;
+ }
+
+ eint_src_reg = (volatile unsigned int*)((unsigned int)GPIOMUX_EINT_SRC1 + EINT_SRC_OFFSET*(eint/EINT_SRC_NUM_PER_REG));
+ eint_src_reg_shift = (eint%EINT_SRC_NUM_PER_REG)*EINT_SRC_SHIFT_BIT;
+ eint_src = REG32(eint_src_reg);
+ REG32_WRITE(eint_src_reg,(eint_src&(~(0xff << eint_src_reg_shift))));
+ eint_src = REG32(eint_src_reg);
+ REG32_WRITE(eint_src_reg,(eint_src|(gpio_pin << eint_src_reg_shift)));
+
+ return EINT_OK;
+}
+
+/**
+ * @brief get eint source gpio id of eint
+ * @param eint : The eint to be read.
+ * @return return the eint source parameter's value of eint
+ * gpio_pin: 0~64 the gpio index of eint source
+ * EINT_FAIL: eint is out of range
+ */
+kal_int32 gpio_get_eint_src(eint_e eint)
+{
+ volatile unsigned int* eint_src_reg;
+ kal_uint32 eint_src,eint_src_reg_shift,gpio_pin;
+ if(eint >= EINT_NUM)
+ {
+ EINT_PRINT("\t gpio get eint src failed! eint:[%d] is out of range",eint);
+ return EINT_FAIL;
+ }
+ eint_src_reg = (volatile unsigned int*)((unsigned int)GPIOMUX_EINT_SRC1 + EINT_SRC_OFFSET*(eint/EINT_SRC_NUM_PER_REG));
+ eint_src_reg_shift = (eint%EINT_SRC_NUM_PER_REG)*EINT_SRC_SHIFT_BIT;
+ eint_src = REG32(eint_src_reg);
+ gpio_pin = (eint_src>>eint_src_reg_shift)&0xff;
+ return gpio_pin;
+}
+
+
+/**
+ * @brief set dedicated eint source l2 eint index value of deint
+ * @param deint : The dedicated eint to be set.
+ * @param eint_num: the l2 eint index to set as source eint of deint,it should be 0~15
+ * @return GPIO_OK : set successful, EINT_FAIL : set failed
+ */
+kal_int32 eint_set_l1_eint_source(dedicated_eint_e deint,eint_e eint_num)
+{
+ volatile unsigned int *reg_addr;
+ kal_uint32 reg_val;
+
+ if((eint_num >= EINT_NUM)||(deint >= DEDICATED_EINT_TOTAL_CHANNEL))
+ {
+ EINT_PRINT("\teint set l1 eint source failed,eint_num is:[%d] , deint is [%d]",eint_num,deint);
+ return EINT_FAIL;
+ }
+ reg_addr = (volatile unsigned int *)((unsigned int)GPIOMUX_EINT_DIRQ0 + deint*4);
+ reg_val = REG32(reg_addr);
+ REG32_WRITE(reg_addr,(reg_val&(~0xf)));
+ reg_val = REG32(reg_addr);
+ REG32_WRITE(reg_addr,(reg_val | eint_num));
+ return EINT_OK;
+}
+
+/**
+ * @brief set dedicated eint enable value of deint
+ * @param deint : The dedicated eint to be set.
+ * @param enable: the enable register value to set,it should be 0~1
+ * 0: enable dedicated eint
+ * 1: disable dedicated eint
+ * @return GPIO_OK : set successful, EINT_FAIL : set failed
+ */
+kal_int32 eint_set_l1_eint_enable(dedicated_eint_e deint , kal_uint32 enable)
+{
+ volatile unsigned int *reg_addr;
+ kal_uint32 bit_shift,reg_val;
+
+ bit_shift = 31;
+
+ if((deint >= DEDICATED_EINT_TOTAL_CHANNEL)||(enable > EINT_ENABLE))
+ {
+ EINT_PRINT("\teint set l1 eint enable failed,eint is:[%d],enable is:[%d]",deint,enable);
+ return EINT_FAIL;
+ }
+ reg_addr = (volatile unsigned int *)((unsigned int)GPIOMUX_EINT_DIRQ0 + deint*4);
+ reg_val = REG32(reg_addr);
+ REG32_WRITE(reg_addr,(reg_val&(~(1 << bit_shift))));
+ reg_val = REG32(reg_addr);
+ REG32_WRITE(reg_addr,(reg_val | (enable << bit_shift)));
+ return EINT_OK;
+}
+
+/**
+ * @brief set dedicated eint enable value of deint
+ * @param deint : The dedicated eint to be set.
+ * @param enable: the enable register value to set,it should be 0~1
+ * 0: enable dedicated eint
+ * 1: disable dedicated eint
+ * @return GPIO_OK : set successful, EINT_FAIL : set failed
+ */
+kal_int32 eint_get_l1_irqen(dedicated_eint_e deint)
+{
+ volatile unsigned int *reg_addr;
+ kal_uint32 bit_shift,reg_val;
+
+ bit_shift = 31;
+
+ if((deint >= DEDICATED_EINT_TOTAL_CHANNEL))
+ {
+ EINT_PRINT("\teint set l1 eint enable failed,eint is:[%d],enable is:[%d]",deint);
+ return EINT_FAIL;
+ }
+ reg_addr = (volatile unsigned int *)((unsigned int)GPIOMUX_EINT_DIRQ0 + deint*4);
+ reg_val = REG32(reg_addr);
+
+ return ((reg_val & (1 << bit_shift)) != 0);
+}
+
+
+/**
+ * @brief set dedicated eint enable value of deint
+ * @param deint : The dedicated eint to be set.
+ * @param eint: the l2 eint index to set as source eint of deint,it should be 0~15
+ * @param enable: the enable register value to set,it should be 0~1
+ * 0: enable dedicated eint
+ * 1: disable dedicated eint
+ * @return GPIO_OK : set successful, EINT_FAIL : set failed
+ */
+kal_int32 gpio_set_l1_eint(dedicated_eint_e deint,eint_e eint,kal_uint32 enable)
+{
+ if((deint >= DEDICATED_EINT_TOTAL_CHANNEL)||(eint >= EINT_NUM)||(enable> EINT_ENABLE))
+ {
+ EINT_PRINT("\teint set l1 eint failed! deint = [%d],eint = [%d], enable = [%d]",deint,eint,enable);
+ return EINT_FAIL;
+ }
+ eint_set_irqen(eint,EINT_DISABLE);
+ eint_set_l1_eint_source(deint,eint);
+ eint_set_l1_eint_enable(deint,enable);
+
+ return EINT_OK;
+}
+
+
+/**
+ * @brief get dedicated eint source l2 eint index value of l1_deint
+ * @param l1_deint : The dedicated eint to be read.
+ * @return return the dedicated eint source l2 eint index value of l1_deint
+ * src_eint: 0~0xf , l2 eint index
+ * EINT_FAIL: l1_deint is out of range
+ */
+kal_int32 gpio_get_l1_eint_src(kal_uint32 l1_deint)
+{
+ kal_uint32 src_eint;
+ volatile unsigned int *reg_addr;
+
+ if(l1_deint >= DEDICATED_EINT_TOTAL_CHANNEL)
+ {
+ EINT_PRINT("\t eint get l1 deint srouce failed,l1_eint is:[%d]",l1_deint);
+ return EINT_FAIL;
+ }
+
+ reg_addr = (volatile unsigned int *)((unsigned int)GPIOMUX_EINT_DIRQ0 + 4*l1_deint);
+ src_eint = REG32(reg_addr)&0xf;
+
+ return src_eint;
+}
+
diff --git a/mcu/driver/devdrv/eint/src/eint_setting_init.c b/mcu/driver/devdrv/eint/src/eint_setting_init.c
new file mode 100644
index 0000000..9d50a4a
--- /dev/null
+++ b/mcu/driver/devdrv/eint/src/eint_setting_init.c
@@ -0,0 +1,318 @@
+#ifdef __CUST_NEW__
+#include "drv_comm.h"
+#include "reg_base.h"
+#include "eint_hw.h"
+#include "eint_sw.h"
+#include "eint_drv.h"
+#include "kal_general_types.h"
+#include "kal_public_api.h"
+
+#include "kal_general_types.h"
+#include "gpio_drv.h"
+
+#include "gpio_def.h"
+
+/*******************OWNERSHIP********************/
+/**********************START******************/
+#if defined(DRV_GPIO_REG_AS_6290)
+
+#define EINTNULL_OWNERSHIP 0
+
+#define EINT_WORD_VAR_FOR_1BIT(name, port0, port1, port2, port3, port4, port5, port6, port7, port8, port9, port10, \
+ port11, port12, port13, port14, port15, port16, port17, port18, port19, port20, port21, \
+ port22, port23, port24, port25, port26, port27, port28, port29, port30, port31) \
+ ((EINT##port0##_##name) | (EINT##port1##_##name<<1) | (EINT##port2##_##name<<2) | (EINT##port3##_##name<<3) | (EINT##port4##_##name<<4) | \
+ (EINT##port5##_##name<<5) | (EINT##port6##_##name<<6) | (EINT##port7##_##name<<7) | (EINT##port8##_##name<<8) | (EINT##port9##_##name<<9) | \
+ (EINT##port10##_##name<<10) | (EINT##port11##_##name<<11) | (EINT##port12##_##name<<12) | (EINT##port13##_##name<<13) | (EINT##port14##_##name<<14) | \
+ (EINT##port15##_##name<<15) | (EINT##port16##_##name<<16) | (EINT##port17##_##name<<17) | (EINT##port18##_##name<<18) | (EINT##port19##_##name<<19) | \
+ (EINT##port20##_##name<<20) | (EINT##port21##_##name<<21) | (EINT##port22##_##name<<22) | (EINT##port23##_##name<<23) | (EINT##port24##_##name<<24) | \
+ (EINT##port25##_##name<<25) | (EINT##port26##_##name<<26) | (EINT##port27##_##name<<27) | (EINT##port28##_##name<<28) | (EINT##port29##_##name<<29) | \
+ (EINT##port30##_##name<<30) | (EINT##port31##_##name<<31))
+
+#define EINT_WORD_VAR0(name) EINT_WORD_VAR_FOR_1BIT(name, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, \
+ 14, 15, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, \
+ NULL, NULL, NULL, NULL)
+
+#define EINT_OWNERSHIP_VAR0 EINT_WORD_VAR0(OWNERSHIP)
+#endif
+/*******************OWNERSHIP********************/
+/**********************END******************/
+
+/*******************SOURCE********************/
+/**********************START******************/
+#if defined(DRV_GPIO_REG_AS_6290)
+
+#define EINT_WORD_SRC_FOR_6BIT(name, port0, port1, port2, port3) \
+ ((EINT##port0##_##name) | (EINT##port1##_##name<<8) | (EINT##port2##_##name<<16) | (EINT##port3##_##name<<24))
+
+#define EINT_WORD_SRC0(name) EINT_WORD_SRC_FOR_6BIT(name, 0, 1, 2, 3)
+#define EINT_WORD_SRC1(name) EINT_WORD_SRC_FOR_6BIT(name, 4, 5, 6, 7)
+#define EINT_WORD_SRC2(name) EINT_WORD_SRC_FOR_6BIT(name, 8, 9, 10, 11)
+#define EINT_WORD_SRC3(name) EINT_WORD_SRC_FOR_6BIT(name, 12, 13, 14, 15)
+
+
+#define EINT_SRC_VAR0 EINT_WORD_SRC0(SRC_GPIO)
+#define EINT_SRC_VAR1 EINT_WORD_SRC1(SRC_GPIO)
+#define EINT_SRC_VAR2 EINT_WORD_SRC2(SRC_GPIO)
+#define EINT_SRC_VAR3 EINT_WORD_SRC3(SRC_GPIO)
+
+#define EINT_ENABLE_DEINT (EINT0_ENABLE_DEDICATED<<0 | EINT1_ENABLE_DEDICATED<<1 | EINT2_ENABLE_DEDICATED<<2\
+ | EINT3_ENABLE_DEDICATED<<3 |EINT4_ENABLE_DEDICATED<<4 | EINT5_ENABLE_DEDICATED<<5 |EINT6_ENABLE_DEDICATED<<6\
+ | EINT7_ENABLE_DEDICATED<<7 |EINT8_ENABLE_DEDICATED<<8 | EINT9_ENABLE_DEDICATED<<9 |EINT10_ENABLE_DEDICATED<<10\
+ | EINT11_ENABLE_DEDICATED<<11 |EINT12_ENABLE_DEDICATED<<12 | EINT13_ENABLE_DEDICATED<<13 |EINT14_ENABLE_DEDICATED<<14\
+ | EINT15_ENABLE_DEDICATED<<15)
+#endif
+
+/*******************SOURCE********************/
+/**********************END******************/
+
+#if defined(DRV_GPIO_REG_AS_6290)
+//every bit indicate a EINT, for bit 0 map to EINT0
+kal_uint32 eint_is_dedicated = 0;
+kal_uint32 eint_is_dedicated_map[EINT_MAX_CHANNEL] = {0};
+#endif
+
+extern void EINT_SW_Debounce_Init(void);
+extern kal_int32 EINT_Set_Dedicated_Eint(kal_uint8 Deintno, kal_uint8 eintno);
+
+/*eint init dct setting, hw part called in bl init*/
+void EINT_Setting_Init(void)
+{
+#if defined(DRV_GPIO_REG_AS_6290)
+ //set eint ownership
+ //REG32_WRITE(GPIOMUX_EINT_OWN, EINT_OWNERSHIP_VAR0);
+ //set eint source
+ REG32_WRITE(GPIOMUX_EINT_SRC1, EINT_SRC_VAR0);
+ REG32_WRITE(GPIOMUX_EINT_SRC2, EINT_SRC_VAR1);
+ REG32_WRITE(GPIOMUX_EINT_SRC3, EINT_SRC_VAR2);
+ REG32_WRITE(GPIOMUX_EINT_SRC4, EINT_SRC_VAR3);
+#endif
+}
+
+/*eint init dct setting, sw part called in custom_drv_init*/
+void EINT_Setting_SW_Init(void)
+{
+ int eintno, deintno=0;
+
+ //set dedicated eint flag
+ eint_is_dedicated = EINT_ENABLE_DEINT;
+
+ //deint j src is eint i
+ for (eintno = 0; eintno < EINT_TOTAL_CHANNEL; eintno++)
+ {
+ if (eint_is_dedicated & (1<<eintno))
+ {
+ //disable eint
+ eint_set_irqen(eintno, EINT_DISABLE);
+
+ //set deint src and disable
+ EINT_Set_Dedicated_Eint(deintno, eintno);
+ eint_set_l1_eint_enable(deintno, EINT_DISABLE);
+
+ //map dedicated eint
+ eint_is_dedicated_map[eintno] = deintno;
+ //ASSERT(deintno <= (DEDICATED_EINT_TOTAL_CHANNEL));
+ deintno++;
+ }
+ }
+
+ EINT_SW_Debounce_Init();
+}
+#else
+#include "eint_hw.h"
+#include "eint_sw.h"
+#include "multi_icc_custom.h"
+#include "ccci_rpc_if.h"
+#include "kal_public_api.h"
+kal_uint32 eint_is_dedicated = 0;
+kal_uint32 eint_is_dedicated_map[EINT_MAX_CHANNEL] = {0};
+kal_uint32 eint_src_map[EINT_MAX_CHANNEL] ={0};
+kal_spinlockid md1_eint_lock=0;
+
+#if defined(__MD93__)
+extern void EINT_SW_Debounce_Init(void);
+#elif defined(__MD95__)
+#elif defined(__MD97__)
+#elif defined(__MD97P__)
+#else
+#error "no chip match"
+#endif
+extern kal_int32 EINT_Set_Dedicated_Eint(kal_uint8 Deintno, kal_uint8 eintno);
+
+void EINT_Setting_SW_Init(void)
+{
+ int eintno, deintno=0;
+
+ //deint j src is eint i
+ for (eintno = 0; eintno < EINT_TOTAL_CHANNEL; eintno++)
+ {
+ if (eint_is_dedicated & (1<<eintno))
+ {
+ //disable eint
+ eint_set_irqen(eintno, EINT_DISABLE);
+
+ //set deint src and disable
+ EINT_Set_Dedicated_Eint(deintno, eintno);
+ eint_set_l1_eint_enable(deintno, EINT_DISABLE);
+
+ //map dedicated eint
+ eint_is_dedicated_map[eintno] = deintno;
+ //ASSERT(deintno <= (DEDICATED_EINT_TOTAL_CHANNEL));
+ deintno++;
+ }
+ }
+#if defined(__MD93__)
+ EINT_SW_Debounce_Init();
+#elif defined(__MD95__)
+#elif defined(__MD97__)
+#elif defined(__MD97P__)
+#else
+#error "no chip match"
+#endif
+}
+extern void eint_create_spinlock(void);
+
+void EINT_Setting_Init(void)
+{
+ //hw default to srcpin 4(tie 0)
+ /*
+ REG32_WRITE(GPIOMUX_EINT_SRC1, (4<<0 | 4<<8 | 4<<16 | 4<<24));
+ */
+ //EINT_Set_Polarity(1,0);
+ //REG32_WRITE(GPIOMUX_EINT_IRQEN_CLR,0xFFFF);
+ eint_create_spinlock();
+ kal_int32 i=0;
+ REG32_WRITE(GPIOMUX_EINT_TYPE_SET, 0xFFFF);
+ REG32_WRITE(GPIOMUX_EINT_IRQSTS, REG32(GPIOMUX_EINT_IRQSTS));
+
+ //init eint_src_map as internally the src tied to 0
+ for(i=0;i<EINT_TOTAL_CHANNEL;i++)
+ eint_src_map[i]=EINT_SRCPIN_HWTIED0;
+#if defined(MT6297)||defined(CHIP10992)
+ #if defined(MT6297)
+ eint_src_map[TYPEC_OE_EINT_NUM] = TYPEC_OE_EINT_SRCPIN;
+ eint_src_map[USB_RESUME_EINT_NUM] = USB_RESUME_EINT_SRCPIN;
+ #endif
+ #if defined(CHIP10992)
+ eint_src_map[PCIE1_EINT_NUM] = PCIE1_EINT_SRCPIN;
+ eint_src_map[PCIE2_EINT_NUM] = PCIE2_EINT_SRCPIN;
+ eint_src_map[USB_RESUME_EINT_NUM] = USB_RESUME_EINT_SRCPIN;
+ #endif
+#endif
+#if defined(__SIM_HOT_SWAP_SUPPORT__)
+#if defined(MT6297)
+ eint_src_map[SIM1_SWAP_EINT_NUM] = SIM1_SWAP_EINT_SRCPIN;
+ eint_src_map[SIM2_SWAP_EINT_NUM] = SIM2_SWAP_EINT_SRCPIN;
+#else
+ kal_uint8 *query;
+ kal_int32 srcpin1=0,srcpin2 = 0,srcpin3=0,srcpin4=0,srcpin5=0,srcpin6=0;
+ kal_int32 eint_num1=0,eint_num2 = 0,eint_num3=0,eint_num4=0,eint_num5=0,eint_num6=0;
+ kal_int32 dedicatedEn1=0,dedicatedEn2 = 0,dedicatedEn3=0,dedicatedEn4=0,dedicatedEn5 = 0,dedicatedEn6 = 0;
+ kal_int32 srcpin7=0,eint_num7=0,dedicatedEn7=0;
+ kal_int32 srcpin8=0,eint_num8=0,dedicatedEn8=0;
+ kal_int32 srcpin9=0,eint_num9=0,dedicatedEn9=0;
+
+ query = (kal_uint8 *)"MD1_SIM1_HOT_PLUG_EINT";
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_SRCPIN, (void *)&srcpin1, 4)<0)
+ srcpin1=EINT_SRCPIN_HWTIED0;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_NUMBER, (void *)&eint_num1, 4)<0)
+ eint_num1=-1;
+ else
+ eint_src_map[eint_num1] = srcpin1;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_DEDICATEDEN, (void *)&dedicatedEn1, 4)<0)
+ dedicatedEn1=0;
+
+ query = (kal_uint8 *)"MD1_SIM2_HOT_PLUG_EINT";
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_SRCPIN, (void *)&srcpin2, 4)<0)
+ srcpin2=EINT_SRCPIN_HWTIED0;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_NUMBER, (void *)&eint_num2, 4)<0)
+ eint_num2=-1;
+ else
+ eint_src_map[eint_num2] = srcpin2;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_DEDICATEDEN, (void *)&dedicatedEn2, 4)<0)
+ dedicatedEn2=0;
+
+ query = (kal_uint8 *)"MD1_SIM3_HOT_PLUG_EINT";
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_SRCPIN, (void *)&srcpin3, 4)<0)
+ srcpin3=EINT_SRCPIN_HWTIED0;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_NUMBER, (void *)&eint_num3, 4)<0)
+ eint_num3=-1;
+ else
+ eint_src_map[eint_num3] = srcpin3;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_DEDICATEDEN, (void *)&dedicatedEn3, 4)<0)
+ dedicatedEn3=0;
+
+ query = (kal_uint8 *)"MD1_SIM4_HOT_PLUG_EINT";
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_SRCPIN, (void *)&srcpin4, 4)<0)
+ srcpin4=EINT_SRCPIN_HWTIED0;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_NUMBER, (void *)&eint_num4, 4)<0)
+ eint_num4=-1;
+ else
+ eint_src_map[eint_num4] = srcpin4;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_DEDICATEDEN, (void *)&dedicatedEn4, 4)<0)
+ dedicatedEn4=0;
+
+ query = (kal_uint8 *)"MD1_PMIC1_EINT";
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_SRCPIN, (void *)&srcpin5, 4)<0)
+ srcpin5=EINT_SRCPIN_HWTIED0;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_NUMBER, (void *)&eint_num5, 4)<0)
+ eint_num5=-1;
+ else
+ eint_src_map[eint_num5] = srcpin5;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_DEDICATEDEN, (void *)&dedicatedEn5, 4)<0)
+ dedicatedEn5=0;
+
+ query = (kal_uint8 *)"MD1_PMIC2_EINT";
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_SRCPIN, (void *)&srcpin6, 4)<0)
+ srcpin6=EINT_SRCPIN_HWTIED0;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_NUMBER, (void *)&eint_num6, 4)<0)
+ eint_num6=-1;
+ else
+ eint_src_map[eint_num6] = srcpin6;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_DEDICATEDEN, (void *)&dedicatedEn6, 4)<0)
+ dedicatedEn6=0;
+
+ query = (kal_uint8 *)"MD1_RESERVED1_EINT";
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_SRCPIN, (void *)&srcpin7, 4)<0)
+ srcpin7=EINT_SRCPIN_HWTIED0;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_NUMBER, (void *)&eint_num7, 4)<0)
+ eint_num7=-1;
+ else
+ eint_src_map[eint_num7] = srcpin7;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_DEDICATEDEN, (void *)&dedicatedEn7, 4)<0)
+ dedicatedEn7=0;
+
+ query = (kal_uint8 *)"MD1_RESERVED2_EINT";
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_SRCPIN, (void *)&srcpin8, 4)<0)
+ srcpin8=EINT_SRCPIN_HWTIED0;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_NUMBER, (void *)&eint_num8, 4)<0)
+ eint_num8=-1;
+ else
+ eint_src_map[eint_num8] = srcpin8;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_DEDICATEDEN, (void *)&dedicatedEn8, 4)<0)
+ dedicatedEn8=0;
+
+ query = (kal_uint8 *)"MD1_RESERVED3_EINT";
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_SRCPIN, (void *)&srcpin9, 4)<0)
+ srcpin9=EINT_SRCPIN_HWTIED0;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_NUMBER, (void *)&eint_num9, 4)<0)
+ eint_num9=-1;
+ else
+ eint_src_map[eint_num9] = srcpin9;
+ if(IPC_RPC_EINT_GetAttribute(query, 23, SIM_HOT_PLUG_EINT_DEDICATEDEN, (void *)&dedicatedEn9, 4)<0)
+ dedicatedEn9=0;
+ eint_is_dedicated = (dedicatedEn1<<0 | dedicatedEn2<<1 | dedicatedEn3<<3 | dedicatedEn4<<4 | dedicatedEn5<<5 | dedicatedEn6<<6 \
+ | dedicatedEn7<<7 | dedicatedEn8<<8 | dedicatedEn9<<9);
+#endif
+#endif
+#if defined(MT6297)
+ eint_src_map[TYPEC_OE_EINT_NUM] = TYPEC_OE_EINT_SRCPIN;
+ eint_src_map[USB_RESUME_EINT_NUM] = USB_RESUME_EINT_SRCPIN;
+#endif
+ EINT_Setting_SW_Init();
+
+ md1_eint_lock = kal_create_spinlock("eint");
+
+}
+
+#endif