[Feature]Upload Modem source code
Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/driver/devdrv/eint/inc/Eint_internal.h b/mcu/driver/devdrv/eint/inc/Eint_internal.h
new file mode 100644
index 0000000..cb7ebff
--- /dev/null
+++ b/mcu/driver/devdrv/eint/inc/Eint_internal.h
@@ -0,0 +1,204 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2010
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * Eint_internal.h
+ *
+ * Project:
+ * --------
+ * Maui_Software
+ *
+ * Description:
+ * ------------
+ * Definition for EINT internal usage
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+#ifndef __EINT_INTERNAL_H__
+#define __EINT_INTERNAL_H__
+
+#include "intrCtrl.h"
+#include "drv_features_gpt.h" /* include this header for "__ENABLE_GPT_PROTECTION__" option */
+
+/*************************************************************************
+ * Define function prototpye
+ *************************************************************************/
+
+/*************************************************************************
+ * Internal definition
+ *************************************************************************/
+
+#if defined(__ENABLE_GPT_PROTECTION__)
+ #define __EINT_SW_DEBOUNCE_V2__
+#else
+ #undef __EINT_SW_DEBOUNCE_V2__
+#endif
+
+#ifndef EINT_NO_HARDWARE_DEBOUNCE
+ #define EINT_NO_HARDWARE_DEBOUNCE 0x00000000
+#endif
+
+#define EINT_CheckHWDebounce(_no) ((1<<_no) & EINT_HARDWARE_DEBOUNCE)
+#define EINT_CheckNotHWDebounce(_no) ((1<<_no) & EINT_NO_HARDWARE_DEBOUNCE)
+
+// MTK02782 add 20110316 {
+#define EINT_CON_CNT_MASK 0x07ff
+#define EINT_CON_CNT_OFFSET 0
+
+#define EINT_CON_PRESCALER_MASK 0x7000
+
+#define EINT_CON_PRESCALER_32KHZ 0x00000000
+#define EINT_CON_PRESCALER_16KHZ 0x00000001
+#define EINT_CON_PRESCALER_8KHZ 0x00000002
+#define EINT_CON_PRESCALER_4KHZ 0x00000003
+#define EINT_CON_PRESCALER_2KHZ 0x00000004
+#define EINT_CON_PRESCALER_1KHZ 0x00000005
+#define EINT_CON_PRESCALER_512HZ 0x00000006
+#define EINT_CON_PRESCALER_256HZ 0x00000007
+#define EINT_CON_PRESCALER_OFFSET 12
+// } MTK02782 add 20110316
+
+/* Array size for debug log of sources that trigger EINTs */
+#define EINT_TRIGGER_SRC_LOG_MAX 16
+
+/* private API */
+extern void EINT_AckInt(kal_uint8 eintno);
+
+/*************************************************************************
+ * Define internal MARCO for EINT_Internal_LISR_Handler()
+ *************************************************************************/
+#if defined(__AST_EINT__) && defined(__AST_TL1_TDD__)
+
+
+
+#endif /* __AST_EINT__ && __AST_TL1_TDD__ */
+
+#endif /* __EINT_INTERNAL_H__ */
+
diff --git a/mcu/driver/devdrv/eint/inc/eint_hw.h b/mcu/driver/devdrv/eint/inc/eint_hw.h
new file mode 100644
index 0000000..47381d1
--- /dev/null
+++ b/mcu/driver/devdrv/eint/inc/eint_hw.h
@@ -0,0 +1,54 @@
+#ifndef __EINT_HW_H__
+#define __EINT_HW_H__
+#include "drv_comm.h"
+
+#define GPIOMUX_BASE_ADDR BASE_MADDR_MDEINT
+#define EINT_ADDR_OFFSET 0x1000
+
+#define GPIOMUX_EINT_SRC1 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x0))
+//#define GPIOMUX_EINT_SRC2 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x4))
+//#define GPIOMUX_EINT_SRC3 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x8))
+//#define GPIOMUX_EINT_SRC4 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0xC))
+#define GPIOMUX_EINT_DB_EN ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x100))
+#define GPIOMUX_EINT_POL ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x180))
+#define GPIOMUX_EINT_TYPE ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x200))
+#define GPIOMUX_EINT_IRQEN ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x280))
+#define GPIOMUX_EINT_IRQSTS ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x300))
+#define GPIOMUX_EINT_DBNCSTS ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x380))
+#define GPIOMUX_EINT_DUR0 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x400))
+#define GPIOMUX_EINT_DUR1 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x404))
+#define GPIOMUX_EINT_DUR2 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x408))
+#define GPIOMUX_EINT_DUR3 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x40C))
+//#define GPIOMUX_EINT_DUR4 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x410))
+//#define GPIOMUX_EINT_DUR5 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x414))
+//#define GPIOMUX_EINT_DUR6 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x418))
+//#define GPIOMUX_EINT_DUR7 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x41C))
+//#define GPIOMUX_EINT_DUR8 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x420))
+//#define GPIOMUX_EINT_DUR9 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x424))
+//#define GPIOMUX_EINT_DUR10 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x428))
+//#define GPIOMUX_EINT_DUR11 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x42C))
+//#define GPIOMUX_EINT_DUR12 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x430))
+//#define GPIOMUX_EINT_DUR13 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x434))
+//#define GPIOMUX_EINT_DUR14 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x438))
+//#define GPIOMUX_EINT_DUR15 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x43C))
+#define GPIOMUX_EINT_DIRQ0 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x800))
+#define GPIOMUX_EINT_DIRQ1 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x804))
+#define GPIOMUX_EINT_DIRQ2 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x808))
+#define GPIOMUX_EINT_DIRQ3 ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x80C))
+
+/* GPIO_MUX part Set and Clear Registers*/
+/* ================================================================= */
+#define GPIOMUX_EINT_DB_EN_SET ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x100 + 0x4))
+#define GPIOMUX_EINT_POL_SET ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x180 + 0x4))
+#define GPIOMUX_EINT_TYPE_SET ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x200 + 0x4))
+#define GPIOMUX_EINT_IRQEN_SET ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x280 + 0x4))
+
+
+#define GPIOMUX_EINT_DB_EN_CLR ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x100 + 0x8))
+#define GPIOMUX_EINT_POL_CLR ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x180 + 0x8))
+#define GPIOMUX_EINT_TYPE_CLR ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x200 + 0x8))
+#define GPIOMUX_EINT_IRQEN_CLR ((volatile unsigned int*)(GPIOMUX_BASE_ADDR + EINT_ADDR_OFFSET +0x280 + 0x8))
+
+#define EINT_L2_STA() REG32(GPIOMUX_EINT_IRQSTS)
+#define EINT_L2_ACK(irq) REG32_WRITE(GPIOMUX_EINT_IRQSTS,(1<<irq))
+#endif