[Feature]Upload Modem source code
Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/driver/devdrv/gpt/src/dcl_gpt.c b/mcu/driver/devdrv/gpt/src/dcl_gpt.c
new file mode 100644
index 0000000..faf6e13
--- /dev/null
+++ b/mcu/driver/devdrv/gpt/src/dcl_gpt.c
@@ -0,0 +1,2341 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * dcl_gpt.c
+ *
+ * Project:
+ * --------
+ * TATAKA
+ *
+ * Description:
+ * ------------
+ * This Module defines DCL (Driver Common Layer) of the GPT driver.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#include "drv_features_gpt.h"
+#include "drv_comm.h"
+#include "drv_gpt.h"
+#include "intrCtrl.h"
+#include "us_timer.h"
+
+
+#include "dcl_gpt.h"
+#include "dcl_gpt_hw.h"
+#include "dcl.h"
+#include "devdrv_ls.h"
+#include "kal_general_types.h"
+#include "kal_public_api.h"
+#include "drvpdn.h"
+#include "init_comm.h"
+#include "kal_hrt_api.h"
+
+#if defined(__LP_SCHEDULE_HMU_RESCHEDULE__)
+#include "tg_hisr.h"
+#endif /* __LP_SCHEDULE_HMU_RESCHEDULE__ */
+
+
+//#define DCL_GPT_INTERFACE
+//#ifdef DCL_GPT_INTERFACE
+
+#if !defined(DRV_GPT_OFF)
+
+/*****************************************************************************
+ * Symbol/Type Definition *
+ *****************************************************************************/
+//DCL_GPT_CB this software gpt provide register callback function.
+#if !defined(__MD93__)
+#define DCL_GPT_9_MAGIC_NUM (0x01000000)
+#endif
+#define DCL_GPT_CB_MAGIC_NUM (0x02000000)
+
+#if defined(__MD93__) || defined(__MD95__)
+#define DCL_GPT_C2KOS_MAGIC_NUM (0x04000000)
+#else
+#define DCL_GPT_6_MAGIC_NUM (0x04000000)
+#endif
+
+#define DCL_GPT_C2KAR_MAGIC_NUM (0x08000000)
+
+#define DCL_GPT_CBUS_MAGIC_NUM (0x10000000)
+
+#define DCL_GPT_3_MAGIC_NUM (0x20000000)
+
+#define DCL_GPT_DSP_MAGIC_NUM (0x40000000)
+
+#define DCL_GPT_LOGGING_MAGIC_NUM (0x80000000)
+
+#define DCL_GPT_CB_TICK2US (10000U)
+#define DCL_GPT_CBUS_TICK2US (1U)
+#define DCL_GPT_LOGGING_TICK2US (1000U)
+#define DCL_GPT_C2K_TICK2US (1000U)
+
+#define MDGPTM_PDN_SET() PDN_SET(PDN_GPT);
+#define MDGPTM_PDN_CLR() PDN_CLR(PDN_GPT);
+
+/*****************************************************************************
+ * Macro Function Definition *
+ *****************************************************************************/
+
+#define DCL_GPT_CB_IS_HANDLE_MAGIC(handl_) ((handl_)& DCL_GPT_CB_MAGIC_NUM)
+#define DCL_GPT_CB_GET_DEV(handle_) ((handle_) & (~DCL_GPT_CB_MAGIC_NUM))
+#define DCL_GPT_CBUS_IS_HANDLE_MAGIC(handl_) ((handl_)& DCL_GPT_CBUS_MAGIC_NUM)
+#define DCL_GPT_3_IS_HANDLE_MAGIC(handl_) ((handl_)& DCL_GPT_3_MAGIC_NUM)
+#define DCL_GPT_3_GET_DEV(handle_) ((handle_) & (~DCL_GPT_3_MAGIC_NUM))
+#if !defined(__MD93__)
+#define DCL_GPT_9_IS_HANDLE_MAGIC(handl_) ((handl_)& DCL_GPT_9_MAGIC_NUM)
+#endif
+#if defined(__MD93__) || defined(__MD95__)
+#define DCL_GPT_C2KOS_IS_HANDLE_MAGIC(handl_) ((handl_)& DCL_GPT_C2KOS_MAGIC_NUM)
+#else
+#define DCL_GPT_6_IS_HANDLE_MAGIC(handl_) ((handl_)& DCL_GPT_6_MAGIC_NUM)
+#endif
+#define DCL_GPT_LOGGING_IS_HANDLE_MAGIC(handl_) ((handl_)& DCL_GPT_LOGGING_MAGIC_NUM)
+#define DCL_GPT_DSP_IS_HANDLE_MAGIC(handl_) ((handl_)& DCL_GPT_DSP_MAGIC_NUM)
+#define DCL_GPT_C2KAR_IS_HANDLE_MAGIC(handl_) ((handl_)& DCL_GPT_C2KAR_MAGIC_NUM)
+
+
+/*****************************************************************************
+ * Structure/Type Definition *
+ *****************************************************************************/
+typedef struct gptimer_instance{
+ kal_uint32 ticks;
+ void (*gptimer_func)(void *parameter);
+ void *param;
+ struct gptimer_instance *next;
+}gpt_inst;
+
+/*****************************************************************************
+ * Global/External Variable *
+ *****************************************************************************/
+kal_uint32 gpt_clock_status = 0;
+
+/* For mini-second Callback Function */
+static kal_uint32 gptCB_status; /* 1,activated ,0:de-activated */
+static kal_uint32 gptCB_ticks; /* CB gpt current ticks number */
+static kal_uint32 gptCB_users; /* Indicate the current registered GPT users */
+static kal_uint8 gptCB_used[MAX_GPT_ITEMS]; /* 0: Not registered by user, 1: Registerd by used */
+static gptimer_item gptCB_items[MAX_GPT_ITEMS]; /* gpt callback function instance */
+
+
+/* For micro-second Callback Function */
+static kal_bool gptCBUS_used = KAL_FALSE;
+static kal_bool gptCBUS_running = KAL_FALSE;
+#if !defined(__LP_SCHEDULE_HMU_RESCHEDULE__)
+static gptimer_item gptCBUS_instance;
+static kal_uint32 gptCBUS_usr_trig = 0;
+#endif /* __LP_SCHEDULE_HMU_RESCHEDULE__ */
+static kal_uint32 gptCBUS_lisr_trig = 0;
+
+#if defined(__LP_SCHEDULE_HMU_RESCHEDULE__)
+static DCL_UINT32 gpt_cbus_on = 0;
+#endif
+
+#if defined(__MD93__) || defined(__MD95__)
+/* For micro-second Callback Function */
+static kal_bool gptC2KOS_used = KAL_FALSE;
+static kal_bool gptC2KOS_running = KAL_FALSE;
+static gptimer_item gptC2KOS_instance;
+#endif
+
+/* For mini-second Callback Function */
+static kal_bool gptC2KAR_used = KAL_FALSE;
+static kal_bool gptC2KAR_running = KAL_FALSE;
+static gptimer_item gptC2KAR_instance;
+
+/* For micro-second Callback Function */
+static kal_bool gptLogging_used = KAL_FALSE;
+static kal_bool gptLogging_running = KAL_FALSE;
+static gptimer_item gptLogging_instance;
+
+#if defined(__MD93__)
+/* For micro-second Callback Function */
+static kal_bool gptDSP_used = KAL_FALSE;
+static kal_bool gptDSP_running = KAL_FALSE;
+static gptimer_multiple gptDSP_instance[DSP_USER_NUM];
+#else
+static kal_bool gptDSCC0_used = KAL_FALSE;
+static kal_bool gptDSCC0_running = KAL_FALSE;
+static gptimer_item gptDSCC0_instance;
+
+static kal_bool gptDSCC1_used = KAL_FALSE;
+static kal_bool gptDSCC1_running = KAL_FALSE;
+static gptimer_item gptDSCC1_instance;
+
+#endif
+
+#if defined(__MD93__) || defined(__MD95__)
+/* For micro-second Debug Callback Function */
+static kal_uint32 gpt_DEBUG_users; /* Indicate the current registered GPT users */
+static gpt_inst gpt_DEBUG_head; /* BSS section, default field value == 0 */
+static kal_uint8 gpt_DEBUG_used[MAX_GPT_ITEMS]; /* 0: Not registered by user, 1: Registerd by used */
+static gpt_inst gpt_DEBUG_items[MAX_GPT_ITEMS]; /* gpt callback function instance */
+#endif
+
+#if defined(__MD97__)
+static kal_bool gptDPCOPRO_used = KAL_FALSE;
+static kal_bool gptDPCOPRO_running = KAL_FALSE;
+static gptimer_item gptDPCOPRO_instance;
+#endif
+
+static kal_spinlockid gpt_10ms_spinlock;
+static kal_spinlockid gpt_us_spinlock;
+
+#if defined(__MD93__) || defined(__MD95__)
+static kal_spinlockid gpt_3_spinlock;
+static kal_spinlockid gpt_6_spinlock;
+#endif
+static kal_spinlockid gpt_logging_spinlock;
+
+#if defined(__FPGA__)
+#define gpt_get_current_time() (DRV_Reg32((kal_uint32) USCNTI_VAL))
+#else
+#define gpt_get_current_time() ust_get_current_time()
+#endif
+
+#define UT_GPT_GET_32BIT_COUNTER_DURATION(start, end) \
+ (((end) >= (start))? ((end) - (start)): ((0xFFFFFFFF - (start) + (end) + 1)))
+
+
+/*****************************************************************************
+ * function declaration *
+ *****************************************************************************/
+void GPTCB_10MS_HISR(void);
+#if !defined(__LP_SCHEDULE_HMU_RESCHEDULE__)
+void GPTCB_US_HISR(void);
+#endif
+void GPTCB_LOGGING_HISR(void);
+
+#if defined(__MD93__) || defined(__MD95__)
+void GPTCB_C2KOS_HISR(void);
+void GPTCB_DEBUG_HISR(void);
+static void GPT_DEBUG_Insert(kal_uint32 indx, kal_uint32 tick,void (*gptimer_func)(void *),void *parameter);
+static void GPT_DEBUG_Stop(kal_uint32 indx);
+#endif
+
+static kal_bool GPTCB_StartItem(DCL_HANDLE module,kal_uint16 tick,void (*gptimer_func)(void *),void *parameter);
+static void GPTCB_StopItem(DCL_HANDLE module);
+
+
+static void gpt_clk_operation(kal_bool op, kal_uint32 num);
+void gpt_clk_operation_wo_itc(kal_bool op, kal_uint32 num);
+
+
+void GPT_ERROR_CB(void *p)
+{
+ kal_uint32 CANNOT_FIND_GPT_CB_HANDLER = 0;
+ ASSERT(CANNOT_FIND_GPT_CB_HANDLER);
+}
+
+/*-----------------------------------------------------------------------*
+*
+* GPT 10ms LISR function,
+* pass to gpt_hw layer as a function pointer
+*
+*------------------------------------------------------------------------*/
+void GPTCB_Lisr(kal_uint32 vector)
+{
+ /*ASSERT( (MDGPT_INTR_ID(DRV_GPT_CALLBACK_TIMER) == vector) || \
+ (MDGPT_INTR_ID(DRV_GPT_CBUS_TIMER) == vector) );*/
+#ifndef __MD93__
+ DRV_WriteReg32(GPT_INT_STATUS_REG(0),GPT_INT_STATUS_MASK_BIT(DRV_GPT_CALLBACK_TIMER));
+#endif
+
+ kal_activate_hisr_index(GPT1_HISR);
+}
+
+/*-----------------------------------------------------------------------*
+*
+* GPT 1us LISR function,
+* pass to gpt_hw layer as a function pointer
+*
+*------------------------------------------------------------------------*/
+DEVDRV_LS_INTSRAM_ROCODE void GPTCB_US_Lisr(kal_uint32 vector)
+{
+ /*ASSERT( (MDGPT_INTR_ID(DRV_GPT_CALLBACK_TIMER) == vector) || \
+ (MDGPT_INTR_ID(DRV_GPT_CBUS_TIMER) == vector) );*/
+#if !defined(__MD93__)
+ DRV_WriteReg32(GPT_INT_STATUS_REG(0),GPT_INT_STATUS_MASK_BIT(DRV_GPT_CBUS_TIMER));
+#endif
+
+
+ gptCBUS_lisr_trig++;
+#if defined(__LP_SCHEDULE_HMU_RESCHEDULE__)
+ tg_group2_trigger(TG_TRIGGER_GPT);
+#else /* __LP_SCHEDULE_HMU_RESCHEDULE__ */
+ kal_activate_hisr_index(GPT2_HISR);
+#endif /* __LP_SCHEDULE_HMU_RESCHEDULE__ */
+}
+
+#if defined(__MD93__) || defined(__MD95__)
+/*-----------------------------------------------------------------------*
+*
+* C2K GPT 1us LISR function,
+* pass to gpt_hw layer as a function pointer
+*
+*------------------------------------------------------------------------*/
+DEVDRV_LS_INTSRAM_ROCODE void GPTCB_C2KOS_Lisr(kal_uint32 vector)
+{
+#if !defined(__MD93__)
+ DRV_WriteReg32(GPT_INT_STATUS_REG(0),GPT_INT_STATUS_MASK_BIT(DRV_GPT_6_TIMER));
+#endif
+
+ kal_hrt_activate_hisr_index(GPT6_HISR);
+
+ gptC2KOS_instance.gptimer_func(gptC2KOS_instance.parameter);
+
+}
+#endif
+
+/*-----------------------------------------------------------------------*
+*
+* C2K GPT 1ms LISR function,
+* pass to gpt_hw layer as a function pointer
+*
+*------------------------------------------------------------------------*/
+DEVDRV_LS_INTSRAM_ROCODE void GPTCB_C2KAR_Lisr(kal_uint32 vector)
+{
+
+#if !defined(__MD93__)
+ DRV_WriteReg32(GPT_INT_STATUS_REG(0),GPT_INT_STATUS_MASK_BIT(DRV_GPT_C2KAR_TIMER));
+#endif
+ gptC2KAR_instance.gptimer_func(gptC2KAR_instance.parameter);
+}
+
+#if defined(__MD93__)
+
+/*-----------------------------------------------------------------------*
+*
+* GPT DSP 1us LISR function,
+* pass to gpt_hw layer as a function pointer
+*
+*------------------------------------------------------------------------*/
+DEVDRV_LS_INTSRAM_ROCODE void GPTCB_DSP_Lisr(kal_uint32 vector)
+{
+ kal_uint32 items = 0;
+#if !defined(__MD93__)
+ DRV_WriteReg32(GPT_INT_STATUS_REG(0),GPT_INT_STATUS_MASK_BIT(DRV_GPT_DSP_TIMER));
+#endif
+
+/*Todo, add HW ITC to sync*/
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DRIVER, KAL_INFINITE_WAIT);
+
+ ASSERT(KAL_TRUE == gptDSP_running);
+
+/*Todo, add HW ITC to sync clock*/
+ gpt_clk_operation_wo_itc(KAL_TRUE, DRV_GPT_DSP_TIMER);
+
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DRIVER);
+
+ for(items = 0; items < DSP_USER_NUM; items++)
+ {
+ if(KAL_TRUE == gptDSP_instance[items].execute)
+ {
+ gptDSP_instance[items].gptimer_func(gptDSP_instance[items].parameter);
+
+ gptDSP_instance[items].execute = KAL_FALSE;
+ }
+ }
+
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DRIVER, KAL_INFINITE_WAIT);
+ gptDSP_running = KAL_FALSE;
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DRIVER);
+/*Todo, add HW ITC to sync*/
+}
+#endif
+
+/*-----------------------------------------------------------------------*
+*
+* GPT 1ms LISR function,
+* pass to gpt_hw layer as a function pointer
+*
+*------------------------------------------------------------------------*/
+DEVDRV_LS_INTSRAM_ROCODE void GPTCB_LOGGING_Lisr(kal_uint32 vector)
+{
+ /*ASSERT( (MDGPT_INTR_ID(DRV_GPT_CALLBACK_TIMER) == vector) || \
+ (MDGPT_INTR_ID(DRV_GPT_CBUS_TIMER) == vector) );*/
+#if !defined(__MD93__)
+ DRV_WriteReg32(GPT_INT_STATUS_REG(0),GPT_INT_STATUS_MASK_BIT(DRV_GPT_LOGGING_TIMER));
+#endif
+
+ kal_activate_hisr_index(GPT5_HISR);
+}
+
+/*-----------------------------------------------------------------------*
+*
+* GPT 1us LISR function,
+* pass to gpt_hw layer as a function pointer
+*
+*------------------------------------------------------------------------*/
+#if defined(__MD93__) || defined(__MD95__)
+void GPT_Debug_Lisr(kal_uint32 vector)
+{
+ /*ASSERT( (MDGPT_INTR_ID(DRV_GPT_CALLBACK_TIMER) == vector) || \
+ (MDGPT_INTR_ID(DRV_GPT_CBUS_TIMER) == vector) );*/
+ kal_activate_hisr_index(GPT_DEBUG_HISR);
+}
+
+#endif
+
+#if !defined(__MD93__)
+
+void GPT_DSCC0_Lisr(kal_uint32 vector)
+{
+ DRV_WriteReg32(GPT_INT_STATUS_REG(0),GPT_INT_STATUS_MASK_BIT(DRV_GPT_DSP_TIMER));
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DSCC1, KAL_INFINITE_WAIT);
+ if(KAL_TRUE == gptDSCC0_running)
+ {
+ gptDSCC0_running = KAL_FALSE;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_DSP_TIMER);
+ }
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DSCC1);
+
+ gptDSCC0_instance.gptimer_func(gptDSCC0_instance.parameter);
+
+}
+
+void GPT_DSCC1_Lisr(kal_uint32 vector)
+{
+ DRV_WriteReg32(GPT_INT_STATUS_REG(0),GPT_INT_STATUS_MASK_BIT(DRV_GPT_9_TIMER));
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DSCC2, KAL_INFINITE_WAIT);
+ if(KAL_TRUE == gptDSCC1_running)
+ {
+ gptDSCC1_running = KAL_FALSE;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_9_TIMER);
+ }
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DSCC2);
+ gptDSCC1_instance.gptimer_func(gptDSCC1_instance.parameter);
+
+}
+
+#endif
+
+#if defined(__MD97__)
+void GPT_DPCOPRO_Lisr(kal_uint32 vector)
+{
+ DRV_WriteReg32(GPT_INT_STATUS_REG(0),GPT_INT_STATUS_MASK_BIT(DRV_GPT_6_TIMER));
+ if(DRV_Reg32(MDGPT_CTRL_REG(DRV_GPT_6_TIMER)) & MDGPT_CTRL_MODE_ENABLE) //[MOLY00455727]
+ gptDPCOPRO_instance.gptimer_func(gptDPCOPRO_instance.parameter);
+}
+#endif
+
+
+/*-----------------------------------------------------------------------
+
+* FUNCTION
+* DclSGPT_Initialize
+*
+* DESCRIPTION
+* This function is to initialize SW GPT module.
+*
+* PARAMETERS
+* DCL_STATUS_OK
+*
+* RETURNS
+* none
+*
+*------------------------------------------------------------------------*/
+DCL_STATUS DclSGPT_Initialize(void)
+{
+//#ifndef GPT_LP_TEST
+ kal_uint8 index;
+
+ /*Create spinlock for every timer*/
+ gpt_10ms_spinlock = kal_create_spinlock("GPT 10ms Timer");
+ gpt_us_spinlock = kal_create_spinlock("GPT 1ms HMU Timer");
+ gpt_logging_spinlock = kal_create_spinlock("GPT 1ms Logging Timer");
+ #if defined(__MD93__) || defined(__MD95__)
+ gpt_3_spinlock = kal_create_spinlock("GPT3 Timer");
+ gpt_6_spinlock = kal_create_spinlock("GPT6 Timer");
+ #endif
+
+ PDN_CLR(PDN_MDGPTM_26M);
+ MDGPTM_PDN_CLR();
+
+ /* GPT hardware reset */
+ drv_gpt_reset();
+
+ /* set gpt CB timer(GPT1) */
+ drv_gpt_set_timer(DRV_GPT_CALLBACK_TIMER, DCL_GPT_CB_TICK2US, MDGPT_CTRL_MODE_REPEAT);
+
+#if defined(__FPGA__)
+ if(0x20160617 == drv_gpt_get_version())//Check GPT version is 0x20160617
+ {
+ drv_gpt_set_timer(DRV_GPT_CALLBACK_TIMER, DCL_GPT_CB_TICK2US/10, MDGPT_CTRL_MODE_REPEAT);
+ }
+#endif
+
+ /* set gpt CBUS timer (GPT2)*/
+ drv_gpt_set_timer(DRV_GPT_CBUS_TIMER, DCL_GPT_CBUS_TICK2US, MDGPT_CTRL_MODE_REPEAT);
+ #if defined(__MD93__) || defined(__MD95__)
+ /* set gpt C2KOS timer */
+ drv_gpt_set_timer(DRV_GPT_6_TIMER, DCL_GPT_C2K_TICK2US, MDGPT_CTRL_MODE_ONESHOT);
+ #else
+ drv_gpt_set_timer(DRV_GPT_6_TIMER, DCL_GPT_CBUS_TICK2US, MDGPT_CTRL_MODE_REPEAT);
+ #endif
+ /* set gpt C2KAR timer (GPT7)*/
+ drv_gpt_set_timer(DRV_GPT_C2KAR_TIMER, DCL_GPT_C2K_TICK2US, MDGPT_CTRL_MODE_REPEAT);
+
+ /* set gpt CBMS timer (GPT5)*/
+ drv_gpt_set_timer(DRV_GPT_LOGGING_TIMER, DCL_GPT_LOGGING_TICK2US, MDGPT_CTRL_MODE_REPEAT);
+
+ /* set gpt Debug timer, tick unit = us */
+ drv_gpt_set_timer(DRV_GPT_3_TIMER, DCL_GPT_CBUS_TICK2US, MDGPT_CTRL_MODE_ONESHOT);
+
+ /* set OS timer (GPT4)*/
+ drv_gpt_set_timer(DRV_GPT_SYSTEM_TIMER, KAL_MICROSECS_PER_TICK, MDGPT_CTRL_MODE_REPEAT);
+ #if defined(__MD93__)
+ /* set gpt DSP timer (GPT8)*/
+ drv_gpt_set_timer(DRV_GPT_DSP_TIMER, DCL_GPT_CBUS_TICK2US, MDGPT_CTRL_MODE_ONESHOT);
+ #else
+ drv_gpt_set_timer(DRV_GPT_DSP_TIMER, DCL_GPT_CBUS_TICK2US, MDGPT_CTRL_MODE_REPEAT);
+ drv_gpt_set_timer(DRV_GPT_9_TIMER, DCL_GPT_CBUS_TICK2US, MDGPT_CTRL_MODE_ONESHOT);
+ #endif
+
+ /* gptCB variables are initialized in BSS reset procedure */
+
+ for (index = 0; index < MAX_GPT_ITEMS; index++)
+ {
+ gptCB_items[index].gptimer_func = GPT_ERROR_CB;
+#ifdef __MD93__
+ gpt_DEBUG_items[index].gptimer_func = GPT_ERROR_CB;
+#endif
+ }
+
+ IRQUnmask(MDGPT_INTR_ID(DRV_GPT_CALLBACK_TIMER));
+ IRQUnmask(MDGPT_INTR_ID(DRV_GPT_CBUS_TIMER));
+ IRQUnmask(MDGPT_INTR_ID(DRV_GPT_LOGGING_TIMER));
+ IRQUnmask(MDGPT_INTR_ID(DRV_GPT_3_TIMER));
+#if !defined(__MD93__)
+ IRQUnmask(MDGPT_INTR_ID(DRV_GPT_9_TIMER));
+#endif
+ IRQUnmask(MDGPT_INTR_ID(DRV_GPT_6_TIMER));
+ IRQUnmask(MDGPT_INTR_ID(DRV_GPT_C2KAR_TIMER));
+ IRQUnmask(MDGPT_INTR_ID(DRV_GPT_SYSTEM_TIMER));
+ IRQUnmask(MDGPT_INTR_ID(DRV_GPT_DSP_TIMER));
+
+ PDN_SET(PDN_MDGPTM_26M);
+ MDGPTM_PDN_SET();
+//#endif
+ return STATUS_OK;
+}
+
+/*-----------------------------------------------------------------------
+* FUNCTION
+* DclSGPT_Open
+*
+* DESCRIPTION
+* This function is to open the SW GPT module and get a handle. Note that
+* multiple opens are allowed.
+*
+* PARAMETERS
+* eDev - only valid for DCL_GPT1
+* flags - no sepcial flags is needed. Please use FLAGS_NONE
+*
+* RETURNS
+* DCL_HANDLE_INVALID - Open failed.
+* other value - a valid handle
+*
+*------------------------------------------------------------------------*/
+DCL_HANDLE DclSGPT_Open(DCL_DEV eDev, DCL_FLAGS flags)
+{
+ kal_int32 i;
+ if (DCL_GPT_CB==eDev)
+ {
+ kal_take_spinlock(gpt_10ms_spinlock, KAL_INFINITE_WAIT);
+ for (i=0; i < MAX_GPT_ITEMS; i++)
+ {
+ if (gptCB_used[i] == 0)
+ {
+ gptCB_used[i] = 1;
+ gptCB_users++;
+
+ kal_give_spinlock(gpt_10ms_spinlock);
+
+ return DCL_GPT_CB_MAGIC_NUM|i;
+ }
+ }
+ kal_give_spinlock(gpt_10ms_spinlock);
+ // The case that we do NOT return in the loop:
+ // Indicate there is NO GPT handle!!!!!
+ ASSERT(i < MAX_GPT_ITEMS);
+ // return invalid handle
+ return DCL_HANDLE_OCCUPIED;
+ }
+ #if defined(__MD93__)
+ else if (DCL_GPT_DSP==eDev)
+ {
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DRIVER, KAL_INFINITE_WAIT);
+
+ ASSERT(KAL_FALSE == gptDSP_used);
+ gptDSP_used = KAL_TRUE;
+
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DRIVER);
+
+ return DCL_GPT_DSP_MAGIC_NUM;
+
+ }
+ #endif
+#if defined(__MD93__) || defined(__MD95__)
+ else if (DCL_GPT_C2K_OS==eDev)
+ {
+ kal_take_spinlock(gpt_6_spinlock, KAL_INFINITE_WAIT);
+ if( KAL_FALSE == gptC2KOS_used )
+ {
+ gptC2KOS_used = KAL_TRUE;
+
+ kal_give_spinlock(gpt_6_spinlock);
+
+ return DCL_GPT_C2KOS_MAGIC_NUM;
+ }
+ kal_give_spinlock(gpt_6_spinlock);
+
+ return DCL_HANDLE_OCCUPIED;
+ }
+#endif
+#if defined(__MD97__)
+ else if (DCL_GPT_DPCOPRO==eDev)
+ {
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DPCOPRO, KAL_INFINITE_WAIT);
+ if( KAL_FALSE == gptDPCOPRO_used )
+ {
+ gptDPCOPRO_used = KAL_TRUE;
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DPCOPRO);
+ return DCL_GPT_6_MAGIC_NUM;
+ }
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DPCOPRO);
+ return DCL_HANDLE_OCCUPIED;
+ }
+#endif
+ else if (DCL_GPT_C2K_AR==eDev)
+ {
+ if( KAL_FALSE == gptC2KAR_used )
+ {
+ gptC2KAR_used = KAL_TRUE;
+
+ return DCL_GPT_C2KAR_MAGIC_NUM;
+ }
+ return DCL_HANDLE_OCCUPIED;
+ }
+ else if (DCL_GPT_CB_MS==eDev)
+ {
+ kal_take_spinlock(gpt_us_spinlock, KAL_INFINITE_WAIT);
+ if( KAL_FALSE == gptCBUS_used )
+ {
+ gptCBUS_used = KAL_TRUE;
+
+ kal_give_spinlock(gpt_us_spinlock);
+
+ return DCL_GPT_CBUS_MAGIC_NUM;
+ }
+ kal_give_spinlock(gpt_us_spinlock);
+
+ return DCL_HANDLE_OCCUPIED;
+ }
+
+ else if (DCL_GPT_CB_LOGGING==eDev)
+ {
+ kal_take_spinlock(gpt_logging_spinlock, KAL_INFINITE_WAIT);
+ if( KAL_FALSE == gptLogging_used )
+ {
+ gptLogging_used = KAL_TRUE;
+ kal_give_spinlock(gpt_logging_spinlock);
+ return DCL_GPT_LOGGING_MAGIC_NUM;
+ }
+ kal_give_spinlock(gpt_logging_spinlock);
+
+ return DCL_HANDLE_OCCUPIED;
+ }
+#if defined(__MD93__) || defined(__MD95__)
+ else if (DCL_GPT_DEBUG==eDev)
+ {
+ kal_take_spinlock(gpt_3_spinlock, KAL_INFINITE_WAIT);
+ for (i=0; i < MAX_GPT_ITEMS; i++)
+ {
+ if (gpt_DEBUG_used[i] == 0)
+ {
+ gpt_DEBUG_used[i] = 1;
+ gpt_DEBUG_users++;
+ kal_give_spinlock(gpt_3_spinlock);
+ return DCL_GPT_3_MAGIC_NUM|i;
+ }
+ }
+ kal_give_spinlock(gpt_3_spinlock);
+ ASSERT( gpt_DEBUG_users < MAX_GPT_ITEMS );
+ // return invalid handle
+ return DCL_HANDLE_OCCUPIED;
+ }
+ #endif
+ #if !defined(__MD93__)
+ else if (DCL_GPT_DSCC_0==eDev)
+ {
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DSCC1, KAL_INFINITE_WAIT);
+ if( KAL_FALSE == gptDSCC0_used )
+ {
+ gptDSCC0_used = KAL_TRUE;
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DSCC1);
+ return DCL_GPT_DSP_MAGIC_NUM;
+ }
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DSCC1);
+ return DCL_HANDLE_OCCUPIED;
+ }
+ else if (DCL_GPT_DSCC_1==eDev)
+ {
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DSCC2, KAL_INFINITE_WAIT);
+ if( KAL_FALSE == gptDSCC1_used )
+ {
+ gptDSCC1_used = KAL_TRUE;
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DSCC2);
+ return DCL_GPT_9_MAGIC_NUM;
+ }
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DSCC2);
+
+ return DCL_HANDLE_OCCUPIED;
+ }
+ #endif
+ else
+ {
+ kal_uint32 Invaild_GPT_DEV_Type = 0;
+
+ ASSERT(Invaild_GPT_DEV_Type);
+ return DCL_HANDLE_INVALID;
+ }
+}
+
+/*-----------------------------------------------------------------------
+
+* FUNCTION
+* DclSGPT_ReadData
+*
+* DESCRIPTION
+* This function is not supported for the SW GPT module now.
+*
+* PARAMETERS
+* N/A
+*
+* RETURNS
+* STATUS_UNSUPPORTED
+*
+*------------------------------------------------------------------------*/
+
+DCL_STATUS DclSGPT_ReadData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN *buf_len, DCL_OPTIONS options)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+/*-----------------------------------------------------------------------
+
+* FUNCTION
+* DclSGPT_WriteData
+*
+* DESCRIPTION
+* This function is not supported for the SW GPT module now.
+*
+* PARAMETERS
+* N/A
+*
+* RETURNS
+* STATUS_UNSUPPORTED
+*
+*------------------------------------------------------------------------*/
+
+DCL_STATUS DclSGPT_WriteData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN *buf_len, DCL_OPTIONS options)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+/*-----------------------------------------------------------------------
+
+* FUNCTION
+* DclSGPT_Configure
+*
+* DESCRIPTION
+* This function is not supported for the SW GPT module now.
+*
+* PARAMETERS
+* N/A
+*
+* RETURNS
+* STATUS_UNSUPPORTED
+*
+*------------------------------------------------------------------------*/
+
+DCL_STATUS DclSGPT_Configure(DCL_HANDLE handle, DCL_CONFIGURE_T *configure)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+
+/*-----------------------------------------------------------------------
+
+* FUNCTION
+* DclSGPT_RegisterCallback
+*
+* DESCRIPTION
+* This function is not supported for the SW GPT module now.
+*
+* PARAMETERS
+* N/A
+*
+* RETURNS
+* STATUS_UNSUPPORTED
+*
+*------------------------------------------------------------------------*/
+
+DCL_STATUS DclSGPT_RegisterCallback(DCL_HANDLE handle, DCL_EVENT event, PFN_DCL_CALLBACK callback)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+
+/*-----------------------------------------------------------------------
+
+* FUNCTION
+* DclSGPT_Control
+*
+* DESCRIPTION
+* This function is to send command to control the SW GPT module.
+*
+* PARAMETERS
+* handle - a valid handle return by DclSGPT_Open()
+* cmd - a control command for GPT module
+* 1. SGPT_CMD_START: to start a GPT timer
+* 2. SGPT_CMD_STOP: to stop a GPT timer
+* data - for 1. SGPT_CMD_START: pointer to a SGPT_CTRL_START_T structure
+* 2. SGPT_CMD_STOP: a NULL pointer
+*
+* RETURNS
+* STATUS_OK - command is executed successfully.
+* STATUS_FAIL - command is failed.
+* STATUS_INVALID_CMD - It's a invalid command.
+*
+*------------------------------------------------------------------------*/
+
+DCL_STATUS DclSGPT_Control(DCL_HANDLE handle, DCL_CTRL_CMD cmd, DCL_CTRL_DATA_T *data)
+{
+ DCL_UINT32 gpt_unknown_command = 0;
+ DCL_UINT8 gpt_handle = 0;
+ gpt_handle = DCL_GPT_CB_GET_DEV(handle) & 0x1F;
+
+ if(DCL_GPT_CB_IS_HANDLE_MAGIC(handle))
+ {
+ switch(cmd)
+ {
+ case SGPT_CMD_START:
+ {
+ kal_bool ret_b;
+ SGPT_CTRL_START_T *prStart;
+
+ prStart = &(data->rSGPTStart);
+
+ //test if callback function is null.
+ ASSERT( NULL!=prStart->pfCallback );
+
+ kal_take_spinlock(gpt_10ms_spinlock, KAL_INFINITE_WAIT);
+
+ gpt_clk_operation(KAL_FALSE, DRV_GPT_CALLBACK_TIMER);
+
+
+ ret_b = GPTCB_StartItem(gpt_handle, prStart->u2Tick, prStart->pfCallback, prStart->vPara);
+
+ kal_give_spinlock(gpt_10ms_spinlock);
+
+ if (ret_b == KAL_TRUE)
+ {
+ return STATUS_OK;
+ }
+ else
+ {
+ return STATUS_FAIL;
+ }
+ }
+ //break; we can return in any case.
+ case SGPT_CMD_STOP:
+
+ kal_take_spinlock(gpt_10ms_spinlock, KAL_INFINITE_WAIT);
+ GPTCB_StopItem(gpt_handle);
+ kal_give_spinlock(gpt_10ms_spinlock);
+
+ return STATUS_OK;
+ default:
+ ASSERT(gpt_unknown_command);
+ return STATUS_INVALID_CMD;
+ }
+ }
+ #if defined(__MD93__)
+ else if(DCL_GPT_DSP_IS_HANDLE_MAGIC(handle))
+ {
+ kal_uint32 items =0;
+ ASSERT( KAL_TRUE == gptDSP_used );
+ switch(cmd)
+ {
+ case SGPT_CMD_START:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+ //test if callback function is null.
+ ASSERT( NULL!=prStart->pfCallback );
+
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DRIVER, KAL_INFINITE_WAIT);
+
+ //ASSERT( KAL_FALSE == gptDSP_running );//dsp user may multiple
+
+ for(items = 0; items < DSP_USER_NUM; items++)
+ {
+ if(KAL_FALSE == gptDSP_instance[items].execute)
+ {
+ gptDSP_instance[items].execute = KAL_TRUE;
+ gptDSP_instance[items].tick = prStart->u4Tick;
+
+ #if defined(__FPGA__)
+ if(0x20160617 == drv_gpt_get_version())//Check GPT version is 0x20160617
+ {
+ gptDSP_instance[items].tick = gptDSP_instance[items].tick/10;
+ }
+ #endif
+
+ gptDSP_instance[items].gptimer_func = prStart->pfCallback;
+ gptDSP_instance[items].parameter = prStart->vPara;
+ break;
+ }
+ }
+#if defined(ATEST_DRV_GPT)
+ if(items == DSP_USER_NUM)
+ {
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DRIVER);
+ return STATUS_FAIL;
+ }
+#else
+ ASSERT( items < DSP_USER_NUM );
+#endif
+
+ if(KAL_FALSE == gptDSP_running)
+ {
+ gpt_clk_operation_wo_itc(KAL_FALSE, DRV_GPT_DSP_TIMER);
+ drv_gpt_set_timer(DRV_GPT_DSP_TIMER, gptDSP_instance[items].tick, MDGPT_CTRL_MODE_ONESHOT);
+ drv_gpt_start_timer(DRV_GPT_DSP_TIMER);
+
+ gptDSP_running = KAL_TRUE;
+ }
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DRIVER);
+
+ return STATUS_OK;
+ }
+ //break; we can return in any case.
+ case SGPT_CMD_STOP:
+
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DRIVER, KAL_INFINITE_WAIT);
+
+ drv_gpt_stop_timer(DRV_GPT_DSP_TIMER);
+ for(items = 0; items < DSP_USER_NUM; items++)
+ {
+ gptDSP_instance[items].execute = KAL_FALSE;
+ }
+ gptDSP_running = KAL_FALSE;
+ gpt_clk_operation_wo_itc(KAL_TRUE, DRV_GPT_DSP_TIMER);
+
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DRIVER);
+
+ return STATUS_OK;
+ default:
+ ASSERT(gpt_unknown_command);
+ return STATUS_INVALID_CMD;
+ }
+ }
+ #endif
+ else if(DCL_GPT_CBUS_IS_HANDLE_MAGIC(handle))
+ {
+ ASSERT( KAL_TRUE == gptCBUS_used );
+ switch(cmd)
+ {
+ case SGPT_CMD_START:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+#if !defined(__LP_SCHEDULE_HMU_RESCHEDULE__)
+ //test if callback function is null.
+ ASSERT( NULL!=prStart->pfCallback );
+
+ kal_take_spinlock(gpt_us_spinlock, KAL_INFINITE_WAIT);
+
+ if( KAL_TRUE == gptCBUS_running )
+ {
+ kal_give_spinlock(gpt_us_spinlock);
+ return STATUS_FAIL;
+ }
+ gptCBUS_instance.tick = prStart->u2Tick*1000; // 1 ms duration
+ gptCBUS_instance.gptimer_func = prStart->pfCallback;
+ gptCBUS_instance.parameter = prStart->vPara;
+ gptCBUS_running = KAL_TRUE;
+
+ gptCBUS_usr_trig++;
+
+#if defined(__FPGA__)
+ if(0x20160617 == drv_gpt_get_version())//Check GPT version is 0x20160617
+ {
+ gptCBUS_instance.tick = gptCBUS_instance.tick/10;
+ }
+#endif
+
+ gpt_clk_operation(KAL_FALSE, DRV_GPT_CBUS_TIMER);
+ drv_gpt_set_timer(DRV_GPT_CBUS_TIMER, gptCBUS_instance.tick, MDGPT_CTRL_MODE_ONESHOT);
+ drv_gpt_start_timer(DRV_GPT_CBUS_TIMER);
+
+ kal_give_spinlock(gpt_us_spinlock);
+#else /* !__LP_SCHEDULE_HMU_RESCHEDULE__ */
+ //only tg_hisr control this gpt
+ if(0 == gpt_cbus_on)
+ {
+// kal_take_spinlock(gpt_us_spinlock, KAL_INFINITE_WAIT);
+ gpt_clk_operation(KAL_FALSE, DRV_GPT_CBUS_TIMER);
+ gpt_cbus_on = 1;
+// kal_give_spinlock(gpt_us_spinlock);
+ }
+ /* drv_gpt_set/start_timer are thread-save functions */
+ drv_gpt_set_timer(DRV_GPT_CBUS_TIMER, prStart->u2Tick*1000, MDGPT_CTRL_MODE_ONESHOT);
+ drv_gpt_start_timer(DRV_GPT_CBUS_TIMER);
+#endif /* !__LP_SCHEDULE_HMU_RESCHEDULE__ */
+
+ return STATUS_OK;
+ }
+ //break; we can return in any case.
+ case SGPT_CMD_STOP:
+
+#if !defined(__LP_SCHEDULE_HMU_RESCHEDULE__)
+ kal_take_spinlock(gpt_us_spinlock, KAL_INFINITE_WAIT);
+
+ drv_gpt_stop_timer(DRV_GPT_CBUS_TIMER);
+ gptCBUS_running = KAL_FALSE;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_CBUS_TIMER);
+
+ kal_give_spinlock(gpt_us_spinlock);
+#else /* !__LP_SCHEDULE_HMU_RESCHEDULE__ */
+ //only tg_hisr control this gpt
+ /* drv_gpt_stop_timer is thread-save function */
+ drv_gpt_stop_timer(DRV_GPT_CBUS_TIMER);
+ if(1 == gpt_cbus_on)
+ {
+// kal_take_spinlock(gpt_us_spinlock, KAL_INFINITE_WAIT);
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_CBUS_TIMER);
+ gpt_cbus_on = 0;
+// kal_give_spinlock(gpt_us_spinlock);
+ }
+#endif /* !__LP_SCHEDULE_HMU_RESCHEDULE__ */
+
+ return STATUS_OK;
+ default:
+ ASSERT(gpt_unknown_command);
+ return STATUS_INVALID_CMD;
+ }
+ }
+#if defined(__MD93__) || defined(__MD95__)
+ else if(DCL_GPT_C2KOS_IS_HANDLE_MAGIC(handle))
+ {
+ ASSERT( KAL_TRUE == gptC2KOS_used );
+ switch(cmd)
+ {
+ case SGPT_CMD_START:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+ //test if callback function is null.
+ ASSERT( NULL!=prStart->pfCallback );
+
+ kal_take_spinlock(gpt_6_spinlock, KAL_INFINITE_WAIT);
+
+ if( KAL_TRUE == gptC2KOS_running )
+ {
+ kal_give_spinlock(gpt_6_spinlock);
+ return STATUS_FAIL;
+ }
+ gptC2KOS_instance.tick = prStart->u4Tick; // 1 us duration
+ gptC2KOS_instance.gptimer_func = prStart->pfCallback;
+ gptC2KOS_instance.parameter = prStart->vPara;
+ gptC2KOS_running = KAL_TRUE;
+
+#if defined(__FPGA__)
+ if(0x20160617 == drv_gpt_get_version())//Check GPT version is 0x20160617
+ {
+ gptC2KOS_instance.tick = gptC2KOS_instance.tick/10;
+ }
+#endif
+ gpt_clk_operation(KAL_FALSE, DRV_GPT_6_TIMER);
+ drv_gpt_set_timer(DRV_GPT_6_TIMER, gptC2KOS_instance.tick, MDGPT_CTRL_MODE_ONESHOT);
+ drv_gpt_start_timer(DRV_GPT_6_TIMER);
+
+ kal_give_spinlock(gpt_6_spinlock);
+
+ return STATUS_OK;
+ }
+ //break; we can return in any case.
+ case SGPT_CMD_STOP:
+
+ kal_take_spinlock(gpt_6_spinlock, KAL_INFINITE_WAIT);
+
+ drv_gpt_stop_timer(DRV_GPT_6_TIMER);
+ gptC2KOS_running = KAL_FALSE;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_6_TIMER);
+
+ kal_give_spinlock(gpt_6_spinlock);
+
+ return STATUS_OK;
+
+ case SGPT_CMD_RUNNING_TICK:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+ prStart->u4Tick = drv_gpt_get_data(DRV_GPT_6_TIMER);
+
+ return STATUS_OK;
+ }
+ default:
+ ASSERT(gpt_unknown_command);
+ return STATUS_INVALID_CMD;
+ }
+ }
+#elif defined(__MD97__)
+ else if(DCL_GPT_6_IS_HANDLE_MAGIC(handle))
+ {
+ ASSERT( KAL_TRUE == gptDPCOPRO_used );
+ switch(cmd)
+ {
+ case SGPT_CMD_START:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+ //test if callback function is null.
+ ASSERT( NULL!=prStart->pfCallback );
+
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DPCOPRO, KAL_INFINITE_WAIT);
+ if( KAL_TRUE == gptDPCOPRO_running )
+ {
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DPCOPRO);
+ return STATUS_FAIL;
+ }
+ gptDPCOPRO_instance.tick = prStart->u4Tick; // 1 us duration
+ gptDPCOPRO_instance.gptimer_func = prStart->pfCallback;
+ gptDPCOPRO_instance.parameter = prStart->vPara;
+ gptDPCOPRO_running = KAL_TRUE;
+
+#if defined(__FPGA__)
+ if(0x20160617 == drv_gpt_get_version())//Check GPT version is 0x20160617
+ {
+ gptDPCOPRO_instance.tick = gptDPCOPRO_instance.tick/10;
+ }
+#endif
+
+ gpt_clk_operation(KAL_FALSE, DRV_GPT_6_TIMER);
+ Data_Sync_Barrier();
+ //drv_gpt_set_timer(DRV_GPT_6_TIMER, gptDPCOPRO_instance.tick, MDGPT_CTRL_MODE_REPEAT);
+ DRV_WriteReg32(MDGPT_CNT_REG(DRV_GPT_6_TIMER), gptDPCOPRO_instance.tick);
+ DRV_WriteReg32(MDGPT_CTRL_REG(DRV_GPT_6_TIMER), MDGPT_CTRL_MODE_REPEAT); //1<<1 enable timer
+ //drv_gpt_start_timer(DRV_GPT_6_TIMER);
+ DRV_WriteReg32(MDGPT_CTRL_REG(DRV_GPT_6_TIMER), DRV_Reg32(MDGPT_CTRL_REG(DRV_GPT_6_TIMER))| MDGPT_CTRL_MODE_ENABLE);
+ Data_Sync_Barrier();
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DPCOPRO);
+ return STATUS_OK;
+ }
+ //break; we can return in any case.
+ case SGPT_CMD_STOP:
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DPCOPRO, KAL_INFINITE_WAIT);
+ //drv_gpt_stop_timer(DRV_GPT_6_TIMER);
+ DRV_WriteReg32(MDGPT_CTRL_REG(DRV_GPT_6_TIMER), DRV_Reg32(MDGPT_CTRL_REG(DRV_GPT_6_TIMER)) & (~MDGPT_CTRL_MODE_ENABLE));
+ gptDPCOPRO_running = KAL_FALSE;
+ Data_Sync_Barrier();
+ //IRQClearInt(MDGPT_INTR_ID(DRV_GPT_6_TIMER)); [MOLY00455727]
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_6_TIMER);
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DPCOPRO);
+ return STATUS_OK;
+
+ case SGPT_CMD_RUNNING_TICK:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+ prStart->u4Tick = drv_gpt_get_data(DRV_GPT_6_TIMER);
+
+ return STATUS_OK;
+ }
+ default:
+ ASSERT(gpt_unknown_command);
+ return STATUS_INVALID_CMD;
+ }
+ }
+#endif
+ else if(DCL_GPT_C2KAR_IS_HANDLE_MAGIC(handle))
+ {
+ ASSERT( KAL_TRUE == gptC2KAR_used );
+ switch(cmd)
+ {
+ case SGPT_CMD_START:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+ //test if callback function is null.
+ ASSERT( NULL!=prStart->pfCallback );
+
+ //savedMask = SaveAndSetIRQMask();
+
+ if( KAL_TRUE == gptC2KAR_running )
+ {
+ //RestoreIRQMask(savedMask);
+ return STATUS_FAIL;
+ }
+ gptC2KAR_instance.tick = prStart->u4Tick; // 1 us duration
+ gptC2KAR_instance.gptimer_func = prStart->pfCallback;
+ gptC2KAR_instance.parameter = prStart->vPara;
+ gptC2KAR_running = KAL_TRUE;
+
+#if defined(__FPGA__)
+ if(0x20160617 == drv_gpt_get_version())//Check GPT version is 0x20160617
+ {
+ gptC2KAR_instance.tick = gptC2KAR_instance.tick/10;
+ }
+#endif
+
+ gpt_clk_operation(KAL_FALSE, DRV_GPT_C2KAR_TIMER);
+ drv_gpt_set_timer(DRV_GPT_C2KAR_TIMER, gptC2KAR_instance.tick, MDGPT_CTRL_MODE_REPEAT);
+ drv_gpt_start_timer(DRV_GPT_C2KAR_TIMER);
+
+ return STATUS_OK;
+ }
+ //break; we can return in any case.
+ case SGPT_CMD_STOP:
+
+ drv_gpt_stop_timer(DRV_GPT_C2KAR_TIMER);
+ gptC2KAR_running = KAL_FALSE;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_C2KAR_TIMER);
+
+ return STATUS_OK;
+
+ case SGPT_CMD_RUNNING_TICK:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+ prStart->u4Tick = drv_gpt_get_data(DRV_GPT_C2KAR_TIMER);
+
+ return STATUS_OK;
+ }
+
+ case SGPT_CMD_MODIFY_CNT:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+ //test if callback function is null.
+ ASSERT( NULL!=prStart->pfCallback );
+
+ if( KAL_FALSE == gptC2KAR_running ) //Only Running case to modify GPT count
+ {
+ ASSERT(0);
+ }
+ gptC2KAR_instance.tick = prStart->u4Tick; // 1 us duration
+ //gptC2KAR_instance.gptimer_func = prStart->pfCallback;
+ //gptC2KAR_instance.parameter = prStart->vPara;
+
+#if defined(__FPGA__)
+ if(0x20160617 == drv_gpt_get_version())//Check GPT version is 0x20160617
+ {
+ gptC2KAR_instance.tick = gptC2KAR_instance.tick/10;
+ }
+#endif
+
+ gpt_clk_operation(KAL_FALSE, DRV_GPT_C2KAR_TIMER);
+ drv_gpt_set_data(DRV_GPT_C2KAR_TIMER, gptC2KAR_instance.tick);
+
+ return STATUS_OK;
+ }
+ default:
+ ASSERT(gpt_unknown_command);
+ return STATUS_INVALID_CMD;
+ }
+ }
+
+ else if(DCL_GPT_LOGGING_IS_HANDLE_MAGIC(handle))
+ {
+ ASSERT( KAL_TRUE == gptLogging_used );
+ switch(cmd)
+ {
+ case SGPT_CMD_START:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+ //test if callback function is null.
+ ASSERT( NULL!=prStart->pfCallback );
+
+ kal_take_spinlock(gpt_logging_spinlock, KAL_INFINITE_WAIT);
+
+ if( KAL_TRUE == gptLogging_running )
+ {
+ kal_give_spinlock(gpt_logging_spinlock);
+ return STATUS_FAIL;
+ }
+ gptLogging_instance.tick = prStart->u2Tick*1000; // 1 ms duration
+ gptLogging_instance.gptimer_func = prStart->pfCallback;
+ gptLogging_instance.parameter = prStart->vPara;
+ gptLogging_running = KAL_TRUE;
+
+#if defined(__FPGA__)
+ if(0x20160617 == drv_gpt_get_version())//Check GPT version is 0x20160617
+ {
+ gptLogging_instance.tick = gptLogging_instance.tick/10;
+ }
+#endif
+
+ gpt_clk_operation(KAL_FALSE, DRV_GPT_LOGGING_TIMER);
+ drv_gpt_set_timer(DRV_GPT_LOGGING_TIMER, gptLogging_instance.tick, MDGPT_CTRL_MODE_ONESHOT);
+ drv_gpt_start_timer(DRV_GPT_LOGGING_TIMER);
+
+ kal_give_spinlock(gpt_logging_spinlock);
+
+ return STATUS_OK;
+ }
+ //break; we can return in any case.
+ case SGPT_CMD_STOP:
+
+ kal_take_spinlock(gpt_logging_spinlock, KAL_INFINITE_WAIT);
+
+ drv_gpt_stop_timer(DRV_GPT_LOGGING_TIMER);
+ gptLogging_running = KAL_FALSE;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_LOGGING_TIMER);
+
+ kal_give_spinlock(gpt_logging_spinlock);
+
+ return STATUS_OK;
+ default:
+ ASSERT(gpt_unknown_command);
+ return STATUS_INVALID_CMD;
+ }
+ }
+#if defined(__MD93__) || defined(__MD95__)
+ else if(DCL_GPT_3_IS_HANDLE_MAGIC(handle))
+ {
+ switch(cmd)
+ {
+ case SGPT_CMD_START:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+ kal_take_spinlock(gpt_3_spinlock, KAL_INFINITE_WAIT);
+
+ GPT_DEBUG_Insert(DCL_GPT_3_GET_DEV(handle), prStart->u4Tick, prStart->pfCallback, prStart->vPara);
+
+ kal_give_spinlock(gpt_3_spinlock);
+
+ return STATUS_OK;
+ }
+ //break; we can return in any case.
+ case SGPT_CMD_STOP:
+
+ kal_take_spinlock(gpt_3_spinlock, KAL_INFINITE_WAIT);
+
+ GPT_DEBUG_Stop(DCL_GPT_3_GET_DEV(handle));
+
+ kal_give_spinlock(gpt_3_spinlock);
+
+ return STATUS_OK;
+ default:
+ ASSERT(gpt_unknown_command);
+ return STATUS_INVALID_CMD;
+ }
+ }
+ #endif
+ #if !defined(__MD93__)
+ else if(DCL_GPT_DSP_IS_HANDLE_MAGIC(handle))
+ {
+ ASSERT( KAL_TRUE == gptDSCC0_used );
+ switch(cmd)
+ {
+ case SGPT_CMD_START:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+ //test if callback function is null.
+ ASSERT( NULL!=prStart->pfCallback );
+
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DSCC1, KAL_INFINITE_WAIT);
+
+ if( KAL_TRUE == gptDSCC0_running )
+ {
+ drv_gpt_stop_timer(DRV_GPT_DSP_TIMER);
+ }
+ else
+ {
+ gpt_clk_operation(KAL_FALSE, DRV_GPT_DSP_TIMER);
+ }
+ gptDSCC0_instance.tick = prStart->u4Tick; // 1 us duration
+ gptDSCC0_instance.gptimer_func = prStart->pfCallback;
+ gptDSCC0_instance.parameter = prStart->vPara;
+ gptDSCC0_running = KAL_TRUE;
+
+#if defined(__FPGA__)
+ if(0x20160617 == drv_gpt_get_version())//Check GPT version is 0x20160617
+ {
+ gptDSCC0_instance.tick = gptDSCC0_instance.tick/10;
+ }
+#endif
+ drv_gpt_set_timer(DRV_GPT_DSP_TIMER, gptDSCC0_instance.tick, MDGPT_CTRL_MODE_ONESHOT);
+ drv_gpt_start_timer(DRV_GPT_DSP_TIMER);
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DSCC1);
+ return STATUS_OK;
+ }
+ //break; we can return in any case.
+ case SGPT_CMD_STOP:
+
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DSCC1, KAL_INFINITE_WAIT);
+
+ drv_gpt_stop_timer(DRV_GPT_DSP_TIMER);
+ gptDSCC0_running = KAL_FALSE;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_DSP_TIMER);
+
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DSCC1);
+
+ return STATUS_OK;
+
+ case SGPT_CMD_RUNNING_TICK:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+ prStart->u4Tick = drv_gpt_get_data(DRV_GPT_DSP_TIMER);
+
+ return STATUS_OK;
+ }
+ default:
+ ASSERT(gpt_unknown_command);
+ return STATUS_INVALID_CMD;
+ }
+ }
+
+ else if(DCL_GPT_9_IS_HANDLE_MAGIC(handle))
+ {
+ ASSERT( KAL_TRUE == gptDSCC1_used );
+ switch(cmd)
+ {
+ case SGPT_CMD_START:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+ //test if callback function is null.
+ ASSERT( NULL!=prStart->pfCallback );
+
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DSCC2, KAL_INFINITE_WAIT);
+
+ if( KAL_TRUE == gptDSCC1_running )
+ {
+ drv_gpt_stop_timer(DRV_GPT_9_TIMER);
+ }
+ else
+ {
+ gpt_clk_operation(KAL_FALSE, DRV_GPT_9_TIMER);
+ }
+
+ gptDSCC1_instance.tick = prStart->u4Tick; // 1 us duration
+ gptDSCC1_instance.gptimer_func = prStart->pfCallback;
+ gptDSCC1_instance.parameter = prStart->vPara;
+ gptDSCC1_running = KAL_TRUE;
+
+#if defined(__FPGA__)
+ if(0x20160617 == drv_gpt_get_version())//Check GPT version is 0x20160617
+ {
+ gptDSCC1_instance.tick = gptDSCC1_instance.tick/10;
+ }
+#endif
+ drv_gpt_set_timer(DRV_GPT_9_TIMER, gptDSCC1_instance.tick, MDGPT_CTRL_MODE_ONESHOT);
+ drv_gpt_start_timer(DRV_GPT_9_TIMER);
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DSCC2);
+
+ return STATUS_OK;
+ }
+ //break; we can return in any case.
+ case SGPT_CMD_STOP:
+
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DSCC2, KAL_INFINITE_WAIT);
+
+ drv_gpt_stop_timer(DRV_GPT_9_TIMER);
+ gptDSCC1_running = KAL_FALSE;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_9_TIMER);
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DSCC2);
+ return STATUS_OK;
+
+ case SGPT_CMD_RUNNING_TICK:
+ {
+ SGPT_CTRL_START_T *prStart;
+ prStart = &(data->rSGPTStart);
+
+ prStart->u4Tick = drv_gpt_get_data(DRV_GPT_9_TIMER);
+
+ return STATUS_OK;
+ }
+ default:
+ ASSERT(gpt_unknown_command);
+ return STATUS_INVALID_CMD;
+ }
+ }
+
+#endif
+ else
+ {
+ kal_uint32 Error_DCL_HANDLE = 0;
+ //if assert happen here, that means DCL_HANDLE pass in is wrong!
+ ASSERT(Error_DCL_HANDLE);
+ return DCL_HANDLE_INVALID;
+ }
+}
+
+/*-----------------------------------------------------------------------
+
+* FUNCTION
+* DclSGPT_Close
+*
+* DESCRIPTION
+* This function is to close the SW GPT module.
+*
+* PARAMETERS
+* handle - hanlde previous got from DclSGPT_Open()
+*
+* RETURNS
+* DCL_STATUS_OK - successfully close the SW GPT module.
+* DCL_STATUS_fail - fails to close the SW GPT module.
+*
+*------------------------------------------------------------------------*/
+
+DCL_STATUS DclSGPT_Close(DCL_HANDLE *handle)
+{
+ DCL_UINT8 gpt_handle;
+ gpt_handle=DCL_GPT_CB_GET_DEV(*handle) & 0x1F;
+
+ if(DCL_GPT_CB_IS_HANDLE_MAGIC(*handle))
+ {
+ // Make sure the GPT handle is activated
+ ASSERT(gptCB_used[gpt_handle]);
+
+ kal_take_spinlock(gpt_10ms_spinlock, KAL_INFINITE_WAIT);
+
+ if( gptCB_status & (1<<gpt_handle) )
+ {
+ GPTCB_StopItem(gpt_handle);
+ }
+
+ gptCB_used[gpt_handle] = 0;
+ gptCB_users--;
+
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_CALLBACK_TIMER);
+
+ kal_give_spinlock(gpt_10ms_spinlock);
+
+ *handle = EMPTY_GPT_CB_HANDLER;
+ return STATUS_OK;
+ }
+ #if defined(__MD93__)
+ if(DCL_GPT_DSP_IS_HANDLE_MAGIC(*handle))
+ {
+ kal_uint32 items = 0;
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DRIVER, KAL_INFINITE_WAIT);
+
+ drv_gpt_stop_timer(DRV_GPT_DSP_TIMER);
+
+ if( KAL_TRUE == gptDSP_running )
+ {
+ for(items = 0; items < DSP_USER_NUM; items++)
+ {
+ gptDSP_instance[items].execute = KAL_FALSE;
+ }
+ gptDSP_running = KAL_FALSE;
+ }
+ gptDSP_used = KAL_FALSE;
+ *handle = EMPTY_GPT_CB_HANDLER;
+ gpt_clk_operation_wo_itc(KAL_TRUE, DRV_GPT_DSP_TIMER);
+
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DRIVER);
+
+ return STATUS_OK;
+ }
+ #endif
+ else if(DCL_GPT_CBUS_IS_HANDLE_MAGIC(*handle))
+ {
+ kal_take_spinlock(gpt_us_spinlock, KAL_INFINITE_WAIT);
+
+ if( KAL_TRUE == gptCBUS_running )
+ {
+ drv_gpt_stop_timer(DRV_GPT_CBUS_TIMER);
+ gptCBUS_running = KAL_FALSE;
+ }
+ gptCBUS_used = KAL_FALSE;
+ *handle = EMPTY_GPT_CB_HANDLER;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_CBUS_TIMER);
+
+ kal_give_spinlock(gpt_us_spinlock);
+
+ return STATUS_OK;
+ }
+#if defined(__MD93__) || defined(__MD95__)
+ else if(DCL_GPT_C2KOS_IS_HANDLE_MAGIC(*handle))
+ {
+ kal_take_spinlock(gpt_6_spinlock, KAL_INFINITE_WAIT);
+
+ if( KAL_TRUE == gptC2KOS_running )
+ {
+ drv_gpt_stop_timer(DRV_GPT_6_TIMER);
+ gptC2KOS_running = KAL_FALSE;
+ }
+ gptC2KOS_used = KAL_FALSE;
+ *handle = EMPTY_GPT_CB_HANDLER;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_6_TIMER);
+
+ kal_give_spinlock(gpt_6_spinlock);
+
+ return STATUS_OK;
+ }
+#elif defined(__MD97__)
+ else if(DCL_GPT_6_IS_HANDLE_MAGIC(*handle))
+ {
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DPCOPRO, KAL_INFINITE_WAIT);
+ if( KAL_TRUE == gptDPCOPRO_running )
+ {
+ drv_gpt_stop_timer(DRV_GPT_6_TIMER);
+ gptDPCOPRO_running = KAL_FALSE;
+ }
+ gptDPCOPRO_used = KAL_FALSE;
+ *handle = EMPTY_GPT_CB_HANDLER;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_6_TIMER);
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DPCOPRO);
+ return STATUS_OK;
+ }
+#endif
+ else if(DCL_GPT_C2KAR_IS_HANDLE_MAGIC(*handle))
+ {
+ if( KAL_TRUE == gptC2KAR_running )
+ {
+ drv_gpt_stop_timer(DRV_GPT_C2KAR_TIMER);
+ gptC2KAR_running = KAL_FALSE;
+ }
+ gptC2KAR_used = KAL_FALSE;
+ *handle = EMPTY_GPT_CB_HANDLER;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_C2KAR_TIMER);
+
+ return STATUS_OK;
+ }
+ else if(DCL_GPT_LOGGING_IS_HANDLE_MAGIC(*handle))
+ {
+ kal_take_spinlock(gpt_logging_spinlock, KAL_INFINITE_WAIT);
+
+ if( KAL_TRUE == gptLogging_running )
+ {
+ drv_gpt_stop_timer(DRV_GPT_LOGGING_TIMER);
+ gptLogging_running = KAL_FALSE;
+ }
+ gptLogging_used = KAL_FALSE;
+ *handle = EMPTY_GPT_CB_HANDLER;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_LOGGING_TIMER);
+
+ kal_give_spinlock(gpt_logging_spinlock);
+
+ return STATUS_OK;
+ }
+#if defined(__MD93__) || defined(__MD95__)
+ else if(DCL_GPT_3_IS_HANDLE_MAGIC(*handle))
+ {
+ gpt_inst *iter;
+
+ kal_take_spinlock(gpt_3_spinlock, KAL_INFINITE_WAIT);
+
+ iter = gpt_DEBUG_head.next;
+ while(NULL!=iter)
+ {
+ if(iter == &gpt_DEBUG_items[gpt_handle])
+ {
+ GPT_DEBUG_Stop(gpt_handle);
+ break;
+ }
+ }
+ gpt_DEBUG_used[gpt_handle] = 0;
+ gpt_DEBUG_users--;
+ *handle = EMPTY_GPT_CB_HANDLER;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_3_TIMER);
+
+ kal_give_spinlock(gpt_3_spinlock);
+
+ return STATUS_OK;
+ }
+#endif
+ #if !defined(__MD93__)
+ else if(DCL_GPT_DSP_IS_HANDLE_MAGIC(*handle))
+ {
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DSCC1, KAL_INFINITE_WAIT);
+ if( KAL_TRUE == gptDSCC0_running )
+ {
+ drv_gpt_stop_timer(DRV_GPT_DSP_TIMER);
+ gptDSCC0_running = KAL_FALSE;
+ }
+ gptDSCC0_used = KAL_FALSE;
+ *handle = EMPTY_GPT_CB_HANDLER;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_DSP_TIMER);
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DSCC1);
+ return STATUS_OK;
+ }
+ else if(DCL_GPT_9_IS_HANDLE_MAGIC(*handle))
+ {
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DSCC2, KAL_INFINITE_WAIT);
+ if( KAL_TRUE == gptDSCC1_running )
+ {
+ drv_gpt_stop_timer(DRV_GPT_9_TIMER);
+ gptDSCC1_running = KAL_FALSE;
+ }
+ gptDSCC1_used = KAL_FALSE;
+ *handle = EMPTY_GPT_CB_HANDLER;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_9_TIMER);
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DSCC2);
+ return STATUS_OK;
+ }
+
+#endif
+ else
+ {
+ kal_uint32 Invalid_DCL_GPT_HANDLE = 0;
+ ASSERT(Invalid_DCL_GPT_HANDLE);
+ return STATUS_INVALID_DCL_HANDLE;
+ }
+}
+
+
+void gpt_clk_operation(kal_bool op, kal_uint32 num)
+{
+ kal_hrt_take_itc_lock(KAL_ITC_GPT_DRIVER, KAL_INFINITE_WAIT);
+ if (KAL_TRUE == op) //clock off
+ {
+ gpt_clock_status &= ~(1<<num);
+ if(0 == gpt_clock_status)
+ {
+ PDN_SET(PDN_MDGPTM_26M);
+ MDGPTM_PDN_SET();
+ }
+ }
+ else //clock on
+ {
+ if(0 == gpt_clock_status)
+ {
+ PDN_CLR(PDN_MDGPTM_26M);
+ MDGPTM_PDN_CLR();
+ }
+ gpt_clock_status |= (1<<num);
+ }
+ kal_hrt_give_itc_lock(KAL_ITC_GPT_DRIVER);
+}
+
+void gpt_clk_operation_wo_itc(kal_bool op, kal_uint32 num)
+{
+ if (KAL_TRUE == op) //clock off
+ {
+ gpt_clock_status &= ~(1<<num);
+ if(0 == gpt_clock_status)
+ {
+ PDN_SET(PDN_MDGPTM_26M);
+ MDGPTM_PDN_SET();
+ }
+ }
+ else //clock on
+ {
+ if(0 == gpt_clock_status)
+ {
+ PDN_CLR(PDN_MDGPTM_26M);
+ MDGPTM_PDN_CLR();
+ }
+ gpt_clock_status |= (1<<num);
+ }
+}
+
+/*-----------------------------------------------------------------------
+
+* FUNCTION
+* GPTCB_StartItem
+*
+* DESCRIPTION
+* GPT CB start a item.
+*
+* CALLS
+*
+* PARAMETERS
+* handler = instance number
+* tick = the delay(the unit is 10ms)
+* gptimer_func = the callback function when the tick is reached.
+* parameter = the parameter inputed into gptimer_func
+*
+* RETURNS
+* KAL_TRUE, start item successfully
+* KAL_FALSE, start item fail
+*
+* GLOBALS AFFECTED
+* external_global
+*------------------------------------------------------------------------*/
+static kal_bool GPTCB_StartItem(DCL_HANDLE handler,kal_uint16 tick,void (*gptimer_func)(void *),void *parameter)
+{
+
+ if (gptCB_status & (1<<handler))
+ {
+ return KAL_FALSE;
+ }
+
+ //savedMask = SaveAndSetIRQMask();
+
+ gptCB_items[handler].tick = gptCB_ticks + tick;
+ gptCB_items[handler].gptimer_func = gptimer_func;
+ gptCB_items[handler].parameter = parameter;
+
+ if(0 == gptCB_status)
+ {
+ drv_gpt_start_timer(DRV_GPT_CALLBACK_TIMER);
+ }
+ gptCB_status |= (1<<handler);
+
+ //RestoreIRQMask(savedMask);
+
+ return KAL_TRUE;
+}
+
+/*-----------------------------------------------------------------------
+
+* FUNCTION
+* GPTCB_StopItem
+*
+* DESCRIPTION
+* GPT CB stop a item.
+*
+* CALLS
+*
+* PARAMETERS
+* handler = instance number
+*
+* RETURNS
+* None
+*
+* GLOBALS AFFECTED
+* external_global
+*------------------------------------------------------------------------*/
+static void GPTCB_StopItem(DCL_HANDLE handler)
+{
+ ASSERT(gptCB_used[handler]);
+
+ gptCB_status &= ~(1<<handler);
+
+ if(0==gptCB_status)
+ {
+ gptCB_ticks = 0;
+ drv_gpt_stop_timer(DRV_GPT_CALLBACK_TIMER);
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_CALLBACK_TIMER);
+ }
+}
+#if defined(__MD93__) || defined(__MD95__)
+static void GPT_DEBUG_Insert(kal_uint32 indx, kal_uint32 tick, void (*fp)(void *) ,void *parameter)
+{
+ kal_uint32 elapsed, time; /* elapsed: current - start time; time: eariest time-out setting */
+ gpt_inst *iter = gpt_DEBUG_head.next;
+
+ ASSERT( NULL!=fp );
+ gpt_DEBUG_items[indx].gptimer_func = fp;
+ gpt_DEBUG_items[indx].param = parameter;
+
+ //savedMask = SaveAndSetIRQMask();
+
+ elapsed = drv_gpt_get_data(DRV_GPT_3_TIMER);
+ drv_gpt_stop_timer(DRV_GPT_3_TIMER);
+
+ if( (NULL == gpt_DEBUG_head.next))
+ {
+ gpt_DEBUG_head.next = &gpt_DEBUG_items[indx];
+ time = tick;
+ gpt_clk_operation(KAL_FALSE, DRV_GPT_3_TIMER);
+ }
+ else if((iter->ticks-elapsed) > tick)
+ {
+ gpt_DEBUG_items[indx].next = iter;
+ gpt_DEBUG_head.next = &gpt_DEBUG_items[indx];
+ iter->ticks -= elapsed + tick;
+ time = tick;
+ }
+ else
+ {
+ time = iter->ticks - elapsed;
+ tick -= time;
+ iter->ticks = time;
+ while( NULL != iter->next )
+ {
+ if(iter->next->ticks > tick)
+ {
+ gpt_DEBUG_items[indx].next = iter->next;
+ gpt_DEBUG_items[indx].next->ticks -= tick;
+ iter->next = &gpt_DEBUG_items[indx];
+ break;
+ }
+ iter = iter->next;
+ tick -= iter->ticks;
+ }
+ if(NULL == iter->next)
+ {
+ gpt_DEBUG_items[indx].next = NULL;
+ iter->next = &gpt_DEBUG_items[indx];
+ }
+ }
+ gpt_DEBUG_items[indx].ticks = tick;
+
+ //test if callback function is null.
+ drv_gpt_set_timer(DRV_GPT_3_TIMER, time, MDGPT_CTRL_MODE_ONESHOT);
+ drv_gpt_start_timer(DRV_GPT_3_TIMER);
+
+ //RestoreIRQMask(savedMask);
+}
+
+/*-----------------------------------------------------------------------
+* FUNCTION
+* GPT_DEBUG_Stop
+*
+* DESCRIPTION
+* Remove Debug Timer Instance from queue
+*
+* CALLS
+*
+* PARAMETERS
+* indx = instance number
+*
+* RETURNS
+* None
+*
+*------------------------------------------------------------------------*/
+static void GPT_DEBUG_Stop(kal_uint32 indx)
+{
+ gpt_inst *iter = &gpt_DEBUG_head;
+
+ //savedMask = SaveAndSetIRQMask();
+
+ while( (iter->next!=&gpt_DEBUG_items[indx]) && (NULL!=iter->next) )
+ {
+ iter = iter->next;
+ }
+ ASSERT(NULL!=iter->next);
+
+ if(iter == &gpt_DEBUG_head)
+ {
+ kal_uint32 elapsed;
+ elapsed = drv_gpt_get_data(DRV_GPT_3_TIMER);
+ drv_gpt_stop_timer(DRV_GPT_3_TIMER);
+ IRQClearInt(MDGPT_INTR_ID(DRV_GPT_3_TIMER));
+
+ gpt_DEBUG_head.next = gpt_DEBUG_items[indx].next;
+ if(NULL != gpt_DEBUG_head.next)
+ {
+ gpt_DEBUG_head.next->ticks = gpt_DEBUG_head.next->ticks - elapsed + gpt_DEBUG_items[indx].ticks ;
+ drv_gpt_set_timer(DRV_GPT_3_TIMER, gpt_DEBUG_head.next->ticks, MDGPT_CTRL_MODE_ONESHOT);
+ drv_gpt_start_timer(DRV_GPT_3_TIMER);
+ }
+ else
+ {
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_3_TIMER);
+ }
+ }
+ else
+ {
+ if(NULL != gpt_DEBUG_items[indx].next)
+ {
+ gpt_DEBUG_items[indx].next->ticks += gpt_DEBUG_items[indx].ticks;
+ }
+ iter->next = iter->next->next;
+ }
+ gpt_DEBUG_items[indx].next = NULL;
+ //RestoreIRQMask(savedMask);
+}
+#endif
+/*-----------------------------------------------------------------------
+* FUNCTION
+* GPTCB_10MS_HISR
+*
+* DESCRIPTION
+* GPT Callback HISR : 10ms
+*
+* CALLS
+*
+* PARAMETERS
+* void
+*
+* RETURNS
+* None
+*
+* GLOBALS AFFECTED
+* external_global
+*------------------------------------------------------------------------*/
+DEVDRV_LS_INTSRAM_ROCODE void GPTCB_10MS_HISR(void)
+{
+ kal_uint8 index;
+ kal_uint32 checkMask = 0xFFFFFFFF;
+
+ kal_take_spinlock(gpt_10ms_spinlock, KAL_INFINITE_WAIT);
+
+ gptCB_ticks++;
+
+ kal_give_spinlock(gpt_10ms_spinlock);
+
+ // Bit matched method to check if a GPT items is activated
+ // Search whole GPT items
+ for (index = 0; (index < MAX_GPT_ITEMS)&&(gptCB_status&checkMask); index++)
+ {
+ kal_take_spinlock(gpt_10ms_spinlock, KAL_INFINITE_WAIT);
+ if( (gptCB_status & (1 << index)) && (gptCB_ticks >= gptCB_items[index].tick) )
+ {
+ gptCB_status &= ~(1<<index);
+ kal_give_spinlock(gpt_10ms_spinlock);
+ gptCB_items[index].gptimer_func(gptCB_items[index].parameter);
+
+ }
+ else
+ {
+ kal_give_spinlock(gpt_10ms_spinlock);
+ }
+ checkMask ^= (1 << index);
+ }
+
+
+ kal_take_spinlock(gpt_10ms_spinlock, KAL_INFINITE_WAIT);
+
+ if (gptCB_status == 0)
+ {
+ // UT Test road test.
+ gptCB_ticks = 0;
+ drv_gpt_stop_timer(DRV_GPT_CALLBACK_TIMER);
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_CALLBACK_TIMER);
+ }
+ kal_give_spinlock(gpt_10ms_spinlock);
+}
+
+
+/*-----------------------------------------------------------------------
+* FUNCTION
+* GPTCB_Debug_HISR
+*
+* DESCRIPTION
+* GPT Callback HISR : 1us
+*
+* CALLS
+*
+* PARAMETERS
+* void
+*
+* RETURNS
+* None
+*
+* GLOBALS AFFECTED
+* external_global
+*------------------------------------------------------------------------*/
+#if defined(__MD93__) || defined(__MD95__)
+void GPTCB_DEBUG_HISR(void)
+{
+// if(NULL != gpt_DEBUG_head.next->gptimer_func)
+ {
+ gpt_DEBUG_head.next->gptimer_func(gpt_DEBUG_head.next->param);
+ }
+#if !defined(ATEST_DRV_ENABLE) && !defined(DSPFNC_DSP_SWTRACER)
+ ASSERT(0);
+#endif /* !ATEST_DRV_ENABLE */
+}
+#else
+void GPTCB_DEBUG_HISR(void)
+{
+ return;
+}
+#endif
+/*-----------------------------------------------------------------------
+* FUNCTION
+* GPTCB_US_HISR
+*
+* DESCRIPTION
+* GPT Callback HISR : 10ms
+*
+* CALLS
+*
+* PARAMETERS
+* void
+*
+* RETURNS
+* None
+*
+* GLOBALS AFFECTED
+* external_global
+*------------------------------------------------------------------------*/
+#if !defined(__LP_SCHEDULE_HMU_RESCHEDULE__)
+DEVDRV_LS_INTSRAM_ROCODE void GPTCB_US_HISR(void)
+{
+ kal_take_spinlock(gpt_us_spinlock, KAL_INFINITE_WAIT);
+
+ if( KAL_TRUE == gptCBUS_running )
+ {
+ gptCBUS_running = KAL_FALSE;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_CBUS_TIMER);
+
+ kal_give_spinlock(gpt_us_spinlock);
+ gptCBUS_instance.gptimer_func(gptCBUS_instance.parameter);
+ }
+ else
+ {
+ kal_give_spinlock(gpt_us_spinlock);
+ }
+
+}
+#endif
+
+#if defined(__MD93__) || defined(__MD95__)
+
+/*-----------------------------------------------------------------------
+* FUNCTION
+* GPTCB_C2KOS_HISR
+*
+* DESCRIPTION
+* C2K GPT Callback HISR : 1us
+*
+* CALLS
+*
+* PARAMETERS
+* void
+*
+* RETURNS
+* None
+*
+* GLOBALS AFFECTED
+* external_global
+*------------------------------------------------------------------------*/
+DEVDRV_LS_INTSRAM_ROCODE void GPTCB_C2KOS_HISR(void)
+{
+ kal_take_spinlock(gpt_6_spinlock, KAL_INFINITE_WAIT);
+
+ if( KAL_TRUE == gptC2KOS_running )
+ {
+ gptC2KOS_running = KAL_FALSE;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_6_TIMER);
+
+ kal_give_spinlock(gpt_6_spinlock);
+ }
+ else
+ {
+ kal_give_spinlock(gpt_6_spinlock);
+ ASSERT(0);
+ }
+}
+#else
+DEVDRV_LS_INTSRAM_ROCODE void GPTCB_C2KOS_HISR(void)
+{
+ return;
+}
+#endif
+
+/*-----------------------------------------------------------------------
+* FUNCTION
+* GPTCB_US_HISR
+*
+* DESCRIPTION
+* GPT Callback HISR : 10ms
+*
+* CALLS
+*
+* PARAMETERS
+* void
+*
+* RETURNS
+* None
+*
+* GLOBALS AFFECTED
+* external_global
+*------------------------------------------------------------------------*/
+DEVDRV_LS_INTSRAM_ROCODE void GPTCB_LOGGING_HISR(void)
+{
+ kal_take_spinlock(gpt_logging_spinlock, KAL_INFINITE_WAIT);
+
+ if( KAL_TRUE == gptLogging_running )
+ {
+ gptLogging_running = KAL_FALSE;
+ gpt_clk_operation(KAL_TRUE, DRV_GPT_LOGGING_TIMER);
+
+ kal_give_spinlock(gpt_logging_spinlock);
+ gptLogging_instance.gptimer_func(gptLogging_instance.parameter);
+ }
+ else
+ {
+ kal_give_spinlock(gpt_logging_spinlock);
+ }
+}
+
+#else /* else of !defined(DRV_GPT_OFF) */
+
+DCL_STATUS DclSGPT_Initialize(void)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_HANDLE DclSGPT_Open(DCL_DEV dev, DCL_FLAGS flags)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_STATUS DclSGPT_ReadData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN *buf_len, DCL_OPTIONS options)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_STATUS DclSGPT_WriteData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN *buf_len, DCL_OPTIONS options)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_STATUS DclSGPT_Configure(DCL_HANDLE handle, DCL_CONFIGURE_T *configure)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_STATUS DclSGPT_RegisterCallback(DCL_HANDLE handle, DCL_EVENT event, PFN_DCL_CALLBACK callback)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_STATUS DclSGPT_Control(DCL_HANDLE handle, DCL_CTRL_CMD cmd, DCL_CTRL_DATA_T *data)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_STATUS DclSGPT_Close(DCL_HANDLE *handle)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_STATUS DclFGPT_Initialize(void)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_HANDLE DclFGPT_Open(DCL_DEV dev, DCL_FLAGS flags)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_STATUS DclFGPT_ReadData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN *buf_len, DCL_OPTIONS options)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_STATUS DclFGPT_WriteData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN *buf_len, DCL_OPTIONS options)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_STATUS DclFGPT_Configure(DCL_HANDLE handle, DCL_CONFIGURE_T *configure)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_STATUS DclFGPT_RegisterCallback(DCL_HANDLE handle, DCL_EVENT event, PFN_DCL_CALLBACK callback)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_STATUS DclFGPT_Control(DCL_HANDLE handle, DCL_CTRL_CMD cmd, DCL_CTRL_DATA_T *data)
+{
+ return STATUS_UNSUPPORTED;
+}
+
+DCL_STATUS DclFGPT_Close(DCL_HANDLE handle)
+{
+ return STATUS_UNSUPPORTED;
+}
+#if defined (__ESL_COSIM_LTE__) || defined(__MASE__)
+#if defined(__MD93__) || defined(__MD95__)
+void GPTCB_DEBUG_HISR(void)
+{
+}
+#endif
+
+void GPTCB_10MS_HISR(void)
+{
+}
+
+void GPTCB_US_HISR(void)
+{
+}
+
+void GPTCB_LOGGING_HISR(void)
+{
+}
+
+void LITEGPT_ETMR_HISR(void)
+{
+}
+
+void GPTCB_C2KOS_HISR(void)
+{
+}
+
+#endif /* __ESL_COSIM_LTE__ */
+#endif /* end of else of !defined(DRV_GPT_OFF) */
+
+DCL_HANDLE DclHGPT_Open(DCL_DEV dev, DCL_FLAGS flags){return STATUS_UNSUPPORTED;}
+DCL_STATUS DclHGPT_Control(DCL_HANDLE handle, HGPT_CMD cmd, HGPT_CTRL *data){return STATUS_UNSUPPORTED;}
+DCL_STATUS DclHGPT_RegisterCallback(DCL_HANDLE handle, DCL_EVENT event, PFN_DCL_CALLBACK callback){return STATUS_UNSUPPORTED;}
+DCL_STATUS DclHGPT_Close(DCL_HANDLE handle){return STATUS_UNSUPPORTED;}
+
+//#endif
+
diff --git a/mcu/driver/devdrv/gpt/src/drv_gpt.c b/mcu/driver/devdrv/gpt/src/drv_gpt.c
new file mode 100644
index 0000000..096b404
--- /dev/null
+++ b/mcu/driver/devdrv/gpt/src/drv_gpt.c
@@ -0,0 +1,358 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * drv_gpt.c
+ *
+ * Project:
+ * --------
+ * TATAKA
+ *
+ * Description:
+ * ------------
+ * Low level GPT driver
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 07 02 2019 yaoyong.ju
+ * [MOLY00418290] [VMOLY]Remove IRQ_Register_LISR() and IRQSensitivity() From IRQ Initialization Source Code
+ * .Remove IRQ_Restier_LISR and IRQSensitivity API in GPT
+ *
+ * 04 26 2019 yaoyong.ju
+ * [MOLY00399544] [MT6297][Apollo][PreSQC][MP0.5][HQ][MTBF][Lab][Ericsson][ErrorTimes:1][1][core2,vpe1,tc2(vpe7)]Assert fail: drv_gpt.c 287 - (LISR)GPT_DSCC0_Lisr for
+ * .
+ * 1.Remove the debug info
+ * 2.Remove unused code
+ *
+ * 03 25 2019 yaoyong.ju
+ * [MOLY00390408] [MT6297][Apollo][PreSQC][MP0.5][NVIOT][Nokia][Oulu][4G][Overnight]: Assert fail: nicc_ctrl.c 317 - USBCORE
+ * .Add the debug info for the MOLY
+ *
+ * 05 04 2017 way.chen
+ * [MOLY00246761] [UMOLYA] Replace PDN API with OF API, Request by PDN owner(Devin )
+ * Remove 26M on/off API.
+ *
+ * 07 06 2016 way.chen
+ * [MOLY00185478] [UMOLYA] Check in 93 serial GPT driver
+ * Add 26M clock operation.
+ *
+ * 06 20 2016 way.chen
+ * [MOLY00185478] [UMOLYA] Check in 93 serial GPT driver
+ * Check in 93 GPT driver.
+ *
+ * 01 06 2016 way.chen
+ * [MOLY00156138] [UMOLY] Patch GPT driver for U4G FPGA
+ * Patch GPT Driver for U4G FPGA, the FPGA Start Version is 20151231_u4g_ltel2_elbrus_vivado_2015.
+ *
+ * 12 10 2013 chin-chieh.hung
+ * [MOLY00049464] [Driver][GPT] Add debug GPT, request by MS Lin
+ * Add Debug GPT APIs
+ *
+ * 08 26 2013 chin-chieh.hung
+ * [MOLY00011352] [Driver] Update for common devdrv driver
+ * remove compiling warning
+ *
+ * 07 03 2013 chin-chieh.hung
+ * [MOLY00027330] [ARM7toMOLY] ARM7 Build/SYSGEN/Functions Update to TRUNK
+ * .
+ *
+ * 05 13 2013 chin-chieh.hung
+ * [MOLY00013348] [MT6290 Bring-up] Basic Platform Support
+ * MT6290E1_FristCall Branch sync back to MOLY Trunk
+ *
+ * 04 28 2013 chin-chieh.hung
+ * [MOLY00013021] [MT6290 PO admit] Move the LISR context to HISR context
+ * LISR 2 HISR support, driver part
+ *
+ * 04 23 2013 chin-chieh.hung
+ * [MOLY00013021] [MT6290 PO admit] Move the LISR context to HISR context
+ * MOLY LISR2HISR, Driver part
+ ****************************************************************************/
+
+#include "drv_features_gpt.h"
+#include "drv_comm.h"
+
+#include "drv_gpt.h"
+#include "intrCtrl.h"
+
+#include "dcl.h"
+#include "kal_general_types.h"
+#include "kal_public_api.h"
+#include "sync_data.h"
+#if !defined(DRV_GPT_OFF)
+
+/*****************************************************************************
+ * SYMBOL Definition *
+ *****************************************************************************/
+
+
+/*****************************************************************************
+ * Global/External Variable *
+ *****************************************************************************/
+static PFN_DCL_CALLBACK pfHGPTCallback[DRV_GPT_TOTAL_COUNTER];
+static DCL_EVENT eHGPTEvent[DRV_GPT_TOTAL_COUNTER];
+
+/*****************************************************************************
+ * function declaration *
+ *****************************************************************************/
+//function declaration.
+
+
+
+/*****************************************************************************
+ * LISR/HISR/Callback Functions *
+ *****************************************************************************/
+static void drv_default_callback(DCL_EVENT event)
+{
+ kal_uint32 ASSERT_IN_GPT_DEFAULT_CALLBACK = 0;
+ ASSERT(ASSERT_IN_GPT_DEFAULT_CALLBACK);
+ return;
+}
+
+/*****************************************************************************
+ * Basic Driver Implementation *
+ *****************************************************************************/
+
+/*-----------------------------------------------------------------------*
+* FUNCTION
+* drv_gpt_lisr
+*
+* DESCRIPTION
+* GPT interrupt handler (LISR)
+*
+* CALLS
+* It is called when GPT interrupt is coming
+*
+* PARAMETERS
+* None
+*
+* RETURNS
+* None
+*
+* GLOBALS AFFECTED
+* external_global
+*------------------------------------------------------------------------*/
+void drv_gpt_lisr(kal_uint32 v)
+{
+ ASSERT(MDGPT_INTR_ID(DRV_GPT_BASE_COUNTER_NUM) <= v && v <= MDGPT_INTR_ID(DRV_GPT_TOTAL_COUNTER));
+ pfHGPTCallback[MDGPT_INTR_ID2TIMER(v)-1](eHGPTEvent[MDGPT_INTR_ID2TIMER(v)-1]);
+}
+
+/*-----------------------------------------------------------------------*
+* FUNCTION
+* drv_gpt_reset
+*
+* DESCRIPTION
+* This function is to reset the hardware GPT module.
+*
+* PARAMETERS
+* None
+*
+* RETURNS
+* DCL_STATUS_OK
+*
+*------------------------------------------------------------------------*/
+void drv_gpt_reset(void)
+{
+ kal_uint32 i;
+ for(i = DRV_GPT_BASE_COUNTER_NUM; i <= DRV_GPT_TOTAL_COUNTER; i++)
+ {
+ DRV_WriteReg32(MDGPT_CTRL_REG(i), 0);
+ DRV_WriteReg32(MDGPT_CNT_REG(i), 0xFFFFF);
+ DRV_WriteReg32(MDGPT_PSR_REG(i), 0);
+ IRQClearInt(MDGPT_INTR_ID(i));
+
+ pfHGPTCallback[i-1] = drv_default_callback;
+ //IRQUnmask(MDGPT_INTR_ID(i));
+ }
+}
+
+/*-----------------------------------------------------------------------*
+* FUNCTION
+* drv_gpt_set_timer
+*
+* DESCRIPTION
+* This function is to configure the gpt timer.
+*
+* PARAMETERS
+* None
+*
+* RETURNS
+* None
+*
+*------------------------------------------------------------------------*/
+void drv_gpt_set_timer(kal_uint32 num, kal_uint32 time, kal_uint32 mode)
+{
+ ASSERT( (DRV_GPT_BASE_COUNTER_NUM <= num) && (num <= DRV_GPT_TOTAL_COUNTER) && (time <= 0xFFFFFFFUL) );
+ DRV_WriteReg32(MDGPT_CNT_REG(num), time);
+
+ mode &= MDGPT_CTRL_MODE_REPEAT | MDGPT_CTRL_MODE_ONESHOT;
+
+ DRV_WriteReg32_NPW(MDGPT_CTRL_REG(num), mode); //1<<1 enable timer
+}
+
+/*-----------------------------------------------------------------------*
+* FUNCTION
+* drv_gpt_get_data
+*
+* DESCRIPTION
+* This function is to get the current data value.
+*
+* PARAMETERS
+* None
+*
+* RETURNS
+* None
+*
+*------------------------------------------------------------------------*/
+kal_uint32 drv_gpt_get_data(kal_uint32 num)
+{
+ ASSERT( (DRV_GPT_BASE_COUNTER_NUM <= num) && (num <= DRV_GPT_TOTAL_COUNTER));
+ return DRV_Reg32(MDGPT_DATA_REG(num));
+}
+
+void drv_gpt_set_data(kal_uint32 num, kal_uint32 time)
+{
+ ASSERT( (DRV_GPT_BASE_COUNTER_NUM <= num) && (num <= DRV_GPT_TOTAL_COUNTER) && (time <= 0xFFFFFFFUL) );
+ DRV_WriteReg32(MDGPT_CNT_REG(num), time);
+}
+
+/*-----------------------------------------------------------------------*
+* FUNCTION
+* drv_gpt_start_timer
+*
+* DESCRIPTION
+* This function is to start the gpt timer.
+*
+* PARAMETERS
+* None
+*
+* RETURNS
+* None
+*
+*------------------------------------------------------------------------*/
+void drv_gpt_start_timer(kal_uint32 num)
+{
+ unsigned int timer_status;
+
+ ASSERT( (num >= DRV_GPT_BASE_COUNTER_NUM) && (DRV_GPT_TOTAL_COUNTER >= num) );
+
+ timer_status = DRV_Reg32(MDGPT_CTRL_REG(num));
+
+ if( timer_status & MDGPT_CTRL_MODE_ENABLE ){
+ //ASSERT(0);
+ return;
+ }
+ DRV_WriteReg32_NPW(MDGPT_CTRL_REG(num), timer_status | MDGPT_CTRL_MODE_ENABLE);
+ Data_Sync_Barrier();
+}
+
+/*-----------------------------------------------------------------------*
+* FUNCTION
+* drv_gpt_stop_timer
+*
+* DESCRIPTION
+* This function is to start the gpt timer.
+*
+* PARAMETERS
+* None
+*
+* RETURNS
+* None
+*
+*------------------------------------------------------------------------*/
+void drv_gpt_stop_timer(kal_uint32 num)
+{
+ unsigned int timer_status;
+
+ ASSERT( (num >= DRV_GPT_BASE_COUNTER_NUM) && (DRV_GPT_TOTAL_COUNTER >= num) );
+
+ timer_status = DRV_Reg32(MDGPT_CTRL_REG(num));
+
+ DRV_WriteReg32_NPW(MDGPT_CTRL_REG(num), timer_status & (~MDGPT_CTRL_MODE_ENABLE));
+ Data_Sync_Barrier();
+}
+
+kal_uint32 drv_gpt_get_version(void)
+{
+ return DRV_Reg32(MDGPT_BASE);
+}
+
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+
+#else /*!defined(DRV_GPT_OFF)*/
+
+#endif /*!defined(DRV_GPT_OFF)*/
+
+void startSystemTimer(void){
+ IRQUnmask(MDGPT_INTR_ID(DRV_GPT_SYSTEM_TIMER));
+ drv_gpt_start_timer(DRV_GPT_SYSTEM_TIMER);
+}
+
diff --git a/mcu/driver/devdrv/gpt/src/drv_litegpt.c b/mcu/driver/devdrv/gpt/src/drv_litegpt.c
new file mode 100644
index 0000000..5bca9f7
--- /dev/null
+++ b/mcu/driver/devdrv/gpt/src/drv_litegpt.c
@@ -0,0 +1,115 @@
+#include "drv_features_gpt.h"
+#include "drv_comm.h"
+
+#include "drv_litegpt.h"
+//#include "intrCtrl.h"
+
+#include "dcl.h"
+#include "kal_general_types.h"
+#include "kal_public_api.h"
+#include "sync_data.h"
+#include "us_timer.h"
+
+/*****************************************************************************
+ * Basic Driver Implementation *
+ *****************************************************************************/
+
+
+void drv_litegpt_reset(void)
+{
+ kal_uint32 i;
+
+ //PDN_CLR(PDN_GPT_CTL);
+ //Way: Need PDN setting??
+
+ for(i = 0; i < 2; i++){
+ DRV_WriteReg32(LITE_GPT_BASE+(i<<3), 0); //CTRL
+ DRV_WriteReg32(LITE_GPT_BASE+0x04+(i<<3), 0xFFFFUL);//Len
+ DRV_WriteReg32(LITE_GPT_BASE+0x14+(i<<2), 0x4);//Prescalar
+ }
+ DRV_Reg32(LITE_GPT_BASE+0x10);//STAT1/STATE2 clear
+
+}
+
+/* time = count value */
+void drv_litegpt_set_timer(kal_uint32 num, kal_uint32 time, kal_uint32 mode, kal_uint32 prescaler)
+{
+
+ ASSERT((3 <= num) && (num <= 4) && (time <= (0xFFFFUL + 1)));
+ DRV_WriteReg32_NPW(LITE_GPT_BASE + 0x04 + ((num-3)<<3 ), (time - 1));//[Way] 1T prescaler error range still here?
+}
+
+void drv_litegpt_start_timer(kal_uint32 num)
+{
+ ASSERT((3 <= num) && (num <= 4));
+ DRV_WriteReg32_NPW(LITE_GPT_BASE + ((num-3)<<3 ), 0x1);//[Way] bit0 and bit1 can write together?
+
+ Data_Sync_Barrier();
+}
+
+void drv_litegpt_stop_timer(kal_uint32 num)
+{
+ ASSERT((3 <= num) && (num <= 4));
+ DRV_WriteReg32_NPW(LITE_GPT_BASE + ((num-3)<<3 ), 0x2);//[Way] mask bit1
+
+ Data_Sync_Barrier();
+}
+
+kal_uint32 drv_litegpt_time_remaining(kal_uint32 num)
+{
+ kal_uint32 remain_tick;
+ kal_uint32 cmp_val1 = 0;
+ kal_uint32 cmp_val2 = 0;
+ kal_uint32 loop = 0;
+
+ ASSERT((3 <= num) && (num <= 4));
+ //[Way] designer will provide algorithm for remain tick
+ cmp_val1 = DRV_Reg32(LITE_GPT_BASE + 0x38 + ((num-3)<<2)) & 0xFFFF0000;
+ while(1)
+ {
+ cmp_val2 = DRV_Reg32(LITE_GPT_BASE + 0x38 + ((num-3)<<2)) & 0xFFFF0000;
+ if(cmp_val1 == cmp_val2)
+ {
+ break;
+ }
+ else
+ {
+ loop++;
+ if(loop >= 4)//less than 4 times
+ {
+ ASSERT(0);
+ }
+ cmp_val1 = cmp_val2;
+ }
+ }
+ remain_tick = (cmp_val2 >> 16);
+
+ if(0xFFFF == remain_tick)//alreay start but in 0xFFFF stage
+ {
+ return DRV_Reg32((LITE_GPT_BASE + 0x4 + ((num - 3)<<3)));
+ }
+
+ return remain_tick;
+}
+
+void drv_litegpt_set_wakeup_gpt(kal_uint32 time_tick)//the duration is about 1/32K*time_tick us, min/max = 4/0xffff
+{
+ ASSERT((4 <= time_tick) && (time_tick <= 0xFFFEUL));
+ drv_litegpt_set_timer(TOPSM_TEST_LITEGPT_WAKEUP, time_tick - 1,LITEGPT_CTRL_MODE_ONESHOT , LITEGPT_MIN_PRESCALE);
+ drv_litegpt_start_timer(TOPSM_TEST_LITEGPT_WAKEUP);
+}
+
+void drv_litegpt_clr_wakeup_event(void)
+{
+ kal_uint16 INT_Status;
+ //kal_uint16 Wakeup_Status;
+ INT_Status = DRV_Reg32(LITE_GPT_BASE + 0x10);//RU type register
+ //DRV_WriteReg32_NPW(LITE_GPT_BASE + 0x10, INT_Status);//W1C interrupt status
+
+ //Wakeup_Status = DRV_Reg32(LITE_GPT_BASE + 0x34);
+ DRV_WriteReg32_NPW(LITE_GPT_BASE + 0x34, INT_Status); //clear wakeup event/interrupt
+ while(0 != DRV_Reg32(LITE_GPT_BASE + 0x10));
+}
+
+
+