[Feature]Upload Modem source code
Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/interface/driver/devdrv/pcie/pcie_if.h b/mcu/interface/driver/devdrv/pcie/pcie_if.h
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+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * pcie.h
+ *
+ * Project:
+ * --------
+ * VMOLY
+ *
+ * Description:
+ * ------------
+ * PCIE device driver
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 10 09 2020 cindy.tu
+ * [MOLY00579078] [MT6880][Colgin][M.2][Low Power] Colgin Data Card(連 RVP) Flight mode suspend current: 4.3 mA > target 4.1 mA
+ *
+ * .
+ *
+ * 08 14 2020 cody.lee
+ * [MOLY00558825] [Colgin] PCIE Loopback Test - add test option for one lane
+ * .
+ *
+ * 07 16 2020 cindy.tu
+ * [MOLY00520457] [PCIE][Colgin] PCIE driver
+ * Fix modis link error.
+ *
+ * 07 13 2020 cody.lee
+ * [MOLY00545672] [Colgin] PCIE MTCMOS CTRL API
+ *
+ * 06 01 2020 cindy.tu
+ * [MOLY00520457] [PCIE][Colgin] PCIE driver
+ *
+ * Sync pcie driver and fix build error
+ *
+ * 05 25 2020 cindy.tu
+ * [MOLY00503259] [PCIE][M70] PCIE link API
+ *
+ * Set SPM to use high speed clock instead of 32K when PCIE in low power state
+ *
+ *
+ ****************************************************************************/
+
+#ifndef __PCIE_IF_H__
+#define __PCIE_IF_H__
+
+typedef enum{
+ PCIE_LINK_READY = 0,
+ PCIE_NOT_INIT_ERR = 1,
+ PCIE_LINK_NOT_READY = 2,
+ PCIE_LINK_NOT_STABLE = 3,
+ PCIE_LINK_UNKNOWN = 0xF,
+}PCIE_detect_result_e;
+typedef struct _pcie_link_status{
+ kal_uint32 lane_num;
+ kal_uint32 rate_level;
+}pcie_link_status_t;
+
+PCIE_detect_result_e pcie_detect(void);
+
+#ifdef __MTK_TARGET__
+PCIE_detect_result_e pcie_get_link_state(void);
+#else
+#define pcie_get_link_state() (PCIE_LINK_UNKNOWN)
+#endif
+
+void pcie_report_link_status(pcie_link_status_t* pcie_link_status);
+
+extern kal_bool pcie_phy_loopback_test(kal_uint32);
+
+extern void pcie_mac_mtcmos_ctrl(kal_bool);
+extern void pcie_phy_mtcmos_ctrl(kal_bool);
+extern void pcie_cg_enable(void);
+extern void pcie_cg_disable(void);
+
+#endif