[Feature]Upload Modem source code

Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/interface/driver/sys_drv/sync_data.h b/mcu/interface/driver/sys_drv/sync_data.h
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+++ b/mcu/interface/driver/sys_drv/sync_data.h
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+/*****************************************************************************
+*  Copyright Statement:
+*  --------------------
+*  This software is protected by Copyright and the information contained
+*  herein is confidential. The software may not be copied and the information
+*  contained herein may not be used or disclosed except with the written
+*  permission of MediaTek Inc. (C) 2020
+*
+*  BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+*  THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+*  RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+*  AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+*  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+*  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+*  NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+*  SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+*  SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+*  THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+*  NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+*  SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+*  BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+*  LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+*  AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+*  OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+*  MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+*  THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+*  WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+*  LAWS PRINCIPLES.  ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+*  RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+*  THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+#ifndef __SYNC_DATA_H__
+#define __SYNC_DATA_H__
+
+#include "reg_base.h"
+#include "mips_ia_utils_public.h"
+
+// DSB: Data_Sync_Barrier()
+#if defined(__MIPS_I7200__) && defined(__MTK_TARGET__)
+# define Data_Sync_Barrier()    miu_syncn(7)
+# define MO_Sync()              miu_syncn(6)
+# define MM_Sync()              miu_syncn(3)
+# define Data_Coherent_Sync()   miu_syncn(0x10)
+#elif defined(__MIPS_IA__) && defined(__MTK_TARGET__)
+# define Data_Sync_Barrier() do {           \
+        register kal_uint32 __tmp__;        \
+        __asm__ volatile (                  \
+            "sync 0x3\n"                    \
+            "lw   %0, 0(%1)\n"              \
+            "sw   %0, 0(%1)\n"              \
+            :"=&d"(__tmp__)                 \
+            :"d"(BASE_ADDR_MO_SYNC_MAGIC)   \
+            : "memory"                      \
+        );\
+    } while (0)
+# define MO_Sync() do {                     \
+        register kal_uint32 __tmp__;        \
+        __asm__ volatile (                  \
+            "sw   %0, 0(%1)\n"              \
+            "lw   %0, 0(%1)\n"              \
+            "sw   %0, 0(%1)\n"              \
+            :"=&d"(__tmp__)                 \
+            :"d"(BASE_ADDR_MO_SYNC_MAGIC)   \
+            : "memory"                      \
+        );\
+    } while (0)
+# define MM_Sync()              miu_syncn(3)
+# define Data_Coherent_Sync()   do {} while(0)
+#else /* __MIPS_IA__ && __MTK_TARGET__ */
+#define Data_Sync_Barrier()     do {} while(0)
+#define MO_Sync()               do {} while(0)
+#define MM_Sync()               do {} while(0)
+#define Data_Coherent_Sync()    do {} while(0)
+#endif /* __MIPS_IA__ && __MTK_TARGET__ */
+
+// DMB: Data_Mem_Barrier()
+#define Data_Mem_Barrier()      do {} while(0)
+
+// ISB: Inst_Sync_Barrier()
+#define Inst_Sync_Barrier()     do {} while(0)
+
+#endif /* __SYNC_DATA_H__ */