[Feature]Upload Modem source code
Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/interface/l1/cl1/common/HW/cphrxdfeatimer.h b/mcu/interface/l1/cl1/common/HW/cphrxdfeatimer.h
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+++ b/mcu/interface/l1/cl1/common/HW/cphrxdfeatimer.h
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+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2016
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+#ifndef _CPH_RX_DFE_ATTIMER_H_
+#define _CPH_RX_DFE_ATTIMER_H_
+
+
+typedef volatile unsigned short* SRAMADDR; /* SRAM addr is 16 bits */
+typedef volatile unsigned short SRAMDATA; /* SRAM data is 16 bits */
+typedef volatile unsigned short* APBADDR; /* APB addr is 16 bits */
+typedef volatile unsigned short APBDATA; /* APB data is 16 bits */
+typedef volatile unsigned long* APBADDR32; /* APB addr is 32 bits */
+typedef volatile unsigned long APBDATA32; /* APB data is 32 bits */
+typedef volatile unsigned short* DPRAMADDR; /* DPRAM addr is 16 bits */
+typedef volatile signed short* DPRAMADDR_S; /* DPRAM addr is 16 bits */
+typedef volatile unsigned short DPRAMDATA; /* DPRAM data is 16 bits */
+
+
+#define RXDFE_ATIMER_REG_BASE (0xA70D0000)
+
+#define RXDFE_ATIMER_end (RXDFE_ATIMER_REG_BASE + 0x00000004 + 1*4)
+
+
+
+#define RG_RXDFE_ATIMER_TRG ((APBADDR32)(RXDFE_ATIMER_REG_BASE + 0x00000000))
+#define RG_RXDFE_ATIMER_RO ((APBADDR32)(RXDFE_ATIMER_REG_BASE + 0x00000004))
+
+
+#define RG_RXDFE_ATIMER_TRG_atimer_f52m_trg_LSB (31)
+#define RG_RXDFE_ATIMER_TRG_atimer_f52m_trg_WIDTH (1)
+#define RG_RXDFE_ATIMER_TRG_atimer_f52m_trg_MASK (0x80000000)
+#define RG_RXDFE_ATIMER_TRG_atimer_f52m_trg_BIT (0x80000000)
+
+#define RG_RXDFE_ATIMER_TRG_atimer_f52m_stp_LSB (30)
+#define RG_RXDFE_ATIMER_TRG_atimer_f52m_stp_WIDTH (1)
+#define RG_RXDFE_ATIMER_TRG_atimer_f52m_stp_MASK (0x40000000)
+#define RG_RXDFE_ATIMER_TRG_atimer_f52m_stp_BIT (0x40000000)
+
+#define RG_RXDFE_ATIMER_TRG_atimer_f2p17m_trg_LSB (16)
+#define RG_RXDFE_ATIMER_TRG_atimer_f2p17m_trg_WIDTH (1)
+#define RG_RXDFE_ATIMER_TRG_atimer_f2p17m_trg_MASK (0x00010000)
+#define RG_RXDFE_ATIMER_TRG_atimer_f2p17m_trg_BIT (0x00010000)
+
+#define RG_RXDFE_ATIMER_TRG_atimer_f2p17m_stp_LSB (15)
+#define RG_RXDFE_ATIMER_TRG_atimer_f2p17m_stp_WIDTH (1)
+#define RG_RXDFE_ATIMER_TRG_atimer_f2p17m_stp_MASK (0x00008000)
+#define RG_RXDFE_ATIMER_TRG_atimer_f2p17m_stp_BIT (0x00008000)
+
+#define RG_RXDFE_ATIMER_RO_atimer_f52m_status_LSB (31)
+#define RG_RXDFE_ATIMER_RO_atimer_f52m_status_WIDTH (1)
+#define RG_RXDFE_ATIMER_RO_atimer_f52m_status_MASK (0x80000000)
+#define RG_RXDFE_ATIMER_RO_atimer_f52m_status_BIT (0x80000000)
+
+#define RG_RXDFE_ATIMER_RO_atimer_f2p17m_status_LSB (16)
+#define RG_RXDFE_ATIMER_RO_atimer_f2p17m_status_WIDTH (1)
+#define RG_RXDFE_ATIMER_RO_atimer_f2p17m_status_MASK (0x00010000)
+#define RG_RXDFE_ATIMER_RO_atimer_f2p17m_status_BIT (0x00010000)
+
+
+#endif //#ifndef _CPH_RX_DFE_ATTIMER_H_