[Feature]Upload Modem source code

Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/interface/l1/cl1/common/cl1rcapi.h b/mcu/interface/l1/cl1/common/cl1rcapi.h
new file mode 100644
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+++ b/mcu/interface/l1/cl1/common/cl1rcapi.h
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+/*****************************************************************************
+*  Copyright Statement:
+*  --------------------
+*  This software is protected by Copyright and the information contained
+*  herein is confidential. The software may not be copied and the information
+*  contained herein may not be used or disclosed except with the written
+*  permission of MediaTek Inc. (C) 2016
+*
+*  BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+*  THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+*  RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+*  AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+*  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+*  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+*  NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+*  SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+*  SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+*  THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+*  NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+*  SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+*  BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+*  LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+*  AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+*  OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+*  MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+*  THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+*  WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+*  LAWS PRINCIPLES.  ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+*  RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+*  THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+#ifndef _CL1_RCAPI_H_
+#define _CL1_RCAPI_H_
+
+/***********************************************************************************
+* 
+* FILE NAME   :     cl1rcapi.h
+*
+* DESCRIPTION :   extern RC API
+*
+*
+************************************************************************************/
+#include "cl1rcreq.h"
+
+#if defined(__FPGA__) || defined(CL1_RC_DRV_DSP_SLEEP_FLOW_ONLY)
+#define CL1_RC_DRV_BOOTUP_TEMP
+#endif
+
+#if defined(MT6739) /* if ZION */
+#define C2K_DVFS_TX_CONTROL
+#endif
+
+typedef enum
+{
+    CL1_RC_SEQ_RAKE_DEACT_NULL,
+    CL1_RC_SEQ_RAKE_DEACT_WAIT,
+    CL1_RC_SEQ_RAKE_DEACT_SCHE,
+    CL1_RC_SEQ_RAKE_DEACT_EXE,
+    CL1_RC_SEQ_RAKE_DEACT_STAT_NUM
+}Cl1RcSeqRakeDeactStateT;
+
+typedef enum
+{
+    CL1_RC_SEQ_RAKE_DEACT_RCOFF_EVT,
+    CL1_RC_SEQ_RAKE_DEACT_D2BIFOFF_EVT,
+    CL1_RC_SEQ_RAKE_DEACT_CLR_EVT,
+    CL1_RC_SEQ_RAKE_DEACT_EVT_NUM
+}Cl1RcSeqRakeDeactEvtT;
+
+extern void Cl1RcInit(void);
+
+extern void Cl1RcReqInit(void);
+
+extern void Cl1ShRcSeqRttPeriodicalTrigger(void);
+
+extern void Cl1ShRcSeqEvdoPeriodicalTrigger(void);
+
+#if (defined(__MTK_TARGET__)&&(defined(__MD97__)||defined(__MD97P__))&&defined(CL1_RC_DRV_BOOTUP_TEMP)) || (defined(MT6763)||defined(MT6739))
+extern void Cl1RcdForceAllOn(void);
+#endif
+
+#if defined(__MD93__)||defined(__MD95__)
+extern void Cl1RcdTxRcOnNsftMode(void);
+#endif
+
+extern kal_uint8 Cl1RcReqRxOn(Cl1RcReqRxOnT *RxOn);
+
+extern void Cl1RcReqRxOff(Cl1RcReqRxOffT *RxOff);
+
+extern kal_uint8 Cl1RcReqTxOn(Cl1RcReqTxOnOffT *TxOn);
+
+extern void Cl1RcReqTxOff(Cl1RcReqTxOnOffT *TxOff);
+
+extern void Cl1RcReqSchOff(Cl1RcReqSchOffT *SchOff);
+
+extern void Cl1RcUtilGetRfOnTime(Cl1RcReqRxOnT *RxOn,SysSFrameTimeT * RfActionTime);
+
+extern void Cl1ShRcRakeOffTrigger(SysAirInterfaceT Mode);
+
+extern void Cl1RcdRakeOff(SysAirInterfaceT Mode);
+
+extern void Cl1RcdHwInit(void);
+
+extern void Cl1RcdBrpsysDvitReset(SysAirInterfaceT Mode);
+
+extern void Cl1RcSeqRakeDeactSchedule(SysAirInterfaceT Mode, Cl1RcSeqRakeDeactEvtT Evt);
+
+extern void Cl1RcdBrpsysTurboReset(SysAirInterfaceT Mode);
+
+extern void Cl1RcUtilRfOnMergeNotification(SysAirInterfaceT Mode);
+
+extern void Cl1RcdPartialBypassConf(SysAirInterfaceT Mode, kal_uint32 Conf1, kal_uint32 Conf2, kal_uint32 Conf3);
+
+extern void Cl1RcReqModemDvfsScenSet(SysAirInterfaceT Mode, Cl1RcReqModemDvfsUsrT Usr, Cl1RcdDvfsScenT Scen);
+
+extern void Cl1RcReqModemDvfsScenCancel(SysAirInterfaceT Mode, Cl1RcReqModemDvfsUsrT Usr);
+
+extern void Cl1RcdCssysSramOnOff(SysAirInterfaceT Mode,kal_bool Off);
+#endif
+
+