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Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/interface/l1/idc/idc_el1mpc_str.h b/mcu/interface/l1/idc/idc_el1mpc_str.h
new file mode 100644
index 0000000..c81e97b
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_el1mpc_str.h
@@ -0,0 +1,21 @@
+#ifndef _IDC_EL1MPC_STR_H
+#define _IDC_EL1MPC_STR_H
+
+#include "kal_general_types.h"
+#include "kal_public_defs.h"
+#include "global_type.h"
+#include "el1d_trace_public_common.h"
+#include "idc_lte_def.h"
+
+typedef struct _el1_mpc_idc_meas_object_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ EARFCN dlEARFCN[MAX_LTE_SUPPORT_MEAS_FREQ_NUM];
+ LTE_BAND_E band[MAX_LTE_SUPPORT_MEAS_FREQ_NUM];
+ kal_uint8 num;
+ kal_uint8 measBW[MAX_LTE_SUPPORT_MEAS_FREQ_NUM];
+ kal_uint16 dlFreq[MAX_LTE_SUPPORT_MEAS_FREQ_NUM];
+}el1_mpc_idc_meas_object_ntf_struct;
+
+#endif
diff --git a/mcu/interface/l1/idc/idc_el1rx_enum.h b/mcu/interface/l1/idc/idc_el1rx_enum.h
new file mode 100644
index 0000000..8e6242b
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_el1rx_enum.h
@@ -0,0 +1,67 @@
+#ifndef _IDC_EL1CH_ENUM_H
+#define _IDC_EL1CH_ENUM_H
+
+typedef enum
+{
+ IDC_LTE_DUPLEX_FDD = 0,
+ IDC_LTE_DUPLEX_TDD = 1,
+ IDC_LTE_DUPLEX_FS3 = 2,
+ IDC_LTE_DUPLEX_UNKNOW = 3
+}el1_ch_idc_duplex_mode_enum;
+
+typedef enum
+{
+ IDC_LTE_DRX_TYPE_NO_DRX = 0,
+ IDC_LTE_DRX_TYPE_SHORT_DRX = 1,
+ IDC_LTE_DRX_TYPE_LONG_DRX = 2
+}el1_ch_idc_drx_type_enum;
+
+typedef enum
+{
+ IDC_LTE_RX_PROTECT_INTRA_CS = 0,
+ IDC_LTE_RX_PROTECT_INTRA_MEAS = 1,
+ IDC_LTE_RX_PROTECT_SRV_BCCH = 2,
+ IDC_LTE_RX_PROTECT_PAGING = 3,
+ IDC_LTE_RX_PROTECT_INTER_CS_MEAS = 4,
+ IDC_LTE_RX_PROTECT_CSR = 5,
+ IDC_LTE_RX_PROTECT_NBR_BCCH = 6,
+ IDC_LTE_RX_PROTECT_DLSYNC_CAL = 7,
+ IDC_LTE_RX_PROTECT_PRESYNC = 8,
+ IDC_LTE_RX_PROTECT_INTRA_POS = 9,
+ IDC_LTE_RX_PROTECT_SCELL_INTRA_RSSI = 10,
+ IDC_LTE_RX_PROTECT_MBMS = 11,
+ IDC_LTE_RX_PROTECT_POS_PRESYNC = 12,
+ IDC_LTE_RX_PROTECT_TYPE_NUM = 13
+}idc_el1_phs_rx_protect_type_enum;
+
+typedef enum
+{
+ IDC_LTE_RX_STATUS_NONE = 0,
+ IDC_LTE_RX_STATUS_SUSP = 1,
+ IDC_LTE_RX_STATUS_RESU = 2,
+ IDC_LTE_RX_STATUS_INVALID = 3
+}idc_el1_phs_rx_status_enum;
+
+typedef enum
+{
+ LTE_CNF_FAIL = 0,
+ LTE_CNF_SUCCESS = 1,
+ LTE_CNF_INVALID = 2
+}el1_phs_idc_cnf_status_enum;
+
+typedef enum
+{
+ EL1_IDC_RAT_STATUS_FLIGHT = 0,
+ EL1_IDC_RAT_STATUS_ACTIVE = 1,
+ EL1_IDC_RAT_STATUS_STANDBY = 2
+}el1_idc_rat_status_enum;
+
+#if ((defined(__IDC_ENABLED__)) && (defined (__IDC_NRTC_ENABLE__)))
+typedef enum
+{
+ EL1_IDC_BAND_CALSS_PC3 = 0,
+ EL1_IDC_BAND_CALSS_PC2 = 1
+}el1_idc_power_class_enum;
+#endif
+
+#endif
\ No newline at end of file
diff --git a/mcu/interface/l1/idc/idc_el1rx_str.h b/mcu/interface/l1/idc/idc_el1rx_str.h
new file mode 100644
index 0000000..f6826ca
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_el1rx_str.h
@@ -0,0 +1,138 @@
+#ifndef _IDC_EL1RX_STR_H
+#define _IDC_EL1RX_STR_H
+
+#include "kal_general_types.h"
+#include "kal_public_defs.h"
+#include "global_type.h"
+#include "el1_comm_inter_category_public.h"
+#include "idc_lte_def.h"
+#include "idc_el1rx_enum.h"
+#include "el1_enum.h"
+#include "abs_time.h"
+
+typedef struct _el1_ch_idc_freq_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ EARFCN dlEarfcn[IDC_LTE_CC_NUM];
+ EARFCN ulEarfcn[IDC_LTE_CC_NUM];
+ LTE_BAND_E band[IDC_LTE_CC_NUM];
+#if ((defined(__IDC_ENABLED__)) && (defined (__IDC_NRTC_ENABLE__)))
+ el1_idc_power_class_enum powerclass[IDC_LTE_CC_NUM];
+#endif
+ el1_ch_idc_duplex_mode_enum duplexMode[IDC_LTE_CC_NUM];
+
+ kal_uint8 srv_num;
+ kal_uint8 dlBw[IDC_LTE_CC_NUM];
+ kal_uint8 ulBw[IDC_LTE_CC_NUM];
+ kal_uint16 dlFreq[IDC_LTE_CC_NUM];
+ kal_uint16 ulFreq[IDC_LTE_CC_NUM];
+}el1_ch_idc_freq_ntf_struct;
+
+typedef struct _el1_ch_idc_frame_cfg_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 srv_num;
+ kal_uint8 ulDlCfg[IDC_LTE_CC_NUM];
+ kal_uint8 specialSubframeCfg[IDC_LTE_CC_NUM];
+ kal_bool isNormalCp[IDC_LTE_CC_NUM];
+}el1_ch_idc_frame_cfg_ntf_struct;
+
+typedef struct _el1_ch_idc_sch_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool enterSch;
+}el1_ch_idc_sch_ntf_struct;
+
+typedef struct _el1_ch_idc_drx_config_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool isNoDRX;
+ kal_uint16 onDuration;
+ kal_uint16 startOffst;
+ kal_uint16 shortDrxCycle;
+ kal_uint16 longDrxCycle;
+ el1_ch_idc_drx_type_enum drxType;
+}el1_ch_idc_drx_config_ntf_struct;
+
+typedef struct _el1_ch_idc_ho_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool isHO;
+}el1_ch_idc_ho_ntf_struct;
+
+typedef struct _idc_el1_phs_rx_protect_status_struct
+{
+ LTE_SIM_INDEX sim_index;
+ kal_bool active;
+ kal_uint8 ccIndex;
+ kal_uint16 freq;
+ idc_el1_phs_rx_protect_type_enum type;
+}idc_el1_phs_rx_protect_status_struct;
+
+typedef struct _el1_phs_idc_psim_swap_req_struct
+{
+ LOCAL_PARA_HDR
+
+ LTE_SIM_INDEX new_psim_index;
+}el1_phs_idc_psim_swap_req_struct;
+
+typedef struct _idc_el1_phs_rx_gap_susp_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 seq_num;
+ idc_el1_phs_rx_status_enum rx_status[IDC_LTE_CC_NUM];
+ ABS_TICK_TIME gap_endTime[IDC_LTE_CC_NUM];
+}idc_el1_phs_rx_gap_susp_req_struct;
+
+typedef struct _idc_el1_phs_rx_gap_resu_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 seq_num;
+ idc_el1_phs_rx_status_enum rx_status[IDC_LTE_CC_NUM];
+}idc_el1_phs_rx_gap_resu_ind_struct;
+
+typedef struct _el1_phs_idc_rx_gap_susp_cnf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 ack_num;
+ el1_phs_idc_cnf_status_enum cnf_status;
+}el1_phs_idc_rx_gap_susp_cnf_struct;
+
+typedef struct _idc_el1_phs_wifi_5g_status_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool wifi_5g_status;
+}idc_el1_phs_wifi_5g_status_ind_struct;
+
+typedef struct _el1_irt_idc_actv_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ el1_idc_rat_status_enum lte_rat_status;
+ el1_rat_set_cause_enum cause;
+}el1_irt_idc_actv_ntf_struct;
+
+typedef struct _idc_el1_phs_psim_swap_cnf_struct
+{
+ LOCAL_PARA_HDR
+
+ LTE_SIM_INDEX sim_index;
+}idc_el1_phs_psim_swap_cnf_struct;
+#if ((defined(__IDC_ENABLED__)) && (defined (__IDC_NRTC_ENABLE__)))
+typedef struct _idc_el1_nrtc_tx_power_breach_threshold_ind_struct
+{
+ LOCAL_PARA_HDR
+ kal_uint8 cc_idx;
+ kal_bool breachThreshold;
+}idc_el1_nrtc_tx_power_breach_threshold_ind_struct;
+#endif
+#endif
\ No newline at end of file
diff --git a/mcu/interface/l1/idc/idc_el1tx_str.h b/mcu/interface/l1/idc/idc_el1tx_str.h
new file mode 100644
index 0000000..2729717
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_el1tx_str.h
@@ -0,0 +1,33 @@
+#ifndef _IDC_EL1TX_STR_H
+#define _IDC_EL1TX_STR_H
+
+#include "kal_general_types.h"
+#include "kal_public_defs.h"
+#include "global_type.h"
+#include "abs_time.h"
+
+#include "idc_lte_def.h"
+
+typedef struct _el1tx_idc_tdm_cell_list_struct
+{
+ kal_uint8 cc_index;
+ kal_uint32 duration;
+ kal_uint32 lead_time;
+ ABS_TICK_TIME strtTime;
+}el1tx_idc_tdm_cell_list_struct;
+
+typedef struct _el1tx_idc_scell_actv_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 srvActvBmp;
+}el1tx_idc_scell_actv_ntf_struct;
+
+typedef struct _el1tx_idc_tx_status_struct
+{
+ kal_uint8 enableBmp;
+ kal_uint32 TxFrcTime;
+ kal_int8 TxPwrState[IDC_LTE_CC_NUM];
+}el1tx_idc_tx_status_struct;
+
+#endif
\ No newline at end of file
diff --git a/mcu/interface/l1/idc/idc_emac_enum.h b/mcu/interface/l1/idc/idc_emac_enum.h
new file mode 100644
index 0000000..8c43793
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_emac_enum.h
@@ -0,0 +1,16 @@
+#ifndef _IDC_EMAC_ENUM_H
+#define _IDC_EMAC_ENUM_H
+
+typedef enum
+{
+ IDC_PROTECTED_ACTION_START = 0,
+ IDC_PROTECTED_ACTION_STOP = 1
+}idc_protected_action_enum;
+
+typedef enum
+{
+ IDC_PROTECTED_TYPE_DEFAULT = 0,
+ IDC_PROTECTED_TYPE_RA = 1
+}idc_protected_type_enum;
+
+#endif
\ No newline at end of file
diff --git a/mcu/interface/l1/idc/idc_emac_str.h b/mcu/interface/l1/idc/idc_emac_str.h
new file mode 100644
index 0000000..9ce3194
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_emac_str.h
@@ -0,0 +1,39 @@
+#ifndef _IDC_EMAC_STR_H
+#define _IDC_EMAC_STR_H
+
+#include "kal_public_defs.h"
+#include "kal_general_types.h"
+#include "abs_time.h"
+
+#include "el1_cnst.h"
+#include "idc_emac_enum.h"
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 ccIndex;
+ idc_protected_action_enum idc_action;
+ idc_protected_type_enum protected_type;
+} emac_idc_idc_protect_ntf_struct;
+
+typedef struct
+{
+ kal_uint8 ccIndex;
+ kal_uint32 duration;
+ kal_uint32 leadTime;
+ ABS_TICK_TIME startTime;
+}idc_emac_cell_list_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+#ifdef __GEMINI_LTE__
+ kal_uint8 sim_index;
+#endif
+
+ idc_emac_cell_list_struct cell_list[MAX_NUM_SUPPORT_UL_CELLS];
+}idc_emac_tdm_ind_struct;
+
+#endif
\ No newline at end of file
diff --git a/mcu/interface/l1/idc/idc_errc_enum.h b/mcu/interface/l1/idc/idc_errc_enum.h
new file mode 100644
index 0000000..ff263f8
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_errc_enum.h
@@ -0,0 +1,88 @@
+#ifndef _IDC_ERRC_ENUM_H
+#define _IDC_ERRC_ENUM_H
+
+typedef enum
+{
+ AUTO_DENIAL_SUBFRAME_N2 = 2,
+ AUTO_DENIAL_SUBFRAME_N5 = 5,
+ AUTO_DENIAL_SUBFRAME_N10 = 10,
+ AUTO_DENIAL_SUBFRAME_N15 = 15,
+ AUTO_DENIAL_SUBFRAME_N20 = 20,
+ AUTO_DENIAL_SUBFRAME_N30 = 30,
+ AUTO_DENIAL_SUBFRAME_INVALID = 0xFF
+}auto_denial_subframe_enum;
+
+typedef enum
+{
+ AUTO_DENIAL_VALIDITY_SF200 = 200,
+ AUTO_DENIAL_VALIDITY_SF500 = 500,
+ AUTO_DENIAL_VALIDITY_SF1000 = 1000,
+ AUTO_DENIAL_VALIDITY_SF2000 = 2000,
+ AUTO_DENIAL_VALIDITY_INVALID = 0xFF
+}auto_denial_validity_enum;
+
+typedef enum
+{
+ IDC_INT_DIR_EUTRA = 0,
+ IDC_INT_DIR_OTHER = 1,
+ IDC_INT_DIR_BOTH = 2,
+ IDC_INT_DIR_EUTRA_NR = 3,
+ IDC_INT_DIR_NR = 4,
+ IDC_INT_DIR_EUTRA_NR_OTHER = 5,
+ IDC_INT_DIR_NR_OTHER = 6
+}idc_interference_direction_enum;
+
+typedef enum
+{
+ IDC_SF_CFG_FDD = 0,
+ IDC_SF_CFG_TDD0 = 1,
+ IDC_SF_CFG_TDD15 = 2,
+ IDC_SF_CFG_TDD6 = 3,
+ IDC_SF_CFG_MAX = 4,
+ IDC_SF_CFG_INVALID = 0xFF
+}idc_sf_config_enum;
+
+typedef enum
+{
+ IDC_ASSIST_INFO_TYPE_INVALID = 0,
+ IDC_DRX_ASSIST_INFO = 1,
+ IDC_SF_PATTERN_INFO = 2
+}idc_assist_info_type_enum;
+
+typedef enum
+{
+ IDC_VALID_DRX_CYCLE_SF40 = 0,
+ IDC_VALID_DRX_CYCLE_SF64 = 1,
+ IDC_VALID_DRX_CYCLE_SF80 = 2,
+ IDC_VALID_DRX_CYCLE_SF128 = 3,
+ IDC_VALID_DRX_CYCLE_SF160 = 4,
+ IDC_VALID_DRX_CYCLE_SF256 = 5,
+ IDC_VALID_DRX_CYCLE_INVALID = 0xFF
+}idc_valid_drx_cycle_enum;
+
+typedef enum
+{
+ IDC_ACT_TIME_SF20 = 0,
+ IDC_ACT_TIME_SF30 = 1,
+ IDC_ACT_TIME_SF40 = 2,
+ IDC_ACT_TIME_SF60 = 3,
+ IDC_ACT_TIME_SF80 = 4,
+ IDC_ACT_TIME_SF100 = 5,
+ IDC_ACT_TIME_INVALID = 0xFF
+}idc_active_time_enum;
+
+typedef enum
+{
+ IDC_PROTECT_ACTION_START = 0,
+ IDC_PROTECT_ACTION_STOP = 1
+}idc_protect_action_enum;
+
+typedef enum
+{
+ IDC_TRAFFIC_TYPE_DEFAULT = 0,
+ IDC_TRAFFIC_TYPE_CSFB = 1,
+ IDC_TRAFFIC_TYPE_VoLTE_ViLTE = 2,
+ IDC_TRAFFIC_TYPE_VoWiFi = 3
+} idc_traffic_type_enum;
+
+#endif
\ No newline at end of file
diff --git a/mcu/interface/l1/idc/idc_errc_str.h b/mcu/interface/l1/idc/idc_errc_str.h
new file mode 100644
index 0000000..c554947
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_errc_str.h
@@ -0,0 +1,118 @@
+#ifndef _IDC_ERRC_STR_H
+#define _IDC_ERRC_STR_H
+
+#include "kal_general_types.h"
+#include "kal_public_defs.h"
+#include "global_type.h"
+#include "idc_errc_enum.h"
+
+/*Bitmap definitions for IDC victims in el1_idc_ul_ca_assist_info_struct */
+#define IDC_UL_CA_VICTIM_NONE 0x00
+#define IDC_UL_CA_VICTIM_GPS 0x01
+#define IDC_UL_CA_VICTIM_GLONASS 0x02
+#define IDC_UL_CA_VICTIM_BDS 0x04
+#define IDC_UL_CA_VICTIM_GALILEO 0x08
+#define IDC_UL_CA_VICTIM_WLAN 0x10
+#define IDC_UL_CA_VICTIM_BLUETOOTH 0x20
+
+typedef struct
+{
+ auto_denial_subframe_enum sf;
+ auto_denial_validity_enum validity;
+}idc_auto_denial_param_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool idc_indication;
+ kal_bool idc_indication_ul_ca;
+ kal_bool idc_indication_hw_sharing;
+ kal_bool idc_indication_MRDC;
+ kal_bool auto_denial_param_valid;
+ kal_bool isMRDC;
+ kal_uint8 num_mrdc_freq;
+ kal_uint32 candidate_nr_serv_freq[32];
+ idc_auto_denial_param_struct auto_denial_param;
+}errc_idc_idc_cfg_ntf_struct;
+
+typedef struct
+{
+ EARFCN earfcn;
+ kal_bool earfcn_valid;
+ kal_uint8 victims;
+ kal_uint32 nrarfcn;
+ idc_interference_direction_enum direction;
+}idc_mrdc_affected_freq_struct;
+
+typedef struct
+{
+ kal_uint32 earfcn_1;
+ kal_uint32 earfcn_2;
+}idc_ul_ca_freq_comb_struct;
+
+typedef struct
+{
+ kal_uint8 victims;
+ kal_uint8 affected_freq_comb_num;
+ idc_ul_ca_freq_comb_struct affected_freq_combinations[128];
+}idc_ul_ca_assist_info_struct;
+
+typedef struct
+{
+ idc_sf_config_enum subframeConfig;
+ kal_uint8 fdd_sf_pattern;
+ kal_uint8 tdd_sf_pattern[9];
+}idc_subframe_pattern_struct;
+
+typedef struct
+{
+ idc_valid_drx_cycle_enum drx_cycle;
+ kal_bool drx_offset_valid;
+ kal_uint16 drx_offset;
+ idc_active_time_enum drx_active_time;
+}idc_drx_assist_info_struct;
+
+typedef struct
+{
+ kal_uint8 num_of_pattern;
+ idc_subframe_pattern_struct subframe_pattern[8];
+}idc_sp_info_struct;
+
+typedef union
+{
+ idc_drx_assist_info_struct drx_assist_info;
+ idc_sp_info_struct idc_sp_info;
+}idc_tdm_assist_info_union;
+
+typedef struct _idc_affected_freq_struct
+{
+ EARFCN earfcn;
+ idc_interference_direction_enum direction;
+}idc_affected_freq_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool ul_ca_assist_info_valid;
+ kal_bool hw_sharing_problem;
+ kal_bool hw_sharing_info_valid;
+ kal_uint8 num_freq;
+ kal_uint8 num_mrdc_freq;
+ idc_affected_freq_struct affected_freq[32];
+ idc_assist_info_type_enum assist_type;
+ idc_tdm_assist_info_union idc_tdm_assist;
+ idc_ul_ca_assist_info_struct ul_ca_assist_info;
+ idc_mrdc_affected_freq_struct affected_mrdc_freq[32];
+}errc_idc_idc_ind_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ idc_protect_action_enum idc_action;
+ idc_traffic_type_enum traffic_type;
+} errc_idc_idc_lte_protect_ntf_struct;
+
+#endif
\ No newline at end of file
diff --git a/mcu/interface/l1/idc/idc_l5_enum.h b/mcu/interface/l1/idc/idc_l5_enum.h
new file mode 100644
index 0000000..fa3bcd6
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_l5_enum.h
@@ -0,0 +1,47 @@
+#ifndef _IDC_L5_ENUM_H
+#define _IDC_L5_ENUM_H
+
+#if defined(CHIP10992) || defined(__NANO_UT__)
+
+typedef enum
+{
+
+ IDC_LAA_RESTRICTED_POSSIBLE = 0,
+ IDC_LAA_RESTRICTED_IMPOSSIBLE = 1,
+ IDC_LAA_RESTRICTED_INVALID = 2
+}idc_laa_restricted_enum;
+
+typedef enum
+{
+ IDC_DYNAMIC_SET_MODE_DISABLE = 0, //disable unsolicited ntf
+ IDC_DYNAMIC_SET_MODE_ENABLE = 1, //enable unsolicited ntf
+ IDC_DYNAMIC_SET_MODE_CONFIG = 2, //config mode via MBIM (Intel)
+ IDC_DYNAMIC_SET_MODE_CONFIG_BY_MIPC = 3, //config mode via MIPC (Quanta)
+ IDC_DYNAMIC_SET_MODE_INVALID = 0x7FFFFFFF
+}idc_dynamic_set_mode_enum;
+
+typedef enum
+{
+ IDC_FILTER_TYPE_RX = 0,
+ IDC_FILTER_TYPE_TX = 1,
+ IDC_FILTER_TYPE_NUM = 2
+}idc_filter_type_enum;
+
+typedef enum
+{
+ IDC_CNF_STATUS_SUCCESS = 0,
+ IDC_CNF_STATUS_FAILURE = 1,
+ IDC_CNF_STATUS_INVALID = 2
+} idc_cnf_status_enum;
+
+typedef enum
+{
+ IDC_MBIM_CFG_TYPE_DEFAULT = 0,
+ IDC_MBIM_CFG_TYPE_SET = 1,
+ IDC_MBIM_CFG_TYPE_QUERY = 2,
+ IDC_MBIM_CFG_TYPE_NTF = 3,
+ IDC_MBIM_CFG_TYPE_NUM = 4
+} l5_idc_mbim_cfg_type_enum;
+
+#endif
+#endif
\ No newline at end of file
diff --git a/mcu/interface/l1/idc/idc_l5_str.h b/mcu/interface/l1/idc/idc_l5_str.h
new file mode 100644
index 0000000..8147a1b
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_l5_str.h
@@ -0,0 +1,152 @@
+#ifndef _IDC_L5_STR_H
+#define _IDC_L5_STR_H
+
+#if defined(CHIP10992) || defined(__NANO_UT__)
+
+
+#include "kal_general_types.h"
+#include "kal_public_defs.h"
+#include "global_type.h"
+#include "idc_l5_enum.h"
+
+
+typedef struct
+{
+ kal_uint32 band;
+ kal_uint32 ul_frequency;
+ kal_uint32 ul_bandwidth;
+ kal_uint32 dl_frequency;
+ kal_uint32 dl_bandwidth;
+}idc_nrtc_pcell_config_struct;
+
+// may need arrays for NR BWP
+typedef struct
+{
+ kal_uint32 band;
+ kal_uint32 ul_frequency; // invalid = 0, i.e. DLCA
+ kal_uint32 ul_bandwidth; // invalid = 0, i.e. DLCA
+ kal_uint32 dl_frequency;
+ kal_uint32 dl_bandwidth;
+}idc_nrtc_scell_config_struct;
+
+typedef struct
+{
+ idc_dynamic_set_mode_enum dynamic_set_mode; // enable = 0, disable = 1, config = 2
+ idc_laa_restricted_enum laa_restricted; // possible = 0, not possible = 1
+}l5_idc_nrtc_dynamic_set_struct;
+
+typedef struct
+{
+ kal_uint32 freq_offset;
+ kal_int32 power;
+}idc_psd_tuples_struct;
+
+typedef struct
+{
+ kal_uint32 frequency;
+ kal_int32 attenuation;
+}idc_filter_tuples_struct;
+
+typedef struct
+{
+ kal_uint32 interpolate_points_num;
+ idc_psd_tuples_struct psd_tuples;
+}idc_nrtc_psd_characteristics_struct;
+
+
+typedef struct
+{
+ idc_filter_type_enum filter_type;
+ kal_uint32 band;
+ kal_uint32 interpolate_points_num;
+ idc_filter_tuples_struct filter_tuples;
+}idc_nrtc_filter_characteristics_struct;
+
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint32 l5seq_id; // _CNF, _IND should return the same id [must be the first para]
+ kal_uint32 modem_state; // inactive = 0, active = 1
+ kal_uint32 cell_element_count;
+}l5_idc_nrtc_dynamic_cfg_ind_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint32 l5seq_id; // _CNF, _IND should return the same id [must be the first para]
+ kal_uint32 cnf_status; // success = 0; failure = 1;
+ kal_uint32 modem_state;
+ kal_uint32 cell_element_count;
+}l5_idc_nrtc_dynamic_cfg_query_cnf_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint32 l5seq_id; // _CNF, _IND should return the same id [must be the first para]
+}l5_idc_nrtc_dynamic_cfg_query_req_struct;
+
+typedef struct
+{
+ kal_uint32 dynamic_set_mode; //0-disable unsolicited notification; 1-enable unsolicited notification; 2-provide the wlan and bluetooth info for Modem
+ kal_uint32 wlan_radio_status; //0-wlan off; 1-wlan on;
+ kal_uint32 wlan_center_frequency; //wlan center frequency
+ kal_uint32 wlan_band_width; //wlan band width
+ kal_uint32 bluetooth_radio_status; //0-BT off; 1-BT on;
+ kal_int32 tx_power_threshold; //tx power threshold(in dBm)
+ kal_uint32 tx_averaging_period; //tx power evaluation period:uint-ms; range:10ms~10000ms
+ kal_uint32 hysterisis; //range:(1dB~11dB)
+}l5_idc_nrtc_dynamic_info_set_cfg_struct;
+
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint32 l5seq_id; // _CNF, _IND should return the same id [must be the first para]
+ l5_idc_nrtc_dynamic_info_set_cfg_struct dynamic_set_cfg;//dynamic nrtc cfg for modem
+}l5_idc_nrtc_dynamic_info_set_req_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint32 l5seq_id; // _CNF, _IND should return the same id [must be the first para]
+ kal_uint32 cnf_status;
+}l5_idc_nrtc_dynamic_info_set_cnf_struct;
+
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 seq_id; // _CNF, _IND should return the same id
+
+ kal_int32 modem_noise_figure;
+ kal_int32 modem_max_tx_power;
+ idc_nrtc_psd_characteristics_struct modem_psd_characteristics;
+
+ kal_uint32 filter_characteristics_element_count;
+ idc_nrtc_filter_characteristics_struct modem_filter_characteristics;
+}l5_idc_nrtc_static_cfg_ind_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ idc_cnf_status_enum cnf_status; // success = 0; failure = 1;
+ kal_uint8 seq_id; // _CNF, _IND should return the same id
+}l5_idc_nrtc_static_cfg_cnf_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ l5_idc_mbim_cfg_type_enum static_mbim_cfg_type; // command: set(x), query(o), notification(x)
+ kal_uint8 seq_id; // _CNF, _IND should return the same id
+}l5_idc_nrtc_static_cfg_req_struct;
+
+#endif
+#endif
diff --git a/mcu/interface/l1/idc/idc_nl1mpc_str.h b/mcu/interface/l1/idc/idc_nl1mpc_str.h
new file mode 100644
index 0000000..bf47685
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_nl1mpc_str.h
@@ -0,0 +1,21 @@
+#ifndef _IDC_NL1MPC_STR_H
+#define _IDC_NL1MPC_STR_H
+
+#include "kal_general_types.h"
+#include "kal_public_defs.h"
+#include "global_type.h"
+#include "idc_nr_def.h"
+
+typedef struct _nl1_mpc_idc_meas_object_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 num;
+ kal_uint16 band[MAX_NR_SUPPORT_MEAS_FREQ_NUM];
+ kal_uint32 dlFreq[MAX_NR_SUPPORT_MEAS_FREQ_NUM];
+ kal_uint32 dlARFCN[MAX_NR_SUPPORT_MEAS_FREQ_NUM];
+ kal_uint32 measBW[MAX_NR_SUPPORT_MEAS_FREQ_NUM];
+
+}nl1_mpc_idc_meas_object_ntf_struct;
+
+#endif
diff --git a/mcu/interface/l1/idc/idc_nl1rx_enum.h b/mcu/interface/l1/idc/idc_nl1rx_enum.h
new file mode 100644
index 0000000..1d0f134
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_nl1rx_enum.h
@@ -0,0 +1,73 @@
+#ifndef _IDC_NL1RX_ENUM_H
+#define _IDC_NL1RX_ENUM_H
+
+typedef enum
+{
+ IDC_NR_DUPLEX_FDD = 0,
+ IDC_NR_DUPLEX_TDD = 1,
+ IDC_NR_DUPLEX_UNKNOWN = 2
+}nl1_ctrl_idc_duplex_mode_enum;
+
+typedef enum
+{
+ IDC_NR_DRX_TYPE_NO_DRX = 0,
+ IDC_NR_DRX_TYPE_SHORT_DRX = 1,
+ IDC_NR_DRX_TYPE_LONG_DRX = 2
+}nl1_ctrl_idc_drx_type_enum;
+
+typedef enum
+{
+ IDC_NR_RX_PROTECT_INTRA_MEAS = 0,
+ IDC_NR_RX_PROTECT_SRV_BCCH = 1,
+ IDC_NR_RX_PROTECT_PAGING = 2,
+ IDC_NR_RX_PROTECT_INTER_MEAS = 3,
+ IDC_NR_RX_PROTECT_CSR = 4,
+ IDC_NR_RX_PROTECT_NBR_BCCH = 5,
+ IDC_NR_RX_PROTECT_DL_SYNC_CAL = 6,
+ IDC_NR_RX_PROTECT_SYNC = 7,
+ IDC_NR_RX_PROTECT_INTRA_POS = 8,
+ IDC_NR_RX_PROTECT_SCELL_INTRA_RSSI = 9,
+ IDC_NR_RX_PROTECT_TYPE_NUM = 10,
+ IDC_NR_RX_PROTECT_TYPE_INVALID = 11
+}idc_nl1_sched_rx_protect_type_enum;
+
+typedef enum
+{
+ IDC_NR_RX_STATUS_NONE = 0,
+ IDC_NR_RX_STATUS_SUSP = 1,
+ IDC_NR_RX_STATUS_RESU = 2,
+ IDC_NR_RX_STATUS_INVALID = 3
+}idc_nl1_sched_rx_status_enum;
+
+typedef enum
+{
+ NR_CNF_FAIL = 0,
+ NR_CNF_SUCCESS = 1,
+ NR_CNF_INVALID = 2
+}nl1_sched_idc_cnf_status_enum;
+
+typedef enum
+{
+ NL1_RAT_STATUS_FLIGHT = 0, // dont change the order
+ NL1_RAT_STATUS_STANDBY = 1, // dont change the order
+ NL1_RAT_STATUS_ACTIVE = 2 // dont change the order
+}nl1_rat_status_enum;
+
+typedef enum
+{
+ NL1_IRT_CAUSE_OTHERS = 0,
+ NL1_IRT_CAUSE_ENTER_FLIGHT_MODE = 1,
+ NL1_IRT_CAUSE_LEAVE_FLIGHT_MODE = 2,
+ NL1_IRT_CAUSE_LEAVE_RSVAS_SUSPEND = 3,
+ NL1_IRT_CAUSE_INVALID = 4
+}nl1_rat_set_cause_enum;
+
+#if ((defined(__IDC_ENABLED__)) && (defined (__IDC_NRTC_ENABLE__)))
+typedef enum
+{
+ NL1_IDC_BAND_CALSS_PC3 = 0,
+ NL1_IDC_BAND_CALSS_PC2 = 1
+}nl1_idc_power_class_enum;
+#endif
+
+#endif
diff --git a/mcu/interface/l1/idc/idc_nl1rx_str.h b/mcu/interface/l1/idc/idc_nl1rx_str.h
new file mode 100644
index 0000000..52bbccf
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_nl1rx_str.h
@@ -0,0 +1,155 @@
+#ifndef _IDC_NL1RX_STR_H
+#define _IDC_NL1RX_STR_H
+
+#include "kal_general_types.h"
+#include "kal_public_defs.h"
+#include "global_type.h"
+#include "idc_nr_def.h"
+#include "idc_nl1rx_enum.h"
+#include "nl1_comm_internal_inter_core_public.h"
+
+typedef struct _idc_nr_time_struct
+{
+ kal_uint64 absTime;
+ kal_uint32 sfbdTime;
+ kal_uint16 sfn;
+ kal_uint8 sf;
+}idc_nr_time_struct;
+
+typedef struct _nl1_idc_rx_quality_rpt_struct
+{
+ NL1_SIM_IDX_E sim_index;
+ kal_uint8 cc_valid_bmp;
+ kal_int16 os_snr[IDC_NR_CC_NUM];
+ kal_int16 ar_snr[IDC_NR_CC_NUM];
+ kal_int16 ma_rsrp[IDC_NR_CC_NUM];
+}nl1_idc_rx_quality_rpt_struct;
+
+typedef struct _nl1_ctrl_idc_freq_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ nl1_ctrl_idc_duplex_mode_enum duplexMode[IDC_NR_CC_NUM];
+
+ kal_uint8 srvNum;
+ kal_uint16 band[IDC_NR_CC_NUM];
+#if ((defined(__IDC_ENABLED__)) && (defined (__IDC_NRTC_ENABLE__)))
+ nl1_idc_power_class_enum powerclass[IDC_NR_CC_NUM];
+#endif
+ kal_uint32 dlBw[IDC_NR_CC_NUM][MAX_BWP_NUM];
+ kal_uint32 ulBw[IDC_NR_CC_NUM][MAX_BWP_NUM];
+ kal_uint32 dlFreq[IDC_NR_CC_NUM][MAX_BWP_NUM];
+ kal_uint32 ulFreq[IDC_NR_CC_NUM][MAX_BWP_NUM];
+ kal_uint32 dlARFCN[IDC_NR_CC_NUM][MAX_BWP_NUM];
+ kal_uint32 ulARFCN[IDC_NR_CC_NUM][MAX_BWP_NUM];
+}nl1_ctrl_idc_freq_ntf_struct;
+
+typedef struct _nl1_ctrl_idc_frame_cfg_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 srv_num;
+ kal_uint8 frame_cfg_num[IDC_NR_CC_NUM];
+ kal_uint16 dlSlots[IDC_NR_CC_NUM][NR_MAX_FRAME_CFG];
+ kal_uint16 flexibleSymbols[IDC_NR_CC_NUM][NR_MAX_FRAME_CFG];
+ kal_uint16 ulSlots[IDC_NR_CC_NUM][NR_MAX_FRAME_CFG];
+ kal_uint16 period[IDC_NR_CC_NUM][NR_MAX_FRAME_CFG];
+}nl1_ctrl_idc_frame_cfg_ntf_struct;
+
+typedef struct _nl1_ctrl_idc_sch_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool enterSch;
+}nl1_ctrl_idc_sch_ntf_struct;
+
+typedef struct _nl1_ctrl_idc_bwp_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 dl_actv_bwp_index[IDC_NR_CC_NUM];
+ kal_uint8 ul_actv_bwp_index[IDC_NR_CC_NUM];
+}nl1_ctrl_idc_bwp_ntf_struct;
+
+typedef struct _nl1_sched_idc_scell_actv_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint32 srvActvBmp;
+}nl1_sched_idc_scell_actv_ntf_struct;
+
+typedef struct _nl1_ctrl_idc_drx_config_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool isNoDRX;
+ kal_uint32 onDuration;
+ kal_uint32 startOffst;
+ kal_uint32 shortDRXCycle;
+ kal_uint32 longDRXCycle;
+ nl1_ctrl_idc_drx_type_enum drxType;
+}nl1_ctrl_idc_drx_config_ntf_struct;
+
+typedef struct _nl1_ctrl_idc_ho_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool isHO;
+}nl1_ctrl_idc_ho_ntf_struct;
+
+typedef struct _idc_nl1_sched_rx_protect_status_struct
+{
+ NL1_SIM_IDX_E sim_index;
+ kal_bool active;
+ kal_uint8 ccIndex;
+ kal_uint32 freq;
+ idc_nl1_sched_rx_protect_type_enum type;
+}idc_nl1_sched_rx_protect_status_struct;
+
+typedef struct _nl1_sched_idc_psim_swap_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 new_psim_index;
+}nl1_sched_idc_psim_swap_req_struct;
+
+typedef struct _idc_nl1_sched_rx_gap_req_struct
+{
+ NL1_SIM_IDX_E sim_idx;
+ kal_uint8 seq_num;
+ idc_nl1_sched_rx_status_enum rx_status[IDC_NR_CC_NUM];
+}idc_nl1_sched_rx_gap_req_struct;
+
+typedef struct _nl1_sched_idc_rx_gap_susp_cnf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 ack_num;
+ nl1_sched_idc_cnf_status_enum cnf_status;
+}nl1_sched_idc_rx_gap_susp_cnf_struct;
+
+typedef struct _nl1_ctrl_idc_actv_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ nl1_rat_status_enum nr_rat_status;
+ nl1_rat_set_cause_enum cause;
+}nl1_ctrl_idc_actv_ntf_struct;
+
+typedef struct _idc_nl1_sched_psim_swap_cnf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 sim_index;
+}idc_nl1_sched_psim_swap_cnf_struct;
+
+#if ((defined(__IDC_ENABLED__)) && (defined (__IDC_NRTC_ENABLE__)))
+typedef struct _idc_nl1_nrtc_tx_power_breach_threshold_ind_struct
+{
+ LOCAL_PARA_HDR
+ kal_uint8 cc_idx;
+ kal_bool breachThreshold;
+}idc_nl1_nrtc_tx_power_breach_threshold_ind_struct;
+#endif
+
+#endif
diff --git a/mcu/interface/l1/idc/idc_nl1tx_enum.h b/mcu/interface/l1/idc/idc_nl1tx_enum.h
new file mode 100644
index 0000000..0b67cd4
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_nl1tx_enum.h
@@ -0,0 +1,15 @@
+#ifndef _IDC_NL1TX_ENUM_H
+#define _IDC_NL1TX_ENUM_H
+
+typedef enum
+{
+ NL1TX_IDC_PROTECTED_ACTION_START = 0,
+ NL1TX_IDC_PROTECTED_ACTION_STOP = 1
+}nl1tx_idc_protected_action_enum;
+
+typedef enum
+{
+ NL1TX_IDC_PROTECTD_TYPE_DEFAULT = 0,
+ NL1TX_IDC_PROTECTED_TYPE_RA = 1
+}nl1tx_idc_protected_type_enum;
+#endif
\ No newline at end of file
diff --git a/mcu/interface/l1/idc/idc_nl1tx_str.h b/mcu/interface/l1/idc/idc_nl1tx_str.h
new file mode 100644
index 0000000..e0bdb87
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_nl1tx_str.h
@@ -0,0 +1,47 @@
+#ifndef _IDC_NL1TX_STR_H
+#define _IDC_NL1TX_STR_H
+
+#include "kal_general_types.h"
+#include "kal_public_defs.h"
+#include "global_type.h"
+#include "abs_time.h"
+
+#include "idc_nr_def.h"
+#include "idc_nl1tx_enum.h"
+
+#include "nl1_comm_internal_inter_core_public.h"
+
+typedef struct _nl1tx_idc_tdm_cell_list_struct
+{
+ NL1_SIM_IDX_E sim_index;
+ kal_uint8 ccIndex[IDC_NR_MAX_UL_CC_NUM];
+ kal_uint32 duration[IDC_NR_MAX_UL_CC_NUM];
+ kal_uint32 leadTime[IDC_NR_MAX_UL_CC_NUM];
+ ABS_TICK_TIME startTime[IDC_NR_MAX_UL_CC_NUM];
+}nl1tx_idc_tdm_cell_list_struct;
+
+typedef struct _idc_nl1tx_max_pwr_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ NL1_SIM_IDX_E sim_index;
+ kal_int16 maxTxPwr[IDC_NR_MAX_UL_BAND_SUPPORT_NUM];
+}idc_nl1tx_max_pwr_ind_struct;
+
+typedef struct _nl1tx_idc_tx_status_struct
+{
+ kal_uint8 enableBmp;
+ kal_uint32 TxFrcTime[IDC_NR_CC_NUM];
+ kal_int8 TxPwrState[IDC_NR_CC_NUM];
+}nl1tx_idc_tx_status_struct;
+
+typedef struct _nl1tx_idc_protect_ntf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 ccIndex;
+ nl1tx_idc_protected_action_enum idc_action;
+ nl1tx_idc_protected_type_enum protected_type;
+}nl1tx_idc_protect_ntf_struct;
+
+#endif
\ No newline at end of file
diff --git a/mcu/interface/l1/idc/idc_sm_common.h b/mcu/interface/l1/idc/idc_sm_common.h
new file mode 100644
index 0000000..177c034
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_sm_common.h
@@ -0,0 +1,15 @@
+#ifndef _IDC_SM_COMMON_H
+#define _IDC_SM_COMMON_H
+
+#include "kal_general_types.h"
+#include "kal_public_defs.h"
+
+void el1_idc_sm_sleep_ntf(kal_uint32 dur);
+
+void el1_idc_sm_wakeup_ntf();
+
+void nl1_idc_sm_sleep_ntf(kal_uint32 dur);
+
+void nl1_idc_sm_wakeup_ntf();
+
+#endif
\ No newline at end of file
diff --git a/mcu/interface/l1/idc/idc_swmsg_str.h b/mcu/interface/l1/idc/idc_swmsg_str.h
new file mode 100644
index 0000000..077f00e
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_swmsg_str.h
@@ -0,0 +1,874 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * el1_ipc_str.h
+ *
+ * Project:
+ * --------
+ * UMOLY
+ *
+ * Description:
+ * ------------
+ * LTE Layer 1 (EL1) and WiFi/BT SW message structure.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ ****************************************************************************/
+#ifndef _IDC_SWMSG_STR_
+#define _IDC_SWMSG_STR_
+
+#include "kal_general_types.h"
+#include "kal_public_defs.h"
+#include "idc_def.h"
+
+/**************************/
+/***** DEFINITED VALUE ****/
+/**************************/
+
+/***** MD part *****/
+
+#define LTE_INVALID_FREQ 0xFFFF
+#define NR_INVALID_FREQ 0xFFFFFFFF
+#define INTF_DIRECT_NUM 2
+#define MAX_WIFI_UNSAFE_FREQ_BMP_NUM 2
+#define MAX_BT_UNSAFE_FREQ_BMP_NUM 3
+#define MAX_UL_DL_SECTORS 3
+#define IDC_BWP_NUM 5
+#define IDC_LTE_NUM 5
+#define IDC_NR_NUM 8
+#define IDC_MAX_LTE_NUM (IDC_LTE_NUM + 1)
+#define IDC_MAX_NR_NUM (IDC_NR_NUM + 1)
+#define IDC_GROUP_NUM 6
+#define IDC_LTE_GROUP_NUM 3
+#define IDC_NR_GROUP_NUM 3
+#define MAX_SLP_DUR_RES_NUM 4
+
+/***** CONSYS part *****/
+
+#define MAX_WIFI_FREQ_IND_BAND_NUM 2
+#define MAX_WIFI_FREQ_NUM 4
+
+/**************************/
+/***** ENUM DEFINITION ****/
+/**************************/
+
+
+/***** MD part *****/
+
+typedef enum
+{
+ MD_CHIP_VER_6290 = 0,
+ MD_CHIP_VER_6291 = 1,
+ MD_CHIP_VER_6292 = 2,
+ MD_CHIP_VER_6293 = 3,
+ MD_CHIP_VER_6295 = 4,
+ MD_CHIP_VER_6297 = 5,
+ MD_CHIP_VER_MAX = 0xFF,
+}idc_md_chip_ver_enum;
+
+typedef enum
+{
+ MD_RF_CHIP_VER_MT6190 = 0,
+ MD_RF_CHIP_VER_MT6190M = 1,
+ MD_RF_CHIP_VER_MAX = 0xFF,
+}idc_md_rf_chip_ver_enum;
+
+/***** CONSYS part *****/
+
+typedef enum
+{
+ CONSYS_GEN_INVALID = 0,
+ CONSYS_GEN_2 = 20,
+ CONSYS_GEN_3 = 30,
+ CONSYS_GEN_4 = 40,
+ CONSYS_CONNAC_1_0 = 50,
+ CONSYS_CONNAC_1_1 = 51,
+ CONSYS_CONNAC_1_2 = 52,
+ CONSYS_CONNAC_2_0 = 60,
+ CONSYS_CONNAC_2_1 = 61,
+ CONSYS_CONNAC_2_2 = 62,
+ CONSYS_GENMAX = 0xFF,
+}idc_consys_gen_enum;
+
+typedef enum
+{
+ PTA_VER_3_0 = 30,
+ PTA_VER_3_1 = 31,
+ PTA_VER_5_0 = 50,
+ PTA_VER_5_1 = 51,
+ PTA_VER_5_2 = 52,
+ PTA_VER_6_0 = 60,
+ PTA_VER_6_1 = 61,
+ PTA_VER_6_2 = 62,
+ PTA_VER_7_0 = 70,
+ PTA_VER_7_1 = 71,
+ PTA_VER_7_2 = 72,
+ PTA_VER_MAX = 0xFF,
+}idc_consys_pta_ver_enum;
+
+typedef enum
+{
+ CONSYS_CHIP_VER_6625 = 0,
+ CONSYS_CHIP_VER_6630 = 1,
+ CONSYS_CHIP_VER_6631 = 2,
+ CONSYS_CHIP_VER_6632 = 3,
+ CONSYS_CHIP_VER_6633 = 4,
+ CONSYS_CHIP_VER_6635 = 5,
+ CONSYS_CHIP_VER_7915 = 6,
+ CONSYS_CHIP_VER_MAX = 0xFF,
+}idc_consys_chip_ver_enum;
+
+/****************************/
+/***** STRUCT DEFINITION ****/
+/****************************/
+
+typedef struct _wifi_unsafe_freq_bmp_struct
+{
+ kal_uint32 FDM_TDM[INTF_DIRECT_NUM][MAX_WIFI_UNSAFE_FREQ_BMP_NUM]; // INTF_DIRECT_NUM = 2, 0: LTE is aggressor, 1: WIFI is aggressor, MAX_WIFI_UNSAFE_FREQ_BMP_NUM = 2, channel base
+ kal_uint32 FDM_PWR[INTF_DIRECT_NUM][MAX_WIFI_UNSAFE_FREQ_BMP_NUM];
+ kal_uint32 FDM[INTF_DIRECT_NUM][MAX_WIFI_UNSAFE_FREQ_BMP_NUM];
+}wifi_unsafe_freq_bmp_struct;
+
+typedef struct _bt_unsafe_freq_bmp_struct
+{
+ kal_uint32 FDM_TDM[INTF_DIRECT_NUM][MAX_BT_UNSAFE_FREQ_BMP_NUM]; // INTF_DIRECT_NUM = 2, 0: LTE is aggressor, 1: BT is aggressor, MAX_WIFI_UNSAFE_FREQ_BMP_NUM = 3, channel base
+ kal_uint32 FDM_PWR[INTF_DIRECT_NUM][MAX_BT_UNSAFE_FREQ_BMP_NUM];
+ kal_uint32 FDM[INTF_DIRECT_NUM][MAX_BT_UNSAFE_FREQ_BMP_NUM];
+}bt_unsafe_freq_bmp_struct;
+
+typedef struct _ul_dl_config_struct
+{
+ kal_uint16 dl_length[MAX_UL_DL_SECTORS]; // PTA6.0 supports max. 5 sections switching
+#if !defined(CHIP10992)
+ kal_uint8 rsvd1[2];
+#endif
+ kal_uint16 ul_length[MAX_UL_DL_SECTORS];
+#if !defined(CHIP10992)
+ kal_uint8 rsvd2[2];
+#endif
+}ul_dl_config_struct;
+
+/************************/
+/***** MD to CONSYS ****/
+/************************/
+
+typedef struct _idc_sw_msg_header
+{
+#if IDC_CCCI_PATH_EN
+ kal_uint8 msg_id;
+ kal_bool is_need_reply_ack;
+ kal_uint8 rsvd[2];
+#else
+ kal_bool is_need_reply_ack;
+ kal_uint8 rsvd[3];
+#endif
+ kal_uint32 seq_num;
+ kal_uint32 enqueue_time_stamp;
+}idc_sw_msg_header;
+
+typedef struct _idc_md_idc_info_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ idc_md_chip_ver_enum chip_ver; // 90:0, 91:1, 92:2, 93:3, 95:4, 97:5
+ kal_uint8 idc_ver_major; // 2
+ kal_uint8 idc_ver_minor; // support feature: 1 power backoff, 2 scc de-activation, 3 DBDC/MCC, 4 interference detector
+ kal_uint8 timer_for_gps_blank_ind; // 3ms
+ kal_uint8 short_timer_for_rx_ind; // 20ms
+ kal_uint8 timer_for_consecutive_bytes_of_hw_sig; // 4us
+ kal_uint8 timer_for_lte_block_consys_tx_ind; // 200ms
+ kal_uint8 timer_for_nr_block_consys_tx_ind; // 200ms
+ kal_uint8 timer_for_pattern_sync_ind; // 30ms
+ kal_uint8 timer_for_resend_ntf; // 10ms
+ kal_uint8 timer_for_tx_ind; // 50ms
+ kal_uint8 max_num_cc_nr; // 9, 8 for MAX_NUM_CC_NR, 1 for NR inter-freq.
+ kal_uint8 max_num_cc_lte; // 6, 5 for MAX_NUM_CC_LTE, 1 for LTE inter-freq.
+ kal_uint8 md_lte_lead_time_step_cr;
+ kal_uint8 md_nr_lead_time_step_cr;
+ kal_uint8 md_expect_consys_mini_power_cr;
+ kal_uint8 md_expect_consys_pwr_step_cr;
+#if !defined(CHIP10992)
+ kal_uint16 long_timer_for_rx_ind; // 1000ms
+ idc_md_rf_chip_ver_enum rf_info;
+#else
+ kal_uint8 rsvd[1];
+ kal_uint16 long_timer_for_rx_ind; // 1000ms
+#endif
+}idc_md_idc_info_ind_struct;
+
+typedef struct _idc_lte_default_param_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_bool lte_actv;
+ kal_bool isReset; // 1: must need do handshake, 0: depends on the status change of LTE
+ kal_uint8 default_lte_rx_priority; // 3
+ kal_uint8 rsvd;
+ kal_uint16 tdm_lte_window; // 130ms
+ kal_uint16 tdm_conn_window; // 110ms
+}idc_lte_default_param_ind_struct;
+
+typedef struct _idc_nr_default_param_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_bool nr_actv;
+ kal_bool isReset; // 1: must need do handshake, 0: depends on the status change of NR
+ kal_uint8 default_nr_rx_priority; // 3
+ kal_uint8 bwp_switch_lead_time;
+ kal_uint16 tdm_nr_window; // 130ms
+ kal_uint16 tdm_conn_window; // 110ms
+#if IDC_FDD_FEATURE_SUPPORT
+ kal_uint8 md_nr_tx_mini_pwr_cr; // 0
+ kal_uint8 md_nr_tx_pwr_step_cr; // 2
+#endif
+}idc_nr_default_param_ind_struct;
+
+typedef struct _idc_lte_oper_freq_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_uint8 oper_freq_num;
+ kal_uint8 rsvd1[3];
+ kal_uint8 dl_bw[IDC_MAX_LTE_NUM];
+ kal_uint8 rsvd2[2];
+ kal_uint8 ul_bw[IDC_MAX_LTE_NUM];
+ kal_uint8 rsvd3[2];
+ kal_uint8 oper_band[IDC_MAX_LTE_NUM];
+ kal_uint8 rsvd4[2];
+ kal_uint16 dl_freq[IDC_MAX_LTE_NUM];
+ kal_uint16 ul_freq[IDC_MAX_LTE_NUM];
+}idc_lte_oper_freq_ind_struct;
+
+typedef struct _idc_nr_oper_freq_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_uint8 oper_freq_num;
+ kal_uint8 rsvd1[3];
+ kal_uint32 dl_bw[IDC_MAX_NR_NUM][IDC_BWP_NUM];
+ kal_uint32 ul_bw[IDC_MAX_NR_NUM][IDC_BWP_NUM];
+ kal_uint16 oper_band[IDC_MAX_NR_NUM];
+#if !defined(CHIP10992)
+ kal_uint8 rsvd2;
+#else
+ kal_uint8 rsvd2[2];
+#endif
+ kal_uint32 dl_freq[IDC_MAX_NR_NUM][IDC_BWP_NUM]; // MAX_BWP_NUM = 5
+ kal_uint32 ul_freq[IDC_MAX_NR_NUM][IDC_BWP_NUM];
+}idc_nr_oper_freq_ind_struct;
+
+typedef struct _idc_lte_wifi_unsafe_freq_bmp_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ wifi_unsafe_freq_bmp_struct bmp_general[IDC_MAX_LTE_NUM];
+}idc_lte_wifi_unsafe_freq_bmp_ind_struct;
+
+typedef struct _idc_lte_wifi_dbdc_unsafe_freq_bmp_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ wifi_unsafe_freq_bmp_struct bmp_dbdc[IDC_MAX_LTE_NUM][MAX_WIFI_FREQ_IND_BAND_NUM]; // MAX_WIFI_FREQ_IND_BAND_NUM = 2
+}idc_lte_wifi_dbdc_unsafe_freq_bmp_ind_struct;
+
+typedef struct _idc_lte_bt_unsafe_freq_bmp_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ bt_unsafe_freq_bmp_struct bmp_general[IDC_MAX_LTE_NUM];
+}idc_lte_bt_unsafe_freq_bmp_ind_struct;
+
+#if IDC_CCCI_PATH_EN
+/* the max NCCCI message size is limited, so split unsafe bmp of CCs into several messages */
+#define IDC_NR_WIFI_UNSAFE_BMP_NCCCI_MAX_CC_NUM (5)
+#define IDC_NR_WIFI_UNSAFE_BMP_NCCCI_MAX_MSG_NUM (2)
+
+typedef struct _idc_nr_wifi_unsafe_freq_bmp_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ wifi_unsafe_freq_bmp_struct bmp_general[IDC_NR_WIFI_UNSAFE_BMP_NCCCI_MAX_CC_NUM][IDC_BWP_NUM];
+ kal_uint8 start_cc;
+ kal_uint8 end_cc;
+ kal_uint8 rsvd[2];
+}idc_nr_wifi_unsafe_freq_bmp_ind_struct;
+#else
+#define IDC_NR_WIFI_UNSAFE_BMP_NCCCI_MAX_MSG_NUM (1)
+
+typedef struct _idc_nr_wifi_unsafe_freq_bmp_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ wifi_unsafe_freq_bmp_struct bmp_general[IDC_MAX_NR_NUM][IDC_BWP_NUM];
+}idc_nr_wifi_unsafe_freq_bmp_ind_struct;
+#endif
+
+#if IDC_CCCI_PATH_EN
+/* the max NCCCI message size is limited, so split unsafe bmp of CCs into several messages */
+#define IDC_NR_WIFI_DBDC_UNSAFE_BMP_NCCCI_MAX_CC_NUM (3)
+#define IDC_NR_WIFI_DBDC_UNSAFE_BMP_NCCCI_MAX_MSG_NUM (3)
+
+typedef struct _idc_nr_wifi_dbdc_unsafe_freq_bmp_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ wifi_unsafe_freq_bmp_struct bmp_dbdc[IDC_NR_WIFI_DBDC_UNSAFE_BMP_NCCCI_MAX_CC_NUM][IDC_BWP_NUM][MAX_WIFI_FREQ_IND_BAND_NUM]; // MAX_WIFI_FREQ_IND_BAND_NUM = 2
+ kal_uint8 start_cc;
+ kal_uint8 end_cc;
+ kal_uint8 rsvd[2];
+}idc_nr_wifi_dbdc_unsafe_freq_bmp_ind_struct;
+#else
+#define IDC_NR_WIFI_DBDC_UNSAFE_BMP_NCCCI_MAX_MSG_NUM (1)
+
+typedef struct _idc_nr_wifi_dbdc_unsafe_freq_bmp_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ wifi_unsafe_freq_bmp_struct bmp_dbdc[IDC_MAX_NR_NUM][IDC_BWP_NUM][MAX_WIFI_FREQ_IND_BAND_NUM]; // MAX_WIFI_FREQ_IND_BAND_NUM = 2
+}idc_nr_wifi_dbdc_unsafe_freq_bmp_ind_struct;
+#endif
+
+#if IDC_CCCI_PATH_EN
+/* the max NCCCI message size is limited, so split unsafe bmp of CCs into several messages */
+#define IDC_NR_BT_UNSAFE_BMP_NCCCI_MAX_CC_NUM (5)
+#define IDC_NR_BT_UNSAFE_BMP_NCCCI_MAX_MSG_NUM (2)
+
+typedef struct _idc_nr_bt_unsafe_freq_bmp_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ bt_unsafe_freq_bmp_struct bmp_general[IDC_NR_BT_UNSAFE_BMP_NCCCI_MAX_CC_NUM][IDC_BWP_NUM];
+ kal_uint8 start_cc;
+ kal_uint8 end_cc;
+ kal_uint8 rsvd[2];
+}idc_nr_bt_unsafe_freq_bmp_ind_struct;
+#else
+#define IDC_NR_BT_UNSAFE_BMP_NCCCI_MAX_MSG_NUM (1)
+
+typedef struct _idc_nr_bt_unsafe_freq_bmp_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ bt_unsafe_freq_bmp_struct bmp_general[IDC_MAX_NR_NUM][IDC_BWP_NUM];
+}idc_nr_bt_unsafe_freq_bmp_ind_struct;
+#endif
+
+typedef struct _idc_md_drx_pattern_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_bool predictable;
+ kal_uint8 on_duration;
+ kal_uint8 start_offset;
+ kal_uint8 rsvd;
+ kal_uint8 resolution[MAX_SLP_DUR_RES_NUM]; // MAX_SLP_DUR_RES_NUM = 4
+}idc_md_drx_pattern_ind_struct;
+
+typedef struct _idc_md_r11_idc_param_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_bool idc_report_enable;
+ kal_uint8 rsvd[3];
+}idc_md_r11_idc_param_ind_struct;
+
+typedef struct _idc_md_sw_msg_ack_ind_strcut
+{
+ idc_sw_msg_header msg_header;
+ kal_bool cnf_status; // Always be ture
+ kal_uint8 rsvd[3];
+ kal_uint32 recv_msg_bmp; // Set the corresponding bit for the target SW MSG from CONSYS which needs ack
+ kal_uint32 recv_seq_num;
+}idc_md_sw_msg_ack_ind_strcut;
+
+typedef struct _idc_lte_trx_group_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_uint8 lte_rx_group[IDC_MAX_LTE_NUM];
+#if !defined(CHIP10992)
+ kal_uint8 rsvd1[2];
+#endif
+ kal_uint8 lte_tx_group[IDC_MAX_LTE_NUM];
+#if !defined(CHIP10992)
+ kal_uint8 rsvd2[2];
+#endif
+}idc_lte_trx_group_ind_struct;
+
+typedef struct _idc_nr_trx_group_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_uint8 nr_rx_group[IDC_MAX_NR_NUM];
+#if !defined(CHIP10992)
+ kal_uint8 rsvd1[3];
+#endif
+ kal_uint8 nr_tx_group[IDC_MAX_NR_NUM];
+#if !defined(CHIP10992)
+ kal_uint8 rsvd2[3];
+#else
+ kal_uint8 rsvd[2];
+#endif
+}idc_nr_trx_group_ind_struct;
+
+typedef struct _idc_md_pattern_cfg_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ ul_dl_config_struct ul_dl_config[IDC_GROUP_NUM]; // NUM_IDC_GROUP = 6
+}idc_md_pattern_cfg_ind_struct;
+
+#if IDC_SEND_HW_SIG_VIA_SW_MSG
+typedef struct _idc_lte_state_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_bool is_lte_enter_conn; // LTE enter connected mode
+ kal_uint8 rsvd[3];
+}idc_lte_state_ind_struct;
+
+typedef struct _idc_nr_state_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_bool is_nr_enter_conn; // NR enter connected mode
+ kal_uint8 rsvd[3];
+}idc_nr_state_ind_struct;
+
+typedef struct _idc_lte_scell_actv_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_uint8 cell_bmp;
+ kal_uint8 rsvd[3];
+}idc_lte_scell_actv_ind_struct;
+
+typedef struct _idc_nr_scell_actv_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_uint16 cell_bmp;
+ kal_uint8 rsvd[2];
+}idc_nr_scell_actv_ind_struct;
+
+typedef struct _idc_md_tx_bwp_fw_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_uint8 bwp_of_cc[IDC_MAX_NR_NUM];
+ kal_uint8 rsvd[3];
+}idc_md_tx_bwp_fw_ind_struct;
+
+typedef struct _idc_md_rx_bwp_fw_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_uint8 bwp_of_cc[IDC_MAX_NR_NUM];
+ kal_uint8 rsvd[3];
+}idc_md_rx_bwp_fw_ind_struct;
+
+typedef struct _idc_md_tx_susp_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_uint8 priority; // default is 3
+ kal_uint8 tx_susp_fdm; // 0: allow CONSYS TX which adopt FDM, 1: LTE stop CONSYS TX, 2: NR stop CONSYS TX, 3: Both RATs stop CONSYS TX
+ kal_uint8 tx_susp_tdm; // 0: allow CONSYS TX which adopt TDM, 1: LTE stop CONSYS TX, 2: NR stop CONSYS TX, 3: Both RATs stop CONSYS TX
+ kal_uint8 rsvd[1];
+}idc_md_tx_susp_ind_struct;
+#endif
+
+typedef struct _idc_md_idc_info_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_md_idc_info_ind_struct md_info;
+}idc_md_idc_info_ind_ilm_struct;
+
+typedef struct _idc_lte_default_param_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_lte_default_param_ind_struct lte_param;
+}idc_lte_default_param_ind_ilm_struct;
+
+typedef struct _idc_nr_default_param_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_nr_default_param_ind_struct nr_param;
+}idc_nr_default_param_ind_ilm_struct;
+
+typedef struct _idc_lte_oper_freq_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_lte_oper_freq_ind_struct lte_freq;
+}idc_lte_oper_freq_ind_ilm_struct;
+
+typedef struct _idc_nr_oper_freq_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_nr_oper_freq_ind_struct nr_freq;
+}idc_nr_oper_freq_ind_ilm_struct;
+
+typedef struct _idc_lte_wifi_unsafe_freq_bmp_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_lte_wifi_unsafe_freq_bmp_ind_struct lte_wifi_unsafe_bmp;
+}idc_lte_wifi_unsafe_freq_bmp_ind_ilm_struct;
+
+typedef struct _idc_lte_wifi_dbdc_unsafe_freq_bmp_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_lte_wifi_dbdc_unsafe_freq_bmp_ind_struct lte_wifi_dbdc_unsafe_bmp;
+}idc_lte_wifi_dbdc_unsafe_freq_bmp_ind_ilm_struct;
+
+typedef struct _idc_lte_bt_unsafe_freq_bmp_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_lte_bt_unsafe_freq_bmp_ind_struct lte_bt_unsafe_bmp;
+}idc_lte_bt_unsafe_freq_bmp_ind_ilm_struct;
+
+typedef struct _idc_nr_wifi_unsafe_freq_bmp_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_nr_wifi_unsafe_freq_bmp_ind_struct nr_wifi_unsafe_bmp;
+}idc_nr_wifi_unsafe_freq_bmp_ind_ilm_struct;
+
+typedef struct _idc_nr_wifi_dbdc_unsafe_freq_bmp_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_nr_wifi_dbdc_unsafe_freq_bmp_ind_struct nr_wifi_dbdc_unsafe_bmp;
+}idc_nr_wifi_dbdc_unsafe_freq_bmp_ind_ilm_struct;
+
+typedef struct _idc_nr_bt_unsafe_freq_bmp_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_nr_bt_unsafe_freq_bmp_ind_struct nr_bt_unsafe_bmp;
+}idc_nr_bt_unsafe_freq_bmp_ind_ilm_struct;
+
+typedef struct _idc_md_drx_pattern_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_md_drx_pattern_ind_struct md_drx_pattern;
+}idc_md_drx_pattern_ind_ilm_struct;
+
+typedef struct _idc_md_r11_idc_param_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_md_r11_idc_param_ind_struct md_r11_param;
+}idc_md_r11_idc_param_ind_ilm_struct;
+
+typedef struct _idc_md_sw_msg_ack_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_md_sw_msg_ack_ind_strcut md_ack;
+}idc_md_sw_msg_ack_ind_ilm_struct;
+
+typedef struct _idc_lte_trx_group_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_lte_trx_group_ind_struct lte_trx_group;
+}idc_lte_trx_group_ind_ilm_struct;
+
+typedef struct _idc_nr_trx_group_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_nr_trx_group_ind_struct nr_trx_group;
+}idc_nr_trx_group_ind_ilm_struct;
+
+typedef struct _idc_md_pattern_cfg_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_md_pattern_cfg_ind_struct md_pattern_cfg;
+}idc_md_pattern_cfg_ind_ilm_struct;
+
+#if IDC_SEND_HW_SIG_VIA_SW_MSG
+typedef struct _idc_lte_state_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_lte_state_ind_struct lte_state_ind;
+}idc_lte_state_ind_ilm_struct;
+
+typedef struct _idc_nr_state_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_nr_state_ind_struct nr_state_ind;
+}idc_nr_state_ind_ilm_struct;
+
+typedef struct _idc_lte_scell_actv_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_lte_scell_actv_ind_struct lte_scell_actv_ind;
+}idc_lte_scell_actv_ind_ilm_struct;
+
+typedef struct _idc_nr_scell_actv_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_nr_scell_actv_ind_struct nr_scell_actv_ind;
+}idc_nr_scell_actv_ind_ilm_struct;
+
+typedef struct _idc_md_tx_bwp_fw_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_md_tx_bwp_fw_ind_struct md_tx_bwp_fw_ind;
+}idc_md_tx_bwp_fw_ind_ilm_struct;
+
+typedef struct _idc_md_rx_bwp_fw_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_md_rx_bwp_fw_ind_struct md_rx_bwp_fw_ind;
+}idc_md_rx_bwp_fw_ind_ilm_struct;
+
+typedef struct _idc_md_tx_susp_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_md_tx_susp_ind_struct md_tx_susp_ind;
+}idc_md_tx_susp_ind_ilm_struct;
+#endif
+
+/************************/
+/***** CONSYS to MD ****/
+/************************/
+
+typedef struct _idc_wifi_default_param_ntf_struct
+{
+ idc_sw_msg_header msg_header;
+ idc_consys_gen_enum idc_ver_major;
+ idc_consys_pta_ver_enum pta_ver;
+ idc_consys_chip_ver_enum chip_ver;
+#if IDC_MD_CTRL_TDM_WITH_3WIRE_PTA
+ kal_uint8 cpe_mifi_feature_extension;//bit 0 = true indicate wifi support tri-band.
+#else
+ kal_uint8 rsvd1;
+#endif
+ kal_bool wifi_en;
+ kal_bool isReset;
+ kal_uint8 idc_ver_minor;
+ kal_uint8 rsvd2;
+}idc_wifi_default_param_ntf_struct;
+
+typedef struct _idc_bt_default_param_ntf_struct
+{
+ idc_sw_msg_header msg_header;
+ idc_consys_gen_enum idc_ver_major;
+ idc_consys_pta_ver_enum pta_ver;
+ idc_consys_chip_ver_enum chip_ver;
+ kal_uint8 rsvd;
+ kal_bool bt_en;
+ kal_bool gnss_en;
+ kal_bool fm_en;
+ kal_uint8 idc_ver_minor;
+}idc_bt_default_param_ntf_struct;
+
+typedef struct _idc_wifi_oper_freq_ntf_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_uint8 wifi_band0_oper_freq_num;
+ kal_uint8 wifi_band1_oper_freq_num;
+ kal_uint8 rsvd[2];
+ kal_uint32 wifi_oper_freq_low[MAX_WIFI_FREQ_NUM]; // MAX_WIFI_FREQ_NUM = 4
+ kal_uint32 wifi_oper_freq_high[MAX_WIFI_FREQ_NUM];
+#if IDC_MD_CTRL_TDM_WITH_3WIRE_PTA
+ kal_uint8 wifi_oper_freq_3wire_group[MAX_WIFI_FREQ_NUM]; /* HW interface of each frequency */
+ /* 0: M2C bridge 1 */
+ /* BT_ACT_TXD (G9) */
+ /* BT_PRI_RXD (AG8) */
+ /* WLAN_ACT (AF8) */
+ /* 1: GPIO 1 */
+ /* PTA_RX (GPIO135) */
+ /* PTA_TX (GPIO134) */
+ /* EINT15 (GPIO15) */
+ /* 2: GPIO 2 */
+ /* PCIE3_PERSTN (GPIO76) */
+ /* PCIE3_PEWAKEN (GPIO77) */
+ /* PCIE3_CLKREQN (GPIO78) */
+#endif
+}idc_wifi_oper_freq_ntf_struct;
+
+typedef struct _idc_bt_oper_freq_ntf_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_bool bt_oper_freq_valid;
+ kal_uint8 rsvd[3];
+ kal_uint32 bt_oper_freq_low;
+ kal_uint32 bt_oper_freq_high;
+}idc_bt_oper_freq_ntf_struct;
+
+typedef struct _idc_consys_send_sw_msg_cnf_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_bool cnf_status;
+ kal_uint8 rsvd[3];
+ kal_uint32 recv_msg_bmp;
+ kal_uint32 recv_seq_num;
+}idc_consys_send_sw_msg_cnf_struct;
+
+typedef struct _idc_wifi_laa_release_ntf_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_bool isWiFion5G;
+ kal_uint8 rsvd[3];
+}idc_wifi_laa_release_ntf_struct;
+
+typedef struct _idc_wifi_default_param_ntf_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_wifi_default_param_ntf_struct wifiDefaultParam;
+}idc_wifi_default_param_ntf_ilm_struct;
+
+typedef struct _idc_bt_default_param_ntf_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_bt_default_param_ntf_struct btDefaultParam;
+}idc_bt_default_param_ntf_ilm_struct;
+
+typedef struct _idc_wifi_oper_freq_ntf_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_wifi_oper_freq_ntf_struct wifiOperFreq;
+}idc_wifi_oper_freq_ntf_ilm_struct;
+
+typedef struct _idc_bt_oper_freq_ntf_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_bt_oper_freq_ntf_struct btOperFreq;
+}idc_bt_oper_freq_ntf_ilm_struct;
+
+typedef struct _idc_consys_send_sw_msg_cnf_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_consys_send_sw_msg_cnf_struct consysSwMsgCnf;
+}idc_consys_send_sw_msg_cnf_ilm_struct;
+
+typedef struct _idc_wifi_laa_release_ntf_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_wifi_laa_release_ntf_struct wifi5GStatus;
+}idc_wifi_laa_release_ntf_ilm_struct;
+
+#if IDC_SEND_HW_SIG_VIA_SW_MSG
+typedef struct _idc_wifi_max_power_backoff_ntf_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_bool mdPwrBackoffEn;
+ kal_uint8 wifiPwrBmp;// bit0: band0 bit1: band 1 bit2:tri band
+ kal_uint8 wifiPwrBackoffEnBmp;
+ kal_bool isWifiScan;
+#if IDC_MD_CTRL_TDM_WITH_3WIRE_PTA
+ kal_uint16 lteCellBmp; /* bit X 1: WIFI Rx need to backoff LTE CC X Tx power */
+ /* bit X 0: WIFI Rx need not to backoff LTE CC X Tx power */
+ kal_uint16 nrCellBmp; /* bit X 1: WIFI Rx need to backoff NR CC X Tx power */
+ /* bit X 0: WIFI Rx need not to backoff NR CC X Tx power */
+#endif
+}idc_wifi_max_power_backoff_ntf_struct;
+
+typedef struct _idc_wifi_actv_bss_ntf_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_uint8 wifiActvBmp;
+ kal_bool isSTA;
+ kal_uint8 rsvd[2];
+}idc_wifi_actv_bss_ntf_struct;
+
+typedef struct _idc_bt_max_power_backoff_ntf_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_bool isMdPwrBack; // TRUE:MODEM NEED TO DO PWER BACK OFF
+ kal_bool isBtPwrBack;
+ kal_uint8 rsvd[2];
+}idc_bt_max_power_backoff_ntf_struct;
+
+typedef struct _idc_consys_resend_ntf_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_bool isConsys;
+ kal_uint8 rsvd[3];
+}idc_consys_resend_ntf_struct;
+
+typedef struct _idc_wifi_max_power_backoff_ntf_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_wifi_max_power_backoff_ntf_struct wifiMaxBackOffNtf;
+}idc_wifi_max_power_backoff_ntf_ilm_struct;
+
+typedef struct _idc_wifi_actv_bss_ntf_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_wifi_actv_bss_ntf_struct wifiActvBssNtf;
+}idc_wifi_actv_bss_ntf_ilm_struct;
+
+typedef struct _idc_bt_max_power_backoff_ntf_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_bt_max_power_backoff_ntf_struct btMaxPowerBackOffNtf;
+}idc_bt_max_power_backoff_ntf_ilm_struct;
+
+typedef struct _idc_consys_resend_ntf_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_consys_resend_ntf_struct consysResendNtf;
+}idc_consys_resend_ntf_ilm_struct;
+#endif
+
+#if IDC_MD_CTRL_TDM_WITH_3WIRE_PTA
+typedef struct _idc_consys_tdm_ntf_struct
+{
+ idc_sw_msg_header msg_header;
+ /* following information shall be in the same order with MSG_ID_IDC_WIFI_OPER_FREQ_NTF */
+ kal_bool isTdmForLte[MAX_WIFI_FREQ_NUM]; /* 1: LTE Rx need to block WIFI Tx */
+ /* 0: LTE Rx need not to block WIFI Tx */
+ kal_bool isTdmForNr[MAX_WIFI_FREQ_NUM]; /* 1: NR Rx need to block WIFI Tx */
+ /* 0: NR Rx need not to block WIFI Tx */
+ kal_uint16 lteCellBmp[MAX_WIFI_FREQ_NUM]; /* bit X 1: WIFI Rx need to block LTE CC X Tx */
+ /* bit X 0: WIFI Rx need not to block LTE CC X Tx */
+ kal_uint16 nrCellBmp[MAX_WIFI_FREQ_NUM]; /* bit X 1: WIFI Rx need to block NR CC X Tx */
+ /* bit X 0: WIFI Rx need not to block NR CC X Tx */
+}idc_consys_tdm_ntf_struct;
+
+typedef struct _idc_consys_tdm_ntf_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_consys_tdm_ntf_struct consysTdmNtf;
+}idc_consys_tdm_ntf_ilm_struct;
+
+typedef struct _idc_lte_int_detect_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_uint16 tdmOnCellBmp; /* bit X 1: LTE CC X Rx need to block WIFI Tx */
+ /* bit X 0: LTE CC X Rx need not to block WIFI Tx */
+ kal_uint16 rsvd;
+}idc_lte_int_detect_ind_struct;
+
+typedef struct _idc_lte_int_detect_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_lte_int_detect_ind_struct lteIntDetectInd;
+}idc_lte_int_detect_ind_ilm_struct;
+
+typedef struct _idc_nr_int_detect_ind_struct
+{
+ idc_sw_msg_header msg_header;
+ kal_uint16 tdmOnCellBmp; /* bit X 1: NR CC X Rx need to block WIFI Tx */
+ /* bit X 0: NR CC X Rx need not to block WIFI Tx */
+ kal_uint16 rsvd;
+}idc_nr_int_detect_ind_struct;
+
+typedef struct _idc_nr_int_detect_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_nr_int_detect_ind_struct nrIntDetectInd;
+}idc_nr_int_detect_ind_ilm_struct;
+#endif
+#endif
diff --git a/mcu/interface/l1/idc/idc_uart_str.h b/mcu/interface/l1/idc/idc_uart_str.h
new file mode 100644
index 0000000..33f0f20
--- /dev/null
+++ b/mcu/interface/l1/idc/idc_uart_str.h
@@ -0,0 +1,1873 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * _el1_uart_str.h
+ *
+ * Project:
+ * --------
+ * UMOLYA
+ *
+ * Description:
+ * ------------
+ * Local header file of EL1_IDC
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ ****************************************************************************/
+
+#ifndef _IDC_UART_STR_
+#define _IDC_UART_STR_
+
+#include "kal_general_types.h"
+#include "kal_public_defs.h"
+#include "kal_public_api.h"
+
+#include "el1_llisth.h"
+#include "idc_def.h"
+#include "idc_lte_def.h"
+#include "idc_nr_def.h"
+
+#ifdef __MTK_TARGET__
+#include "idc_internal.h"
+#include "dcl_idc.h"
+#include "drv_idc.h"
+#endif
+
+
+/****************************************/
+/* Interface between IDC and IDC Driver */
+/****************************************/
+
+typedef enum
+{
+ IDC_MD_LTE_DRX_IND = 2,
+ IDC_MD_NR_DRX_IND = 3,
+ IDC_MD_LTE_INT_DETECT_IND = 4,
+ IDC_MD_NR_INT_DETECT_IND = 5,
+ IDC_MD_LTE_PHASE_IND = 6,
+ IDC_MD_NR_PHASE_IND = 7,
+ IDC_MD_LTE_STATE_IND = 8,
+ IDC_MD_NR_STATE_IND = 9,
+ IDC_MD_LTE_SUSPEND_PTA_AP_IND = 10,
+ IDC_MD_NR_SUSPEND_PTA_AP_IND = 11,
+ IDC_MD_LTE_GNSS_BLANK_IND = 12,
+ IDC_MD_NR_GNSS_BLANK_IND = 13,
+ IDC_MD_TX_SUSP_IND = 14,
+ IDC_MD_EXTEND_LEN_TYPE = 15,
+ IDC_MD_NORMAL_HW_SIGNAL_IND = 16
+}idc_md_normal_hw_signal_type_enum;
+
+typedef enum
+{
+ IDC_SUBTYPE_MD_LTE_RX_IND = 1,
+ IDC_SUBTYPE_MD_LTE_TX_IND = 2,
+ IDC_SUBTYPE_MD_LTE_SLP_DUR_IND = 4,
+ IDC_SUBTYPE_MD_LTE_BLOCK_CONSYS_TX_IND = 5,
+ IDC_SUBTYPE_MD_SEND_HW_SIGNAL_ACK_IND = 7,
+ IDC_SUBTYPE_MD_LTE_SCELL_ACTIVATE_IND = 8,
+ IDC_SUBTYPE_MD_TX_BWP_IND = 9,
+ IDC_SUBTYPE_MD_RX_BWP_IND = 10,
+ IDC_SUBTYPE_MD_PATTERN_SYNC_IND = 11,
+ IDC_SUBTYPE_MD_NR_RX_IND = 12,
+ IDC_SUBTYPE_MD_NR_TX_IND = 13,
+ IDC_SUBTYPE_MD_NR_SLP_DUR_IND = 14,
+ IDC_SUBTYPE_MD_NR_BLOCK_CONSYS_TX_IND = 15,
+ IDC_SUBTYPE_MD_EXPECT_CONSYS_TX_PWR_LIMIT_IND = 16,
+ IDC_SUBTYPE_MD_LTE_TX_IND_1 = 17,
+ IDC_SUBTYPE_MD_LTE_TX_IND_2 = 18,
+ IDC_SUBTYPE_MD_NR_TX_IND_1 = 19,
+ IDC_SUBTYPE_MD_NR_TX_IND_2 = 20,
+ IDC_SUBTYPE_MD_NR_SCELL_ACTIVATE_IND = 21,
+ IDC_SUBTYPE_MD_TX_BWP_FW_IND = 22,
+ IDC_SUBTYPE_MD_RX_BWP_FW_IND = 23,
+ IDC_SUBTYPE_MD_LTE_TX_FW_IND = 24,
+ IDC_SUBTYPE_MD_NR_TX_FW_IND = 25,
+ IDC_MD_EXTEND_HW_SIGNAL_IND = 26
+}idc_md_extend_hw_signal_subtype_enum;
+
+typedef enum
+{
+ IDC_CONSYS_RESEND_NTF = 2,
+ IDC_CONSYS_BT_MAX_PWR_BACKOFF_NTF = 5,
+ IDC_CONSYS_ACTIVE_BSS_NTF = 6,
+ IDC_CONSYS_WIFI_MAX_PWR_BACKOFF_NTF = 7,
+ IDC_CONSYS_INT_DETECT_IND = 8,
+ IDC_CONSYS_WIFI_RSSI_IND = 9,
+ IDC_CONSYS_BT_RSSI_IND = 10,
+ IDC_CONSYS_WIFI_RX_IND = 11,
+ IDC_CONSYS_BT_TX_IND = 12,
+ IDC_CONSYS_BT_RX_IND = 13,
+ IDC_CONSYS_NORMAL_HW_SIGNAL_IND = 15
+}idc_consys_normal_hw_signal_type_enum;
+
+typedef enum
+{
+ IDC_SUBTYPE_CONSYS_RX_GRANT_NTF = 0,
+ IDC_SUBTYPE_CONSYS_TX_GRANT_NTF = 1,
+ IDC_SUBTYPE_CONSYS_TDM_NTF = 2,
+ IDC_SUBTYPE_CONSYS_SEND_HW_SIGNAL_ACK_NTF = 3,
+ IDC_SUBTYPE_CONSYS_WIFI_TX_IND = 4,
+ IDC_SUBTYPE_CONSYS_BT_PRE_TX_IND = 5,
+ IDC_SUBTYPE_CONSYS_TDM_ON_IND = 6,
+ IDC_SUBTYPE_CONSYS_TIMEOUT_DROP_NTF = 7,
+ IDC_CONSYS_EXTEND_HW_SIGNAL_IND = 8
+}idc_consys_extend_hw_signal_subtype_enum;
+
+/************************/
+/***** LTE to CONSYS ****/
+/************************/
+
+/***** IDC MD Normal HW Signal *****/
+
+typedef struct _idc_md_normal_hw_signal_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 data :7;
+}idc_md_normal_hw_signal_ind;
+
+typedef struct _idc_md_lte_drx_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 isLTEDRX :1;
+ kal_uint16 rsvd :6;
+}idc_md_lte_drx_ind;
+
+typedef struct _idc_md_nr_drx_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 isNRDRX :1;
+ kal_uint16 rsvd :6;
+}idc_md_nr_drx_ind;
+
+typedef struct _idc_md_lte_int_detect_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 solType :2; // FDM: 0, PWR: 1, TDM: 2
+ kal_uint16 rsvd :5;
+}idc_md_lte_int_detect_ind;
+
+typedef struct _idc_md_nr_int_detect_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 solType :2; // FDM: 0, PWR: 1, TDM: 2
+ kal_uint16 rsvd :5;
+}idc_md_nr_int_detect_ind;
+
+typedef struct _idc_md_lte_phase_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 ltePhaseEnd :1; // Always be 1
+ kal_uint16 rsvd :6;
+}idc_md_lte_phase_ind;
+
+typedef struct _idc_md_nr_phase_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 nrPhaseEnd :1; // Always be 1
+ kal_uint16 rsvd :6;
+}idc_md_nr_phase_ind;
+
+typedef struct _idc_md_lte_state_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 lteEnterConn :1;
+ kal_uint16 rsvd :6;
+}idc_md_lte_state_ind;
+
+typedef struct _idc_md_nr_state_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 nrEnterConn :1;
+ kal_uint16 rsvd :6;
+}idc_md_nr_state_ind;
+
+typedef struct _idc_md_lte_suspend_pta_ap_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 rxGroupSusp :3; // 0: resume proactive protection, 1: suspend proactive protection, bit0: group0, bit1: group2, bit2: group4
+ kal_uint16 rsvd :4;
+}idc_md_lte_suspend_pta_ap_ind;
+
+typedef struct _idc_md_nr_suspend_pta_ap_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 rxGroupSusp :3; // 0: resume proactive protection, 1: suspend proactive protection, bit0: group1, bit1: group3, bit2: group5
+ kal_uint16 rsvd :4;
+}idc_md_nr_suspend_pta_ap_ind;
+
+typedef struct _idc_md_lte_gnss_blank_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 l1Blank :1;
+ kal_uint16 l5Blank :1;
+ kal_uint16 rsvd :5;
+}idc_md_lte_gnss_blank_ind;
+
+typedef struct _idc_md_nr_gnss_blank_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 l1Blank :1;
+ kal_uint16 l5Blank :1;
+ kal_uint16 rsvd :5;
+}idc_md_nr_gnss_blank_ind;
+
+typedef struct _idc_md_tx_susp_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 priority :2; // default is 3
+ kal_uint16 txSuspFDM :2; // 0: allow CONSYS TX which adopt FDM, 1: LTE stop CONSYS TX, 2: NR stop CONSYS TX, 3: Both RATs stop CONSYS TX
+ kal_uint16 txSuspTDM :2; // 0: allow CONSYS TX which adopt TDM, 1: LTE stop CONSYS TX, 2: NR stop CONSYS TX, 3: Both RATs stop CONSYS TX
+ kal_uint16 rsvd :1;
+}idc_md_tx_susp_ind;
+
+/***** IDC MD Extend HW Signal *****/
+
+typedef struct _idc_md_ext_cmd_struct
+{
+ kal_uint8 byte[9];
+}idc_md_ext_cmd_struct;
+
+typedef struct _idc_md_ext_hw_signal_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 data_0 :3;
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 data_1 :6;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 data_2 :6;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 data_3 :6;
+ /* Seventh Byte */
+ kal_uint8 seventhBit :1; // Always be 1
+ kal_uint8 ext6thBit :1; // Always be 1
+ kal_uint8 data_4 :6;
+ /* Eighth Byte */
+ kal_uint8 eighthBit :1; // Always be 1
+ kal_uint8 ext7thBit :1; // Always be 0
+ kal_uint8 data_5 :6;
+ /* ninth Byte */
+ kal_uint8 ninthBit :1; // Always be 1
+ kal_uint8 ext8thBit :1; // Always be 1
+ kal_uint8 data_6 :6;
+}idc_md_ext_hw_signal_ind;
+
+typedef struct _idc_md_lte_rx_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 rxGroupStatus_0 :1; // 0: RX of group0 is off, 1: RX of group0 is on
+ kal_uint8 rxGroupPrio_0 :2; // 2'b11 > 2'b10 > 2'b01 > 2'b00
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 timerType_0 :1; // 0: short timer, 1: long timer (carried by SW MSG)
+ kal_uint8 patt_ovwrt_0 :1; // 0: PTA keeps UL/DL config., 1: PTA overwrites UL/DL config.
+ kal_uint8 rxGroupStatus_2 :1;
+ kal_uint8 rxGroupPrio_2 :2;
+ kal_uint8 timerType_2 :1;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 patt_ovwrt_2 :1;
+ kal_uint8 rxGroupStatus_4 :1;
+ kal_uint8 rxGroupPrio_4 :2;
+ kal_uint8 timerType_4 :1;
+ kal_uint8 patt_ovwrt_4 :1;
+ /* Sixth Byte */
+ kal_uint8 rsvd0 :8;
+ /* Seventh Byte */
+ kal_uint8 rsvd1 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd2 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd3 :8;
+}idc_md_lte_rx_ind;
+
+typedef struct _idc_md_lte_tx_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 valid_tx_bmp_l :3; // 0: the TX group does not belong to LTE, 1: the TX group belongs to LTE
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 valid_tx_bmp_h :3;
+ kal_uint8 txGroupStatus_0 :1; // 0: TX of group0 is off, 1: TX of group0 is on
+ kal_uint8 txGroupPrio_0 :2; // 2'b11 > 2'b10 > 2'b01 > 2'b00
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 narrow_band_0 :1; // 0: wide band TX, 1: narrow band TX
+ kal_uint8 txGroupStatus_1 :1;
+ kal_uint8 txGroupPrio_1 :2;
+ kal_uint8 narrow_band_1 :1;
+ kal_uint8 txGroupStatus_2 :1;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 txGroupPrio_2 :2;
+ kal_uint8 narrow_band_2 :1;
+ kal_uint8 txGroupStatus_3 :1;
+ kal_uint8 txGroupPrio_3 :2;
+ /* Seventh Byte */
+ kal_uint8 seventhBit :1; // Always be 1
+ kal_uint8 ext6thBit :1; // Always be 1
+ kal_uint8 narrow_band_3 :1;
+ kal_uint8 txGroupStatus_4 :1;
+ kal_uint8 txGroupPrio_4 :2;
+ kal_uint8 narrow_band_4 :1;
+ kal_uint8 txGroupStatus_5 :1;
+ /* Eighth Byte */
+ kal_uint8 eighthBit :1; // Always be 1
+ kal_uint8 ext7thBit :1; // Always be 0
+ kal_uint8 txGroupPrio_5 :2;
+ kal_uint8 narrow_band_5 :1;
+ kal_uint8 rsvd0 :3;
+ /* ninth Byte */
+ kal_uint8 rsvd1 :8;
+}idc_md_lte_tx_ind;
+
+typedef struct _idc_md_lte_slp_dur_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 dur_l :3; // range from 0~2560(ms), 12'b111111111111: infinite duration
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 dur_m :6;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 dur_h :3;
+ kal_uint8 rsvd0 :3;
+ /* Sixth Byte */
+ kal_uint8 rsvd1 :8;
+ /* Seventh Byte */
+ kal_uint8 rsvd2 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd3 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd4 :8;
+}idc_md_lte_slp_dur_ind;
+
+typedef struct _idc_md_lte_block_consys_tx_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 wifiTx0 :1; // 0: TX of WF active freq. in band0 is not blocked, 1: TX of WF active freq. in band0 is blocked
+ kal_uint8 wifiTx1 :1; // 0: TX of WF active freq. in band1 is not blocked, 1: TX of WF active freq. in band1 is blocked
+ kal_uint8 btTx :1; // 0: TX of BT is not blocked, 1: TX of BT is blocked
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 extTx0 :1;
+ kal_uint8 extTx1 :1;
+ kal_uint8 lteRxPrio :2; // 2'b11 > 2'b10 > 2'b01 > 2'b00
+ kal_uint8 rsvd0 :2;
+ /* Fifth Byte */
+ kal_uint8 rsvd1 :8;
+ /* Sixth Byte */
+ kal_uint8 rsvd2 :8;
+ /* Seventh Byte */
+ kal_uint8 rsvd3 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd4 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd5 :8;
+}idc_md_lte_block_consys_tx_ind;
+
+typedef struct _idc_md_send_hw_signal_ack_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 ack_num :3; // Carry the SSN of targeted HW signal from CONSYS
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 targetType :6; // Indicate HW signal Type or SubType depends on the param. 'isExtCmd'
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 isExtCmd :1; // Indicate whether the Ack is for the extend HW signal sent from CONSYS or not
+ kal_uint8 isWiFiB0 :1; // Indicate whether the Ack is for wifi b0 or not
+ kal_uint8 isWiFiB1 :1; // Indicate whether the Ack is for wifi b1 or not
+ kal_uint8 isIgnoreTdm :1; // Indicate modem is at tdm drx on dur mode, bypass tdm
+ kal_uint8 rsvd0 :2;
+ /* Sixth Byte */
+ kal_uint8 rsvd1 :8;
+ /* Seventh Byte */
+ kal_uint8 rsvd2 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd3 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd4 :8;
+}idc_md_send_hw_signal_ack_ind;
+
+typedef struct _idc_md_lte_scell_activate_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 cellBmp_l :3; // 0: LTE serving cell i is de-active, 1: LTE serving cell i is active
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 cellBmp_h :5;
+ kal_uint8 rsvd0 :1;
+ /* Fifth Byte */
+ kal_uint8 rsvd1 :8;
+ /* Sixth Byte */
+ kal_uint8 rsvd2 :8;
+ /* Seventh Byte */
+ kal_uint8 rsvd3 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd4 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd5 :8;
+}idc_md_lte_scell_activate_ind;
+
+typedef struct _idc_md_tx_bwp_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 bwpCC0 :2; // Index of MD TX BWP (0-3), NR: CC0-CC8, LTE: CC9-CC15
+ kal_uint8 bwpCC1_l :1;
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 bwpCC1_h :1;
+ kal_uint8 bwpCC2 :2;
+ kal_uint8 bwpCC3 :2;
+ kal_uint8 bwpCC4_l :1;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 bwpCC4_h :1;
+ kal_uint8 bwpCC5 :2;
+ kal_uint8 bwpCC6 :2;
+ kal_uint8 bwpCC7_l :1;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 bwpCC7_h :1;
+ kal_uint8 bwpCC8 :2;
+ kal_uint8 bwpCC9 :2;
+ kal_uint8 bwpCC10_l :1;
+ /* Seventh Byte */
+ kal_uint8 seventhBit :1; // Always be 1
+ kal_uint8 ext6thBit :1; // Always be 1
+ kal_uint8 bwpCC10_h :1;
+ kal_uint8 bwpCC11 :2;
+ kal_uint8 bwpCC12 :2;
+ kal_uint8 bwpCC13_l :1;
+ /* Eighth Byte */
+ kal_uint8 eighthBit :1; // Always be 1
+ kal_uint8 ext7thBit :1; // Always be 0
+ kal_uint8 bwpCC13_h :1;
+ kal_uint8 bwpCC14 :2;
+ kal_uint8 bwpCC15 :2;
+ kal_uint8 rsvd0 :1;
+ /* ninth Byte */
+ kal_uint8 rsvd1 :8;
+}idc_md_tx_bwp_ind;
+
+typedef struct _idc_md_rx_bwp_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 bwpCC0 :2; // Index of MD RX BWP (0-3), NR: CC0-CC8, LTE: CC9-CC15
+ kal_uint8 bwpCC1_l :1;
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 bwpCC1_h :1;
+ kal_uint8 bwpCC2 :2;
+ kal_uint8 bwpCC3 :2;
+ kal_uint8 bwpCC4_l :1;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 bwpCC4_h :1;
+ kal_uint8 bwpCC5 :2;
+ kal_uint8 bwpCC6 :2;
+ kal_uint8 bwpCC7_l :1;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 bwpCC7_h :1;
+ kal_uint8 bwpCC8 :2;
+ kal_uint8 bwpCC9 :2;
+ kal_uint8 bwpCC10_l :1;
+ /* Seventh Byte */
+ kal_uint8 seventhBit :1; // Always be 1
+ kal_uint8 ext6thBit :1; // Always be 1
+ kal_uint8 bwpCC10_h :1;
+ kal_uint8 bwpCC11 :2;
+ kal_uint8 bwpCC12 :2;
+ kal_uint8 bwpCC13_l :1;
+ /* Eighth Byte */
+ kal_uint8 eighthBit :1; // Always be 1
+ kal_uint8 ext7thBit :1; // Always be 0
+ kal_uint8 bwpCC13_h :1;
+ kal_uint8 bwpCC14 :2;
+ kal_uint8 bwpCC15 :2;
+ kal_uint8 rsvd0 :1;
+ /* ninth Byte */
+ kal_uint8 rsvd1 :8;
+}idc_md_rx_bwp_ind;
+
+typedef struct _idc_md_pattern_sync_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 offset_l :3; // range from 0-19999(us)
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 offset_m :6;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 offset_h :6;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 rxGroupBmp :6; // 0: the sync is not for group n, 1: the sync is for group n
+ /* Seventh Byte */
+ kal_uint8 rsvd0 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd1 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd2 :8;
+}idc_md_pattern_sync_ind;
+
+typedef struct _idc_md_nr_rx_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 rxGroupStatus_1 :1; // 0: RX of group1 is off, 1: RX of group1 is on
+ kal_uint8 rxGroupPrio_1 :2; // 2'b11 > 2'b10 > 2'b01 > 2'b00
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 timerType_1 :1; // 0: short timer, 1: long timer (carried by SW MSG)
+ kal_uint8 patt_ovwrt_1 :1; // 0: PTA keeps UL/DL config., 1: PTA overwrites UL/DL config.
+ kal_uint8 rxGroupStatus_3 :1;
+ kal_uint8 rxGroupPrio_3 :2;
+ kal_uint8 timerType_3 :1;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 patt_ovwrt_3 :1;
+ kal_uint8 rxGroupStatus_5 :1;
+ kal_uint8 rxGroupPrio_5 :2;
+ kal_uint8 timerType_5 :1;
+ kal_uint8 patt_ovwrt_5 :1;
+ /* Sixth Byte */
+ kal_uint8 rsvd0 :8;
+ /* Seventh Byte */
+ kal_uint8 rsvd1 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd2 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd3 :8;
+}idc_md_nr_rx_ind;
+
+typedef struct _idc_md_nr_tx_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 valid_tx_bmp_l :3; // 0: the TX group does not belong to NR, 1: the TX group belongs to NR
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 valid_tx_bmp_h :3;
+ kal_uint8 txGroupStatus_0 :1; // 0: TX of group0 is off, 1: TX of group0 is on
+ kal_uint8 txGroupPrio_0 :2; // 2'b11 > 2'b10 > 2'b01 > 2'b00
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 narrow_band_0 :1; // 0: wide band TX, 1: narrow band TX
+ kal_uint8 txGroupStatus_1 :1;
+ kal_uint8 txGroupPrio_1 :2;
+ kal_uint8 narrow_band_1 :1;
+ kal_uint8 txGroupStatus_2 :1;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 txGroupPrio_2 :2;
+ kal_uint8 narrow_band_2 :1;
+ kal_uint8 txGroupStatus_3 :1;
+ kal_uint8 txGroupPrio_3 :2;
+ /* Seventh Byte */
+ kal_uint8 seventhBit :1; // Always be 1
+ kal_uint8 ext6thBit :1; // Always be 1
+ kal_uint8 narrow_band_3 :1;
+ kal_uint8 txGroupStatus_4 :1;
+ kal_uint8 txGroupPrio_4 :2;
+ kal_uint8 narrow_band_4 :1;
+ kal_uint8 txGroupStatus_5 :1;
+ /* Eighth Byte */
+ kal_uint8 eighthBit :1; // Always be 1
+ kal_uint8 ext7thBit :1; // Always be 0
+ kal_uint8 txGroupPrio_5 :2;
+ kal_uint8 narrow_band_5 :1;
+ kal_uint8 rsvd0 :3;
+ /* ninth Byte */
+ kal_uint8 rsvd1 :8;
+}idc_md_nr_tx_ind;
+
+typedef struct _idc_md_nr_slp_dur_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 dur_l :3; // range from 0~2560(ms), 12'b111111111111: infinite duration
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 dur_m :6;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 dur_h :3;
+ kal_uint8 rsvd0 :3;
+ /* Sixth Byte */
+ kal_uint8 rsvd1 :8;
+ /* Seventh Byte */
+ kal_uint8 rsvd2 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd3 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd4 :8;
+}idc_md_nr_slp_dur_ind;
+
+typedef struct _idc_md_nr_block_consys_tx_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 wifiTx0 :1; // 0: TX of WF active freq. in band0 is not blocked, 1: TX of WF active freq. in band0 is blocked
+ kal_uint8 wifiTx1 :1; // 0: TX of WF active freq. in band1 is not blocked, 1: TX of WF active freq. in band1 is blocked
+ kal_uint8 btTx :1; // 0: TX of BT is not blocked, 1: TX of BT is blocked
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 extTx0 :1;
+ kal_uint8 extTx1 :1;
+ kal_uint8 nrRxPrio :2; // 2'b11 > 2'b10 > 2'b01 > 2'b00
+ kal_uint8 rsvd0 :2;
+ /* Fifth Byte */
+ kal_uint8 rsvd1 :8;
+ /* Sixth Byte */
+ kal_uint8 rsvd2 :8;
+ /* Seventh Byte */
+ kal_uint8 rsvd3 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd4 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd5 :8;
+}idc_md_nr_block_consys_tx_ind;
+
+typedef struct _idc_md_expect_consys_tx_pwr_limit_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 txPwrGroup0_l :3; // the expected CONSYS TX power for MD RX group 0
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 txPwrGroup0_h :1;
+ kal_uint8 txPwrGroup1 :4;
+ kal_uint8 txPwrGroup2_l :1;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 txPwrGroup2_h :3;
+ kal_uint8 txPwrGroup3_l :3;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 txPwrGroup3_h :1;
+ kal_uint8 txPwrGroup4 :4;
+ kal_uint8 txPwrGroup5_l :1;
+ /* Seventh Byte */
+ kal_uint8 seventhBit :1; // Always be 1
+ kal_uint8 ext6thBit :1; // Always be 1
+ kal_uint8 txPwrGroup5_h :3;
+ kal_uint8 rsvd0 :3;
+ /* Eighth Byte */
+ kal_uint8 rsvd1 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd2 :8;
+}idc_md_expect_consys_tx_pwr_limit_ind;
+
+typedef struct _idc_md_lte_tx_pwr_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 txGroup :3; // Indicate the hw signal for which TX group
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 txPwrCC0 :3; // Updating TX power for CC0
+ kal_uint8 txPwrCC1 :3; // Updating TX power for CC1
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 txPwrCC2 :3;
+ kal_uint8 txPwrCC3 :3;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 txPwrCC4 :3;
+ kal_uint8 txPwrCC5 :3;
+ /* Seventh Byte */
+ kal_uint8 seventhBit :1; // Always be 1
+ kal_uint8 ext6thBit :1; // Always be 1
+ kal_uint8 txPwrCC6 :3;
+ kal_uint8 txPwrCC7 :3;
+ /* Eighth Byte */
+ kal_uint8 eighthBit :1; // Always be 1
+ kal_uint8 ext7thBit :1; // Always be 0
+ kal_uint8 txPwrCC8 :3;
+ kal_uint8 txPwrCC9 :3;
+ /* ninth Byte */
+ kal_uint8 ninthBit :1; // Always be 1
+ kal_uint8 ext8thBit :1; // Always be 1
+ kal_uint8 txPwrCC10 :3;
+ kal_uint8 rsvd0 :3;
+}idc_md_lte_tx_pwr_ind;
+
+typedef struct _idc_md_lte_tx_leadtime_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 txPwrCC11 :3; // Updating TX power for CC11
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 txPwrCC12 :3;
+ kal_uint8 txPwrCC13 :3;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 txPwrCC14 :3;
+ kal_uint8 txPwrCC15 :3;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 leadTime_l :6; // (us)
+ /* Seventh Byte */
+ kal_uint8 seventhBit :1; // Always be 1
+ kal_uint8 ext6thBit :1; // Always be 1
+ kal_uint8 leadTime_h :4;
+ kal_uint8 rsvd0 :2;
+ /* Eighth Byte */
+ kal_uint8 rsvd1 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd2 :8;
+}idc_md_lte_tx_leadtime_ind;
+
+typedef struct _idc_md_nr_tx_pwr_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 txGroup :3; // Indicate the hw signal for which TX group
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 txPwrCC0 :3; // Updating TX power for CC0
+ kal_uint8 txPwrCC1 :3; // Updating TX power for CC1
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 txPwrCC2 :3;
+ kal_uint8 txPwrCC3 :3;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 txPwrCC4 :3;
+ kal_uint8 txPwrCC5 :3;
+ /* Seventh Byte */
+ kal_uint8 seventhBit :1; // Always be 1
+ kal_uint8 ext6thBit :1; // Always be 1
+ kal_uint8 txPwrCC6 :3;
+ kal_uint8 txPwrCC7 :3;
+ /* Eighth Byte */
+ kal_uint8 eighthBit :1; // Always be 1
+ kal_uint8 ext7thBit :1; // Always be 0
+ kal_uint8 txPwrCC8 :3;
+ kal_uint8 txPwrCC9 :3;
+ /* ninth Byte */
+ kal_uint8 ninthBit :1; // Always be 1
+ kal_uint8 ext8thBit :1; // Always be 1
+ kal_uint8 txPwrCC10 :3;
+ kal_uint8 rsvd0 :3;
+}idc_md_nr_tx_pwr_ind;
+
+typedef struct _idc_md_nr_tx_leadtime_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 txPwrCC11 :3; // Updating TX power for CC11
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 txPwrCC12 :3;
+ kal_uint8 txPwrCC13 :3;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 txPwrCC14 :3;
+ kal_uint8 txPwrCC15 :3;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 leadTime_l :6; // (us)
+ /* Seventh Byte */
+ kal_uint8 seventhBit :1; // Always be 1
+ kal_uint8 ext6thBit :1; // Always be 1
+ kal_uint8 leadTime_h :4;
+ kal_uint8 rsvd0 :2;
+ /* Eighth Byte */
+ kal_uint8 rsvd1 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd2 :8;
+}idc_md_nr_tx_leadtime_ind;
+
+typedef struct _idc_md_nr_scell_activate_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 cellBmp_l :3; // 0: LTE serving cell i is de-active, 1: LTE serving cell i is active
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 cellBmp_h :6;
+ /* Fifth Byte */
+ kal_uint8 rsvd0 :8;
+ /* Sixth Byte */
+ kal_uint8 rsvd1 :8;
+ /* Seventh Byte */
+ kal_uint8 rsvd2 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd3 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd4 :8;
+}idc_md_nr_scell_activate_ind;
+
+typedef struct _idc_md_tx_bwp_fw_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 bwpCC0 :3; // Index of MD TX BWP (0-4), NR: CC0-CC8
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 bwpCC1 :3;
+ kal_uint8 bwpCC2 :3;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 bwpCC3 :3;
+ kal_uint8 bwpCC4 :3;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 bwpCC5 :3;
+ kal_uint8 bwpCC6 :3;
+ /* Seventh Byte */
+ kal_uint8 seventhBit :1; // Always be 1
+ kal_uint8 ext6thBit :1; // Always be 1
+ kal_uint8 bwpCC7 :3;
+ kal_uint8 bwpCC8 :3;
+ /* Eighth Byte */
+ kal_uint8 rsvd0 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd1 :8;
+}idc_md_tx_bwp_fw_ind;
+
+typedef struct _idc_md_rx_bwp_fw_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 bwpCC0 :3; // Index of MD RX BWP (0-4), NR: CC0-CC8
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 bwpCC1 :3;
+ kal_uint8 bwpCC2 :3;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 bwpCC3 :3;
+ kal_uint8 bwpCC4 :3;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 bwpCC5 :3;
+ kal_uint8 bwpCC6 :3;
+ /* Seventh Byte */
+ kal_uint8 seventhBit :1; // Always be 1
+ kal_uint8 ext6thBit :1; // Always be 1
+ kal_uint8 bwpCC7 :3;
+ kal_uint8 bwpCC8 :3;
+ /* Eighth Byte */
+ kal_uint8 rsvd0 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd1 :8;
+}idc_md_rx_bwp_fw_ind;
+
+typedef struct _idc_md_lte_tx_fw_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 valid_tx_bmp_l :3; // 0: the TX group does not belong to LTE, 1: the TX group belongs to LTE
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 valid_tx_bmp_h :3;
+ kal_uint8 txGroupStatus_0 :1; // 0: TX of group0 is off, 1: TX of group0 is on
+ kal_uint8 txGroupStatus_1 :1; // 0: TX of group1 is off, 1: TX of group1 is on
+ kal_uint8 txGroupStatus_2 :1; // 0: TX of group2 is off, 1: TX of group2 is on
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 txGroupStatus_3 :1; // 0: TX of group3 is off, 1: TX of group3 is on
+ kal_uint8 txGroupStatus_4 :1; // 0: TX of group4 is off, 1: TX of group4 is on
+ kal_uint8 txGroupStatus_5 :1; // 0: TX of group5 is off, 1: TX of group5 is on
+ kal_uint8 rsvd0 :3;
+ /* Sixth Byte */
+ kal_uint8 rsvd1 :8;
+ /* Seventh Byte */
+ kal_uint8 rsvd2 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd3 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd4 :8;
+}idc_md_lte_tx_fw_ind;
+
+typedef struct _idc_md_nr_tx_fw_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 valid_tx_bmp_l :3; // 0: the TX group does not belong to NR, 1: the TX group belongs to NR
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 valid_tx_bmp_h :3;
+ kal_uint8 txGroupStatus_0 :1; // 0: TX of group0 is off, 1: TX of group0 is on
+ kal_uint8 txGroupStatus_1 :1; // 0: TX of group1 is off, 1: TX of group1 is on
+ kal_uint8 txGroupStatus_2 :1; // 0: TX of group2 is off, 1: TX of group2 is on
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 txGroupStatus_3 :1; // 0: TX of group3 is off, 1: TX of group3 is on
+ kal_uint8 txGroupStatus_4 :1; // 0: TX of group4 is off, 1: TX of group4 is on
+ kal_uint8 txGroupStatus_5 :1; // 0: TX of group5 is off, 1: TX of group5 is on
+ kal_uint8 rsvd0 :3;
+ /* Sixth Byte */
+ kal_uint8 rsvd1 :8;
+ /* Seventh Byte */
+ kal_uint8 rsvd2 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd3 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd4 :8;
+}idc_md_nr_tx_fw_ind;
+
+/***** structure for filling extend command by byte *****/
+
+typedef struct _idc_ext_cmd_byte_str_type_1
+{
+ kal_uint8 field1 :1;
+ kal_uint8 field2 :4;
+ kal_uint8 field3 :3;
+}idc_ext_cmd_byte_str_type_1;
+
+typedef struct _idc_ext_cmd_byte_str_type_2
+{
+ kal_uint8 field1 :1;
+ kal_uint8 field2 :1;
+ kal_uint8 field3 :6;
+}idc_ext_cmd_byte_str_type_2;
+
+typedef struct _idc_ext_cmd_byte_str_type_3
+{
+ kal_uint8 field1 :1;
+ kal_uint8 field2 :1;
+ kal_uint8 field3 :3;
+ kal_uint8 field4 :3;
+}idc_ext_cmd_byte_str_type_3;
+
+typedef struct _idc_ext_cmd_byte_type
+{
+ kal_uint8 data;
+ idc_ext_cmd_byte_str_type_1 data_type_1;
+ idc_ext_cmd_byte_str_type_2 data_type_2;
+ idc_ext_cmd_byte_str_type_3 data_type_3;
+}idc_ext_cmd_byte_type;
+
+typedef union _idc_md_normal_hw_signal
+{
+ idc_md_normal_hw_signal_ind normalHwSignal;
+ idc_md_lte_drx_ind lteDrxInd;
+ idc_md_nr_drx_ind nrDrxInd;
+ idc_md_lte_int_detect_ind lteIntDetectInd;
+ idc_md_nr_int_detect_ind nrIntDetectInd;
+ idc_md_lte_phase_ind ltePhaseInd;
+ idc_md_nr_phase_ind nrPhaseInd;
+ idc_md_lte_state_ind lteStateInd;
+ idc_md_nr_state_ind nrStateInd;
+ idc_md_lte_suspend_pta_ap_ind lteSuspPtaApInd;
+ idc_md_nr_suspend_pta_ap_ind nrSuspPtaApInd;
+ idc_md_lte_gnss_blank_ind lteGnssBlankInd;
+ idc_md_nr_gnss_blank_ind nrGnssBlankInd;
+ idc_md_tx_susp_ind txSuspInd;
+}idc_md_normal_hw_signal;
+
+typedef union _idc_md_extend_hw_signal
+{
+ idc_md_ext_cmd_struct extCmd;
+ idc_md_ext_hw_signal_ind extHwSignal;
+ idc_md_lte_rx_ind lteRxInd;
+ idc_md_lte_tx_ind lteTxInd;
+ idc_md_lte_slp_dur_ind lteSlpDurInd;
+ idc_md_lte_block_consys_tx_ind lteBlockConsysTxInd;
+ idc_md_send_hw_signal_ack_ind hwSignalAckInd;
+ idc_md_lte_scell_activate_ind lteScellActvInd;
+ idc_md_tx_bwp_ind txBwpInd;
+ idc_md_rx_bwp_ind rxBwpInd;
+ idc_md_pattern_sync_ind patternSyncInd;
+ idc_md_nr_rx_ind nrRxInd;
+ idc_md_nr_tx_ind nrTxInd;
+ idc_md_nr_slp_dur_ind nrSlpDurInd;
+ idc_md_nr_block_consys_tx_ind nrBlockConsysTxInd;
+ idc_md_expect_consys_tx_pwr_limit_ind consysTxPwrLimitInd;
+ idc_md_lte_tx_pwr_ind lteTxPwrInd;
+ idc_md_lte_tx_leadtime_ind lteTxLeadtimeInd;
+ idc_md_nr_tx_pwr_ind nrTxPwrInd;
+ idc_md_nr_tx_leadtime_ind nrTxLeadtimeInd;
+ idc_md_nr_scell_activate_ind nrScellActvInd;
+ idc_md_tx_bwp_fw_ind txBwpFwInd;
+ idc_md_rx_bwp_fw_ind rxBwpFwInd;
+ idc_md_lte_tx_fw_ind lteTxFwInd;
+ idc_md_nr_tx_fw_ind nrTxFwInd;
+}idc_md_extend_hw_signal;
+
+typedef struct _idc_dummy_consys_hw_sig_ack_ind_ilm_struct
+{
+ LOCAL_PARA_HDR
+ idc_md_send_hw_signal_ack_ind hwSigAckInd;
+}idc_dummy_consys_hw_sig_ack_ind_ilm_struct;
+
+typedef struct _idc_scheduling_event
+{
+ /* Link list pointer of idc event list */
+ llist_t link;
+ kal_bool isSleep;
+ kal_int64 localOffset;
+ kal_uint8 num;
+ idc_md_normal_hw_signal_type_enum EventType;
+ idc_md_normal_hw_signal IdcData;
+ idc_md_extend_hw_signal_subtype_enum EventSubType;
+ idc_md_extend_hw_signal IdcExtData;
+}idc_scheduling_event;
+
+/************************/
+/***** CONSYS to LTE ****/
+/************************/
+
+/***** IDC CONSYS Normal HW Signal *****/
+
+typedef struct _idc_consys_resend_ntf
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 rsvd :7;
+}idc_consys_resend_ntf;
+
+typedef struct _idc_consys_bt_max_pwr_backoff_ntf
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 mdPwrBackoffEn :1; // 0: MD does not apply pwr backoff solution, 1: MD applies pwr backoff solution
+ kal_uint16 btPwrBackoffEn :1; // 0: BT does not apply pwr backoff solution, 1: BT applies pwr backoff solution
+ kal_uint16 rsvd :5;
+}idc_consys_bt_max_pwr_backoff_ntf;
+
+typedef struct _idc_consys_active_bss_ntf
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 actvBmp :4; // LSB -> MSB: WiFi BSS1 --> BSS4
+ kal_uint16 isWiFiSTA :1; // 0: SAP, 1: STA
+ kal_uint16 rsvd :2;
+}idc_consys_active_bss_ntf;
+
+typedef struct _idc_consys_wifi_max_pwr_backoff_ntf
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 mdPwrBackoffEn :1; // 0: MD does not apply pwr backoff solution, 1: MD applies pwr backoff solution
+ kal_uint16 wifi_0 :1; // MD do PWR backoff triggered by WF band0
+ kal_uint16 wifi_1 :1; // MD do PWR backoff triggered by WF band1
+ kal_uint16 wf0PwrBackoffEn :1; // 0: WF band0 does not apply pwr backoff solution, 1: WF band0 applies pwr backoff solution
+ kal_uint16 wf1PwrBackoffEn :1; // 0: WF band1 does not apply pwr backoff solution, 1: WF band1 applies pwr backoff solution
+ kal_uint16 isWfScan :1; // 0: WF Scan off, 1: WF scan on
+ kal_uint16 rsvd :1;
+}idc_consys_wifi_max_pwr_backoff_ntf;
+
+typedef struct _idc_consys_int_detect_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 solType :2; // 0: FDM, 1: PWR, 2: TDM
+ kal_uint16 rsvd :5;
+}idc_consys_int_detect_ind;
+
+typedef struct _idc_consys_wifi_rssi_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 rsvd :7;
+}idc_consys_wifi_rssi_ind;
+
+typedef struct _idc_consys_bt_rssi_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 rsvd :7;
+}idc_consys_bt_rssi_ind;
+
+typedef struct _idc_consys_wifi_rx_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 wifi0RxBmp :1; // 0: RX of WiFi band0 is inactive, 1: RX of WiFi band0 is active
+ kal_uint16 wifi1RxBmp :1; // 0: RX of WiFi band1 is inactive, 1: RX of WiFi band1 is active
+ kal_uint16 rsvd :5;
+}idc_consys_wifi_rx_ind;
+
+typedef struct _idc_consys_bt_tx_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 btTx :1; // 0: TX of BT is inactive, 1: TX of BT is active
+ kal_uint16 rsvd :6;
+}idc_consys_bt_tx_ind;
+
+typedef struct _idc_consys_bt_rx_ind
+{
+ /* First Byte */
+ kal_uint16 firstBit :1; // Always be 0
+ kal_uint16 type :4;
+ kal_uint16 ssn :3;
+ /* Second Byte */
+ kal_uint16 secondBit :1; // Always be 1
+ kal_uint16 btRx :1; // 0: RX of BT is inactive, 1: RX of BT is active
+ kal_uint16 rsvd :6;
+}idc_consys_bt_rx_ind;
+
+/***** IDC CONSYS Extend HW Signal *****/
+
+typedef struct _idc_consys_rx_grant_ntf
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 btTxReq :1; // 0: TX of BT does not request arbitration, 1: TX of BT request arbitration
+ kal_uint8 btTxPrio_l :2;
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 btTxPrio_h :2;
+ kal_uint8 wifi0TxReq :1; // 0: TX of WiFi band0 does not request arbitration, 1: TX of WiFi band0 request arbitration
+ kal_uint8 wifi0TxPrio_l :3;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 wifi0TxPrio_h :1;
+ kal_uint8 wifi1TxReq :1;
+ kal_uint8 wifi1TxPrio :4;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 mdRx0Status :2; // 2'b00: MD RX group0 does not transmit data, 2'b01: MD RX group0 transmits data, but it is revoked, 2'b11: MD RX group0 transmits data, and it is granted
+ kal_uint8 mdRx1Status :2;
+ kal_uint8 mdRx2Status :2;
+ /* Seventh Byte */
+ kal_uint8 seventhBit :1; // Always be 1
+ kal_uint8 ext6thBit :1; // Always be 1
+ kal_uint8 mdRx3Status :2;
+ kal_uint8 mdRx4Status :2;
+ kal_uint8 mdRx5Status :2;
+ /* Eighth Byte */
+ kal_uint8 eighthBit :1; // Always be 1
+ kal_uint8 ext7thBit :1; // Always be 0
+ kal_uint8 mdRx6Status :2;
+ kal_uint8 mdRx7Status :2;
+ kal_uint8 rsvd0 :2;
+ /* ninth Byte */
+ kal_uint8 rsvd1 :8;
+}idc_consys_rx_grant_ntf;
+
+typedef struct _idc_consys_tx_grant_ntf
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 btRxReq :1; // 0: RX of BT does not request arbitration, 1: RX of BT request arbitration
+ kal_uint8 btRxPrio_l :2;
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 btRxPrio_h :2;
+ kal_uint8 wifi0RxReq :1; // 0: RX of WiFi band0 does not request arbitration, 1: RX of WiFi band0 request arbitration
+ kal_uint8 wifi0RxPrio_l :3;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 wifi0RxPrio_h :1;
+ kal_uint8 wifi1RxReq :1;
+ kal_uint8 wifi1RxPrio :4;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 mdTx0Status :2; // 2'b00: MD TX group0 does not transmit data, 2'b01: MD TX group0 transmits data, but it is revoked, 2'b11: MD TX group0 transmits data, and it is granted
+ kal_uint8 mdTx1Status :2;
+ kal_uint8 mdTx2Status :2;
+ /* Seventh Byte */
+ kal_uint8 seventhBit :1; // Always be 1
+ kal_uint8 ext6thBit :1; // Always be 1
+ kal_uint8 mdTx3Status :2;
+ kal_uint8 mdTx4Status :2;
+ kal_uint8 mdTx5Status :2;
+ /* Eighth Byte */
+ kal_uint8 rsvd0 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd1 :8;
+}idc_consys_tx_grant_ntf;
+
+typedef struct _idc_consys_tdm_ntf
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 wifi0 :1; // Activated freq. in WiFi band0 request TDM
+ kal_uint8 wifi1 :1; // Activated freq. in WiFi band1 request TDM
+ kal_uint8 bt :1; // BT request TDM
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 ext0 :1;
+ kal_uint8 ext1 :1;
+ kal_uint8 dur_l :4; // Range from 0~2560(ms), 12'b111111111111: infinite duration
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 dur_m :6;
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 dur_h :2;
+ kal_uint8 rsvd0 :4;
+ /* Seventh Byte */
+ kal_uint8 rsvd1 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd2 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd3 :8;
+}idc_consys_tdm_ntf;
+
+typedef struct _idc_consys_hw_signal_ack_ntf
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 ack_num :3; // Carry the SSN of targeted HW signal from MD
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 targetType :6; // Indicate HW signal Type or SubType depends on the param. 'isExtCmd'
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 isExtCmd :1; // Indicate whether the Ack is for the extend HW signal sent from MD or not
+ kal_uint8 isFromWiFi :1; // 0: ACK from BT, 1: ACK from WiFi
+ kal_uint8 rsvd0 :4;
+ /* Sixth Byte */
+ kal_uint8 rsvd1 :8;
+ /* Seventh Byte */
+ kal_uint8 rsvd2 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd3 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd4 :8;
+}idc_consys_hw_signal_ack_ntf;
+
+typedef struct _idc_consys_wifi_tx_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 wifi0Tx :1; // 0: TX of WiFi band0 is inactive, 1: TX of WiFi band0 is active
+ kal_uint8 wifi1Tx :1; // 0: TX of WiFi band1 is inactive, 1: TX of WiFi band1 is active
+ kal_uint8 rsvd :1;
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 wifi0TxPwr :4; // TX PWR of WiFi band0
+ kal_uint8 wifi1TxPwr_l :2;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 wifi1TxPwr_h :2;
+ kal_uint8 rsvd0 :4;
+ /* Sixth Byte */
+ kal_uint8 rsvd1 :8;
+ /* Seventh Byte */
+ kal_uint8 rsvd2 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd3 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd4 :8;
+}idc_consys_wifi_tx_ind;
+
+typedef struct _idc_consys_bt_pre_tx_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 btRW_l :3; // BT remaining window, the unit is us
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 btRW_m :6;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 btRW_h :1;
+ kal_uint8 btTxPwr :4; // TX PWR of BT
+ kal_uint8 btCenter_l :1; // BT channel offset to 2.4G, the uint is Mhz
+ /* Sixth Byte */
+ kal_uint8 sixthBit :1; // Always be 1
+ kal_uint8 ext5thBit :1; // Always be 0
+ kal_uint8 btCenter_h :6;
+ /* Seventh Byte */
+ kal_uint8 rsvd0 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd1 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd2 :8;
+}idc_consys_bt_pre_tx_ind;
+
+typedef struct _idc_consys_tdm_on_ind
+{
+ /* First Byte */
+ kal_uint8 firstBit :1; // Always be 0
+ kal_uint8 type :4; // Always be 15
+ kal_uint8 len :3; // num. of byte for the data content
+ /* Second Byte */
+ kal_uint8 secondBit :1; // Always be 1
+ kal_uint8 ext1stBit :1; // Always be 0
+ kal_uint8 subType :6;
+ /* Third Byte */
+ kal_uint8 thirdBit :1; // Always be 1
+ kal_uint8 ext2ndBit :1; // Always be 1
+ kal_uint8 ssn :3;
+ kal_uint8 isTdmOn :1; // 0: TX of WiFi band0 is inactive, 1: TX of WiFi band0 is active
+ kal_uint8 wifi0 :1; // 0: TX of WiFi band1 is inactive, 1: TX of WiFi band1 is active
+ kal_uint8 wifi1 :1;
+ /* Fourth Byte */
+ kal_uint8 fourthBit :1; // Always be 1
+ kal_uint8 ext3rdBit :1; // Always be 0
+ kal_uint8 bt :1; // TX PWR of WiFi band0
+ kal_uint8 ext0 :1; // TX PWR of WiFi band0
+ kal_uint8 ext1 :1; // TX PWR of WiFi band0
+ kal_uint8 rsvd0 :3;
+ /* Fifth Byte */
+ kal_uint8 fifthBit :1; // Always be 1
+ kal_uint8 ext4thBit :1; // Always be 1
+ kal_uint8 leadTime :4;
+ kal_uint8 rsvd1 :2;
+ /* Sixth Byte */
+ kal_uint8 rsvd2 :8;
+ /* Seventh Byte */
+ kal_uint8 rsvd3 :8;
+ /* Eighth Byte */
+ kal_uint8 rsvd4 :8;
+ /* ninth Byte */
+ kal_uint8 rsvd5 :8;
+
+}idc_consys_tdm_on_ind;
+
+typedef union _idc_consys_normal_hw_signal
+{
+ idc_consys_resend_ntf ResendNtf;
+ idc_consys_bt_max_pwr_backoff_ntf BTMaxPwrBackoffNtf;
+ idc_consys_active_bss_ntf ActvBssNtf;
+ idc_consys_wifi_max_pwr_backoff_ntf WiFiMaxPwrBackoffNtf;
+ idc_consys_int_detect_ind IntDetectInd;
+ idc_consys_wifi_rssi_ind WiFiRssiInd;
+ idc_consys_bt_rssi_ind BTRssiInd;
+ idc_consys_wifi_rx_ind WiFiRxInd;
+ idc_consys_bt_tx_ind BTTxInd;
+ idc_consys_bt_rx_ind BTRxInd;
+}idc_consys_normal_hw_signal;
+
+typedef union _idc_consys_extend_hw_signal
+{
+ idc_consys_rx_grant_ntf RxGrantNtf;
+ idc_consys_tx_grant_ntf TxGrantNtf;
+ idc_consys_tdm_ntf TdmNtf;
+ idc_consys_hw_signal_ack_ntf HwSignalAckNtf;
+ idc_consys_wifi_tx_ind WiFiTxInd;
+ idc_consys_bt_pre_tx_ind BTPreTxInd;
+ idc_consys_tdm_on_ind TdmOnInd;
+}idc_consys_extend_hw_signal;
+
+#endif