[Feature]Upload Modem source code
Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/interface/l1/ul1/internal/ul1_struct.h b/mcu/interface/l1/ul1/internal/ul1_struct.h
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+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ul1_struct.h
+ *
+ * Project:
+ * --------
+ * WCDMA_Software
+ *
+ * Description:
+ * ------------
+ * Layer 1 and Protocol Stack message and callback function definition
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
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+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef _UL1_STRUCT_H
+#define _UL1_STRUCT_H
+
+/* auto add by kw_check begin */
+#include "ul1_def.h"
+#include "kal_general_types.h"
+#include "ul1_cnst.h"
+/*#include "ul1tst_msg.h"*/
+#include "kal_public_defs.h" //MSBB change #include "stack_msgs.h"
+#include "kal_public_api.h" //MSBB change #include "app_ltlcom.h"
+/* auto add by kw_check end */
+#include "em_public_struct.h"
+
+#include "global_type.h" /* [UBin] For inclusion of erac_rat_enum */
+#include "mll1_umts_fdd.h" /* umts_fdd_dch_gap_struct */
+#if !defined(__XL1SIM__)
+#include "rsvak_public_enum.h" /* for freq_scan_type_enum */
+#endif
+
+#if defined(__ATERFTX_ERROR_HANDLE_ENHANCE__)
+#include "ps_public_enum.h" /*for error cause in AT+ERFTX EM changes*/
+#endif //__ATERFTX_ERROR_HANDLE_ENHANCE__
+
+/*****************************************************************************
+Request from 3G PS
+*****************************************************************************/
+typedef struct _fdd_cphy_bch_setup_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. should -1 (Immediate) */
+ kal_int16 rx_sfn; /* SFN for start BCH. -1 ~ 4095. -1 means immedaite */
+ kal_int32 tm; /* LST of the cell boundary. 0 ~ 38400*8-1 */
+ kal_int16 off; /* Frame # offset to LST. -1 ~ 4095. -1 means unknown */
+ kal_bool sfn_only; /* Only read SFN */
+ kal_uint16 dl_freq; /* DL UARFCN */
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_bool sttd; /* STTD setting */
+ kal_int8 sib7_index; /* Indicate which SIB Info in sib_list is SIB7 */
+ /* -1 means there is not SIB7 in the list */
+ kal_uint16 sib7_rep_cycle; /* 2 ~ 256. The meaning of sib7_rep_cycle becomes "SIB7 expiration timer / SIP_REP" */
+ /* The true value is 2^sib7_rep_cycle. */
+ kal_bool servingcell; /* MTK not used */
+ FDD_bch_priority_E bch_priority; /* Priority of this BCH */
+ kal_uint8 priority_level;
+ kal_uint8 sib_num; /* # of SIB to be read, 0 means all SIBs reception.*/
+ FDD_sib_info_T sib_list[FDD_MAX_SIB_PATTERN]; /* SIB information */
+
+#if defined( __GEMINI__ ) && defined ( __UMTS_RAT__ )
+ kal_uint16 priority_index; /*Priority_index for same priority channel in 3G Gemini project*/
+#endif
+
+ kal_bool is_auto_gap_support; /* this bch req is for rptCGI */
+
+} fdd_cphy_bch_setup_req_struct;
+
+typedef struct _fdd_cphy_bch_modify_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 4095. -1 means immediate */
+ kal_int16 rx_sfn; /* SFN for start BCH. -1 ~ 4095. -1 means immedaite */
+ kal_uint8 modify_flag; /* 0x01 : bch_priority is changed */
+ /* 0x02 : SIB information is changed */
+ /* 0x03 : Both bch_priority and SIB information are changed */
+ /*0x04: priority idx*/
+ kal_int8 sib7_index; /* Indicate which SIB Info in sib_list is SIB7 */
+ /* -1 means there is not SIB7 in the list */
+ kal_uint16 sib7_rep_cycle; /* 2 ~ 256. The meaning of sib7_rep_cycle becomes "SIB7 expiration timer / SIP_REP" */
+ /* The true value is 2^sib7_rep_cycle. */
+
+ FDD_bch_priority_E bch_priority; /* Priority of this BCH */
+ kal_uint8 priority_level;
+ kal_uint8 sib_num; /* # of SIB to be read */
+ FDD_sib_info_T sib_list[FDD_MAX_SIB_PATTERN]; /* SIB Information */
+
+#if defined( __GEMINI__ ) && defined ( __UMTS_RAT__ )
+ kal_uint16 priority_index; /*Priority_index for same priority channel in 3G Gemini project*/
+#endif
+
+} fdd_cphy_bch_modify_req_struct;
+
+typedef struct _fdd_cphy_bch_release_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_bch_release_req_struct;
+
+typedef struct _fdd_cphy_pch_setup_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+ kal_uint16 dl_freq; /* DL UARFCN */
+ kal_int32 tm; /* LST to Cell boundary. 0 ~ 38044*8-1 */
+ kal_int16 off; /* Frame # offset to LST. 0 ~ 4095 */
+ kal_bool is_CSFB; /* to specify this PCH setup is for CSFB redirection */
+ FDD_FACH_PCH_Info_T fach_pch_info; /* Channel information */
+} fdd_cphy_pch_setup_req_struct;
+
+typedef struct _fdd_cphy_pch_modify_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+ FDD_pich_reconfig_type_E reconfig_type;
+ FDD_pich_drx_T pich_drx; /* Modified DRX information */
+#ifdef __SMART_PAGING_3G_FDD__
+ FDD_pich_smartpaging_T smartpaging_info;
+#endif
+#ifdef __UMTS_R7__
+ FDD_pich_drx_T pich_drx_cycle2; /* DRX parameters 2 for PICH. */
+ kal_uint16 drx_cycle2_time; /* if it's not 0. UL1 shall use pich_drx_2 for PICH receptin, else shall directly use pich_drx for PICH reception. 0~5120 ms */
+#endif /* __UMTS_R7__ */
+} fdd_cphy_pch_modify_req_struct;
+
+typedef struct _fdd_cphy_pch_release_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+} fdd_cphy_pch_release_req_struct;
+
+typedef struct _fdd_cphy_fach_setup_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+ kal_uint16 dl_freq; /* DL UARFCN */
+ kal_int32 tm; /* LST to Cell boundary. 0 ~ 38044*8-1 */
+ kal_int16 off; /* Frame # offset to LST. 0 ~ 4095 */
+ FDD_FACH_PCH_Info_T fach_pch_info; /* Channel information */
+} fdd_cphy_fach_setup_req_struct;
+
+typedef struct _fdd_cphy_fach_modify_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+ FDD_ctch_drx_T ctch_drx; /* Modified CTCH DRX information */
+} fdd_cphy_fach_modify_req_struct;
+
+typedef struct _fdd_cphy_fach_release_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+} fdd_cphy_fach_release_req_struct;
+
+typedef struct _fdd_cphy_rach_setup_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+ kal_uint16 ul_freq; /* UL UARFCN */
+ FDD_aich_info_T aich_info; /* AICH info and ASC setting for PRACH partition */
+ FDD_prach_info_T prach_info; /* PRACH information */
+ FDD_prach_power_T prach_power; /* PRACH power information */
+ kal_uint8 tfc_num; /* # of TFC. 1 ~ 32 (Only 1 TrCH for 1 PRACH) */
+ FDD_ul_rach_tfc_T tfcs[FDD_MAXTF]; /* TFCS (TFS) */
+ FDD_ul_rach_trch_T trch_list[1]; /* Only 1 TrCH */
+#ifdef __UMTS_R8__
+ FDD_cell_fach_ul_trch_type_E trch_type; /* the transport channel type of random access attemp */
+ FDD_edch_specific_info_T edch_specific_info; /* PRACH and AICH specific information used for common E-DCH transmission */
+#endif /* __UMTS_R8__ */
+} fdd_cphy_rach_setup_req_struct;
+
+typedef struct _fdd_cphy_rach_release_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+} fdd_cphy_rach_release_req_struct;
+
+typedef struct _fdd_cphy_dch_setup_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+ FDD_dch_setup_msg_type_E setup_type; /* SETUP, TRHHO or TRHHO revert */
+ kal_int8 tm_rl_index; /* indicate the index of specific RL in array dl_dpch_rl[] which has the valid Tm value. */
+ kal_int16 off; /* Frame # offset to LST. 0 ~ 4095 */
+ kal_int16 rscp; /* Serving cell RSCP. Range: -464 ~ -100 means (-116 ~ -25 )dBm in 0.25 dB step*/
+ kal_uint8 tid; /* Transaction id */
+
+ kal_uint8 dl_crc_ind; /* For those TrCHs whose CRC data should be sent to MAC,
+ their corresponding bit will be set to 1.
+ The MSB represents the lowest numbered TrCH ID.
+ */
+
+ kal_uint16 ul_freq; /* UL UARFCN */
+ kal_uint16 ul_tfc_num; /* # of TFC for UL DPCH */
+ FDD_ul_dpch_tfc_T ul_tfcs[FDD_MAX_UL_TFC]; /* UL TFCS */
+ kal_uint8 ul_trch_num; /* # of UL TrCH */
+ FDD_ul_dch_trch_T ul_trch_list[FDD_MAX_UL_TRCH]; /* UL DPCH TrCH Info */
+ FDD_ul_dpch_info_T ul_dpch_info;
+
+ kal_uint16 dl_freq; /* DL UARFCN */
+ kal_uint16 dl_tfc_num; /* # of TFC for DL DPCH */
+ FDD_dl_tfc_T dl_tfcs[FDD_MAX_DL_TFC]; /* DL TFCS */
+ kal_uint8 dl_trch_num; /* # of DL TrCH */
+ FDD_dl_dch_trch_T dl_trch_list[FDD_MAX_DL_TRCH]; /* DL DPCH TrCH Info */
+ kal_int8 max_tx_power; /* Max allowed TX power. -50 ~ 33 dBm */
+ kal_int8 umts_power_class; /* UE capability*/
+
+ kal_uint8 tgps_action_nbr; /* Number of TGPs actiosn */
+ FDD_TGPS_Action_T tgps_action[12]; /* TGPS actions */
+
+ FDD_dl_dpch_rla_T dl_dpch_rla; /* DL Info & DL DPCH Info common for all RLs */
+ kal_uint8 rl_num; /* # of RL. 1 ~ 8 */
+ FDD_dl_dpch_rl_T dl_dpch_rl[FDD_MAX_RL]; /* DL Info & DL DPCH Info. for each RL */
+
+ FDD_dl_establish_T dl_sync_info; /* DL DPCH establishment criterion */
+
+ kal_bool non_sync_ind; /* [R6] FALSE: sync procedure shall be performed. TRUE: Sync procedure shall not be performed
+ for R5 and previous version, this value should be FALSE.
+ This field can be set to true only when setup_type is FDD_DCH_TMHHO */
+ kal_bool post_verification; /* [R6] TRUE: Post verification period shall be used . FALSE: Post verification period shall not be used.
+ for R5 and previous version, this value should be FALSE */
+ FDD_dpch_type_E dpch_type; /* [R6] DPCH or F-DPCH, for R5 and previous version, this value should be FDD_DPCH_TYPE */
+ /* This value should be consistent with the dpch_type field in dl_dpch_rl */
+
+ kal_uint8 ul_mac_event; /* Indicate if UMAC need setup/modify/release event */
+#ifdef __UMTS_R8__
+ kal_bool edch_info_included; /* True means that IE "E-DCH info" is include in the reconfiguration message in the transition
+ * from FACH state to DCH state. UL1 uses this and following flags and other condition to determine
+ * if it is needed to perform Sync A procedure. Please see UL1 SAP in details. */
+ kal_bool fach_to_dch_cell_change; /* the PSC of RLs included in active set does not include the PSC of the current cell in CELL_FACH. */
+#endif /* __UMTS_R8__ */
+ FDD_IS_CS_PS is_cs_ps_call; /* for TAS feature. To check if DCH channel is for CS call */
+ kal_bool is_cs_call_only; /* for lo_rx. To check if DCH channel is only CS call */
+ kal_bool is_CSFB; /* to specify this DCH setup is for CSFB redirection */
+ kal_bool is_ecall_or_callback; /* To use eCall Information so that UL1 can disable features like LoRX, ARX */
+ kal_bool is_vc_resume; /* To decide DCH setup type after Virtual connected resume */
+} fdd_cphy_dch_setup_req_struct;
+
+typedef struct _fdd_cphy_dch_modify_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+ FDD_dch_modify_msg_type_E modify_type; /* MODIFY, ASU, or Loop back mode 2 */
+
+ kal_uint8 tid; /* Transaction id */
+
+ kal_bool ul_mod_ind; /* Indicate whether UL modify indication should be sent to MAC */
+ kal_bool dl_mod_ind; /* Indicate whether DL modify indication should be sent to MAC */
+
+ kal_uint8 dl_crc_ind; /* For those TrCHs whose CRC data should be sent to MAC,
+ their corresponding bit will be set to 1.
+ The MSB represents the lowest numbered TrCH ID.
+ */
+
+ kal_uint16 modify_field; /* Bit field to represent for the parameters that should be modified
+ Bit 0 : DL TrCH parameter
+ Bit 1 : DL TFCS parameter
+ Bit 2 : UL TrCH parameter
+ Bit 3 : UL TFCS parameter
+ Bit 4 : DL common RL parameter
+ Bit 5 : DL each RL parameter
+ Bit 6 : UL RL parameter
+ Bit 7 : Physical parameters such as UL/DL freq and max TX power
+ Bit 8 : DL sync info which means timer and constant updating
+ */
+ /* Bit 3 */
+ kal_uint16 ul_tfc_num; /* # of TFC for UL DPCH */
+ FDD_ul_dpch_tfc_T ul_tfcs[FDD_MAX_UL_TFC]; /* UL TFCS */
+ /* Bit 2 */
+ kal_uint8 ul_trch_num; /* # of UL TrCH */
+ FDD_ul_dch_trch_T ul_trch_list[FDD_MAX_UL_TRCH]; /* UL DPCH TrCH Info */
+ /* Bit 1 */
+ kal_uint16 dl_tfc_num; /* # of TFC for DL DPCH */
+ FDD_dl_tfc_T dl_tfcs[FDD_MAX_DL_TFC]; /* DL TFCS */
+ /* Bit 0 */
+ kal_uint8 dl_trch_num; /* # of DL TrCH */
+ FDD_dl_dch_trch_T dl_trch_list[FDD_MAX_DL_TRCH]; /* DL DPCH TrCH Info */
+ /* Bit 4 */
+ FDD_dl_dpch_rla_T dl_dpch_rla; /* DL Info & DL DPCH Info common for all RLs */
+
+ kal_uint8 tgps_action_nbr; /* Number of TGPs actiosn */
+ FDD_TGPS_Action_T tgps_action[12]; /* TGPS actions */
+
+ /* Bit 6 */
+ FDD_ul_dpch_info_T ul_dpch_info;
+ /* Bit 7 */
+ /*remove these fields according to frequency info handler discussion*/
+// kal_uint16 ul_freq; /* UL UARFCN */
+// kal_uint16 dl_freq; /* DL UARFCN */
+ kal_int8 max_tx_power; /* Max allowed TX power. -50 ~ 33 dBm */
+ kal_int8 umts_power_class; /* UE capability*/
+ /* Bit 5 or ASU */ /* For Bit 5 modification, only rl_num_add and dl_dpch_rl_add are used */
+ kal_uint8 rl_num_delete; /* # of RL to be removed. 1 ~ 8*/
+ kal_uint16 dl_dpch_rl_delete[FDD_MAX_RL]; /* RL to be removed (PSC) */
+ kal_uint8 rl_num_add; /* # of RL to be added. 1 ~ 8 */
+ FDD_dl_dpch_rl_T dl_dpch_rl_add[FDD_MAX_RL]; /* DL Info & DL DPCH Info. for each RL */
+ FDD_dpch_type_E dpch_type; /* [R6] DPCH or F-DPCH, for R5 and previous version, this value should be FDD_DPCH_TYPE */
+ /* This value should be consistent with the dpch_type field in dl_dpch_rl */
+
+ kal_uint8 ul_mac_event; /* Indicate if UMAC need setup/modify/release event */
+
+ /* Bit 8 for dl sync info updating */
+ FDD_dl_establish_T dl_sync_info; /* DL DPCH establishment criterion */
+ FDD_IS_CS_PS is_cs_ps_call; /* for TAS feature. To check if DCH channel is for CS call */
+ kal_bool is_cs_call_only; /* for lo_rx. To check if DCH channel is only CS call */
+ kal_bool is_ecall_or_callback; /* To use eCall Information so that UL1 can disable features like LoRX, ARX */
+} fdd_cphy_dch_modify_req_struct;
+
+typedef struct _fdd_cphy_dch_release_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+
+ kal_bool isStopLoopTestM2First; /* LCL needs to stop Loop Test explicitly before releasing DCH in abnormal case. */
+
+ kal_uint8 tgps_action_nbr; /* Number of TGPs actiosn */
+ FDD_TGPS_Action_T tgps_action[12]; /* TGPS actions */
+
+ FDD_dpch_type_E dpch_type; /* [R6] DPCH or F-DPCH, for R5 and previous version, this value should be FDD_DPCH_TYPE */
+ /* This value should be consistent with the dpch_type field in dl_dpch_rl */
+
+ kal_uint8 ul_mac_event; /* Indicate if UMAC need setup/modify/release event */
+#ifdef __UMTS_R7__
+ FDD_dpch_release_type_E release_type; /* [R7] for whether UL1 need to record the HSS-SCCH oreder */
+#endif /* __UMTS_R7__ */
+
+} fdd_cphy_dch_release_req_struct;
+
+typedef struct _fdd_cphy_tgps_delete_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 tgps_action_nbr; /* Number of TGPs actiosn */
+ FDD_TGPS_Action_T tgps_action[12]; /* TGPS actions */
+
+} fdd_cphy_tgps_delete_req_struct;
+
+/* RRCE notifies UL1 if UL1 should resume sending cphy_tgps_overlap_ind*/
+typedef struct _fdd_cphy_tgps_overlap_resume_reporting_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 tgpsi; /* TGPSI of TGPS beging removed. 1 ~ 6 */
+} fdd_cphy_tgps_overlap_resume_reporting_req_struct;
+
+
+typedef struct _fdd_cphy_frequency_scan_req_struct
+{
+ LOCAL_PARA_HDR
+ kal_uint8 max_num_cell; /* maximum # of cells reported in 1 freq scan
+ If L1 found and report max_num_cell in 1 freq,
+ it should halt the freq scan
+ */
+ kal_int16 timeout; /* The max time spent to do cell search on 1 freq. (ms)
+ If L1 has spent so much time to do cell search on 1 freq,
+ it will send an ind to RRC and halt the freq scan procedure.
+ */
+
+ kal_uint8 num_freq_range; /* # of range list */
+ kal_uint16 uarfcn_begin[FDD_MAX_FREQ_RANGE]; /* Begin of DL uARFCN for range cell search */
+ kal_uint16 uarfcn_end[FDD_MAX_FREQ_RANGE]; /* End of DL uARFCN for range cell search */
+
+ kal_uint8 num_freq_list; /* # of freq for preferred freq list */
+ kal_uint16 uarfcn_list[FDD_MAX_FREQ_LIST]; /* List of UARFCN */
+
+ kal_uint8 num_psc; /* # of preferred cells */
+ FDD_preferred_cell_list_T preferred_cell_list[FDD_MAX_PREFERRED_PSC]; /* Preferred cell list */
+
+ kal_bool full_band_search; /* Perform full band scan; igonoring other parameters. */
+ kal_bool freq_correct; /* If 3G L1 need to do frequency correction */
+ kal_bool resume; /* TRUE: UL1 should resume previous freq scan, UL1 didn't care the other fields in this msg
+ FALSE: UL1 should start a new freq scan according to this msg */
+ /*Flag to indicate Quick Search Scan enabled or not*/
+ kal_bool quick_search;
+ /*Add for improving full band FS efficiency -- by excluding some UARFCN or some frequency range*/
+ FDD_full_band_option_E full_band_option; /*To indicate if "[filtered frequency list]/[frequency range]" shall be refered for full band search"*/
+ kal_uint8 working_UMTS_FDD_band[4]; /* Bitmask for frequency bands necessary to be scanned for this request */
+ kal_uint8 prefer_freq_list_cnt; /* # of preferred freq list */
+ kal_uint16 prefer_uarfcn_list[FDD_MAX_FREQ_LIST]; /* List of prefered freq */
+ kal_bool is_plmn_list; /* the prefered freq list is PLMN list or PLMN search */
+#ifdef __UMTS_R8__
+ kal_bool is_csg_search; /* [Rel8][CSG search]: to notify that current fs is for csg */
+#endif
+
+#if defined( __GEMINI__ ) && defined ( __UMTS_RAT__ )
+#if !defined(__XL1SIM__)
+ freq_scan_type_enum freq_scan_type;
+#else
+ kal_uint16 priority_index;
+#endif
+
+ kal_uint8 priority_level; /* This field is only used for Gemini 2.0. to indicate the gap pattern used for this freq scan in Virtual mode.
+ The higher the priority, the smaller the priority level number. The highest priority is 2, which means this field can't be smaller than 2. */
+#endif /* __GEMINI__ && __UMTS_RAT__ */
+
+ kal_bool is_auto_gap_support; /* [MM] this freq scan req is for rptCGI */
+ kal_bool is_CSFB_search; /* [MM] to notify L1 the frequency scan is specified for CSFB */
+
+} fdd_cphy_frequency_scan_req_struct;
+
+typedef struct _fdd_cphy_frequency_scan_continue_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool continue_cell; /* True if MEME want L1 to do continue cell search on current frequency
+ instead of jumping to next specified frequency. */
+ kal_uint16 ecs_freq; /* exhaustive cell search frequency */
+ kal_bool apply_l1_filter;
+ kal_uint8 num_exclude_frequency_list;
+ kal_uint16 exclude_frequency_list[FDD_MAX_FREQ_EXCLUDE];
+} fdd_cphy_frequency_scan_continue_req_struct;
+
+typedef struct _fdd_cphy_frequency_scan_suspend_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool is_compensate_meas_cell_required; /* True if the suspend_req is triggered by RSVAU itself, UL1 may help to send a measurement_cell_ind */
+} fdd_cphy_frequency_scan_suspend_req_struct;
+
+/* This interface should not be used in MT6268 */
+typedef struct _fdd_cphy_frequency_scan_stop_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_frequency_scan_stop_req_struct;
+
+/* MSG_ID_FDD_CPHY_RSSI_SNIFFER_START_REQ (Add by Janet) */
+typedef struct _fdd_cphy_rssi_sniffer_start_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 num_freq_list; /* # of freq for scan list of RSSI sniffer */
+ kal_uint16 uarfcn_list[FDD_MAX_RSSI_SNIFFER_SCAN_LIST]; /* List of UARFCN */
+
+} fdd_cphy_rssi_sniffer_start_req_struct;
+
+/* MSG_ID_FDD_CPHY_RSSI_SNIFFER_STOP_REQ (Add by Janet) */
+typedef struct _fdd_cphy_rssi_sniffer_stop_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_rssi_sniffer_stop_req_struct;
+
+/* MSG_ID_FDD_CPHY_RSSI_SNIFFER_PERIOD_CHANGE_REQ*/
+typedef struct _fdd_cphy_rssi_sniffer_period_change_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 periodicity_time; /*Range: [10,60], default: 30 // If the setting value is greater than the max value that xL1 can support, use the max supported value as setting*/
+
+} fdd_cphy_rssi_sniffer_period_change_req_struct;
+
+typedef struct _fdd_cphy_measurement_config_tgps_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 rx_cfn; /* message rx_cfn */
+ FDD_tgps_status_info_T tgps_status_info; /* Used to enable/disable particular TGPSs */
+
+ kal_uint8 tgps_action_nbr; /* Number of TGPs actiosn */
+ FDD_TGPS_Action_T tgps_action[12]; /* TGPS actions */
+} fdd_cphy_measurement_config_tgps_req_struct;
+
+typedef struct _fdd_cphy_measurement_config_fmo_req_struct
+{
+ LOCAL_PARA_HDR
+
+ FDD_fach_mo_info_T fach_mo_info; /* FACH MO param */
+} fdd_cphy_measurement_config_fmo_req_struct;
+
+typedef struct _fdd_cphy_auto_gap_on_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_auto_gap_on_req_struct;
+
+typedef struct _fdd_cphy_auto_gap_on_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_auto_gap_on_cnf_struct;
+
+typedef struct _fdd_cphy_auto_gap_off_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_auto_gap_off_req_struct;
+
+typedef struct _fdd_cphy_auto_gap_off_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_auto_gap_off_cnf_struct;
+
+typedef struct _fdd_cphy_measurement_config_cell_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 tid; /* Transaction ID to sync between request and indication */
+ kal_bool stop_flag; /* TRUE : just stop meas. UL1 will NOT clear all cell info list and meas param */
+ FDD_CPHY_MEASUREMENT_STOP_CAUSE_E stop_cause; /* check this value only when stop_flag=TRUE */
+
+ kal_bool meas_spec_valid; /* Indicate if meas_spec is valid */
+ FDD_meas_spec_T meas_spec; /* meas spec for CPICH cell meas */
+
+ kal_bool cell_info_list_valid; /* Indicate if cell_info_list[], uarfcn[] and action[] are valid */
+ kal_uint16 uarfcn[FDD_MAX_UMTS_FREQ]; /* List of reference DL UARFCN */
+ kal_uint8 num_cell; /* # of cells in cell_info_list[] */
+ FDD_cell_info_list_T cell_info_list[FDD_MAX_NUM_MEASURED_CELL]; /* List of cells to be measured. */
+ FDD_meas_act_E action[FDD_MAX_UMTS_FREQ]; /* Action that should be applied to cell lsits.
+ FDD_MEAS_UPDATE : Add/Repleace cell list of a new specified freq (Both freq and cell list with tm/off are changed)
+ FDD_MEAS_MODIFY : (20080130: Removed)
+ FDD_MEAS_DELETE : Delete the cell list of a freq.
+ */
+
+ FDD_supplementary_meas_parameter_T supplementary_meas_parameter; /* These parameters are supplementary for UL1 measurement. These parameters may be set by CSCE or MEME */
+
+ kal_int8 idx_intra_freq; /* [Range]: 0 ~ 2. Indicate which frequency in the array uarfcn[FDD_MAX_UMTS_FREQ] is intra-frequency, -1 means invalid */
+
+ kal_bool intra_meas_period_valid; /* Only for MTK L1: configure Intra-freq. meas. period in DCH/FACH */
+ kal_uint8 intra_period_N; /* Num. of 40/50 ms */
+
+ kal_bool inter_meas_period_valid; /* Only for MTK L1: configure Inter-freq. meas. period in DCH/FACH */
+ kal_uint8 inter_period_N; /* Num. of GAPs or FMOs */
+
+ kal_bool meas_period_valid; /* Only for MA */
+ kal_uint16 period_unit; /* Only for MA */
+ kal_uint8 period_N; /* Only for MA */
+
+#ifdef __UMTS_R8__
+ kal_int16 T_higher_prio_search; /* [Rel8][Absolute Priority Search] -1: no need to watch priority_search_control in FDD_cell_info_list_T */
+ /* [Rel8][Absolute Priority Search] others: real value for the timer */
+
+ kal_bool detected_cell_info_list_valid; /* [Rel8][CSG search]: to judge if detected cell list is valid, the list is configured under IDLE state */
+ kal_uint8 num_detected_cell; /* [Rel8][CSG search]: number of detected cell, number <= 6 */
+ FDD_cell_info_list_T detected_cell_info_list[6]; /* [Rel8][CSG search]: information of the detected cell list */
+
+ kal_bool non_compressed_mode_inter_freq[FDD_MAX_UMTS_FREQ]; /* Indicates which inter-frequency in the array uarfcn[] should be measured without compressed mode */
+#endif /*__UMTS_R8__*/
+
+ kal_bool is_detected_cell_meas[FDD_MAX_UMTS_FREQ]; /* [MM] other-RATs can use this flag to trigger detected search */
+ kal_bool is_standby_meas_period_reset; /* [Rel8][MM] MEME notifies UL1 if short period meas cell list changes. */
+ /* If changes, measurement needs to be reconfigured (reset short period timer) */
+ kal_bool is_standby_prio_meas_period_reset; /* [Rel8][MM] MEME notifies UL1 if long period meas cell list changes. */
+ /* If changes, measurement needs to be reconfigured (reset long period timer) */
+
+ kal_bool prohibit_apply_n_layer; /* [Rel8][MM] Due to OOS, MEME notifies UL1 not to apply n_layer factor to accelerate meas frequency */
+
+ kal_int8 idx_first_meas_uarfcn_for_3g_standby; /* [Rel8][ABPCR] under standby mode, indicated uarfcn controlled by RR is first to be scheduling measured */
+#ifdef __UMTS_R9__
+ kal_int8 idx_sec_intra_freq; /* [R9]Indicates which frequency in the array uarfcn[] is secondary intra-freq. -1 measn invalid. [Range]0~3.*/
+#endif /*__UMTS_R9__*/
+} fdd_cphy_measurement_config_cell_req_struct;
+
+typedef struct _fdd_cphy_measurement_config_tx_power_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool periodic_ind; /* Indicate periodically or event triggered. TRUE means period */
+
+ kal_uint8 periodic_measurement_id;
+ kal_uint8 report_num; /* # of period report to be sent. 0 ~ 64 */
+ kal_uint16 period; /* Report period. 25 ~ 6400 frames */
+
+ kal_uint8 event_num; /* # of events in event[] */
+ FDD_meas_event_T event[FDD_MAX_MEAS_EVENT]; /* List of TX power meas event */
+
+ kal_uint8 filter; /* L3 filtering coefficient. 0 ~ 19 */
+
+} fdd_cphy_measurement_config_tx_power_req_struct;
+
+typedef struct _fdd_cphy_measurement_config_tx_power_stop_req_struct
+{
+ LOCAL_PARA_HDR
+
+} fdd_cphy_measurement_config_tx_power_stop_req_struct;
+
+
+
+typedef struct _fdd_cphy_treselection_start_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint32 treselection_value; /* One shot cell measurement will be triggered after T_reselection.
+ treselection_value can not be 0. uint = ms */
+ kal_uint8 freq_num; /* Indicate the number of freq that need to perform CM after T_reselection.
+ range: 1~FDD_MAX_UMTS_FREQ */
+ kal_uint16 freq[FDD_MAX_UMTS_FREQ]; /* Indicate the frequency that need to perfrom CM. */
+} fdd_cphy_treselection_start_req_struct;
+
+typedef struct _fdd_cphy_tx_power_result_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_tx_power_result_req_struct;
+
+typedef struct _fdd_cphy_specific_cell_search_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 freq; /* UARFCN of the specific cell */
+ kal_uint16 psc; /* Primary scrambling code of the specific cell */
+ kal_bool sttd; /* True if STTD is used in the designated cell. */
+ kal_bool sttd_valid; /* True if sttd is useful to UL1 */
+ kal_bool freq_correction; /* True if frequency correction is required */
+
+} fdd_cphy_specific_cell_search_req_struct;
+
+typedef struct _fdd_cphy_specific_cell_search_stop_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_specific_cell_search_stop_req_struct;
+
+typedef struct _fdd_cphy_reset_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_reset_req_struct;
+
+typedef struct _fdd_cphy_rf_on_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 working_UMTS_FDD_band[4];
+} fdd_cphy_rf_on_req_struct;
+
+typedef struct _fdd_cphy_rf_off_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_rf_off_req_struct;
+
+typedef struct _fdd_cphy_set_active_rat_req_struct
+{
+ LOCAL_PARA_HDR
+
+ FDD_mode_type_E mode; /* Curernt mode setting (Single, Dual) */
+ FDD_rat_type_E rat; /* Current active RAT setting (Flight, UMTS, GSM) */
+ erac_rat_enum full_rat_info; /* Full RAT info */
+} fdd_cphy_set_active_rat_req_struct;
+
+/* 20080131: By MEME's request, define new I/F for event 6E. */
+typedef struct _fdd_cphy_measurement_config_rssi_event_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool enable; /* Indicate if we need to monitor the 6E RSSI event. TRUE means to be activated */
+ kal_uint16 delay; /* Time to Trigger. 0 ~ 500 frames */
+} fdd_cphy_measurement_config_rssi_event_req_struct;
+
+/*-------- Message(Primitive) related definition ----------------------*/
+
+typedef struct _FDD_msg_buf_T /* Buffer of message container */
+{
+ kal_uint8 channel_id; /* Channel ID */
+ msg_type msg_id; /* Message ID */
+ kal_uint16 buff_size; /* Buffer size */
+ local_para_struct *buffer; /* Channel configuration message buffer */
+} FDD_msg_buf_T;
+
+
+typedef struct _fdd_cphy_msg_container_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 at_ref; /* Reference channge of activation time.
+ 0 : Ref channel is the released channel.
+ There should be ch to be released
+ 1 : Ref channel is the setup channel.
+ There should be ch to be setup.
+ */
+ kal_int16 rx_cfn; /* Indicate peer message receive cfn. Ex: tti = 4, receive frame number : 0,1,2,3. rx_cfn = 3 (set by ul1)
+ [Range]: -1 ~ 255.
+ -1 : Means upper layer internal control
+ */
+#ifdef __UMTS_R6__
+ kal_bool delay_restriction; /* From R6 : TS25.331 8.6.3.1 */
+#endif
+ FDD_meas_control_E meas_control; /* Indicate whether UL1 need to not to resume meas. after apply corresponding buffer's config. */
+
+ kal_uint8 msg_num; /* # of included msg. 1 ~ 4 */
+ FDD_msg_buf_T msg_buffer[4]; /* List of msg buffer for included channel msg */
+
+ /* [R5R6] For HS-DSCH and E-DCH */
+ kal_uint8 h_msg_num; /* # of included H-msg. 0~2 */
+ FDD_msg_buf_T h_msg_buffer[2]; /* List of msg buffer for included channel msg */
+ kal_uint8 e_msg_num; /* # of included E-msg. 0~2 */
+ FDD_msg_buf_T e_msg_buffer[2]; /* List of msg buffer for included channel msg */
+#ifdef __UMTS_R7__
+ kal_uint8 cpc_msg_num; /* # of included CPC-msg. 0~1 */
+ FDD_msg_buf_T cpc_msg_buffer[1]; /* List of msg buffer for included CPC msg */
+#endif /* __UMTS_R7__ */
+// PLMN releated info
+ FDD_PLMN_LAC_PARAM_T plmn_info; /*PLMN, RAC and LAC info*/
+// RLC window size info
+ kal_uint8 rlc_info_msg_num; /* # of included rlc_info */
+ FDD_RLC_WINDOW_SIZE_INFO_T rlc_info_msg_buffer[4]; /* List of msg buffer for included rlc_info msg */
+} fdd_cphy_msg_container_req_struct;
+
+typedef struct _fdd_cphy_abort_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_abort_req_struct;
+
+typedef struct _fdd_cphy_TAS_notify_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_TAS_notify_ind_struct;
+/****************************************************************/
+/* __HSDPA_SUPPORT__ */
+typedef struct _fdd_cphy_hsdsch_setup_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+
+ FDD_dl_dpch_rla_T hsdsch_rla; /* Downlink information common for all RLs and downlink DPCH info. common for all RLs */
+ /* tgps_num in hsdsch_rla should be 0.*/
+ FDD_dl_dpch_rl_T hsdsch_rl; /* Downlink information for each RL (and downlink DPCH info. for each RL (for HS-DSCH serving cell*/
+ FDD_hs_scch_info_T hs_scch_info; /* HS-SCCH Info (25.331 10.3.6.36a) */
+ FDD_hs_meas_fb_info_T hs_meas_fb_info; /* Measurement Feedback Info (25.331 10.3.6.40a) */
+ FDD_hs_harq_info_T hs_harq_info; /* HARQ Info (25.331 10.3.5.7a) */
+ FDD_hs_ulpc_info_T hs_ulpc_info; /* Uplink power control info related to HSDPA */
+
+ kal_bool mac_hs_reset; /* TRUE indicates the MAC-hs entity needs to be reset */
+ kal_uint8 mac_event; /* Indicate if UMAC need setup/modify/release event */
+ kal_uint16 h_rnti; /* H-RNTI assigned to UE */
+#ifdef __UMTS_R7__
+ FDD_rrc_state_E rrc_status; /* Indicate the RRC current status */
+ FDD_hspdsch_state_info_T hspdsch_state_info; /* HSPDSCH related parameter */
+ FDD_hs_scch_less_info_T hs_scch_less_info; /* HS-SCCH less Info (25.331 10.3.6.36ab) */
+ kal_bool h_rnti_valid; /* Indicate if h_rnti field is valid for UL1. H-RNTI shall be always valid for CELL_DCH, CELL_FACH, IDLE_FACH, and shall be always invalid for URA_PCH. */
+ kal_bool c_h_rnti_valid; /* [R7] Indicate if common H-RNTI is valid for UL1. This field shall be set to FALSE when rrc_status is equal to CELL_DCH. */
+ kal_uint16 c_h_rnti; /* [R7] Common H-RNTI assigned to UE. UL1 should not refer to this field if c_h_rnti_valid = KAL_FALSE. */
+ kal_bool b_h_rnti_valid; /* [R7] Indicate if bcch-specific H-RNTI is valid for UL1 */
+ kal_uint16 b_h_rnti; /* [R7] bcch-specific H-RNTI assigned to UE. UL1 should not refer to this field if b_h_rnti_valid = KAL_FALSE. */
+#ifdef __UMTS_R8__
+ kal_bool cqi_report_on; /* This field should always be TRUE when rrc_status = CELL_DCH, and should always be FALSE when rrc_status = CELL_PCH and URA_PCH. */
+ kal_bool ack_nack_report_on; /* This field should always be TRUE when rrc_status = CELL_DCH, and should always be FALSE when rrc_status = CELL_PCH and URA_PCH. */
+ FDD_hs_cell_fach_drx_T hs_cell_fach_drx; /* HS CELL_FACH DRX information. This field is only valid when rrc_status = CELL_FACH. */
+ FDD_dc_hsdpa_info_T dc_hsdpa_info; /* DC-HSDPA information. This field is only valid when rrc_status = CELL_DCH. */
+ FDD_dl_pc_info_T dl_pc_common_edch; /* dl power control info. This field in only valid in EFACH state with common E-DCH transmission */
+#ifdef __UMTS_R10__
+ FDD_dc_hsdpa_info_T addi_dc_hsdpa_info[FDD_MAX_ADDI_DC_HSDPA]; /* Additional DC-HSDPA information. This field is only valid when rrc_status = CELL_DCH.
+ FDD_MAX_ADDI_DC_HSDPA = 2. */
+#endif /* __UMTS_R10__ */
+#endif /* __UMTS_R8__ */
+#endif /* __UMTS_R7__ */
+} fdd_cphy_hsdsch_setup_req_struct;
+
+typedef struct _fdd_cphy_hsdsch_modify_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+
+#ifdef __UMTS_R7__
+ kal_uint16 modify_field; /* Bit field to represent for the parameters that should be modified
+ Bit 0 : dedicated H-RNTI or common H-RNTI
+ Bit 1 : hsdsch_rla
+ Bit 2 : hsdsch_rl
+ Bit 3 : HS-SCCH Info
+ Bit 4 : Measurement Feedback Info
+ Bit 5 : HARQ Info
+ Bit 6 : Uplink power control info related to HSDPA
+ Bit 7 : h_rnti_valid or hspdsch_state_info
+ Bit 8 : HS-SCCH less Info
+ Bit 9 : [R8] FDD_dc_hsdpa_info_T
+ Bit10 : [R8] FDD_hs_cell_fach_drx_T
+ Bit11 : [R10] addi_dc_hsdpa_info[0]
+ */
+#else /* __UMTS_R7__ */
+ kal_uint8 modify_field; /* Bit field to represent for the parameters that should be modified
+ Bit 0 : H-RNTI
+ Bit 1 : hsdsch_rla
+ Bit 2 : hsdsch_rl
+ Bit 3 : HS-SCCH Info
+ Bit 4 : Measurement Feedback Info
+ Bit 5 : HARQ Info
+ Bit 6 : Uplink power control info related to HSDPA
+ */
+#endif /* !__UMTS_R7__ */
+ FDD_dl_dpch_rla_T hsdsch_rla; /* Downlink information common for all RLs and downlink DPCH info. common for all RLs */
+ /* tgps_num in hsdsch_rla should be 0.*/
+ FDD_dl_dpch_rl_T hsdsch_rl; /* Downlink information for each RL (and downlink DPCH info. for each RL (for HS-DSCH serving cell*/
+ FDD_hs_scch_info_T hs_scch_info; /* HS-SCCH Info (25.331 10.3.6.36a) */
+ FDD_hs_meas_fb_info_T hs_meas_fb_info; /* Measurement Feedback Info (25.331 10.3.6.40a) */
+ FDD_hs_harq_info_T hs_harq_info; /* HARQ Info (25.331 10.3.5.7a) */
+ FDD_hs_ulpc_info_T hs_ulpc_info; /* Uplink power control info related to HSDPA */
+ kal_bool mac_hs_reset; /* TRUE indicates the MAC-hs entity needs to be reset */
+ kal_uint8 mac_event; /* Indicate if UMAC need setup/modify/release event */
+ kal_uint16 h_rnti; /* H-RNTI assigned to UE */
+#ifdef __UMTS_R7__
+ FDD_rrc_state_E rrc_status; /* Indicate the RRC current status */
+ FDD_hspdsch_state_info_T hspdsch_state_info; /* HSPDSCH related parameter */
+ FDD_hs_scch_less_info_T hs_scch_less_info; /* HS-SCCH less Info (25.331 10.3.6.36ab) */
+ kal_bool h_rnti_valid; /* Indicate if h_rnti field is valid for UL1. H-RNTI shall be always valid for CELL_DCH, CELL_FACH, IDLE_FACH, and shall be always invalid for URA_PCH. */
+ kal_bool c_h_rnti_valid; /* [R7] Indicate if common H-RNTI is valid for UL1. This field shall be set to FALSE when rrc_status is equal to CELL_DCH. */
+ kal_uint16 c_h_rnti; /* [R7] Common H-RNTI assigned to UE. UL1 should not refer to this field if c_h_rnti_valid = KAL_FALSE. */
+ kal_bool b_h_rnti_valid; /* [R7] Indicate if bcch-specific H-RNTI is valid for UL1 */
+ kal_uint16 b_h_rnti; /* [R7] bcch-specific H-RNTI assigned to UE. UL1 should not refer to this field if b_h_rnti_valid = KAL_FALSE. */
+#ifdef __UMTS_R8__
+ kal_bool cqi_report_on; /* This field should always be TRUE when rrc_status = CELL_DCH, and should always be FALSE when rrc_status = CELL_PCH and URA_PCH. */
+ kal_bool ack_nack_report_on; /* This field should always be TRUE when rrc_status = CELL_DCH, and should always be FALSE when rrc_status = CELL_PCH and URA_PCH. */
+ FDD_hs_cell_fach_drx_T hs_cell_fach_drx; /* HS CELL_FACH DRX information. This field is only valid when rrc_status = CELL_FACH. */
+ FDD_dc_hsdpa_info_T dc_hsdpa_info; /* DC-HSDPA information. This field is only valid when rrc_status = CELL_DCH. */
+#ifdef __UMTS_R10__
+ FDD_dc_hsdpa_info_T addi_dc_hsdpa_info[FDD_MAX_ADDI_DC_HSDPA]; /* Additional DC-HSDPA information. This field is only valid when rrc_status = CELL_DCH.
+ FDD_MAX_ADDI_DC_HSDPA = 2. */
+#endif /* __UMTS_R10__ */
+#endif /* __UMTS_R8__ */
+#endif /* __UMTS_R7__ */
+} fdd_cphy_hsdsch_modify_req_struct;
+
+typedef struct _fdd_cphy_hsdsch_release_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+
+ kal_bool mac_hs_reset; /* TRUE indicates the MAC-hs entity needs to be reset */
+ kal_uint8 mac_event; /* Indicate if UMAC need setup/modify/release event */
+} fdd_cphy_hsdsch_release_req_struct;
+
+#ifdef __UMTS_R7__
+typedef struct _FDD_phy_mac_ehs_reset_req_struct
+{
+ LOCAL_PARA_HDR
+
+ FDD_mac_ehs_reset_cause_E cause; /* Indicate the cause about the reason of UMAC reset */
+} fdd_phy_mac_ehs_reset_req_struct;
+#endif /* __UMTS_R7__ */
+
+#ifdef __UMTS_R7__
+typedef struct _fdd_cphy_cpc_config_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+ FDD_hs_dtx_drx_info_T hs_dtx_drx_info; /* DTX/DRX information */
+} fdd_cphy_cpc_config_req_struct;
+
+typedef struct _fdd_cphy_d_hrnti_detected_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_d_hrnti_detected_ind_struct;
+
+#ifdef __UMTS_R8__
+typedef struct _fdd_cphy_start_monitor_order_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 h_rnti; /* h_rnti to decode target cell HS-SCCH */
+ kal_uint16 psc; /* psc to receive target cell HS-SCCH */
+ FDD_hs_scch_info_T hs_scch_info; /* ovsf_code_num field should always be 1 */
+ kal_int16 rpt_act_time; /* [Range]: (-1~255). (0-255) for CFN type, */
+} fdd_cphy_start_monitor_order_req_struct;
+
+typedef struct _fdd_cphy_start_monitor_order_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_start_monitor_order_cnf_struct;
+
+typedef struct _fdd_cphy_stop_monitor_order_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_stop_monitor_order_req_struct;
+
+typedef struct _fdd_cphy_stop_monitor_order_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_stop_monitor_order_cnf_struct;
+
+typedef struct _fdd_cphy_monitor_order_received_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 psc; /* Range: {0..511} */
+ kal_int16 act_time; /* Range {-1..255}: -1 is T324, 0..255 is AT */
+ kal_uint16 rx_cfn;
+} fdd_cphy_monitor_order_received_ind_struct;
+#endif /* __UMTS_R8__ */
+
+#endif /* __UMTS_R7__ */
+
+typedef struct _fdd_cphy_rlc_info_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 distance[FDD_MAX_HS_RB_NUM]; /* The distance between VR_H and VR_R (VR_H - VR_R) */
+ kal_uint32 rx_window_size[FDD_MAX_HS_RB_NUM];
+ kal_uint32 RTT[FDD_MAX_HS_RB_NUM]; /* Round trip time */
+} fdd_cphy_rlc_info_req_struct;
+
+/****************************************************************/
+
+/****************************************************************/
+/* __HSUPA_SUPPORT__ */
+typedef struct _fdd_cphy_edch_setup_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+
+ kal_bool pri_e_rnti_valid; /* Indicate if pri_e_rnti field is valid */
+ kal_uint16 pri_e_rnti; /* Primary E-RNTI assigned to UE */
+ kal_bool sec_e_rnti_valid; /* Indicate if sec_e_rnti field is valid */
+ kal_uint16 sec_e_rnti; /* Secondary E-RNTI assigned to UE */
+
+ FDD_edch_tti_E edch_tti; /* E-DCH TTI 2ms or 10ms */
+
+ kal_uint16 edch_serv_psc; /* serving E-DCH cell */
+
+ FDD_eagch_info_T eagch_info; /* E-AGCH info*/
+
+ kal_uint8 ehich_info_num; /* Number of E-HICH info: 1~FDD_MAX_EDCH_RL */
+ FDD_ehich_info_T ehich_info[FDD_MAX_EDCH_RL]; /* E-HICH info */
+ kal_uint8 ergch_info_num; /* Number of E-RGCH info: 0~FDD_MAX_EDCH_RL */
+ FDD_ergch_info_T ergch_info[FDD_MAX_EDCH_RL]; /* E-RGCH info */
+
+ FDD_edpdch_info_T edpdch_info; /* E-DPDCH info */
+ FDD_edpcch_info_T edpcch_info; /* E-DPCCH info */
+
+ FDD_edch_harq_info_T edch_harq_info; /* HARQ info for E-DCH */
+
+ kal_uint8 mac_event; /* Indicate if UMAC need setup/modify/release event */
+#ifdef __UMTS_R7__
+ kal_bool ul_16QAM_on; /* Uplink 16QAM enable/disable */
+#endif /* __UMTS_R7__ */
+#ifdef __UMTS_R8__
+ FDD_edch_transmission_type_E transmission_type; /* Specify that E-DCH is allocated in dedicated state or common state */
+ FDD_common_edch_info_T common_edch_info; /* [R8] This field is only valid when transmission_type is equal to FDD_EDCH_IN_COMMON_STATE */
+#ifdef __UMTS_R9__
+ FDD_dc_hsupa_info_T dc_hsupa_info; /* [R9] DC-HSUPA information. This field is only valid when rrc_status = CELL_DCH. */
+#endif /* __UMTS_R9__ */
+#endif /* __UMTS_R8__ */
+} fdd_cphy_edch_setup_req_struct;
+
+typedef struct _fdd_cphy_edch_modify_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+
+ kal_uint16 modify_field; /* Bit field to represent for the parameters that should be modified
+ Bit 0 : E-RNTI
+ Bit 1 : E-DCH TTI
+ Bit 2 : E-AGCH info
+ Bit 3 : E-HICH info
+ Bit 4 : E-RGCH info
+ Bit 5 : E-DPDCH info
+ Bit 6 : E-DPCCH info
+ Bit 7 : E-DCH serving cell
+ Bit 8 : E-DCH harq info
+ Bit 9 : ul_16QAM_on
+ Bit 10: [R8] FDD_common_edch_info_T
+ Bit 11: [R9] FDD_dc_hsupa_info_T
+ */
+
+ kal_bool pri_e_rnti_valid; /* Indicate if pri_e_rnti field is valid */
+ kal_uint16 pri_e_rnti; /* Primary E-RNTI assigned to UE */
+ kal_bool sec_e_rnti_valid; /* Indicate if sec_e_rnti field is valid */
+ kal_uint16 sec_e_rnti; /* Secondary E-RNTI assigned to UE */
+ FDD_edch_tti_E edch_tti; /* E-DCH TTI 2ms or 10ms */
+
+ kal_uint16 edch_serv_psc; /* serving E-DCH cell */
+
+ FDD_eagch_info_T eagch_info; /* E-AGCH info*/
+
+ kal_uint8 ehich_info_num; /* Number of E-HICH info: 1~FDD_MAX_EDCH_RL */
+ FDD_ehich_info_T ehich_info[FDD_MAX_EDCH_RL]; /* E-HICH info */
+ kal_uint8 ergch_info_num; /* Number of E-RGCH info: 0~FDD_MAX_EDCH_RL */
+ FDD_ergch_info_T ergch_info[FDD_MAX_EDCH_RL]; /* E-RGCH info */
+
+ FDD_edpdch_info_T edpdch_info; /* E-DPDCH info */
+ FDD_edpcch_info_T edpcch_info; /* E-DPCCH info */
+
+ FDD_edch_harq_info_T edch_harq_info; /* HARQ info for E-DCH */
+
+ kal_uint8 mac_event; /* Indicate if UMAC need setup/modify/release event */
+#ifdef __UMTS_R7__
+ kal_bool ul_16QAM_on; /* Uplink 16QAM enable/disable */
+#endif /* __UMTS_R7__ */
+#ifdef __UMTS_R8__
+ FDD_edch_transmission_type_E transmission_type; /* Specify that E-DCH is allocated in dedicated state or common state */
+ FDD_common_edch_info_T common_edch_info; /* [R8] This field is only valid when transmission_type is equal to FDD_EDCH_IN_COMMON_STATE */
+#ifdef __UMTS_R9__
+ FDD_dc_hsupa_info_T dc_hsupa_info; /* [R9] DC-HSUPA information. This field is only valid when rrc_status = CELL_DCH. */
+#endif /* __UMTS_R9__ */
+#endif /* __UMTS_R8__ */
+} fdd_cphy_edch_modify_req_struct;
+
+typedef struct _fdd_cphy_edch_release_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 act_time; /* activation time. -1 ~ 255. -1 means immediate */
+ kal_uint8 mac_event; /* Indicate if UMAC need setup/modify/release event */
+} fdd_cphy_edch_release_req_struct;
+/****************************************************************/
+
+/****************************************************************/
+/* GEMINI 2.0 */
+#if defined( __GEMINI__ ) && defined ( __UMTS_RAT__ )
+typedef struct _fdd_cphy_channel_priority_adjustment_req_struct
+{
+ LOCAL_PARA_HDR
+#ifdef __MODIFY_CTCH_RECEPTION_PRIO__
+ FDD_rrce_gemini_priority_adjust_E channel_priority;
+#else
+ kal_bool channel_priority_high; /* TRUE: UL1 channel priority is set to high. The priority of the timer related DCH/FACH will has the highest priority.
+ FALSE: UL1 channel priority is set to normal. The priority of the timer related DCH/FACH will has the lowest priority. */
+ FDD_rrce_gemini_priority_adjust_E adjust_channel;
+#endif
+} fdd_cphy_channel_priority_adjustment_req_struct;
+
+typedef struct _FDD_urr_ul1_switch_gemini_mode_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool is_virtual_mode; /* TRUE: UL1 will switch from Normal mode to Virtual mode.
+ FALSE: UL1 will switch from Virtual mode to Normal mode. */
+} fdd_urr_ul1_switch_gemini_mode_req_struct;
+
+
+typedef struct _fdd_cphy_peer_gemini_mode_notify_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool is_peer_virtual_mode; /* TRUE: UL1 is informed that peer SIM enters virtual mode.
+ FALSE: UL1 is informed that peer SIM leaves virtual mode. */
+} fdd_cphy_peer_gemini_mode_notify_req_struct;
+
+
+
+typedef struct _FDD_rsvas_ul1_virtual_resume_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_rsvas_ul1_virtual_resume_req_struct;
+
+#endif /* __GEMINI__ && __UMTS_RAT__ */
+
+typedef struct _fdd_cphy_rb_lpbk_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_rb_lpbk_req_struct;
+
+/****************************************************************/
+
+
+/*****************************************************************************
+ confirm & indication for cphy
+*****************************************************************************/
+typedef struct _fdd_cphy_rb_lpbk_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_rb_lpbk_cnf_struct;
+
+typedef struct _fdd_cphy_bch_setup_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_bch_setup_cnf_struct;
+
+typedef struct _fdd_cphy_bch_setup_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool success; /* Indicate if BCH setup success.
+ For current L1, it always return true.
+ */
+} fdd_cphy_bch_setup_ind_struct;
+
+typedef struct _fdd_cphy_bch_modify_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_bch_modify_cnf_struct;
+
+typedef struct _fdd_cphy_bch_modify_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_bch_modify_ind_struct;
+
+typedef struct _fdd_cphy_bch_release_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_bch_release_cnf_struct;
+
+typedef struct _fdd_cphy_bch_release_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_bch_release_ind_struct;
+
+typedef struct _fdd_cphy_sfn_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool success; /* Indicate if SFN ready success */
+ kal_int32 tm; /* LST to Cell boundary. 0 ~ 38044*8-1 */
+ kal_int16 off; /* Frame # offset to LST. 0 ~ 4095 */
+
+ kal_uint16 dl_freq; /* UARFCN of the specific cell */
+ kal_uint16 psc; /* Primary scrambling code of the specific cell */
+
+ kal_bool dch_meas_valid; /* TRUE: DCH related parameters are valid */
+ kal_uint8 CFN; /* CFN of serving cell*/
+ kal_uint16 SFN; /* SFN of neighbor cell*/
+ kal_uint8 meas_off; /* SFN_CFN difference in frames*/
+ kal_uint16 meas_tm; /* SFN_CFN difference in chips*/
+
+ kal_bool common_meas_valid; /* TRUE: common channel related parameter is valid */
+ kal_uint32 meas_sfn_diff; /* SFN_SFN difference in chips*/
+
+#if defined( __GEMINI__ ) && defined ( __UMTS_RAT__ )
+ FDD_uas_gemini_conflict_cause_enum conflict_cause;
+ kal_uint16 peer_priority_index;
+#endif
+
+} fdd_cphy_sfn_ind_struct;
+
+
+/* MEME use this primitive as a trigger point to query UL1 tgps status */
+typedef struct _fdd_cphy_tgps_delete_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 tgpsi_nbr; /* Number of TGPSI deleted */
+ kal_uint8 tgpsi[FDD_MAX_TGPS]; /* TGPSI deleted*/
+} fdd_cphy_tgps_delete_ind_struct;
+
+typedef struct _fdd_cphy_tgps_info_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ umts_fdd_dch_gap_struct dch_gap_pattern; /* The latest TGPS pattern indicator */
+} fdd_cphy_tgps_info_ind_struct;
+
+typedef struct _fdd_cphy_tgps_overlap_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 tgpsi; /* TGPSI of TGPS beging removed. 1 ~ 6 */
+} fdd_cphy_tgps_overlap_ind_struct;
+
+typedef struct _fdd_cphy_gap_complete_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 tgpsi; /* TGPSI of TGPS beging completed. 1 ~ 6 */
+} fdd_cphy_gap_complete_ind_struct;
+
+typedef struct _fdd_cphy_t312_expiry_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 tid; /* Transaction id */
+
+} fdd_cphy_t312_expiry_ind_struct;
+
+typedef struct _fdd_cphy_dl_init_sync_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 tid; /* Transaction id */
+ kal_int32 dpch_tm; /* For CFN-SFN TD */
+ kal_int16 dpch_off; /* For CFN-SFN TD */
+} fdd_cphy_dl_init_sync_ind_struct;
+
+typedef struct _phy_ul_not_activated_ind_struct
+{
+ LOCAL_PARA_HDR
+} phy_ul_not_activated_ind_struct;
+
+typedef struct _fdd_cphy_rl_failure_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_rl_failure_ind_struct;
+
+/*Raymond 20070717 remove DELETE_TGPS CNF/IND interface*/
+typedef struct _fdd_cphy_frequency_scan_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_frequency_scan_cnf_struct;
+
+typedef struct _fdd_cphy_frequency_scan_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_frequency_scan_ind_struct;
+
+typedef struct _fdd_cphy_frequency_scan_continue_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_frequency_scan_continue_cnf_struct;
+
+typedef struct _fdd_cphy_frequency_scan_suspend_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_frequency_scan_suspend_cnf_struct;
+
+typedef struct _fdd_cphy_frequency_scan_suspend_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_frequency_scan_suspend_ind_struct;
+
+/* This interface should not be used in MT6268 */
+typedef struct _fdd_cphy_frequency_scan_stop_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_frequency_scan_stop_cnf_struct;
+
+/* This interface should not be used in MT6268 */
+typedef struct _fdd_cphy_frequency_scan_stop_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_frequency_scan_stop_ind_struct;
+
+/* MSG_ID_FDD_CPHY_RSSI_SNIFFER_START_CNF (Add by Janet) */
+typedef struct _fdd_cphy_rssi_sniffer_start_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_rssi_sniffer_start_cnf_struct;
+
+/* MSG_ID_FDD_CPHY_RSSI_SNIFFER_STOP_CNF (Add by Janet) */
+typedef struct _fdd_cphy_rssi_sniffer_stop_cnf_struct
+{
+ LOCAL_PARA_HDR
+
+} fdd_cphy_rssi_sniffer_stop_cnf_struct;
+
+/* MSG_ID_FDD_CPHY_RSSI_SNIFFER_STOP_IND (Add by Janet) */
+typedef struct _fdd_cphy_rssi_sniffer_stop_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_rssi_sniffer_stop_ind_struct;
+
+/* MSG_ID_FDD_CPHY_RSSI_SNIFFER_SIGNAL_APPEAR_IND (Add by Janet) */
+typedef struct _fdd_cphy_rssi_sniffer_signal_appear_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 num_freq_list; /* # of freq for scan list of RSSI sniffer */
+ kal_uint16 uarfcn_list[FDD_MAX_RSSI_SNIFFER_SCAN_LIST]; /* List of UARFCN */
+
+} fdd_cphy_rssi_sniffer_signal_appear_ind_struct;
+
+/* MSG_ID_FDD_CPHY_RSSI_SNIFFER_EXECUTED_IND */
+typedef struct _fdd_cphy_rssi_sniffer_executed_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_rssi_sniffer_executed_ind_struct;
+typedef struct _fdd_cphy_measurement_config_tgps_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_measurement_config_tgps_cnf_struct;
+
+typedef struct _fdd_cphy_measurement_config_tgps_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_measurement_config_tgps_ind_struct;
+
+typedef struct _fdd_cphy_measurement_config_fmo_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_measurement_config_fmo_cnf_struct;
+
+typedef struct _fdd_cphy_measurement_config_cell_cnf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 tid; /* Transaction ID to sync between req and ind */
+} fdd_cphy_measurement_config_cell_cnf_struct;
+
+typedef struct _fdd_cphy_measurement_cell_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 tid; /* Transaction ID to sync between req and ind */
+ FDD_measured_type_E measured_type; /*IntraFrequency or InterFrequency*/
+ kal_uint16 uarfcn; /* DL UARFCN */
+ kal_int16 rssi; /* RSSI. Range: -400 ~ -100 means (-100 ~ -25)dBm 0.25 dB step */
+ kal_bool fs_halt; /* Indicate if freq scan halt. only for freq scan report */
+ kal_bool isSuspendByRSVAU; /* Indicate CSE the frequency is suspended. Only TRUE if UL1 receive suspend_req in FS_START and FS_CONTINUE. */
+ kal_uint8 num_cell; /* # of cell reported in this msg */
+ FDD_measured_cell_T measured_cell[FDD_MAX_NUM_MEAS_CELL]; /* list of measured cells */
+ kal_bool rl_status; /* Indicate tx available */
+#ifdef __UMTS_R8__
+ kal_bool isLongPeriodIn3GStandby; /* [Rel8][ABPCR] For RR, Indicate if it is prio search peiorid*/
+#endif
+ FDD_supplementary_report_info_T supplementary_report_info; /* to notify L3 further information */
+ kal_bool sttd_valid; /* Indicate sttd result is valid (reliable) or not */
+} fdd_cphy_measurement_cell_ind_struct;
+
+typedef struct _fdd_cphy_measurement_cell_sfn_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 dl_freq; /* UARFCN of the specific cell */
+ kal_uint16 psc; /* Primary scrambling code of the specific cell */
+ kal_int32 tm; /* LST to Cell boundary. 0 ~ 38044*8-1 */
+ kal_int16 off; /* Frame # offset to LST. 0 ~ 4095 */
+ kal_uint16 SFN; /* SFN of neighbor cell*/
+ kal_bool sttd; /* STTD info of the specified cell */
+
+#if defined( __GEMINI__ ) && defined ( __UMTS_RAT__ )
+ FDD_uas_gemini_conflict_cause_enum conflict_cause;
+#endif
+} fdd_cphy_measurement_cell_sfn_ind_struct;
+
+typedef struct _fdd_cphy_measurement_rl_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 rl_num; /* # of RL */
+ FDD_rl_meas_result_T rl_meas_result[FDD_MAX_RL]; /* RL measurement result for each RL */
+ kal_int16 tx_power; /* Averaged TX power meas result */
+} fdd_cphy_measurement_rl_ind_struct;
+
+typedef struct _fdd_cphy_measurement_config_tx_power_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_measurement_config_tx_power_cnf_struct;
+
+typedef struct _fdd_cphy_measurement_tx_power_periodic_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 periodic_measurement_id;
+ kal_int16 tx_power; /* Averaged TX power meas result */
+ kal_bool last_report; /* Indicate if this is the last report for period rpt */
+} fdd_cphy_measurement_tx_power_periodic_ind_struct;
+
+typedef struct _fdd_cphy_measurement_tx_power_event_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 tx_power; /* Averaged TX power meas result */
+ kal_uint8 event_id; /* Event ID being triggered */
+ kal_uint8 measurement_id; /* Measurement ID being triggered. */
+} fdd_cphy_measurement_tx_power_event_ind_struct;
+
+typedef struct _fdd_cphy_tx_power_result_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool valid; /* Indicate if below tx_power is vaide */
+ kal_int16 tx_power; /* Averaged TX power meas result */
+} fdd_cphy_tx_power_result_ind_struct;
+
+typedef struct _fdd_cphy_specific_cell_search_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool success; /* Indicate if search success */
+ FDD_measured_cell_T measured_cell; /* The found(1) cell */
+} fdd_cphy_specific_cell_search_ind_struct;
+
+typedef struct _fdd_cphy_specific_cell_search_stop_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_specific_cell_search_stop_ind_struct;
+
+typedef struct _fdd_cphy_reset_cnf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool success; /* Indicate whether the L1 initialization sucess or fail */
+} fdd_cphy_reset_cnf_struct;
+
+
+typedef struct _fdd_cphy_rf_on_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_rf_on_cnf_struct;
+
+typedef struct _fdd_cphy_rf_off_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_rf_off_cnf_struct;
+
+typedef struct _fdd_cphy_set_active_rat_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_set_active_rat_cnf_struct;
+
+
+typedef struct _fdd_cphy_msg_container_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_msg_container_cnf_struct;
+
+typedef struct _fdd_cphy_msg_container_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool success_flag; /* Indicate if configure success
+ For current L1, it always returns true.
+ */
+ kal_bool pending_tgps; /* Indicate if there is any pending TGPS.
+ Only sent when there is any channel to be released.
+ */
+ FDD_msg_container_error_E error_cause; /* Error cause of message container.
+ */
+} fdd_cphy_msg_container_ind_struct;
+
+typedef struct _fdd_cphy_abort_cnf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool success; /* Indicate if abort request success
+ TRUE : L1 will back to the old channel configure.
+ FALSE : L1 will go forward to the new channel configure.
+ */
+} fdd_cphy_abort_cnf_struct;
+
+typedef struct _fdd_cphy_tx_status_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool is_tx_allow; /* the current TX status
+ TRUE : Currentlly, TX is available in UL1.
+ FALSE : Currentlly, TX is not available in UL1.
+ */
+} fdd_cphy_tx_status_ind_struct;
+
+/* 20080131: By MEME's request, define new I/F for event 6E. */
+typedef struct _fdd_cphy_rssi_exceed_range_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 tx_power; /* Averaged TX power meas result */
+} fdd_cphy_rssi_exceed_range_ind_struct;
+
+typedef struct _fdd_cphy_duplex_mode_change_req_struct
+{
+ LOCAL_PARA_HDR
+
+ FDD_duplex_mode_info_T duplex_mode_info;
+} fdd_cphy_duplex_mode_change_req_struct;
+
+typedef struct _fdd_cphy_duplex_mode_change_cnf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool result;
+} fdd_cphy_duplex_mode_change_cnf_struct;
+
+/* Suspend and resume Smart Paging feature */
+
+typedef struct _fdd_cphy_smart_paging_reconfig_req_struct
+{
+ LOCAL_PARA_HDR
+ kal_bool smartpaging_enabled;
+} fdd_cphy_smart_paging_reconfig_req_struct;
+
+/*****************************************************************************
+ request for phy
+*****************************************************************************/
+typedef struct _FDD_phy_rach_data_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 tfci; /* TFCI. 0 ~ 1023 */
+ FDD_ulTrchData TrchInfo; /* UL TrCH information */
+ kal_uint16 size_data; /* This parameter represents the number of bytes of the buffer. This number will be equal to the size of allocated buffer plus 4 bytes. */
+ kal_uint8 *data[FDD_MAX_UL_TB]; /* data for each TB. PS shoul allocate the buffer */
+} fdd_phy_rach_data_req_struct;
+
+typedef struct _FDD_phy_access_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool retry; /* Indicate if this is a retry request
+ TRUE : RACH TX failed in last acces procedure.
+ L1 will use the same RACH data an ASC in previous access procedure.
+ */
+ kal_uint8 asc; /* ASC. 0 ~ 7 */
+ kal_int16 ul_interference; /* UL interference in SIB7. -110 ~ 70dBm */
+#ifdef __UMTS_R8__
+ kal_bool is_CEDCH_CCCH; /* [R8] True: Common E-DCH transmission is for CCCH. FALSE for DTCH/DCCH */
+#endif /* __UMTS_R8__ */
+} fdd_phy_access_req_struct;
+
+
+/* confirm & indication for phy */
+typedef struct _FDD_phy_pch_setup_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_phy_pch_setup_ind_struct;
+
+typedef struct _FDD_phy_pch_modify_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_phy_pch_modify_ind_struct;
+
+typedef struct _FDD_phy_pch_release_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_phy_pch_release_ind_struct;
+
+typedef struct _FDD_phy_fach_setup_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_phy_fach_setup_ind_struct;
+
+typedef struct _FDD_phy_fach_modify_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_phy_fach_modify_ind_struct;
+
+typedef struct _FDD_phy_fach_release_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_phy_fach_release_ind_struct;
+
+typedef struct _FDD_phy_rach_setup_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_phy_rach_setup_ind_struct;
+
+typedef struct _FDD_phy_rach_release_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_phy_rach_release_ind_struct;
+
+typedef struct _FDD_phy_dch_setup_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 direction; /* Indicate UL or DL is being setup
+ 0 : DL DCH
+ 1 : UL DCH
+ 2 : FDPCH
+ */
+ kal_uint16 sfn; /* The LST value of the frame when DL DCH is setup.*/
+ kal_bool syncA_procedure_needed ; /* TRUE: Indicate syncA procedure is performed.*/
+} fdd_phy_dch_setup_ind_struct;
+
+typedef struct _FDD_phy_dch_modify_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 direction; /* Indicate UL or DL is being setup
+ 0 : DL_DCH
+ 1 : UL_DCH
+ 2 : FDPCH
+ */
+} fdd_phy_dch_modify_ind_struct;
+
+typedef struct _FDD_phy_dch_release_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 direction; /* Indicate UL or DL is being setup
+ 0 : DL DCH
+ 1 : UL DCH
+ 2 : FDPCH
+ */
+ kal_uint16 sfn; /* The LST value of the frame when DL DCH is setup.*/
+} fdd_phy_dch_release_ind_struct;
+
+typedef struct _FDD_phy_config_abort_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool success; /* Indicate if abort request success
+ TRUE : L1 will back to old channel configure
+ FALSE : L1 will go forward to new channel configure
+ */
+} fdd_phy_config_abort_ind_struct;
+
+typedef struct _FDD_phy_dl_init_sync_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_phy_dl_init_sync_ind_struct;
+
+typedef struct _FDD_phy_bch_data_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 *data; /* PS2 Excel request to add a "data" field in
+ fdd_phy_bch_data_ind_struct. This field is only for
+ protocol and not used by UL1 */
+ kal_bool no_path; /* True: L1 could not find the cell*/
+ kal_int32 tm; /* LST of the cell boundary. 0 ~ 38400*8-1 */
+ kal_int16 off; /* Frame # offset to LST. -1 ~ 4095. -1 means unknown */
+ kal_uint16 dl_freq; /* DL UARFCN */
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_uint8 crc_status; /* CRC result.
+ 0 : CRC error
+ 1 : CRC ok
+ 2 : no CRC */
+ kal_uint16 num_data; /* Length of the valid byte in data. 0 ~ FDD_MAX_DL_DATA */
+ /* Data is contained in peer buffer */
+ kal_bool measurement_valid;
+ kal_int16 rssi;
+ kal_int16 rscp;
+ kal_int16 ec_no;
+ kal_bool standby_no_gap; /* True: L1 has no enough gap time for SIB reception */
+
+#if defined( __GEMINI__ ) && defined ( __UMTS_RAT__ )
+ FDD_uas_gemini_conflict_cause_enum conflict_cause;
+ kal_uint16 peer_priority_index;
+#endif
+} fdd_phy_bch_data_ind_struct;
+
+typedef struct _FDD_phy_data_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ FDD_cctrch_type_E dl_cctrch; /* PCH, FACH or DCH CCTrCH */
+ kal_uint8 rx_fn; /* FN of the last frame in the TTI that was received */
+ kal_uint16 rx_sfn;
+ kal_uint16 dl_freq; /* DL UARFCN */
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_uint8 num_trch; /* # of trch */
+ FDD_dlTrchData TrchInfo[FDD_MAX_TRCH_NUM]; /* DL TrCH Info */
+ kal_uint32 crc; /* CRC result for each TB
+ 1 : CRC ok.
+ 0 : CRC error.
+ */
+ //kal_uint32 crc_bits[FDD_MAX_DL_TB]; /* CRC bits of each TB. (Used for Loop back mode) */
+ kal_uint16 num_data; /* Length of the valid byte in data. 0 ~ FDD_MAX_DL_DATA */
+ kal_uint8 *data; /* TB data pointer on share memory. This buffer is allocated by UL1, and freed by UMAC. */
+
+ kal_uint8 num_tb; /* num of TB. UMAC will put this value in the first byte of data allocated from ADM,
+ and the real data part starts at byte 4.*/
+
+ kal_uint32 raw_crc; /* Unmodified CRC for speech decoder */
+ kal_uint32 s_value[FDD_MAX_TRCH_NUM]; /* Viterbi decoder output S value for speech decoder */
+
+ /* UL1A provides debugging info. for VM in DCH dldata*/
+ kal_int16 tpc_SIR_lta; // For recording into speech VM
+ kal_int16 dpdch_SIR_lta; // For recording into speech VM
+ kal_int16 TFCI_max_corr; // For recording into speech VM
+
+#if defined( __GEMINI__ ) && defined ( __UMTS_RAT__ )
+ FDD_uas_gemini_conflict_cause_enum conflict_cause; /* This field is only used for Gemini. It indicates the channel conflict cause with peer channel.
+ It is only meaningful for PCH and CTCH. */
+ kal_uint8 rx_suspend; /* This field is only used for Gemini 2.0.It is a bitmap to indicate if some TrCH is conflicted with SIM2 gap.
+ The bit is set to ¡§1¡¨ only when the TrCH TTI ends in this frame and SIM2 gap exists in this TTI.
+ LSB bit is mapped to trchInfo[0]. */
+#endif /* __GEMINI__ && __UMTS_RAT__ */
+
+#ifdef __SMART_PAGING_3G_FDD__
+ kal_int8 pi_repeat_cycle;/* -1:invalid, -2:retransmission with CRC pass, 1~20:valid pi_repeat_cyle */
+#endif
+
+ kal_bool is_EBD_CRC_workaround; /*MT6290E1: indicate to MAC if additional CRC append in this data ind due to RXBRP workaround*/
+
+ /* serving cell information for speech debug. */
+ /* These values are valid only when DCH state and RL exists, otherwise, the value will be "0". */
+ kal_uint8 RSSI;
+ kal_uint8 RSCP;
+ kal_uint8 ECIO;
+ kal_uint8 HHO_SHO;
+
+} fdd_phy_data_ind_struct;
+
+typedef struct _fdd_phy_data_buffer_free_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 *data;
+} fdd_phy_data_buffer_free_ind_struct;
+
+typedef struct _FDD_phy_access_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ FDD_access_status_E access_status; /* The result of RACH access */
+} fdd_phy_access_ind_struct;
+
+
+/* __HSDPA_SUPPORT__ */
+typedef struct _FDD_phy_hsdsch_data_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 cfn; /* [Range]: 0-255 */
+ kal_uint8 subframe; /* indicate subf-number of this data_ind */
+ kal_uint8 mac_event; /* bit 0: MAC-hs setup, */
+ /* bit 1: MAC-hs release, */
+ /* bit 2: MAC-hs modify */
+ /* bit 3: MAC-(e)hs reset */
+ kal_uint8 cell_bitmap;
+ FDD_hsdsch_data_T hsdsch_data[FDD_MAX_SUPPORT_CELL];
+
+} fdd_phy_hsdsch_data_ind_struct;
+
+
+
+#ifdef __UMTS_R8__
+typedef struct _FDD_phy_cedch_setup_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_phy_cedch_setup_ind_struct;
+
+typedef struct _FDD_phy_cedch_modify_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_phy_cedch_modify_ind_struct;
+
+typedef struct _FDD_phy_cedch_release_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_phy_cedch_release_ind_struct;
+
+typedef struct _FDD_phy_cedch_termination_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_phy_cedch_termination_req_struct;
+
+typedef struct _FDD_phy_cedch_termination_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool stopped_by_ul1; /* CEDCH is terminated due to radio link failure */
+} fdd_phy_cedch_termination_ind_struct;
+#endif /* __UMTS_R8__ */
+
+/* U3G */
+typedef struct _FDD_ul1_l1sp_update_dch_info_ind_struct
+{
+ LOCAL_PARA_HDR
+
+ /* SP3G_UpdateL1InFo */
+ /* called by L1A to update DCH on/off and TX in/off(DCH UL on/off) */
+ /* bitmap indicates DCH setup type, and value indicates the status */
+ /* bitmap = 0: DCH on/off (1: on, 0: off) */
+ /* bitmap = 1: DCH UL on/off (1: on, 0: off) */
+ /* bitmap = 2: indicate RLF status (1: indicate RLF, 0: reset RLF) */
+ kal_uint8 bitmap;
+ kal_uint8 value;
+} fdd_ul1_l1sp_update_dch_info_ind_struct;
+/* U3G */
+
+
+#if defined( __GEMINI__ ) && defined ( __UMTS_RAT__ )
+
+typedef struct _FDD_rsvas_ul1_suspend_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_rsvas_ul1_suspend_req_struct;
+
+typedef struct _FDD_rsvas_ul1_suspend_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_rsvas_ul1_suspend_cnf_struct;
+
+typedef struct _FDD_rsvas_ul1_resume_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_rsvas_ul1_resume_req_struct;
+#endif
+
+#if defined(__L1_GPS_AUTO_TIMING_SYNC_SUPPORT__) || defined(__L1_GPS_REF_TIME_SUPPORT__)
+/* __GPS_FRAME_SYNC_SUPPORT__ */
+/* CSCE uses this primitive to inform UL1 that OOS occurs when AGPS feature turns on. */
+typedef struct _fdd_cphy_out_of_service_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_cphy_out_of_service_req_struct;
+#endif
+
+typedef struct _FDD_user_wakeup_3g_lock_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 user_sm_handle;
+} FDD_user_wakeup_3g_lock_struct;
+
+/* SEQUENCE OF MCC */
+typedef struct ul1_mcc
+{
+ kal_uint8 numElements;
+
+ kal_uint8 element[3];
+}
+ul1_mcc;
+
+/* SEQUENCE OF MNC */
+typedef struct ul1_mnc
+{
+ kal_uint8 numElements;
+
+ kal_uint8 element[3];
+}
+ul1_mnc;
+
+
+/* SEQUENCE PLMN-Identity */
+typedef struct ul1_plmn_identity
+{
+ ul1_mcc mcc; /* MANDATORY */
+ ul1_mnc mnc; /* MANDATORY */
+}
+ul1_plmn_identity;
+/*****************************************************************************
+* Functions exported to RRC
+*****************************************************************************/
+void UL1_Lcore_Compare_CFN_SFN( UL1_SIM_INDEX_E sim_idx, kal_int16 cfn, kal_int16 sfn, FDD_tgps_time_relationship_E *cfn_sfn_relation );
+void UL1D_PS_SessionStarted( kal_bool If_PS_SessionStarted );
+kal_bool UL1D_FDD_HSDPA_Phy_DualCarrier_Status( void *data );
+
+
+
+/*------------------- Function prototype -----------------------------*/
+/* L1 provides this function to other entities to get current CFN & SFN */
+/* CFN : -1 ~ 255. 0 ~ 255 if UE in DCH/FACH mode otherwise -1 */
+/* SFN : -1 ~ 4095. 0 ~ 4095 for the LST frame number. -1 for an invalid value. */
+void UL1_GetCurrentTime( UL1_SIM_INDEX_E sim_index, kal_int16 *cfn, kal_int16 *sfn );
+
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+/*****************************************************************************
+* Function: UL1_Compare_CFN_SFN
+*
+* Parameters: kal_int16 cfn ; cfn which RRCE wants to compare, range:0~255
+* kal_int16 sfn ; sfn which RRCE wants to compare, range:0~4095
+* FDD_tgps_time_relationship_E* cfn_sfn_relation ; FDD_TGPS_AFTER means that expanded CFN is after the specified sfn
+* ; FDD_TGPS_EQUAL means that expanded CFN is equal to the specified sfn
+* ; FDD_TGPS_BEFORE means that expanded CFN is equal to the specified sfn
+* Returns: void
+*
+* Description:
+* The function is to expand the specified CFN to the range 0~4095 and compare the expanded CFN to the specified SFN
+*****************************************************************************/
+void UL1_Compare_CFN_SFN( kal_int16 cfn, kal_int16 sfn, FDD_tgps_time_relationship_E *cfn_sfn_relation );
+
+
+/*****************************************************************************
+* Function: UL1_CEDCH_Check_Started
+*
+* Parameters: Non
+* Returns: If the return value is KAL_TRUE, UL1 has the common EDCH resource, otherwise it's KAL_FALSE.
+*
+* Description:
+* This is a callback function and provide to indicate the common edch status for upper layer.
+* The resolution is frame base because this function is provided by UL1C.
+*****************************************************************************/
+#ifdef __UMTS_R8__
+#define UL1_Lcore_CEDCH_Check_Started UL1_CEDCH_Check_Started
+kal_bool UL1_CEDCH_Check_Started( UL1_SIM_INDEX_E sim_index );
+#endif /* __UMTS_R8__ */
+
+/*****************************************************************************
+* Functions exported to MEME
+*****************************************************************************/
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+/*****************************************************************************
+* Functions exported to UMAC
+*****************************************************************************/
+/*****************************************************************************
+* Function: UL1_FreePhyDataIndBuffer
+*
+* Parameters: kal_uint8* data : DL data buffer to be freed
+*
+* Returns: void
+*
+* Description:
+* The function is for UMAC to free the data buffer in PHY_DATA_IND
+*****************************************************************************/
+void UL1_FreePhyDataIndBuffer( kal_uint8 *data );
+
+
+/**********************************************************************************************************************/
+/*********************************** UL1 Interface maintained by UMAC (Begin) *************************************/
+/**********************************************************************************************************************/
+/*UMAC*/
+extern kal_bool FDD_ul_dpch_cctrch(
+ /*UMAC*/ kal_uint8 cfn,
+ /*UMAC*/ kal_bool availabe,
+ /*UMAC*/ kal_bool reconfig_status, /*For notifying DPCH modification*/
+ /*UMAC*/ kal_uint16 *tfci,
+ /*UMAC*/ kal_uint8 *num_trch,
+ /*UMAC*/ FDD_ulTrchData *TrchInfo,
+ /*UMAC*/ kal_uint16 *size_data,
+ /*UMAC*/ kal_uint8 **data );
+/*UMAC*/
+/*UMAC*/
+extern void FDD_ul_dpch_cctrch_task(
+ /*UMAC*/ kal_uint8 cfn,
+ /*UMAC*/ kal_bool availabe,
+ /*UMAC*/ kal_bool reconfig_status /*For notifying DPCH modification*/ );
+/*UMAC*/
+/*UMAC*/
+extern kal_bool FDD_ul_dpch_cctrch_HISR(
+ /*UMAC*/ kal_uint8 cfn,
+ /*UMAC*/ kal_bool availabe,
+ /*UMAC*/ kal_bool reconfig_status, /*For notifying DPCH modification*/
+ /*UMAC*/ kal_uint16 *tfci,
+ /*UMAC*/ kal_uint8 *num_trch,
+ /*UMAC*/ FDD_ulTrchData *TrchInfo,
+ /*UMAC*/ kal_uint16 *size_data,
+ /*UMAC*/ kal_uint8 **data );
+/*UMAC*/
+/*UMAC*/
+extern void FDD_ul_inform_MAC( kal_uint32 data );
+/*UMAC*/
+/*UMAC*/
+extern void FDD_ul_dpch_power( kal_uint8 cfn, kal_uint8 tfc_status[FDD_MAX_UL_TFC] );
+/*UMAC*/
+extern void FDD_mac_hs_get_variable_pdu_buffer( kal_uint8 **buffer_ptr, kal_uint32 num );
+#ifdef __HSDSCH_HARQ_OFF__
+/*UMAC*/extern void FDD_mac_hs_free_variable_pdu_buffer( kal_uint8 **buffer_ptr, kal_uint32 num ); // for HARQ off
+#endif
+/*UMAC*/extern void FDD_mac_hs_get_pdu_buffer( kal_uint8 **buffer_ptr );
+/*UMAC*/
+/*UMAC*/
+extern FDD_uldch_data_ind_T *FDD_UMAC_UL_DCH_Tick_LISR( UL1_SIM_INDEX_E sim_idx, FDD_uldch_data_req_T *uldch_data_req );
+/*UMAC*/
+extern FDD_etfc_eval_info_ind_T *FDD_umac_e_dch_evaluate_tx_process_LISR( UL1_SIM_INDEX_E sim_idx, FDD_etfc_eval_info_req_T *etfc_eval_input );
+/*UMAC*/
+extern kal_bool FDD_umac_e_dch_is_tx_permitted_LISR( UL1_SIM_INDEX_E sim_idx, kal_uint8 *supported_etfci_bitmap, FDD_edch_scell_E edch_cell, kal_bool *is_sched_data_included );
+/*UMAC*/
+extern FDD_edch_data_ind_T *FDD_umac_e_dch_prepare_data_LISR( UL1_SIM_INDEX_E sim_idx, FDD_edch_data_req_T *edch_data_input );
+/*UMAC*/
+extern kal_bool FDD_umac_e_dch_get_happy_bit_LISR( UL1_SIM_INDEX_E sim_idx, kal_bool happy[FDD_E_SCELL_TOTAL] );
+/*UMAC*/
+extern void FDD_umac_e_dch_post_tx_process_LISR( UL1_SIM_INDEX_E sim_idx );
+/*UMAC*/
+extern void FDD_umac_e_dch_update_ref_etpr_LISR( UL1_SIM_INDEX_E sim_idx, kal_bool tx_enable[FDD_E_SCELL_TOTAL], kal_uint32 ref_etpr_x225[FDD_E_SCELL_TOTAL] );
+/*UMAC*/
+extern void FDD_try_to_trigger_CSR_STATUS_IND_LISR( UL1_SIM_INDEX_E sim_idx, kal_uint8 cfn );
+/*UMAC*/
+extern kal_bool FDD_umac_e_dch_predict_tx_process_LISR( UL1_SIM_INDEX_E sim_idx, FDD_etfc_eval_lpr_info_req_T *info );
+/*UMAC*/
+extern void FDD_ul_inform_Edch_MAC( void *data );
+/*UMAC*/
+extern void FDD_send_CSR_STATUS_IND( kal_uint32 data );
+/*UMAC*/
+/*UMAC*/
+#define FDD_UMAC_UL_DCH_Tick(sim_idx,uldch_data_req) FDD_UMAC_UL_DCH_Tick_LISR(sim_idx,uldch_data_req)
+/*UMAC*/#define FDD_umac_e_dch_tick_1( sim_idx, etfc_eval_input ) FDD_umac_e_dch_evaluate_tx_process_LISR( sim_idx, etfc_eval_input )
+/*UMAC*/#define FDD_umac_e_dch_is_tx_permitted( sim_idx, supported_etfci_bitmap, edch_cell, is_sched_data_included ) FDD_umac_e_dch_is_tx_permitted_LISR( sim_idx, supported_etfci_bitmap, edch_cell, is_sched_data_included )
+/*UMAC*/#define FDD_umac_e_dch_tick_2( sim_idx, edch_data_input ) FDD_umac_e_dch_prepare_data_LISR( sim_idx, edch_data_input )
+/*UMAC*/#define FDD_umac_e_dch_get_happy_bit( sim_idx, happy ) FDD_umac_e_dch_get_happy_bit_LISR( sim_idx, happy )
+/*UMAC*/#define FDD_umac_e_dch_tick_3( sim_idx, tx_enable, ref_etpr_x225 ) FDD_umac_e_dch_post_tx_process_LISR( sim_idx )
+/*UMAC*/#define FDD_umac_e_dch_tick_4( sim_idx ) {} //FDD_umac_e_dch_tick_4_LISR(sim_idx)
+/*UMAC*/#define FDD_umac_e_dch_update_ref_etpr( sim_idx, tx_enable, ref_etpr_x225 ) FDD_umac_e_dch_update_ref_etpr_LISR( sim_idx, tx_enable, ref_etpr_x225 )
+/*UMAC*/#define FDD_umac_e_dch_tick_5( sim_idx, info ) FDD_umac_e_dch_predict_tx_process_LISR( sim_idx, info )
+/*UMAC*/
+/*UMAC*//*========== UMAC END TX STRUCT (BEGIN) ==========*/
+/*UMAC*/typedef struct _FDD_phy_end_dch_tx_ind_struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint8 cfn;
+ /*UMAC*/
+ /*UMAC*/
+} fdd_phy_end_dch_tx_ind_struct;
+/*UMAC*/
+/*UMAC*//* __HSUPA_SUPPORT__ */
+/*UMAC*/
+typedef struct _FDD_phy_end_edch_tx_ind_struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint8 cfn;
+ /*UMAC*/
+ kal_uint8 subframe;
+ /*UMAC*/
+ kal_uint8 harq_id;
+ /*UMAC*/
+ kal_uint8 mode;
+ /*UMAC*/
+} fdd_phy_end_edch_tx_ind_struct;
+/*UMAC*//*========== UMAC END TX STRUCT (END) ==========*/
+/*UMAC*//*========== UMAC UT SIMULATE MESSAGE ==========*/
+/*UMAC*///#ifdef __MNT_UT_UMAC_ALONE_WITHOUT_L1__ /* UMAC UT */
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint8 cfn;
+ /*UMAC*/
+ kal_bool availabe;
+ /*UMAC*/
+ kal_bool reconfig_status;
+ /*UMAC*/
+} fdd_phy_simulate_dch_ul_cctrch_task_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint8 cfn;
+ /*UMAC*/
+ kal_uint8 ul_mac_event; /* bit 0: UL DCH setup, */
+ /*UMAC*/ /* bit 1: UL DCH release, */
+ /*UMAC*/ /* bit 2: UL DCH modify */
+ /*UMAC*/
+ kal_uint8 dpdch_num;
+ /*UMAC*/
+ kal_bool restartSRB; /* set true when PCP_Finish (not align max TTI) */
+ /*UMAC*/
+ kal_bool tx_enable; /* set true if TX data could be sent (min TTI) */
+ /*UMAC*/
+ kal_bool tx_suspend;
+ /*UMAC*/
+ kal_uint8 tfc_status[FDD_MAX_UL_TFC];
+ /*UMAC*/
+} fdd_phy_simulate_dch_ul_cctrch_lisr_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint8 cfn;
+ /*UMAC*/
+ kal_bool availabe;
+ /*UMAC*/
+ kal_bool reconfig_status;
+ /*UMAC*/ /* Use structure instead of pointer to simulate this */
+ /*UMAC*/
+ kal_uint16 tfci;
+ /*UMAC*/
+ kal_uint8 num_trch;
+ /*UMAC*/
+ FDD_ulTrchData TrchInfo[FDD_MAX_TRCH_NUM];
+ /*UMAC*/
+ kal_uint16 size_data[FDD_MAX_TRCH_NUM];
+ /*UMAC*/
+ kal_uint8 *data[FDD_MAX_UL_TB];
+ /*UMAC*/
+} fdd_phy_simulate_dch_ul_cctrch_hisr_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint8 cfn;
+ /*UMAC*/
+ kal_uint8 num_trch;
+ /*UMAC*/
+ FDD_ulTrchData trchInfo[FDD_MAX_TRCH_NUM];
+ /*UMAC*/
+ kal_uint16 tfci;
+ /*UMAC*/
+ kal_uint16 num_data[FDD_MAX_TRCH_NUM];
+ /*UMAC*/
+ kal_uint8 *data[FDD_MAX_TRCH_NUM];
+ /*UMAC*/
+ /*UMAC*/
+#ifdef UNIT_TEST
+ /*UMAC*/ void *addr;
+ /*UMAC*/
+#endif /* UNIT_TEST */
+ /*UMAC*/
+} fdd_phy_simulate_dch_ul_cctrch_lisr_rsp_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint8 cfn;
+ /*UMAC*/
+ kal_bool availabe;
+ /*UMAC*/
+ kal_bool reconfig_status;
+ /*UMAC*/ /* Use structure instead of pointer to simulate this */
+ /*UMAC*/
+ kal_uint16 tfci;
+ /*UMAC*/
+ kal_uint8 num_trch;
+ /*UMAC*/
+ FDD_ulTrchData TrchInfo[FDD_MAX_TRCH_NUM];
+ /*UMAC*/
+ kal_uint16 size_data[FDD_MAX_TRCH_NUM];
+ /*UMAC*/
+ kal_uint8 *data[FDD_MAX_UL_TB];
+ /*UMAC*/
+} fdd_phy_simulate_dch_ul_cctrch_hisr_rsp_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint8 cfn;
+ /*UMAC*/
+ kal_bool availabe;
+ /*UMAC*/
+ kal_bool reconfig_status;
+ /*UMAC*/ /* Use structure instead of pointer to simulate this */
+ /*UMAC*/
+ kal_uint16 tfci;
+ /*UMAC*/
+ kal_uint8 num_trch;
+ /*UMAC*/
+ FDD_ulTrchData TrchInfo[FDD_MAX_TRCH_NUM];
+ /*UMAC*/
+ kal_uint16 size_data[FDD_MAX_TRCH_NUM];
+ /*UMAC*/
+ kal_uint8 *data[FDD_MAX_UL_TB];
+ /*UMAC*/
+} fdd_phy_simulate_dch_ul_callback_cctrch_rsp_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint8 cfn;
+ /*UMAC*/
+ kal_uint8 tfc_status[FDD_MAX_UL_TFC];
+ /*UMAC*/
+} fdd_phy_simulate_dch_ul_callback_power_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct /* Old DCH Callback */
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint8 cfn;
+ /*UMAC*/
+ kal_bool availabe;
+ /*UMAC*/
+ kal_bool reconfig_status; /*MA only, for notifying DPCH modification*/
+ /*UMAC*/ /* Use structure instead of pointer to simulate this */
+ /*UMAC*/
+ kal_uint16 tfci;
+ /*UMAC*/
+ kal_uint8 num_trch;
+ /*UMAC*/
+ FDD_ulTrchData TrchInfo[FDD_MAX_TRCH_NUM];
+ /*UMAC*/
+ kal_uint16 size_data[FDD_MAX_TRCH_NUM];
+ /*UMAC*/
+ kal_uint8 *data[FDD_MAX_UL_TB];
+ /*UMAC*/
+} fdd_phy_simulate_dch_ul_callback_cctrch_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint8 cfn;
+ /*UMAC*/
+ /*UMAC*/
+} fdd_phy_simulate_end_dch_tx_ind_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/ /* For MT6291 U3G */
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ FDD_etfc_eval_info_req_T etfc_eval_info_req;
+ /*UMAC*/
+ /*UMAC*/
+ kal_uint8 sf_of_etfci[8][128 / 2];
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_eval_tx_proc_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ FDD_etfc_eval_info_ind_T etfc_eval_info_ind;
+ /*UMAC*/
+ kal_uint8 active_process[FDD_E_SCELL_TOTAL]; /* easy to check the result after processing AG command */
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_eval_tx_proc_rsp_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ /* MAX_NUM_OF_ETFC = 128 */
+ /*UMAC*/ kal_uint8 supported_etfci_bitmap[128 / 4];
+ /*UMAC*/
+ /*UMAC*/ /* FDD_MAX_NTX1_10MS = (15-8+1), FDD_MAX_ETFC_NUM = 128 */
+ /*UMAC*/
+ FDD_edch_scell_E edch_cell;
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_is_tx_permit_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_bool is_sched_data_included;
+ /*UMAC*/
+ kal_bool tx_enable;
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_is_tx_permit_rsp_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ FDD_edch_data_req_T edch_data_req;
+ /*UMAC*/ /* FDD_MAX_ETFC_NUM = 128 */
+ /*UMAC*/
+ kal_uint8 supported_etfci_bitmap[128 / 4];
+ /*UMAC*/
+ kal_uint32 FRC_Curr_Time;
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_prepare_data_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ FDD_edch_data_ind_T edch_data_ind;
+ /*UMAC*/
+ kal_uint8 SI_HLID; /* easy to check result of Highest Priority Logical Channel Identity */
+ /*UMAC*/
+ kal_uint32 SI_HLBS; /* easy to check result of Highest priority Logical channel Buffer Status (Bytes) */
+ /*UMAC*/
+ kal_uint8 NoOfCoproTBTriggered;
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_prepare_data_rsp_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_get_happy_bit_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_bool happy[FDD_E_SCELL_TOTAL]; /* easy to check result of Highest priority Logical channel Buffer Status (Bytes) */
+ /*UMAC*/
+ kal_bool is_tebs_larger_than_0;
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_get_happy_bit_rsp_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint32 FRC_Curr_Time;
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_post_tx_proc_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint8 NoOfCoproTBTriggered;
+ /*UMAC*/
+ kal_uint8 NotifyRLCHarqBitmap[FDD_E_SCELL_TOTAL];
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_post_tx_proc_rsp_struct;
+/*UMAC*/
+/*UMAC*/
+#ifdef __UMTS_R7__
+/*UMAC*/typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ FDD_etfc_eval_lpr_info_req_T etfc_eval_lpr_info_req;
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_predict_tx_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_bool result;
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_predict_tx_rsp_struct;
+#endif /* __UMTS_R7__*/
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_bool tx_enable[FDD_E_SCELL_TOTAL];
+ /*UMAC*/
+ kal_uint32 ReferenceEtpr[FDD_E_SCELL_TOTAL];
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_update_ref_etpr_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_update_ref_etpr_rsp_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ /* MAX_NUM_OF_ETFC = 128 */
+ /*UMAC*/ kal_uint8 supported_etfci_bitmap[128 / 4];
+ /*UMAC*/
+ /*UMAC*/ /* NUM_OF_NTX1_10MS = (15-8+1), MAX_NUM_OF_ETFC = 128 */
+ /*UMAC*/
+ kal_uint8 sf_of_etfci[8][128 / 2];
+ /*UMAC*/
+} fdd_phy_simulate_umac_e_dch_tx_param_setup_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint8 cfn;
+ /*UMAC*/
+} fdd_phy_simulate_try_to_trigger_csr_status_ind_struct;
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ kal_uint8 ref_count;
+ /*UMAC*/
+ kal_uint16 msg_len;
+ /*UMAC*/
+ /*UMAC*/
+ kal_uint8 get_num;
+ /*UMAC*/
+} fdd_phy_simulate_umac_get_hs_buffer_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ kal_uint8 ref_count;
+ /*UMAC*/
+ kal_uint16 msg_len;
+ /*UMAC*/
+ /*UMAC*/
+ kal_uint8 free_num;
+ /*UMAC*/
+} fdd_phy_simulate_umac_free_hs_buffer_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint32 NoOfEdchCell;
+ /*UMAC*/
+} fdd_phy_simulate_umac_forced_to_send_edch_em_info_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/
+} fdd_phy_simulate_umac_forced_to_send_hsdsch_em_info_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_bool b_pch_Crc;
+ /*UMAC*/
+ kal_bool b_em_from_logger;
+ /*UMAC*/
+} fdd_phy_simulate_umac_setup_pch_em_info_struct;
+/*UMAC*///#endif /* __MNT_UT_UMAC_ALONE_WITHOUT_L1__ */
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint32 kpi;
+ /*UMAC*/
+} fdd_phy_simulate_umac_forced_to_send_mdmi_mac_em_info_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/ kal_uint32 kpi;
+ /*UMAC*/ kal_uint8 cfn;
+ /*UMAC*/ kal_uint8 subframe;
+ /*UMAC*/ kal_uint8 harq_id;
+ /*UMAC*/ kal_uint8 dummy;
+ /*UMAC*/
+} fdd_phy_simulate_umac_forced_to_send_mdmi_upa_em_info_struct;
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/
+} fdd_phy_simulate_umac_forced_to_send_mdmi_mea_em_info_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*//*========== END UMAC UT SIMULATE MESSAGE ==========*/
+/*UMAC*/
+/*UMAC*//*========== UMAC DEBUG MESSAGE ==========*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/
+ /*UMAC*/ FDD_etfc_eval_info_req_T etfc_eval_info_req;
+ /*UMAC*/
+ FDD_etfc_eval_info_ind_T etfc_eval_info_ind;
+ /*UMAC*/
+ kal_uint8 ServingGrant;
+ /*UMAC*/
+ kal_bool old_isNewTransmission;
+ /*UMAC*/
+ kal_bool update_isNewTransmission;
+ /*UMAC*/
+ /*UMAC*/
+} FDD_umac_umac_edch_eval_tx_proc_ind_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/
+ /*UMAC*/ FDD_edch_data_ind_T edch_data_ind;
+ /*UMAC*/
+ kal_uint8 supported_etfci_bitmap[32];
+ /*UMAC*/
+} FDD_umac_umac_edch_prepare_data_ind_struct;
+/*UMAC*/
+/*UMAC*/
+/*UMAC*/
+typedef struct
+/*UMAC*/
+{
+ /*UMAC*/ LOCAL_PARA_HDR
+ /*UMAC*/
+ /*UMAC*/ kal_bool tx_enable[FDD_E_SCELL_TOTAL];
+ /*UMAC*/
+ kal_uint8 old_ReferenceEtpr[FDD_E_SCELL_TOTAL];
+ /*UMAC*/
+ kal_uint8 update_ReferenceEtpr[FDD_E_SCELL_TOTAL];
+ /*UMAC*/
+ kal_uint32 ref_etpr_x225[FDD_E_SCELL_TOTAL];
+ /*UMAC*/
+ kal_uint32 update_ref_etpr_x225[FDD_E_SCELL_TOTAL];
+ /*UMAC*/
+} FDD_umac_umac_edch_post_tx_proc_ind_struct;
+/*UMAC*//*========== END UMAC DEBUG MESSAGE ==========*/
+/**********************************************************************************************************************/
+/*********************************** UL1 Interface maintained by UMAC (END) *************************************/
+/**********************************************************************************************************************/
+
+/*------------------- MSC Composer -----------------------------*/
+/* The following definition is used only for MSC composer. */
+typedef union _FDD_local_para_unpack_T
+{
+ fdd_cphy_pch_setup_req_struct cphy_pch_setup_req;
+ fdd_cphy_pch_modify_req_struct cphy_pch_modify_req;
+ fdd_cphy_pch_release_req_struct cphy_pch_release_req;
+ fdd_cphy_fach_setup_req_struct cphy_fach_setup_req;
+ fdd_cphy_fach_modify_req_struct cphy_fach_modify_req;
+ fdd_cphy_fach_release_req_struct cphy_fach_release_req;
+ fdd_cphy_dch_setup_req_struct cphy_dch_setup_req;
+ fdd_cphy_dch_modify_req_struct cphy_dch_modify_req;
+ fdd_cphy_dch_release_req_struct cphy_dch_release_req;
+ fdd_cphy_rach_setup_req_struct cphy_rach_setup_req;
+ fdd_cphy_rach_release_req_struct cphy_rach_release_req;
+ fdd_cphy_hsdsch_setup_req_struct cphy_hsdsch_setup_req;
+ fdd_cphy_hsdsch_modify_req_struct cphy_hsdsch_modify_req;
+ fdd_cphy_hsdsch_release_req_struct cphy_hsdsch_release_req;
+ fdd_cphy_edch_setup_req_struct cphy_edch_setup_req;
+ fdd_cphy_edch_modify_req_struct cphy_edch_modify_req;
+ fdd_cphy_edch_release_req_struct cphy_edch_release_req;
+#ifdef __UMTS_R7__
+ fdd_cphy_cpc_config_req_struct cphy_cpc_setup_req;
+#endif /* __UMTS_R7__ */
+} FDD_local_para_unpack_T;
+
+typedef struct _FDD_msg_buf_unpack_T /* Buffer of message container */
+{
+ kal_uint8 channel_id; /* Channel ID */
+ msg_type msg_id; /* Message ID */
+ kal_uint16 buff_size; /* Buffer size */
+ FDD_local_para_unpack_T buffer; /* Channel configuration message buffer */
+} FDD_msg_buf_unpack_T;
+
+typedef struct _fdd_cphy_msg_container_req_unpack_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 at_ref; /* Reference channge of activation time.
+ 0 : Ref channel is the released channel.
+ There should be ch to be released
+ 1 : Ref channel is the setup channel.
+ There should be ch to be setup.
+ */
+ kal_int16 rx_cfn; /* Indicate peer message receive cfn. Ex: tti = 4, receive frame number : 0,1,2,3. rx_cfn = 3 (set by ul1)
+ [Range]: -1 ~ 255.
+ -1 : Means upper layer internal control
+ */
+#ifdef __UMTS_R6__
+ kal_bool delay_restriction; /* From R6 : TS25.331 8.6.3.1 */
+#endif
+ FDD_meas_control_E meas_control; /* Indicate whether UL1 need to not to resume meas. after apply corresponding buffer's config. */
+
+ kal_uint8 msg_num; /* # of included msg. 1 ~ 4 */
+ FDD_msg_buf_unpack_T msg_buffer[4]; /* List of msg buffer for included channel msg */
+
+ /* [R5R6] For HS-DSCH and E-DCH */
+ kal_uint8 h_msg_num; /* # of included H-msg. 0~2 */
+ FDD_msg_buf_unpack_T h_msg_buffer[2]; /* List of msg buffer for included channel msg */
+ kal_uint8 e_msg_num; /* # of included E-msg. 0~2 */
+ FDD_msg_buf_unpack_T e_msg_buffer[2]; /* List of msg buffer for included channel msg */
+#ifdef __UMTS_R7__
+ kal_uint8 cpc_msg_num; /* # of included CPC-msg. 0~1 */
+ FDD_msg_buf_unpack_T cpc_msg_buffer[1]; /* List of msg buffer for included CPC msg */
+#endif /* __UMTS_R7__ */
+} fdd_cphy_msg_container_req_unpack_struct;
+
+typedef struct _ul1_umts_max_tx_pwr_red_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_bool valid;
+ //UMTS_CUSTOM_TAS_STATE_E tas_state; /*0: Main, 1: Div, 2: Main'*/
+ kal_uint8 umts_power_reduction_in_edb[20][2/*Service*/];
+
+ /* Add power reduction value for ANT1 (op=9/10).
+ * When user only specify one set of values by using op=1/3,
+ * L4C help copy parameters from umts_power_reduction_in_edb[] to umts_power_reduction_in_edb_tas[]*/
+ kal_uint8 umts_power_reduction_in_edb_tas[20][2/*Service*/];
+} ul1_umts_max_tx_pwr_red_req_struct;
+
+typedef enum
+{
+ FDD_UL1_EM_TST_CMD_TX_DPCH = 0,
+ FDD_UL1_EM_TST_CMD_RX_RSSI_MEASURE = 1,
+ FDD_UL1_EM_TST_CMD_GET_PD_MEASUREMENT = 2, // retrieved TX power
+ FDD_UL1_EM_TST_CMD_END
+} FDD_UL1_EM_TSTCmdType;
+
+typedef struct
+{
+ kal_int8 power;
+ kal_uint8 rf_band;
+ kal_uint16 ul_freq;
+} FDD_UL1_EM_TSTCmdTxDPCh_T;
+
+typedef struct
+{
+ kal_uint16 dl_freq;
+} FDD_UL1_EM_TSTCmdRxRSSI_T;
+
+typedef union
+{
+ FDD_UL1_EM_TSTCmdTxDPCh_T txdpch;
+ FDD_UL1_EM_TSTCmdRxRSSI_T rxrssi;
+} FDD_UL1_EM_TSTCmdParam;
+
+typedef struct _l4ul1_em_tst_req_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 src_id;
+ FDD_UL1_EM_TSTCmdType type;
+ FDD_UL1_EM_TSTCmdParam param;
+} l4ul1_em_tst_req_struct;
+
+
+typedef struct _l4ul1_em_tst_cnf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 src_id;
+ kal_bool success;
+#if defined(__ATERFTX_ERROR_HANDLE_ENHANCE__)
+ ps_cause_enum err_cause;
+#endif //__ATERFTX_ERROR_HANDLE_ENHANCE__
+} l4ul1_em_tst_cnf_struct;
+
+typedef struct _l4ul1_em_tx_report_ind
+{
+ LOCAL_PARA_HDR
+
+ kal_int32 tx_power; // retrieved TX power
+} l4ul1_em_tx_report_ind_struct;
+
+typedef l4ul1_em_tst_req_struct l4cul1_em_tst_control_req_struct;
+typedef l4ul1_em_tst_cnf_struct l4cul1_em_tst_control_cnf_struct;
+typedef l4ul1_em_tx_report_ind_struct l4cul1_em_tx_report_ind_struct;
+
+typedef struct _l4cul1_get_rf_temperature_req_struct
+{
+ LOCAL_PARA_HDR
+
+} l4cul1_get_rf_temperature_req_struct;
+
+typedef struct _l4cul1_get_rf_temperature_cnf_struct
+{
+ LOCAL_PARA_HDR
+
+ kal_int16 modem_temperature;
+} l4cul1_get_rf_temperature_cnf_struct;
+
+typedef struct _l4cul1_rssi_measurement_ind_struct
+{
+ LOCAL_PARA_HDR
+ kal_int16 rssi[2]; /* RSSI. Range: -400 ~ -100 means (-100 ~ -25)dBm 0.25 dB step */
+ kal_int32 rssi_edBm[2]; /* RSSI value in 1/8 dBm */
+ kal_uint16 uarfcn; /* UARFCN */
+
+} l4cul1_rssi_measurement_ind_struct;
+
+/* Inform SLT task that UL1 has finished task init */
+typedef struct _FDD_ul1_slt_task_init_ind_struct
+{
+ LOCAL_PARA_HDR
+
+} fdd_ul1_slt_task_init_ind_struct;
+
+#if defined (__MML1_ADT_ENABLE__)
+/*****************************************************************************
+ UL1 req for ADT Task
+*****************************************************************************/
+typedef struct _fdd_ul1_l1adt_enter_connected_req_struct
+{
+ LOCAL_PARA_HDR
+ FDD_ADT_Mode_E adt_mode;
+} fdd_ul1_l1adt_enter_connected_req_struct;
+
+typedef struct _fdd_ul1_l1adt_leave_connected_req_struct
+{
+ LOCAL_PARA_HDR
+ FDD_ADT_Mode_E adt_mode;
+} fdd_ul1_l1adt_leave_connected_req_struct;
+
+typedef struct _fdd_ul1_l1adt_enter_fdd_mode_req_struct
+{
+ LOCAL_PARA_HDR
+} fdd_ul1_l1adt_enter_fdd_mode_req_struct;
+
+typedef struct _fdd_ul1_l1adt_enter_fdd_mode_ind_struct
+{
+ LOCAL_PARA_HDR
+} fdd_ul1_l1adt_enter_fdd_mode_ind_struct;
+
+/*****************************************************************************
+ confirm from ADT Task to UL1
+*****************************************************************************/
+typedef struct _fdd_ul1_l1adt_enter_connected_cnf_struct
+{
+ LOCAL_PARA_HDR
+ kal_int32 adt_dl_result;
+ /*
+ {//PASS_DL_(UN)COMPLETE_xxx -> xxx means the current RAT mode
+ FAIL_OTHER_RAT_IS_CONN,
+ PASS_DL_COMPLETE_CONN,
+ PASS_DL_NOT_YET_FINISHED_CONN,
+ PASS_DL_COMPLETE_IDLE,
+ PASS_DL_NOT_YET_FINISHED_IDLE,
+ PASS_STOP_N_RESTART_DL_IDLE,
+ PASS_START_DL_IDLE
+ }
+ */
+} fdd_ul1_l1adt_enter_connected_cnf_struct;
+
+typedef struct _fdd_ul1_l1adt_leave_connected_cnf_struct
+{
+ LOCAL_PARA_HDR
+ kal_int32 idle_result;
+ /*
+ {
+ NORMAL,
+ ABNORMAL_IDLE,
+ ABNORMAL_OTHER_CONN
+ }
+ */
+} fdd_ul1_l1adt_leave_connected_cnf_struct;
+
+typedef struct _fdd_ul1_l1adt_enter_fdd_mode_cnf_struct
+{
+ LOCAL_PARA_HDR
+} fdd_ul1_l1adt_enter_fdd_mode_cnf_struct;
+
+#endif
+
+/******************************************************************************
+ * MSG_ID_UL1D_LOOPBACK_REQ primptive
+ * FROM : TST
+ * TO : Dummy UPS
+ * DESCRIPTION :
+ *
+ ******************************************************************************/
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint16 test_id;
+ kal_uint16 case_id;
+ kal_uint16 pattern_id;
+ void *pattern_address;
+ kal_uint32 pattern_size; // unit: byte
+ kal_uint32 pm[10];
+ kal_uint32 sz[30];
+ kal_uint32 ad[30];
+} ul1d_loopback_req_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint16 test_id;
+ kal_uint16 case_id;
+ kal_uint16 pattern_id;
+ void *pattern_address;
+ kal_uint32 pattern_size; // unit: byte
+ kal_uint32 pm[10];
+ kal_uint32 sz[30];
+ kal_uint32 ad[30];
+} modem_loopback_req_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint16 test_id;
+ kal_uint16 case_id;
+ kal_uint16 pattern_id;
+ kal_bool result; // true=pass, false=fail
+ char trace_msg[256]; // null-terminated string
+} modem_loopback_result_ind_struct;
+/* Yuda.lee added for Android M */
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 srcid; /* srcid is set by REQUEST */
+ kal_uint32 lce_mode; /* STOP: 0, PUSH MODE: 1, PULL_MODE: 2 */
+ kal_uint32 lce_rpt_interval_ms; /* flexible time unit [ms] */
+} l4cul1_hspa_lce_report_req_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 srcid; /* srcid is set by REQUEST */
+} l4cul1_hspa_lce_report_pulldata_req_struct;
+
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 srcid; /* srcid is same as REQUEST */
+ kal_int8 lce_status; /* stopped:0, active: 1 */
+ kal_uint32 lce_act_interval_ms; /* actually reporting interval, unit [ms]*/
+} l4cul1_hspa_lce_report_cnf_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint8 srcid; /* PUSH MODE: 0xFF, otherwise srcid is same as REQUEST */
+ kal_uint8 conf_level; /* confidence level of capacity estimate (0~100)*/
+ kal_uint8 lce_suspend; /* 0: not suspended, 1: suspended, radio idle, handover, outage, and etc.*/
+ kal_uint32 last_hop_cap_kbps; /* capacity:kilobits/second, kbps*/
+} l4cul1_hspa_lce_report_ind_struct;
+
+#endif
+