[Feature]Upload Modem source code
Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/interface/middleware/meta/ft_msg.h b/mcu/interface/middleware/meta/ft_msg.h
new file mode 100644
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+++ b/mcu/interface/middleware/meta/ft_msg.h
@@ -0,0 +1,1438 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * Messages definition of FT task
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
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+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#ifndef FT_MSG_H
+#define FT_MSG_H
+
+
+#include "kal_public_api.h"
+#ifndef L1_SIM
+#include "med_struct.h"
+#include "fs_type.h"
+#endif // #ifndef L1_SIM
+#include "kal_general_types.h"
+#include "ft_msg_common.h"
+
+/*******************************************************************************
+*
+* Message structures defined for NVRAM Interface
+*
+*******************************************************************************/
+#ifndef L1_SIM
+typedef struct {
+ FT_HDR
+ kal_uint32 dummy;
+} FT_NVRAM_GET_DISK_INFO_REQ;
+
+typedef struct {
+ FT_HDR
+ kal_uint8 status;
+ kal_uint32 diskfilesize;
+ kal_uint32 freespace;
+ kal_uint32 overhead;
+} FT_NVRAM_GET_DISK_INFO_CNF;
+
+typedef struct
+{
+ FT_HDR
+ kal_uint8 poweron_mode;
+}ft_nvram_startup_req_struct_T;
+
+typedef struct
+{
+ FT_HDR
+ kal_uint8 status;
+}ft_nvram_startup_cnf_struct_T;
+
+typedef struct
+{
+ FT_HDR
+ kal_uint8 reset_category;
+ kal_uint16 file_idx;
+}ft_nvram_reset_req_struct_T;
+
+typedef struct
+{
+ FT_HDR
+ kal_uint8 status;
+}ft_nvram_reset_cnf_struct_T;
+
+/********************************************
+* Generic Primitives for READ/WRITE NVRAM
+********************************************/
+typedef struct
+{
+ FT_HDR
+ kal_uint16 file_idx;
+ kal_uint16 para;
+ kal_uint8 status;
+} ft_nvram_read_cnf_struct_T;
+
+typedef struct
+{
+ FT_HDR
+ kal_uint16 file_idx;
+ kal_uint16 para;
+ kal_uint8 ciphered_data_valid;
+ kal_uint8 ciphered_data[4];
+} ft_nvram_read_req_struct_T;
+
+typedef struct
+{
+ FT_HDR
+ kal_uint16 file_idx;
+ kal_uint16 para;
+ kal_uint16 rec_amount; /* total record to read */
+ kal_uint8 *buffer; /* buffer to fill in data */
+ kal_uint32 buf_size; /* buffer size */
+
+} ft_nvram_read_sm_req_struct_T;
+
+
+typedef struct
+{
+ FT_HDR
+ kal_uint16 file_idx;
+ kal_uint16 para;
+ kal_uint8 status;
+} ft_nvram_write_cnf_struct_T;
+
+typedef struct
+{
+ FT_HDR
+ kal_uint16 file_idx;
+ kal_uint16 para;
+ kal_uint8 msg_num;
+ kal_uint8 msg_idx;
+} ft_nvram_write_req_struct_T;
+
+typedef struct {
+ FT_HDR
+ kal_uint8 lock_en;
+} ft_nvram_lock_req_struct_T;
+
+typedef struct {
+ FT_HDR
+ kal_uint8 status;
+} ft_nvram_lock_cnf_struct_T;
+
+/*******************************************************************************
+*
+* Message structures defined for BaseBand Interface
+*
+*******************************************************************************/
+typedef enum
+{
+ FT_MT_UNKNOWN =0,
+ FT_MT6305,
+ FT_MT6318,
+ FT_MT6326,
+ FT_PMIC_END
+}ft_PMICType;
+
+typedef enum
+{
+ FT_BaseBandReg = 0,
+ FT_PMICReg
+}ft_RegisterType;
+typedef struct
+{
+ FT_HDR
+ kal_uint32 addr;
+} ft_RegisterRead_req_T;
+
+typedef struct
+{
+ FT_HDR
+ kal_uint16 value;
+ kal_uint8 status;
+} ft_RegisterRead_cnf_T;
+
+typedef struct
+{
+ FT_HDR
+ kal_uint32 addr;
+ kal_uint16 value;
+} ft_RegisterWrite_req_T;
+
+typedef struct
+{
+ FT_HDR
+ kal_uint8 status;
+} ft_RegisterWrite_cnf_T;
+typedef struct
+{
+ FT_HDR
+ kal_uint32 addr;
+} ft_PMICRegisterRead_req_T;
+typedef struct
+{
+ FT_HDR
+ kal_uint16 value;
+ kal_uint8 status;
+} ft_PMICRegisterRead_cnf_T;
+typedef struct
+{
+ FT_HDR
+ kal_uint32 addr;
+ kal_uint16 value;
+} ft_PMICRegisterWrite_req_T;
+typedef struct
+{
+ FT_HDR
+ kal_uint8 status;
+} ft_PMICRegisterWrite_cnf_T;
+
+typedef struct
+{
+ FT_HDR
+ kal_uint8 Sel;
+ kal_uint16 Meacount;
+} ft_FtADC_GetMeaData_req_T;
+typedef struct
+{
+ FT_HDR
+ kal_uint32 value;
+ kal_uint8 status;
+} ft_FtADC_GetMeaData_cnf_T;
+
+/*******************************************************************************
+*
+* Message structures defined for FAT Interface
+*
+*******************************************************************************/
+
+#define FT_FAT_ERR_PATH_TOO_LONG -500
+#define FT_FAT_ERR_PATH_RESTRICTION -501
+#define FT_FAT_ERR_DIR_NOT_EXIST -502
+#define FT_FAT_ERR_ACTION_NOT_SUPPORT - 503
+
+typedef enum {
+ FT_FAT_OP_OPEN = 1
+ ,FT_FAT_OP_READ = 2
+ ,FT_FAT_OP_WRITE = 4
+ ,FT_FAT_OP_CLOSE = 8
+ ,FT_FAT_OP_FILESIZE
+ ,FT_FAT_OP_DELETE
+ ,FT_FAT_OP_MOVE
+ ,FT_FAT_OP_FIND_FILE
+ ,FT_FAT_OP_FIND_FILE_RECURSIVE
+ ,FT_FAT_OP_FIND_DIR_RECURSIVE
+ ,FT_FAT_OP_GET_DISK_INFO
+ ,FT_FAT_OP_RMDIR
+ ,FT_FAT_OP_GET_DRIVE_TYPE
+ ,FT_FAT_OP_END
+}FT_FAT_OP;
+
+typedef struct
+{
+ FT_HDR
+ FT_FAT_OP fat_op;
+ FS_HANDLE fs_handle;
+ kal_int32 offset;
+ kal_uint8 last_frame;
+ kal_int32 status;
+
+}FT_FAT_OPERATION;
+
+typedef struct {
+ kal_uint32 Type;
+ kal_uint32 SectorsPerCluster;
+ kal_uint32 TotalClusters;
+ kal_uint32 FreeClusters;
+}FT_FAT_DiskInfo_T;
+
+typedef struct {
+ kal_int32 filesize;
+}FT_FAT_FILESIZE;
+#endif // #ifndef L1_SIM
+/*******************************************************************************
+*
+* Message structures defined for Version Info Interface
+*
+*******************************************************************************/
+
+typedef struct {
+ FT_HDR
+}FT_VER_INFO_REQ;
+
+typedef struct {
+ FT_HDR
+ kal_uint8 bb_chip[64];
+ kal_uint8 eco_ver[4];
+ kal_uint8 dsp_fw[64];
+ kal_uint8 dsp_patch[64];
+ kal_uint8 sw_ver[64];
+ kal_uint8 hw_ver[64];
+ kal_uint8 melody_ver[64];
+ kal_uint8 sw_flavor[64];
+}FT_VER_INFO_CNF;
+
+/*******************************************************************************
+*
+* Message structures defined for ready confirm
+*
+*******************************************************************************/
+
+typedef struct {
+ FT_HDR
+ kal_uint32 dummy; // extend alignment to 4 bytes
+}FT_IS_ALIVE_REQ;
+
+typedef struct {
+ FT_HDR
+ kal_uint32 dummy; // extend alignment to 4 bytes
+}FT_IS_ALIVE_CNF;
+
+
+/*******************************************************************************
+*
+* Message structures defined for SLA
+*
+*******************************************************************************/
+
+typedef struct {
+ FT_HDR
+ kal_uint32 dummy; // extend alignment to 4 bytes
+}FT_GET_SLA_STATUS_REQ;
+
+typedef struct {
+ FT_HDR
+ kal_uint16 sla_config;
+ kal_uint16 sla_verified;
+}FT_GET_SLA_STATUS_CNF;
+
+typedef struct {
+ FT_HDR
+ kal_uint32 sla_ver_from_pc;
+}FT_CHECK_SLA_VER_REQ;
+
+typedef struct {
+ FT_HDR
+ kal_uint32 status;
+}FT_CHECK_SLA_VER_CNF;
+
+#define RND_BUF_LEN 16
+typedef struct {
+ FT_HDR
+ kal_uint8 rand_num[RND_BUF_LEN];
+ kal_uint32 rand_num_len;
+ kal_uint8 cust_para[256];
+ kal_int32 status;
+}FT_GET_SLA_PARA_CNF;
+
+typedef struct {
+ FT_HDR
+ kal_uint8 encrypted[256];
+ kal_uint32 encrypted_len;
+}FT_VERIFY_SLA_RND_REQ;
+
+typedef struct {
+ FT_HDR
+ kal_int32 status;
+}FT_VERIFY_SLA_RND_CNF;
+
+typedef struct {
+ FT_HDR
+ kal_uint16 deniedMsgId;
+ kal_uint32 status;
+}FT_DENIED_MSG_ID_CNF;
+
+/*******************************************************************************
+*
+* Message structures defined for power off command
+*
+*******************************************************************************/
+#ifndef L1_SIM
+typedef struct {
+ FT_HDR
+ kal_uint32 dummy; // extend alignment to 4 bytes
+}FT_POWER_OFF_REQ;
+#endif // #ifndef L1_SIM
+/*******************************************************************************
+*
+* Message structures defined for checking META_DLL version
+*
+*******************************************************************************/
+
+typedef struct {
+ FT_HDR
+ kal_uint32 meta_ver_from_pc;
+ kal_uint8 dummy[256];
+}FT_CHECK_META_VER_REQ;
+
+typedef struct {
+ FT_HDR
+ kal_uint32 meta_ver_required_by_target;
+ kal_uint8 dummy[256];
+}FT_CHECK_META_VER_CNF;
+#ifndef L1_SIM
+typedef struct {
+ LOCAL_PARA_HDR
+ kal_uint8 lid_count;
+}ft_cal_data_add_one_req_struct;
+
+typedef struct {
+ LOCAL_PARA_HDR
+ kal_uint8 status;
+}ft_cal_data_add_one_cnf_struct;
+
+typedef struct {
+ kal_uint16 lid;
+ kal_uint16 rid;
+}FT_CAL_DATA_CHECK_REQ_T;
+#endif // #ifndef L1_SIM
+
+/*******************************************************************************
+*
+* Message structures defined for L4 AT command Interface
+*
+*******************************************************************************/
+
+typedef struct {
+ FT_HDR
+ kal_uint32 type;
+}FT_L4_ATCMD_REQ;
+
+typedef struct {
+ FT_HDR
+ kal_uint32 type;
+ kal_uint32 status;
+}FT_L4_ATCMD_CNF;
+#ifndef L1_SIM
+#include "ft_msg_fta.h"
+#include "ft_msg_ftc.h"
+#include "ft_msg_misc.h"
+#include "ft_msg_misc_ex.h"
+#endif // #ifndef L1_SIM
+#include "ft_msg_util.h"
+#include "ft_msg_l1rf.h"
+#include "ft_msg_ul1rf.h"
+#include "ft_msg_lterf.h"
+#include "ft_msg_mmrf.h"
+#endif
+
diff --git a/mcu/interface/middleware/meta/ft_msg_common.h b/mcu/interface/middleware/meta/ft_msg_common.h
new file mode 100644
index 0000000..732f18e
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_msg_common.h
@@ -0,0 +1,329 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg_common.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * Common definition for META commnuication
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#ifndef _FT_MSG_COMMON_H_
+#define _FT_MSG_COMMON_H_
+#include "kal_public_api.h"
+typedef enum
+{
+ /* RF */
+ FT_RF_TEST_REQ_ID = 0 ,/*0*/
+ FT_RF_TEST_CNF_ID ,
+ /* BaseBand */
+ FT_REG_READ_ID ,
+ FT_REG_READ_CNF_ID ,
+ FT_REG_WRITE_ID ,
+ FT_REG_WRITE_CNF_ID ,/*5*/
+ FT_ADC_GETMEADATA_ID ,
+ FT_ADC_GETMEADATA_CNF_ID ,
+ /* test alive */
+ FT_IS_ALIVE_REQ_ID ,
+ FT_IS_ALIVE_CNF_ID ,
+ /* power off */
+ FT_POWER_OFF_REQ_ID ,/*10*/
+ /* unused */
+ FT_RESERVED04_ID ,
+ /* required META_DLL version */
+ FT_CHECK_META_VER_REQ_ID ,
+ FT_CHECK_META_VER_CNF_ID ,
+ /* utility command */
+ FT_UTILITY_COMMAND_REQ_ID ,
+ FT_UTILITY_COMMAND_CNF_ID ,/*15*/
+ /* for NVRAM */
+ FT_NVRAM_GET_DISK_INFO_REQ_ID ,
+ FT_NVRAM_GET_DISK_INFO_CNF_ID ,
+ FT_NVRAM_RESET_REQ_ID ,
+ FT_NVRAM_RESET_CNF_ID ,
+ FT_NVRAM_LOCK_CNF_ID ,/*20*/
+ FT_NVRAM_LOCK_REQ_ID ,
+ FT_NVRAM_READ_REQ_ID ,
+ FT_NVRAM_READ_CNF_ID ,
+ FT_NVRAM_WRITE_REQ_ID ,
+ FT_NVRAM_WRITE_CNF_ID ,/*25*/
+ /* FAT */
+ FT_FAT_OPERATION_ID = 26 ,/* 26 ~ 40 */
+ /* L4 Audio */
+ FT_L4AUD_REQ_ID = 41 ,/* 41 ~ 50 */
+ FT_L4AUD_CNF_ID ,
+ /* Version Info */
+ FT_VER_INFO_REQ_ID = 51 ,/* 51 */
+ FT_VER_INFO_CNF_ID ,
+ /* CCT */
+ FT_CCT_REQ_ID = 53 ,/* 53 */
+ FT_CCT_CNF_ID ,
+ /* WiFi */
+ FT_WIFI_WNDRV_SET_REQ_ID = 55 ,/* 55 */
+ FT_WIFI_WNDRV_SET_CNF_ID ,
+ FT_WIFI_WNDRV_QUERY_REQ_ID = 57 ,/* 57 */
+ FT_WIFI_WNDRV_QUERY_CNF_ID ,
+ FT_WIFI_REQ_ID = 59 ,/* 59 */
+ FT_WIFI_CNF_ID ,
+ FT_BT_REQ_ID = 61 ,
+ FT_BT_CNF_ID ,
+ FT_PMIC_REG_READ_ID = 63 ,
+ FT_PMIC_REG_READ_CNF_ID ,
+ FT_PMIC_REG_WRITE_ID = 65 ,
+ FT_PMIC_REG_WRITE_CNF_ID ,
+ FT_URF_TEST_REQ_ID = 67 , /* 67 */
+ FT_URF_TEST_CNF_ID ,
+ FT_FM_REQ_ID = 69 , /* 69 */
+ FT_FM_CNF_ID = 70 ,
+ FT_TDMB_REQ_ID = 71 , /* 71 */
+ FT_TDMB_CNF_ID = 72 , /* 72 */
+ FT_MISC_CMD_REQ_ID = 73 ,
+ FT_MISC_CMD_CNF_ID = 74 ,
+ FT_CMMB_REQ_ID = 75 ,
+ FT_CMMB_CNF_ID = 76 ,
+ FT_CUSTOM_REQ_ID = 77 ,
+ FT_CUSTOM_CNF_ID = 78 ,
+ FT_MISC_EX_CMD_REQ_ID = 79 ,
+ FT_MISC_EX_CMD_CNF_ID = 80 ,
+ FT_AUX_REQ_ID = 81 ,
+ FT_AUX_CNF_ID = 82 ,
+ FT_MATV_CMD_REQ_ID = 83 ,
+ FT_MATV_CMD_CNF_ID = 84 ,
+ /* L4 Audio EX after all audio developed in w10.10 */
+ FT_L4AUD_REQ_EX_ID = 85 ,
+ FT_L4AUD_CNF_EX_ID = 86 ,
+ /* NFC test command category */
+ FT_NFC_CMD_REQ_ID = 87,
+ FT_NFC_CMD_CNF_ID = 88,
+ /* LTE command */
+ FT_ERF_TEST_REQ_ID = 91,
+ FT_ERF_TEST_CNF_ID = 92,
+ FT_PHY_TOOL_REQ_ID = 93,
+ FT_PHY_TOOL_CNF_ID = 94,
+ /* MMRF command */
+ FT_MMRF_TEST_REQ_ID = 95,
+ FT_MMRF_TEST_CNF_ID = 96,
+ /* C2K command */
+ FT_CRF_TEST_REQ_ID = 97,
+ FT_CRF_TEST_CNF_ID = 98,
+ /* This is a special message defined to handle L1 report. */
+ /* L4_AT_command */
+ FT_L4_ATCMD_REQ_ID = 99,
+ FT_L4_ATCMD_CNF_ID = 100,
+ /* NR command */
+ FT_NRF_TEST_REQ_ID = 101,
+ FT_NRF_TEST_CNF_ID = 102,
+ /* SLA command*/
+ FT_GET_SLA_STATUS_REQ_ID = 103,
+ FT_GET_SLA_STATUS_CNF_ID = 104,
+ FT_GET_SLA_PARA_REQ_ID = 105,
+ FT_GET_SLA_PARA_CNF_ID = 106,
+ FT_VERIFY_SLA_RND_REQ_ID = 107,
+ FT_VERIFY_SLA_RND_CNF_ID = 108,
+ FT_CHECK_SLA_VER_REQ_ID = 109,
+ FT_CHECK_SLA_VER_CNF_ID = 110,
+ FT_CMD_DENIED_REQ_ID = 111,
+ FT_CMD_DENIED_CNF_ID = 112,
+ FT_DISPATCH_REPORT_ID ,
+ FT_MSG_LAST_ID = FT_DISPATCH_REPORT_ID
+}FT_MESSAGE_ID;
+
+/* Header of every structure */
+#define FT_HDR \
+ LOCAL_PARA_HDR \
+ struct { \
+ kal_uint16 token;\
+ kal_uint16 ft_msg_id;\
+ } header;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint16 token;
+ kal_uint16 ft_msg_id;
+} FT_H;
+
+/* struct definition for FT request & confirm */
+typedef FT_H tst_to_ft_struct;
+typedef FT_H ft_to_tst_struct;
+
+#define FT_CNF_OK 0
+#define FT_CNF_FAIL 1
+#define FT_CNF_NOT_SUPPORTED 2
+#define FT_CNF_NOT_ALLOWED 3
+#define FT_CNF_RETRY 4
+/*******************************************************************************
+*
+* Utility Functions
+*
+*******************************************************************************/
+void _FT_ALLOC_MSG(ilm_struct* ptr_ilm, kal_uint16 size, kal_bool IsFtMsg, kal_bool IsCcMsg);
+void _FT_CONSTRUCT_CC_MSG(const ilm_struct* ilm_ptr, ilm_struct* ilm_cc_ptr);
+void _FT_SendFtMsgByToken(module_type src_mod, module_type dest_mod, sap_type sap, msg_type msg, ilm_struct *ilm_ptr, kal_uint16 token);
+void _FT_SendFtMsgToPcByToken(ilm_struct *ilm_ptr, kal_uint16 token);
+kal_uint16 FT_GetGolbalToken(void);
+void FT_SendDeniedMsgIdCnf(kal_uint16 deniedMsgId, kal_uint32 status);
+/* allocate message with local parameter with FT_H header */
+#define FT_ALLOC_MSG(ptr_ilm,size) _FT_ALLOC_MSG(ptr_ilm, size, KAL_TRUE, KAL_FALSE)
+/* allocate message as ordinary ILM message */
+#define FT_ALLOC_OTHER_MSG(ptr_ilm,size) _FT_ALLOC_MSG(ptr_ilm, size, KAL_FALSE, KAL_FALSE)
+/* allocate Cross-Core message with local parameter with FT_H header */
+#define FT_ALLOC_CC_MSG(ptr_ilm,size) _FT_ALLOC_MSG(ptr_ilm, size, KAL_TRUE , KAL_TRUE)
+/* allocate Cross-Core message as ordinary ILM message */
+#define FT_ALLOC_OTHER_CC_MSG(ptr_ilm,size) _FT_ALLOC_MSG(ptr_ilm, size, KAL_FALSE, KAL_TRUE)
+#define FT_CONSTRUCT_CC_MSG(ilm_ptr, ilm_cc_ptr) _FT_CONSTRUCT_CC_MSG(ilm_ptr, ilm_cc_ptr)
+#define FT_SEND_MSG(src_mod, dest_mod, sap, msg, ilm_ptr) _FT_SendFtMsgByToken(src_mod, dest_mod, sap, msg, ilm_ptr, FT_GetGolbalToken())
+#define FT_SEND_MSG_TO_PC(ilm_ptr) _FT_SendFtMsgToPcByToken(ilm_ptr, FT_GetGolbalToken())
+#define FT_SEND_MSG_TO_PC_BY_TOKEN(ilm_ptr, token) _FT_SendFtMsgToPcByToken(ilm_ptr, token)
+#endif // _FT_MSG_COMMON_H_
diff --git a/mcu/interface/middleware/meta/ft_msg_fta.h b/mcu/interface/middleware/meta/ft_msg_fta.h
new file mode 100644
index 0000000..da5d886
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_msg_fta.h
@@ -0,0 +1,128 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg_fta.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * Messages definition of FTA category of FT Library
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#ifndef __FT_MSG_FTA_H__
+#define __FT_MSG_FTA_H__
+#include "ft_msg_common.h"
+/*******************************************************************************
+*
+* Message structures defined for Auxiliary Interface
+*
+*******************************************************************************/
+typedef enum
+{
+ FT_AUX_OP_BASIC = 0
+ ,FT_AUX_OP_END
+
+}META_AUX_CMD_TYPE;
+
+typedef union
+{
+ kal_uint8 m_u1Dummy;
+}META_AUX_CMD_U;
+
+typedef union
+{
+ kal_uint8 m_u1Dummy;
+}META_AUX_CNF_U;
+
+typedef struct
+{
+ FT_HDR
+ META_AUX_CMD_TYPE type;
+ META_AUX_CMD_U cmd;
+}FT_AUX_REQ;
+
+typedef struct
+{
+ FT_HDR
+ META_AUX_CMD_TYPE type;
+ kal_uint8 status;
+ META_AUX_CNF_U result;
+}FT_AUX_CNF;
+
+typedef FT_AUX_REQ ft_to_fta_req_struct;
+typedef FT_AUX_CNF fta_to_ft_cnf_struct;
+#endif // #ifndef __FT_MSG_FTA_H__
diff --git a/mcu/interface/middleware/meta/ft_msg_ftc.h b/mcu/interface/middleware/meta/ft_msg_ftc.h
new file mode 100644
index 0000000..8a6e7d0
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_msg_ftc.h
@@ -0,0 +1,126 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg_ftc.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * Messages definition of FTC category of FT Library
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#ifndef __FT_MSG_FTC_H__
+#define __FT_MSG_FTC_H__
+#include "ft_msg_common.h"
+/*******************************************************************************
+*
+* Message structures defined for Customer Interface
+*
+*******************************************************************************/
+typedef enum
+{
+ FT_CUSTOMER_OP_BASIC = 0
+ ,FT_CUSTOMER_OP_END
+
+}META_CUSTOMER_CMD_TYPE;
+
+typedef union
+{
+ kal_uint8 m_u1Dummy;
+}META_CUSTOMER_CMD_U;
+
+typedef union
+{
+ kal_uint8 m_u1Dummy;
+}META_CUSTOMER_CNF_U;
+
+typedef struct
+{
+ FT_HDR
+ META_CUSTOMER_CMD_TYPE type;
+ META_CUSTOMER_CMD_U cmd;
+}FT_CUSTOMER_REQ;
+
+typedef struct
+{
+ FT_HDR
+ META_CUSTOMER_CMD_TYPE type;
+ kal_uint8 status;
+ META_CUSTOMER_CNF_U result;
+}FT_CUSTOMER_CNF;
+
+#endif // #ifndef __FT_MSG_FTC_H__
diff --git a/mcu/interface/middleware/meta/ft_msg_l1rf.h b/mcu/interface/middleware/meta/ft_msg_l1rf.h
new file mode 100644
index 0000000..d2a1a93
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_msg_l1rf.h
@@ -0,0 +1,157 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg_l1rf.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * Messages definition of L1RF category of FT Library
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#ifndef __FT_MSG_L1RF_H__
+#define __FT_MSG_L1RF_H__
+#include "ft_msg_common.h"
+#if (!defined(__LTE_SM__)&&defined(__MTK_GL1_GSM__)) || defined(__L1SIM_NR_SM__) || defined(__NR_L1SIM__)
+#include "l1tst_ft_msg_struct.h"
+#endif // #if !defined(__LTE_SM__)&&defined(__MTK_GL1_GSM__)
+#endif // #ifndef __FT_MSG_L1RF_H__
diff --git a/mcu/interface/middleware/meta/ft_msg_l4.h b/mcu/interface/middleware/meta/ft_msg_l4.h
new file mode 100644
index 0000000..ab50852
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_msg_l4.h
@@ -0,0 +1,95 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg_l4.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * Messages definition of L4 mode switch mechanism of FT Library
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+#ifndef _FT_MSG_L4_H_
+#define _FT_MSG_L4_H_
+#include "ft_msg_common.h"
+
+typedef enum {
+ FT_MODE_SWITCH_SUCCESS = 0,
+ FT_MODE_SWITCH_FAIL,
+ FT_MODE_SWITCH_RETRY
+}FT_MODE_SWITCH_RESULT;
+
+typedef struct {
+ LOCAL_PARA_HDR
+ FT_MODE_SWITCH_RESULT result;
+}ft_enter_factory_mode_cnf_struct;
+
+typedef struct {
+ LOCAL_PARA_HDR
+ FT_MODE_SWITCH_RESULT result;
+}ft_enter_normal_mode_cnf_struct;
+
+#endif // _FT_MSG_L4_H_
\ No newline at end of file
diff --git a/mcu/interface/middleware/meta/ft_msg_lterf.h b/mcu/interface/middleware/meta/ft_msg_lterf.h
new file mode 100644
index 0000000..a0de3af
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_msg_lterf.h
@@ -0,0 +1,114 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg_lterf.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * Messages definition of ERF test category of FT Library
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+#ifndef __FT_MSG_ERF_H__
+#define __FT_MSG_ERF_H__
+#if defined(__LTE_RAT__)
+#include "el1d_meta_if.h"
+#endif // #if defined(__LTE_RAT__)
+#endif // #ifndef __FT_MSG_ERF_H__
diff --git a/mcu/interface/middleware/meta/ft_msg_misc.h b/mcu/interface/middleware/meta/ft_msg_misc.h
new file mode 100644
index 0000000..82a7af4
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_msg_misc.h
@@ -0,0 +1,285 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg_misc.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * Messages definition of MISC category of FT Library
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#ifndef __FT_MSG_MISC_H__
+#define __FT_MSG_MISC_H__
+#include "ft_msg_common.h"
+
+
+
+/*******************************************************************************
+*
+* Message structures defined for MISC Command
+*
+*******************************************************************************/
+
+
+typedef enum
+{
+ FT_MISC_OP_GET_IMEI_LOC = 0,
+ FT_MISC_OP_GET_IMEI_VALUE = 1,
+ FT_MISC_OP_GET_CAL_INFO = 2,
+ FT_MISC_OP_VERIFY_TEMP_SML_FILE = 3,
+ FT_MISC_OP_QUERY_NVRAM_FOLDER = 4,
+ FT_MISC_OP_VERIFY_NVRAM_ATTR_SETTING_COMPLETE = 5,
+ FT_MISC_OP_ENABLE_PATH_LIMITION = 6,
+ FT_MISC_OP_DISABLE_PATH_LIMITION = 7,
+ FT_MISC_OP_GET_IMEI_REC_NUM = 8,
+ FT_MISC_OP_SET_IMEI_VALUE = 9,
+ FT_MISC_OP_GET_NVRAM_FOLDER_AMOUNT = 10,
+ FT_MISC_OP_CHECK_SIM1_INSERTED = 11,
+ FT_MISC_OP_CHECK_SIM2_INSERTED = 12,
+ FT_MISC_OP_SET_MUIC_CHARGER_MODE = 13,
+ FT_MISC_OP_CALDATA_INTEGRITY_START_REC = 14,
+ FT_MISC_OP_CALDATA_INTEGRITY_STOP_REC = 15,
+ FT_MISC_OP_CALDATA_INTEGRITY_ADD_ONE = 16,
+ FT_MISC_OP_CALDATA_INTEGRITY_DEL_ONE = 17,
+ FT_MISC_OP_CALDATA_INTEGRITY_DEL_ALL = 18,
+ FT_MISC_OP_CALDATA_INTEGRITY_CHECK_ONE = 19,
+ FT_MISC_OP_CALDATA_INTEGRITY_CHECK_ALL = 20,
+ FT_MISC_OP_GET_ADC_FROM_EFUSE = 21,
+ FT_MISC_OP_GET_CALFLAG_ENUM = 22,
+ FT_MISC_OP_GET_RF_CAL_ENV_ENUM = 23,
+ FT_MISC_OP_GET_RF_CAL_LOSS_SETTING_ENUM = 24,
+ FT_MISC_OP_GET_RF_TEST_POWER_RESULT_ENUM = 25,
+ FT_MISC_OP_GET_ADC_MAX_CHANNEL = 26,
+ FT_MISC_OP_GET_TADC_INDEX = 27,
+ FT_MISC_OP_GET_RID = 28,
+ FT_MISC_OP_CHECK_GEMINI_PLUS_SIM_INSERTED = 29,
+ FT_MISC_OP_GET_MMI_CACHE_ENUM_INDEX = 30,
+ FT_MISC_OP_SET_WIFI_MAC_ADDR = 31,
+ FT_MISC_OP_GET_BARCODE_VALUE = 32,
+ FT_MISC_OP_CHECK_SIM_HW_TEST = 33,
+ FT_MISC_OP_CALDATA_INTEGRITY_START_REC_EX = 34,
+ FT_MISC_OP_CALDATA_INTEGRITY_STOP_REC_EX = 35,
+ FT_MISC_OP_CALDATA_INTEGRITY_ADD_ONE_EX = 36,
+ FT_MISC_OP_CALDATA_INTEGRITY_DEL_ONE_EX = 37,
+ FT_MISC_OP_CALDATA_INTEGRITY_DEL_ALL_EX = 38,
+ FT_MISC_OP_END
+}FT_MISC_CMD_TYPE;
+
+typedef struct
+{
+ kal_uint16 record_index;
+ kal_uint8 imei[8];
+ kal_uint8 svn;
+}FT_MISC_SET_IMEI_VALUE_REQ_T;
+
+typedef struct
+{
+ kal_uint16 u2LidEnum;
+ kal_uint16 u2RID;
+}FT_MISC_CAL_DATA_INTEGRITY_ENTRY;
+
+typedef union
+{
+ kal_bool m_bcheckImeiFlag;
+ FT_MISC_SET_IMEI_VALUE_REQ_T m_rIMEIData;
+ kal_uint16 m_u1RecordIndex;
+ kal_uint8 m_u1ChargerMode;
+ FT_MISC_CAL_DATA_INTEGRITY_ENTRY m_rCalDataOne;
+ /// [IN] requested RID length for the RID query operation
+ kal_uint8 m_RIDLength;
+ /// [IN] requested SIM index for the SIM insertion test operation
+ kal_uint8 m_u1SimIndex;
+ /// [IN] MMI cache enum value query
+ kal_uint16 m_u2MmiCacheEnumValue;
+ kal_uint8 buffer[6];
+}FT_MISC_CMD_U;
+
+typedef struct
+{
+ kal_uint8 buf[20]; // default: 10 digits
+ kal_uint8 buf_len;
+
+}FT_IMEI_DATA_T;
+
+typedef struct
+{
+ kal_uint16 m_stop_enum_value;
+ kal_uint16 m_total_lid_num;
+ kal_uint16 m_stop_index;
+
+}FT_NVRAM_SETTINGS_VERIFY_T;
+
+typedef struct
+{
+ kal_uint8 m_u1LastFrame; // to mark it is the last frame for FT_MISC_OP_GET_CAL_INFO
+ kal_uint16 m_u2TotalNum; // only valid when lastframe = 1;
+
+}FT_CAL_INFO_T;
+
+
+typedef struct
+{
+ kal_bool bAllPass;
+ kal_uint16 u2LastLID;
+ kal_uint16 u2LastRID;
+}FT_MISC_CAL_DATA_INTEGRITY_CHECK_CNF_T;
+typedef struct
+{
+ kal_bool bADCStoredInEfuse;
+ kal_uint16 u2ADCChnNum;
+}FT_MISC_GET_ADC_FROM_EFUSE_CNF_T;
+
+typedef struct
+{
+ /// [OUT] requested RID length (unit: bytes)
+ kal_uint8 buf_len;
+ /// [OUT] RID raw buffer returned from the target side
+ kal_uint8 buf[16];
+}META_RID_DATA_T;
+/**
+ * Please do not change alignment (this is a 2-byte aligned structure)
+ */
+typedef union
+{
+ kal_bool m_bCheckResult;
+ kal_uint8 m_u1IMEILoc;
+ kal_uint8 m_u1LastFrame;
+ kal_uint8 m_u1VerifyResult;
+ kal_uint8 m_u1NVRAMFolderAmount;
+ kal_uint8 m_u1SIMInserted;
+ kal_uint16 m_u1CurRecNum;
+ kal_uint8 m_u1ADCMaxChannel;
+ kal_uint8 m_u1TADCChannelIndex;
+ kal_uint8 m_i4SimHwStatus[4]; ///< HW status (4 bytes) to keep the alignment, the variable is declared as array
+ kal_uint16 m_u2IMEIRecords;
+ kal_uint16 m_u2RecordIndex;
+ /// [OUT] MMI cache enum value index of the NVRAM cache byte
+ kal_uint16 m_u2NvramDataIndexOfMmiCacheEnumValue;
+ kal_uint16 m_u2CalFlagEnum;
+ kal_uint16 m_u2Enum;
+ FT_IMEI_DATA_T m_rIMEIData;
+ /// [OUT] RID data structure contains RID length and buffer from target side
+ META_RID_DATA_T m_rRIDData;
+ FT_NVRAM_SETTINGS_VERIFY_T m_rNvramVerifyResult;
+ FT_MISC_GET_ADC_FROM_EFUSE_CNF_T m_rGetAdcFromEfuse;
+ FT_MISC_CAL_DATA_INTEGRITY_CHECK_CNF_T m_rCalCheckAll;
+}FT_MISC_CNF_U;
+
+typedef struct
+{
+ FT_HDR
+ FT_MISC_CMD_TYPE type;
+ FT_MISC_CMD_U cmd;
+
+}FT_MISC_REQ;
+
+typedef struct
+{
+ FT_HDR
+ FT_MISC_CMD_TYPE type;
+ FT_MISC_CNF_U result;
+ kal_uint32 status;
+}FT_MISC_CNF;
+
+#endif // #ifndef __FT_MSG_MISC_H__
diff --git a/mcu/interface/middleware/meta/ft_msg_misc_ex.h b/mcu/interface/middleware/meta/ft_msg_misc_ex.h
new file mode 100644
index 0000000..d72658a
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_msg_misc_ex.h
@@ -0,0 +1,182 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg_misc_ex.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * Messages definition of MISC_EX category of FT Library
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#ifndef __FT_MSG_MISC_EX_H__
+#define __FT_MSG_MISC_EX_H__
+#include "ft_msg_common.h"
+
+typedef enum
+{
+ FT_MISC_EX_OP_GET_ERS_SIZE = 0
+ ,FT_MISC_EX_OP_GET_ERS_DATA
+ ,FT_MISC_EX_OP_GET_ERS_COUNT
+ ,FT_MISC_EX_OP_GET_ERS_DATA_INFO_BY_INDEX
+ ,FT_MISC_EX_OP_COPY_NVRAM_TO_BP_AREA
+ ,FT_MISC_EX_OP_VERIFY_BP_AREA
+ ,FT_MISC_EX_OP_OBSOLETED1
+ ,FT_MISC_EX_OP_OBSOLETED2
+ ,FT_MISC_EX_OP_BACKUP_TO_SDS
+ ,FT_MISC_EX_OP_RAMDISK_CHECK_EXIST /**< \brief check ram disk is existing or not */
+ ,FT_MISC_EX_OP_RAMDISK_GET_SIZE /**< \brief get ram disk size */
+ ,FT_MISC_EX_OP_RAMDISK_READ /**< \brief read from ram disk */
+ ,FT_MISC_EX_OP_SET_COMMAND_TO_SYSTEM /**< \brief set/clr download flag */
+ ,FT_MISC_EX_OP_END
+}FT_MISC_EX_CMD_TYPE;
+
+
+
+typedef union
+{
+ kal_uint32 Dummy;
+ kal_int32 m_i4ErsDataIndex;
+ kal_uint8 u1BPAreaFastCheck;
+ kal_uint32 mode;
+ kal_uint32 m_u4RamDiskReqOffset;
+ kal_uint32 m_u4SetCmd2System;
+}FT_MISC_EX_CMD_U;
+
+typedef struct
+{
+ kal_uint8 sec;
+ kal_uint8 min;
+ kal_uint8 hour;
+ kal_uint8 day;
+ kal_uint8 mon;
+ kal_uint8 wday;
+ kal_uint8 year;
+}FT_MISC_EX_RCT_INFO_T;
+
+
+typedef struct
+{
+ kal_uint32 m_u4TotalSize;
+ kal_uint32 m_u4CurOffset;
+ kal_bool m_bLastFrm;
+
+
+}FT_MISC_EX_GET_ERS_DATA_CNF_T;
+
+typedef union
+{
+
+ kal_uint32 m_u4ErsDataSize;
+ kal_int32 m_i4ErsDataCount;
+ FT_MISC_EX_GET_ERS_DATA_CNF_T m_rErsDataFrm;
+ FT_MISC_EX_RCT_INFO_T m_rErsDataTime;
+ kal_uint32 m_u4BPStatus;
+ kal_uint32 m_u4SDSStatus;
+ kal_uint32 m_u4RamDiskSize;
+ FT_MISC_EX_GET_ERS_DATA_CNF_T m_rRamDiskFrm;
+ kal_int8 m_cRamDiskExist;
+}FT_MISC_EX_CNF_U;
+
+
+
+
+typedef struct
+{
+ FT_HDR
+ FT_MISC_EX_CMD_TYPE type;
+ FT_MISC_EX_CMD_U cmd;
+
+}FT_MISC_EX_REQ;
+
+typedef struct
+{
+ FT_HDR
+ FT_MISC_EX_CMD_TYPE type;
+ kal_uint32 status;
+ FT_MISC_EX_CNF_U result;
+}FT_MISC_EX_CNF;
+
+#endif // #ifndef __FT_MSG_MISC_EX_H__
diff --git a/mcu/interface/middleware/meta/ft_msg_mmrf.h b/mcu/interface/middleware/meta/ft_msg_mmrf.h
new file mode 100644
index 0000000..5629f23
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_msg_mmrf.h
@@ -0,0 +1,78 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg_mmrf.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * Messages definition of MMRF test category of FT Library
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+#ifndef __FT_MSG_MMRF_H__
+#define __FT_MSG_MMRF_H__
+#include "mml1_meta_if.h"
+#endif // #ifndef __FT_MSG_MMRF_H__
diff --git a/mcu/interface/middleware/meta/ft_msg_ul1rf.h b/mcu/interface/middleware/meta/ft_msg_ul1rf.h
new file mode 100644
index 0000000..c97a339
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_msg_ul1rf.h
@@ -0,0 +1,9 @@
+#if (defined __MD93__)
+#include "ft_msg_ul1rf_gen93.h"
+#elif (defined __MD95__)
+#include "ft_msg_ul1rf_gen95.h"
+#elif (defined __MD97__) || (defined __MD97P__)
+#include "ft_msg_ul1rf_gen97.h"
+#else
+#error "[ERROR] Invalid MD generation"
+#endif
\ No newline at end of file
diff --git a/mcu/interface/middleware/meta/ft_msg_ul1rf_gen93.h b/mcu/interface/middleware/meta/ft_msg_ul1rf_gen93.h
new file mode 100644
index 0000000..f16ce08
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_msg_ul1rf_gen93.h
@@ -0,0 +1,2120 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg_ul1rf.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * Messages definition of UL1 RF category of FT Library
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
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+ * removed!
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+ * removed!
+ * removed!
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+ *
+ * removed!
+ * removed!
+ * removed!
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+ *
+ * removed!
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+ *
+ * removed!
+ * removed!
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+ *
+ * removed!
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+ * removed!
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+ * removed!
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+ * removed!
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+ * removed!
+ * removed!
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+ * removed!
+ * removed!
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+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
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+ *
+ * removed!
+ * removed!
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+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#ifndef __FT_MSG_UL1RF_H__
+#define __FT_MSG_UL1RF_H__
+#include "ft_msg_common.h"
+#include "ul1d_rf_public.h"
+
+#include "kal_public_defs.h"
+
+
+#define UL1TST_LNA_MODE_NUMBER_EXT 6
+
+#define UL1_DPD_FDB_NUM (CAL_UARFCN_SECTION * UL1_DPD_MAX_PA_LEVEL_NUM) /* refer to f_db in U_sDPD_COMMON_CAL */
+#define UL1_DPD_MAX_PTAR_TH_NUM (CAL_UARFCN_SECTION * UL1_DPD_MAX_PA_LEVEL_NUM) /* refer to pa_idx_th in U_sDPD_COMMON_CAL */
+#define UL1_DPD_MAX_IMPLICIT_RSV_NUM 0
+#define UL1_DPD_MAX_IMPLICIT_NUM (UL1_DPD_FDB_NUM + UL1_DPD_MAX_PTAR_TH_NUM + UL1_DPD_MAX_IMPLICIT_RSV_NUM)
+#define UL1_DPD_MAX_SET_ALL_DATA_NUM (7) /* floor(MMRF_MAX_TOOL_PEER_SIZE_PER_CMD / sizeof(URfTestCmd_SetDpdPaAndDpdFacCalAll_OneBand)) */
+#define UL1_DPD_MAX_GET_ALL_DATA_NUM (UL1_DPD_MAX_SET_ALL_DATA_NUM)
+#define UL1_DPD_MAX_SET_PARTIAL_DATA_NUM (239) /* floor(MMRF_MAX_TOOL_PEER_SIZE_PER_CMD / sizeof(URfTestCmd_SetDpdPaAndDpdFacCalPartial_OneBand)) */
+
+/*******************************************************************************
+*
+* Message structures defined for UL1 TST Interface
+*
+*******************************************************************************/
+#if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__)
+
+//type1: communicate with ul1tst module, and send the confirm without waiting!
+//type2: communicate with u1ltst module, and wait their confirm, then send back to PC
+//type3: invoke UL1D's API, then send confirm to PC side.
+//type4: no operation, only get FT task's current status, and reply to PC side
+
+typedef enum
+{
+ URF_TEST_CMD_TXACCESS = 0,
+ URF_TEST_CMD_STOP = 1,
+ URF_TEST_CMD_TX_DPCH = 2,
+ URF_TEST_CMD_RX_DPCH = 3,
+ URF_TEST_CMD_RSSI = 4,
+ URF_TEST_CMD_RSCP = 5,
+ URF_TEST_CMD_AFC = 6,
+ URF_TEST_CMD_TX_PAAPC = 7,
+ URF_TEST_CMD_GET_RFID = 8,
+ URF_TEST_CMD_CONFIG_HWTPC = 9,
+ URF_TEST_CMD_GET_PWR_DT_STEP = 10,
+ URF_TEST_CMD_GET_PWR_DT_DAC = 11,
+ URF_TEST_CMD_GET_PWR_DT_DEFAULT_THR = 12,
+ URF_TEST_CMD_SET_IMMEDIATE_BSI = 13,
+ URF_TEST_CMD_GET_IMMEDIATE_BSI = 14,
+ URF_TEST_CMD_CONTINUOUS_RX = 15,
+ URF_TEST_CMD_START_FHC = 16,
+ URF_TEST_CMD_SET_TXDAC_DATA = 17,
+ URF_TEST_CMD_GET_PWR_DET_MEASURE_RES = 18,
+ URF_TEST_CMD_SET_PWR_CTRL_MODE = 19,
+ URF_TEST_CMD_REPLACE_GAIN_TABLE_FOR_CAL = 20,
+ URF_TEST_CMD_START_FHC_NO_WAIT = 21,
+ URF_TEST_CMD_GET_FHC_RESULT = 22,
+ URF_TEST_CMD_QUERY_TARGET_CAPABILITY = 23,
+ URF_TEST_CMD_START_NSFT = 24,
+ URF_TEST_CMD_GET_BIT_COUNT_FOR_SINGLE_ENDED_BER = 25,
+ URF_TEST_CMD_NSFT_SET_ILPC_STEP = 26,
+ URF_TEST_CMD_START_NSFT_EX = 27,
+ URF_TEST_CMD_SET_PA_OCT_LEVEL_DATA = 28,
+ URF_TEST_CMD_START_HSDPA_NSFT = 29,
+ URF_TEST_CMD_START_HSUPA_NSFT = 30,
+ URF_TEST_CMD_START_FHC_EX = 31,
+ URF_TEST_CMD_GET_FHC_EX_RESULT = 32,
+ URF_TEST_CMD_GET_CURRENT_LNA_MODE = 33,
+ URF_TEST_CMD_SET_CAPID = 34,
+ URF_TEST_CMD_GET_MAX_CAPID = 35,
+ URF_TEST_CMD_AFC_EX = 36,
+ URF_TEST_CMD_RSSI_RXD = 37,
+ URF_TEST_CMD_GET_CURRENT_RXD_LNA_MODE = 38,
+ URF_TEST_CMD_SET_RX_BANDWIDTH = 39,
+ URF_TEST_CMD_SET_RX_ANTENNA = 40,
+ URF_TEST_CMD_SET_TX_PA_DRIFT_COMPENSATION = 41,
+ URF_TEST_CMD_SET_ICS_CELL_POWER = 42,
+ URF_TEST_CMD_GET_RF_TEMP_BSI = 43,
+ URF_TEST_CMD_GET_RF_CAPABILITY = 44,
+ URF_TEST_CMD_START_NSFT_LIST_MODE = 45,
+ URF_TEST_CMD_SET_RF_MIPI_CODEWORD = 46,
+ URF_TEST_CMD_GET_RF_MIPI_CODEWORD = 47,
+ URF_TEST_CMD_GET_TEMPERATURE_INFO = 48,
+ URF_TEST_CMD_RX_GAIN_SWEEP = 49,
+ URF_TEST_CMD_RELOAD_NVRAM = 50,
+ URF_TEST_CMD_CHECK_IF_FUNC_EXIST = 51,
+ URF_TEST_CMD_UBIN_MODE_SETUP = 52,
+ URF_TEST_CMD_SET_RX_PATH_LOSS = 53,
+ URF_TEST_CMD_GET_RX_PATH_LOSS = 54,
+ URF_TEST_CMD_RSSI_LPM = 55,
+ URF_TEST_CMD_RSSI_RXD_LPM = 56,
+ URF_TEST_CMD_CONTINUOUS_RX_LPM = 57,
+ URF_TEST_CMD_NSFT_GET_RSSI = 58,
+ URF_TEST_CMD_SET_RX_CALIBRATION_DATA = 59,
+ URF_TEST_CMD_GET_RX_CALIBRATION_DATA = 60,
+ URF_TEST_CMD_SET_TX_CALIBRATION_DATA = 61,
+ URF_TEST_CMD_GET_TX_CALIBRATION_DATA = 62,
+ URF_TEST_CMD_NSFT_RESET_BER_RESULT = 66,
+ URF_TEST_CMD_FHC_ELNA = 67,
+ URF_TEST_CMD_GET_RSSI_ELNA = 68,
+ URF_TEST_CMD_GET_CONTINUOUS_RSSI_ELNA = 69,
+ URF_TEST_CMD_TX_DPCH_FIX_PGA_GAIN = 70,
+ URF_TEST_CMD_GET_CALIBRATION_INFO_V3 = 71,
+ URF_TEST_CMD_START_FHC_V3 = 72,
+ URF_TEST_CMD_GET_FHC_RESULT_V3 = 73,
+ URF_TEST_CMD_GET_RSSI_V3 = 74,
+ URF_TEST_CMD_GAIN_SELECT_PWR_V3 = 75,
+ URF_TEST_CMD_GAIN_SELECT_LNA_V3 = 76,
+ URF_TEST_CMD_GET_RXTX_CALIBRATION_DATA_V3 = 77, //after 6293
+ URF_TEST_CMD_SET_RXTX_CALIBRATION_DATA_V3 = 78, //after 6293
+ URF_TEST_CMD_RSCP_V3 = 79,
+ URF_TEST_CMD_AFC_V3 = 80,
+ URF_TEST_CMD_AFC_CAPID_V3 = 81,
+ URF_TEST_CMD_LOW_POWER_CAL_V3 = 82,
+ URF_TEST_CMD_TRIGGER_IQ_DUMP_MODE_V3 = 88,
+ URF_TEST_CMD_GET_IQ_DUMP_RESULT_V3 = 89,
+ URF_TEST_CMD_SET_RFEQ_SUBBAND_RESULT_V3 = 90,
+/*----------------------------------------------------------------------------------------------------*/
+ URF_TEST_CMD_GP_TOOL_COMMAND_START,
+ URF_TEST_CMD_END,
+ URF_TEST_CMD_MAX = 0x7FFFFFFF
+} URfTestCmdType;
+typedef struct
+{
+ kal_uint16 ul_uarfcn; /* UL uarfcn range:????Read from NVRAM?? (9612 ~ 9888) */
+ kal_uint16 dl_psc; /* 0~511. */
+ kal_uint16 signature; /* 0~15, for single signature decision. */
+ kal_uint8 pa_mode; /* 0: High 1: Middle 2: Low */
+ kal_int8 init_power; /* Assume cpich_rscp=0, ul_interference=0. */
+ kal_uint8 power_step; /* Preamble power ramping step. 1 ~ 8dB */
+ kal_uint8 max_retrans; /* 1~64. */
+ kal_uint16 dl_uarfcn;
+ kal_uint8 asc;
+} URfTestCmdTxAccess;
+typedef struct
+{
+ kal_uint16 ul_freq;
+ kal_int16 psc; /* 0~511. */
+ kal_uint32 sc_code; /* Scrambling code #. 0 ~ 16777215 */
+ kal_uint8 power_ctrl_mode;
+ kal_uint8 pa_mode;
+ kal_uint16 idx;
+ kal_uint16 afc_dac;
+ kal_uint8 dpcch_pwr;
+ kal_uint8 dpdch_pwr;
+
+ /* Below for UL1D_RF_Meta_SetTxInfo. */
+ kal_bool no_loop_ctrl;
+
+ /* Below for setPaApcDac. */
+ kal_uint8 rf_band;
+ kal_uint8 vm1;
+ kal_uint8 vm2;
+ kal_uint16 dc2dc_dac;
+ kal_uint16 vbias_dac;
+ kal_bool pwr_det;
+ kal_uint16 apc_dac;
+ kal_bool pa_octlev_ctrl_used;
+} URfTestCmdTxDPCh;
+
+typedef struct
+{
+ kal_uint16 dl_freq;
+ kal_int16 psc; /* 0~511. */
+ kal_uint8 ssc; /* 0~15. */
+ kal_int16 ovsf; /* 0~sf-1. */
+ kal_uint16 afc_dac;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdRxDPCh;
+#define FDD_MAX_FREQ_LIST 36
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_uint16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_uint8 temperature;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdRSSI;
+
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_uint16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_uint8 temperature;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+ kal_uint8 lpm_mode; /* 0: normal LNA gain mode , 1: low power LNA gain mode. */
+} URfTestCmdLPMRSSI;
+
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_uint16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_uint16 scc_dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int16 settings; // PCC SRX/LNA Settings
+ kal_uint8 srxcfg;
+ kal_uint8 vcocfg;
+ kal_uint8 lnaport;
+ kal_uint8 temperature;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdCARSSI;
+
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_uint16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_uint8 temperature;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdRxGainSweep;
+
+typedef struct
+{
+ kal_bool pscan_before_cell_search; /* True if UL1TST needs power scan before cell search/RSCP. */
+ kal_uint16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+ kal_uint8 sample_num_per_cell;
+ kal_bool read_sfn; /* True if we need to do SFN measurement for the found cell. */
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdRSCP;
+
+typedef struct
+{
+ kal_uint16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+} UTSTCmdRSCPV3lp;
+
+
+typedef struct
+{
+ kal_int16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+ kal_int16 afc_dac;
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdAFC;
+
+typedef struct
+{
+ kal_int16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+ kal_int16 afc_dac;
+} UTSTCmdAFCV3lp;
+
+
+typedef struct
+{
+ kal_int8 m_cRfBand;
+ kal_uint16 m_u2Idx;
+ kal_uint8 m_ucPaMode;
+ kal_uint8 m_ucVm1;
+ kal_uint8 m_ucVm2;
+ kal_uint16 m_u2DC2DC_Dac;
+ kal_uint16 m_u2Vbias_Dac;
+ kal_uint16 m_u2ApcDac;
+
+}UL1D_RF_TX_PA_APC_REQ_T;
+
+typedef struct
+{
+ //should be exactly the same as META_HWTPC_FRAME_INFO in ul1d_rf_general.h
+ kal_uint8 tpc_step;
+ kal_uint8 itp;
+ kal_uint8 rpp;
+ kal_uint8 fmt_idx;
+ kal_uint8 dl_frame_type;
+ kal_uint16 slot_mask;
+ kal_int8 tpc_cmd[15];
+ kal_uint8 beta_c;
+ kal_uint8 beta_d;
+
+}UL1D_RF_HWTPC_FRAME_INFO;
+typedef struct
+{
+ kal_uint8 pc_algo;
+ kal_uint8 tpc_used_frame; // specify the frame number
+ kal_int16 p_ini;
+
+ UL1D_RF_HWTPC_FRAME_INFO frame_info[8];
+
+}UL1D_RF_HWTPC_CONFIG_REQ_T;
+
+typedef struct
+{
+ kal_uint8 rf_band;
+
+}UL1D_RF_GET_PWR_THR_REQ_T;
+
+typedef struct
+{
+ kal_uint32 lid; // the lid is needed to update run-time value
+ kal_uint32 eg_ptr; // the event group pointer used to notify runt-time update finish
+} URFTestCmdReloadNVRAM;
+
+typedef struct
+{
+ kal_bool no_loop_ctrl;
+ kal_uint16 afc_dac;
+ kal_bool pwr_det;
+ kal_uint8 power_ctrl_mode;
+ kal_uint8 vm1[10][3];
+ kal_uint8 vm2[10][3];
+ kal_uint16 dc2dc_dac[10][3];
+ kal_uint16 vbias_dac[10][3];
+ kal_bool init_tx_onoff;
+ kal_bool ready_tx_onoff;
+ kal_uint8 init_pa_mode;
+ kal_uint8 ready_pa_mode;
+ kal_uint16 init_pa_gain;
+ kal_uint16 ready_pa_gain;
+ kal_uint16 init_vga_dac_tpc_idx;
+ kal_uint16 ready_vga_dac_tpc_idx;
+ kal_uint8 temperature;
+ kal_bool hwAGC;
+ kal_int16 gain_init;
+ kal_bool init_condition;
+ kal_uint8 step_duration;
+ kal_uint8 ready_duration;
+ kal_uint8 retune_duration;
+ kal_uint8 gain_stable_time;
+ kal_uint16 max_vga_dac;
+ kal_uint16 min_vga_dac;
+ kal_uint16 jump_vga_dac;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 odd_record;
+ kal_uint8 pa_gain_start_idx;
+ kal_uint8 pd_gain_start_idx;
+ kal_uint8 dl_band[40];
+ kal_uint8 ul_band[40];
+ kal_uint16 dl_freq[40];
+ kal_uint16 ul_freq[40];
+ kal_uint8 pa_mode[40];
+ kal_uint16 vga_dac_tpc_idx[40];
+ kal_uint16 pa_gain[40];
+ kal_uint8 pd_gain[40];
+}UL1D_RF_FHC_REQ_T;
+
+typedef struct
+{
+ kal_bool no_loop_ctrl;
+ kal_uint16 afc_dac;
+ kal_bool pwr_det;
+ kal_uint8 power_ctrl_mode;
+ kal_uint8 vm1[10][3];
+ kal_uint8 vm2[10][3];
+ kal_uint16 dc2dc_dac[10][3];
+ kal_uint16 vbias_dac[10][3];
+ kal_bool init_tx_onoff;
+ kal_bool ready_tx_onoff;
+ kal_uint8 init_pa_mode;
+ kal_uint8 ready_pa_mode;
+ kal_uint16 init_pa_gain;
+ kal_uint16 ready_pa_gain;
+ kal_uint16 init_vga_dac_tpc_idx;
+ kal_uint16 ready_vga_dac_tpc_idx;
+ kal_uint8 temperature;
+ kal_bool hwAGC;
+ kal_int16 gain_init;
+ kal_bool init_condition;
+ kal_uint8 step_duration;
+ kal_uint8 ready_duration;
+ kal_uint8 retune_duration;
+ kal_uint8 gain_stable_time;
+ kal_uint16 max_vga_dac;
+ kal_uint16 min_vga_dac;
+ kal_uint16 jump_vga_dac;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 odd_record;
+ kal_uint8 pa_gain_start_idx;
+ kal_uint8 pd_gain_start_idx;
+ kal_uint8 dl_band[40];
+ kal_uint8 ul_band[40];
+ kal_uint16 dl_freq[40];
+ kal_uint16 ul_freq[40];
+ kal_uint8 pa_mode[40];
+ kal_uint16 vga_dac_tpc_idx[40];
+ kal_uint16 pa_gain[40];
+ kal_uint8 pd_gain[40];
+ kal_uint8 pa_section[40];
+ kal_uint16 lna_gain[40];
+}UL1D_RF_FHC_EX_REQ_T;
+
+typedef struct
+{
+ kal_bool no_loop_ctrl;
+ kal_uint16 afc_dac;
+ kal_bool pwr_det;
+ kal_uint8 power_ctrl_mode;
+ kal_uint8 vm1[10][3];
+ kal_uint8 vm2[10][3];
+ kal_uint16 dc2dc_dac[10][3];
+ kal_uint16 vbias_dac[10][3];
+ kal_bool init_tx_onoff;
+ kal_bool ready_tx_onoff;
+ kal_uint8 init_pa_mode;
+ kal_uint8 ready_pa_mode;
+ kal_uint16 init_pa_gain;
+ kal_uint16 ready_pa_gain;
+ kal_uint16 init_vga_dac_tpc_idx;
+ kal_uint16 ready_vga_dac_tpc_idx;
+ kal_uint8 temperature;
+ kal_bool hwAGC;
+ kal_int16 gain_init;
+ kal_bool init_condition;
+ kal_uint8 step_duration;
+ kal_uint8 ready_duration;
+ kal_uint8 retune_duration;
+ kal_uint8 gain_stable_time;
+ kal_uint16 max_vga_dac;
+ kal_uint16 min_vga_dac;
+ kal_uint16 jump_vga_dac;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 odd_record;
+ kal_uint8 pa_gain_start_idx;
+ kal_uint8 pd_gain_start_idx;
+ kal_uint8 dl_band[40];
+ kal_uint8 ul_band[40];
+ kal_uint16 dl_freq[40];
+ kal_uint16 ul_freq[40];
+ kal_uint8 pa_mode[40];
+ kal_uint16 vga_dac_tpc_idx[40];
+ kal_uint16 pa_gain[40];
+ kal_uint8 pd_gain[40];
+ kal_uint8 pa_section[40];
+ kal_uint16 lna_gain[40];
+ kal_uint8 cal_num;
+ kal_uint8 route_setting[3];
+}UL1D_RF_FHC_EX_CA_REQ_T;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_int16 rssi[400];
+ kal_uint16 pwr_det_value[40];
+}UL1D_RF_FHC_CNF_T;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 rx_lna_mode[400];
+ kal_int16 rssi[400];
+ kal_uint16 pwr_det_value[40][3];
+/**V R8 new features */
+ kal_int16 Gbb_Offset[400]; /**< \brief TX Gbb power compensation */
+ kal_uint8 rxd_lna_mode[400]; /**< \brief Rx diversity path lna mode */
+ kal_int16 rxd_rssi[400]; /**< \brief Rx diversity path RSSI */
+}UL1D_RF_FHC_EX_CNF_T;
+
+typedef struct
+{
+
+ kal_bool b_afc_dac_valid;
+ kal_uint16 u2_afc_dac;
+ kal_uint8 u1_loopbackType;
+ kal_uint8 u1_frame_shift;
+ kal_uint8 u1_rmc_type;
+ kal_uint8 u1_ctfc[4];
+ kal_uint8 u1_bit_pattern;
+
+ kal_int16 i2_dl_freq;
+ kal_int16 i2_dl_psc;
+ kal_int16 i2_dl_ovsf;
+
+ kal_int16 i2_ul_freq;
+ kal_uint16 u2_ul_tfci;
+ kal_uint32 u4_ul_sc_code;
+ kal_bool b_iq_pwr_valid;
+ kal_uint8 u1_dpcch_pwr;
+ kal_uint8 u1_dpdch_pwr;
+
+}UL1D_RF_NSFT_REQ_T;
+/**
+ * NSFT List Mode command parameter
+ */
+typedef struct
+{
+ kal_bool afc_dac_valid;
+ kal_uint16 afc_dac;
+ kal_uint8 loopbackType;
+ kal_uint8 frame_shift;
+ kal_uint8 rmc_type;
+ kal_uint8 ctfc[4];
+ kal_uint8 bit_pattern;
+/* DL parameters */
+ kal_int16 dl_freq[50];
+ kal_int16 dl_psc;
+ kal_int16 dl_ovsf;
+/* UL parameters */
+ kal_int16 ul_freq[50];
+ kal_uint16 ul_tfci;
+ kal_uint32 ul_sc_code;
+ kal_bool iq_pwr_valid;
+ kal_uint8 dpcch_pwr;
+ kal_uint8 dpdch_pwr;
+/* common parameters */
+ kal_uint8 valid_freq;
+ kal_uint16 test_item[50];
+/* the time settings, unit = frame */
+ kal_uint16 full_test_time;
+ kal_uint8 ready_time;
+ kal_uint8 sync_time;
+ kal_uint8 retrial;
+ kal_uint16 test_time;
+ kal_uint16 rx_rssi_start_time[3];
+ kal_uint8 rx_rssi_duration[3];
+ kal_uint16 rx_ber_start_time;
+ kal_uint8 rx_ber_duration;
+ kal_uint16 ILPC_ABC_time;
+ kal_uint16 ILPC_EF_time;
+ kal_uint16 ILPC_GH_time;
+ kal_uint16 transition_time;
+} URfNsftListModeReq;
+/**
+ * HSPA command parameter
+ */
+typedef struct
+{
+ kal_bool b_afc_dac_valid;
+ kal_uint16 u2_afc_dac;
+ kal_uint8 u1_loopbackType;
+ kal_uint8 u1_frame_shift;
+ kal_uint8 u1_rmc_type;
+ kal_uint8 u1_ctfc[4];
+ kal_uint8 u1_bit_pattern;
+
+ kal_int16 i2_dl_freq;
+ kal_int16 i2_dl_psc;
+ kal_int16 i2_dl_ovsf;
+
+ kal_int16 i2_ul_freq;
+ kal_uint16 u2_ul_tfci;
+ kal_uint32 u4_ul_sc_code;
+ kal_bool b_iq_pwr_valid;
+ kal_uint8 u1_dpcch_pwr;
+ kal_uint8 u1_dpdch_pwr;
+ kal_uint8 subTest;
+}URfTestCmdHspaNsft;
+
+typedef struct
+{
+ kal_uint16 measure_count;
+} URfTestCmdGetRfTempSensor;
+
+typedef struct
+{
+ kal_bool bDataValid;
+ kal_uint32 u4TotalBits;
+ kal_uint32 u4ErrorBits;
+}UL1D_RF_NSFT_BET_BIT_CNT_FOR_BER_CNF_T;
+
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi[ FDD_MAX_FREQ_LIST ];
+} URfTestResultRSSI;
+
+// R8 both rx path RSSI result
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi_rxd[ FDD_MAX_FREQ_LIST ];
+} URfTestResultRSSIRxD;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_int32 NSFT_RSSI;
+ kal_int32 NSFT_RSSI_RXD;
+ kal_int32 cmd_location;
+}URfTestResultNSFTRSSI;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 inband_pow[ FDD_MAX_FREQ_LIST ];
+} URfTestResultRxGainSweep;
+
+typedef struct
+{
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_int32 tm; /* Cell frame boundary offset to LST */
+ kal_int16 off; /* Cell frame number offset to LST */
+ kal_bool sttd; /* True for STTD used. */
+ kal_uint8 sample_num;
+ kal_int16 rscp_sum;
+ kal_int16 freq_error;
+} URfTest_cpich_result_T;
+
+#define MAX_NUM_MEAS_CELL 32
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_cell;
+ URfTest_cpich_result_T cpich_result[ MAX_NUM_MEAS_CELL ];
+} URfTestResultRSCP;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_cell;
+ URfTest_cpich_result_T cpich_result[ MAX_NUM_MEAS_CELL ];
+} UTSTestResultRSCPV3lp;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc;
+ kal_int32 tm;
+ kal_bool sttd;
+ kal_uint8 rscp_sum;
+ kal_int16 freq_error;
+
+}URfTestResultAFC;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc;
+ kal_int32 tm;
+ kal_bool sttd;
+ kal_uint8 rscp_sum;
+ kal_int16 freq_error;
+}UTSTestResultAFCV3lp;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc;
+ kal_int32 tm;
+ kal_bool sttd;
+ kal_uint8 rscp_sum;
+ kal_int32 freq_error;
+}URfTestResultAFC_Ex;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint32 ber; /* Spec requirement=10^-3. We will count 10^5 frames(100 times spec requirement) for BER calculation. Only count for the only TRCh for DPDCh. */
+} URfTestResultRxDPCh;
+
+typedef struct
+{
+ kal_uint32 m_u4Rfid;
+}URfTestResultRFID;
+
+typedef struct
+{
+ kal_uint8 m_u1Result;
+
+}URfTestResultPwrDtStep;
+
+typedef struct
+{
+ kal_uint16 m_u2Result;
+
+}URfTestResultPwrDtDac;
+
+typedef struct
+{
+ kal_uint8 m_u1Result;
+
+}URfTestResultPwrDtDefaultThr;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_int8 m_i1CurGainTableState;
+
+}URfTestResultReplaceGainTable;
+
+typedef struct
+{
+ kal_uint32 capability;
+ kal_uint32 band_support;
+ kal_uint32 rxd_band_support;
+ kal_uint32 padrift_band_support;
+ kal_uint32 wcdma_dpd_band_support;
+}FT_UMTS_MsCapabilityEx;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 link_status;
+}FT_UMTS_NSFTLinkStatusReport;
+
+typedef struct
+{
+ kal_bool ok; /*<! ok indicator */
+ kal_uint32 sum; /*<! the sum of measure_count times of temp sensor result */
+} URfTestResultGetRfTempSensor;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 link_status;
+} URfNsftListModeCnf;
+
+typedef struct
+{
+ kal_uint16 rf_band_idx;
+ kal_uint16 power_level_num;
+ kal_uint16 code_word_num;
+} URfTestCmdSetMIPICodeWord;
+
+typedef struct
+{
+ kal_uint8 status;
+ kal_uint16 power_level_num;
+ kal_uint16 code_word_num;
+} URfTestResultGetMIPICodeWord;
+
+typedef struct
+{
+ kal_int16 status;
+ kal_int16 tadc_dac;
+ kal_int16 temperature;
+ kal_int16 temp_idx;
+} URfTestResultRfTemperatureInfo;
+
+typedef struct
+{
+ kal_uint32 result; // 1: support 0: not support
+ kal_uint32 query_op_code; // query op code
+}URfCheckIfFuncExist;
+
+typedef enum
+{
+ CNF_SUCCESS = 0,
+ CNF_GENERAL_FAIL = 1,
+ CNF_NVRAM_READ_FAIL = 2,
+ CNF_FREQ_INVALID = 3,
+ CNF_CMD_INVALID = 4,
+ CNF_NVRAM_SET_FAIL = 5,
+ CNF_TX_DATA_CHECK_FAIL = 6,
+ CNF_TX_STRUCTURE_ERROR = 7,
+ CNF_RX_STRUCTURE_ERROR = 8,
+ CNF_TX_VGA_FREQ_CHECK_FAIL=9,
+ CNF_TX_PWR_DT_FREQ_CHECK_FAIL=10,
+ CNF_GET_RXTX_PEER_BUF_OVERFLOW=11, //after 6293
+ CNF_ADDRECORD_FAIL=12, //after 6293
+ CNF_GET_RXTX_PEER_BUF_ZERO=13 //after 6295
+} NVRAM_ACCESS_RESULT_MSG;
+
+/*TX/RX calibration data------------------------------------------------------------------------------------->*/
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 error_check; //for calibration data checking
+ kal_uint8 version_number;
+} URfTestResultCalDataProcess; //after 6292 get/set calibration data (confirm : local parameter)
+/*93 get/set command optimization Cnf-----------------------------*/
+typedef struct
+{
+ kal_bool ok;
+ NVRAM_ACCESS_RESULT_MSG error_check; //for calibration data checking
+ kal_uint8 rxm_result_num; //the number of bands to SET
+ kal_uint8 rxd_result_num;
+ kal_uint8 tx_result_num;
+ NVRAM_ACCESS_RESULT_MSG rxm_result[5]; //result status of SET command for each band
+ NVRAM_ACCESS_RESULT_MSG rxd_result[5];
+ NVRAM_ACCESS_RESULT_MSG tx_result[5];
+} URfTestCmd_SetRxTxCalData_CnfParam_V3; //Local parameter of confirm after 6293 set Rx/Tx cal data command
+
+typedef struct
+{
+ kal_bool ok;
+ NVRAM_ACCESS_RESULT_MSG error_check; //for calibration data checking
+ kal_uint8 rxm_count; //the number of bands to GET
+ kal_uint8 rxd_count;
+ kal_uint8 tx_count;
+ kal_uint8 padding;
+ kal_uint16 rxm_offset; //offset of data in peer buffer
+ kal_uint16 rxd_offset;
+ kal_uint16 tx_offset;
+} URfTestCmd_GetRxTxCalData_CnfParam_V3; //Local parameter of confirm after 6293 get Rx/Tx cal data command
+/*93 get/set command optimization Cnf-----------------------------*/
+typedef struct
+{
+ kal_uint8 version_number;
+ kal_bool is_uplate_to_NVRAM; //to memory or NVRAM
+} URfTestCmdSetCalData ; //after 6292 get/set calibration data (command : local parameter)
+
+typedef struct
+{
+ kal_uint8 version_number;
+} URfTestCmdGetCalData ; //after 6292 get/set calibration data (command : local parameter)
+/*93 get/set command optimization Req--------------------------*/
+typedef struct
+{
+ kal_uint8 rxm_band_num; //the number of bands to GET
+ kal_uint8 rxd_band_num;
+ kal_uint8 tx_band_num;
+ kal_uint8 rxm_band_index[5]; //Band index
+ kal_uint8 rxd_band_index[5];
+ kal_uint8 tx_band_index[5];
+} URfTestCmd_GetRxTxCalData_ReqParam_V3; //Local parameter of request after 6293 get Rx/Tx cal data command
+
+typedef struct
+{
+ kal_bool is_uplate_to_NVRAM; //write to NVRAM or not
+ kal_uint8 rxm_count; //the number of bands to SET
+ kal_uint8 rxd_count;
+ kal_uint8 tx_count;
+ kal_uint16 rxm_offset;
+ kal_uint16 rxd_offset;
+ kal_uint16 tx_offset;
+} URfTestCmd_SetRxTxCalData_ReqParam_V3; //Local parameter of request after 6293 set Rx/Tx cal data command
+/*93 get/set command optimization Req--------------------------*/
+/*TX/RX calibration data<-------------------------------------------------------------------------------------*/
+
+/*RX calibration data------------------------------------------------------------------------------------->*/
+typedef struct
+{
+ kal_uint16 uarfcn;
+ kal_int8 path_loss_HPM[UL1TST_LNA_MODE_NUMBER_EXT];
+ kal_int8 path_loss_LPM[UL1TST_LNA_MODE_NUMBER_EXT];
+} UL1D_RF_LNA_PATHLOSS; //after 6292 LNA pathloss format
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 rxantpath; // 1: main path , 2 : diversity path
+ kal_int8 temper_offset[CAL_TEMP_SECTION];
+ UL1D_RF_LNA_PATHLOSS loss_of_uarfcn[CAL_UARFCN_SECTION];
+} URfTestPathlossItem; //after 6292 get/set RX pathloss (confirm/command : peer buffer)
+/*RX calibration data<-------------------------------------------------------------------------------------*/
+/*RX calibration data----------6293---------------------------------------------------------------------->*/
+#define UTST_NVRAM_SIZE_V3 7
+
+typedef struct
+{
+ kal_uint16 uarfcn;
+ kal_int16 path_loss_HPM[UTST_NVRAM_SIZE_V3];
+ kal_int16 path_loss_LPM[UTST_NVRAM_SIZE_V3];
+} UTST_LNA_PATHLOSS; //after 6293 LNA pathloss format
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 rxantpath; // 1: main path , 2 : diversity path
+ kal_int8 temper_offset[CAL_TEMP_SECTION];
+ UTST_LNA_PATHLOSS loss_of_uarfcn[CAL_UARFCN_SECTION];
+} UTSTPathlossV3; //after 6293 get/set RX pathloss (confirm/command : peer buffer)
+
+/*TX calibration data------------------------------------------------------------------------------------->*/
+typedef struct
+{
+ kal_uint16 start;
+ kal_uint16 end;
+} UL1D_sHYSTERESISDATA;
+
+typedef struct
+{
+ kal_uint16 level_0;
+ kal_uint16 level_1;
+} UL1D_sDC2DC;
+
+typedef struct
+{
+ kal_uint16 max_uarfcn;
+ kal_int16 pwr_offset_dB;
+ kal_int16 pwr_offset_txdac;
+} UL1D_sARFCN_SECTION;
+
+typedef struct
+{
+ kal_uint16 dc2dc_level;
+ kal_uint16 vbias_dac;
+ kal_uint8 vm1;
+ kal_uint8 vm2;
+} UL1D_sPADATA;
+
+typedef struct
+{
+ kal_uint8 pa_mode;
+ kal_int8 prf;
+ kal_uint8 dc2dc_lvl;
+ kal_uint8 vm1;
+ kal_uint8 vm2;
+ kal_uint16 vbias_dac;
+ kal_uint16 pa_gain;
+} UL1D_sPMULEVHANDLE;
+
+typedef struct
+{
+ kal_uint8 octlev_num_section;
+ kal_uint8 reserved_byte;
+ kal_uint32 pa_phase_compensation[3];
+ UL1D_sPMULEVHANDLE pmu_level_handle[8];//8
+ kal_uint16 pa_gain_g12a;
+ kal_uint16 pa_gain_g12b;
+}UL1D_sPAOCTLVLSETTING;
+
+typedef struct
+{
+ UL1D_sPADATA pa_data;
+ kal_uint16 vga_dac[NUMBER_OF_VGA_DAC];
+ UL1D_sARFCN_SECTION vga_comp_by_subband[CAL_UARFCN_SECTION];
+ kal_int16 vga_comp_by_temperature[8][2];
+} UL1D_sTXPOWERDATA;
+
+typedef struct
+{
+ kal_uint8 pwr_dt_thr;
+ kal_uint8 pwr_dt_section;
+ kal_uint16 pwr_dt_dac[CAL_PWR_DETECTOR_SECTION];
+ kal_int16 pwr_dt_value[CAL_PWR_DETECTOR_SECTION];
+ UL1D_sARFCN_SECTION pwr_dt_comp_by_subband[CAL_UARFCN_SECTION];
+ kal_int16 pwr_dt_comp_by_temperature[8][2];
+} UL1D_sPWTDTDATA;
+
+typedef struct
+{
+ UL1D_sDC2DC pa_dc2dc;
+ UL1D_sTXPOWERDATA power_dac[3];
+ UL1D_sHYSTERESISDATA tx_hvsteresis[2];
+ UL1D_sPWTDTDATA pwr_dt_data;
+} UL1D_sRAMPDATA;
+
+typedef struct
+{
+ kal_uint8 band;
+ UL1D_sRAMPDATA txdacData;
+ UL1D_sPAOCTLVLSETTING txPAOCTLevelData;
+} URfTestTXDaTaItem;
+
+/*******************************************************************************
+ * WCDMA DPD common
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_WCDMA_DPD_91 = 0,
+ URF_TEST_WCDMA_DPD_92 = 1,
+ URF_TEST_WCDMA_DPD_93 = 2
+
+}URfTest_Wcdma_Dpd_Generation;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_START_DPD_FAC_CAL_V3
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_START_DPD_INVALID = 0,
+ URF_TEST_START_DPD_OK = 1,
+ URF_TEST_START_DPD_PEER_SIZE_MISMATCH = 2,
+ URF_TEST_START_DPD_EXCEED_TTG_LIMIT_INIT = 3,
+ URF_TEST_START_DPD_EXCEED_TTG_LIMIT = 4,
+ URF_TEST_START_DPD_NEGATIVE_PA_GAIN = 5,
+ URF_TEST_START_DPD_LARGE_PA_GAIN_DIFF = 6
+
+}URfTest_StartDpdFacCal_Status;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+ kal_uint16 cal_band[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_StartDpd_ReqInfo;
+
+typedef struct
+{
+ kal_uint8 status; /* URfTest_StartDpdPaAndDpdFacCal_Status */
+ kal_uint16 curr_band_idx;
+ kal_uint32 curr_subband_idx;
+ kal_uint32 curr_gain_idx;
+ kal_int16 curr_pa_gain;
+
+}URfTestCmd_StartDpd_CnfInfo;
+
+typedef struct
+{
+ kal_uint16 band_idx;
+ kal_uint16 apt_ref_channel;
+ kal_int16 tpc_wanted_p_offset;
+
+}URfTest_AptRefChannel_OneBand;
+
+/* struct for GP tool */
+typedef struct
+{
+ URfTest_AptRefChannel_OneBand wcdma_apt_channel_info[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_StartDpdPaAndDpdFacCal_ReqPdu;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_SET_DPD_FAC_RESULT_V3 and MMRF_TEST_CMD_GET_DPD_FAC_RESULT_V3
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_SET_DPD_INVALID = 0,
+ URF_TEST_SET_DPD_OK = 1,
+ URF_TEST_SET_DPD_PEER_SIZE_MISMATCH = 2,
+ URF_TEST_SET_DPD_INVALID_BAND = 3
+
+}URfTest_SetDpdFacCal_Status;
+
+typedef enum
+{
+ URF_TEST_GET_DPD_INVALID = 0,
+ URF_TEST_GET_DPD_OK = 1,
+ URF_TEST_GET_DPD_INVALID_BAND = 2
+
+}URfTest_GetDpdFacCal_Status;
+
+typedef struct
+{
+ /* Tool can set several band in one set command */
+ kal_uint16 num_of_band;
+
+}URfTestCmd_SetDpdAll_ReqInfo;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+ kal_uint8 status; /* URfTest_SetDpdFacCal_Status */
+
+}URfTestCmd_SetDpdAll_CnfInfo;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+
+}URfTestCmd_SetDpdPartial_ReqInfo;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+ kal_uint8 status; /* URfTest_SetDpdPaAndDpdFacCal_Status */
+
+}URfTestCmd_SetDpdPartial_CnfInfo;
+
+typedef struct
+{
+ kal_uint16 band_idx;
+ kal_uint8 dpd_cal_done;
+ kal_int16 dpd_tr[CAL_UARFCN_SECTION];
+
+ /* ramp */
+ kal_int16 vga_comp_subband[UL1D_DPD_MAX_PA_MODE_NUM][CAL_UARFCN_SECTION];
+ kal_int16 vga_comp_temperature[UL1D_DPD_MAX_PA_MODE_NUM][UL1_DPD_MAX_PA_LEVEL_NUM];
+ UL1D_sHYSTERESISDATA tx_hysteresis[UL1D_DPD_MAX_PA_HYST_NUM];
+
+ /* paoct */
+ kal_uint8 octlev_num_section;
+ kal_uint32 pa_phase_compensation[UL1D_DPD_MAX_PA_MODE_NUM];
+ UL1D_sPMULEVHANDLE pmu_level_handle[UL1_DPD_MAX_PA_LEVEL_NUM];
+
+}URfTest_SetGetDpd_TpcPeer;
+
+typedef struct
+{
+ kal_uint8 lut[UL1_DPD_MAX_AM_LUT_GAIN_NUM][MMDPD_MAX_AM_LUT_PWR_NUM];
+
+}URfTest_DPDAMLutSubBand;
+
+typedef struct
+{
+ kal_int8 lut[UL1_DPD_MAX_PM_LUT_GAIN_NUM][MMDPD_MAX_PM_LUT_PWR_NUM];
+
+}URfTest_DPDPMLutSubBand;
+
+typedef struct
+{
+ kal_int16 dpdImplicitArray[UL1_DPD_MAX_IMPLICIT_NUM]; /* For the parameters whose name will not be shown in cal file */
+ URfTest_DPDAMLutSubBand am_lut_subband[CAL_UARFCN_SECTION];
+ URfTest_DPDPMLutSubBand pm_lut_subband[CAL_UARFCN_SECTION];
+
+}URfTest_SetGetDpd_DpdPeer;
+
+typedef struct
+{
+ URfTest_SetGetDpd_TpcPeer dpdtpc_peer;
+ URfTest_SetGetDpd_DpdPeer dpd_peer;
+
+}URfTestCmd_SetDpdFacCalAll_OneBand, URfTestCmd_GetDpdFacCalAll_OneBand;
+
+typedef struct
+{
+ URfTest_SetGetDpd_TpcPeer dpdtpc_peer;
+
+}URfTestCmd_SetDpdFacCalPartial_OneBand;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+ kal_uint16 band_idx[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_GetDpdAll_ReqInfo;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+ kal_uint8 get_status; /* URfTest_GetDpdPaAndDpdFacCal_Status */
+
+}URfTestCmd_GetDpdAll_CnfInfo;
+
+/* struct for GP tool */
+typedef struct
+{
+ URfTestCmd_GetDpdFacCalAll_OneBand get_peer[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_GetDpdFacCalAll_CnfPdu;
+
+typedef struct
+{
+ URfTestCmd_SetDpdFacCalAll_OneBand set_all_peer[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_SetDpdFacCalAll_ReqPdu;
+
+typedef struct
+{
+ URfTestCmd_SetDpdFacCalPartial_OneBand set_partial_peer[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_SetDpdFacCalPartial_ReqPdu;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_SET_DPD_PATH_DELAY_SEARCH_V3
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_SET_DPD_DELAY_INVALID = 0,
+ URF_TEST_SET_DPD_DELAY_VALID = 1,
+ URF_TEST_SET_DPD_DELAY_PEER_SIZE_MISMATCH = 2
+
+}URfTest_SetDpdPathDelaySearchV3_Status;
+
+typedef struct
+{
+ /* Tool can set several band in one set command */
+ kal_uint16 band_num;
+
+}URfTestCmd_SetDpdPathDelaySearchV3_ReqInfo;
+
+typedef struct
+{
+ kal_uint16 rf_band;
+ kal_uint16 subband_freq[CAL_UARFCN_SECTION];
+ kal_int16 dpd_tr[CAL_UARFCN_SECTION];
+
+}URfTest_SetDpdPathDelaySearchV3_ReqPeer_OneBand;
+
+/* struct for GP tool */
+typedef struct
+{
+ URfTest_SetDpdPathDelaySearchV3_ReqPeer_OneBand dpd_one_band[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_SetDpdPathDelaySearchV3_ReqPdu;
+
+/* Confirm */
+typedef struct
+{
+ kal_uint16 band_num;
+ kal_uint16 status;
+
+}URfTestCmd_SetDpdPathDelaySearchV3_CnfInfo;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_START_DPD_PATH_DELAY_SEARCH_V3
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_START_DPD_DELAY_INVALID = 0,
+ URF_TEST_START_DPD_DELAY_VALID = 1,
+ URF_TEST_START_DPD_DELAY_TIMEOUT = 2,
+ URF_TEST_START_DPD_DELAY_SEARCH_FAILED = 3
+}URfTest_StartDpdPathDelaySearchV3_Status;
+
+/* Request */
+typedef struct
+{
+ kal_uint16 test_times;
+ kal_uint16 search_band[MAX_SUPPORTED_BAND_INDEX];
+}URfTestCmd_StartDpdPathDelaySearchV3_ReqInfo;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_GET_DPD_PATH_DELAY_SEARCH_V3
+ ******************************************************************************/
+
+/* Request */
+typedef struct
+{
+ kal_uint16 band_num;
+ kal_uint16 rf_band_info[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_GetDpdPathDelaySearchV3_ReqInfo;
+
+
+/* Confirm */
+
+typedef enum
+{
+ URF_TEST_GET_DPD_DELAY_INVALID = 0,
+ URF_TEST_GET_DPD_DELAY_VALID = 1
+
+}URfTest_GetDpdPathDelaySearchV3_Status;
+
+typedef struct
+{
+ kal_uint16 band_num;
+ kal_uint16 get_status; /* URfTest_GetDpdPathDelaySearchV3_Status */
+
+}URfTestCmd_GetDpdPathDelaySearchV3_CnfInfo;
+
+typedef struct
+{
+ kal_uint16 rf_band;
+ kal_int16 dpd_tr[CAL_UARFCN_SECTION];
+
+}URfTest_GetDpdPathDelaySearchV3_CnfPeer_OneBand;
+
+/* struct for GP tool */
+typedef struct
+{
+ URfTest_GetDpdPathDelaySearchV3_CnfPeer_OneBand dpd_delay_one_band[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_GetDpdPathDelaySearchV3_CnfPdu;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_SET_DPD_FAC_RESULT_V3 and MMRF_TEST_CMD_GET_DPD_FAC_RESULT_V3
+ ******************************************************************************/
+/* Reuqest */
+typedef enum
+{
+ URF_TEST_TRAD_CAL_EXE_INVALID = 0,
+ URF_TEST_TRAD_CAL_EXE_START = 1,
+ URF_TEST_TRAD_CAL_EXE_END = 2
+
+}URfTest_TradCal_Exe_Status;
+
+typedef struct
+{
+ kal_uint32 exe_status; /* URfTest_TradCal_Exe_Status */
+
+}URfTestCmd_TradCal_ReqInfo;
+
+/* Confirm */
+typedef enum
+{
+ URF_TEST_TRAD_CAL_CMD_INVALID = 0,
+ URF_TEST_TRAD_CAL_CMD_OK = 1
+
+}URfTest_TradCal_Cmd_Status;
+
+typedef struct
+{
+ kal_uint32 cmd_status; /* URfTest_TradCal_Cmd_Status */
+
+}URfTestCmd_TradCal_CnfInfo;
+
+/******************************************************************************/
+/*TX calibration data<-------------------------------------------------------------------------------------*/
+
+typedef enum
+{
+ SETUP_FAIL_GENERAL = 0,
+ SETUP_FAIL_TCM_MISMATCH = 1,
+ SETUP_FAIL_TDD_TIMER_STILL_RUNNING = 2,
+} UBIN_MODE_SETUP_FAIL_MSG;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_int8 setup_result;
+} URfTestResultUbinModeSetup;
+
+/************************************************************************/
+/* New FHC Command when introduce eLNA */
+/* URF_TEST_CMD_FHC_ELNA */
+/************************************************************************/
+typedef struct
+{
+ kal_bool no_loop_ctrl;
+ kal_uint16 afc_dac;
+ kal_bool pwr_det;
+ kal_uint8 power_ctrl_mode;
+ kal_uint8 vm1[10][3];
+ kal_uint8 vm2[10][3];
+ kal_uint16 dc2dc_dac[10][3];
+ kal_uint16 vbias_dac[10][3];
+ kal_uint8 temperature;
+ kal_bool hwAGC;
+ kal_uint8 step_duration;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 pa_gain_start_idx;
+ kal_uint8 pd_gain_start_idx;
+ kal_uint8 lna_gain_start_idx;
+ kal_uint8 dl_band[40];
+ kal_uint8 ul_band[40];
+ kal_uint16 dl_freq[40];
+ kal_uint16 ul_freq[40];
+ kal_uint8 pd_gain[40];
+ kal_uint8 pa_mode[40];
+ kal_uint16 vga_dac_tpc_idx[40];
+ kal_uint16 pa_gain[40];
+ kal_uint8 pa_section[40];
+ kal_uint16 rx_lna_gain[40];
+ kal_uint16 rxd_lna_gain[40];
+ kal_uint8 fix_pga_gain[40];
+ kal_uint8 is_lpm[40];
+}URfTestCmdFHCeLNAPB;
+
+typedef struct
+{
+ kal_bool ok;
+} URfTestResultFHCeLNALP;
+/*---------------------------------------------------------------------*/
+
+/***********************************************************************/
+/* New RSSI Command when introduce eLNA */
+/* URF_TEST_CMD_GET_RSSI_ELNA */
+/***********************************************************************/
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_uint16 dl_freq[36];
+ kal_uint8 temperature;
+ kal_bool hwAGC;
+ kal_uint8 mode;
+ kal_int16 rx_gain;
+ kal_uint8 rx_LNAmode;
+ kal_uint16 rx_pga;
+ kal_int16 rxd_gain;
+ kal_uint8 rxd_LNAmode;
+ kal_uint16 rxd_pga;
+ kal_uint8 antenna_path;
+ kal_bool is_cal;
+ kal_uint8 lpm_mode;
+}URfTestCmdRSSIeLNAPB;
+
+typedef struct
+{
+ kal_bool ok;
+} URfTestResultRSSIeLNALP;
+
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_uint16 dl_freq[36];
+ kal_int32 rx_rssi[36];
+ kal_int32 rxd_rssi[36];
+ kal_uint8 rx_LNAmode[36];
+ kal_uint8 rxd_LNAmode[36];
+}URfTestResultRSSIeLNAPB;
+/*---------------------------------------------------------------------*/
+/***********************************************************************/
+/* TX SUPPORT Command FIX RF PGA GAIN */
+/* URF_TEST_CMD_TX_DPCH_FIX_PGA_GAIN */
+/***********************************************************************/
+typedef enum
+{
+ UL1TST_NO_PGA_ABILITY = 0,
+ UL1TST_FIX_PGA_GAIN_12B = 1,
+ UL1TST_FIX_PGA_GAIN_12A = 2,
+ UL1TST_PGA_ALGO_ENABLE = 3,
+ UL1TST_PGA_FEATURE_DEFAULT_STATE = UL1TST_PGA_ALGO_ENABLE
+}UL1TST_FIX_PGA_GAIN_T;
+
+typedef struct
+{
+ UL1TST_FIX_PGA_GAIN_T ul1tst_fix_pga_gain;
+/*
+ 0 : no need fix
+ 1 : fix PGA 12A
+ 2 : fix PGA 12B
+ */
+}URfTestCmdDPCHTXFIXPGAPB;
+
+typedef struct
+{
+ kal_bool ok;
+}URfTestResultDPCHTXFIXPGALP;
+/*------------------------------6293 Get FHC Information from TST---------------------------------------*/
+#define UL1TST_HPM_POINT_V3 7
+#define UL1TST_LPM_POINT_V3 4
+#define UL1TST_WCDMA_BAND_SUPPORT 5
+
+typedef struct
+{
+ kal_uint8 calibration_band_number;
+ kal_uint8 calibration_band[UL1TST_WCDMA_BAND_SUPPORT]; // band 1 : band index = 0
+} UTSTReqGetCalInfoV3lp; // request local parameter
+
+typedef enum
+{
+ UTST_ELNA_OFF=0,
+ UTST_ELNA_ALWAYS_ON,
+ UTST_ELNA_ALWAYS_ON_2ND_SAW,
+ UTST_ELNA_BYPASS,
+ UTST_ELNA_BYPASS_2ND_SAW
+}UTST_ELNA_E;
+
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 rx_elna_mode;
+ kal_uint8 rxd_elna_mode;
+ kal_uint8 cal_point_hpm;
+ kal_uint8 cal_point_lpm;
+ kal_uint8 rx_cal_sequency[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3];
+ kal_uint8 rx_elna_bypass[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3];
+ kal_uint8 rxd_elna_bypass[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3];
+ kal_int16 rx_cal_dl_power_min[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3]; //s.5
+ kal_int16 rx_cal_dl_power_max[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3]; //s.5
+ kal_int16 rx_cal_dl_power[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3]; //s.5
+}UTSTCnfGetCalInfoV3pb; //band unit : dynamic size
+typedef struct
+{
+ kal_uint8 support_band_number;
+}UTSTCnfGetCalInfoV3lp; // conform local parameter
+
+/*------------------------------6293 START FHC---------------------------------------*/
+#define UL1TST_FHC_FREQUENCY_NUMBER 15
+
+typedef struct
+{
+ kal_uint8 ok;
+ kal_uint8 error_code;
+}UTSTCnfFHCeLNAV3lp;
+
+typedef struct
+{
+ kal_uint8 cal_band_number;
+ kal_uint8 cal_band[UL1TST_WCDMA_BAND_SUPPORT];
+ kal_uint8 antenna_setting;
+ kal_uint8 step_duration;
+}UTSTReqFHCeLNAV3lp;
+
+typedef struct
+{
+/*common*/
+ kal_uint8 band;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 hpm_cal_point;
+ kal_uint8 lpm_cal_point;
+/*RX*/
+ kal_uint8 rx_elna_mode;
+ kal_uint8 rxd_elna_mode;
+ kal_uint8 is_lpm[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+ kal_uint8 rx_elna_bypass[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+ kal_uint8 rxd_elna_bypass[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+ kal_uint8 rx_cal_sequency[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+/*TX*/
+ kal_uint8 fix_pga_gain[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+ kal_uint8 pa_mode[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+ kal_uint8 vga_dac_tpc_idx[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+ kal_uint8 pa_section[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+ kal_uint16 pa_gain[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+/*RX*/
+ kal_int16 rx_cal_dl_power[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+/*UARFCN*/
+ kal_uint16 dl_uarfcn[UL1TST_FHC_FREQUENCY_NUMBER];
+ kal_uint16 ul_uarfcn[UL1TST_FHC_FREQUENCY_NUMBER];
+/*Initial file data*/
+ URfTestTXDaTaItem tx_cal_data_info;
+ UTSTPathlossV3 rx_cal_data_info;
+ UTSTPathlossV3 rxd_cal_data_info;
+}UTSTReqFHCeLNAV3pb; //band unit it depends on local parameter cal band number expend to array
+
+/*------------------------------6293 GET FHC RESULT----------------------------------------*/
+typedef struct
+{
+ kal_uint16 ul_uarfcn;
+ kal_int16 pd_value_h;
+ kal_int16 pd_value_m;
+ kal_int16 pd_value_l;
+} UL1TST_FHC_PD_RESULT_INFO ;
+
+typedef struct
+{
+ kal_uint16 dl_uarfcn;
+ kal_int16 hpm_rssi[UL1TST_HPM_POINT_V3];
+ kal_int16 lpm_rssi[UL1TST_LPM_POINT_V3];
+} UL1TST_FHC_PATHLOSS_RESULT_INFO ;
+
+typedef struct
+{
+ kal_uint8 band;
+ UL1TST_FHC_PD_RESULT_INFO pd_result[UL1TST_FHC_FREQUENCY_NUMBER];
+ UL1TST_FHC_PATHLOSS_RESULT_INFO rx_rssi_result[UL1TST_FHC_FREQUENCY_NUMBER];
+ UL1TST_FHC_PATHLOSS_RESULT_INFO rxd_rssi_result[UL1TST_FHC_FREQUENCY_NUMBER];
+} UTSTCnfGetFHCResultV3pb ; //band unit
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 band_number; // indicate how many band's report in peer buffer
+} UTSTCnfGetFHCResultV3lp;
+/*for 93-95 co-file , "Gen":stand for any generation*/
+typedef UTSTCnfGetFHCResultV3pb UTSTCnfGetFHCResultGenpb;
+/*-----------------------------6293 GET RSSI-----------------------------------------*/
+typedef struct
+{
+ kal_bool hwAGC;
+ kal_bool rx_elna_bypass;
+ kal_bool rxd_elna_bypass;
+ kal_bool conti_rssi;
+ kal_uint8 rx_elna_mode;
+ kal_uint8 rxd_elna_mode;
+ kal_uint8 temperature;
+ kal_uint8 antenna_path;
+ kal_uint8 lpm_mode;
+ kal_uint16 uarfcn;
+ kal_uint16 rx_rf_gain;
+ kal_uint16 rxd_rf_gain;
+ kal_uint16 rx_digital_gain;
+ kal_uint16 rxd_digital_gain;
+} UTSTReqGetRSSIV3lp;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 rx_elna_bypass;
+ kal_uint8 rxd_elna_bypass;
+ kal_uint8 rx_lna_mode;
+ kal_uint8 rxd_lna_mode;
+ kal_uint16 uarfcn;
+ kal_int16 rx_rssi;
+ kal_int16 rxd_rssi;
+ kal_uint16 rx_used_gain;
+ kal_uint16 rxd_used_gain;
+} UTSTCnfGetRSSIV3lp;
+/*for 93-95 co-file , "Gen":stand for any generation*/
+typedef UTSTCnfGetRSSIV3lp UTSTCnfGetRSSIGenlp;
+/*-----------------------------6293 power to gain-----------------------------------------*/
+typedef struct
+{
+ kal_bool rx_elna_bypass;
+ kal_bool rxd_elna_bypass;
+ kal_uint8 antenna_path;
+ kal_uint8 lpm_mode;
+ kal_uint8 rx_elna_mode;
+ kal_uint8 rxd_elna_mode;
+ kal_uint8 rx_cal_sequency;
+ kal_int16 rx_dl_power;
+} UTSTReqPwrtoGainV3lp;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 rx_digital_gain;
+ kal_uint16 rxd_digital_gain;
+ kal_uint16 rx_rf_gain;
+ kal_uint16 rxd_rf_gain;
+}UTSTCnfPwrtoGainV3lp;
+
+/*-----------------------------6293 lna to gain-----------------------------------------*/
+typedef struct
+{
+ kal_bool rx_elna_bypass;
+ kal_bool rxd_elna_bypass;
+ kal_uint8 band;
+ kal_uint8 antenna_path;
+ kal_uint8 lpm_mode;
+ kal_uint8 rx_lna_mode;
+ kal_uint8 rxd_lna_mode;
+ kal_uint8 rx_elna_mode;
+ kal_uint8 rxd_elna_mode;
+} UTSTReqLnatoGainV3lp;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 rx_digital_gain;
+ kal_uint16 rxd_digital_gain;
+ kal_uint16 rx_rf_gain;
+ kal_uint16 rxd_rf_gain;
+ kal_int16 dl_power;
+}UTSTCnfLnatoGainV3lp;
+
+/*----------------------------------------------------------------------*/
+/*-----------------------------6293 PGA AB CAL-----------------------------------------*/
+typedef struct
+{
+ UL1TST_FIX_PGA_GAIN_T ul1tst_fix_pga_gain;
+ kal_bool is_calibration;
+}UTSTCmdLPCal;
+
+typedef struct
+{
+ kal_bool ok;
+}UTSTResultLPCal;
+
+/*----------------------------------------------------------------------*/
+/*-----------------------------6293 ATE tool T-put-----------------------------------------*/
+//trigger IQ dump
+typedef struct
+{
+ kal_uint16 enable_iq_dump; //enable or disable IQ dump mode.
+ kal_uint16 ant_idx; //0=RX main antenna, 1=RX diversity antenna.
+}UTSTReqTriggerIqDumpModeV3lp; // request local parameter
+
+typedef struct
+{
+ kal_uint16 dump_status; //1=enable IQ dump mode successfully
+}UTSTCnfTriggerIqDumpModeV3lp; // conform local parameter
+
+//get IQ dump result
+typedef struct
+{
+ kal_uint16 is_data_ready; //1=IQ raw data is ready
+ kal_uint16 data_section_length; //length of IQ raw data in corresponding peer buffer
+}UTSTCnfGetIqDumpResultV3lp; // confirm local parameter
+
+typedef struct
+{
+ kal_int16 i_data;
+ kal_int16 q_data;
+}UTSTCnfGetIqDumpResultV3pb;// confirm peer buffer :RFEQ unit
+//set RFEQ
+typedef struct
+{
+ kal_uint16 rfeq_set_num; //number of subband RFEQ to update
+}UTSTReqSetRfeqSubbandV3lp; // request local parameter
+
+typedef struct
+{
+ kal_uint16 band; //UMTS band
+ kal_uint16 subband_idx; //which sub-band that user want to fill
+ kal_uint16 max_uarfcn; //max uarfcn of this subband
+ kal_uint8 ant_idx; //which antenna should be write in this command. 0: RX Main, 1:RX Div
+ kal_bool rfeq_enable; //RFEQ enable or not.
+ kal_int16 rfeq_coef_real[7]; //RFEQ real part coefficient. 7 taps.
+ kal_int16 rfeq_coef_imag[7]; //RFEQ image part coefficient. 7 taps.
+}UTSTReqSetRfeqSubbandV3pb; // request peer buffer : subband unit
+
+typedef struct
+{
+ kal_uint16 is_rfeq_set; //1=RFEQ is set to NVRAM successfully
+}UTSTCnfSetRfeqSubbandV3lp; // confirm local parameter
+
+
+/*----------------------------------------------------------------------*/
+
+typedef struct
+{
+ URfTestCmdType urf_test_cmd_type;
+ void (*handler)( ilm_struct* );
+}UL1TST_RF_TEST_HANDLER_T;
+/* ------------------------------------------------------------------------------------------- *\
+|* U_RESET_BIT_COUNT *|
+\* ------------------------------------------------------------------------------------------- */
+
+typedef struct
+{
+ kal_uint32 meaningless;
+} URFTestCmdResetBERResult;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint32 u4TotalBits;
+ kal_uint32 u4ErrorBits;
+} URFTestResultResetBERResult;
+/*---------------------------------------------------------------------------------------------*/
+typedef union
+{
+ kal_uint8 m_u1RfBand;
+ kal_uint8 m_u1PwrCtrlMode;
+ kal_uint8 m_u1TableType; // 1: special table for calibration, 2: normal table
+ kal_uint8 m_u1ILPCStep;
+ kal_uint16 m_u2TxPclIndex;
+ kal_uint16 rf_band_idx;
+/* PA drift compensation */
+ kal_uint8 is_PaDrift; /*R8< \brief the parameter to UL1 for PA drift compensation setting (1: turn on, 0: turn off) */
+/* R8 RF tool */
+ kal_uint8 is_5mhz;
+ kal_uint8 is_main;
+ kal_uint32 m_rBSIData;
+ kal_uint32 m_rBSIAddr;
+/* DCXO development */
+ kal_uint32 m_u4CapId;
+/* WM Switch */
+ kal_uint8 ubin_fdd_mode_init; // 1 : UBIN mode Init 3G FDD , 0 : UBIN mode de-init 3G FDD
+ URfTestCmdAFC afc;
+ URfTestCmdRSCP rscp;
+ URfTestCmdType query_op_code;
+ URfTestCmdTxDPCh txdpch;
+ URfTestCmdRxDPCh rxdpch;
+ URfTestCmdTxAccess txaccess;
+ URFTestCmdReloadNVRAM reload;
+ URfTestCmdSetMIPICodeWord set_mipi_cw_param;
+ URfTestCmdGetRfTempSensor rfTemperature;
+ UL1D_RF_TX_PA_APC_REQ_T m_rTxPaApc;
+ UL1D_RF_GET_PWR_THR_REQ_T m_rGetPwrThr;
+ kal_int32 m_i4IcsCellPower; /**< \brief pass cell power to UL1 to choose the best initial gain for ICS */
+ URFTestCmdResetBERResult resetBERResult;
+ URfTestCmdSetCalData set_cal_data_command_lp; //after 6292
+ URfTestCmdGetCalData get_cal_data_command_lp; //after 6292
+ UTSTReqGetCalInfoV3lp get_cal_info_v3_lp; //6293 get FHC infomation from RFD & FEC
+ UTSTReqFHCeLNAV3lp fhc_control_v3_lp; //6293 FHC flow control infomation
+ UTSTReqGetRSSIV3lp get_rssi_v3_lp; //6293 RF tool RSSI
+ UTSTReqPwrtoGainV3lp pwr_to_gain_v3_lp; //6293 Tradk, NSFT
+ UTSTReqLnatoGainV3lp lna_to_gain_v3_lp; //6293 RF tool get RSSI calculator
+ URfTestCmd_SetRxTxCalData_ReqParam_V3 set_RxTx_cal_data_command_lp; //after6293
+ URfTestCmd_GetRxTxCalData_ReqParam_V3 get_RxTx_cal_data_command_lp; //after6293
+ UTSTCmdRSCPV3lp rscp_v3_lp;
+ UTSTCmdAFCV3lp afc_v3_lp;
+ UTSTCmdLPCal pga_type_v3_lp;
+ UTSTReqTriggerIqDumpModeV3lp trigger_iq_dump_v3_lp; //Trigger IQ dump
+ UTSTReqSetRfeqSubbandV3lp set_rfeq_subband_v3_lp; //Set RFEQ subband result
+}URfTestCmdParam;
+
+typedef union
+{
+ kal_bool ok;
+ kal_uint8 nvramAccessResult;
+ kal_uint8 currentLnaMode;
+ kal_int16 m_u2PwrDetResult;
+ kal_uint32 bsi_data;
+ kal_uint32 m_u4MaxCapId;
+ FT_UMTS_MsCapabilityEx m_rTargetCapability;
+ FT_UMTS_NSFTLinkStatusReport m_rNSFTLinkStatusReport;
+ URfNsftListModeCnf m_rNSFTListModeLinkStatusReport;
+ UL1D_RF_NSFT_BET_BIT_CNT_FOR_BER_CNF_T m_rNSFTBERResult;
+ URfTestResultAFC afc;
+ URfTestResultRFID rfid;
+ URfCheckIfFuncExist CheckIfFuncExist;
+ URfTestResultAFC_Ex afc_ex;
+ URfTestResultRxDPCh rx_dpch;
+ URfTestResultPwrDtDac pwr_dt_dac;
+ URfTestResultPwrDtStep pwr_dt_step;
+ URfTestResultGetRfTempSensor rfTemperature;
+ URfTestResultGetMIPICodeWord get_mipi_cw_param;
+ URfTestResultPwrDtDefaultThr pwr_dt_default_thr;
+ URfTestResultReplaceGainTable replace_gain_table;
+ URfTestResultRfTemperatureInfo rfTemperatureInfo;
+ URfTestResultUbinModeSetup ubin_mode_setup_result;
+ URfTestResultNSFTRSSI ft_rpt_nsft_rssi; /*for getting RSSI value during NSFT*/
+ URFTestResultResetBERResult resetBERResult;
+ URfTestResultCalDataProcess cal_data_process_result_lp; //after 6292
+ URfTestResultDPCHTXFIXPGALP dpch_tx_fix_pga_gain_lp;
+ URfTestResultFHCeLNALP fhc_elna_result_lp;
+ URfTestResultRSSIeLNALP rssi_elna;
+ UTSTCnfGetCalInfoV3lp cnf_get_cal_info_v3_lp; //6293 get calibration information
+ UTSTCnfFHCeLNAV3lp cnf_fhc_control_v3_lp; //6293 FHC flow control infomation
+ UTSTCnfGetFHCResultV3lp cnf_fhc_report_v3_lp; //6293 fhc report
+ UTSTCnfGetRSSIV3lp cnf_get_rssi_v3_lp; //6293 RF tool RSSI
+ UTSTCnfPwrtoGainV3lp cnf_pwr_to_gain_v3_lp; //6293 Tradk, NSFT
+ UTSTCnfLnatoGainV3lp cnf_lna_to_gain_v3_lp; //6293 RF tool get RSSI calculator
+ URfTestCmd_SetRxTxCalData_CnfParam_V3 set_RxTx_cal_data_process_result_lp; //after 6293
+ URfTestCmd_GetRxTxCalData_CnfParam_V3 get_RxTx_cal_data_process_result_lp; //after 6293
+ UTSTResultLPCal cnf_pga_type_v3_lp;
+ UTSTCnfTriggerIqDumpModeV3lp cnf_trigger_iq_dump_v3_lp; //Trigger IQ dump
+ UTSTCnfGetIqDumpResultV3lp cnf_get_iq_data_v3_lp; //Get IQ dump result
+ UTSTCnfSetRfeqSubbandV3lp cnf_set_rfeq_subband_v3_lp; //Set RFEQ subband result
+} URfTestResultParam;
+
+typedef struct
+{
+ FT_HDR
+ URfTestCmdType type;
+ URfTestCmdParam param;
+} ft_urf_test_req_T;
+
+typedef struct
+{
+ FT_HDR
+ URfTestCmdType type;
+ URfTestResultParam param;
+} ft_urf_test_cnf_T;
+
+typedef ft_urf_test_req_T ft_to_ul1tst_struct;
+typedef ft_urf_test_cnf_T ul1tst_to_ft_struct;
+
+typedef ft_urf_test_req_T ft_urf_test_req_id_struct;
+typedef ft_urf_test_cnf_T ft_urf_test_cnf_id_struct;
+
+#endif // #if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__)
+
+#endif // #ifndef __FT_MSG_UL1RF_H__
diff --git a/mcu/interface/middleware/meta/ft_msg_ul1rf_gen95.h b/mcu/interface/middleware/meta/ft_msg_ul1rf_gen95.h
new file mode 100644
index 0000000..7919bd4
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_msg_ul1rf_gen95.h
@@ -0,0 +1,2348 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg_ul1rf.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * Messages definition of UL1 RF category of FT Library
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
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+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#ifndef __FT_MSG_UL1RF_H__
+#define __FT_MSG_UL1RF_H__
+#include "ft_msg_common.h"
+#include "ul1d_rf_public.h"
+
+#include "kal_public_defs.h"
+
+
+#define UL1TST_LNA_MODE_NUMBER_EXT 6
+
+#define UL1_DPD_FDB_NUM (CAL_UARFCN_SECTION * UL1_DPD_MAX_PA_LEVEL_NUM) /* refer to f_db in U_sDPD_COMMON_CAL */
+#define UL1_DPD_MAX_PTAR_TH_NUM (CAL_UARFCN_SECTION * UL1_DPD_MAX_PA_LEVEL_NUM) /* refer to pa_idx_th in U_sDPD_COMMON_CAL */
+#define UL1_DPD_MAX_IMPLICIT_RSV_NUM 0
+#define UL1_DPD_MAX_IMPLICIT_NUM (UL1_DPD_FDB_NUM + UL1_DPD_MAX_PTAR_TH_NUM + UL1_DPD_MAX_IMPLICIT_RSV_NUM)
+#define UL1_DPD_MAX_SET_ALL_DATA_NUM (7) /* floor(MMRF_MAX_TOOL_PEER_SIZE_PER_CMD / sizeof(URfTestCmd_SetDpdPaAndDpdFacCalAll_OneBand)) */
+#define UL1_DPD_MAX_GET_ALL_DATA_NUM (UL1_DPD_MAX_SET_ALL_DATA_NUM)
+#define UL1_DPD_MAX_SET_PARTIAL_DATA_NUM (239) /* floor(MMRF_MAX_TOOL_PEER_SIZE_PER_CMD / sizeof(URfTestCmd_SetDpdPaAndDpdFacCalPartial_OneBand)) */
+
+/*******************************************************************************
+*
+* Message structures defined for UL1 TST Interface
+*
+*******************************************************************************/
+#if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__)
+
+//type1: communicate with ul1tst module, and send the confirm without waiting!
+//type2: communicate with u1ltst module, and wait their confirm, then send back to PC
+//type3: invoke UL1D's API, then send confirm to PC side.
+//type4: no operation, only get FT task's current status, and reply to PC side
+
+typedef enum
+{
+ URF_TEST_CMD_TXACCESS = 0,
+ URF_TEST_CMD_STOP = 1,
+ URF_TEST_CMD_TX_DPCH = 2,
+ URF_TEST_CMD_RX_DPCH = 3,
+ URF_TEST_CMD_RSSI = 4,
+ URF_TEST_CMD_RSCP = 5,
+ URF_TEST_CMD_AFC = 6,
+ URF_TEST_CMD_TX_PAAPC = 7,
+ URF_TEST_CMD_GET_RFID = 8,
+ URF_TEST_CMD_CONFIG_HWTPC = 9,
+ URF_TEST_CMD_GET_PWR_DT_STEP = 10,
+ URF_TEST_CMD_GET_PWR_DT_DAC = 11,
+ URF_TEST_CMD_GET_PWR_DT_DEFAULT_THR = 12,
+ URF_TEST_CMD_SET_IMMEDIATE_BSI = 13,
+ URF_TEST_CMD_GET_IMMEDIATE_BSI = 14,
+ URF_TEST_CMD_CONTINUOUS_RX = 15,
+ URF_TEST_CMD_START_FHC = 16,
+ URF_TEST_CMD_SET_TXDAC_DATA = 17,
+ URF_TEST_CMD_GET_PWR_DET_MEASURE_RES = 18,
+ URF_TEST_CMD_SET_PWR_CTRL_MODE = 19,
+ URF_TEST_CMD_REPLACE_GAIN_TABLE_FOR_CAL = 20,
+ URF_TEST_CMD_START_FHC_NO_WAIT = 21,
+ URF_TEST_CMD_GET_FHC_RESULT = 22,
+ URF_TEST_CMD_QUERY_TARGET_CAPABILITY = 23,
+ URF_TEST_CMD_START_NSFT = 24,
+ URF_TEST_CMD_GET_BIT_COUNT_FOR_SINGLE_ENDED_BER = 25,
+ URF_TEST_CMD_NSFT_SET_ILPC_STEP = 26,
+ URF_TEST_CMD_START_NSFT_EX = 27,
+ URF_TEST_CMD_SET_PA_OCT_LEVEL_DATA = 28,
+ URF_TEST_CMD_START_HSDPA_NSFT = 29,
+ URF_TEST_CMD_START_HSUPA_NSFT = 30,
+ URF_TEST_CMD_START_FHC_EX = 31,
+ URF_TEST_CMD_GET_FHC_EX_RESULT = 32,
+ URF_TEST_CMD_GET_CURRENT_LNA_MODE = 33,
+ URF_TEST_CMD_SET_CAPID = 34,
+ URF_TEST_CMD_GET_MAX_CAPID = 35,
+ URF_TEST_CMD_AFC_EX = 36,
+ URF_TEST_CMD_RSSI_RXD = 37,
+ URF_TEST_CMD_GET_CURRENT_RXD_LNA_MODE = 38,
+ URF_TEST_CMD_SET_RX_BANDWIDTH = 39,
+ URF_TEST_CMD_SET_RX_ANTENNA = 40,
+ URF_TEST_CMD_SET_TX_PA_DRIFT_COMPENSATION = 41,
+ URF_TEST_CMD_SET_ICS_CELL_POWER = 42,
+ URF_TEST_CMD_GET_RF_TEMP_BSI = 43,
+ URF_TEST_CMD_GET_RF_CAPABILITY = 44,
+ URF_TEST_CMD_START_NSFT_LIST_MODE = 45,
+ URF_TEST_CMD_SET_RF_MIPI_CODEWORD = 46,
+ URF_TEST_CMD_GET_RF_MIPI_CODEWORD = 47,
+ URF_TEST_CMD_GET_TEMPERATURE_INFO = 48,
+ URF_TEST_CMD_RX_GAIN_SWEEP = 49,
+ URF_TEST_CMD_RELOAD_NVRAM = 50,
+ URF_TEST_CMD_CHECK_IF_FUNC_EXIST = 51,
+ URF_TEST_CMD_UBIN_MODE_SETUP = 52,
+ URF_TEST_CMD_SET_RX_PATH_LOSS = 53,
+ URF_TEST_CMD_GET_RX_PATH_LOSS = 54,
+ URF_TEST_CMD_RSSI_LPM = 55,
+ URF_TEST_CMD_RSSI_RXD_LPM = 56,
+ URF_TEST_CMD_CONTINUOUS_RX_LPM = 57,
+ URF_TEST_CMD_NSFT_GET_RSSI = 58,
+ URF_TEST_CMD_SET_RX_CALIBRATION_DATA = 59,
+ URF_TEST_CMD_GET_RX_CALIBRATION_DATA = 60,
+ URF_TEST_CMD_SET_TX_CALIBRATION_DATA = 61,
+ URF_TEST_CMD_GET_TX_CALIBRATION_DATA = 62,
+ URF_TEST_CMD_NSFT_RESET_BER_RESULT = 66,
+ URF_TEST_CMD_FHC_ELNA = 67,
+ URF_TEST_CMD_GET_RSSI_ELNA = 68,
+ URF_TEST_CMD_GET_CONTINUOUS_RSSI_ELNA = 69,
+ URF_TEST_CMD_TX_DPCH_FIX_PGA_GAIN = 70,
+ URF_TEST_CMD_GET_CALIBRATION_INFO_V3 = 71,
+ URF_TEST_CMD_START_FHC_V3 = 72,
+ URF_TEST_CMD_GET_FHC_RESULT_V3 = 73,
+ URF_TEST_CMD_GET_RSSI_V3 = 74,
+ URF_TEST_CMD_GAIN_SELECT_PWR_V3 = 75,
+ URF_TEST_CMD_GAIN_SELECT_LNA_V3 = 76,
+ URF_TEST_CMD_GET_RXTX_CALIBRATION_DATA_V3 = 77, //after 6293
+ URF_TEST_CMD_SET_RXTX_CALIBRATION_DATA_V3 = 78, //after 6293
+ URF_TEST_CMD_RSCP_V3 = 79,
+ URF_TEST_CMD_AFC_V3 = 80,
+ URF_TEST_CMD_AFC_CAPID_V3 = 81,
+ URF_TEST_CMD_LOW_POWER_CAL_V3 = 82,
+ URF_TEST_CMD_GET_CALIBRATION_INFO_V5 = 83, //after 6295
+ URF_TEST_CMD_START_FHC_V5 = 84, //after 6295
+ URF_TEST_CMD_GET_FHC_RESULT_V5 = 85, //after 6295
+ URF_TEST_CMD_GET_RXTX_CALIBRATION_DATA_V5 = 86, //after 6295
+ URF_TEST_CMD_SET_RXTX_CALIBRATION_DATA_V5 = 87, //after 6295
+ URF_TEST_CMD_TRIGGER_IQ_DUMP_MODE_V3 = 88, //support 6293 Auto IQ dump
+ URF_TEST_CMD_GET_IQ_DUMP_RESULT_V3 = 89, //support 6293 Auto IQ dump
+ URF_TEST_CMD_SET_RFEQ_SUBBAND_RESULT_V3 = 90, //support 6293 Auto IQ dump
+ URF_TEST_CMD_GET_RSSI_V5 = 91, //after 6295
+ URF_TEST_CMD_GAIN_SELECT_PWR_V5 = 92, //after 6295
+ URF_TEST_CMD_GAIN_SELECT_LNA_V5 = 93, //after 6295
+ URF_TEST_CMD_GET_TX_POWER_OFFSET_V5 =94, //after 6295
+ URF_TEST_CMD_SET_TX_POWER_OFFSET_V5 =95, //after 6295
+/*----------------------------------------------------------------------------------------------------*/
+ URF_TEST_CMD_GP_TOOL_COMMAND_START,
+ URF_TEST_CMD_END,
+ URF_TEST_CMD_MAX = 0x7FFFFFFF
+} URfTestCmdType;
+typedef struct
+{
+ kal_uint16 ul_uarfcn; /* UL uarfcn range:????Read from NVRAM?? (9612 ~ 9888) */
+ kal_uint16 dl_psc; /* 0~511. */
+ kal_uint16 signature; /* 0~15, for single signature decision. */
+ kal_uint8 pa_mode; /* 0: High 1: Middle 2: Low */
+ kal_int8 init_power; /* Assume cpich_rscp=0, ul_interference=0. */
+ kal_uint8 power_step; /* Preamble power ramping step. 1 ~ 8dB */
+ kal_uint8 max_retrans; /* 1~64. */
+ kal_uint16 dl_uarfcn;
+ kal_uint8 asc;
+} URfTestCmdTxAccess;
+typedef struct
+{
+ kal_uint16 ul_freq;
+ kal_int16 psc; /* 0~511. */
+ kal_uint32 sc_code; /* Scrambling code #. 0 ~ 16777215 */
+ kal_uint8 power_ctrl_mode;
+ kal_uint8 pa_mode;
+ kal_uint16 idx;
+ kal_uint16 afc_dac;
+ kal_uint8 dpcch_pwr;
+ kal_uint8 dpdch_pwr;
+
+ /* Below for UL1D_RF_Meta_SetTxInfo. */
+ kal_bool no_loop_ctrl;
+
+ /* Below for setPaApcDac. */
+ kal_uint8 rf_band;
+ kal_uint8 vm1;
+ kal_uint8 vm2;
+ kal_uint16 dc2dc_dac;
+ kal_uint16 vbias_dac;
+ kal_bool pwr_det;
+ kal_uint16 apc_dac;
+ kal_bool pa_octlev_ctrl_used;
+} URfTestCmdTxDPCh;
+
+typedef struct
+{
+ kal_uint16 dl_freq;
+ kal_int16 psc; /* 0~511. */
+ kal_uint8 ssc; /* 0~15. */
+ kal_int16 ovsf; /* 0~sf-1. */
+ kal_uint16 afc_dac;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdRxDPCh;
+#define FDD_MAX_FREQ_LIST 36
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_uint16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_uint8 temperature;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdRSSI;
+
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_uint16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_uint8 temperature;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+ kal_uint8 lpm_mode; /* 0: normal LNA gain mode , 1: low power LNA gain mode. */
+} URfTestCmdLPMRSSI;
+
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_uint16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_uint16 scc_dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int16 settings; // PCC SRX/LNA Settings
+ kal_uint8 srxcfg;
+ kal_uint8 vcocfg;
+ kal_uint8 lnaport;
+ kal_uint8 temperature;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdCARSSI;
+
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_uint16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_uint8 temperature;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdRxGainSweep;
+
+typedef struct
+{
+ kal_bool pscan_before_cell_search; /* True if UL1TST needs power scan before cell search/RSCP. */
+ kal_uint16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+ kal_uint8 sample_num_per_cell;
+ kal_bool read_sfn; /* True if we need to do SFN measurement for the found cell. */
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdRSCP;
+
+typedef struct
+{
+ kal_uint16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+} UTSTCmdRSCPV3lp;
+
+
+typedef struct
+{
+ kal_int16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+ kal_int16 afc_dac;
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdAFC;
+
+typedef struct
+{
+ kal_int16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+ kal_int16 afc_dac;
+} UTSTCmdAFCV3lp;
+
+
+typedef struct
+{
+ kal_int8 m_cRfBand;
+ kal_uint16 m_u2Idx;
+ kal_uint8 m_ucPaMode;
+ kal_uint8 m_ucVm1;
+ kal_uint8 m_ucVm2;
+ kal_uint16 m_u2DC2DC_Dac;
+ kal_uint16 m_u2Vbias_Dac;
+ kal_uint16 m_u2ApcDac;
+
+}UL1D_RF_TX_PA_APC_REQ_T;
+
+typedef struct
+{
+ //should be exactly the same as META_HWTPC_FRAME_INFO in ul1d_rf_general.h
+ kal_uint8 tpc_step;
+ kal_uint8 itp;
+ kal_uint8 rpp;
+ kal_uint8 fmt_idx;
+ kal_uint8 dl_frame_type;
+ kal_uint16 slot_mask;
+ kal_int8 tpc_cmd[15];
+ kal_uint8 beta_c;
+ kal_uint8 beta_d;
+
+}UL1D_RF_HWTPC_FRAME_INFO;
+typedef struct
+{
+ kal_uint8 pc_algo;
+ kal_uint8 tpc_used_frame; // specify the frame number
+ kal_int16 p_ini;
+
+ UL1D_RF_HWTPC_FRAME_INFO frame_info[8];
+
+}UL1D_RF_HWTPC_CONFIG_REQ_T;
+
+typedef struct
+{
+ kal_uint8 rf_band;
+
+}UL1D_RF_GET_PWR_THR_REQ_T;
+
+typedef struct
+{
+ kal_uint32 lid; // the lid is needed to update run-time value
+ kal_uint32 eg_ptr; // the event group pointer used to notify runt-time update finish
+} URFTestCmdReloadNVRAM;
+
+typedef struct
+{
+ kal_bool no_loop_ctrl;
+ kal_uint16 afc_dac;
+ kal_bool pwr_det;
+ kal_uint8 power_ctrl_mode;
+ kal_uint8 vm1[10][3];
+ kal_uint8 vm2[10][3];
+ kal_uint16 dc2dc_dac[10][3];
+ kal_uint16 vbias_dac[10][3];
+ kal_bool init_tx_onoff;
+ kal_bool ready_tx_onoff;
+ kal_uint8 init_pa_mode;
+ kal_uint8 ready_pa_mode;
+ kal_uint16 init_pa_gain;
+ kal_uint16 ready_pa_gain;
+ kal_uint16 init_vga_dac_tpc_idx;
+ kal_uint16 ready_vga_dac_tpc_idx;
+ kal_uint8 temperature;
+ kal_bool hwAGC;
+ kal_int16 gain_init;
+ kal_bool init_condition;
+ kal_uint8 step_duration;
+ kal_uint8 ready_duration;
+ kal_uint8 retune_duration;
+ kal_uint8 gain_stable_time;
+ kal_uint16 max_vga_dac;
+ kal_uint16 min_vga_dac;
+ kal_uint16 jump_vga_dac;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 odd_record;
+ kal_uint8 pa_gain_start_idx;
+ kal_uint8 pd_gain_start_idx;
+ kal_uint8 dl_band[40];
+ kal_uint8 ul_band[40];
+ kal_uint16 dl_freq[40];
+ kal_uint16 ul_freq[40];
+ kal_uint8 pa_mode[40];
+ kal_uint16 vga_dac_tpc_idx[40];
+ kal_uint16 pa_gain[40];
+ kal_uint8 pd_gain[40];
+}UL1D_RF_FHC_REQ_T;
+
+typedef struct
+{
+ kal_bool no_loop_ctrl;
+ kal_uint16 afc_dac;
+ kal_bool pwr_det;
+ kal_uint8 power_ctrl_mode;
+ kal_uint8 vm1[10][3];
+ kal_uint8 vm2[10][3];
+ kal_uint16 dc2dc_dac[10][3];
+ kal_uint16 vbias_dac[10][3];
+ kal_bool init_tx_onoff;
+ kal_bool ready_tx_onoff;
+ kal_uint8 init_pa_mode;
+ kal_uint8 ready_pa_mode;
+ kal_uint16 init_pa_gain;
+ kal_uint16 ready_pa_gain;
+ kal_uint16 init_vga_dac_tpc_idx;
+ kal_uint16 ready_vga_dac_tpc_idx;
+ kal_uint8 temperature;
+ kal_bool hwAGC;
+ kal_int16 gain_init;
+ kal_bool init_condition;
+ kal_uint8 step_duration;
+ kal_uint8 ready_duration;
+ kal_uint8 retune_duration;
+ kal_uint8 gain_stable_time;
+ kal_uint16 max_vga_dac;
+ kal_uint16 min_vga_dac;
+ kal_uint16 jump_vga_dac;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 odd_record;
+ kal_uint8 pa_gain_start_idx;
+ kal_uint8 pd_gain_start_idx;
+ kal_uint8 dl_band[40];
+ kal_uint8 ul_band[40];
+ kal_uint16 dl_freq[40];
+ kal_uint16 ul_freq[40];
+ kal_uint8 pa_mode[40];
+ kal_uint16 vga_dac_tpc_idx[40];
+ kal_uint16 pa_gain[40];
+ kal_uint8 pd_gain[40];
+ kal_uint8 pa_section[40];
+ kal_uint16 lna_gain[40];
+}UL1D_RF_FHC_EX_REQ_T;
+
+typedef struct
+{
+ kal_bool no_loop_ctrl;
+ kal_uint16 afc_dac;
+ kal_bool pwr_det;
+ kal_uint8 power_ctrl_mode;
+ kal_uint8 vm1[10][3];
+ kal_uint8 vm2[10][3];
+ kal_uint16 dc2dc_dac[10][3];
+ kal_uint16 vbias_dac[10][3];
+ kal_bool init_tx_onoff;
+ kal_bool ready_tx_onoff;
+ kal_uint8 init_pa_mode;
+ kal_uint8 ready_pa_mode;
+ kal_uint16 init_pa_gain;
+ kal_uint16 ready_pa_gain;
+ kal_uint16 init_vga_dac_tpc_idx;
+ kal_uint16 ready_vga_dac_tpc_idx;
+ kal_uint8 temperature;
+ kal_bool hwAGC;
+ kal_int16 gain_init;
+ kal_bool init_condition;
+ kal_uint8 step_duration;
+ kal_uint8 ready_duration;
+ kal_uint8 retune_duration;
+ kal_uint8 gain_stable_time;
+ kal_uint16 max_vga_dac;
+ kal_uint16 min_vga_dac;
+ kal_uint16 jump_vga_dac;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 odd_record;
+ kal_uint8 pa_gain_start_idx;
+ kal_uint8 pd_gain_start_idx;
+ kal_uint8 dl_band[40];
+ kal_uint8 ul_band[40];
+ kal_uint16 dl_freq[40];
+ kal_uint16 ul_freq[40];
+ kal_uint8 pa_mode[40];
+ kal_uint16 vga_dac_tpc_idx[40];
+ kal_uint16 pa_gain[40];
+ kal_uint8 pd_gain[40];
+ kal_uint8 pa_section[40];
+ kal_uint16 lna_gain[40];
+ kal_uint8 cal_num;
+ kal_uint8 route_setting[3];
+}UL1D_RF_FHC_EX_CA_REQ_T;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_int16 rssi[400];
+ kal_uint16 pwr_det_value[40];
+}UL1D_RF_FHC_CNF_T;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 rx_lna_mode[400];
+ kal_int16 rssi[400];
+ kal_uint16 pwr_det_value[40][3];
+/**V R8 new features */
+ kal_int16 Gbb_Offset[400]; /**< \brief TX Gbb power compensation */
+ kal_uint8 rxd_lna_mode[400]; /**< \brief Rx diversity path lna mode */
+ kal_int16 rxd_rssi[400]; /**< \brief Rx diversity path RSSI */
+}UL1D_RF_FHC_EX_CNF_T;
+
+typedef struct
+{
+
+ kal_bool b_afc_dac_valid;
+ kal_uint16 u2_afc_dac;
+ kal_uint8 u1_loopbackType;
+ kal_uint8 u1_frame_shift;
+ kal_uint8 u1_rmc_type;
+ kal_uint8 u1_ctfc[4];
+ kal_uint8 u1_bit_pattern;
+
+ kal_int16 i2_dl_freq;
+ kal_int16 i2_dl_psc;
+ kal_int16 i2_dl_ovsf;
+
+ kal_int16 i2_ul_freq;
+ kal_uint16 u2_ul_tfci;
+ kal_uint32 u4_ul_sc_code;
+ kal_bool b_iq_pwr_valid;
+ kal_uint8 u1_dpcch_pwr;
+ kal_uint8 u1_dpdch_pwr;
+
+}UL1D_RF_NSFT_REQ_T;
+/**
+ * NSFT List Mode command parameter
+ */
+typedef struct
+{
+ kal_bool afc_dac_valid;
+ kal_uint16 afc_dac;
+ kal_uint8 loopbackType;
+ kal_uint8 frame_shift;
+ kal_uint8 rmc_type;
+ kal_uint8 ctfc[4];
+ kal_uint8 bit_pattern;
+/* DL parameters */
+ kal_int16 dl_freq[50];
+ kal_int16 dl_psc;
+ kal_int16 dl_ovsf;
+/* UL parameters */
+ kal_int16 ul_freq[50];
+ kal_uint16 ul_tfci;
+ kal_uint32 ul_sc_code;
+ kal_bool iq_pwr_valid;
+ kal_uint8 dpcch_pwr;
+ kal_uint8 dpdch_pwr;
+/* common parameters */
+ kal_uint8 valid_freq;
+ kal_uint16 test_item[50];
+/* the time settings, unit = frame */
+ kal_uint16 full_test_time;
+ kal_uint8 ready_time;
+ kal_uint8 sync_time;
+ kal_uint8 retrial;
+ kal_uint16 test_time;
+ kal_uint16 rx_rssi_start_time[3];
+ kal_uint8 rx_rssi_duration[3];
+ kal_uint16 rx_ber_start_time;
+ kal_uint8 rx_ber_duration;
+ kal_uint16 ILPC_ABC_time;
+ kal_uint16 ILPC_EF_time;
+ kal_uint16 ILPC_GH_time;
+ kal_uint16 transition_time;
+} URfNsftListModeReq;
+/**
+ * HSPA command parameter
+ */
+typedef struct
+{
+ kal_bool b_afc_dac_valid;
+ kal_uint16 u2_afc_dac;
+ kal_uint8 u1_loopbackType;
+ kal_uint8 u1_frame_shift;
+ kal_uint8 u1_rmc_type;
+ kal_uint8 u1_ctfc[4];
+ kal_uint8 u1_bit_pattern;
+
+ kal_int16 i2_dl_freq;
+ kal_int16 i2_dl_psc;
+ kal_int16 i2_dl_ovsf;
+
+ kal_int16 i2_ul_freq;
+ kal_uint16 u2_ul_tfci;
+ kal_uint32 u4_ul_sc_code;
+ kal_bool b_iq_pwr_valid;
+ kal_uint8 u1_dpcch_pwr;
+ kal_uint8 u1_dpdch_pwr;
+ kal_uint8 subTest;
+}URfTestCmdHspaNsft;
+
+typedef struct
+{
+ kal_uint16 measure_count;
+} URfTestCmdGetRfTempSensor;
+
+typedef struct
+{
+ kal_bool bDataValid;
+ kal_uint32 u4TotalBits;
+ kal_uint32 u4ErrorBits;
+}UL1D_RF_NSFT_BET_BIT_CNT_FOR_BER_CNF_T;
+
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi[ FDD_MAX_FREQ_LIST ];
+} URfTestResultRSSI;
+
+// R8 both rx path RSSI result
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi_rxd[ FDD_MAX_FREQ_LIST ];
+} URfTestResultRSSIRxD;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_int32 NSFT_RSSI;
+ kal_int32 NSFT_RSSI_RXD;
+ kal_int32 cmd_location;
+}URfTestResultNSFTRSSI;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 inband_pow[ FDD_MAX_FREQ_LIST ];
+} URfTestResultRxGainSweep;
+
+typedef struct
+{
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_int32 tm; /* Cell frame boundary offset to LST */
+ kal_int16 off; /* Cell frame number offset to LST */
+ kal_bool sttd; /* True for STTD used. */
+ kal_uint8 sample_num;
+ kal_int16 rscp_sum;
+ kal_int16 freq_error;
+} URfTest_cpich_result_T;
+
+#define MAX_NUM_MEAS_CELL 32
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_cell;
+ URfTest_cpich_result_T cpich_result[ MAX_NUM_MEAS_CELL ];
+} URfTestResultRSCP;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_cell;
+ URfTest_cpich_result_T cpich_result[ MAX_NUM_MEAS_CELL ];
+} UTSTestResultRSCPV3lp;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc;
+ kal_int32 tm;
+ kal_bool sttd;
+ kal_uint8 rscp_sum;
+ kal_int16 freq_error;
+
+}URfTestResultAFC;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc;
+ kal_int32 tm;
+ kal_bool sttd;
+ kal_uint8 rscp_sum;
+ kal_int16 freq_error;
+}UTSTestResultAFCV3lp;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc;
+ kal_int32 tm;
+ kal_bool sttd;
+ kal_uint8 rscp_sum;
+ kal_int32 freq_error;
+}URfTestResultAFC_Ex;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint32 ber; /* Spec requirement=10^-3. We will count 10^5 frames(100 times spec requirement) for BER calculation. Only count for the only TRCh for DPDCh. */
+} URfTestResultRxDPCh;
+
+typedef struct
+{
+ kal_uint32 m_u4Rfid;
+}URfTestResultRFID;
+
+typedef struct
+{
+ kal_uint8 m_u1Result;
+
+}URfTestResultPwrDtStep;
+
+typedef struct
+{
+ kal_uint16 m_u2Result;
+
+}URfTestResultPwrDtDac;
+
+typedef struct
+{
+ kal_uint8 m_u1Result;
+
+}URfTestResultPwrDtDefaultThr;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_int8 m_i1CurGainTableState;
+
+}URfTestResultReplaceGainTable;
+
+typedef struct
+{
+ kal_uint32 capability;
+ kal_uint32 band_support;
+ kal_uint32 rxd_band_support;
+ kal_uint32 padrift_band_support;
+ kal_uint32 wcdma_dpd_band_support;
+}FT_UMTS_MsCapabilityEx;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 link_status;
+}FT_UMTS_NSFTLinkStatusReport;
+
+typedef struct
+{
+ kal_bool ok; /*<! ok indicator */
+ kal_uint32 sum; /*<! the sum of measure_count times of temp sensor result */
+} URfTestResultGetRfTempSensor;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 link_status;
+} URfNsftListModeCnf;
+
+typedef struct
+{
+ kal_uint16 rf_band_idx;
+ kal_uint16 power_level_num;
+ kal_uint16 code_word_num;
+} URfTestCmdSetMIPICodeWord;
+
+typedef struct
+{
+ kal_uint8 status;
+ kal_uint16 power_level_num;
+ kal_uint16 code_word_num;
+} URfTestResultGetMIPICodeWord;
+
+typedef struct
+{
+ kal_int16 status;
+ kal_int16 tadc_dac;
+ kal_int16 temperature;
+ kal_int16 temp_idx;
+} URfTestResultRfTemperatureInfo;
+
+typedef struct
+{
+ kal_uint32 result; // 1: support 0: not support
+ kal_uint32 query_op_code; // query op code
+}URfCheckIfFuncExist;
+
+typedef enum
+{
+ CNF_SUCCESS = 0,
+ CNF_GENERAL_FAIL = 1,
+ CNF_NVRAM_READ_FAIL = 2,
+ CNF_FREQ_INVALID = 3,
+ CNF_CMD_INVALID = 4,
+ CNF_NVRAM_SET_FAIL = 5,
+ CNF_TX_DATA_CHECK_FAIL = 6,
+ CNF_TX_STRUCTURE_ERROR = 7,
+ CNF_RX_STRUCTURE_ERROR = 8,
+ CNF_TX_VGA_FREQ_CHECK_FAIL=9,
+ CNF_TX_PWR_DT_FREQ_CHECK_FAIL=10,
+ CNF_GET_RXTX_PEER_BUF_OVERFLOW=11, //after 6293
+ CNF_ADDRECORD_FAIL=12, //after 6293
+ CNF_GET_RXTX_PEER_BUF_ZERO=13 //after 6295
+} NVRAM_ACCESS_RESULT_MSG;
+
+/*TX/RX calibration data------------------------------------------------------------------------------------->*/
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 error_check; //for calibration data checking
+ kal_uint8 version_number;
+} URfTestResultCalDataProcess; //after 6292 get/set calibration data (confirm : local parameter)
+/*95 get/set command optimization Cnf-----------------------------*/
+typedef struct
+{
+ kal_bool ok;
+ NVRAM_ACCESS_RESULT_MSG error_check; //for calibration data checking
+ kal_uint8 rxm_result_num; //the number of bands to SET
+ kal_uint8 rxd_result_num;
+ kal_uint8 tx_result_num;
+ NVRAM_ACCESS_RESULT_MSG rxm_result[8]; //result status of SET command for each band
+ NVRAM_ACCESS_RESULT_MSG rxd_result[8];
+ NVRAM_ACCESS_RESULT_MSG tx_result[8];
+} URfTestCmd_SetRxTxCalData_CnfParam_V5; //Local parameter of confirm after 6295 set Rx/Tx cal data command
+
+typedef struct
+{
+ kal_bool ok;
+ NVRAM_ACCESS_RESULT_MSG error_check; //for calibration data checking
+ kal_uint8 rxm_count; //the number of bands to GET
+ kal_uint8 rxd_count;
+ kal_uint8 tx_count;
+ kal_uint8 padding;
+ kal_uint16 rxm_offset; //offset of data in peer buffer
+ kal_uint16 rxd_offset;
+ kal_uint16 tx_offset;
+} URfTestCmd_GetRxTxCalData_CnfParam_V5; //Local parameter of confirm after 6295 get Rx/Tx cal data command
+///*93 get/set command optimization Cnf-----------------------------*/
+//typedef struct
+//{
+// kal_bool ok;
+// NVRAM_ACCESS_RESULT_MSG error_check; //for calibration data checking
+// kal_uint8 rxm_result_num; //the number of bands to SET
+// kal_uint8 rxd_result_num;
+// kal_uint8 tx_result_num;
+// NVRAM_ACCESS_RESULT_MSG rxm_result[5]; //result status of SET command for each band
+// NVRAM_ACCESS_RESULT_MSG rxd_result[5];
+// NVRAM_ACCESS_RESULT_MSG tx_result[5];
+//} URfTestCmd_SetRxTxCalData_CnfParam_V3; //Local parameter of confirm after 6293 set Rx/Tx cal data command
+//
+//typedef struct
+//{
+// kal_bool ok;
+// NVRAM_ACCESS_RESULT_MSG error_check; //for calibration data checking
+// kal_uint8 rxm_count; //the number of bands to GET
+// kal_uint8 rxd_count;
+// kal_uint8 tx_count;
+// kal_uint8 padding;
+// kal_uint16 rxm_offset; //offset of data in peer buffer
+// kal_uint16 rxd_offset;
+// kal_uint16 tx_offset;
+//} URfTestCmd_GetRxTxCalData_CnfParam_V3; //Local parameter of confirm after 6293 get Rx/Tx cal data command
+///*93 get/set command optimization Cnf-----------------------------*/
+typedef struct
+{
+ kal_uint8 version_number;
+ kal_bool is_uplate_to_NVRAM; //to memory or NVRAM
+} URfTestCmdSetCalData ; //after 6292 get/set calibration data (command : local parameter)
+
+typedef struct
+{
+ kal_uint8 version_number;
+} URfTestCmdGetCalData ; //after 6292 get/set calibration data (command : local parameter)
+/*95 get/set command optimization Req--------------------------*/
+typedef struct
+{
+ kal_uint8 rxm_band_num; //the number of bands to GET
+ kal_uint8 rxd_band_num;
+ kal_uint8 tx_band_num;
+ kal_uint8 rxm_band_index[8]; //Band index
+ kal_uint8 rxd_band_index[8];
+ kal_uint8 tx_band_index[8];
+} URfTestCmd_GetRxTxCalData_ReqParam_V5; //Local parameter of request after 6295 get Rx/Tx cal data command
+
+typedef struct
+{
+ kal_bool is_uplate_to_NVRAM; //write to NVRAM or not
+ kal_uint8 rxm_count; //the number of bands to SET
+ kal_uint8 rxd_count;
+ kal_uint8 tx_count;
+ kal_uint16 rxm_offset;
+ kal_uint16 rxd_offset;
+ kal_uint16 tx_offset;
+} URfTestCmd_SetRxTxCalData_ReqParam_V5; //Local parameter of request after 6295 set Rx/Tx cal data command
+///*93 get/set command optimization Req--------------------------*/
+//typedef struct
+//{
+// kal_uint8 rxm_band_num; //the number of bands to GET
+// kal_uint8 rxd_band_num;
+// kal_uint8 tx_band_num;
+// kal_uint8 rxm_band_index[5]; //Band index
+// kal_uint8 rxd_band_index[5];
+// kal_uint8 tx_band_index[5];
+//} URfTestCmd_GetRxTxCalData_ReqParam_V3; //Local parameter of request after 6293 get Rx/Tx cal data command
+//
+//typedef struct
+//{
+// kal_bool is_uplate_to_NVRAM; //write to NVRAM or not
+// kal_uint8 rxm_count; //the number of bands to SET
+// kal_uint8 rxd_count;
+// kal_uint8 tx_count;
+// kal_uint16 rxm_offset;
+// kal_uint16 rxd_offset;
+// kal_uint16 tx_offset;
+//} URfTestCmd_SetRxTxCalData_ReqParam_V3; //Local parameter of request after 6293 set Rx/Tx cal data command
+///*93 get/set command optimization Req--------------------------*/
+/*TX/RX calibration data<-------------------------------------------------------------------------------------*/
+
+/*RX calibration data------------------------------------------------------------------------------------->*/
+typedef struct
+{
+ kal_uint16 uarfcn;
+ kal_int8 path_loss_HPM[UL1TST_LNA_MODE_NUMBER_EXT];
+ kal_int8 path_loss_LPM[UL1TST_LNA_MODE_NUMBER_EXT];
+} UL1D_RF_LNA_PATHLOSS; //after 6292 LNA pathloss format
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 rxantpath; // 1: main path , 2 : diversity path
+ kal_int8 temper_offset[CAL_TEMP_SECTION];
+ UL1D_RF_LNA_PATHLOSS loss_of_uarfcn[CAL_UARFCN_SECTION];
+} URfTestPathlossItem; //after 6292 get/set RX pathloss (confirm/command : peer buffer)
+/*RX calibration data<-------------------------------------------------------------------------------------*/
+/*RX calibration data----------6293---------------------------------------------------------------------->*/
+#define UTST_NVRAM_SIZE_V3 7
+
+typedef struct
+{
+ kal_uint16 uarfcn;
+ kal_int16 path_loss_HPM[UTST_NVRAM_SIZE_V3];
+ kal_int16 path_loss_LPM[UTST_NVRAM_SIZE_V3];
+} UTST_LNA_PATHLOSS; //after 6293 LNA pathloss format
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 rxantpath; // 1: main path , 2 : diversity path
+ kal_int8 temper_offset[CAL_TEMP_SECTION];
+ UTST_LNA_PATHLOSS loss_of_uarfcn[CAL_UARFCN_SECTION];
+} UTSTPathlossV3; //after 6293 get/set RX pathloss (confirm/command : peer buffer)
+
+/*TX calibration data------------------------------------------------------------------------------------->*/
+typedef struct
+{
+ kal_uint16 start;
+ kal_uint16 end;
+} UL1D_sHYSTERESISDATA;
+
+typedef struct
+{
+ kal_uint16 level_0;
+ kal_uint16 level_1;
+} UL1D_sDC2DC;
+
+typedef struct
+{
+ kal_uint16 max_uarfcn;
+ kal_int16 pwr_offset_dB;
+ kal_int16 pwr_offset_txdac;
+} UL1D_sARFCN_SECTION;
+
+typedef struct
+{
+ kal_uint16 dc2dc_level;
+ kal_uint16 vbias_dac;
+ kal_uint8 vm1;
+ kal_uint8 vm2;
+} UL1D_sPADATA;
+
+typedef struct
+{
+ kal_uint8 pa_mode;
+ kal_int8 prf;
+ kal_uint8 dc2dc_lvl;
+ kal_uint8 vm1;
+ kal_uint8 vm2;
+ kal_uint16 vbias_dac;
+ kal_uint16 pa_gain;
+} UL1D_sPMULEVHANDLE;
+
+typedef struct
+{
+ kal_uint8 octlev_num_section;
+ kal_uint8 reserved_byte;
+ kal_uint32 pa_phase_compensation[3];
+ UL1D_sPMULEVHANDLE pmu_level_handle[8];//8
+ kal_uint16 pa_gain_g12a;
+ kal_uint16 pa_gain_g12b;
+}UL1D_sPAOCTLVLSETTING;
+
+typedef struct
+{
+ UL1D_sPADATA pa_data;
+ kal_uint16 vga_dac[NUMBER_OF_VGA_DAC];
+ UL1D_sARFCN_SECTION vga_comp_by_subband[CAL_UARFCN_SECTION];
+ kal_int16 vga_comp_by_temperature[8][2];
+} UL1D_sTXPOWERDATA;
+
+typedef struct
+{
+ kal_uint8 pwr_dt_thr;
+ kal_uint8 pwr_dt_section;
+ kal_uint16 pwr_dt_dac[CAL_PWR_DETECTOR_SECTION];
+ kal_int16 pwr_dt_value[CAL_PWR_DETECTOR_SECTION];
+ UL1D_sARFCN_SECTION pwr_dt_comp_by_subband[CAL_UARFCN_SECTION];
+ kal_int16 pwr_dt_comp_by_temperature[8][2];
+} UL1D_sPWTDTDATA;
+
+typedef struct
+{
+ UL1D_sDC2DC pa_dc2dc;
+ UL1D_sTXPOWERDATA power_dac[3];
+ UL1D_sHYSTERESISDATA tx_hvsteresis[2];
+ UL1D_sPWTDTDATA pwr_dt_data;
+} UL1D_sRAMPDATA;
+
+typedef struct
+{
+ kal_uint8 band;
+ UL1D_sRAMPDATA txdacData;
+ UL1D_sPAOCTLVLSETTING txPAOCTLevelData;
+} URfTestTXDaTaItem;
+
+/*******************************************************************************
+ * WCDMA DPD common
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_WCDMA_DPD_91 = 0,
+ URF_TEST_WCDMA_DPD_92 = 1,
+ URF_TEST_WCDMA_DPD_93 = 2,
+ URF_TEST_WCDMA_DPD_95 = 3
+}URfTest_Wcdma_Dpd_Generation;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_START_DPD_FAC_CAL_V3
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_START_DPD_INVALID = 0,
+ URF_TEST_START_DPD_OK = 1,
+ URF_TEST_START_DPD_PEER_SIZE_MISMATCH = 2,
+ URF_TEST_START_DPD_EXCEED_TTG_LIMIT_INIT = 3,
+ URF_TEST_START_DPD_EXCEED_TTG_LIMIT = 4,
+ URF_TEST_START_DPD_NEGATIVE_PA_GAIN = 5,
+ URF_TEST_START_DPD_LARGE_PA_GAIN_DIFF = 6
+
+}URfTest_StartDpdFacCal_Status;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+ kal_uint16 cal_band[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_StartDpd_ReqInfo;
+
+typedef struct
+{
+ kal_uint8 status; /* URfTest_StartDpdPaAndDpdFacCal_Status */
+ kal_uint16 curr_band_idx;
+ kal_uint32 curr_subband_idx;
+ kal_uint32 curr_gain_idx;
+ kal_int16 curr_pa_gain;
+
+}URfTestCmd_StartDpd_CnfInfo;
+
+typedef struct
+{
+ kal_uint16 band_idx;
+ kal_uint16 apt_ref_channel;
+ kal_int16 tpc_wanted_p_offset;
+
+}URfTest_AptRefChannel_OneBand;
+
+/* struct for GP tool */
+typedef struct
+{
+ URfTest_AptRefChannel_OneBand wcdma_apt_channel_info[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_StartDpdPaAndDpdFacCal_ReqPdu;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_SET_DPD_FAC_RESULT_V3 and MMRF_TEST_CMD_GET_DPD_FAC_RESULT_V3
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_SET_DPD_INVALID = 0,
+ URF_TEST_SET_DPD_OK = 1,
+ URF_TEST_SET_DPD_PEER_SIZE_MISMATCH = 2,
+ URF_TEST_SET_DPD_INVALID_BAND = 3
+
+}URfTest_SetDpdFacCal_Status;
+
+typedef enum
+{
+ URF_TEST_GET_DPD_INVALID = 0,
+ URF_TEST_GET_DPD_OK = 1,
+ URF_TEST_GET_DPD_INVALID_BAND = 2
+
+}URfTest_GetDpdFacCal_Status;
+
+typedef struct
+{
+ /* Tool can set several band in one set command */
+ kal_uint16 num_of_band;
+
+}URfTestCmd_SetDpdAll_ReqInfo;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+ kal_uint8 status; /* URfTest_SetDpdFacCal_Status */
+
+}URfTestCmd_SetDpdAll_CnfInfo;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+
+}URfTestCmd_SetDpdPartial_ReqInfo;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+ kal_uint8 status; /* URfTest_SetDpdPaAndDpdFacCal_Status */
+
+}URfTestCmd_SetDpdPartial_CnfInfo;
+
+typedef struct
+{
+ kal_uint16 band_idx;
+ kal_uint8 dpd_cal_done;
+ kal_int16 dpd_tr[CAL_UARFCN_SECTION];
+
+ /* ramp */
+ kal_int16 vga_comp_subband[UL1D_DPD_MAX_PA_MODE_NUM][CAL_UARFCN_SECTION];
+ kal_int16 vga_comp_temperature[UL1D_DPD_MAX_PA_MODE_NUM][UL1_DPD_MAX_PA_LEVEL_NUM];
+ UL1D_sHYSTERESISDATA tx_hysteresis[UL1D_DPD_MAX_PA_HYST_NUM];
+
+ /* paoct */
+ kal_uint8 octlev_num_section;
+ kal_uint32 pa_phase_compensation[UL1D_DPD_MAX_PA_MODE_NUM];
+ UL1D_sPMULEVHANDLE pmu_level_handle[UL1_DPD_MAX_PA_LEVEL_NUM];
+
+}URfTest_SetGetDpd_TpcPeer;
+
+typedef struct
+{
+ kal_uint8 lut[UL1_DPD_MAX_AM_LUT_GAIN_NUM][MMDPD_MAX_AM_LUT_PWR_NUM];
+
+}URfTest_DPDAMLutSubBand;
+
+typedef struct
+{
+ kal_int8 lut[UL1_DPD_MAX_PM_LUT_GAIN_NUM][MMDPD_MAX_PM_LUT_PWR_NUM];
+
+}URfTest_DPDPMLutSubBand;
+
+typedef struct
+{
+ kal_int16 dpdImplicitArray[UL1_DPD_MAX_IMPLICIT_NUM]; /* For the parameters whose name will not be shown in cal file */
+ URfTest_DPDAMLutSubBand am_lut_subband[CAL_UARFCN_SECTION];
+ URfTest_DPDPMLutSubBand pm_lut_subband[CAL_UARFCN_SECTION];
+
+}URfTest_SetGetDpd_DpdPeer;
+
+typedef struct
+{
+ URfTest_SetGetDpd_TpcPeer dpdtpc_peer;
+ URfTest_SetGetDpd_DpdPeer dpd_peer;
+
+}URfTestCmd_SetDpdFacCalAll_OneBand, URfTestCmd_GetDpdFacCalAll_OneBand;
+
+typedef struct
+{
+ URfTest_SetGetDpd_TpcPeer dpdtpc_peer;
+
+}URfTestCmd_SetDpdFacCalPartial_OneBand;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+ kal_uint16 band_idx[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_GetDpdAll_ReqInfo;
+
+typedef struct
+{
+ kal_uint8 get_status; /* URfTest_GetDpdPaAndDpdFacCal_Status */
+ kal_uint16 num_of_band;
+
+}URfTestCmd_GetDpdAll_CnfInfo;
+
+/* struct for GP tool */
+typedef struct
+{
+ URfTestCmd_GetDpdFacCalAll_OneBand get_peer[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_GetDpdFacCalAll_CnfPdu;
+
+typedef struct
+{
+ URfTestCmd_SetDpdFacCalAll_OneBand set_all_peer[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_SetDpdFacCalAll_ReqPdu;
+
+typedef struct
+{
+ URfTestCmd_SetDpdFacCalPartial_OneBand set_partial_peer[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_SetDpdFacCalPartial_ReqPdu;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_SET_DPD_PATH_DELAY_SEARCH_V3
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_SET_DPD_DELAY_INVALID = 0,
+ URF_TEST_SET_DPD_DELAY_VALID = 1,
+ URF_TEST_SET_DPD_DELAY_PEER_SIZE_MISMATCH = 2
+
+}URfTest_SetDpdPathDelaySearchV3_Status;
+
+typedef struct
+{
+ /* Tool can set several band in one set command */
+ kal_uint16 band_num;
+
+}URfTestCmd_SetDpdPathDelaySearchV3_ReqInfo;
+
+typedef struct
+{
+ kal_uint16 rf_band;
+ kal_uint16 subband_freq[CAL_UARFCN_SECTION];
+ kal_int16 dpd_tr[CAL_UARFCN_SECTION];
+
+}URfTest_SetDpdPathDelaySearchV3_ReqPeer_OneBand;
+
+/* struct for GP tool */
+typedef struct
+{
+ URfTest_SetDpdPathDelaySearchV3_ReqPeer_OneBand dpd_one_band[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_SetDpdPathDelaySearchV3_ReqPdu;
+
+/* Confirm */
+typedef struct
+{
+ kal_uint16 band_num;
+ kal_uint16 status;
+
+}URfTestCmd_SetDpdPathDelaySearchV3_CnfInfo;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_START_DPD_PATH_DELAY_SEARCH_V3
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_START_DPD_DELAY_INVALID = 0,
+ URF_TEST_START_DPD_DELAY_VALID = 1,
+ URF_TEST_START_DPD_DELAY_TIMEOUT = 2,
+ URF_TEST_START_DPD_DELAY_SEARCH_FAILED = 3
+}URfTest_StartDpdPathDelaySearchV3_Status;
+
+/* Request */
+typedef struct
+{
+ kal_uint16 test_times;
+ kal_uint16 search_band[MAX_SUPPORTED_BAND_INDEX];
+}URfTestCmd_StartDpdPathDelaySearchV3_ReqInfo;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_GET_DPD_PATH_DELAY_SEARCH_V3
+ ******************************************************************************/
+
+/* Request */
+typedef struct
+{
+ kal_uint16 band_num;
+ kal_uint16 rf_band_info[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_GetDpdPathDelaySearchV3_ReqInfo;
+
+
+/* Confirm */
+
+typedef enum
+{
+ URF_TEST_GET_DPD_DELAY_INVALID = 0,
+ URF_TEST_GET_DPD_DELAY_VALID = 1
+
+}URfTest_GetDpdPathDelaySearchV3_Status;
+
+typedef struct
+{
+ kal_uint16 band_num;
+ kal_uint16 get_status; /* URfTest_GetDpdPathDelaySearchV3_Status */
+
+}URfTestCmd_GetDpdPathDelaySearchV3_CnfInfo;
+
+typedef struct
+{
+ kal_uint16 rf_band;
+ kal_int16 dpd_tr[CAL_UARFCN_SECTION];
+
+}URfTest_GetDpdPathDelaySearchV3_CnfPeer_OneBand;
+
+/* struct for GP tool */
+typedef struct
+{
+ URfTest_GetDpdPathDelaySearchV3_CnfPeer_OneBand dpd_delay_one_band[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_GetDpdPathDelaySearchV3_CnfPdu;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_SET_DPD_FAC_RESULT_V3 and MMRF_TEST_CMD_GET_DPD_FAC_RESULT_V3
+ ******************************************************************************/
+/* Reuqest */
+typedef enum
+{
+ URF_TEST_TRAD_CAL_EXE_INVALID = 0,
+ URF_TEST_TRAD_CAL_EXE_START = 1,
+ URF_TEST_TRAD_CAL_EXE_END = 2
+
+}URfTest_TradCal_Exe_Status;
+
+typedef struct
+{
+ kal_uint32 exe_status; /* URfTest_TradCal_Exe_Status */
+
+}URfTestCmd_TradCal_ReqInfo;
+
+/* Confirm */
+typedef enum
+{
+ URF_TEST_TRAD_CAL_CMD_INVALID = 0,
+ URF_TEST_TRAD_CAL_CMD_OK = 1
+
+}URfTest_TradCal_Cmd_Status;
+
+typedef struct
+{
+ kal_uint32 cmd_status; /* URfTest_TradCal_Cmd_Status */
+
+}URfTestCmd_TradCal_CnfInfo;
+
+/******************************************************************************/
+/*TX calibration data<-------------------------------------------------------------------------------------*/
+
+typedef enum
+{
+ SETUP_FAIL_GENERAL = 0,
+ SETUP_FAIL_TCM_MISMATCH = 1,
+ SETUP_FAIL_TDD_TIMER_STILL_RUNNING = 2,
+} UBIN_MODE_SETUP_FAIL_MSG;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_int8 setup_result;
+} URfTestResultUbinModeSetup;
+
+/************************************************************************/
+/* New FHC Command when introduce eLNA */
+/* URF_TEST_CMD_FHC_ELNA */
+/************************************************************************/
+typedef struct
+{
+ kal_bool no_loop_ctrl;
+ kal_uint16 afc_dac;
+ kal_bool pwr_det;
+ kal_uint8 power_ctrl_mode;
+ kal_uint8 vm1[10][3];
+ kal_uint8 vm2[10][3];
+ kal_uint16 dc2dc_dac[10][3];
+ kal_uint16 vbias_dac[10][3];
+ kal_uint8 temperature;
+ kal_bool hwAGC;
+ kal_uint8 step_duration;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 pa_gain_start_idx;
+ kal_uint8 pd_gain_start_idx;
+ kal_uint8 lna_gain_start_idx;
+ kal_uint8 dl_band[40];
+ kal_uint8 ul_band[40];
+ kal_uint16 dl_freq[40];
+ kal_uint16 ul_freq[40];
+ kal_uint8 pd_gain[40];
+ kal_uint8 pa_mode[40];
+ kal_uint16 vga_dac_tpc_idx[40];
+ kal_uint16 pa_gain[40];
+ kal_uint8 pa_section[40];
+ kal_uint16 rx_lna_gain[40];
+ kal_uint16 rxd_lna_gain[40];
+ kal_uint8 fix_pga_gain[40];
+ kal_uint8 is_lpm[40];
+}URfTestCmdFHCeLNAPB;
+
+typedef struct
+{
+ kal_bool ok;
+} URfTestResultFHCeLNALP;
+/*---------------------------------------------------------------------*/
+
+/***********************************************************************/
+/* New RSSI Command when introduce eLNA */
+/* URF_TEST_CMD_GET_RSSI_ELNA */
+/***********************************************************************/
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_uint16 dl_freq[36];
+ kal_uint8 temperature;
+ kal_bool hwAGC;
+ kal_uint8 mode;
+ kal_int16 rx_gain;
+ kal_uint8 rx_LNAmode;
+ kal_uint16 rx_pga;
+ kal_int16 rxd_gain;
+ kal_uint8 rxd_LNAmode;
+ kal_uint16 rxd_pga;
+ kal_uint8 antenna_path;
+ kal_bool is_cal;
+ kal_uint8 lpm_mode;
+}URfTestCmdRSSIeLNAPB;
+
+typedef struct
+{
+ kal_bool ok;
+} URfTestResultRSSIeLNALP;
+
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_uint16 dl_freq[36];
+ kal_int32 rx_rssi[36];
+ kal_int32 rxd_rssi[36];
+ kal_uint8 rx_LNAmode[36];
+ kal_uint8 rxd_LNAmode[36];
+}URfTestResultRSSIeLNAPB;
+/*---------------------------------------------------------------------*/
+/***********************************************************************/
+/* TX SUPPORT Command FIX RF PGA GAIN */
+/* URF_TEST_CMD_TX_DPCH_FIX_PGA_GAIN */
+/***********************************************************************/
+typedef enum
+{
+ UL1TST_NO_FIX_PGA_GAIN = 0,
+ UL1TST_FIX_PGA_GAIN_12A = 1,
+ UL1TST_FIX_PGA_GAIN_12B = 2
+}UL1TST_FIX_PGA_GAIN_T;
+
+typedef struct
+{
+ UL1TST_FIX_PGA_GAIN_T ul1tst_fix_pga_gain;
+/*
+ 0 : no need fix
+ 1 : fix PGA 12A
+ 2 : fix PGA 12B
+ */
+}URfTestCmdDPCHTXFIXPGAPB;
+
+typedef struct
+{
+ kal_bool ok;
+}URfTestResultDPCHTXFIXPGALP;
+///*------------------------------6293 Get FHC Information from TST---------------------------------------*/
+//#define UL1TST_HPM_POINT_V3 7
+//#define UL1TST_LPM_POINT_V3 4
+//#define UL1TST_WCDMA_BAND_SUPPORT 5
+//
+//typedef struct
+//{
+// kal_uint8 calibration_band_number;
+// kal_uint8 calibration_band[UL1TST_WCDMA_BAND_SUPPORT]; // band 1 : band index = 0
+//} UTSTReqGetCalInfoV3lp; // request local parameter
+//
+//typedef enum
+//{
+// UTST_ELNA_OFF=0,
+// UTST_ELNA_ALWAYS_ON,
+// UTST_ELNA_ALWAYS_ON_2ND_SAW,
+// UTST_ELNA_BYPASS,
+// UTST_ELNA_BYPASS_2ND_SAW
+//}UTST_ELNA_E;
+//
+//
+//typedef struct
+//{
+// kal_uint8 band;
+// kal_uint8 rx_elna_mode;
+// kal_uint8 rxd_elna_mode;
+// kal_uint8 cal_point_hpm;
+// kal_uint8 cal_point_lpm;
+// kal_uint8 rx_cal_sequency[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3];
+// kal_uint8 rx_elna_bypass[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3];
+// kal_uint8 rxd_elna_bypass[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3];
+// kal_int16 rx_cal_dl_power_min[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3]; //s.5
+// kal_int16 rx_cal_dl_power_max[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3]; //s.5
+// kal_int16 rx_cal_dl_power[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3]; //s.5
+//}UTSTCnfGetCalInfoV3pb; //band unit : dynamic size
+//typedef struct
+//{
+// kal_uint8 support_band_number;
+//}UTSTCnfGetCalInfoV3lp; // conform local parameter
+
+/*------------------------------6295 Get FHC Information from TST---------------------------------------*/
+#define UL1TST_HPM_POINT_V5 7
+#define UL1TST_LPM_POINT_V5 7
+#define UL1TST_WCDMA_BAND_SUPPORT_V5 8
+
+typedef struct
+{
+ kal_uint8 calibration_band_number;
+ kal_uint8 calibration_band[UL1TST_WCDMA_BAND_SUPPORT_V5]; // band 1 : band index = 0
+} UTSTReqGetCalInfoV5lp; // request local parameter
+
+//18/13.5dB
+typedef enum
+{
+ UTST_ELNA_OFF=0,
+ UTST_ELNA_BYPASS_LOW_TX_ISO,
+ UTST_ELNA_BYPASS_HIGH_TX_ISO,
+ UTST_ELNA_ALWAYS_ON_LOW_TX_ISO,
+ UTST_ELNA_ALWAYS_ON_HIGH_TX_ISO,
+ UTST_ELNA_BYPASS_LOW_TX_ISO_R_MATCHING
+}UTST_ELNA_E;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 rx_elna_mode;
+ kal_uint8 rxd_elna_mode;
+ kal_uint8 cal_point_hpm;
+ kal_uint8 cal_point_lpm;
+ kal_uint8 rx_cal_sequency[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+ kal_uint8 rx_elna_bypass[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+ kal_uint8 rxd_elna_bypass[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+ kal_int16 rx_cal_dl_power_min[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5]; //s.5
+ kal_int16 rx_cal_dl_power_max[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5]; //s.5
+ kal_int16 rx_cal_dl_power[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5]; //s.5
+ kal_uint8 rx_lna_mode[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+ kal_uint8 rxd_lna_mode[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+ kal_uint8 rx_location_idx[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+ kal_uint8 rxd_location_idx[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+ kal_uint8 rx_gain_table; //0:18dB 1:13.5dB
+ kal_uint8 rxd_gain_table; //0:18dB 1:13.5dB
+}UTSTCnfGetCalInfoV5pb; //band unit : dynamic size
+typedef struct
+{
+ kal_uint8 support_band_number;
+}UTSTCnfGetCalInfoV5lp; // conform local parameter
+
+///*------------------------------6293 START FHC---------------------------------------*/
+//#define UL1TST_FHC_FREQUENCY_NUMBER 15
+//
+//typedef struct
+//{
+// kal_uint8 ok;
+// kal_uint8 error_code;
+//}UTSTCnfFHCeLNAV3lp;
+//
+//typedef struct
+//{
+// kal_uint8 cal_band_number;
+// kal_uint8 cal_band[UL1TST_WCDMA_BAND_SUPPORT];
+// kal_uint8 antenna_setting;
+// kal_uint8 step_duration;
+//}UTSTReqFHCeLNAV3lp;
+//
+//typedef struct
+//{
+///*common*/
+// kal_uint8 band;
+// kal_uint8 freq_count;
+// kal_uint8 pwr_count;
+// kal_uint8 hpm_cal_point;
+// kal_uint8 lpm_cal_point;
+///*RX*/
+// kal_uint8 rx_elna_mode;
+// kal_uint8 rxd_elna_mode;
+// kal_uint8 is_lpm[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+// kal_uint8 rx_elna_bypass[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+// kal_uint8 rxd_elna_bypass[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+// kal_uint8 rx_cal_sequency[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+///*TX*/
+// kal_uint8 fix_pga_gain[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+// kal_uint8 pa_mode[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+// kal_uint8 vga_dac_tpc_idx[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+// kal_uint8 pa_section[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+// kal_uint16 pa_gain[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+///*RX*/
+// kal_int16 rx_cal_dl_power[UL1TST_HPM_POINT_V3+UL1TST_LPM_POINT_V3+2];
+///*UARFCN*/
+// kal_uint16 dl_uarfcn[UL1TST_FHC_FREQUENCY_NUMBER];
+// kal_uint16 ul_uarfcn[UL1TST_FHC_FREQUENCY_NUMBER];
+///*Initial file data*/
+// URfTestTXDaTaItem tx_cal_data_info;
+// UTSTPathlossV3 rx_cal_data_info;
+// UTSTPathlossV3 rxd_cal_data_info;
+//}UTSTReqFHCeLNAV3pb; //band unit it depends on local parameter cal band number expend to array
+
+/*------------------------------6295 START FHC---------------------------------------*/
+#define UL1TST_FHC_FREQUENCY_NUMBER 15
+
+typedef struct
+{
+ kal_uint8 ok;
+ kal_uint8 error_code;
+}UTSTCnfFHCV5lp;
+
+typedef struct
+{
+ kal_uint8 cal_band_number;
+ kal_uint8 cal_band[UL1TST_WCDMA_BAND_SUPPORT_V5];
+ kal_uint8 antenna_setting;
+ kal_uint8 step_duration;
+}UTSTReqFHCV5lp;
+
+typedef struct
+{
+/*common*/
+ kal_uint8 band;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 hpm_cal_point;
+ kal_uint8 lpm_cal_point;
+/*RX*/
+ kal_uint8 rx_elna_mode;
+ kal_uint8 rxd_elna_mode;
+ kal_uint8 is_lpm[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+ kal_uint8 rx_elna_bypass[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+ kal_uint8 rxd_elna_bypass[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+ kal_uint8 rx_cal_sequency[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+/*TX*/
+ //kal_uint8 fix_pga_gain[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+ kal_uint8 pa_mode[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+ kal_uint8 vga_dac_tpc_idx[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+ kal_uint8 pa_section[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+ kal_uint16 pa_gain[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+/*RX*/
+ kal_int16 rx_cal_dl_power[UL1TST_HPM_POINT_V5+UL1TST_LPM_POINT_V5];
+/*UARFCN*/
+ kal_uint16 dl_uarfcn[UL1TST_FHC_FREQUENCY_NUMBER];
+ kal_uint16 ul_uarfcn[UL1TST_FHC_FREQUENCY_NUMBER];
+ kal_uint8 rx_gain_table; //0:18dB 1:13.5dB
+ kal_uint8 rxd_gain_table; //0:18dB 1:13.5dB
+/*Initial file data*/
+ URfTestTXDaTaItem tx_cal_data_info;
+ UTSTPathlossV3 rx_cal_data_info;
+ UTSTPathlossV3 rxd_cal_data_info;
+}UTSTReqFHCV5pb; //band unit it depends on local parameter cal band number expend to array
+
+///*------------------------------6293 GET FHC RESULT----------------------------------------*/
+//typedef struct
+//{
+// kal_uint16 ul_uarfcn;
+// kal_int16 pd_value_h;
+// kal_int16 pd_value_m;
+// kal_int16 pd_value_l;
+//} UL1TST_FHC_PD_RESULT_INFO ;
+//
+//typedef struct
+//{
+// kal_uint16 dl_uarfcn;
+// kal_int16 hpm_rssi[UL1TST_HPM_POINT_V3];
+// kal_int16 lpm_rssi[UL1TST_LPM_POINT_V3];
+//} UL1TST_FHC_PATHLOSS_RESULT_INFO ;
+//
+//typedef struct
+//{
+// kal_uint8 band;
+// UL1TST_FHC_PD_RESULT_INFO pd_result[UL1TST_FHC_FREQUENCY_NUMBER];
+// UL1TST_FHC_PATHLOSS_RESULT_INFO rx_rssi_result[UL1TST_FHC_FREQUENCY_NUMBER];
+// UL1TST_FHC_PATHLOSS_RESULT_INFO rxd_rssi_result[UL1TST_FHC_FREQUENCY_NUMBER];
+//} UTSTCnfGetFHCResultV3pb ; //band unit
+//
+//typedef struct
+//{
+// kal_bool ok;
+// kal_uint8 band_number; // indicate how many band's report in peer buffer
+//} UTSTCnfGetFHCResultV3lp;
+
+/*------------------------------6295 GET FHC RESULT----------------------------------------*/
+typedef struct
+{
+ kal_uint16 ul_uarfcn;
+ kal_int16 pd_value_h;
+ kal_int16 pd_value_m;
+ kal_int16 pd_value_l;
+} UL1TST_FHC_PD_RESULT_INFO ;
+
+typedef struct
+{
+ kal_uint16 dl_uarfcn;
+ kal_int16 hpm_rssi[UL1TST_HPM_POINT_V5];
+ kal_int16 lpm_rssi[UL1TST_LPM_POINT_V5];
+} UL1TST_FHC_PATHLOSS_RESULT_INFO ;
+
+typedef struct
+{
+ kal_uint8 band;
+ UL1TST_FHC_PD_RESULT_INFO pd_result[UL1TST_FHC_FREQUENCY_NUMBER];
+ UL1TST_FHC_PATHLOSS_RESULT_INFO rx_rssi_result[UL1TST_FHC_FREQUENCY_NUMBER];
+ UL1TST_FHC_PATHLOSS_RESULT_INFO rxd_rssi_result[UL1TST_FHC_FREQUENCY_NUMBER];
+} UTSTCnfGetFHCResultV5pb ; //band unit
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 band_number; // indicate how many band's report in peer buffer
+} UTSTCnfGetFHCResultV5lp;
+/*for 93-95 co-file , "Gen":stand for any generation*/
+typedef UTSTCnfGetFHCResultV5pb UTSTCnfGetFHCResultGenpb;
+/*-----------------------------6295 GET RSSI-----------------------------------------*/
+typedef struct
+{
+ kal_bool hwAGC;
+ kal_bool rx_elna_bypass;
+ kal_bool rxd_elna_bypass;
+ kal_bool conti_rssi;
+ kal_uint8 rx_elna_mode;
+ kal_uint8 rxd_elna_mode;
+ kal_uint8 temperature;
+ kal_uint8 antenna_path;
+ kal_uint8 lpm_mode;
+ kal_uint16 uarfcn;
+ kal_uint16 rx_rf_gain;
+ kal_uint16 rxd_rf_gain;
+ kal_uint16 rx_digital_gain;
+ kal_uint16 rxd_digital_gain;
+ kal_uint8 rx_gain_table;
+ kal_uint8 rxd_gain_table;
+} UTSTReqGetRSSIV5lp;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 rx_elna_bypass;
+ kal_uint8 rxd_elna_bypass;
+ kal_uint8 rx_lna_mode;
+ kal_uint8 rxd_lna_mode;
+ kal_uint16 uarfcn;
+ kal_int16 rx_rssi;
+ kal_int16 rxd_rssi;
+ kal_uint16 rx_used_gain;
+ kal_uint16 rxd_used_gain;
+} UTSTCnfGetRSSIV5lp;
+/*for 93-95 co-file , "Gen":stand for any generation*/
+typedef UTSTCnfGetRSSIV5lp UTSTCnfGetRSSIGenlp;
+/*-----------------------------6295 power to gain-----------------------------------------*/
+typedef struct
+{
+ kal_bool rx_elna_bypass;
+ kal_bool rxd_elna_bypass;
+ kal_uint8 antenna_path;
+ kal_uint8 lpm_mode;
+ kal_uint8 rx_elna_mode;
+ kal_uint8 rxd_elna_mode;
+ kal_uint8 rx_cal_sequency;
+ kal_int16 rx_dl_power;
+ kal_uint8 rx_gain_table;
+ kal_uint8 rxd_gain_table;
+} UTSTReqPwrtoGainV5lp;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 rx_digital_gain;
+ kal_uint16 rxd_digital_gain;
+ kal_uint16 rx_rf_gain;
+ kal_uint16 rxd_rf_gain;
+}UTSTCnfPwrtoGainV5lp;
+
+/*-----------------------------6295 lna to gain-----------------------------------------*/
+typedef struct
+{
+ kal_bool rx_elna_bypass;
+ kal_bool rxd_elna_bypass;
+ kal_uint8 band;
+ kal_uint8 antenna_path;
+ kal_uint8 lpm_mode;
+ kal_uint8 rx_lna_mode;
+ kal_uint8 rxd_lna_mode;
+ kal_uint8 rx_elna_mode;
+ kal_uint8 rxd_elna_mode;
+ kal_uint8 rx_gain_table;
+ kal_uint8 rxd_gain_table;
+} UTSTReqLnatoGainV5lp;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 rx_digital_gain;
+ kal_uint16 rxd_digital_gain;
+ kal_uint16 rx_rf_gain;
+ kal_uint16 rxd_rf_gain;
+ kal_int16 dl_power;
+}UTSTCnfLnatoGainV5lp;
+
+/*----------------------------------------------------------------------*/
+/*-----------------------------6293 ATE tool T-put-----------------------------------------*/
+//trigger IQ dump
+typedef struct
+{
+ kal_uint16 enable_iq_dump; //enable or disable IQ dump mode.
+ kal_uint16 ant_idx; //0=RX main antenna, 1=RX diversity antenna.
+}UTSTReqTriggerIqDumpModeV3lp; // request local parameter
+
+typedef struct
+{
+ kal_uint16 dump_status; //1=enable IQ dump mode successfully
+}UTSTCnfTriggerIqDumpModeV3lp; // conform local parameter
+
+//get IQ dump result
+typedef struct
+{
+ kal_uint16 is_data_ready; //1=IQ raw data is ready
+ kal_uint16 data_section_length; //length of IQ raw data in corresponding peer buffer
+}UTSTCnfGetIqDumpResultV3lp; // confirm local parameter
+
+typedef struct
+{
+ kal_int16 i_data;
+ kal_int16 q_data;
+}UTSTCnfGetIqDumpResultV3pb;// confirm peer buffer :RFEQ unit
+//set RFEQ
+typedef struct
+{
+ kal_uint16 rfeq_set_num; //number of subband RFEQ to update
+}UTSTReqSetRfeqSubbandV3lp; // request local parameter
+
+typedef struct
+{
+ kal_uint16 band; //UMTS band
+ kal_uint16 subband_idx; //which sub-band that user want to fill
+ kal_uint16 max_uarfcn; //max uarfcn of this subband
+ kal_uint8 ant_idx; //which antenna should be write in this command. 0: RX Main, 1:RX Div
+ kal_bool rfeq_enable; //RFEQ enable or not.
+ kal_int16 rfeq_coef_real[7]; //RFEQ real part coefficient. 7 taps.
+ kal_int16 rfeq_coef_imag[7]; //RFEQ image part coefficient. 7 taps.
+}UTSTReqSetRfeqSubbandV3pb; // request peer buffer : subband unit
+
+typedef struct
+{
+ kal_uint16 is_rfeq_set; //1=RFEQ is set to NVRAM successfully
+}UTSTCnfSetRfeqSubbandV3lp; // confirm local parameter
+
+/*----------------------------------------------------------------------*/
+/*-----------------------------6295 get/set NSFT TX POWER offset-------------------------*/
+typedef struct
+{
+ kal_uint8 band;
+}UTSTReqGetTXpowerOffsetV5lp;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_int16 offset;
+}UTSTCnfGetTXpowerOffsetV5lp;
+
+typedef struct
+{
+ kal_bool updatenvram;
+ kal_uint8 band;
+ kal_uint16 ul_uarfcn;
+ kal_int16 offset;
+}UTSTReqSetTXpowerOffsetV5lp;
+
+typedef struct
+{
+ kal_bool ok;
+}UTSTCnfSetTXpowerOffsetV5lp;
+/*---------------------------------------------------------------------------------------*/
+typedef struct
+{
+ URfTestCmdType urf_test_cmd_type;
+ void (*handler)( ilm_struct* );
+}UL1TST_RF_TEST_HANDLER_T;
+/* ------------------------------------------------------------------------------------------- *\
+|* U_RESET_BIT_COUNT *|
+\* ------------------------------------------------------------------------------------------- */
+
+typedef struct
+{
+ kal_uint32 meaningless;
+} URFTestCmdResetBERResult;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint32 u4TotalBits;
+ kal_uint32 u4ErrorBits;
+} URFTestResultResetBERResult;
+/*---------------------------------------------------------------------------------------------*/
+typedef union
+{
+ kal_uint8 m_u1RfBand;
+ kal_uint8 m_u1PwrCtrlMode;
+ kal_uint8 m_u1TableType; // 1: special table for calibration, 2: normal table
+ kal_uint8 m_u1ILPCStep;
+ kal_uint16 m_u2TxPclIndex;
+ kal_uint16 rf_band_idx;
+/* PA drift compensation */
+ kal_uint8 is_PaDrift; /*R8< \brief the parameter to UL1 for PA drift compensation setting (1: turn on, 0: turn off) */
+/* R8 RF tool */
+ kal_uint8 is_5mhz;
+ kal_uint8 is_main;
+ kal_uint32 m_rBSIData;
+ kal_uint32 m_rBSIAddr;
+/* DCXO development */
+ kal_uint32 m_u4CapId;
+/* WM Switch */
+ kal_uint8 ubin_fdd_mode_init; // 1 : UBIN mode Init 3G FDD , 0 : UBIN mode de-init 3G FDD
+ URfTestCmdAFC afc;
+ URfTestCmdRSCP rscp;
+ URfTestCmdType query_op_code;
+ URfTestCmdTxDPCh txdpch;
+ URfTestCmdRxDPCh rxdpch;
+ URfTestCmdTxAccess txaccess;
+ URFTestCmdReloadNVRAM reload;
+ URfTestCmdSetMIPICodeWord set_mipi_cw_param;
+ URfTestCmdGetRfTempSensor rfTemperature;
+ UL1D_RF_TX_PA_APC_REQ_T m_rTxPaApc;
+ UL1D_RF_GET_PWR_THR_REQ_T m_rGetPwrThr;
+ kal_int32 m_i4IcsCellPower; /**< \brief pass cell power to UL1 to choose the best initial gain for ICS */
+ URFTestCmdResetBERResult resetBERResult;
+ URfTestCmdSetCalData set_cal_data_command_lp; //after 6292
+ URfTestCmdGetCalData get_cal_data_command_lp; //after 6292
+ //UTSTReqGetCalInfoV3lp get_cal_info_v3_lp; //6293 get FHC infomation from RFD & FEC
+ //UTSTReqFHCeLNAV3lp fhc_control_v3_lp; //6293 FHC flow control infomation
+ //UTSTReqGetRSSIV3lp get_rssi_v3_lp; //6293 RF tool RSSI
+ //UTSTReqPwrtoGainV3lp pwr_to_gain_v3_lp; //6293 Tradk, NSFT
+ //UTSTReqLnatoGainV3lp lna_to_gain_v3_lp; //6293 RF tool get RSSI calculator
+ //URfTestCmd_SetRxTxCalData_ReqParam_V3 set_RxTx_cal_data_command_lp; //after6293
+ //URfTestCmd_GetRxTxCalData_ReqParam_V3 get_RxTx_cal_data_command_lp; //after6293
+ UTSTCmdRSCPV3lp rscp_v3_lp;
+ UTSTCmdAFCV3lp afc_v3_lp;
+ //UTSTCmdLPCal pga_type_v3_lp;
+ UTSTReqGetCalInfoV5lp get_cal_info_v5_lp; //6295 get FHC infomation from RFD & FEC
+ UTSTReqFHCV5lp fhc_control_v5_lp; //6295 FHC flow control infomation
+ URfTestCmd_GetRxTxCalData_ReqParam_V5 get_RxTx_cal_data_command_v5_lp; //after6295
+ URfTestCmd_SetRxTxCalData_ReqParam_V5 set_RxTx_cal_data_command_v5_lp; //after6295
+ UTSTReqGetRSSIV5lp get_rssi_v5_lp; //6295 RF tool RSSI
+ UTSTReqPwrtoGainV5lp pwr_to_gain_v5_lp; //6295 Tradk, NSFT
+ UTSTReqLnatoGainV5lp lna_to_gain_v5_lp; //6295 RF tool get RSSI calculator
+ UTSTReqTriggerIqDumpModeV3lp trigger_iq_dump_v3_lp; //Trigger IQ dump
+ UTSTReqSetRfeqSubbandV3lp set_rfeq_subband_v3_lp; //Set RFEQ subband result
+ UTSTReqGetTXpowerOffsetV5lp get_tx_power_offset_v5_lp; //6295 get TX power offset in NSFT
+ UTSTReqSetTXpowerOffsetV5lp set_tx_power_offset_v5_lp; //6295 set TX power offset in NSFT
+}URfTestCmdParam;
+
+typedef union
+{
+ kal_bool ok;
+ kal_uint8 nvramAccessResult;
+ kal_uint8 currentLnaMode;
+ kal_int16 m_u2PwrDetResult;
+ kal_uint32 bsi_data;
+ kal_uint32 m_u4MaxCapId;
+ FT_UMTS_MsCapabilityEx m_rTargetCapability;
+ FT_UMTS_NSFTLinkStatusReport m_rNSFTLinkStatusReport;
+ URfNsftListModeCnf m_rNSFTListModeLinkStatusReport;
+ UL1D_RF_NSFT_BET_BIT_CNT_FOR_BER_CNF_T m_rNSFTBERResult;
+ URfTestResultAFC afc;
+ URfTestResultRFID rfid;
+ URfCheckIfFuncExist CheckIfFuncExist;
+ URfTestResultAFC_Ex afc_ex;
+ URfTestResultRxDPCh rx_dpch;
+ URfTestResultPwrDtDac pwr_dt_dac;
+ URfTestResultPwrDtStep pwr_dt_step;
+ URfTestResultGetRfTempSensor rfTemperature;
+ URfTestResultGetMIPICodeWord get_mipi_cw_param;
+ URfTestResultPwrDtDefaultThr pwr_dt_default_thr;
+ URfTestResultReplaceGainTable replace_gain_table;
+ URfTestResultRfTemperatureInfo rfTemperatureInfo;
+ URfTestResultUbinModeSetup ubin_mode_setup_result;
+ URfTestResultNSFTRSSI ft_rpt_nsft_rssi; /*for getting RSSI value during NSFT*/
+ URFTestResultResetBERResult resetBERResult;
+ URfTestResultCalDataProcess cal_data_process_result_lp; //after 6292
+ URfTestResultDPCHTXFIXPGALP dpch_tx_fix_pga_gain_lp;
+ URfTestResultFHCeLNALP fhc_elna_result_lp;
+ URfTestResultRSSIeLNALP rssi_elna;
+ //UTSTCnfGetCalInfoV3lp cnf_get_cal_info_v3_lp; //6293 get calibration information
+ //UTSTCnfFHCeLNAV3lp cnf_fhc_control_v3_lp; //6293 FHC flow control infomation
+ //UTSTCnfGetFHCResultV3lp cnf_fhc_report_v3_lp; //6293 fhc report
+ //UTSTCnfGetRSSIV3lp cnf_get_rssi_v3_lp; //6293 RF tool RSSI
+ //UTSTCnfPwrtoGainV3lp cnf_pwr_to_gain_v3_lp; //6293 Tradk, NSFT
+ //UTSTCnfLnatoGainV3lp cnf_lna_to_gain_v3_lp; //6293 RF tool get RSSI calculator
+ //URfTestCmd_SetRxTxCalData_CnfParam_V3 set_RxTx_cal_data_process_result_lp; //after 6293
+ //URfTestCmd_GetRxTxCalData_CnfParam_V3 get_RxTx_cal_data_process_result_lp; //after 6293
+ //UTSTResultLPCal cnf_pga_type_v3_lp;
+ UTSTCnfGetCalInfoV5lp cnf_get_cal_info_v5_lp; //6295 get calibration information
+ UTSTCnfFHCV5lp cnf_fhc_control_v5_lp; //6295 FHC flow control infomation
+ UTSTCnfGetFHCResultV5lp cnf_fhc_report_v5_lp; //6295 fhc report
+ URfTestCmd_GetRxTxCalData_CnfParam_V5 get_RxTx_cal_data_process_result_v5_lp; //6295 get data
+ URfTestCmd_SetRxTxCalData_CnfParam_V5 set_RxTx_cal_data_process_result_v5_lp; //6295 set data
+ UTSTCnfGetRSSIV5lp cnf_get_rssi_v5_lp; //6295 RF tool RSSI
+ UTSTCnfPwrtoGainV5lp cnf_pwr_to_gain_v5_lp; //6295 Tradk, NSFT
+ UTSTCnfLnatoGainV5lp cnf_lna_to_gain_v5_lp; //6295 RF tool get RSSI calculator
+ UTSTCnfTriggerIqDumpModeV3lp cnf_trigger_iq_dump_v3_lp; //Trigger IQ dump
+ UTSTCnfGetIqDumpResultV3lp cnf_get_iq_data_v3_lp; //Get IQ dump result
+ UTSTCnfSetRfeqSubbandV3lp cnf_set_rfeq_subband_v3_lp; //Set RFEQ subband result
+ UTSTCnfGetTXpowerOffsetV5lp cnf_get_tx_power_offset_v5_lp; //6295 get TX power offset in NSFT
+ UTSTCnfSetTXpowerOffsetV5lp cnf_set_tx_power_offset_v5_lp; //6295 set TX power offset in NSFT
+} URfTestResultParam;
+
+typedef struct
+{
+ FT_HDR
+ URfTestCmdType type;
+ URfTestCmdParam param;
+} ft_urf_test_req_T;
+
+typedef struct
+{
+ FT_HDR
+ URfTestCmdType type;
+ URfTestResultParam param;
+} ft_urf_test_cnf_T;
+
+typedef ft_urf_test_req_T ft_to_ul1tst_struct;
+typedef ft_urf_test_cnf_T ul1tst_to_ft_struct;
+
+typedef ft_urf_test_req_T ft_urf_test_req_id_struct;
+typedef ft_urf_test_cnf_T ft_urf_test_cnf_id_struct;
+
+#endif // #if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__)
+
+#endif // #ifndef __FT_MSG_UL1RF_H__
diff --git a/mcu/interface/middleware/meta/ft_msg_ul1rf_gen97.h b/mcu/interface/middleware/meta/ft_msg_ul1rf_gen97.h
new file mode 100644
index 0000000..6d0caa0
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_msg_ul1rf_gen97.h
@@ -0,0 +1,2526 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg_ul1rf.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * Messages definition of UL1 RF category of FT Library
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
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+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#ifndef __FT_MSG_UL1RF_H__
+#define __FT_MSG_UL1RF_H__
+#include "ft_msg_common.h"
+#include "ul1d_rf_public.h"
+
+#include "kal_public_defs.h"
+
+
+#define UL1TST_LNA_MODE_NUMBER_EXT 6
+
+#define UL1_DPD_FDB_NUM (CAL_UARFCN_SECTION * UL1_DPD_MAX_PA_LEVEL_NUM) /* refer to f_db in U_sDPD_COMMON_CAL */
+#define UL1_DPD_MAX_PTAR_TH_NUM (CAL_UARFCN_SECTION * UL1_DPD_MAX_PA_LEVEL_NUM) /* refer to pa_idx_th in U_sDPD_COMMON_CAL */
+#define UL1_DPD_MAX_IMPLICIT_RSV_NUM 0
+#define UL1_DPD_MAX_IMPLICIT_NUM (UL1_DPD_FDB_NUM + UL1_DPD_MAX_PTAR_TH_NUM + UL1_DPD_MAX_IMPLICIT_RSV_NUM)
+#define UL1_DPD_MAX_SET_ALL_DATA_NUM (7) /* floor(MMRF_MAX_TOOL_PEER_SIZE_PER_CMD / sizeof(URfTestCmd_SetDpdPaAndDpdFacCalAll_OneBand)) */
+#define UL1_DPD_MAX_GET_ALL_DATA_NUM (UL1_DPD_MAX_SET_ALL_DATA_NUM)
+#define UL1_DPD_MAX_SET_PARTIAL_DATA_NUM (239) /* floor(MMRF_MAX_TOOL_PEER_SIZE_PER_CMD / sizeof(URfTestCmd_SetDpdPaAndDpdFacCalPartial_OneBand)) */
+
+/*******************************************************************************
+*
+* Message structures defined for UL1 TST Interface
+*
+*******************************************************************************/
+#if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__)
+
+//type1: communicate with ul1tst module, and send the confirm without waiting!
+//type2: communicate with u1ltst module, and wait their confirm, then send back to PC
+//type3: invoke UL1D's API, then send confirm to PC side.
+//type4: no operation, only get FT task's current status, and reply to PC side
+
+typedef enum
+{
+ URF_TEST_CMD_TXACCESS = 0,
+ URF_TEST_CMD_STOP = 1,
+ URF_TEST_CMD_TX_DPCH = 2,
+ URF_TEST_CMD_RX_DPCH = 3,
+ URF_TEST_CMD_RSSI = 4,
+ URF_TEST_CMD_RSCP = 5,
+ URF_TEST_CMD_AFC = 6,
+ URF_TEST_CMD_TX_PAAPC = 7,
+ URF_TEST_CMD_GET_RFID = 8,
+ URF_TEST_CMD_CONFIG_HWTPC = 9,
+ URF_TEST_CMD_GET_PWR_DT_STEP = 10,
+ URF_TEST_CMD_GET_PWR_DT_DAC = 11,
+ URF_TEST_CMD_GET_PWR_DT_DEFAULT_THR = 12,
+ URF_TEST_CMD_SET_IMMEDIATE_BSI = 13,
+ URF_TEST_CMD_GET_IMMEDIATE_BSI = 14,
+ URF_TEST_CMD_CONTINUOUS_RX = 15,
+ URF_TEST_CMD_START_FHC = 16,
+ URF_TEST_CMD_SET_TXDAC_DATA = 17,
+ URF_TEST_CMD_GET_PWR_DET_MEASURE_RES = 18,
+ URF_TEST_CMD_SET_PWR_CTRL_MODE = 19,
+ URF_TEST_CMD_REPLACE_GAIN_TABLE_FOR_CAL = 20,
+ URF_TEST_CMD_START_FHC_NO_WAIT = 21,
+ URF_TEST_CMD_GET_FHC_RESULT = 22,
+ URF_TEST_CMD_QUERY_TARGET_CAPABILITY = 23,
+ URF_TEST_CMD_START_NSFT = 24,
+ URF_TEST_CMD_GET_BIT_COUNT_FOR_SINGLE_ENDED_BER = 25,
+ URF_TEST_CMD_NSFT_SET_ILPC_STEP = 26,
+ URF_TEST_CMD_START_NSFT_EX = 27,
+ URF_TEST_CMD_SET_PA_OCT_LEVEL_DATA = 28,
+ URF_TEST_CMD_START_HSDPA_NSFT = 29,
+ URF_TEST_CMD_START_HSUPA_NSFT = 30,
+ URF_TEST_CMD_START_FHC_EX = 31,
+ URF_TEST_CMD_GET_FHC_EX_RESULT = 32,
+ URF_TEST_CMD_GET_CURRENT_LNA_MODE = 33,
+ URF_TEST_CMD_SET_CAPID = 34,
+ URF_TEST_CMD_GET_MAX_CAPID = 35,
+ URF_TEST_CMD_AFC_EX = 36,
+ URF_TEST_CMD_RSSI_RXD = 37,
+ URF_TEST_CMD_GET_CURRENT_RXD_LNA_MODE = 38,
+ URF_TEST_CMD_SET_RX_BANDWIDTH = 39,
+ URF_TEST_CMD_SET_RX_ANTENNA = 40,
+ URF_TEST_CMD_SET_TX_PA_DRIFT_COMPENSATION = 41,
+ URF_TEST_CMD_SET_ICS_CELL_POWER = 42,
+ URF_TEST_CMD_GET_RF_TEMP_BSI = 43,
+ URF_TEST_CMD_GET_RF_CAPABILITY = 44,
+ URF_TEST_CMD_START_NSFT_LIST_MODE = 45,
+ URF_TEST_CMD_SET_RF_MIPI_CODEWORD = 46,
+ URF_TEST_CMD_GET_RF_MIPI_CODEWORD = 47,
+ URF_TEST_CMD_GET_TEMPERATURE_INFO = 48,
+ URF_TEST_CMD_RX_GAIN_SWEEP = 49,
+ URF_TEST_CMD_RELOAD_NVRAM = 50,
+ URF_TEST_CMD_CHECK_IF_FUNC_EXIST = 51,
+ URF_TEST_CMD_UBIN_MODE_SETUP = 52,
+ URF_TEST_CMD_SET_RX_PATH_LOSS = 53,
+ URF_TEST_CMD_GET_RX_PATH_LOSS = 54,
+ URF_TEST_CMD_RSSI_LPM = 55,
+ URF_TEST_CMD_RSSI_RXD_LPM = 56,
+ URF_TEST_CMD_CONTINUOUS_RX_LPM = 57,
+ URF_TEST_CMD_NSFT_GET_RSSI = 58,
+ URF_TEST_CMD_SET_RX_CALIBRATION_DATA = 59,
+ URF_TEST_CMD_GET_RX_CALIBRATION_DATA = 60,
+ URF_TEST_CMD_SET_TX_CALIBRATION_DATA = 61,
+ URF_TEST_CMD_GET_TX_CALIBRATION_DATA = 62,
+ URF_TEST_CMD_NSFT_RESET_BER_RESULT = 66,
+ URF_TEST_CMD_FHC_ELNA = 67,
+ URF_TEST_CMD_GET_RSSI_ELNA = 68,
+ URF_TEST_CMD_GET_CONTINUOUS_RSSI_ELNA = 69,
+ URF_TEST_CMD_TX_DPCH_FIX_PGA_GAIN = 70,
+ URF_TEST_CMD_GET_CALIBRATION_INFO_V3 = 71,
+ URF_TEST_CMD_START_FHC_V3 = 72,
+ URF_TEST_CMD_GET_FHC_RESULT_V3 = 73,
+ URF_TEST_CMD_GET_RSSI_V3 = 74,
+ URF_TEST_CMD_GAIN_SELECT_PWR_V3 = 75,
+ URF_TEST_CMD_GAIN_SELECT_LNA_V3 = 76,
+ URF_TEST_CMD_GET_RXTX_CALIBRATION_DATA_V3 = 77, //after 6293
+ URF_TEST_CMD_SET_RXTX_CALIBRATION_DATA_V3 = 78, //after 6293
+ URF_TEST_CMD_RSCP_V3 = 79,
+ URF_TEST_CMD_AFC_V3 = 80,
+ URF_TEST_CMD_AFC_CAPID_V3 = 81,
+ URF_TEST_CMD_LOW_POWER_CAL_V3 = 82,
+ URF_TEST_CMD_GET_CALIBRATION_INFO_V5 = 83, //after 6295
+ URF_TEST_CMD_START_FHC_V5 = 84, //after 6295
+ URF_TEST_CMD_GET_FHC_RESULT_V5 = 85, //after 6295
+ URF_TEST_CMD_GET_RXTX_CALIBRATION_DATA_V5 = 86, //after 6295
+ URF_TEST_CMD_SET_RXTX_CALIBRATION_DATA_V5 = 87, //after 6295
+ URF_TEST_CMD_TRIGGER_IQ_DUMP_MODE_V3 = 88, //support 6293 Auto IQ dump
+ URF_TEST_CMD_GET_IQ_DUMP_RESULT_V3 = 89, //support 6293 Auto IQ dump
+ URF_TEST_CMD_SET_RFEQ_SUBBAND_RESULT_V3 = 90, //support 6293 Auto IQ dump
+ URF_TEST_CMD_GET_RSSI_V5 = 91, //after 6295
+ URF_TEST_CMD_GAIN_SELECT_PWR_V5 = 92, //after 6295
+ URF_TEST_CMD_GAIN_SELECT_LNA_V5 = 93, //after 6295
+ URF_TEST_CMD_GET_TX_POWER_OFFSET_V5 =94, //after 6295
+ URF_TEST_CMD_SET_TX_POWER_OFFSET_V5 =95, //after 6295
+ URF_TEST_CMD_GET_CALIBRATION_INFO_V7 = 96, //6297
+ URF_TEST_CMD_FHC_V7 = 97, //6297
+ //URF_TEST_CMD_GET_FHC_RESULT_V7 = 98, //6297
+ URF_TEST_CMD_GET_RSSI_V7 = 98, //6297
+ URF_TEST_CMD_GAIN_SELECT_PWR_V7 = 99, //6297
+ URF_TEST_CMD_GAIN_SELECT_LNA_V7 = 100, //6297
+ URF_TEST_CMD_GET_RXTX_CALIBRATION_DATA_V7 = 101, //6297
+ URF_TEST_CMD_SET_RXTX_CALIBRATION_DATA_V7 = 102, //6297
+ URF_TEST_CMD_TX_POWER_ADJUST_V7 = 103, //6297
+ URF_TEST_CMD_TX_DPCH_V7 = 104, //6297
+/*----------------------------------------------------------------------------------------------------*/
+ URF_TEST_CMD_GP_TOOL_COMMAND_START,
+ URF_TEST_CMD_END,
+ URF_TEST_CMD_MAX = 0x7FFFFFFF
+} URfTestCmdType;
+typedef struct
+{
+ kal_uint16 ul_uarfcn; /* UL uarfcn range:????Read from NVRAM?? (9612 ~ 9888) */
+ kal_uint16 dl_psc; /* 0~511. */
+ kal_uint16 signature; /* 0~15, for single signature decision. */
+ kal_uint8 pa_mode; /* 0: High 1: Middle 2: Low */
+ kal_int8 init_power; /* Assume cpich_rscp=0, ul_interference=0. */
+ kal_uint8 power_step; /* Preamble power ramping step. 1 ~ 8dB */
+ kal_uint8 max_retrans; /* 1~64. */
+ kal_uint16 dl_uarfcn;
+ kal_uint8 asc;
+} URfTestCmdTxAccess;
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+#if 0 // no use
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+#define FDD_MAX_FREQ_LIST 36
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_uint16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_uint8 temperature;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdRSSI;
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+typedef struct
+{
+ kal_bool pscan_before_cell_search; /* True if UL1TST needs power scan before cell search/RSCP. */
+ kal_uint16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+ kal_uint8 sample_num_per_cell;
+ kal_bool read_sfn; /* True if we need to do SFN measurement for the found cell. */
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdRSCP; //old
+
+typedef struct
+{
+ kal_uint16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+} UTSTCmdRSCPV3lp; //new
+
+
+typedef struct
+{
+ kal_int16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+ kal_uint16 afc_dac;
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} URfTestCmdAFC; //old
+
+typedef struct
+{
+ kal_int16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+ kal_uint16 afc_dac;
+} UTSTCmdAFCV3lp; //new
+
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+
+typedef struct
+{
+
+ kal_bool b_afc_dac_valid;
+ kal_uint16 u2_afc_dac;
+ kal_uint8 u1_loopbackType;
+ kal_uint8 u1_frame_shift;
+ kal_uint8 u1_rmc_type;
+ kal_uint8 u1_ctfc[4];
+ kal_uint8 u1_bit_pattern;
+
+ kal_int16 i2_dl_freq;
+ kal_int16 i2_dl_psc;
+ kal_int16 i2_dl_ovsf;
+
+ kal_int16 i2_ul_freq;
+ kal_uint16 u2_ul_tfci;
+ kal_uint32 u4_ul_sc_code;
+ kal_bool b_iq_pwr_valid;
+ kal_uint8 u1_dpcch_pwr;
+ kal_uint8 u1_dpdch_pwr;
+
+}UL1D_RF_NSFT_REQ_T;
+/**
+ * NSFT List Mode command parameter
+ */
+typedef struct
+{
+ kal_bool afc_dac_valid;
+ kal_uint16 afc_dac;
+ kal_uint8 loopbackType;
+ kal_uint8 frame_shift;
+ kal_uint8 rmc_type;
+ kal_uint8 ctfc[4];
+ kal_uint8 bit_pattern;
+/* DL parameters */
+ kal_int16 dl_freq[50];
+ kal_int16 dl_psc;
+ kal_int16 dl_ovsf;
+/* UL parameters */
+ kal_int16 ul_freq[50];
+ kal_uint16 ul_tfci;
+ kal_uint32 ul_sc_code;
+ kal_bool iq_pwr_valid;
+ kal_uint8 dpcch_pwr;
+ kal_uint8 dpdch_pwr;
+/* common parameters */
+ kal_uint8 valid_freq;
+ kal_uint16 test_item[50];
+/* the time settings, unit = frame */
+ kal_uint16 full_test_time;
+ kal_uint8 ready_time;
+ kal_uint8 sync_time;
+ kal_uint8 retrial;
+ kal_uint16 test_time;
+ kal_uint16 rx_rssi_start_time[3];
+ kal_uint8 rx_rssi_duration[3];
+ kal_uint16 rx_ber_start_time;
+ kal_uint8 rx_ber_duration;
+ kal_uint16 ILPC_ABC_time;
+ kal_uint16 ILPC_EF_time;
+ kal_uint16 ILPC_GH_time;
+ kal_uint16 transition_time;
+} URfNsftListModeReq;
+/**
+ * HSPA command parameter
+ */
+typedef struct
+{
+ kal_bool b_afc_dac_valid;
+ kal_uint16 u2_afc_dac;
+ kal_uint8 u1_loopbackType;
+ kal_uint8 u1_frame_shift;
+ kal_uint8 u1_rmc_type;
+ kal_uint8 u1_ctfc[4];
+ kal_uint8 u1_bit_pattern;
+
+ kal_int16 i2_dl_freq;
+ kal_int16 i2_dl_psc;
+ kal_int16 i2_dl_ovsf;
+
+ kal_int16 i2_ul_freq;
+ kal_uint16 u2_ul_tfci;
+ kal_uint32 u4_ul_sc_code;
+ kal_bool b_iq_pwr_valid;
+ kal_uint8 u1_dpcch_pwr;
+ kal_uint8 u1_dpdch_pwr;
+ kal_uint8 subTest;
+}URfTestCmdHspaNsft;
+
+typedef struct
+{
+ kal_uint16 measure_count;
+} URfTestCmdGetRfTempSensor;
+
+typedef struct
+{
+ kal_bool bDataValid;
+ kal_uint32 u4TotalBits;
+ kal_uint32 u4ErrorBits;
+}UL1D_RF_NSFT_BET_BIT_CNT_FOR_BER_CNF_T;
+
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi[ FDD_MAX_FREQ_LIST ];
+} URfTestResultRSSI;
+
+// R8 both rx path RSSI result
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi_rxd[ FDD_MAX_FREQ_LIST ];
+} URfTestResultRSSIRxD;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_int32 NSFT_RSSI;
+ kal_int32 NSFT_RSSI_RXD;
+ kal_int32 cmd_location;
+}URfTestResultNSFTRSSI;
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+typedef struct
+{
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_int32 tm; /* Cell frame boundary offset to LST */
+ kal_int16 off; /* Cell frame number offset to LST */
+ kal_bool sttd; /* True for STTD used. */
+ kal_uint8 sample_num;
+ kal_int16 rscp_sum;
+ kal_int16 freq_error;
+} URfTest_cpich_result_T;
+
+#define UL1_MAX_NUM_MEAS_CELL 32
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_cell;
+ URfTest_cpich_result_T cpich_result[ UL1_MAX_NUM_MEAS_CELL ];
+} URfTestResultRSCP; //old
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_cell;
+ URfTest_cpich_result_T cpich_result[ UL1_MAX_NUM_MEAS_CELL ];
+} UTSTestResultRSCPV3lp; //new
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc;
+ kal_int32 tm;
+ kal_bool sttd;
+ kal_uint8 rscp_sum;
+ kal_int16 freq_error;
+
+}URfTestResultAFC; //old
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc;
+ kal_int32 tm;
+ kal_bool sttd;
+ kal_uint8 rscp_sum;
+ kal_int16 freq_error;
+}UTSTestResultAFCV3lp; //new
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc;
+ kal_int32 tm;
+ kal_bool sttd;
+ kal_uint8 rscp_sum;
+ kal_int32 freq_error;
+}URfTestResultAFC_Ex; //old
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+typedef struct
+{
+ kal_uint32 m_u4Rfid;
+}URfTestResultRFID;
+
+typedef struct
+{
+ kal_uint8 m_u1Result;
+
+}URfTestResultPwrDtStep;
+
+typedef struct
+{
+ kal_uint16 m_u2Result;
+
+}URfTestResultPwrDtDac;
+
+typedef struct
+{
+ kal_uint8 m_u1Result;
+
+}URfTestResultPwrDtDefaultThr;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_int8 m_i1CurGainTableState;
+
+}URfTestResultReplaceGainTable;
+
+typedef struct
+{
+ kal_uint32 capability;
+ kal_uint32 band_support;
+ kal_uint32 rxd_band_support;
+ kal_uint32 padrift_band_support;
+ kal_uint32 wcdma_dpd_band_support;
+}FT_UMTS_MsCapabilityEx;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 link_status;
+}FT_UMTS_NSFTLinkStatusReport;
+
+typedef struct
+{
+ kal_bool ok; /*<! ok indicator */
+ kal_uint32 sum; /*<! the sum of measure_count times of temp sensor result */
+} URfTestResultGetRfTempSensor;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 link_status;
+} URfNsftListModeCnf;
+
+typedef struct
+{
+ kal_uint16 rf_band_idx;
+ kal_uint16 power_level_num;
+ kal_uint16 code_word_num;
+} URfTestCmdSetMIPICodeWord;
+
+typedef struct
+{
+ kal_uint8 status;
+ kal_uint16 power_level_num;
+ kal_uint16 code_word_num;
+} URfTestResultGetMIPICodeWord;
+
+typedef struct
+{
+ kal_int16 status;
+ kal_int16 tadc_dac;
+ kal_int16 temperature;
+ kal_int16 temp_idx;
+} URfTestResultRfTemperatureInfo;
+
+typedef struct
+{
+ kal_uint32 result; // 1: support 0: not support
+ kal_uint32 query_op_code; // query op code
+}URfCheckIfFuncExist;
+
+typedef enum
+{
+ CNF_SUCCESS = 0,
+ CNF_GENERAL_FAIL = 1,
+ CNF_NVRAM_READ_FAIL = 2,
+ CNF_FREQ_INVALID = 3,
+ CNF_CMD_INVALID = 4,
+ CNF_NVRAM_SET_FAIL = 5,
+ CNF_TX_DATA_CHECK_FAIL = 6,
+ CNF_TX_STRUCTURE_ERROR = 7,
+ CNF_RX_STRUCTURE_ERROR = 8,
+ CNF_TX_VGA_FREQ_CHECK_FAIL=9,
+ CNF_TX_PWR_DT_FREQ_CHECK_FAIL=10,
+ CNF_GET_RXTX_PEER_BUF_OVERFLOW=11, //after 6293
+ CNF_ADDRECORD_FAIL=12, //after 6293
+ CNF_GET_RXTX_PEER_BUF_ZERO=13 //after 6295
+} NVRAM_ACCESS_RESULT_MSG;
+
+/*TX/RX calibration data------------------------------------------------------------------------------------->*/
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+/*97 get/set command optimization Req--------------------------*/
+typedef struct
+{
+ kal_uint8 rxm_band_num; //the number of bands to GET
+ kal_uint8 rxd_band_num;
+ kal_uint8 tx_band_num;
+ kal_uint8 rxm_band_index[8]; //Band index
+ kal_uint8 rxd_band_index[8];
+ kal_uint8 tx_band_index[8];
+}UTSTReqGetRxTxCalDataV7lp;
+typedef struct
+{
+ kal_bool is_uplate_to_NVRAM; //write to NVRAM or not
+ kal_uint8 rxm_count; //the number of bands to SET
+ kal_uint8 rxd_count;
+ kal_uint8 tx_count;
+ kal_uint16 rxm_offset;
+ kal_uint16 rxd_offset;
+ kal_uint16 tx_offset;
+}UTSTReqSetRxTxCalDataV7lp; //Local parameter of request after 6295 set Rx/Tx cal data command
+
+/*97 get/set command optimization Cnf--------------------------*/
+typedef struct
+{
+ kal_bool ok;
+ NVRAM_ACCESS_RESULT_MSG error_check; //for calibration data checking
+ kal_uint8 rxm_count; //the number of bands to GET
+ kal_uint8 rxd_count;
+ kal_uint8 tx_count;
+ kal_uint8 padding;
+ kal_uint16 rxm_offset; //offset of data in peer buffer
+ kal_uint16 rxd_offset;
+ kal_uint16 tx_offset;
+}UTSTCnfGetRxTxCalDataV7lp; //Local parameter of confirm after 6297 get Rx/Tx cal data command
+typedef struct
+{
+ kal_bool ok;
+ NVRAM_ACCESS_RESULT_MSG error_check; //for calibration data checking
+ kal_uint8 rxm_result_num; //the number of bands to SET
+ kal_uint8 rxd_result_num;
+ kal_uint8 tx_result_num;
+ NVRAM_ACCESS_RESULT_MSG rxm_result[8]; //result status of SET command for each band
+ NVRAM_ACCESS_RESULT_MSG rxd_result[8];
+ NVRAM_ACCESS_RESULT_MSG tx_result[8];
+}UTSTCnfSetRxTxCalDataV7lp; //Local parameter of confirm after 6297 set Rx/Tx cal data command
+
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+/*TX/RX calibration data<-------------------------------------------------------------------------------------*/
+
+/*RX calibration data------------------------------------------------------------------------------------->*/
+#define UTST_NVRAM_SIZE_V7 8
+
+typedef struct
+{
+ kal_uint16 uarfcn;
+ kal_int16 path_loss_HPM[UTST_NVRAM_SIZE_V7];
+ kal_int16 path_loss_LPM[UTST_NVRAM_SIZE_V7];
+ kal_int16 path_loss_TKM[UTST_NVRAM_SIZE_V7];
+}UTST_LNA_PATHLOSS; //after 6297 LNA pathloss format
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 rxantpath; // 1: main path , 2 : diversity path
+ kal_int16 temper_offset[CAL_TEMP_SECTION];
+ UTST_LNA_PATHLOSS loss_of_uarfcn[CAL_UARFCN_SECTION];
+} UTSTPathlossV7; //after 6297 get/set RX pathloss (confirm/command : peer buffer)
+
+typedef struct
+{
+ kal_int16 temper_offset[CAL_TEMP_SECTION];
+}UTSTTemperoffsetV7;
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+/*RX calibration data----------6293---------------------------------------------------------------------->*/
+#define UTST_NVRAM_SIZE_V3 7
+
+//typedef struct
+//{
+// kal_uint16 uarfcn;
+// kal_int16 path_loss_HPM[UTST_NVRAM_SIZE_V3];
+// kal_int16 path_loss_LPM[UTST_NVRAM_SIZE_V3];
+//} UTST_LNA_PATHLOSS; //after 6293 LNA pathloss format
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+/*TX calibration data------------------------------------------------------------------------------------->*/
+typedef struct
+{
+ kal_uint16 start;
+ kal_uint16 end;
+} UL1D_sHYSTERESISDATA;
+
+typedef struct
+{
+ kal_uint16 level_0;
+ kal_uint16 level_1;
+} UL1D_sDC2DC;
+
+typedef struct
+{
+ kal_uint16 max_uarfcn;
+ kal_int16 pwr_offset_dB;
+ kal_int16 pwr_offset_txdac;
+} UL1D_sARFCN_SECTION;
+
+typedef struct
+{
+ kal_uint16 dc2dc_level;
+ kal_uint16 vbias_dac;
+ kal_uint8 vm1;
+ kal_uint8 vm2;
+} UL1D_sPADATA;
+
+typedef struct
+{
+ kal_uint8 pa_mode;
+ kal_int8 prf;
+ kal_uint8 dc2dc_lvl;
+ kal_uint8 vm1;
+ kal_uint8 vm2;
+ kal_uint16 vbias_dac;
+ kal_uint16 pa_gain;
+} UL1D_sPMULEVHANDLE;
+
+typedef struct
+{
+ kal_uint8 octlev_num_section;
+ kal_uint8 reserved_byte;
+ kal_uint32 pa_phase_compensation[3];
+ UL1D_sPMULEVHANDLE pmu_level_handle[8];//8
+ kal_uint16 pa_gain_g12a;
+ kal_uint16 pa_gain_g12b;
+}UL1D_sPAOCTLVLSETTING;
+
+typedef struct
+{
+ UL1D_sPADATA pa_data;
+ kal_uint16 vga_dac[NUMBER_OF_VGA_DAC];
+ UL1D_sARFCN_SECTION vga_comp_by_subband[CAL_UARFCN_SECTION];
+ kal_int16 vga_comp_by_temperature[8][2];
+} UL1D_sTXPOWERDATA;
+
+typedef struct
+{
+ kal_uint8 pwr_dt_thr;
+ kal_uint8 pwr_dt_section;
+ kal_uint16 pwr_dt_dac[CAL_PWR_DETECTOR_SECTION];
+ kal_int16 pwr_dt_value[CAL_PWR_DETECTOR_SECTION];
+ UL1D_sARFCN_SECTION pwr_dt_comp_by_subband[CAL_UARFCN_SECTION];
+ kal_int16 pwr_dt_comp_by_temperature[8][2];
+} UL1D_sPWTDTDATA;
+
+typedef struct
+{
+ UL1D_sDC2DC pa_dc2dc;
+ UL1D_sTXPOWERDATA power_dac[3];
+ UL1D_sHYSTERESISDATA tx_hvsteresis[2];
+ UL1D_sPWTDTDATA pwr_dt_data;
+} UL1D_sRAMPDATA;
+
+typedef struct
+{
+ kal_uint8 band;
+ UL1D_sRAMPDATA txdacData;
+ UL1D_sPAOCTLVLSETTING txPAOCTLevelData;
+} URfTestTXDaTaItem;
+
+/*******************************************************************************
+ * WCDMA DPD common
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_WCDMA_DPD_91 = 0,
+ URF_TEST_WCDMA_DPD_92 = 1,
+ URF_TEST_WCDMA_DPD_93 = 2,
+ URF_TEST_WCDMA_DPD_95 = 3
+}URfTest_Wcdma_Dpd_Generation;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_START_DPD_FAC_CAL_V3
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_START_DPD_INVALID = 0,
+ URF_TEST_START_DPD_OK = 1,
+ URF_TEST_START_DPD_PEER_SIZE_MISMATCH = 2,
+ URF_TEST_START_DPD_EXCEED_TTG_LIMIT_INIT = 3,
+ URF_TEST_START_DPD_EXCEED_TTG_LIMIT = 4,
+ URF_TEST_START_DPD_NEGATIVE_PA_GAIN = 5,
+ URF_TEST_START_DPD_LARGE_PA_GAIN_DIFF = 6
+
+}URfTest_StartDpdFacCal_Status;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+ kal_uint16 cal_band[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_StartDpd_ReqInfo;
+
+typedef struct
+{
+ kal_uint8 status; /* URfTest_StartDpdPaAndDpdFacCal_Status */
+ kal_uint16 curr_band_idx;
+ kal_uint32 curr_subband_idx;
+ kal_uint32 curr_gain_idx;
+ kal_int16 curr_pa_gain;
+
+}URfTestCmd_StartDpd_CnfInfo;
+
+typedef struct
+{
+ kal_uint16 band_idx;
+ kal_uint16 apt_ref_channel;
+ kal_int16 tpc_wanted_p_offset;
+
+}URfTest_AptRefChannel_OneBand;
+
+/* struct for GP tool */
+typedef struct
+{
+ URfTest_AptRefChannel_OneBand wcdma_apt_channel_info[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_StartDpdPaAndDpdFacCal_ReqPdu;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_SET_DPD_FAC_RESULT_V3 and MMRF_TEST_CMD_GET_DPD_FAC_RESULT_V3
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_SET_DPD_INVALID = 0,
+ URF_TEST_SET_DPD_OK = 1,
+ URF_TEST_SET_DPD_PEER_SIZE_MISMATCH = 2,
+ URF_TEST_SET_DPD_INVALID_BAND = 3
+
+}URfTest_SetDpdFacCal_Status;
+
+typedef enum
+{
+ URF_TEST_GET_DPD_INVALID = 0,
+ URF_TEST_GET_DPD_OK = 1,
+ URF_TEST_GET_DPD_INVALID_BAND = 2
+
+}URfTest_GetDpdFacCal_Status;
+
+typedef struct
+{
+ /* Tool can set several band in one set command */
+ kal_uint16 num_of_band;
+
+}URfTestCmd_SetDpdAll_ReqInfo;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+ kal_uint8 status; /* URfTest_SetDpdFacCal_Status */
+
+}URfTestCmd_SetDpdAll_CnfInfo;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+
+}URfTestCmd_SetDpdPartial_ReqInfo;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+ kal_uint8 status; /* URfTest_SetDpdPaAndDpdFacCal_Status */
+
+}URfTestCmd_SetDpdPartial_CnfInfo;
+
+typedef struct
+{
+ kal_uint16 band_idx;
+ kal_uint8 dpd_cal_done;
+ kal_int16 dpd_tr[CAL_UARFCN_SECTION];
+
+ /* ramp */
+ kal_int16 vga_comp_subband[UL1D_DPD_MAX_PA_MODE_NUM][CAL_UARFCN_SECTION];
+ kal_int16 vga_comp_temperature[UL1D_DPD_MAX_PA_MODE_NUM][UL1_DPD_MAX_PA_LEVEL_NUM];
+ UL1D_sHYSTERESISDATA tx_hysteresis[UL1D_DPD_MAX_PA_HYST_NUM];
+
+ /* paoct */
+ kal_uint8 octlev_num_section;
+ kal_uint32 pa_phase_compensation[UL1D_DPD_MAX_PA_MODE_NUM];
+ UL1D_sPMULEVHANDLE pmu_level_handle[UL1_DPD_MAX_PA_LEVEL_NUM];
+
+}URfTest_SetGetDpd_TpcPeer;
+
+typedef struct
+{
+ kal_uint8 lut[UL1_DPD_MAX_AM_LUT_GAIN_NUM][MMDPD_MAX_AM_LUT_PWR_NUM];
+
+}URfTest_DPDAMLutSubBand;
+
+typedef struct
+{
+ kal_int8 lut[UL1_DPD_MAX_PM_LUT_GAIN_NUM][MMDPD_MAX_PM_LUT_PWR_NUM];
+
+}URfTest_DPDPMLutSubBand;
+
+typedef struct
+{
+ kal_int16 dpdImplicitArray[UL1_DPD_MAX_IMPLICIT_NUM]; /* For the parameters whose name will not be shown in cal file */
+ URfTest_DPDAMLutSubBand am_lut_subband[CAL_UARFCN_SECTION];
+ URfTest_DPDPMLutSubBand pm_lut_subband[CAL_UARFCN_SECTION];
+
+}URfTest_SetGetDpd_DpdPeer;
+
+typedef struct
+{
+ URfTest_SetGetDpd_TpcPeer dpdtpc_peer;
+ URfTest_SetGetDpd_DpdPeer dpd_peer;
+
+}URfTestCmd_SetDpdFacCalAll_OneBand, URfTestCmd_GetDpdFacCalAll_OneBand;
+
+typedef struct
+{
+ URfTest_SetGetDpd_TpcPeer dpdtpc_peer;
+
+}URfTestCmd_SetDpdFacCalPartial_OneBand;
+
+typedef struct
+{
+ kal_uint16 num_of_band;
+ kal_uint16 band_idx[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_GetDpdAll_ReqInfo;
+
+typedef struct
+{
+ kal_uint8 get_status; /* URfTest_GetDpdPaAndDpdFacCal_Status */
+ kal_uint16 num_of_band;
+
+}URfTestCmd_GetDpdAll_CnfInfo;
+
+/* struct for GP tool */
+typedef struct
+{
+ URfTestCmd_GetDpdFacCalAll_OneBand get_peer[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_GetDpdFacCalAll_CnfPdu;
+
+typedef struct
+{
+ URfTestCmd_SetDpdFacCalAll_OneBand set_all_peer[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_SetDpdFacCalAll_ReqPdu;
+
+typedef struct
+{
+ URfTestCmd_SetDpdFacCalPartial_OneBand set_partial_peer[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_SetDpdFacCalPartial_ReqPdu;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_SET_DPD_PATH_DELAY_SEARCH_V3
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_SET_DPD_DELAY_INVALID = 0,
+ URF_TEST_SET_DPD_DELAY_VALID = 1,
+ URF_TEST_SET_DPD_DELAY_PEER_SIZE_MISMATCH = 2
+
+}URfTest_SetDpdPathDelaySearchV3_Status;
+
+typedef struct
+{
+ /* Tool can set several band in one set command */
+ kal_uint16 band_num;
+
+}URfTestCmd_SetDpdPathDelaySearchV3_ReqInfo;
+
+typedef struct
+{
+ kal_uint16 rf_band;
+ kal_uint16 subband_freq[CAL_UARFCN_SECTION];
+ kal_int16 dpd_tr[CAL_UARFCN_SECTION];
+
+}URfTest_SetDpdPathDelaySearchV3_ReqPeer_OneBand;
+
+/* struct for GP tool */
+typedef struct
+{
+ URfTest_SetDpdPathDelaySearchV3_ReqPeer_OneBand dpd_one_band[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_SetDpdPathDelaySearchV3_ReqPdu;
+
+/* Confirm */
+typedef struct
+{
+ kal_uint16 band_num;
+ kal_uint16 status;
+
+}URfTestCmd_SetDpdPathDelaySearchV3_CnfInfo;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_START_DPD_PATH_DELAY_SEARCH_V3
+ ******************************************************************************/
+typedef enum
+{
+ URF_TEST_START_DPD_DELAY_INVALID = 0,
+ URF_TEST_START_DPD_DELAY_VALID = 1,
+ URF_TEST_START_DPD_DELAY_TIMEOUT = 2,
+ URF_TEST_START_DPD_DELAY_SEARCH_FAILED = 3
+}URfTest_StartDpdPathDelaySearchV3_Status;
+
+/* Request */
+typedef struct
+{
+ kal_uint16 test_times;
+ kal_uint16 search_band[MAX_SUPPORTED_BAND_INDEX];
+}URfTestCmd_StartDpdPathDelaySearchV3_ReqInfo;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_GET_DPD_PATH_DELAY_SEARCH_V3
+ ******************************************************************************/
+
+/* Request */
+typedef struct
+{
+ kal_uint16 band_num;
+ kal_uint16 rf_band_info[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_GetDpdPathDelaySearchV3_ReqInfo;
+
+
+/* Confirm */
+
+typedef enum
+{
+ URF_TEST_GET_DPD_DELAY_INVALID = 0,
+ URF_TEST_GET_DPD_DELAY_VALID = 1
+
+}URfTest_GetDpdPathDelaySearchV3_Status;
+
+typedef struct
+{
+ kal_uint16 band_num;
+ kal_uint16 get_status; /* URfTest_GetDpdPathDelaySearchV3_Status */
+
+}URfTestCmd_GetDpdPathDelaySearchV3_CnfInfo;
+
+typedef struct
+{
+ kal_uint16 rf_band;
+ kal_int16 dpd_tr[CAL_UARFCN_SECTION];
+
+}URfTest_GetDpdPathDelaySearchV3_CnfPeer_OneBand;
+
+/* struct for GP tool */
+typedef struct
+{
+ URfTest_GetDpdPathDelaySearchV3_CnfPeer_OneBand dpd_delay_one_band[MAX_SUPPORTED_BAND_INDEX];
+
+}URfTestCmd_GetDpdPathDelaySearchV3_CnfPdu;
+
+/*******************************************************************************
+ * MMRF_TEST_CMD_SET_DPD_FAC_RESULT_V3 and MMRF_TEST_CMD_GET_DPD_FAC_RESULT_V3
+ ******************************************************************************/
+/* Reuqest */
+typedef enum
+{
+ URF_TEST_TRAD_CAL_EXE_INVALID = 0,
+ URF_TEST_TRAD_CAL_EXE_START = 1,
+ URF_TEST_TRAD_CAL_EXE_END = 2
+
+}URfTest_TradCal_Exe_Status;
+
+typedef struct
+{
+ kal_uint32 exe_status; /* URfTest_TradCal_Exe_Status */
+
+}URfTestCmd_TradCal_ReqInfo;
+
+/* Confirm */
+typedef enum
+{
+ URF_TEST_TRAD_CAL_CMD_INVALID = 0,
+ URF_TEST_TRAD_CAL_CMD_OK = 1
+
+}URfTest_TradCal_Cmd_Status;
+
+typedef struct
+{
+ kal_uint32 cmd_status; /* URfTest_TradCal_Cmd_Status */
+
+}URfTestCmd_TradCal_CnfInfo;
+
+/******************************************************************************/
+/*TX calibration data<-------------------------------------------------------------------------------------*/
+
+typedef enum
+{
+ SETUP_FAIL_GENERAL = 0,
+ SETUP_FAIL_TCM_MISMATCH = 1,
+ SETUP_FAIL_TDD_TIMER_STILL_RUNNING = 2,
+} UBIN_MODE_SETUP_FAIL_MSG;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_int8 setup_result;
+} URfTestResultUbinModeSetup;
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+/*------------------------------6297 Get FHC Information from TST---------------------------------------*/
+#define UL1TST_WCDMA_BAND_SUPPORT_V7 8
+#define UL1TST_HPM_POINT_V7 8
+#define UL1TST_LPM_POINT_V7 5
+#define UL1TST_TKM_POINT_V7 1
+
+typedef struct
+{
+ kal_uint8 calibration_band_number;
+ kal_uint8 calibration_band[UL1TST_WCDMA_BAND_SUPPORT_V7]; // band 1 : band index = 0
+}UTSTReqGetCalInfoV7lp; // request local parameter
+
+typedef struct
+{
+ kal_uint8 support_band_number;
+}UTSTCnfGetCalInfoV7lp; // conform local parameter
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 cal_point_hpm;
+ kal_uint8 cal_point_lpm;
+ kal_uint8 cal_point_tkm;
+ kal_uint8 rx_cal_sequency[UL1TST_HPM_POINT_V7+UL1TST_LPM_POINT_V7+UL1TST_TKM_POINT_V7];
+ kal_int16 rx_cal_dl_power_min[UL1TST_HPM_POINT_V7+UL1TST_LPM_POINT_V7+UL1TST_TKM_POINT_V7]; //s.5
+ kal_int16 rx_cal_dl_power_max[UL1TST_HPM_POINT_V7+UL1TST_LPM_POINT_V7+UL1TST_TKM_POINT_V7]; //s.5
+ kal_int16 rx_cal_dl_power[UL1TST_HPM_POINT_V7+UL1TST_LPM_POINT_V7+UL1TST_TKM_POINT_V7]; //s.5
+ kal_uint8 rx_lna_mode[UL1TST_HPM_POINT_V7+UL1TST_LPM_POINT_V7+UL1TST_TKM_POINT_V7];
+ kal_uint8 rx_location_idx[UL1TST_HPM_POINT_V7+UL1TST_LPM_POINT_V7+UL1TST_TKM_POINT_V7];
+ kal_bool rxloss_usage[3][UL1TST_HPM_POINT_V7];
+}UTSTCnfGetCalInfoV7pb;
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+/*------------------------------6297 START FHC---------------------------------------*/
+#define UL1TST_FHC_FREQUENCY_NUMBER 15
+
+typedef struct
+{
+ kal_uint8 cal_band_number;
+ kal_uint8 cal_band[UL1TST_WCDMA_BAND_SUPPORT_V7];
+ kal_uint8 antenna_setting;
+ kal_uint8 step_duration;
+}UTSTReqFHCV7lp;
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+typedef struct
+{
+/*common*/
+ kal_uint8 band;
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 hpm_cal_point;
+ kal_uint8 lpm_cal_point;
+ kal_uint8 tkm_cal_point;
+/*RX*/
+ kal_uint8 pwr_mode[UL1TST_HPM_POINT_V7+UL1TST_LPM_POINT_V7+UL1TST_TKM_POINT_V7]; //0:HPM 1:LPM 2:TKM
+ kal_uint8 rx_cal_sequency[UL1TST_HPM_POINT_V7+UL1TST_LPM_POINT_V7+UL1TST_TKM_POINT_V7];
+/*TX*/
+ kal_uint8 pa_mode[UL1TST_HPM_POINT_V7+UL1TST_LPM_POINT_V7+UL1TST_TKM_POINT_V7];
+ kal_uint8 vga_dac_tpc_idx[UL1TST_HPM_POINT_V7+UL1TST_LPM_POINT_V7+UL1TST_TKM_POINT_V7];
+ kal_uint8 pa_section[UL1TST_HPM_POINT_V7+UL1TST_LPM_POINT_V7+UL1TST_TKM_POINT_V7];
+ kal_uint16 pa_gain[UL1TST_HPM_POINT_V7+UL1TST_LPM_POINT_V7+UL1TST_TKM_POINT_V7];
+/*RX*/
+ kal_int16 rx_cal_dl_power[UL1TST_HPM_POINT_V7+UL1TST_LPM_POINT_V7+UL1TST_TKM_POINT_V7];
+/*UARFCN*/
+ kal_uint16 dl_uarfcn[UL1TST_FHC_FREQUENCY_NUMBER];
+ kal_uint16 ul_uarfcn[UL1TST_FHC_FREQUENCY_NUMBER];
+/*Initial file data*/
+ URfTestTXDaTaItem tx_cal_data_info;
+ UTSTTemperoffsetV7 rx_temperoffset_info;
+ UTSTTemperoffsetV7 rxd_temperoffset_info;
+}UTSTReqFHCV7pb; //band unit it depends on local parameter cal band number expend to array
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+/*------------------------------6297 GET FHC RESULT----------------------------------------*/
+typedef struct
+{
+ kal_uint16 ul_uarfcn;
+ kal_int16 pd_value_h;
+ kal_int16 pd_value_m;
+ kal_int16 pd_value_l;
+} UL1TST_FHC_PD_RESULT_INFO ;
+
+typedef struct
+{
+ kal_uint16 dl_uarfcn;
+ kal_int16 hpm_rssi[UL1TST_HPM_POINT_V7];
+ kal_int16 lpm_rssi[UL1TST_LPM_POINT_V7];
+ kal_int16 tkm_rssi[UL1TST_TKM_POINT_V7];
+} UL1TST_FHC_PATHLOSS_RESULT_INFO ;
+
+typedef struct
+{
+ kal_uint8 band;
+ UL1TST_FHC_PD_RESULT_INFO pd_result[UL1TST_FHC_FREQUENCY_NUMBER];
+ UL1TST_FHC_PATHLOSS_RESULT_INFO rx_rssi_result[UL1TST_FHC_FREQUENCY_NUMBER];
+ UL1TST_FHC_PATHLOSS_RESULT_INFO rxd_rssi_result[UL1TST_FHC_FREQUENCY_NUMBER];
+} UTSTCnfFHCResultV7pb ; //band unit
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 error_code;
+ kal_uint8 band_number; // indicate how many band's report in peer buffer
+} UTSTCnfFHCResultV7lp;
+/*for 93-95 co-file , "Gen":stand for any generation- add in api ready*/
+typedef UTSTCnfFHCResultV7pb UTSTCnfGetFHCResultGenpb;
+#if 0
+/* under construction !*/
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+/*-----------------------------6297 GET RSSI-----------------------------------------*/
+typedef struct
+{
+ kal_bool hwAGC;
+ kal_bool conti_rssi;
+ kal_uint8 temperature;
+ kal_uint8 antenna_path;
+ kal_uint8 power_mode; //0:HPM 1:LPM 2:talking mode
+ kal_uint16 uarfcn;
+ kal_uint16 rx_rf_gain;
+ kal_uint16 rxd_rf_gain;
+ kal_uint16 rx_digital_gain;
+ kal_uint16 rxd_digital_gain;
+} UTSTReqGetRSSIV7lp;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 rx_lna_mode;
+ kal_uint8 rxd_lna_mode;
+ kal_uint16 uarfcn;
+ kal_int16 rx_rssi;
+ kal_int16 rxd_rssi;
+ kal_uint16 rx_used_gain;
+ kal_uint16 rxd_used_gain;
+} UTSTCnfGetRSSIV7lp;
+/*for 93-95 co-file , "Gen":stand for any generation-add in API ready*/
+typedef UTSTCnfGetRSSIV7lp UTSTCnfGetRSSIGenlp;
+/*-----------------------------6297 power to gain-----------------------------------------*/
+typedef struct
+{
+ kal_uint8 antenna_path;
+ kal_uint8 power_mode; //0:HPM 1:LPM 2:talking mode
+ kal_uint8 rx_cal_sequency;
+ kal_int16 rx_dl_power;
+} UTSTReqPwrtoGainV7lp;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 rx_digital_gain;
+ kal_uint16 rxd_digital_gain;
+ kal_uint16 rx_rf_gain;
+ kal_uint16 rxd_rf_gain;
+}UTSTCnfPwrtoGainV7lp;
+
+/*-----------------------------6297 lna to gain-----------------------------------------*/
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 antenna_path;
+ kal_uint8 power_mode; //0:HPM 1:LPM 2:talking mode
+ kal_uint8 rx_lna_mode;
+ kal_uint8 rxd_lna_mode;
+} UTSTReqLnatoGainV7lp;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 rx_digital_gain;
+ kal_uint16 rxd_digital_gain;
+ kal_uint16 rx_rf_gain;
+ kal_uint16 rxd_rf_gain;
+ kal_int16 dl_power;
+}UTSTCnfLnatoGainV7lp;
+
+/*-----------------------------6297 TX power adjust-----------------------------------------*/
+typedef struct
+{
+ kal_int8 adjust_pwr;
+}UTSTReqTxPwrAdjustV7lp;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_int16 current_power;
+}UTSTCnfTxPwrAdjustV7lp;
+/*-----------------------------6297 DPCH TX-----------------------------------------*/
+typedef struct
+{
+ kal_uint16 ul_freq;
+ kal_int16 psc; /* 0~511. */
+ kal_uint32 sc_code; /* Scrambling code #. 0 ~ 16777215 */
+ kal_uint8 power_ctrl_mode;
+ kal_uint8 pa_mode;
+ kal_int16 prf;
+ kal_uint16 afc_dac;
+ kal_uint8 dpcch_pwr;
+ kal_uint8 dpdch_pwr;
+
+ /* Below for UL1D_RF_Meta_SetTxInfo. */
+ kal_bool no_loop_ctrl;
+
+ /* Below for setPaApcDac. */
+ kal_uint8 rf_band;
+ kal_uint8 vm1;
+ kal_uint8 vm2;
+ kal_uint16 dc2dc_dac;
+ kal_uint16 vbias_dac;
+ kal_bool pwr_det;
+ kal_uint16 apc_dac;
+ kal_bool pa_octlev_ctrl_used;
+}UTSTReqTxDPChV7lp;
+
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+/*-----------------------------6293 ATE tool T-put-----------------------------------------*/
+//trigger IQ dump
+typedef struct
+{
+ kal_uint16 enable_iq_dump; //enable or disable IQ dump mode.
+ kal_uint16 ant_idx; //0=RX main antenna, 1=RX diversity antenna.
+}UTSTReqTriggerIqDumpModeV3lp; // request local parameter
+
+typedef struct
+{
+ kal_uint16 dump_status; //1=enable IQ dump mode successfully
+}UTSTCnfTriggerIqDumpModeV3lp; // conform local parameter
+
+//get IQ dump result
+typedef struct
+{
+ kal_uint16 is_data_ready; //1=IQ raw data is ready
+ kal_uint16 data_section_length; //length of IQ raw data in corresponding peer buffer
+}UTSTCnfGetIqDumpResultV3lp; // confirm local parameter
+
+typedef struct
+{
+ kal_int16 i_data;
+ kal_int16 q_data;
+}UTSTCnfGetIqDumpResultV3pb;// confirm peer buffer :RFEQ unit
+//set RFEQ
+typedef struct
+{
+ kal_uint16 rfeq_set_num; //number of subband RFEQ to update
+}UTSTReqSetRfeqSubbandV3lp; // request local parameter
+
+typedef struct
+{
+ kal_uint16 band; //UMTS band
+ kal_uint16 subband_idx; //which sub-band that user want to fill
+ kal_uint16 max_uarfcn; //max uarfcn of this subband
+ kal_uint8 ant_idx; //which antenna should be write in this command. 0: RX Main, 1:RX Div
+ kal_bool rfeq_enable; //RFEQ enable or not.
+ kal_int16 rfeq_coef_real[7]; //RFEQ real part coefficient. 7 taps.
+ kal_int16 rfeq_coef_imag[7]; //RFEQ image part coefficient. 7 taps.
+}UTSTReqSetRfeqSubbandV3pb; // request peer buffer : subband unit
+
+typedef struct
+{
+ kal_uint16 is_rfeq_set; //1=RFEQ is set to NVRAM successfully
+}UTSTCnfSetRfeqSubbandV3lp; // confirm local parameter
+
+/*----------------------------------------------------------------------*/
+/*-----------------------------6295 get/set NSFT TX POWER offset-------------------------*/
+typedef struct
+{
+ kal_uint8 band;
+}UTSTReqGetTXpowerOffsetV5lp;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_int16 offset;
+}UTSTCnfGetTXpowerOffsetV5lp;
+
+typedef struct
+{
+ kal_bool updatenvram;
+ kal_uint8 band;
+ kal_uint16 ul_uarfcn;
+ kal_int16 offset;
+}UTSTReqSetTXpowerOffsetV5lp;
+
+typedef struct
+{
+ kal_bool ok;
+}UTSTCnfSetTXpowerOffsetV5lp;
+/*---------------------------------------------------------------------------------------*/
+typedef struct
+{
+ URfTestCmdType urf_test_cmd_type;
+ void (*handler)( ilm_struct* );
+}UL1TST_RF_TEST_HANDLER_T;
+/* ------------------------------------------------------------------------------------------- *\
+|* U_RESET_BIT_COUNT *|
+\* ------------------------------------------------------------------------------------------- */
+
+typedef struct
+{
+ kal_uint32 meaningless;
+} URFTestCmdResetBERResult;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint32 u4TotalBits;
+ kal_uint32 u4ErrorBits;
+} URFTestResultResetBERResult;
+/*---------------------------------------------------------------------------------------------*/
+typedef union
+{
+ kal_uint8 m_u1RfBand;
+ kal_uint8 m_u1PwrCtrlMode;
+ kal_uint8 m_u1TableType; // 1: special table for calibration, 2: normal table
+ kal_uint8 m_u1ILPCStep;
+ kal_uint16 m_u2TxPclIndex;
+ kal_uint16 rf_band_idx;
+/* PA drift compensation */
+ kal_uint8 is_PaDrift; /*R8< \brief the parameter to UL1 for PA drift compensation setting (1: turn on, 0: turn off) */
+/* R8 RF tool */
+ kal_uint8 is_5mhz;
+ kal_uint8 is_main;
+ kal_uint32 m_rBSIData;
+ kal_uint32 m_rBSIAddr;
+/* DCXO development */
+ kal_uint32 m_u4CapId;
+/* WM Switch */
+ kal_uint8 ubin_fdd_mode_init; // 1 : UBIN mode Init 3G FDD , 0 : UBIN mode de-init 3G FDD
+ URfTestCmdAFC afc;
+ URfTestCmdRSCP rscp;
+ URfTestCmdType query_op_code;
+ //URfTestCmdTxDPCh txdpch;
+ URfTestCmdTxAccess txaccess;
+ URfTestCmdSetMIPICodeWord set_mipi_cw_param;
+ URfTestCmdGetRfTempSensor rfTemperature;
+ kal_int32 m_i4IcsCellPower; /**< \brief pass cell power to UL1 to choose the best initial gain for ICS */
+ URFTestCmdResetBERResult resetBERResult;
+ UTSTCmdRSCPV3lp rscp_v3_lp;
+ UTSTCmdAFCV3lp afc_v3_lp;
+ //UTSTReqGetCalInfoV5lp get_cal_info_v5_lp; //6295 get FHC infomation from RFD & FEC
+ //UTSTReqFHCV5lp fhc_control_v5_lp; //6295 FHC flow control infomation
+ //URfTestCmd_GetRxTxCalData_ReqParam_V5 get_RxTx_cal_data_command_v5_lp; //after6295
+ //URfTestCmd_SetRxTxCalData_ReqParam_V5 set_RxTx_cal_data_command_v5_lp; //after6295
+ //UTSTReqGetRSSIV5lp get_rssi_v5_lp; //6295 RF tool RSSI
+ //UTSTReqPwrtoGainV5lp pwr_to_gain_v5_lp; //6295 Tradk, NSFT
+ //UTSTReqLnatoGainV5lp lna_to_gain_v5_lp; //6295 RF tool get RSSI calculator
+ UTSTReqTriggerIqDumpModeV3lp trigger_iq_dump_v3_lp; //Trigger IQ dump
+ UTSTReqSetRfeqSubbandV3lp set_rfeq_subband_v3_lp; //Set RFEQ subband result
+ UTSTReqGetTXpowerOffsetV5lp get_tx_power_offset_v5_lp; //6295 get TX power offset in NSFT
+ UTSTReqSetTXpowerOffsetV5lp set_tx_power_offset_v5_lp; //6295 set TX power offset in NSFT
+ UTSTReqGetCalInfoV7lp get_cal_info_v7_lp;
+ UTSTReqFHCV7lp fhc_control_v7_lp;
+ UTSTReqGetRxTxCalDataV7lp get_RxTx_cal_data_v7_lp;
+ UTSTReqSetRxTxCalDataV7lp set_RxTx_cal_data_v7_lp;
+ UTSTReqGetRSSIV7lp get_rssi_v7_lp;
+ UTSTReqPwrtoGainV7lp pwr_to_gain_v7_lp;
+ UTSTReqLnatoGainV7lp lna_to_gain_v7_lp;
+ UTSTReqTxPwrAdjustV7lp tx_pwr_adjust_v7_lp;
+ UTSTReqTxDPChV7lp txdpch_v7_lp;
+}URfTestCmdParam;
+
+typedef union
+{
+ kal_bool ok;
+ kal_uint8 nvramAccessResult;
+ kal_uint8 currentLnaMode;
+ kal_int16 m_u2PwrDetResult;
+ kal_uint32 bsi_data;
+ kal_uint32 m_u4MaxCapId;
+ FT_UMTS_MsCapabilityEx m_rTargetCapability;
+ FT_UMTS_NSFTLinkStatusReport m_rNSFTLinkStatusReport;
+ URfNsftListModeCnf m_rNSFTListModeLinkStatusReport;
+ UL1D_RF_NSFT_BET_BIT_CNT_FOR_BER_CNF_T m_rNSFTBERResult;
+ URfTestResultAFC afc;
+ URfTestResultRFID rfid;
+ URfCheckIfFuncExist CheckIfFuncExist;
+ URfTestResultAFC_Ex afc_ex;
+ URfTestResultPwrDtDac pwr_dt_dac;
+ URfTestResultPwrDtStep pwr_dt_step;
+ URfTestResultGetRfTempSensor rfTemperature;
+ URfTestResultGetMIPICodeWord get_mipi_cw_param;
+ URfTestResultPwrDtDefaultThr pwr_dt_default_thr;
+ URfTestResultReplaceGainTable replace_gain_table;
+ URfTestResultRfTemperatureInfo rfTemperatureInfo;
+ URfTestResultUbinModeSetup ubin_mode_setup_result;
+ URfTestResultNSFTRSSI ft_rpt_nsft_rssi; /*for getting RSSI value during NSFT*/
+ URFTestResultResetBERResult resetBERResult;
+ //UTSTCnfGetCalInfoV5lp cnf_get_cal_info_v5_lp; //6295 get calibration information
+ //UTSTCnfFHCV5lp cnf_fhc_control_v5_lp; //6295 FHC flow control infomation
+ //UTSTCnfGetFHCResultV5lp cnf_fhc_report_v5_lp; //6295 fhc report
+ //URfTestCmd_GetRxTxCalData_CnfParam_V5 get_RxTx_cal_data_process_result_v5_lp; //6295 get data
+ //URfTestCmd_SetRxTxCalData_CnfParam_V5 set_RxTx_cal_data_process_result_v5_lp; //6295 set data
+ //UTSTCnfGetRSSIV5lp cnf_get_rssi_v5_lp; //6295 RF tool RSSI
+ //UTSTCnfPwrtoGainV5lp cnf_pwr_to_gain_v5_lp; //6295 Tradk, NSFT
+ //UTSTCnfLnatoGainV5lp cnf_lna_to_gain_v5_lp; //6295 RF tool get RSSI calculator
+ UTSTCnfTriggerIqDumpModeV3lp cnf_trigger_iq_dump_v3_lp; //Trigger IQ dump
+ UTSTCnfGetIqDumpResultV3lp cnf_get_iq_data_v3_lp; //Get IQ dump result
+ UTSTCnfSetRfeqSubbandV3lp cnf_set_rfeq_subband_v3_lp; //Set RFEQ subband result
+ UTSTCnfGetTXpowerOffsetV5lp cnf_get_tx_power_offset_v5_lp; //6295 get TX power offset in NSFT
+ UTSTCnfSetTXpowerOffsetV5lp cnf_set_tx_power_offset_v5_lp; //6295 set TX power offset in NSFT
+ UTSTCnfGetCalInfoV7lp cnf_get_cal_info_v7_lp;
+ //UTSTCnfFHCV7lp cnf_fhc_control_v7_lp;
+ UTSTCnfFHCResultV7lp cnf_fhc_report_v7_lp;
+ UTSTCnfGetRxTxCalDataV7lp cnf_get_RxTx_cal_data_v7_lp;
+ UTSTCnfSetRxTxCalDataV7lp cnf_set_RxTx_cal_data_v7_lp;
+ UTSTCnfGetRSSIV7lp cnf_get_rssi_v7_lp;
+ UTSTCnfPwrtoGainV7lp cnf_pwr_to_gain_v7_lp;
+ UTSTCnfLnatoGainV7lp cnf_lna_to_gain_v7_lp;
+ UTSTCnfTxPwrAdjustV7lp cnf_tx_pwr_adjust_v7_lp;
+} URfTestResultParam;
+
+typedef struct
+{
+ FT_HDR
+ URfTestCmdType type;
+ URfTestCmdParam param;
+} ft_urf_test_req_T;
+
+typedef struct
+{
+ FT_HDR
+ URfTestCmdType type;
+ URfTestResultParam param;
+} ft_urf_test_cnf_T;
+
+typedef ft_urf_test_req_T ft_to_ul1tst_struct;
+typedef ft_urf_test_cnf_T ul1tst_to_ft_struct;
+
+typedef ft_urf_test_req_T ft_urf_test_req_id_struct;
+typedef ft_urf_test_cnf_T ft_urf_test_cnf_id_struct;
+
+typedef struct
+{
+ kal_uint32 param_not_used;
+}UTST_pb_null_struct;
+
+#endif // #if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__)
+
+#endif // #ifndef __FT_MSG_UL1RF_H__
diff --git a/mcu/interface/middleware/meta/ft_msg_util.h b/mcu/interface/middleware/meta/ft_msg_util.h
new file mode 100644
index 0000000..ba9ca78
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_msg_util.h
@@ -0,0 +1,250 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg_util.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * Messages definition of UTIL category of FT Library
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#ifndef __FT_MSG_UTIL_H__
+#define __FT_MSG_UTIL_H__
+#include "ft_msg_common.h"
+
+/*******************************************************************************
+*
+* Message structures defined for utility command
+*
+*******************************************************************************/
+
+typedef enum {
+FT_UTILCMD_CHECK_IF_FUNC_EXIST = 0
+ ,FT_UTILCMD_CHECK_IF_ISP_SUPPORT
+ ,FT_UTILCMD_QUERY_BT_MODULE_ID
+ ,FT_UTILCMD_ENABLE_WATCHDOG_TIMER
+ ,FT_UTILCMD_CHECK_IF_ACOUSTIC16_SUPPORT
+ ,FT_UTILCMD_CHECK_IF_AUDIOPARAM45_SUPPORT
+ ,FT_UTILCMD_CHECK_IF_LOW_COST_SINGLE_BANK_FLASH
+ ,FT_UTILCMD_QUERY_PMIC_ID
+ ,FT_UTILCMD_BT_POWER_ON
+ ,FT_UTILCMD_LED_LIGHT_LEVEL
+ ,FT_UTILCMD_VIBRATOR_ONOFF
+ ,FT_UTILCMD_QUERY_LOCAL_TIME
+ ,FT_UTILCMD_CHECK_IF_WIFI_ALC_SUPPORT
+ ,FT_UTILCMD_RF_ITC_PCL
+ ,FT_UTILCMD_CHECK_IF_DRC_SUPPORT
+ ,FT_UTILCMD_CHECK_IF_BT_POWERON
+ ,FT_UTILCMD_MAIN_SUB_LCD_LIGHT_LEVEL
+ ,FT_UTILCMD_CHECK_IF_ULC_FAT_SUPPORT
+ ,FT_UTILCMD_CHECK_IF_SMART_PHONE_MODEM_SUPPORT
+ ,FT_UTILCMD_CHECK_TARGET_META_REQUIRED_VERS
+ ,FT_UTILCMD_SET_TARGET_CHECK_PARAS
+ //-------------- check if target need to perform NVRAM read/write security check
+ ,FT_UTILCMD_CHECK_IF_TARGET_NV_SEC_ON
+ ,FT_UTILCMD_REBOOT_TO_NORMAL_MODE // reboot target to normal mode
+ ,FT_UTILCMD_QUERY_BT_WIFI_SINGLE_ANTENNA_CAP
+ ,FT_UTILCMD_SET_ANTENNA_PATH_TO_BT
+ ,FT_UTILCMD_SET_ANTENNA_PATH_TO_WIFI
+ ,FT_UTILCMD_QUERY_TARGET_OPTION_INFO
+ ,FT_UTILCMD_QUERY_LIMITED_STATE
+ ,FT_UTILCMD_QUERY_VPA_VOLTAGE_LIST
+ ,FT_UTILCMD_QUERY_DRIVE_AVAILABLE_FOR_FILE_SIZE
+ ,FT_UTILCMD_QUERY_MAX_CTRL_BUFFER_SIZE
+ ,FT_UTILCMD_QUERY_ADC_MODULE_SUPPORT
+ ,FT_UTILCMD_QUERY_RTC_MODULE_SUPPORT
+ ,FT_UTILCMD_QUERY_META_MODE_TRACE
+ ,FT_UTILCMD_ENABLE_META_MODE_TRACE
+ ,FT_UTILCMD_QUERY_MODEM_MODE
+ ,FT_UTILCMD_END
+} FtUtilCmdType;
+
+typedef struct {
+ kal_uint32 query_ft_msg_id;
+ kal_uint32 query_op_code;
+} FtUtilCheckIfFuncExist;
+
+typedef struct {
+ kal_uint8 led_light_level;
+} FtLEDLevel;
+
+typedef struct {
+ kal_uint8 lcd_type;
+ kal_uint8 lcd_light_level;
+} FtLCDLevel;
+
+typedef struct {
+ kal_uint8 onoff;
+} FtVibratorOnOff;
+
+typedef struct {
+ kal_uint16 interval;
+} FtWatchDog;
+
+
+typedef enum
+{
+ META_VERSION_USER_DEFINE
+ ,META_VERSION_META_DLL_UTIL_VER
+ ,META_VERSION_TYPE_END
+}META_VERSION_TYPE;
+
+typedef struct
+{
+ META_VERSION_TYPE m_eVerType;
+ kal_bool b_AssertWhenVerCheckFail;
+ kal_uint32 m_u4MainVersion;
+ kal_uint32 m_u4MinorVersion;
+ kal_uint32 m_u4BuildNum;
+}META_UTIL_CHECK_TARGET_VER_REQ_T;
+
+
+typedef struct
+{
+ kal_bool m_bCheckPass;
+ kal_uint32 m_u4TargetMainVersion;
+ kal_uint32 m_u4TargetMinorVersion;
+ kal_uint32 m_u4TargetBuildNum;
+}META_UTIL_CHECK_TARGET_VER_CNF_T; // store in peer buffer for backward compaibility
+
+typedef struct
+{
+ kal_bool b_TargetAssertCheckFlag;
+ kal_bool b_SetCurRecvMsgTimes;
+ kal_uint8 m_u1CurRecvMsgTimes;
+}META_UTIL_SET_ASSERT_CHECK_PARAs_REQ_T;
+
+
+typedef union {
+ FtUtilCheckIfFuncExist CheckIfFuncExist;
+ FtWatchDog WatchDog;
+ FtLEDLevel LEDLevel;
+ FtLCDLevel LCDLevel;
+ FtVibratorOnOff VibrOnOff;
+ META_UTIL_CHECK_TARGET_VER_REQ_T m_rCheckMetaVerReq;
+ META_UTIL_SET_ASSERT_CHECK_PARAs_REQ_T m_rSetPwrOffParasReq;
+ kal_uint32 dummy; // extend alignment to 4 bytes
+ kal_uint32 requestedFileSize;
+ kal_uint8 trace_mode;
+} FtUtilCmdReq_U;
+
+typedef struct
+{
+ kal_uint8 rtc_sec; /* seconds after the minute - [0,59] */
+ kal_uint8 rtc_min; /* minutes after the hour - [0,59] */
+ kal_uint8 rtc_hour; /* hours after the midnight - [0,23] */
+ kal_uint8 rtc_day; /* day of the month - [1,31] */
+ kal_uint8 rtc_mon; /* months - [1,12] */
+ kal_uint8 rtc_wday; /* days in a week - [1,7] */
+ kal_uint8 rtc_year; /* years - [0,127] */
+} FtRtc;
+
+#define META_LIPTON_OPTION_ON 0x00000001
+#define META_TC01_OPTION_ON 0x00000002
+#define META_AST_TD_OPTION_ON 0x00000004
+typedef union {
+ FtUtilCheckIfFuncExist CheckIfFuncExist;
+ kal_uint8 bt_module_id;
+ kal_uint8 pmic_id;
+ FtRtc rtc;
+ kal_uint32 rf_pcl;
+ kal_bool m_bNVSecOn;
+ kal_bool m_bBTWiFiSingleAntenna;
+ kal_uint32 m_u4TargetOptionInfo;
+ kal_uint32 dummy;// extend alignment to 4 bytes
+ kal_uint32 m_u4LimitedStateIndicator;
+ kal_int16 driveLetter;
+ kal_uint32 maxControlBufferSize;
+ kal_uint8 module_support;
+ kal_uint8 trace_mode;
+ kal_uint8 modem_mode;
+} FtUtilCmdCnf_U;
+
+typedef struct
+{
+ /// number of elements in the list
+ kal_uint32 validNumber;
+ /// voltage list (unit: micro volt 10^-6)
+ kal_uint32 voltageList[255];
+ /// register value of each voltageList
+ kal_uint32 registerValue[255];
+}FtUtilCmdCnfVpaVoltageList;
+
+typedef struct {
+ FT_HDR
+ FtUtilCmdType type;
+ FtUtilCmdReq_U cmd;
+} FT_UTILITY_COMMAND_REQ;
+
+typedef struct {
+ FT_HDR
+ FtUtilCmdType type;
+ FtUtilCmdCnf_U result;
+ kal_uint32 status;
+} FT_UTILITY_COMMAND_CNF;
+
+#endif // #ifndef __FT_MSG_UTIL_H__
diff --git a/mcu/interface/middleware/meta/ft_public.h b/mcu/interface/middleware/meta/ft_public.h
new file mode 100644
index 0000000..8c0efab
--- /dev/null
+++ b/mcu/interface/middleware/meta/ft_public.h
@@ -0,0 +1,136 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_public.h
+ *
+ * Project:
+ * --------
+ * MTK6208
+ *
+ * Description:
+ * ------------
+ * FT public stuff
+ *
+ * Author:
+ * -------
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#ifndef FT_PUBLIC_H
+#define FT_PUBLIC_H
+
+#include "kal_general_types.h"
+#ifdef __cplusplus
+extern "C"
+#endif
+
+/* FT event group bit map */
+#define FT_UL1_UPDATE_RUNTIME_EVENT 0x00000001 // first bit
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/mcu/interface/middleware/meta/fta_msg.h b/mcu/interface/middleware/meta/fta_msg.h
new file mode 100644
index 0000000..c37d35f
--- /dev/null
+++ b/mcu/interface/middleware/meta/fta_msg.h
@@ -0,0 +1,103 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ft_msg_common.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * FTA message definitions for META commnuication
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#ifndef _FTA_MSG_H_
+#define _FTA_MSG_H_
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 m_u1Dummy;
+}fta_basic_req_struct;
+
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 m_u1Dummy;
+ kal_uint8 status;
+}fta_basic_cnf_struct;
+#endif // _FTA_MSG_H_
diff --git a/mcu/interface/middleware/meta/ftc_msg.h b/mcu/interface/middleware/meta/ftc_msg.h
new file mode 100644
index 0000000..a92cb5e
--- /dev/null
+++ b/mcu/interface/middleware/meta/ftc_msg.h
@@ -0,0 +1,108 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ftc_msg.h
+ *
+ * Project:
+ * --------
+ * MAUI
+ *
+ * Description:
+ * ------------
+ * FTC message definitions for META commnuication
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#ifndef _FTC_MSG_H_
+#define _FTC_MSG_H_
+#include "kal_public_defs.h"
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint8 m_u1Dummy;
+} ftc_basic_req_struct;
+
+typedef struct
+{
+ LOCAL_PARA_HDR
+ kal_uint8 m_u1Dummy;
+ kal_uint8 status;
+} ftc_basic_cnf_struct;
+#endif // _FT_MSG_H_
diff --git a/mcu/interface/middleware/meta/l1tst_nsft_lm_public.h b/mcu/interface/middleware/meta/l1tst_nsft_lm_public.h
new file mode 100644
index 0000000..5dfa207
--- /dev/null
+++ b/mcu/interface/middleware/meta/l1tst_nsft_lm_public.h
@@ -0,0 +1,9 @@
+#if (defined __MD93__)
+#include "l1tst_nsft_lm_public_gen93.h"
+#elif (defined __MD95__)
+#include "l1tst_nsft_lm_public_gen95.h"
+#elif (defined __MD97__)||(defined __MD97P__)
+#include "l1tst_nsft_lm_public_gen97.h"
+#else
+#error "[ERROR] Invalid MD generation"
+#endif
diff --git a/mcu/interface/middleware/meta/l1tst_nsft_lm_public_gen93.h b/mcu/interface/middleware/meta/l1tst_nsft_lm_public_gen93.h
new file mode 100644
index 0000000..5d3484e
--- /dev/null
+++ b/mcu/interface/middleware/meta/l1tst_nsft_lm_public_gen93.h
@@ -0,0 +1,259 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * l1tst_nsft_lm_public.h
+ *
+ * Project:
+ * --------
+ * MOLY Software
+ *
+ * Description:
+ * ------------
+ * NSFT list mode public definition.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef __L1TST_NSFT_LM_PUBLIC_H__
+#define __L1TST_NSFT_LM_PUBLIC_H__
+
+#include "l1_types_public.h"
+
+/* ========== *\
+|* Definition *|
+\* ================================================================================================ */
+#define MAX_TSET_NUM_IN_CHMEAS 8
+
+typedef enum
+{
+ NSFT_LM_MCS_TYPE_GMSK = 0,
+ NSFT_LM_MCS_TYPE_EPSK = 1,
+ NSFT_LM_MCS_TYPE_MAX = 0xFFFF
+} NsftListModType;
+
+typedef enum
+{
+ NSFT_LM_CMD_NULL = 0,
+ NSFT_LM_CMD_SYNC = 1,
+ NSFT_LM_CMD_TRIGGER = 2,
+ NSFT_LM_CMD_CHMEAS = 3,
+ NSFT_LM_CMD_STOP = 4,
+ NSFT_LM_CMD_END = 0xFFFF
+} NsftListCmdType;
+
+typedef enum
+{
+ NSFT_LM_EXECUTION_NULL = 0,
+ NSFT_LM_EXECUTION_INIT = 1,
+ NSFT_LM_EXECUTION_START = 2,
+ NSFT_LM_EXECUTION_DONE = 3,
+ NSFT_LM_EXECUTION_FAIL = 4,
+ NSFT_LM_EXECUTION_STA_MAX = 0xFFFF
+} NsftListCmdStatus;
+
+typedef kal_int16 NsftListPower; // in unit of 1/8 dBm
+typedef kal_int16 NsftListPCL; // in unit of PCL
+
+/*==================================================================================================*/
+
+/* ================================= *\
+|* Definition of Command's Structure *|
+\* ================================================================================================ */
+/* Structure for Sync------------------------------------------------------------------------------ */
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+typedef struct
+{
+ kal_uint16 command_id;
+ FrequencyBand RF_band;
+ ARFCN ARFCN;
+ NsftListModType RTX_types; //RXD use TCh, so Sync need know Mod type
+ NsftListPower sync_power; // in unit of 1/8 dBm
+ TimeSlot sync_slot_offset;
+} NsftListCmd_Sync_t;
+#else
+typedef struct
+{
+ kal_uint16 command_id;
+ FrequencyBand RF_band;
+ ARFCN ARFCN;
+ NsftListPower sync_power; // in unit of 1/8 dBm
+ TimeSlot sync_slot_offset;
+} NsftListCmd_Sync_t;
+#endif
+/* Structure for Trigger--------------------------------------------------------------------------- */
+typedef struct
+{
+ kal_uint16 command_id;
+ FrequencyBand RF_band;
+ ARFCN ARFCN;
+ TSC TSC;
+ NsftListModType RTX_types;
+ NsftListPCL TX_power; // in format of PCL
+} NsftListCmd_Trigger_t;
+
+/* Structure for Channel measurement--------------------------------------------------------------- */
+typedef struct
+{
+ kal_uint16 command_id;
+ FrequencyBand RF_band;
+ ARFCN ARFCN;
+ TSC TSC;
+ NsftListModType RTX_types; // GMSK/EPSK
+ NsftListPCL TX_power[MAX_TSET_NUM_IN_CHMEAS]; // in format of PCL
+ NsftListPower RX_power; // in unit of 1/8 dBm
+ kal_uint16 repeat_count[MAX_TSET_NUM_IN_CHMEAS]; // in unit of radio block
+} NsftListCmd_ChMeas_t;
+
+/* Structure for stop LM--------------------------------------------------------------------------- */
+typedef struct
+{
+ kal_uint16 command_id;
+} NsftListCmd_Stop_t;
+
+/* Structure for command union--------------------------------------------------------------------- */
+typedef union
+{
+ NsftListCmd_Sync_t sync;
+ NsftListCmd_Trigger_t trigger;
+ NsftListCmd_ChMeas_t test;
+ NsftListCmd_Stop_t stop;
+} NsftListCmd_t;
+/*================================================================================================= */
+
+/* =============================== *\
+|* Definition of Reort's Structure *|
+\* ================================================================================================ */
+typedef struct
+{
+ kal_uint16 command_id;
+ NsftListCmdType type;
+ NsftListCmdStatus status; // NSFT LM specific error code
+} NsftListRpt_Com_t;
+
+/* Structure for Sync------------------------------------------------------------------------------ */
+typedef struct
+{
+ NsftListRpt_Com_t common;
+ uint16 retry_counts;
+ kal_int16 new_afc_dac;
+ kal_int32 detected_foe;
+} NsftListRpt_Sync_t;
+
+/* Structure for Trigger--------------------------------------------------------------------------- */
+typedef struct
+{
+ NsftListRpt_Com_t common;
+} NsftListRpt_Trigger_t;
+
+/* Structure for Channel measurement--------------------------------------------------------------- */
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+typedef struct
+{
+ NsftListRpt_Com_t common;
+ kal_uint16 RX_level[GSM_RF_MAX_RX_ANT_NUM]; // in unit of 1/8 dBm
+ kal_uint32 BER_sum;
+ kal_uint32 BER_frame_count;
+} NsftListRpt_ChMeas_t;
+#else
+typedef struct
+{
+ NsftListRpt_Com_t common;
+ kal_uint16 RX_level; // in unit of 1/8 dBm
+ kal_uint32 BER_sum;
+ kal_uint32 BER_frame_count;
+} NsftListRpt_ChMeas_t;
+#endif
+
+/* Structure for stop LM--------------------------------------------------------------------------- */
+typedef NsftListRpt_Trigger_t NsftListRpt_Stop_t;
+
+/* Structure for report union---------------------------------------------------------------------- */
+typedef union
+{
+ NsftListRpt_Com_t common;
+ NsftListRpt_Sync_t sync;
+ NsftListRpt_Trigger_t trigger;
+ NsftListRpt_ChMeas_t test;
+ NsftListRpt_Stop_t stop;
+} NsftListRpt_t;
+/*================================================================================================= */
+
+/* ============================ *\
+|* NSFT List Mode API Prototype *|
+\* ================================================================================================ */
+/* NSFT List Mode message handler for FT----------------------------------------------------------- */
+void L1TST_NsftList_message_handler(void* ilmPtr);
+/*================================================================================================= */
+
+/**
+ * Parameter for MSG_ID_MAL_TO_GSM_LM_REQ.
+ */
+typedef struct
+{
+ NsftListCmdType commandType;
+ NsftListCmd_t commandBuffer;
+} nsft_lm_req_struct;
+
+/**
+ * Parameter for MSG_ID_GSM_LM_TO_MAL_RF_WAIT_IND
+ */
+typedef struct
+{
+ kal_uint32 reportCount;
+ NsftListRpt_t outputParameter;
+} NsftList_RPT_Q_ENTRY_T;
+
+#endif /* _L1TST_NSFT_LM_PUBLIC_H */
diff --git a/mcu/interface/middleware/meta/l1tst_nsft_lm_public_gen95.h b/mcu/interface/middleware/meta/l1tst_nsft_lm_public_gen95.h
new file mode 100644
index 0000000..5d3484e
--- /dev/null
+++ b/mcu/interface/middleware/meta/l1tst_nsft_lm_public_gen95.h
@@ -0,0 +1,259 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * l1tst_nsft_lm_public.h
+ *
+ * Project:
+ * --------
+ * MOLY Software
+ *
+ * Description:
+ * ------------
+ * NSFT list mode public definition.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef __L1TST_NSFT_LM_PUBLIC_H__
+#define __L1TST_NSFT_LM_PUBLIC_H__
+
+#include "l1_types_public.h"
+
+/* ========== *\
+|* Definition *|
+\* ================================================================================================ */
+#define MAX_TSET_NUM_IN_CHMEAS 8
+
+typedef enum
+{
+ NSFT_LM_MCS_TYPE_GMSK = 0,
+ NSFT_LM_MCS_TYPE_EPSK = 1,
+ NSFT_LM_MCS_TYPE_MAX = 0xFFFF
+} NsftListModType;
+
+typedef enum
+{
+ NSFT_LM_CMD_NULL = 0,
+ NSFT_LM_CMD_SYNC = 1,
+ NSFT_LM_CMD_TRIGGER = 2,
+ NSFT_LM_CMD_CHMEAS = 3,
+ NSFT_LM_CMD_STOP = 4,
+ NSFT_LM_CMD_END = 0xFFFF
+} NsftListCmdType;
+
+typedef enum
+{
+ NSFT_LM_EXECUTION_NULL = 0,
+ NSFT_LM_EXECUTION_INIT = 1,
+ NSFT_LM_EXECUTION_START = 2,
+ NSFT_LM_EXECUTION_DONE = 3,
+ NSFT_LM_EXECUTION_FAIL = 4,
+ NSFT_LM_EXECUTION_STA_MAX = 0xFFFF
+} NsftListCmdStatus;
+
+typedef kal_int16 NsftListPower; // in unit of 1/8 dBm
+typedef kal_int16 NsftListPCL; // in unit of PCL
+
+/*==================================================================================================*/
+
+/* ================================= *\
+|* Definition of Command's Structure *|
+\* ================================================================================================ */
+/* Structure for Sync------------------------------------------------------------------------------ */
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+typedef struct
+{
+ kal_uint16 command_id;
+ FrequencyBand RF_band;
+ ARFCN ARFCN;
+ NsftListModType RTX_types; //RXD use TCh, so Sync need know Mod type
+ NsftListPower sync_power; // in unit of 1/8 dBm
+ TimeSlot sync_slot_offset;
+} NsftListCmd_Sync_t;
+#else
+typedef struct
+{
+ kal_uint16 command_id;
+ FrequencyBand RF_band;
+ ARFCN ARFCN;
+ NsftListPower sync_power; // in unit of 1/8 dBm
+ TimeSlot sync_slot_offset;
+} NsftListCmd_Sync_t;
+#endif
+/* Structure for Trigger--------------------------------------------------------------------------- */
+typedef struct
+{
+ kal_uint16 command_id;
+ FrequencyBand RF_band;
+ ARFCN ARFCN;
+ TSC TSC;
+ NsftListModType RTX_types;
+ NsftListPCL TX_power; // in format of PCL
+} NsftListCmd_Trigger_t;
+
+/* Structure for Channel measurement--------------------------------------------------------------- */
+typedef struct
+{
+ kal_uint16 command_id;
+ FrequencyBand RF_band;
+ ARFCN ARFCN;
+ TSC TSC;
+ NsftListModType RTX_types; // GMSK/EPSK
+ NsftListPCL TX_power[MAX_TSET_NUM_IN_CHMEAS]; // in format of PCL
+ NsftListPower RX_power; // in unit of 1/8 dBm
+ kal_uint16 repeat_count[MAX_TSET_NUM_IN_CHMEAS]; // in unit of radio block
+} NsftListCmd_ChMeas_t;
+
+/* Structure for stop LM--------------------------------------------------------------------------- */
+typedef struct
+{
+ kal_uint16 command_id;
+} NsftListCmd_Stop_t;
+
+/* Structure for command union--------------------------------------------------------------------- */
+typedef union
+{
+ NsftListCmd_Sync_t sync;
+ NsftListCmd_Trigger_t trigger;
+ NsftListCmd_ChMeas_t test;
+ NsftListCmd_Stop_t stop;
+} NsftListCmd_t;
+/*================================================================================================= */
+
+/* =============================== *\
+|* Definition of Reort's Structure *|
+\* ================================================================================================ */
+typedef struct
+{
+ kal_uint16 command_id;
+ NsftListCmdType type;
+ NsftListCmdStatus status; // NSFT LM specific error code
+} NsftListRpt_Com_t;
+
+/* Structure for Sync------------------------------------------------------------------------------ */
+typedef struct
+{
+ NsftListRpt_Com_t common;
+ uint16 retry_counts;
+ kal_int16 new_afc_dac;
+ kal_int32 detected_foe;
+} NsftListRpt_Sync_t;
+
+/* Structure for Trigger--------------------------------------------------------------------------- */
+typedef struct
+{
+ NsftListRpt_Com_t common;
+} NsftListRpt_Trigger_t;
+
+/* Structure for Channel measurement--------------------------------------------------------------- */
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+typedef struct
+{
+ NsftListRpt_Com_t common;
+ kal_uint16 RX_level[GSM_RF_MAX_RX_ANT_NUM]; // in unit of 1/8 dBm
+ kal_uint32 BER_sum;
+ kal_uint32 BER_frame_count;
+} NsftListRpt_ChMeas_t;
+#else
+typedef struct
+{
+ NsftListRpt_Com_t common;
+ kal_uint16 RX_level; // in unit of 1/8 dBm
+ kal_uint32 BER_sum;
+ kal_uint32 BER_frame_count;
+} NsftListRpt_ChMeas_t;
+#endif
+
+/* Structure for stop LM--------------------------------------------------------------------------- */
+typedef NsftListRpt_Trigger_t NsftListRpt_Stop_t;
+
+/* Structure for report union---------------------------------------------------------------------- */
+typedef union
+{
+ NsftListRpt_Com_t common;
+ NsftListRpt_Sync_t sync;
+ NsftListRpt_Trigger_t trigger;
+ NsftListRpt_ChMeas_t test;
+ NsftListRpt_Stop_t stop;
+} NsftListRpt_t;
+/*================================================================================================= */
+
+/* ============================ *\
+|* NSFT List Mode API Prototype *|
+\* ================================================================================================ */
+/* NSFT List Mode message handler for FT----------------------------------------------------------- */
+void L1TST_NsftList_message_handler(void* ilmPtr);
+/*================================================================================================= */
+
+/**
+ * Parameter for MSG_ID_MAL_TO_GSM_LM_REQ.
+ */
+typedef struct
+{
+ NsftListCmdType commandType;
+ NsftListCmd_t commandBuffer;
+} nsft_lm_req_struct;
+
+/**
+ * Parameter for MSG_ID_GSM_LM_TO_MAL_RF_WAIT_IND
+ */
+typedef struct
+{
+ kal_uint32 reportCount;
+ NsftListRpt_t outputParameter;
+} NsftList_RPT_Q_ENTRY_T;
+
+#endif /* _L1TST_NSFT_LM_PUBLIC_H */
diff --git a/mcu/interface/middleware/meta/l1tst_nsft_lm_public_gen97.h b/mcu/interface/middleware/meta/l1tst_nsft_lm_public_gen97.h
new file mode 100644
index 0000000..15745d2
--- /dev/null
+++ b/mcu/interface/middleware/meta/l1tst_nsft_lm_public_gen97.h
@@ -0,0 +1,269 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * l1tst_nsft_lm_public.h
+ *
+ * Project:
+ * --------
+ * MOLY Software
+ *
+ * Description:
+ * ------------
+ * NSFT list mode public definition.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
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+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef __L1TST_NSFT_LM_PUBLIC_H__
+#define __L1TST_NSFT_LM_PUBLIC_H__
+
+#include "l1_types_public.h"
+
+/* ========== *\
+|* Definition *|
+\* ================================================================================================ */
+#define MAX_TSET_NUM_IN_CHMEAS 8
+
+typedef enum
+{
+ NSFT_LM_MCS_TYPE_GMSK = 0,
+ NSFT_LM_MCS_TYPE_EPSK = 1,
+ NSFT_LM_MCS_TYPE_MAX = 0xFFFF
+} NsftListModType;
+
+typedef enum
+{
+ NSFT_LM_CMD_NULL = 0,
+ NSFT_LM_CMD_SYNC = 1,
+ NSFT_LM_CMD_TRIGGER = 2,
+ NSFT_LM_CMD_CHMEAS = 3,
+ NSFT_LM_CMD_STOP = 4,
+ NSFT_LM_CMD_END = 0xFFFF
+} NsftListCmdType;
+
+typedef enum
+{
+ NSFT_LM_EXECUTION_NULL = 0,
+ NSFT_LM_EXECUTION_INIT = 1,
+ NSFT_LM_EXECUTION_START = 2,
+ NSFT_LM_EXECUTION_DONE = 3,
+ NSFT_LM_EXECUTION_FAIL = 4,
+ NSFT_LM_EXECUTION_STA_MAX = 0xFFFF
+} NsftListCmdStatus;
+
+typedef kal_int16 NsftListPower; // in unit of 1/8 dBm
+typedef kal_int16 NsftListPCL; // in unit of PCL
+
+/*==================================================================================================*/
+
+/* ================================= *\
+|* Definition of Command's Structure *|
+\* ================================================================================================ */
+/* Structure for Sync------------------------------------------------------------------------------ */
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+typedef struct
+{
+ kal_uint16 command_id;
+ FrequencyBand RF_band;
+ ARFCN ARFCN;
+ NsftListModType RTX_types; //RXD use TCh, so Sync need know Mod type
+ NsftListPower sync_power; // in unit of 1/8 dBm
+ TimeSlot sync_slot_offset;
+} NsftListCmd_Sync_t;
+#else
+typedef struct
+{
+ kal_uint16 command_id;
+ FrequencyBand RF_band;
+ ARFCN ARFCN;
+ NsftListPower sync_power; // in unit of 1/8 dBm
+ TimeSlot sync_slot_offset;
+} NsftListCmd_Sync_t;
+#endif
+/* Structure for Trigger--------------------------------------------------------------------------- */
+typedef struct
+{
+ kal_uint16 command_id;
+ FrequencyBand RF_band;
+ ARFCN ARFCN;
+ TSC TSC;
+ NsftListModType RTX_types;
+ NsftListPCL TX_power; // in format of PCL
+} NsftListCmd_Trigger_t;
+
+/* Structure for Channel measurement--------------------------------------------------------------- */
+typedef struct
+{
+ kal_uint16 command_id;
+ FrequencyBand RF_band;
+ ARFCN ARFCN;
+ TSC TSC;
+ NsftListModType RTX_types; // GMSK/EPSK
+ NsftListPCL TX_power[MAX_TSET_NUM_IN_CHMEAS]; // in format of PCL
+ NsftListPower RX_power; // in unit of 1/8 dBm
+ kal_uint16 repeat_count[MAX_TSET_NUM_IN_CHMEAS]; // in unit of radio block
+} NsftListCmd_ChMeas_t;
+
+/* Structure for stop LM--------------------------------------------------------------------------- */
+typedef struct
+{
+ kal_uint16 command_id;
+} NsftListCmd_Stop_t;
+
+/* Structure for command union--------------------------------------------------------------------- */
+typedef union
+{
+ NsftListCmd_Sync_t sync;
+ NsftListCmd_Trigger_t trigger;
+ NsftListCmd_ChMeas_t test;
+ NsftListCmd_Stop_t stop;
+} NsftListCmd_t;
+/*================================================================================================= */
+
+/* =============================== *\
+|* Definition of Reort's Structure *|
+\* ================================================================================================ */
+typedef struct
+{
+ kal_uint16 command_id;
+ NsftListCmdType type;
+ NsftListCmdStatus status; // NSFT LM specific error code
+} NsftListRpt_Com_t;
+
+/* Structure for Sync------------------------------------------------------------------------------ */
+typedef struct
+{
+ NsftListRpt_Com_t common;
+ uint16 retry_counts;
+#if IS_AFC_CAPABILITY_ENHANCEMENT_SUPPORT
+ kal_uint16 new_afc_dac;
+#else
+ kal_int16 new_afc_dac;
+#endif
+ kal_int32 detected_foe;
+} NsftListRpt_Sync_t;
+
+/* Structure for Trigger--------------------------------------------------------------------------- */
+typedef struct
+{
+ NsftListRpt_Com_t common;
+} NsftListRpt_Trigger_t;
+
+/* Structure for Channel measurement--------------------------------------------------------------- */
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+typedef struct
+{
+ NsftListRpt_Com_t common;
+ kal_uint16 RX_level[GSM_RF_MAX_RX_ANT_NUM]; // in unit of 1/8 dBm
+ kal_uint32 BER_sum;
+ kal_uint32 BER_frame_count;
+} NsftListRpt_ChMeas_t;
+#else
+typedef struct
+{
+ NsftListRpt_Com_t common;
+ kal_uint16 RX_level; // in unit of 1/8 dBm
+ kal_uint32 BER_sum;
+ kal_uint32 BER_frame_count;
+} NsftListRpt_ChMeas_t;
+#endif
+
+/* Structure for stop LM--------------------------------------------------------------------------- */
+typedef NsftListRpt_Trigger_t NsftListRpt_Stop_t;
+
+/* Structure for report union---------------------------------------------------------------------- */
+typedef union
+{
+ NsftListRpt_Com_t common;
+ NsftListRpt_Sync_t sync;
+ NsftListRpt_Trigger_t trigger;
+ NsftListRpt_ChMeas_t test;
+ NsftListRpt_Stop_t stop;
+} NsftListRpt_t;
+/*================================================================================================= */
+
+/* ============================ *\
+|* NSFT List Mode API Prototype *|
+\* ================================================================================================ */
+/* NSFT List Mode message handler for FT----------------------------------------------------------- */
+void L1TST_NsftList_message_handler(void* ilmPtr);
+/*================================================================================================= */
+
+/**
+ * Parameter for MSG_ID_MAL_TO_GSM_LM_REQ.
+ */
+typedef struct
+{
+ NsftListCmdType commandType;
+ NsftListCmd_t commandBuffer;
+} nsft_lm_req_struct;
+
+/**
+ * Parameter for MSG_ID_GSM_LM_TO_MAL_RF_WAIT_IND
+ */
+typedef struct
+{
+ kal_uint32 reportCount;
+ NsftListRpt_t outputParameter;
+} NsftList_RPT_Q_ENTRY_T;
+
+#endif /* _L1TST_NSFT_LM_PUBLIC_H */
diff --git a/mcu/interface/middleware/meta/l1tst_public.h b/mcu/interface/middleware/meta/l1tst_public.h
new file mode 100644
index 0000000..1ab3fe9
--- /dev/null
+++ b/mcu/interface/middleware/meta/l1tst_public.h
@@ -0,0 +1,9 @@
+#if (defined __MD93__)
+#include "l1tst_public_gen93.h"
+#elif (defined __MD95__)
+#include "l1tst_public_gen95.h"
+#elif (defined __MD97__)||(defined __MD97P__)
+#include "l1tst_public_gen97.h"
+#else
+#error "[ERROR] Invalid MD generation"
+#endif
diff --git a/mcu/interface/middleware/meta/l1tst_public_gen93.h b/mcu/interface/middleware/meta/l1tst_public_gen93.h
new file mode 100644
index 0000000..da20024
--- /dev/null
+++ b/mcu/interface/middleware/meta/l1tst_public_gen93.h
@@ -0,0 +1,784 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * l1tst_public.h
+ *
+ * Project:
+ * --------
+ * MTK6208
+ *
+ * Description:
+ * ------------
+ * L1 test mode public interface
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
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+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#include "l1_types_public.h"
+#include "l1_option.h"
+#include "mph_types.h"
+#include "kal_general_types.h"
+#include "l1_kal.h"
+
+#if MD_DRV_IS_NSFT_LIST_MODE_SUPPORT
+#include "l1tst_nsft_lm_public.h"
+#endif
+
+#ifndef l1tst_public_h
+#define l1tst_public_h
+#define MS_CAPABILITY_GSM 0x00000001
+#define MS_CAPABILITY_GPRS 0x00000002
+#define MS_CAPABILITY_EDGE_RX 0x00000004
+#define MS_CAPABILITY_EDGE_8PSK_TX 0x00000008
+#define MS_CAPABILITY_8PM 0x00000010
+#define MS_CAPABILITY_FHC 0x00000020
+#define MS_CAPABILITY_LC 0x00000040
+#define MS_CAPABILITY_NSFT 0x00000080
+#define MS_CAPABILITY_TCVCXO 0x00000100
+#define MS_CAPABILITY_TXPC_CL_GMSK 0x00000200
+#define MS_CAPABILITY_TXPC_OL 0x00000400
+#define MS_CAPABILITY_TXPC_CL_TEMP 0x00000800
+#define MS_CAPABILITY_TXPC_CL_EPSK 0x00001000
+#define MS_CAPABILITY_LNAMODE 0x00002000
+#define MS_CAPABILITY_TXPC_AUX_TEMP_ADC 0x00004000
+#define MS_CAPABILITY_TXPC_BSI_TEMP_ADC 0x00008000
+
+#define MS_BAND_SUPPORT_GSM400 0x00000001
+#define MS_BAND_SUPPORT_GSM850 0x00000002
+#define MS_BAND_SUPPORT_GSM900 0x00000004
+#define MS_BAND_SUPPORT_DCS1800 0x00000008
+#define MS_BAND_SUPPORT_PCS1900 0x00000010
+
+#define CAL_RX_LNA_MODE_HIGH 0x0001
+#define CAL_RX_LNA_MODE_MID 0x0002
+#define CAL_RX_LNA_MODE_LOW 0x0004
+#define CAL_RX_LNA_MODE_SESL 0x0008 // for single-end saw-less
+#define CAL_RX_LNA_W_COEF 0x0010
+#define CAL_RX_ELNA_HIGH_SENSITIVITY 0x0020 // elna+G6 for sensitivity
+#define CAL_RX_ELNA_BYPASS_LOW_MAXPIN 0x0040 // elna bypass+G1 for Max Pin
+
+
+
+#define CAL_TXPC_OL 0x0001
+#define CAL_TXPC_CL_GMSK 0x0002
+#define CAL_TXPC_CL_EPSK 0x0004
+#define CAL_TXPC_CL_TEMP 0x0008
+
+#define NVRAM_GET_SET_RX_PATHLOSS 0x0001 //for RF_TEST_CMD_GET_RX_PATH_LOSS & RF_TEST_CMD_SET_RX_PATH_LOSS & SET/GET PATHLOSS V3 for 93
+
+
+typedef enum
+{
+ AFC_2_SEC
+ ,AFC_33_SEC
+} AfcCalType;
+
+typedef enum
+{
+ AFC_DAC_RANGE_1023
+ ,AFC_DAC_RANGE_8191
+} AfcCalDacRange;
+
+typedef enum
+{
+ Band400 = 0x0
+ ,Band850 = 0x1
+ ,Band900 = 0x2
+ ,Band1800 = 0x4
+ ,Band1900 = 0x8
+} BandBitMap;
+
+typedef enum
+{
+ TEMP_RANGE_M10_65
+ ,TEMP_RANGE_M10_90
+} TempRangeVersion;
+
+typedef struct
+{
+// bool ok;
+ uint32 capability;
+ uint32 band_support;
+} MsCapabilityEx;
+
+// MS Capability
+typedef struct
+{
+ unsigned short support_gsm :1;
+ unsigned short support_gprs :1;
+ unsigned short support_edge_rx :1;
+ unsigned short support_epsk_tx :1;
+ unsigned short support_8pm :1;
+ unsigned short support_fhc :1;
+ unsigned short support_nsft :1;
+ unsigned short band_gsm400 :1;
+ unsigned short band_gsm850 :1;
+ unsigned short band_gsm900 :1;
+ unsigned short band_dcs1800 :1;
+ unsigned short band_pcs1900 :1;
+ unsigned short ps_epsk_tx_disable :1; /* Set as bit-1 when __EPSK_TX_SW_SWITCH_OFF__ is defined. */
+ unsigned short reserved0 :3;
+} MsCapability;
+
+// Factory Mode Calibration Item
+typedef struct
+{
+ unsigned short is_capable :1;
+ unsigned short is_mandatory :1;
+ unsigned short parameters :14;
+} FacModCalItm;
+
+typedef struct
+{
+ FacModCalItm cap_id; // 0
+ FacModCalItm afc; // 1
+ FacModCalItm rx_pathloss; // 2
+ FacModCalItm tx_pcl; // 3
+ FacModCalItm tx_subband; // 4
+ FacModCalItm trx_offset; // 5
+ FacModCalItm tx_iq; // 6
+ FacModCalItm tx_fb_dac; // 7
+ FacModCalItm tx_slope_skew; // 8
+ FacModCalItm w_coef; // 9
+ FacModCalItm txpc; // 10
+ FacModCalItm temp_adc; // 11
+ FacModCalItm remove_32k_xo; // 12
+ FacModCalItm co_crystal; // 13
+ FacModCalItm high_lna_sp; // 14
+ FacModCalItm mid_lna_sp; // 15
+ FacModCalItm low_lna_sp; // 16
+ FacModCalItm bat_temp_comp; // 17
+ FacModCalItm dts_gain_cmb; // 18
+ FacModCalItm uts_band_cmb; // 19
+ FacModCalItm co_temp_adc; // 20
+ FacModCalItm adjustable_lna_mode_pathloss; // 21
+ FacModCalItm gain_rf_cal; // 22
+ FacModCalItm bypass_check_fixafc_nvram; // 23
+ FacModCalItm multi_rat_tadc_bitmap; // 24
+ FacModCalItm multi_rat_afc_bitmap; // 25
+ FacModCalItm adjustable_lna_mode_pathloss_v2; // 26
+ FacModCalItm temperature_info; // 27
+ FacModCalItm dt_coexistence_info; // 28
+ FacModCalItm thermal_sensor_type; // 29
+ FacModCalItm nsft_listmode; // 30
+ FacModCalItm worldmode_id_info; // 31
+ FacModCalItm crystal_on_pmic_enable; // 32
+ FacModCalItm low_pcl_subband_cal; // 33
+ FacModCalItm fhc_dts_extra_fb_enable; // 34
+ FacModCalItm sawless_lna_sp; // 35
+ FacModCalItm nvram_access_interface; // 36
+ FacModCalItm elna_support_band_bitmap; // 37
+ FacModCalItm elna_high_sp; // 38
+ FacModCalItm elna_mid_sp; // 39
+ FacModCalItm elna_low_sp; // 40
+ FacModCalItm elna_w_coef_sp; // 41
+ FacModCalItm elna_mid_sawless_sp; // 42
+ FacModCalItm elna_high_sensitivity_sp; // 43
+ FacModCalItm elna_bypass_low_maxpin_sp; // 44
+ FacModCalItm elna_bypass_gain_threshold; // 45
+ FacModCalItm elna_bypass_support_band_bitmap; // 46
+ FacModCalItm sinwave_afc_get_temp_freq; // 47
+ FacModCalItm wcoef_setget_cmd_support; // 48
+ FacModCalItm tx_setget_cmd_support; // 49
+ FacModCalItm nsft_adjust_tpo_support; // 50
+ FacModCalItm rxd_v5_cmd_support; // 51
+ FacModCalItm rxd_support_band_bitmap; // 52
+} FacModCal;
+
+typedef struct
+{
+ uint16 cap_itm_offset;
+ uint16 fmc_itm_offset;
+ MsCapability cap_itm;
+ FacModCal fmc_itm;
+} MsCapabilityExV2;
+
+#if MD_DRV_IS_FHC_SUPPORT
+typedef struct
+{
+ FrequencyBand band;
+ ARFCN arfcn;
+ int16 dac_value[33];
+ Gain gain;
+ int16 repeat_cnt; // repetitive test counts (frames) for each AFC DAC value
+ bool capid_cal; // capid calibration ctrl
+ bool linear_cal; // 33 stages calibration ctrl
+ int32 capid_min; // min value for capid range
+ int32 capid_max; // max value for capid range
+} DSSAfc;
+
+typedef enum
+{
+ GSM_LNA_NULL, //For old CMD, tool will not set gsm_lna_mode
+ GSM_LNA_HIGH,
+ GSM_LNA_MID,
+ GSM_LNA_LOW,
+ GSM_LNA_W_COEF,
+ GSM_LNA_SAWLESS_MID,
+ GSM_ELNA_HIGH_SENSITIVITY, //For Sensitivity, elna+G6
+ GSM_ELNA_BYPASS_LOW_MAXPIN //For Max Pin, elna bypass+G1
+}LNA_Cal_Type;
+
+/*Gen 95 RXD*/
+typedef enum
+{
+ GSM_RX_CAL_SEQ_V5_NULL = 0,
+ GSM_RX_CAL_SEQ_V5_UTRA_HIGH = 1,
+ GSM_RX_CAL_SEQ_V5_HIGH = 2,
+ GSM_RX_CAL_SEQ_V5_MID = 3,
+ GSM_RX_CAL_SEQ_V5_MID_SAWLESS = 4,
+ GSM_RX_CAL_SEQ_V5_LOW = 5,
+ GSM_RX_CAL_SEQ_V5_BYPASS_LOW = 6,
+ GSM_RX_CAL_SEQ_V5_WCOEF = 7
+} LNACalSeqV5_E; //LNA_Cal_Type Gen95 //Must the same as RfTestRxCalSeqV5_E
+
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+typedef struct
+{
+ FrequencyBand band;
+ ARFCN arfcn;
+ //Gain gain[6];
+ kal_int16 repeat_cnt;
+ kal_int16 dl_cell_power; //it is DL Power for each frame // 1/8dBm
+ LNACalSeqV5_E gsm_lna_mode [GSM_RF_MAX_RX_ANT_NUM];
+} DSSPL; //DSSPL_MultiAnt;
+#else
+typedef struct
+{
+ FrequencyBand band;
+ ARFCN arfcn;
+ Gain gain[6]; // gain for rx slot 0/1/2/3/4/5
+ int16 repeat_cnt; // repetitive test counts (frames) for each ARFCN value
+ LNA_Cal_Type gsm_lna_mode; //0(Null) 1(high) 2(mid) 3(low) 4(w-coef) 5(sawless mid) 6(elna+G6) 7(elna bypass+G1)
+} DSSPL;
+#endif
+
+typedef struct
+{
+ bool afc_cal;
+ bool pl_cal;
+ int8 sync_sb_num; // the SB frame numbers needed for sync process before path loss calibration
+ uint16 step_cnt; //int8 -> uint16 to match size 512
+ int16 power; // the power level expected to measure from test set
+ DSSAfc AfcDSS;
+ DSSPL PathLossDSS[L1_MAX_DTS_STEP_CNT-2];
+ int16 lpm_sb_num; // the SB frame numbers for DCXO LPM calibration
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+ uint8 Antenna; // GSM_AntDimension
+#endif
+} DTSParam;
+/*
+typedef struct
+{
+ AfcParams *afc_params;
+ Report *report;
+} DTSMParams;
+*/
+typedef struct
+{
+// DTSMParams params;
+ intx path_loss_cnt;
+ intx freq_offset;
+ intx capid_freq_offset_min;
+ intx capid_freq_offset[FHC_MAX_CAPID_SEARCH_NUM];
+ int32 capid_search_order[FHC_MAX_CAPID_SEARCH_NUM];
+ int32 capid;
+ int32 capid_high;
+ int32 capid_low;
+ int32 capid_best;
+ int16 afc_dac;
+ int16 arfcn;
+ int16 capid_cnt;
+ int16 repeat_index;
+ int8 state;
+ int8 capid_index;
+ int8 capid_okay_cnt;
+ int8 afc_dac_index;
+ int8 sb_okay_cnt;
+ uint8 sb_fail_cnt;
+ uint8 fb_fail_cnt;
+ bool pl_started;
+ bool rst_dts_idx_at_pl_cal_started;
+ bool pre_capid_cal_ok[FHC_PRE_CAPID_SEARCH_NUM];
+} sDTSM;
+
+typedef struct
+{
+ FrequencyBand band;
+ ARFCN arfcn;
+ int8 timeslot_per_frame;
+ int8 apc_dac_pcl_sel; // 2: gain step index, 1: apc_dac, 0: apc_pcl
+ int16 apc_dac_pcl_value[4];
+// uint8 pa_vbias_val;
+ uint8 pa_vbias_val[4];
+ uint8 is_low_pcl[4];
+ CodingScheme cs[4];
+ int32 repeat_cnt;
+ int16 afc_dac_value;
+ int8 tsc;
+ APCTxPattern pattern;
+ uint16 pattern_data;
+} USSApc;
+
+typedef struct
+{
+ uint16 step_cnt; //int8 -> uint16 to match size 512
+ int16 high_apc_dcoffset[FrequencyBandCount];
+ USSApc ApcUSS[L1_MAX_UTS_STEP_CNT];
+} UTSParam;
+#endif
+/* Functions provided by l1tst_cfg.c */
+void L1TST_Init(void);
+void L1TST_Stop(void);
+void L1TST_SelectFrequencyBand1900( bool selected );
+void L1TST_SetBBTXCfg( const sBBTXCfg *param );
+void L1TST_GetBBTXCfg( sBBTXCfg *param );
+intx L1TST_GetBBTXVer(void);
+int L1TST_GetCrystalCapRange(void);
+uint32 L1TST_GetBandSupport(void);
+uint16 L1TST_Get_EPSK_TX_Support(void);
+uint16 L1TST_Get_TCVCXO_Support(void);
+void GL1TST_DispatchMessage(ilm_struct *ilm_ptr);
+void L1TST_RF_SetRampApcLevel( int rf_band, int power_level, int apc_dac );
+bool L1TST_CheckAvailableBands( FrequencyBand band );
+bool L1TST_CheckAvailableARFCNs( ARFCN arfcn );
+void L1TST_MsCapability( MsCapabilityEx *msCapabilityEx );
+void L1TST_MsCapabilityV2( MsCapabilityExV2 *ms_cap );
+void L1TST_TXPC_CL_GetAllADC( void *buff, int8 is_EPSK );
+void L1TST_TXPC_CL_GetAllTEMP( void *buff, int8 is_EPSK );
+void L1TST_TXPC_CL_GetSubband( int rf_band, void *buff, int8 is_EPSK );
+uint16 L1TST_TXPC_CL_GetOneADC( int rf_band, int power_level, int8 is_EPSK );
+uint16 L1TST_TXPC_GetTemperature( void );
+#if MD_DRV_IS_FHC_SUPPORT
+void L1TST_StartDTSCal( DTSParam *dtsData );
+void L1TST_StartUTSCal( UTSParam *utsData );
+sDTSM* L1TST_FHCLog(void);
+#endif
+
+#if MD_DRV_IS_NSFT_SUPPORT
+ #if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+ void L1TST_StartNSFTProc( FrequencyBand band, ARFCN BCh_arfcn, ARFCN TCh_arfcn,
+ Power BCh_dl_power, Power TCh_dl_power, TSC tsc, TimeSlot TCh_slot,
+ Power txPowerLev, bool IS_EPSK_TX, CodingScheme epsk_cs );
+ void L1TST_NSFTProc_ChangeChannel( FrequencyBand band, ARFCN BCh_arfcn, ARFCN TCh_arfcn,
+ Power BCh_dl_power, Power TCh_dl_power, TSC tsc, TimeSlot TCh_slot,
+ Power txPowerLev, bool IS_EPSK_TX, CodingScheme epsk_cs );
+ #else
+ void L1TST_StartNSFTProc( FrequencyBand band, ARFCN BCh_arfcn, ARFCN TCh_arfcn,
+ Gain BCh_gain, Gain TCh_gain, TSC tsc, TimeSlot TCh_slot,
+ Power txPowerLev, bool IS_EPSK_TX, CodingScheme epsk_cs);
+ void L1TST_NSFTProc_ChangeChannel ( FrequencyBand band, ARFCN BCh_arfcn, ARFCN TCh_arfcn,
+ Gain BCh_gain, Gain TCh_gain, TSC tsc, TimeSlot TCh_slot,
+ Power txPowerLev, bool IS_EPSK_TX, CodingScheme epsk_cs);
+ #endif //#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+void L1TST_NSFTProc_ChangePower( Power txPowerLev);
+void L1TST_StopNSFTProc( void );
+void L1TST_StopNSFT_RecoverToMetaState( void );
+void L1TST_SetupSingleEndBERData( uint32 tst_cnt );
+void L1TST_ReportSingleEndBERDone( uint32* seBER_SUM, uint32* curr_cnt );
+void L1TST_SetupRXLEVData( void );
+ #if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+ void L1TST_ReportRXLEV( uint16 RXLEV[] );
+ #else
+ void L1TST_ReportRXLEV( uint16 *RXLEV );
+ #endif
+void L1TST_ReportRXQual( uint16 BER_PERMILLAGE, uint8 *RXQual );
+#endif //#if MD_DRV_IS_NSFT_SUPPORT
+
+/* Functions provided by l1tst_pm.c */
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+void L1TST_PowerScan( ARFCN arfcn, int8 sampleNoPerFrame, Gain gain, Gain gain_rxd, int16 frames, FrequencyBand band );
+#else
+void L1TST_PowerScan(ARFCN arfcn, int8 sampleNoPerFrame, Gain gain, int16 frames);
+#endif
+
+#if MD_DRV_IS_W_CANCELLATION_SUPPORT
+ #if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+ void L1TST_IR_PowerScan( ARFCN arfcn, int8 sampleNoPerFrame, Gain gain, Gain gain_rxd, int16 frames, int8 if_flag, FrequencyBand band );
+ #else
+ void L1TST_IR_PowerScan( ARFCN arfcn, int8 sampleNoPerFrame, Gain gain, int16 frames, int8 if_flag );
+ #endif
+#endif
+
+/* Functions provided by l1tst_fcb.c */
+void L1TST_FCBControl(ARFCN arfcn, int16 dacValue, Gain gain);
+intx L1TST_FCBGetFreqOffset(void);
+
+/* Functions provided by l1tst_nbtx.c */
+void L1TST_NormalBurstTx(ARFCN arfcn, BSIC bsic, int8 bitmask,
+ Power txPowerLev, int16 frames, int16 dacValue, APCTxPattern pattern);
+
+/* Functions provided by l1tst_cont.c */
+void L1TST_ContinuousTx(ARFCN arfcn, ContTxPattern pattern,uint16 patternData, bool onOff, uint16 modtype, Power PowerLev);
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+void L1TST_ContinuousRx( FrequencyBand band, ARFCN arfcn, Gain gain, Gain gain_rxd, bool onOff );
+#else
+void L1TST_ContinuousRx(ARFCN arfcn, Gain gain, bool onOff);
+#endif
+
+/* Functions provided by l1tst_pdtch.c */
+#if (MD_DRV_IS_GPRS || MD_DRV_IS_MULTISLOT_TX_SUPPORT)
+void L1TST_MultiSlotTx( ARFCN arfcn, BSIC bsic, int8 timeSlotmask, Power powerLev[4],
+ CodingScheme cs[4], TimingAdvance ta, int32 frames, int16 dacValue,
+ bool isEgprs, APCTxPattern pattern, uint16 patternData );
+#endif
+
+#if MD_DRV_IS_TX_GAIN_RF_CALIBRATION_SUPPORT
+void L1TST_TxGainRFSetting(ARFCN arfcn, BSIC bsic, CodingScheme cs, TimingAdvance ta,
+ int32 frames, int16 dacValue, bool isEgprs, APCTxPattern pattern,
+ uint16 patternData, uint16 paGain, uint16 paVbias, uint16 rfGainIndex );
+uint8 L1TST_Query_Grf_Number( void );
+int16* L1TST_Query_Baseband_Power( void );
+#endif
+
+/* Functions provided by l1tst_afc.c */
+void L1TST_SetAfcDacValue( int16 dacValue );
+uint16 L1TST_GetAfcDacValueAtTRXOffsetCalibration(void);
+void L1TST_SetAFcData( int16 calibrated_dac_default, intx calibrated_int_slope );
+void L1TST_SetDcxoPowerMode(kal_uint8 mode);
+
+#if MD_DRV_IS_EPSK_TX_SUPPORT
+void L1TST_RF_SetRampApcLevelEPSK( int rf_band, int power_level, int apc_dac );
+#endif
+
+typedef void (*CalibraHandlerCallback)(kal_int32 u4Result);
+bool L1TST_Begin32KCalibration( CalibraHandlerCallback cb );
+void L1TST_Get32KCalibrationResult( kal_uint32 fmResult );
+
+void L1TST_UpdateCalibrationData( kal_uint32 cal_lid );
+uint16 L1TST_Query_L1D_Mode( void );
+
+#endif
diff --git a/mcu/interface/middleware/meta/l1tst_public_gen95.h b/mcu/interface/middleware/meta/l1tst_public_gen95.h
new file mode 100644
index 0000000..d2745f9
--- /dev/null
+++ b/mcu/interface/middleware/meta/l1tst_public_gen95.h
@@ -0,0 +1,795 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * l1tst_public.h
+ *
+ * Project:
+ * --------
+ * MTK6208
+ *
+ * Description:
+ * ------------
+ * L1 test mode public interface
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
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+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#include "l1_types_public.h"
+#include "l1_option.h"
+#include "mph_types.h"
+#include "kal_general_types.h"
+#include "l1_kal.h"
+
+#if MD_DRV_IS_NSFT_LIST_MODE_SUPPORT
+#include "l1tst_nsft_lm_public.h"
+#endif
+
+#ifndef l1tst_public_h
+#define l1tst_public_h
+#define MS_CAPABILITY_GSM 0x00000001
+#define MS_CAPABILITY_GPRS 0x00000002
+#define MS_CAPABILITY_EDGE_RX 0x00000004
+#define MS_CAPABILITY_EDGE_8PSK_TX 0x00000008
+#define MS_CAPABILITY_8PM 0x00000010
+#define MS_CAPABILITY_FHC 0x00000020
+#define MS_CAPABILITY_LC 0x00000040
+#define MS_CAPABILITY_NSFT 0x00000080
+#define MS_CAPABILITY_TCVCXO 0x00000100
+#define MS_CAPABILITY_TXPC_CL_GMSK 0x00000200
+#define MS_CAPABILITY_TXPC_OL 0x00000400
+#define MS_CAPABILITY_TXPC_CL_TEMP 0x00000800
+#define MS_CAPABILITY_TXPC_CL_EPSK 0x00001000
+#define MS_CAPABILITY_LNAMODE 0x00002000
+#define MS_CAPABILITY_TXPC_AUX_TEMP_ADC 0x00004000
+#define MS_CAPABILITY_TXPC_BSI_TEMP_ADC 0x00008000
+
+#define MS_BAND_SUPPORT_GSM400 0x00000001
+#define MS_BAND_SUPPORT_GSM850 0x00000002
+#define MS_BAND_SUPPORT_GSM900 0x00000004
+#define MS_BAND_SUPPORT_DCS1800 0x00000008
+#define MS_BAND_SUPPORT_PCS1900 0x00000010
+
+#define CAL_RX_LNA_MODE_HIGH 0x0001
+#define CAL_RX_LNA_MODE_MID 0x0002
+#define CAL_RX_LNA_MODE_LOW 0x0004
+#define CAL_RX_LNA_MODE_SESL 0x0008 // for single-end saw-less
+#define CAL_RX_LNA_W_COEF 0x0010
+#define CAL_RX_ELNA_HIGH_SENSITIVITY 0x0020 // elna+G6 for sensitivity
+#define CAL_RX_ELNA_BYPASS_LOW_MAXPIN 0x0040 // elna bypass+G1 for Max Pin
+
+
+
+#define CAL_TXPC_OL 0x0001
+#define CAL_TXPC_CL_GMSK 0x0002
+#define CAL_TXPC_CL_EPSK 0x0004
+#define CAL_TXPC_CL_TEMP 0x0008
+
+#define NVRAM_GET_SET_RX_PATHLOSS 0x0001 //for RF_TEST_CMD_GET_RX_PATH_LOSS & RF_TEST_CMD_SET_RX_PATH_LOSS & SET/GET PATHLOSS V3 for 93
+
+
+typedef enum
+{
+ AFC_2_SEC
+ ,AFC_33_SEC
+} AfcCalType;
+
+typedef enum
+{
+ AFC_DAC_RANGE_1023
+ ,AFC_DAC_RANGE_8191
+} AfcCalDacRange;
+
+typedef enum
+{
+ Band400 = 0x0
+ ,Band850 = 0x1
+ ,Band900 = 0x2
+ ,Band1800 = 0x4
+ ,Band1900 = 0x8
+} BandBitMap;
+
+typedef enum
+{
+ TEMP_RANGE_M10_65
+ ,TEMP_RANGE_M10_90
+} TempRangeVersion;
+
+typedef struct
+{
+// bool ok;
+ uint32 capability;
+ uint32 band_support;
+} MsCapabilityEx;
+
+// MS Capability
+typedef struct
+{
+ unsigned short support_gsm :1;
+ unsigned short support_gprs :1;
+ unsigned short support_edge_rx :1;
+ unsigned short support_epsk_tx :1;
+ unsigned short support_8pm :1;
+ unsigned short support_fhc :1;
+ unsigned short support_nsft :1;
+ unsigned short band_gsm400 :1;
+ unsigned short band_gsm850 :1;
+ unsigned short band_gsm900 :1;
+ unsigned short band_dcs1800 :1;
+ unsigned short band_pcs1900 :1;
+ unsigned short ps_epsk_tx_disable :1; /* Set as bit-1 when __EPSK_TX_SW_SWITCH_OFF__ is defined. */
+ unsigned short reserved0 :3;
+} MsCapability;
+
+// Factory Mode Calibration Item
+typedef struct
+{
+ unsigned short is_capable :1;
+ unsigned short is_mandatory :1;
+ unsigned short parameters :14;
+} FacModCalItm;
+
+typedef struct
+{
+ FacModCalItm cap_id; // 0
+ FacModCalItm afc; // 1
+ FacModCalItm rx_pathloss; // 2
+ FacModCalItm tx_pcl; // 3
+ FacModCalItm tx_subband; // 4
+ FacModCalItm trx_offset; // 5
+ FacModCalItm tx_iq; // 6
+ FacModCalItm tx_fb_dac; // 7
+ FacModCalItm tx_slope_skew; // 8
+ FacModCalItm w_coef; // 9
+ FacModCalItm txpc; // 10
+ FacModCalItm temp_adc; // 11
+ FacModCalItm remove_32k_xo; // 12
+ FacModCalItm co_crystal; // 13
+ FacModCalItm high_lna_sp; // 14
+ FacModCalItm mid_lna_sp; // 15
+ FacModCalItm low_lna_sp; // 16
+ FacModCalItm bat_temp_comp; // 17
+ FacModCalItm dts_gain_cmb; // 18
+ FacModCalItm uts_band_cmb; // 19
+ FacModCalItm co_temp_adc; // 20
+ FacModCalItm adjustable_lna_mode_pathloss; // 21
+ FacModCalItm gain_rf_cal; // 22
+ FacModCalItm bypass_check_fixafc_nvram; // 23
+ FacModCalItm multi_rat_tadc_bitmap; // 24
+ FacModCalItm multi_rat_afc_bitmap; // 25
+ FacModCalItm adjustable_lna_mode_pathloss_v2; // 26
+ FacModCalItm temperature_info; // 27
+ FacModCalItm dt_coexistence_info; // 28
+ FacModCalItm thermal_sensor_type; // 29
+ FacModCalItm nsft_listmode; // 30
+ FacModCalItm worldmode_id_info; // 31
+ FacModCalItm crystal_on_pmic_enable; // 32
+ FacModCalItm low_pcl_subband_cal; // 33
+ FacModCalItm fhc_dts_extra_fb_enable; // 34
+ FacModCalItm sawless_lna_sp; // 35
+ FacModCalItm nvram_access_interface; // 36
+ FacModCalItm elna_support_band_bitmap; // 37
+ FacModCalItm elna_high_sp; // 38
+ FacModCalItm elna_mid_sp; // 39
+ FacModCalItm elna_low_sp; // 40
+ FacModCalItm elna_w_coef_sp; // 41
+ FacModCalItm elna_mid_sawless_sp; // 42
+ FacModCalItm elna_high_sensitivity_sp; // 43
+ FacModCalItm elna_bypass_low_maxpin_sp; // 44
+ FacModCalItm elna_bypass_gain_threshold; // 45
+ FacModCalItm elna_bypass_support_band_bitmap; // 46
+ FacModCalItm sinwave_afc_get_temp_freq; // 47
+ FacModCalItm wcoef_setget_cmd_support; // 48
+ FacModCalItm tx_setget_cmd_support; // 49
+ FacModCalItm nsft_adjust_tpo_support; // 50
+ FacModCalItm rxd_v5_cmd_support; // 51
+ FacModCalItm rxd_support_band_bitmap; // 52
+ FacModCalItm mlna_type_v7; // 53
+ FacModCalItm rxlev_precision_extend; // 54
+} FacModCal;
+
+typedef struct
+{
+ uint16 cap_itm_offset;
+ uint16 fmc_itm_offset;
+ MsCapability cap_itm;
+ FacModCal fmc_itm;
+} MsCapabilityExV2;
+
+#if MD_DRV_IS_FHC_SUPPORT
+typedef struct
+{
+ FrequencyBand band;
+ ARFCN arfcn;
+ int16 dac_value[33];
+ Gain gain;
+ int16 repeat_cnt; // repetitive test counts (frames) for each AFC DAC value
+ bool capid_cal; // capid calibration ctrl
+ bool linear_cal; // 33 stages calibration ctrl
+ int32 capid_min; // min value for capid range
+ int32 capid_max; // max value for capid range
+} DSSAfc;
+
+typedef enum
+{
+ GSM_LNA_NULL, //For old CMD, tool will not set gsm_lna_mode
+ GSM_LNA_HIGH,
+ GSM_LNA_MID,
+ GSM_LNA_LOW,
+ GSM_LNA_W_COEF,
+ GSM_LNA_SAWLESS_MID,
+ GSM_ELNA_HIGH_SENSITIVITY, //For Sensitivity, elna+G6
+ GSM_ELNA_BYPASS_LOW_MAXPIN //For Max Pin, elna bypass+G1
+}LNA_Cal_Type;
+
+/*Gen 95 RXD*/
+typedef enum
+{
+ GSM_RX_CAL_SEQ_V5_NULL = 0,
+ GSM_RX_CAL_SEQ_V5_UTRA_HIGH = 1,
+ GSM_RX_CAL_SEQ_V5_HIGH = 2,
+ GSM_RX_CAL_SEQ_V5_MID = 3,
+ GSM_RX_CAL_SEQ_V5_MID_SAWLESS = 4,
+ GSM_RX_CAL_SEQ_V5_LOW = 5,
+ GSM_RX_CAL_SEQ_V5_BYPASS_LOW = 6,
+ GSM_RX_CAL_SEQ_V5_WCOEF = 7
+} LNACalSeqV5_E; //LNA_Cal_Type Gen95 //Must the same as RfTestRxCalSeqV5_E
+
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+typedef struct
+{
+ FrequencyBand band;
+ ARFCN arfcn;
+ //Gain gain[6];
+ kal_int16 repeat_cnt;
+ kal_int16 dl_cell_power; //it is DL Power for each frame // 1/8dBm
+ LNACalSeqV5_E gsm_lna_mode [GSM_RF_MAX_RX_ANT_NUM];
+} DSSPL; //DSSPL_MultiAnt;
+#else
+typedef struct
+{
+ FrequencyBand band;
+ ARFCN arfcn;
+ Gain gain[6]; // gain for rx slot 0/1/2/3/4/5
+ int16 repeat_cnt; // repetitive test counts (frames) for each ARFCN value
+ LNA_Cal_Type gsm_lna_mode; //0(Null) 1(high) 2(mid) 3(low) 4(w-coef) 5(sawless mid) 6(elna+G6) 7(elna bypass+G1)
+} DSSPL;
+#endif
+
+typedef struct
+{
+ bool afc_cal;
+ bool pl_cal;
+ int8 sync_sb_num; // the SB frame numbers needed for sync process before path loss calibration
+ uint16 step_cnt; //int8 -> uint16 to match size 512
+ int16 power; // the power level expected to measure from test set
+ DSSAfc AfcDSS;
+ DSSPL PathLossDSS[L1_MAX_DTS_STEP_CNT-2];
+ int16 lpm_sb_num; // the SB frame numbers for DCXO LPM calibration
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+ uint8 Antenna; // GSM_AntDimension
+#endif
+} DTSParam;
+/*
+typedef struct
+{
+ AfcParams *afc_params;
+ Report *report;
+} DTSMParams;
+*/
+typedef struct
+{
+// DTSMParams params;
+ intx path_loss_cnt;
+ intx freq_offset;
+ intx capid_freq_offset_min;
+ intx capid_freq_offset[FHC_MAX_CAPID_SEARCH_NUM];
+ int32 capid_search_order[FHC_MAX_CAPID_SEARCH_NUM];
+ int32 capid;
+ int32 capid_high;
+ int32 capid_low;
+ int32 capid_best;
+ int16 afc_dac;
+ int16 arfcn;
+ int16 capid_cnt;
+ int16 repeat_index;
+ int8 state;
+ int8 capid_index;
+ int8 capid_okay_cnt;
+ int8 afc_dac_index;
+ int8 sb_okay_cnt;
+ uint8 sb_fail_cnt;
+ uint8 fb_fail_cnt;
+ bool pl_started;
+ bool rst_dts_idx_at_pl_cal_started;
+ bool pre_capid_cal_ok[FHC_PRE_CAPID_SEARCH_NUM];
+} sDTSM;
+
+typedef struct
+{
+ FrequencyBand band;
+ ARFCN arfcn;
+ int8 timeslot_per_frame;
+ int8 apc_dac_pcl_sel; // 2: gain step index, 1: apc_dac, 0: apc_pcl
+ int16 apc_dac_pcl_value[4];
+// uint8 pa_vbias_val;
+ uint8 pa_vbias_val[4];
+ uint8 is_low_pcl[4];
+ CodingScheme cs[4];
+ int32 repeat_cnt;
+ int16 afc_dac_value;
+ int8 tsc;
+ APCTxPattern pattern;
+ uint16 pattern_data;
+} USSApc;
+
+typedef struct
+{
+ uint16 step_cnt; //int8 -> uint16 to match size 512
+ int16 high_apc_dcoffset[FrequencyBandCount];
+ USSApc ApcUSS[L1_MAX_UTS_STEP_CNT];
+} UTSParam;
+#endif
+/* Functions provided by l1tst_cfg.c */
+void L1TST_Init(void);
+void L1TST_Stop(void);
+void L1TST_SelectFrequencyBand1900( bool selected );
+void L1TST_SetBBTXCfg( const sBBTXCfg *param );
+void L1TST_GetBBTXCfg( sBBTXCfg *param );
+intx L1TST_GetBBTXVer(void);
+int L1TST_GetCrystalCapRange(void);
+uint32 L1TST_GetBandSupport(void);
+uint16 L1TST_Get_EPSK_TX_Support(void);
+uint16 L1TST_Get_TCVCXO_Support(void);
+void GL1TST_DispatchMessage(ilm_struct *ilm_ptr);
+void L1TST_RF_SetRampApcLevel( int rf_band, int power_level, int apc_dac );
+bool L1TST_CheckAvailableBands( FrequencyBand band );
+bool L1TST_CheckAvailableARFCNs( ARFCN arfcn );
+#if defined(__ATERFTX_ERROR_HANDLE_ENHANCE__)
+bool L1TST_CheckBandARFCNisMatch( uint8 band, ARFCN arfcn );
+#endif //__ATERFTX_ERROR_HANDLE_ENHANCE__
+void L1TST_MsCapability( MsCapabilityEx *msCapabilityEx );
+void L1TST_MsCapabilityV2( MsCapabilityExV2 *ms_cap );
+void L1TST_TXPC_CL_GetAllADC( void *buff, int8 is_EPSK );
+void L1TST_TXPC_CL_GetAllTEMP( void *buff, int8 is_EPSK );
+void L1TST_TXPC_CL_GetSubband( int rf_band, void *buff, int8 is_EPSK );
+uint16 L1TST_TXPC_CL_GetOneADC( int rf_band, int power_level, int8 is_EPSK );
+uint16 L1TST_TXPC_GetTemperature( void );
+#if MD_DRV_IS_FHC_SUPPORT
+void L1TST_StartDTSCal( DTSParam *dtsData );
+void L1TST_StartUTSCal( UTSParam *utsData );
+sDTSM* L1TST_FHCLog(void);
+#endif
+
+#if MD_DRV_IS_NSFT_SUPPORT
+ #if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+ void L1TST_StartNSFTProc( FrequencyBand band, ARFCN BCh_arfcn, ARFCN TCh_arfcn,
+ Power BCh_dl_power, Power TCh_dl_power, TSC tsc, TimeSlot TCh_slot,
+ Power txPowerLev, bool IS_EPSK_TX, CodingScheme epsk_cs );
+ void L1TST_NSFTProc_ChangeChannel( FrequencyBand band, ARFCN BCh_arfcn, ARFCN TCh_arfcn,
+ Power BCh_dl_power, Power TCh_dl_power, TSC tsc, TimeSlot TCh_slot,
+ Power txPowerLev, bool IS_EPSK_TX, CodingScheme epsk_cs );
+ #else
+ void L1TST_StartNSFTProc( FrequencyBand band, ARFCN BCh_arfcn, ARFCN TCh_arfcn,
+ Gain BCh_gain, Gain TCh_gain, TSC tsc, TimeSlot TCh_slot,
+ Power txPowerLev, bool IS_EPSK_TX, CodingScheme epsk_cs);
+ void L1TST_NSFTProc_ChangeChannel ( FrequencyBand band, ARFCN BCh_arfcn, ARFCN TCh_arfcn,
+ Gain BCh_gain, Gain TCh_gain, TSC tsc, TimeSlot TCh_slot,
+ Power txPowerLev, bool IS_EPSK_TX, CodingScheme epsk_cs);
+ #endif //#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+void L1TST_NSFTProc_ChangePower( Power txPowerLev);
+void L1TST_StopNSFTProc( void );
+void L1TST_StopNSFT_RecoverToMetaState( void );
+void L1TST_SetupSingleEndBERData( uint32 tst_cnt );
+void L1TST_ReportSingleEndBERDone( uint32* seBER_SUM, uint32* curr_cnt );
+void L1TST_SetupRXLEVData( void );
+ #if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+ void L1TST_ReportRXLEV( uint16 RXLEV[] );
+ #else
+ void L1TST_ReportRXLEV( uint16 *RXLEV );
+ #endif
+void L1TST_ReportRXQual( uint16 BER_PERMILLAGE, uint8 *RXQual );
+#endif //#if MD_DRV_IS_NSFT_SUPPORT
+
+/* Functions provided by l1tst_pm.c */
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+void L1TST_PowerScan( ARFCN arfcn, int8 sampleNoPerFrame, Gain gain, Gain gain_rxd, int16 frames, FrequencyBand band );
+#else
+void L1TST_PowerScan(ARFCN arfcn, int8 sampleNoPerFrame, Gain gain, int16 frames);
+#endif
+
+#if MD_DRV_IS_W_CANCELLATION_SUPPORT
+ #if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+ void L1TST_IR_PowerScan( ARFCN arfcn, int8 sampleNoPerFrame, Gain gain, Gain gain_rxd, int16 frames, int8 if_flag, FrequencyBand band );
+ #else
+ void L1TST_IR_PowerScan( ARFCN arfcn, int8 sampleNoPerFrame, Gain gain, int16 frames, int8 if_flag );
+ #endif
+#endif
+
+/* Functions provided by l1tst_fcb.c */
+void L1TST_FCBControl(ARFCN arfcn, int16 dacValue, Gain gain);
+intx L1TST_FCBGetFreqOffset(void);
+
+/* Functions provided by l1tst_nbtx.c */
+void L1TST_NormalBurstTx(ARFCN arfcn, BSIC bsic, int8 bitmask,
+ Power txPowerLev, int16 frames, int16 dacValue, APCTxPattern pattern);
+
+/* Functions provided by l1tst_cont.c */
+void L1TST_ContinuousTx(ARFCN arfcn, ContTxPattern pattern,uint16 patternData, bool onOff, uint16 modtype, Power PowerLev);
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+void L1TST_ContinuousRx( FrequencyBand band, ARFCN arfcn, Gain gain, Gain gain_rxd, bool onOff );
+#else
+void L1TST_ContinuousRx(ARFCN arfcn, Gain gain, bool onOff);
+#endif
+
+/* Functions provided by l1tst_pdtch.c */
+#if (MD_DRV_IS_GPRS || MD_DRV_IS_MULTISLOT_TX_SUPPORT)
+void L1TST_MultiSlotTx( ARFCN arfcn, BSIC bsic, int8 timeSlotmask, Power powerLev[4],
+ CodingScheme cs[4], TimingAdvance ta, int32 frames, int16 dacValue,
+ bool isEgprs, APCTxPattern pattern, uint16 patternData );
+#endif
+
+#if MD_DRV_IS_TX_GAIN_RF_CALIBRATION_SUPPORT
+void L1TST_TxGainRFSetting(ARFCN arfcn, BSIC bsic, CodingScheme cs, TimingAdvance ta,
+ int32 frames, int16 dacValue, bool isEgprs, APCTxPattern pattern,
+ uint16 patternData, uint16 paGain, uint16 paVbias, uint16 rfGainIndex );
+uint8 L1TST_Query_Grf_Number( void );
+int16* L1TST_Query_Baseband_Power( void );
+#endif
+
+/* Functions provided by l1tst_afc.c */
+void L1TST_SetAfcDacValue( int16 dacValue );
+uint16 L1TST_GetAfcDacValueAtTRXOffsetCalibration(void);
+void L1TST_SetAFcData( int16 calibrated_dac_default, intx calibrated_int_slope );
+void L1TST_SetDcxoPowerMode(kal_uint8 mode);
+
+#if MD_DRV_IS_EPSK_TX_SUPPORT
+void L1TST_RF_SetRampApcLevelEPSK( int rf_band, int power_level, int apc_dac );
+#endif
+
+typedef void (*CalibraHandlerCallback)(kal_int32 u4Result);
+bool L1TST_Begin32KCalibration( CalibraHandlerCallback cb );
+void L1TST_Get32KCalibrationResult( kal_uint32 fmResult );
+
+void L1TST_UpdateCalibrationData( kal_uint32 cal_lid );
+uint16 L1TST_Query_L1D_Mode( void );
+
+#endif
diff --git a/mcu/interface/middleware/meta/l1tst_public_gen97.h b/mcu/interface/middleware/meta/l1tst_public_gen97.h
new file mode 100644
index 0000000..608a452
--- /dev/null
+++ b/mcu/interface/middleware/meta/l1tst_public_gen97.h
@@ -0,0 +1,866 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2001
+*
+*******************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * l1tst_public.h
+ *
+ * Project:
+ * --------
+ * MTK6208
+ *
+ * Description:
+ * ------------
+ * L1 test mode public interface
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
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+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ *******************************************************************************/
+
+#include "l1_types_public.h"
+#include "l1_option.h"
+#include "mph_types.h"
+#include "kal_general_types.h"
+#include "l1_kal.h"
+
+#if MD_DRV_IS_NSFT_LIST_MODE_SUPPORT
+#include "l1tst_nsft_lm_public.h"
+#endif
+
+#ifndef l1tst_public_h
+#define l1tst_public_h
+#define MS_CAPABILITY_GSM 0x00000001
+#define MS_CAPABILITY_GPRS 0x00000002
+#define MS_CAPABILITY_EDGE_RX 0x00000004
+#define MS_CAPABILITY_EDGE_8PSK_TX 0x00000008
+#define MS_CAPABILITY_8PM 0x00000010
+#define MS_CAPABILITY_FHC 0x00000020
+#define MS_CAPABILITY_LC 0x00000040
+#define MS_CAPABILITY_NSFT 0x00000080
+#define MS_CAPABILITY_TCVCXO 0x00000100
+#define MS_CAPABILITY_TXPC_CL_GMSK 0x00000200
+#define MS_CAPABILITY_TXPC_OL 0x00000400
+#define MS_CAPABILITY_TXPC_CL_TEMP 0x00000800
+#define MS_CAPABILITY_TXPC_CL_EPSK 0x00001000
+#define MS_CAPABILITY_LNAMODE 0x00002000
+#define MS_CAPABILITY_TXPC_AUX_TEMP_ADC 0x00004000
+#define MS_CAPABILITY_TXPC_BSI_TEMP_ADC 0x00008000
+
+#define MS_BAND_SUPPORT_GSM400 0x00000001
+#define MS_BAND_SUPPORT_GSM850 0x00000002
+#define MS_BAND_SUPPORT_GSM900 0x00000004
+#define MS_BAND_SUPPORT_DCS1800 0x00000008
+#define MS_BAND_SUPPORT_PCS1900 0x00000010
+
+#define CAL_RX_LNA_MODE_HIGH 0x0001
+#define CAL_RX_LNA_MODE_MID 0x0002
+#define CAL_RX_LNA_MODE_LOW 0x0004
+#define CAL_RX_LNA_MODE_SESL 0x0008 // for single-end saw-less
+#define CAL_RX_LNA_W_COEF 0x0010
+#define CAL_RX_ELNA_HIGH_SENSITIVITY 0x0020 // elna+G6 for sensitivity
+#define CAL_RX_ELNA_BYPASS_LOW_MAXPIN 0x0040 // elna bypass+G1 for Max Pin
+
+
+
+#define CAL_TXPC_OL 0x0001
+#define CAL_TXPC_CL_GMSK 0x0002
+#define CAL_TXPC_CL_EPSK 0x0004
+#define CAL_TXPC_CL_TEMP 0x0008
+
+#define NVRAM_GET_SET_RX_PATHLOSS 0x0001 //for RF_TEST_CMD_GET_RX_PATH_LOSS & RF_TEST_CMD_SET_RX_PATH_LOSS & SET/GET PATHLOSS V3 for 93
+
+
+typedef enum
+{
+ AFC_2_SEC
+ ,AFC_33_SEC
+} AfcCalType;
+
+typedef enum
+{
+ AFC_DAC_RANGE_1023
+ ,AFC_DAC_RANGE_8191
+} AfcCalDacRange;
+
+typedef enum
+{
+ Band400 = 0x0
+ ,Band850 = 0x1
+ ,Band900 = 0x2
+ ,Band1800 = 0x4
+ ,Band1900 = 0x8
+} BandBitMap;
+
+typedef enum
+{
+ TEMP_RANGE_M10_65
+ ,TEMP_RANGE_M10_90
+} TempRangeVersion;
+
+typedef struct
+{
+// bool ok;
+ uint32 capability;
+ uint32 band_support;
+} MsCapabilityEx;
+
+// MS Capability
+typedef struct
+{
+ unsigned short support_gsm :1;
+ unsigned short support_gprs :1;
+ unsigned short support_edge_rx :1;
+ unsigned short support_epsk_tx :1;
+ unsigned short support_8pm :1;
+ unsigned short support_fhc :1;
+ unsigned short support_nsft :1;
+ unsigned short band_gsm400 :1;
+ unsigned short band_gsm850 :1;
+ unsigned short band_gsm900 :1;
+ unsigned short band_dcs1800 :1;
+ unsigned short band_pcs1900 :1;
+ unsigned short ps_epsk_tx_disable :1; /* Set as bit-1 when __EPSK_TX_SW_SWITCH_OFF__ is defined. */
+ unsigned short reserved0 :3;
+} MsCapability;
+
+// Factory Mode Calibration Item
+typedef struct
+{
+ unsigned short is_capable :1;
+ unsigned short is_mandatory :1;
+ unsigned short parameters :14;
+} FacModCalItm;
+
+typedef struct
+{
+ FacModCalItm cap_id; // 0
+ FacModCalItm afc; // 1
+ FacModCalItm rx_pathloss; // 2
+ FacModCalItm tx_pcl; // 3
+ FacModCalItm tx_subband; // 4
+ FacModCalItm trx_offset; // 5
+ FacModCalItm tx_iq; // 6
+ FacModCalItm tx_fb_dac; // 7
+ FacModCalItm tx_slope_skew; // 8
+ FacModCalItm w_coef; // 9
+ FacModCalItm txpc; // 10
+ FacModCalItm temp_adc; // 11
+ FacModCalItm remove_32k_xo; // 12
+ FacModCalItm co_crystal; // 13
+ FacModCalItm high_lna_sp; // 14
+ FacModCalItm mid_lna_sp; // 15
+ FacModCalItm low_lna_sp; // 16
+ FacModCalItm bat_temp_comp; // 17
+ FacModCalItm dts_gain_cmb; // 18
+ FacModCalItm uts_band_cmb; // 19
+ FacModCalItm co_temp_adc; // 20
+ FacModCalItm adjustable_lna_mode_pathloss; // 21
+ FacModCalItm gain_rf_cal; // 22
+ FacModCalItm bypass_check_fixafc_nvram; // 23
+ FacModCalItm multi_rat_tadc_bitmap; // 24
+ FacModCalItm multi_rat_afc_bitmap; // 25
+ FacModCalItm adjustable_lna_mode_pathloss_v2; // 26
+ FacModCalItm temperature_info; // 27
+ FacModCalItm dt_coexistence_info; // 28
+ FacModCalItm thermal_sensor_type; // 29
+ FacModCalItm nsft_listmode; // 30
+ FacModCalItm worldmode_id_info; // 31
+ FacModCalItm crystal_on_pmic_enable; // 32
+ FacModCalItm low_pcl_subband_cal; // 33
+ FacModCalItm fhc_dts_extra_fb_enable; // 34
+ FacModCalItm sawless_lna_sp; // 35
+ FacModCalItm nvram_access_interface; // 36
+ FacModCalItm elna_support_band_bitmap; // 37
+ FacModCalItm elna_high_sp; // 38
+ FacModCalItm elna_mid_sp; // 39
+ FacModCalItm elna_low_sp; // 40
+ FacModCalItm elna_w_coef_sp; // 41
+ FacModCalItm elna_mid_sawless_sp; // 42
+ FacModCalItm elna_high_sensitivity_sp; // 43
+ FacModCalItm elna_bypass_low_maxpin_sp; // 44
+ FacModCalItm elna_bypass_gain_threshold; // 45
+ FacModCalItm elna_bypass_support_band_bitmap; // 46
+ FacModCalItm sinwave_afc_get_temp_freq; // 47
+ FacModCalItm wcoef_setget_cmd_support; // 48
+ FacModCalItm tx_setget_cmd_support; // 49
+ FacModCalItm nsft_adjust_tpo_support; // 50
+ FacModCalItm rxd_v5_cmd_support; // 51
+ FacModCalItm rxd_support_band_bitmap; // 52
+ FacModCalItm mlna_type_v7; // 53
+ FacModCalItm rxlev_precision_extend; // 54
+ FacModCalItm telematics_volt_temp_enhance; // 55
+} FacModCal;
+
+typedef struct
+{
+ uint16 cap_itm_offset;
+ uint16 fmc_itm_offset;
+ MsCapability cap_itm;
+ FacModCal fmc_itm;
+} MsCapabilityExV2;
+
+#if MD_DRV_IS_FHC_SUPPORT
+typedef struct
+{
+ FrequencyBand band;
+ ARFCN arfcn;
+ #if IS_AFC_CAPABILITY_ENHANCEMENT_SUPPORT
+ uint16 dac_value[33]; //Modify from int16 to uint16
+ #else
+ int16 dac_value[33];
+ #endif
+ Gain gain;
+ int16 repeat_cnt; // repetitive test counts (frames) for each AFC DAC value
+ bool capid_cal; // capid calibration ctrl
+ bool linear_cal; // 33 stages calibration ctrl
+ int32 capid_min; // min value for capid range
+ int32 capid_max; // max value for capid range
+} DSSAfc;
+
+typedef enum
+{
+ GSM_LNA_NULL, //For old CMD, tool will not set gsm_lna_mode
+ GSM_LNA_HIGH,
+ GSM_LNA_MID,
+ GSM_LNA_LOW,
+ GSM_LNA_W_COEF,
+ GSM_LNA_SAWLESS_MID,
+ GSM_ELNA_HIGH_SENSITIVITY, //For Sensitivity, elna+G6
+ GSM_ELNA_BYPASS_LOW_MAXPIN //For Max Pin, elna bypass+G1
+}LNA_Cal_Type;
+
+/*Gen 95 RXD*/
+typedef enum
+{
+ GSM_RX_CAL_SEQ_V5_NULL = 0,
+ GSM_RX_CAL_SEQ_V5_UTRA_HIGH = 1,
+ GSM_RX_CAL_SEQ_V5_HIGH = 2,
+ GSM_RX_CAL_SEQ_V5_MID = 3,
+ GSM_RX_CAL_SEQ_V5_MID_SAWLESS = 4,
+ GSM_RX_CAL_SEQ_V5_LOW = 5,
+ GSM_RX_CAL_SEQ_V5_BYPASS_LOW = 6,
+ GSM_RX_CAL_SEQ_V5_WCOEF = 7
+} LNACalSeqV5_E; //LNA_Cal_Type Gen95 //Must the same as RfTestRxCalSeqV5_E
+
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+typedef struct
+{
+ FrequencyBand band;
+ ARFCN arfcn;
+ //Gain gain[6];
+ kal_int16 repeat_cnt;
+ kal_int16 dl_cell_power; //it is DL Power for each frame // 1/8dBm
+ LNACalSeqV5_E gsm_lna_mode [GSM_RF_MAX_RX_ANT_NUM];
+} DSSPL; //DSSPL_MultiAnt;
+#else
+typedef struct
+{
+ FrequencyBand band;
+ ARFCN arfcn;
+ Gain gain[6]; // gain for rx slot 0/1/2/3/4/5
+ int16 repeat_cnt; // repetitive test counts (frames) for each ARFCN value
+ LNA_Cal_Type gsm_lna_mode; //0(Null) 1(high) 2(mid) 3(low) 4(w-coef) 5(sawless mid) 6(elna+G6) 7(elna bypass+G1)
+} DSSPL;
+#endif
+
+typedef struct
+{
+ bool afc_cal;
+ bool pl_cal;
+ int8 sync_sb_num; // the SB frame numbers needed for sync process before path loss calibration
+ uint16 step_cnt; //int8 -> uint16 to match size 512
+ int16 power; // the power level expected to measure from test set
+ DSSAfc AfcDSS;
+ DSSPL PathLossDSS[L1_MAX_DTS_STEP_CNT-2];
+ int16 lpm_sb_num; // the SB frame numbers for DCXO LPM calibration
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+ uint8 Antenna; // GSM_AntDimension
+#endif
+} DTSParam;
+/*
+typedef struct
+{
+ AfcParams *afc_params;
+ Report *report;
+} DTSMParams;
+*/
+typedef struct
+{
+// DTSMParams params;
+ intx path_loss_cnt;
+ intx freq_offset;
+ intx capid_freq_offset_min;
+ intx capid_freq_offset[FHC_MAX_CAPID_SEARCH_NUM];
+ int32 capid_search_order[FHC_MAX_CAPID_SEARCH_NUM];
+ int32 capid;
+ int32 capid_high;
+ int32 capid_low;
+ int32 capid_best;
+ #if IS_AFC_CAPABILITY_ENHANCEMENT_SUPPORT
+ uint16 afc_dac; //Modify from int16 to uint16
+ #else
+ int16 afc_dac;
+ #endif
+ int16 arfcn;
+ int16 capid_cnt;
+ int16 repeat_index;
+ int8 state;
+ int8 capid_index;
+ int8 capid_okay_cnt;
+ int8 afc_dac_index;
+ int8 sb_okay_cnt;
+ uint8 sb_fail_cnt;
+ uint8 fb_fail_cnt;
+ bool pl_started;
+ bool rst_dts_idx_at_pl_cal_started;
+ bool pre_capid_cal_ok[FHC_PRE_CAPID_SEARCH_NUM];
+} sDTSM;
+
+typedef struct
+{
+ FrequencyBand band;
+ ARFCN arfcn;
+ int8 timeslot_per_frame;
+ int8 apc_dac_pcl_sel; // 2: gain step index, 1: apc_dac, 0: apc_pcl
+ int16 apc_dac_pcl_value[4];
+// uint8 pa_vbias_val;
+ uint8 pa_vbias_val[4];
+ uint8 is_low_pcl[4];
+ CodingScheme cs[4];
+ int32 repeat_cnt;
+ #if IS_AFC_CAPABILITY_ENHANCEMENT_SUPPORT
+ uint16 afc_dac_value;
+ #else
+ int16 afc_dac_value;
+ #endif
+ int8 tsc;
+ APCTxPattern pattern;
+ uint16 pattern_data;
+} USSApc;
+
+typedef struct
+{
+ uint16 step_cnt; //int8 -> uint16 to match size 512
+ int16 high_apc_dcoffset[FrequencyBandCount];
+ USSApc ApcUSS[L1_MAX_UTS_STEP_CNT];
+} UTSParam;
+#endif
+/* Functions provided by l1tst_cfg.c */
+void L1TST_Init(void);
+void L1TST_Stop(void);
+void L1TST_SelectFrequencyBand1900( bool selected );
+void L1TST_SetBBTXCfg( const sBBTXCfg *param );
+void L1TST_GetBBTXCfg( sBBTXCfg *param );
+intx L1TST_GetBBTXVer(void);
+int L1TST_GetCrystalCapRange(void);
+uint32 L1TST_GetBandSupport(void);
+uint16 L1TST_Get_EPSK_TX_Support(void);
+uint16 L1TST_Get_TCVCXO_Support(void);
+void GL1TST_DispatchMessage(ilm_struct *ilm_ptr);
+void L1TST_RF_SetRampApcLevel( int rf_band, int power_level, int apc_dac );
+bool L1TST_CheckAvailableBands( FrequencyBand band );
+bool L1TST_CheckAvailableARFCNs( ARFCN arfcn );
+#if defined(__ATERFTX_ERROR_HANDLE_ENHANCE__)
+bool L1TST_CheckBandARFCNisMatch( uint8 band, ARFCN arfcn );
+#endif //__ATERFTX_ERROR_HANDLE_ENHANCE__
+void L1TST_MsCapability( MsCapabilityEx *msCapabilityEx );
+void L1TST_MsCapabilityV2( MsCapabilityExV2 *ms_cap );
+void L1TST_TXPC_CL_GetAllADC( void *buff, int8 is_EPSK );
+void L1TST_TXPC_CL_GetAllTEMP( void *buff, int8 is_EPSK );
+void L1TST_TXPC_CL_GetSubband( int rf_band, void *buff, int8 is_EPSK );
+uint16 L1TST_TXPC_CL_GetOneADC( int rf_band, int power_level, int8 is_EPSK );
+uint16 L1TST_TXPC_GetTemperature( void );
+#if MD_DRV_IS_FHC_SUPPORT
+void L1TST_StartDTSCal( DTSParam *dtsData );
+void L1TST_StartUTSCal( UTSParam *utsData );
+sDTSM* L1TST_FHCLog(void);
+#endif
+
+#if MD_DRV_IS_NSFT_SUPPORT
+ #if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+ void L1TST_StartNSFTProc( FrequencyBand band, ARFCN BCh_arfcn, ARFCN TCh_arfcn,
+ Power BCh_dl_power, Power TCh_dl_power, TSC tsc, TimeSlot TCh_slot,
+ Power txPowerLev, bool IS_EPSK_TX, CodingScheme epsk_cs );
+ void L1TST_NSFTProc_ChangeChannel( FrequencyBand band, ARFCN BCh_arfcn, ARFCN TCh_arfcn,
+ Power BCh_dl_power, Power TCh_dl_power, TSC tsc, TimeSlot TCh_slot,
+ Power txPowerLev, bool IS_EPSK_TX, CodingScheme epsk_cs );
+ #else
+ void L1TST_StartNSFTProc( FrequencyBand band, ARFCN BCh_arfcn, ARFCN TCh_arfcn,
+ Gain BCh_gain, Gain TCh_gain, TSC tsc, TimeSlot TCh_slot,
+ Power txPowerLev, bool IS_EPSK_TX, CodingScheme epsk_cs);
+ void L1TST_NSFTProc_ChangeChannel ( FrequencyBand band, ARFCN BCh_arfcn, ARFCN TCh_arfcn,
+ Gain BCh_gain, Gain TCh_gain, TSC tsc, TimeSlot TCh_slot,
+ Power txPowerLev, bool IS_EPSK_TX, CodingScheme epsk_cs);
+ #endif //#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+void L1TST_NSFTProc_ChangePower( Power txPowerLev);
+void L1TST_StopNSFTProc( void );
+void L1TST_StopNSFT_RecoverToMetaState( void );
+void L1TST_SetupSingleEndBERData( uint32 tst_cnt );
+void L1TST_ReportSingleEndBERDone( uint32* seBER_SUM, uint32* curr_cnt );
+void L1TST_SetupRXLEVData( void );
+ #if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+ void L1TST_ReportRXLEV( uint16 RXLEV[] );
+ #else
+ void L1TST_ReportRXLEV( uint16 *RXLEV );
+ #endif
+void L1TST_ReportRXQual( uint16 BER_PERMILLAGE, uint8 *RXQual );
+#endif //#if MD_DRV_IS_NSFT_SUPPORT
+
+/* Functions provided by l1tst_pm.c */
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+void L1TST_PowerScan( ARFCN arfcn, int8 sampleNoPerFrame, Gain gain, Gain gain_rxd, int16 frames, FrequencyBand band );
+#else
+void L1TST_PowerScan(ARFCN arfcn, int8 sampleNoPerFrame, Gain gain, int16 frames);
+#endif
+
+#if MD_DRV_IS_W_CANCELLATION_SUPPORT
+ #if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+ void L1TST_IR_PowerScan( ARFCN arfcn, int8 sampleNoPerFrame, Gain gain, Gain gain_rxd, int16 frames, int8 if_flag, FrequencyBand band );
+ #else
+ void L1TST_IR_PowerScan( ARFCN arfcn, int8 sampleNoPerFrame, Gain gain, int16 frames, int8 if_flag );
+ #endif
+#endif
+
+/* Functions provided by l1tst_fcb.c */
+#if IS_AFC_CAPABILITY_ENHANCEMENT_SUPPORT
+void L1TST_FCBControl(ARFCN arfcn, uint16 dacValue, Gain gain);
+#else
+void L1TST_FCBControl(ARFCN arfcn, int16 dacValue, Gain gain);
+#endif
+intx L1TST_FCBGetFreqOffset(void);
+
+/* Functions provided by l1tst_nbtx.c */
+#if IS_AFC_CAPABILITY_ENHANCEMENT_SUPPORT
+void L1TST_NormalBurstTx(ARFCN arfcn, BSIC bsic, int8 bitmask,
+ Power txPowerLev, int16 frames, uint16 dacValue, APCTxPattern pattern);
+#else
+void L1TST_NormalBurstTx(ARFCN arfcn, BSIC bsic, int8 bitmask,
+ Power txPowerLev, int16 frames, int16 dacValue, APCTxPattern pattern);
+#endif
+
+/* Functions provided by l1tst_cont.c */
+void L1TST_ContinuousTx(ARFCN arfcn, ContTxPattern pattern,uint16 patternData, bool onOff, uint16 modtype, Power PowerLev);
+#if defined(__2G_RX_DIVERSITY_PATH_SUPPORT__)
+void L1TST_ContinuousRx( FrequencyBand band, ARFCN arfcn, Gain gain, Gain gain_rxd, bool onOff );
+#else
+void L1TST_ContinuousRx(ARFCN arfcn, Gain gain, bool onOff);
+#endif
+
+/* Functions provided by l1tst_pdtch.c */
+#if (MD_DRV_IS_GPRS || MD_DRV_IS_MULTISLOT_TX_SUPPORT)
+ #if IS_AFC_CAPABILITY_ENHANCEMENT_SUPPORT
+void L1TST_MultiSlotTx( ARFCN arfcn, BSIC bsic, int8 timeSlotmask, Power powerLev[4],
+ CodingScheme cs[4], TimingAdvance ta, int32 frames, uint16 dacValue,
+ bool isEgprs, APCTxPattern pattern, uint16 patternData );
+ #else
+void L1TST_MultiSlotTx( ARFCN arfcn, BSIC bsic, int8 timeSlotmask, Power powerLev[4],
+ CodingScheme cs[4], TimingAdvance ta, int32 frames, int16 dacValue,
+ bool isEgprs, APCTxPattern pattern, uint16 patternData );
+ #endif
+#endif
+
+#if MD_DRV_IS_TX_GAIN_RF_CALIBRATION_SUPPORT
+ #if IS_AFC_CAPABILITY_ENHANCEMENT_SUPPORT
+//void L1TST_TxGainRFSetting(ARFCN arfcn, BSIC bsic, CodingScheme cs, TimingAdvance ta,
+// int32 frames, uint16 dacValue, bool isEgprs, APCTxPattern pattern,
+// uint16 patternData, uint16 paGain, uint16 paVbias, uint16 rfGainIndex );
+ #else
+void L1TST_TxGainRFSetting(ARFCN arfcn, BSIC bsic, CodingScheme cs, TimingAdvance ta,
+ int32 frames, int16 dacValue, bool isEgprs, APCTxPattern pattern,
+ uint16 patternData, uint16 paGain, uint16 paVbias, uint16 rfGainIndex );
+ #endif
+uint8 L1TST_Query_Grf_Number( void );
+int16* L1TST_Query_Baseband_Power( void );
+#endif
+
+/* Functions provided by l1tst_afc.c */
+#if IS_AFC_CAPABILITY_ENHANCEMENT_SUPPORT
+void L1TST_SetAfcDacValue( uint16 dacValue );
+#else
+void L1TST_SetAfcDacValue( int16 dacValue );
+#endif
+uint16 L1TST_GetAfcDacValueAtTRXOffsetCalibration(void);
+void L1TST_SetAFcData( int16 calibrated_dac_default, intx calibrated_int_slope );
+void L1TST_SetDcxoPowerMode(kal_uint8 mode);
+
+#if MD_DRV_IS_EPSK_TX_SUPPORT
+void L1TST_RF_SetRampApcLevelEPSK( int rf_band, int power_level, int apc_dac );
+#endif
+
+typedef void (*CalibraHandlerCallback)(kal_int32 u4Result);
+bool L1TST_Begin32KCalibration( CalibraHandlerCallback cb );
+void L1TST_Get32KCalibrationResult( kal_uint32 fmResult );
+
+void L1TST_UpdateCalibrationData( kal_uint32 cal_lid );
+uint16 L1TST_Query_L1D_Mode( void );
+
+//For fix xl1sim build warning
+void L1SM_BeginMetaMode32KCalibration( void );
+void L1D_SinWave_Detection( bool is_sin_wave );
+//void L1D_CalibrateGainMismatch( void );
+#if IS_AFC_CAPABILITY_ENHANCEMENT_SUPPORT //uint16 dacValue
+unsigned long L1TST_MultiSlotTx_with_AUXADCRead( ARFCN arfcn, BSIC bsic, int8 timeSlotmask, Power powerLev[4],
+ CodingScheme cs[4], TimingAdvance ta, int32 frames, uint16 dacValue,
+ bool isEgprs, APCTxPattern pattern, uint16 patternData );
+
+#else
+unsigned long L1TST_MultiSlotTx_with_AUXADCRead( ARFCN arfcn, BSIC bsic, int8 timeSlotmask, Power powerLev[4],
+ CodingScheme cs[4], TimingAdvance ta, int32 frames, int16 dacValue,
+ bool isEgprs, APCTxPattern pattern, uint16 patternData );
+#endif
+#ifdef MTK_SLEEP_ENABLE
+void L1SM_WakeUp( void );
+#endif
+
+
+void L1TST_ReInitAFCData( void );
+
+#endif
diff --git a/mcu/interface/middleware/meta/ul1tst_msg.h b/mcu/interface/middleware/meta/ul1tst_msg.h
new file mode 100644
index 0000000..550f4c6
--- /dev/null
+++ b/mcu/interface/middleware/meta/ul1tst_msg.h
@@ -0,0 +1,9 @@
+#if (defined __MD93__)
+#include "ul1tst_msg_gen93.h"
+#elif (defined __MD95__)
+#include "ul1tst_msg_gen95.h"
+#elif (defined __MD97__) || (defined __MD97P__)
+#include "ul1tst_msg_gen97.h"
+#else
+#error "[ERROR] Invalid MD generation"
+#endif
diff --git a/mcu/interface/middleware/meta/ul1tst_msg_gen93.h b/mcu/interface/middleware/meta/ul1tst_msg_gen93.h
new file mode 100644
index 0000000..e888606
--- /dev/null
+++ b/mcu/interface/middleware/meta/ul1tst_msg_gen93.h
@@ -0,0 +1,976 @@
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*******************************************************************************/
+
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ul1tst_msg.h
+ *
+ * Project:
+ * --------
+ * MT6268 Project
+ *
+ * Description:
+ * ------------
+ * ul1tst_msg.h
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
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+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef UL1TST_MSG_H
+#define UL1TST_MSG_H
+
+/*===============================================================================*/
+
+#include "kal_general_types.h"
+//#include "nvram_data_items.h"
+#include "kal_public_defs.h"
+
+#include "ft_msg_ul1rf.h"
+/*===============================================================================*/
+
+//#ifdef MT6268T
+typedef enum
+{
+ UL1TST_CMD_TXACCESS = 0
+ ,UL1TST_CMD_TX_DPCH
+ ,UL1TST_CMD_RX_DPCH
+ ,UL1TST_CMD_RSSI
+ ,UL1TST_CMD_RSSI_RXD /**< \breif R8 get both rx path RSSI */
+ ,UL1TST_CMD_RSSI_CONT
+ ,UL1TST_CMD_RSCP
+ ,UL1TST_CMD_AFC //anthony 0514
+ ,UL1TST_CMD_MQC //20081114 congo, add msg for mobile quick caliration
+ ,UL1TST_CMD_NSFT
+ ,UL1TST_CMD_HSDPA_NSFT
+ ,UL1TST_CMD_HSUPA_NSFT
+ ,UL1TST_CMD_STOP
+ ,UL1TST_CMD_MQC_OCTLEV
+ ,UL1TST_CMD_MQC_EXT //rxd, gvgabb0
+ ,UL1TST_CMD_AFC_EXT //Add msg for DCXO to do multi-bin detection (ics_mode=CFE_MODE1)
+ ,UL1TST_CMD_RELOAD_NVRAM
+ ,UL1TST_CMD_ANT_MODE /**< \brief R8 set rx path: 0:none 1:main 2:diversity: 3: both */
+ ,UL1TST_CMD_PA_DRIFT_SWITCH // PA drift compensation switch message
+ ,UL1TST_CMD_RX_CELL_POWER // configure the Rx cell power before cell search
+ ,UL1TST_CMD_GET_RF_TEMP /*20*/ // Get the RF Temperature sensor reading (parameter:UL1TSTCmdGetRfTempSensor)
+ ,UL1TST_CMD_GET_RF_CAPABILITY /*21*/ // Get the RF capability (no parameter)
+ ,UL1TST_CMD_GET_MIPI_PA_CW_NUMBER /*22*/
+ ,UL1TST_CMD_LIST_MODE //for list mode
+ ,UL1TST_CMD_GET_RF_MIPI_CODEWORD /*24*/
+ ,UL1TST_CMD_SET_RF_MIPI_CODEWORD /*25*/
+ ,UL1TST_CMD_GET_RF_TEMP_INFO /*26*/
+ ,UL1TST_CMD_RX_GAIN_SWEEP /* 27 */
+ ,UL1TST_CMD_END
+} UL1TSTCmdType;
+
+typedef struct
+{
+ kal_uint16 ul_uarfcn; /* UL uarfcn range:????Read from NVRAM?? (9612 ~ 9888) */
+ kal_uint16 dl_uarfcn;
+ kal_uint16 dl_psc; /* 0~511. */
+ kal_uint8 signature; /* 0~15, for single signature decision. */
+ kal_uint8 pa_mode; /* 0: high 1: middle 2: low */
+ kal_int8 init_power; /* Assume cpich_rscp=0, ul_interference=0. */
+ kal_uint8 power_step; /* Preamble power ramping step. 1 ~ 8dB */
+ kal_uint8 max_retrans; /* 1~64 */
+ kal_uint8 asc; /* 0~7 */
+} UL1TSTCmdTxAccess;
+
+typedef struct
+{
+ //kal_int16 dl_freq;
+ kal_int16 ul_freq;
+ kal_int16 psc; /* 0~511. */
+ kal_uint32 sc_code; /* Scrambling code #. 0 ~ 16777215 */
+ kal_uint8 power_ctrl_mode;
+ kal_uint8 pa_mode;
+ kal_uint16 idx;
+ kal_uint16 afc_dac;
+ kal_uint8 dpcch_pwr;
+ kal_uint8 dpdch_pwr;
+
+ /* Below for UL1D_RF_Meta_SetTxInfo. */
+ /* Below for setPaApcDac. */
+ kal_uint8 rf_band;
+ kal_uint8 vm1;
+ kal_uint8 vm2;
+ kal_uint16 dc2dc_dac;
+ kal_uint16 vbias_dac;
+ kal_bool pwr_det;
+ kal_uint16 apc_dac;
+ kal_uint16 pa_dac;
+} UL1TSTCmdTxDPCh; //Anthony
+
+typedef struct
+{
+ kal_int16 dl_freq;
+ kal_int16 psc; /* 0~511. */
+ kal_uint8 ssc; /* 0~15. */
+ kal_int16 ovsf; /* 0~sf-1. */
+ kal_uint16 afc_dac;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} UL1TSTCmdRxDPCh;
+
+//for list mode
+#define MAX_LM_VALID_FREQ 50
+typedef struct
+{
+ /* common parameters */
+ kal_bool afc_dac_valid;
+ kal_uint16 afc_dac;
+ kal_uint8 loopbackType;//0: no loopback, 1: loopback type 1, 2: loopback type 2
+ kal_uint8 frame_shift;//default=0, depends on Test Machine
+ kal_uint8 rmc_type;//1: 12.2k, 2: 64k, 3: 144k, 4: 384k
+ kal_uint8 ctfc[4];//8960=0,1,2,3; cmu200=0,2,1,3
+ kal_uint8 bit_pattern;//0: single ended ber disable, 1: all one, 2: all zero
+ /* DL parameters */
+ kal_int16 dl_freq[MAX_LM_VALID_FREQ];
+ kal_int16 dl_psc;/* 0~511. */
+ kal_int16 dl_ovsf;//RMC12.2k: <128, but test set not allow all ovsf,
+ //RMC12.2k default ovsf=9
+ /* UL parameters */
+ kal_int16 ul_freq[MAX_LM_VALID_FREQ];
+ kal_uint16 ul_tfci;
+ kal_uint32 ul_sc_code; /* Scrambling code #. 0 ~ 16777215 */
+ kal_bool iq_pwr_valid;//valid dpcch, dpdch power
+ kal_uint8 dpcch_pwr;//default 8, depends on testing requirement
+ kal_uint8 dpdch_pwr;//default 15, depends on testing requirement
+
+ /* common parameters */
+ kal_uint8 valid_freq; //valid count of dl/ul freq.
+ kal_uint16 test_item[MAX_LM_VALID_FREQ]; //bit0:reserved. bit1:single end BER. bit2:RSSI measure. bit3:reserved. bit4:reserved. bit5:ILPC_ABC. bit6:ILPC_EF. bit7:ILPC_GH.
+ /* the time settings, unit = frame */
+ kal_uint16 full_test_time;//the total time of one freq.
+ kal_uint8 ready_time; // for first sync after TX transmit
+ kal_uint8 sync_time; //the time of sync, from cs_start to LBK is 26 frame
+ kal_uint8 retrial; //just for first sync
+ kal_uint16 test_time; //the time of test for max&min TX power tests
+ kal_uint16 rx_rssi_start_time[3]; //RSSI start time for 3 LNA mode
+ kal_uint8 rx_rssi_duration[3];
+ kal_uint16 rx_ber_start_time; //BER start time
+ kal_uint8 rx_ber_duration;
+ kal_uint16 ILPC_ABC_time; //the time of ILPC ABC
+ kal_uint16 ILPC_EF_time; //the time of ILPC EF
+ kal_uint16 ILPC_GH_time; //the time of ILPC GH
+ kal_uint16 transition_time; //the limitation of UE state machine is 4 frame at least
+} UL1TSTCmdLISTMODE;
+
+typedef struct
+{
+ /* common parameters */
+ kal_bool afc_dac_valid;
+ kal_uint16 afc_dac;
+ kal_uint8 loopbackType;//0: no loopback, 1: loopback type 1, 2: loopback type 2
+ kal_uint8 frame_shift;//default=0, depends on Test Machine
+ kal_uint8 rmc_type;//1: 12.2k, 2: 64k, 3: 144k, 4: 384k
+ kal_uint8 ctfc[4];//8960=0,1,2,3; cmu200=0,2,1,3
+ kal_uint8 bit_pattern;//0: single ended ber disable, 1: all one, 2: all zero
+ /* DL parameters */
+ kal_int16 dl_freq;
+ kal_int16 dl_psc;/* 0~511. */
+ kal_int16 dl_ovsf;//RMC12.2k: <128, but test set not allow all ovsf,
+ //RMC12.2k default ovsf=9
+ /* UL parameters */
+ kal_int16 ul_freq;
+ kal_uint16 ul_tfci;
+ kal_uint32 ul_sc_code; /* Scrambling code #. 0 ~ 16777215 */
+ kal_bool iq_pwr_valid;//valid dpcch, dpdch power
+ kal_uint8 dpcch_pwr;//default 8, depends on testing requirement
+ kal_uint8 dpdch_pwr;//default 15, depends on testing requirement
+
+ kal_uint8 subtest; // for DPA/UPA use
+} UL1TSTCmdNSFT;
+
+#define FDD_MAX_FREQ_LIST 36
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int16 scc_dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int16 settings; // PCC SRX/LNA Settings
+ kal_uint8 srxcfg;
+ kal_uint8 vcocfg;
+ kal_uint8 lnaport;
+ kal_uint8 temperature;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain[2]; /* mode0. */
+ kal_uint8 LNAmode[2]; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga[2]; /* mode1. */
+ kal_uint8 lpm_mode; /* 0: normal LNA gain mode , 1: low power LNA gain mode. */
+
+ kal_bool rssi_continue;
+} UL1TSTCmdRSSI;
+
+typedef struct
+{
+ kal_bool pscan_before_cell_search; /* True if UL1TST needs power scan before cell search/RSCP. */
+ kal_int16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+ kal_uint8 sample_num_per_cell;
+ kal_bool read_sfn; /* True if we need to do SFN measurement for the found cell. */
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} UL1TSTCmdRSCP;
+
+typedef struct
+{
+// kal_bool pscan_before_cell_search; /* True if UL1TST needs power scan before cell search/RSCP. */
+ kal_int16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+// kal_uint8 sample_num_per_cell;
+// kal_bool read_sfn; /* True if we need to do SFN measurement for the found cell. */
+
+ kal_int16 afc_dac;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} UL1TSTCmdAFC;
+
+//20081115 congo, add MQC cmd
+#define MAX_MQC_FREQ_COUNT 15 // 6293 need 14 frequency
+#define MAX_MQC_PWR_COUNT 15 // 6293 need 13 point
+#define MAX_CAL_BAND 10 // 6293 need 5 band
+#define MAX_MQC_RSSI_COUNT 200 // 6293 need 15*14=195 point
+
+typedef struct
+{
+/* Tx part settings */
+
+/* Below for UL1D_RF_Meta_SetTxInfo. */
+ kal_bool no_loop_ctrl;
+ kal_uint16 afc_dac;
+/* Below for setPaApcDac. */
+//for 3 PA mode, 0:H, 1:M, 2:L
+//Add Tx band
+ kal_bool pwr_det;//0 off/manual mode, 1 on/auto mode
+//kal_uint16 pwr_det_threshold;
+ kal_uint8 power_ctrl_mode;//1: HW->O3, 2: SW->59D, Smarti
+// kal_uint8 vm1[MAX_CAL_BAND][3]; //PA param
+// kal_uint8 vm2[MAX_CAL_BAND][3]; //PA param
+// kal_uint16 dc2dc_dac[MAX_CAL_BAND][3];//PA param
+// kal_uint16 vbias_dac[MAX_CAL_BAND][3];//PA param
+// kal_bool init_tx_onoff; //0:off, 1:on
+// kal_bool ready_tx_onoff; //0:off, 1:on
+// kal_uint8 init_pa_mode;
+// kal_uint8 ready_pa_mode;
+// kal_uint16 init_pa_gain;
+// kal_uint16 ready_pa_gain;
+// kal_uint16 init_vga_dac_tpc_idx;
+// kal_uint16 ready_vga_dac_tpc_idx;
+
+/* Rx part settings */
+
+/* Below for RF_SetBBRxParams. */
+// For high gain cal. @ high power: replace gain table
+ kal_uint8 temperature;
+// kal_bool hwAGC; //0:SW gain mode, 1:HW AGC. AGC must on for RSSI measure. HW limit
+// kal_int16 gain_init; /* for HW mode */
+
+/* Mobile Quick Calibration settings */
+
+/* general settings */
+// kal_bool init_condition; //0: max_pwr, 1:min_pwr
+ kal_uint8 step_duration; //in slot
+// kal_uint8 ready_duration; //in slot
+ kal_uint8 retune_duration; //in slot
+// kal_uint8 gain_stable_time; //in slot
+// kal_uint16 max_vga_dac;
+// kal_uint16 min_vga_dac;
+// kal_uint16 jump_vga_dac;
+
+/* freq-pwr table */
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 hpm_cal_point;
+ kal_uint8 lpm_cal_point;
+
+// kal_uint8 odd_record; /*for Anritsu8820, only odd step (1,3,5...start from 1) is for measurement. */
+
+// kal_uint8 pa_gain_start_idx; // for O3 TPC
+// kal_uint8 pd_gain_start_idx; // for O3 TPC
+
+ kal_uint8 dl_band; //1:band1, 2:band2, 3:band3, 5:band5
+ kal_uint8 ul_band; //1:band1, 2:band2, 3:band3, 5:band5
+ kal_uint16 dl_freq[MAX_MQC_FREQ_COUNT]; //in uarfcn
+ kal_uint16 ul_freq[MAX_MQC_FREQ_COUNT]; //in uarfcn
+ kal_uint8 pa_mode[MAX_MQC_PWR_COUNT];
+ kal_uint16 vga_dac_tpc_idx[MAX_MQC_PWR_COUNT];//power_ctrl_mode=HW, tpc_idx. Vice versa.
+
+ kal_uint16 pa_gain[MAX_MQC_PWR_COUNT]; // for O3 TPC
+ kal_uint8 pd_gain[MAX_MQC_FREQ_COUNT]; // for O3 TPC
+ kal_uint8 pa_section[MAX_MQC_PWR_COUNT];
+
+ kal_uint16 rx_lna_gain[MAX_MQC_PWR_COUNT]; /* PRX total RF gain .5 after 6293*/
+ kal_uint16 rxd_lna_gain[MAX_MQC_PWR_COUNT]; /* DRX total RF gain .5 after 6293*/
+
+ kal_uint8 fix_pga_gain[MAX_MQC_PWR_COUNT]; /* fix pga gain for APC calibration */
+ kal_uint8 fix_lpm[MAX_MQC_PWR_COUNT]; /* fix LPM for AGC calibration */
+ kal_uint8 rx_elna_bypass[MAX_MQC_PWR_COUNT];
+ kal_uint8 rxd_elna_bypass[MAX_MQC_PWR_COUNT];
+ kal_uint8 rx_elna_mode;
+ kal_uint8 rxd_elna_mode;
+
+ kal_uint8 rx_cal_sequency[MAX_MQC_PWR_COUNT];
+ kal_int16 rx_cal_dl_power[MAX_MQC_PWR_COUNT];
+// kal_uint8 lna_gain_start_idx;
+// kal_uint8 cal_num;
+// kal_uint8 route_setting[3];
+} UL1TSTCmdMQC;
+
+typedef struct
+{
+ kal_uint32 lid; // the lid is needed to update run-time value
+ kal_uint32 eg_ptr; // the event group pointer used to notify runt-time update finish
+} UL1TSTCmdReloadNVRAM;
+
+typedef struct
+{
+ kal_uint16 measure_count; /*<! specify the measurement count UL1D will do the measurement measure_count times */
+} UL1TSTCmdGetRfTempSensor;
+
+typedef struct
+{
+ kal_uint16 rf_band_idx;
+ kal_uint16 power_level_num;
+ kal_uint16 code_word_num;
+}
+UL1TSTCmdSetMipiCodeWord;
+
+
+typedef union
+{
+ UL1TSTCmdTxAccess txaccess;
+ UL1TSTCmdTxDPCh txdpch; //Anthony
+ UL1TSTCmdRxDPCh rxdpch;
+ UL1TSTCmdRSSI rssi;
+ UL1TSTCmdRSCP rscp;
+ UL1TSTCmdAFC afc; //anthony 0514
+ UL1TSTCmdMQC mqc;
+ UL1TSTCmdNSFT nsft;
+ UL1TSTCmdLISTMODE listmode; //for list mode
+ UL1TSTCmdReloadNVRAM reload;
+ UL1TSTCmdGetRfTempSensor rfTemperature; /*<! UL1TST_CMD_GET_RF_TEMP */
+ kal_uint8 is_PaDrift; // PA drfit compensation switch message
+ kal_uint8 rxdMode; /**< \brief R8 set rx path: 0:none 1:main 2:diversity: 3: both */
+ kal_int32 rx_cell_power;// configure the Rx cell power before cell search. uints:qdbm
+ kal_uint8 mipi_rf_band;
+ kal_uint8 fdd_mode_setup; // 1 : UBIN mode Init 3G FDD , 0 : UBIN mode de-init 3G FDD
+ UL1TSTCmdSetMipiCodeWord setMipiPaCwParam;
+} UL1TSTCmdParam;
+
+#define IS_META_CA_SUPPORT 0
+
+#define IS_ARX_LPM_SUPPORT 1
+
+// For CA enum
+
+typedef enum
+{
+ VCO_SRX_SEL_INVALID = 0,
+ VCO_SRX_SEL_SRX = 1,
+ VCO_SRX_SEL_VCO = 2,
+} UL1TSTVcoSrxSel;
+
+
+typedef struct
+{
+ kal_uint8 vco_cfg;
+ kal_uint8 srx_cfg;
+ kal_uint8 lna_port;
+ kal_uint8 lna_group;
+} UL1TSTVcoSrxLnaCfg;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 padding[3];
+ UL1TSTVcoSrxLnaCfg cfg[3];
+} UL1TSTSettingByBand;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 cls;
+ kal_uint8 vco_cfg;
+ kal_uint8 srx_cfg;
+ kal_uint8 lna_port;
+ kal_uint8 lna_group;
+} UL1TSTCaRouteDes;
+
+typedef struct
+{
+ UL1TSTCaRouteDes cfg[2];
+} UL1TSTCaCombineDes;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 cls;
+} UL1TSTBandClass;
+
+typedef struct
+{
+ kal_uint8 cc_num;
+ kal_uint8 used_band;
+ UL1TSTBandClass cc_setting[2];
+} UL1TSTRxUsageDes;
+
+
+typedef struct
+{
+ kal_uint16 scenario;
+ kal_uint8 cc_rx_route_idx[2];
+ kal_uint8 cc_tx_route_idx;
+
+} UL1TSTUsageMapTable;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 index[3];
+} UL1TSTSupportCaCombTblIdx;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 route_idx;
+ kal_uint8 usg_start_idx;
+ kal_uint8 usg_stop_idx;
+} UL1TSTUsageElm;
+
+typedef struct
+{
+ UL1TSTUsageElm sb;
+ UL1TSTUsageElm ca[2];
+} UL1TSTSupportRxUsageByBand;
+
+typedef struct
+{
+ kal_uint16 tbl_offset;
+ kal_uint16 tbl_size;
+} UL1TSTVarTblInfo;
+
+typedef struct
+{
+ kal_uint32 support_route_bitmap;
+ kal_uint32 umts_vco_srx_sel;
+ UL1TSTSettingByBand support_vco_srx_lna_cfg[5];
+ UL1TSTVarTblInfo ca_comb_tbl_info;
+ UL1TSTSupportCaCombTblIdx support_ca_tbl_idx[5];
+ UL1TSTVarTblInfo rx_usage_tbl_info;
+ UL1TSTSupportRxUsageByBand support_rx_use_by_band[5];
+} UL1TSTCaConfig;
+
+
+
+//Result
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi[ FDD_MAX_FREQ_LIST ];
+ kal_int16 scc_dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 scc_rssi[ FDD_MAX_FREQ_LIST ];
+} UL1TSTResultRSSI;
+
+// R8 get both rx path RSSI result
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi_rxd[ FDD_MAX_FREQ_LIST ];
+ kal_int16 scc_dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 scc_rssi[ FDD_MAX_FREQ_LIST ];
+ kal_int32 scc_rssi_rxd[ FDD_MAX_FREQ_LIST ];
+
+ kal_uint8 rx_LNAmode[FDD_MAX_FREQ_LIST];
+ kal_uint8 rxd_LNAmode[FDD_MAX_FREQ_LIST];
+} UL1TSTResultRSSIRxD;
+
+typedef struct
+{
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_int32 tm; /* Cell frame boundary offset to LST */
+ kal_int16 off; /* Cell frame number offset to LST */
+ kal_bool sttd; /* True for STTD used. */
+ kal_uint8 sample_num;
+ kal_int16 rscp_sum; //kal_uint8 rscp_sum;
+ kal_int16 freq_error; //anthony 0514
+} UL1TST_cpich_result_T;
+
+#define MAX_NUM_MEAS_CELL 32
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_cell;
+ UL1TST_cpich_result_T cpich_result[ MAX_NUM_MEAS_CELL ];
+} UL1TSTResultRSCP;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_int32 tm; /* Cell frame boundary offset to LST */
+ kal_bool sttd; /* True for STTD used. */
+ kal_uint8 rscp_sum;
+ kal_int16 freq_error;
+} UL1TSTResultAFC;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_int32 tm; /* Cell frame boundary offset to LST */
+ kal_bool sttd; /* True for STTD used. */
+ kal_uint8 rscp_sum;
+ kal_int32 freq_error;
+} UL1TSTResultAFC_EXT;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint32 ber; /* Spec requirement=10^-3. We will count 10^5 frames(100 times spec requirement) for BER calculation. Only count for the only TRCh for DPDCh. */
+} UL1TSTResultRxDPCh;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 link_status;
+} UL1TSTResultNSFT;
+
+//#define MAX_MQC_RSSI_COUNT 400
+typedef struct
+{
+ kal_bool ok;
+ /* freq-pwr table */
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 rx_lna_mode[MAX_MQC_RSSI_COUNT]; // 0: high, 1: middle, 2: low
+ kal_int16 rssi[MAX_MQC_RSSI_COUNT];
+ kal_uint8 rxd_lna_mode[MAX_MQC_RSSI_COUNT]; // 0: high, 1: middle, 2: low
+ kal_int16 rssi_rxd[MAX_MQC_RSSI_COUNT];
+ kal_uint16 pwr_det_value[MAX_MQC_FREQ_COUNT][3];
+ kal_int16 mqc_tx_gvgabb0_report[MAX_MQC_RSSI_COUNT];
+ /* {pd_meas-PA_high, pd_meas-PA_mid, pd_meas-PA_low}, //freq-1
+ * {pd_meas-PA_high, pd_meas-PA_mid, pd_meas-PA_low}, //freq-2
+ * ...
+ * {pd_meas-PA_high, pd_meas-PA_mid, pd_meas-PA_low}, //freq-freq_count
+ */
+} UL1TSTResultMQCOctLev;
+
+typedef struct
+{
+ kal_bool ok;
+ /* freq-pwr table */
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_int16 rssi[MAX_MQC_RSSI_COUNT];
+ kal_uint16 pwr_det_value[MAX_MQC_FREQ_COUNT];
+ /* {RSSI-1, RSSI-2, ... , RSSI-pwrcount}, //freq-1
+ * {RSSI-1, RSSI-2, ... , RSSI-pwrcount}, //freq-2
+ * ...
+ * {RSSI-1, RSSI-2, ... , RSSI-pwrcount}, //freq-freq_count
+ * Same for power detector.
+ */
+} UL1TSTResultMQC;
+
+//for list mode
+typedef struct
+{
+ kal_uint8 status;
+ kal_uint8 current_idx;
+ kal_int16 total_bits[MAX_LM_VALID_FREQ][2]; //0:real ber test. 1:debug before ber test
+ kal_int16 error_bits[MAX_LM_VALID_FREQ][2];
+ kal_int16 rssi[MAX_LM_VALID_FREQ][3]; //RSSI at 3 LNA mode
+ kal_int16 rssi_rxd[MAX_LM_VALID_FREQ][3]; //RSSI RXD at 3 LNA mode
+ kal_int8 lnamode[3];
+} UL1TSTResultListMode;
+
+typedef struct
+{
+ kal_bool ok; /*<! ok indicator */
+ kal_uint32 sum; /*<! the sum of measure_count times of temp sensor result */
+} UL1TSTResultGetRfTempSensor;
+
+/* DO NOT Modify the definition of UL1TSTCalibrationItem */
+typedef struct
+{
+ kal_uint32 is_capable:1; /*<! the indicator to indicate if this item is supported by SW or HW */
+ kal_uint32 is_mandatory:1; /*<! the indicator to indicate if this item is mandatory to be calibrated */
+ kal_uint32 parameters:30; /*<! parameter to be carried to tool side */
+} UL1TSTCalibrationItem;
+
+/* DO NOT Modify the member order of UL1TSTCalibrationItemSet, Items must be added to the end */
+typedef struct
+{
+ UL1TSTCalibrationItem tadc_cal; /*[ 0] TADC calibration capability */
+ UL1TSTCalibrationItem multi_rat_tadc_bitmap; /*[ 1] bit map of multi-rat TADC calibration */
+ UL1TSTCalibrationItem multi_rat_afc_bitmap; /*[ 2] bit map of multi-rat AFC calibration */
+ UL1TSTCalibrationItem mipi_pa_level_and_cw_num; /*[ 3] Number of MIPI PA CW */
+ UL1TSTCalibrationItem temperature_info; /*[ 4] */
+ UL1TSTCalibrationItem list_mode_support; /*[ 5] Target support list mode API; is_capable (0: not supported, 1: supported) */
+ UL1TSTCalibrationItem thermal_sensor_type; /*[ 6] Target support temp sensor type; is_capable (0: not supported, 1: supported) parameter (0: internal, 1: external) */
+ UL1TSTCalibrationItem ubin_mode_switch_support; /*[ 7] */
+ UL1TSTCalibrationItem nvram_access_interface; /*[ 8] Target support nvram access API by ul1tst ; is_capable (0: not supported, 1: supported) */
+ UL1TSTCalibrationItem rx_gain_lpm_support; /*[ 9] Target support RX low power gain mode ; is_capable (0: not supported, 1: supported) */
+ UL1TSTCalibrationItem nsft_get_RSSI; /*[10] Target support get RSSI during NSFT flow ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem prf_select; /*[11] Target support prf select modify ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem nsft_reset_ber_result; /*[12] Target support NSFT reset BER result ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem elna_addition; /*[13] Target PRX support eLNA addition ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem apc_extend; /*[14] Target support APC calibration extend ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem elna_addition_diversity_path; /*[15] Target DRX support eLNA addition ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem cancel_polling_action_when_get_fhc_result; /*[16] Target remove polling action when get FHC result ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem wcdma_md_cal_generation; /*[17] Target remove polling action when get FHC result ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem wcdma_dpd; /*[18] Target support WCDMA DPD ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem wcdma_iq_dump; /*[19] Target support WCDMA Auto IQ dump*/
+} UL1TSTCalibrationItemSet;
+
+/* DO NOT Modify the member order of UL1TSTCalibrationItemSet, Items must be added to the end */
+typedef struct
+{
+ kal_uint32 mipi_pa_band_support; /*<! band support bit map of MIPI PA */
+ kal_uint32 ue_capability_ext1; /*<! 0x00000001 : support RX gain sweep */
+} UL1TSTCapabilityItemSet;
+
+//(this part is put into peer buffer)
+typedef struct
+{
+ kal_uint32 capability_item_offset; /*!< the offset value of the starting address of UL1TSTCapabilityItemSet in UL1TSTRfCapability */
+ kal_uint32 calibration_item_offset; /*!< the offset value of the starting address of UL1TSTCalibrationItemSet in UL1TSTRfCapability */
+ UL1TSTCapabilityItemSet capabilityItems;
+ UL1TSTCalibrationItemSet calibrationItems;
+} UL1TSTResultGetRfCapability;
+
+typedef struct
+{
+ kal_bool ok; /*<! ok indicator */
+ kal_uint32 cwNum; /*<! the Number of MIPI PA CWt */
+} UL1TSTResultGetMipiCwNum;
+
+typedef struct
+{
+ kal_uint8 status;
+ kal_uint16 power_level_num;
+ kal_uint16 code_word_num;
+}
+UL1TSTResultGetMipiCodeWord;
+
+typedef struct
+{
+ kal_bool ok;
+}
+UL1TSTResultSetMipiCodeWord;
+
+typedef struct
+{
+ kal_int16 status;
+ kal_int16 tadc_dac;
+ kal_int16 temperature;
+ kal_int16 temp_idx;
+}
+UL1TSTResultTemperatureInfo;
+
+typedef union
+{
+ kal_bool ok;
+ UL1TSTResultRSSI rssi;
+ UL1TSTResultRSSIRxD rssi_rxd; /**< \breif R8 get both rx path RSSI */
+ UL1TSTResultRSCP rscp;
+ UL1TSTResultRxDPCh rx_dpch;
+ UL1TSTResultAFC afc;
+ UL1TSTResultAFC_EXT afc_ext;
+ UL1TSTResultNSFT nsft;
+ UL1TSTResultMQC mqc;
+ UL1TSTResultMQCOctLev mqc_octlev;
+ UL1TSTResultGetRfTempSensor rfTemperature;
+ UL1TSTResultGetMipiCwNum mipiPaCwNum;
+ UL1TSTResultGetMipiCodeWord mipiPaGetCwData;
+ UL1TSTResultSetMipiCodeWord mipiPaSetCwData;
+ UL1TSTResultTemperatureInfo temperature_info;
+} UL1TSTResultParam;
+
+typedef struct
+{
+ //kal_uint8 ref_count; // part of LOCAL_PARA_HDR
+ //kal_uint16 msg_len; // part of LOCAL_PARA_HDR
+ LOCAL_PARA_HDR
+ UL1TSTCmdType type;
+ UL1TSTCmdParam param;
+} ft_ul1tst_req_T;
+
+typedef struct
+{
+ //kal_uint8 ref_count; // part of LOCAL_PARA_HDR
+ //kal_uint16 msg_len; // part of LOCAL_PARA_HDR
+ LOCAL_PARA_HDR
+ UL1TSTCmdType type;
+ UL1TSTResultParam param;
+} ul1tst_ft_cnf_T;
+
+//#endif
+#endif
diff --git a/mcu/interface/middleware/meta/ul1tst_msg_gen95.h b/mcu/interface/middleware/meta/ul1tst_msg_gen95.h
new file mode 100644
index 0000000..6776bfb
--- /dev/null
+++ b/mcu/interface/middleware/meta/ul1tst_msg_gen95.h
@@ -0,0 +1,997 @@
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*******************************************************************************/
+
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ul1tst_msg.h
+ *
+ * Project:
+ * --------
+ * MT6268 Project
+ *
+ * Description:
+ * ------------
+ * ul1tst_msg.h
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
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+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef UL1TST_MSG_H
+#define UL1TST_MSG_H
+
+/*===============================================================================*/
+
+#include "kal_general_types.h"
+//#include "nvram_data_items.h"
+#include "kal_public_defs.h"
+
+#include "ft_msg_ul1rf.h"
+/*===============================================================================*/
+
+//#ifdef MT6268T
+typedef enum
+{
+ UL1TST_CMD_TXACCESS = 0
+ ,UL1TST_CMD_TX_DPCH
+ ,UL1TST_CMD_RX_DPCH
+ ,UL1TST_CMD_RSSI
+ ,UL1TST_CMD_RSSI_RXD /**< \breif R8 get both rx path RSSI */
+ ,UL1TST_CMD_RSSI_CONT
+ ,UL1TST_CMD_RSCP
+ ,UL1TST_CMD_AFC //anthony 0514
+ ,UL1TST_CMD_MQC //20081114 congo, add msg for mobile quick caliration
+ ,UL1TST_CMD_NSFT
+ ,UL1TST_CMD_HSDPA_NSFT
+ ,UL1TST_CMD_HSUPA_NSFT
+ ,UL1TST_CMD_STOP
+ ,UL1TST_CMD_MQC_OCTLEV
+ ,UL1TST_CMD_MQC_EXT //rxd, gvgabb0
+ ,UL1TST_CMD_AFC_EXT //Add msg for DCXO to do multi-bin detection (ics_mode=CFE_MODE1)
+ ,UL1TST_CMD_RELOAD_NVRAM
+ ,UL1TST_CMD_ANT_MODE /**< \brief R8 set rx path: 0:none 1:main 2:diversity: 3: both */
+ ,UL1TST_CMD_PA_DRIFT_SWITCH // PA drift compensation switch message
+ ,UL1TST_CMD_RX_CELL_POWER // configure the Rx cell power before cell search
+ ,UL1TST_CMD_GET_RF_TEMP /*20*/ // Get the RF Temperature sensor reading (parameter:UL1TSTCmdGetRfTempSensor)
+ ,UL1TST_CMD_GET_RF_CAPABILITY /*21*/ // Get the RF capability (no parameter)
+ ,UL1TST_CMD_GET_MIPI_PA_CW_NUMBER /*22*/
+ ,UL1TST_CMD_LIST_MODE //for list mode
+ ,UL1TST_CMD_GET_RF_MIPI_CODEWORD /*24*/
+ ,UL1TST_CMD_SET_RF_MIPI_CODEWORD /*25*/
+ ,UL1TST_CMD_GET_RF_TEMP_INFO /*26*/
+ ,UL1TST_CMD_RX_GAIN_SWEEP /* 27 */
+ ,UL1TST_CMD_END
+} UL1TSTCmdType;
+
+typedef struct
+{
+ kal_uint16 ul_uarfcn; /* UL uarfcn range:????Read from NVRAM?? (9612 ~ 9888) */
+ kal_uint16 dl_uarfcn;
+ kal_uint16 dl_psc; /* 0~511. */
+ kal_uint8 signature; /* 0~15, for single signature decision. */
+ kal_uint8 pa_mode; /* 0: high 1: middle 2: low */
+ kal_int8 init_power; /* Assume cpich_rscp=0, ul_interference=0. */
+ kal_uint8 power_step; /* Preamble power ramping step. 1 ~ 8dB */
+ kal_uint8 max_retrans; /* 1~64 */
+ kal_uint8 asc; /* 0~7 */
+} UL1TSTCmdTxAccess;
+
+typedef struct
+{
+ //kal_int16 dl_freq;
+ kal_int16 ul_freq;
+ kal_int16 psc; /* 0~511. */
+ kal_uint32 sc_code; /* Scrambling code #. 0 ~ 16777215 */
+ kal_uint8 power_ctrl_mode;
+ kal_uint8 pa_mode;
+ kal_uint16 idx;
+ kal_uint16 afc_dac;
+ kal_uint8 dpcch_pwr;
+ kal_uint8 dpdch_pwr;
+
+ /* Below for UL1D_RF_Meta_SetTxInfo. */
+ /* Below for setPaApcDac. */
+ kal_uint8 rf_band;
+ kal_uint8 vm1;
+ kal_uint8 vm2;
+ kal_uint16 dc2dc_dac;
+ kal_uint16 vbias_dac;
+ kal_bool pwr_det;
+ kal_uint16 apc_dac;
+ kal_uint16 pa_dac;
+} UL1TSTCmdTxDPCh; //Anthony
+
+typedef struct
+{
+ kal_int16 dl_freq;
+ kal_int16 psc; /* 0~511. */
+ kal_uint8 ssc; /* 0~15. */
+ kal_int16 ovsf; /* 0~sf-1. */
+ kal_uint16 afc_dac;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} UL1TSTCmdRxDPCh;
+
+//for list mode
+#define MAX_LM_VALID_FREQ 50
+typedef struct
+{
+ /* common parameters */
+ kal_bool afc_dac_valid;
+ kal_uint16 afc_dac;
+ kal_uint8 loopbackType;//0: no loopback, 1: loopback type 1, 2: loopback type 2
+ kal_uint8 frame_shift;//default=0, depends on Test Machine
+ kal_uint8 rmc_type;//1: 12.2k, 2: 64k, 3: 144k, 4: 384k
+ kal_uint8 ctfc[4];//8960=0,1,2,3; cmu200=0,2,1,3
+ kal_uint8 bit_pattern;//0: single ended ber disable, 1: all one, 2: all zero
+ /* DL parameters */
+ kal_int16 dl_freq[MAX_LM_VALID_FREQ];
+ kal_int16 dl_psc;/* 0~511. */
+ kal_int16 dl_ovsf;//RMC12.2k: <128, but test set not allow all ovsf,
+ //RMC12.2k default ovsf=9
+ /* UL parameters */
+ kal_int16 ul_freq[MAX_LM_VALID_FREQ];
+ kal_uint16 ul_tfci;
+ kal_uint32 ul_sc_code; /* Scrambling code #. 0 ~ 16777215 */
+ kal_bool iq_pwr_valid;//valid dpcch, dpdch power
+ kal_uint8 dpcch_pwr;//default 8, depends on testing requirement
+ kal_uint8 dpdch_pwr;//default 15, depends on testing requirement
+
+ /* common parameters */
+ kal_uint8 valid_freq; //valid count of dl/ul freq.
+ kal_uint16 test_item[MAX_LM_VALID_FREQ]; //bit0:reserved. bit1:single end BER. bit2:RSSI measure. bit3:reserved. bit4:reserved. bit5:ILPC_ABC. bit6:ILPC_EF. bit7:ILPC_GH.
+ /* the time settings, unit = frame */
+ kal_uint16 full_test_time;//the total time of one freq.
+ kal_uint8 ready_time; // for first sync after TX transmit
+ kal_uint8 sync_time; //the time of sync, from cs_start to LBK is 26 frame
+ kal_uint8 retrial; //just for first sync
+ kal_uint16 test_time; //the time of test for max&min TX power tests
+ kal_uint16 rx_rssi_start_time[3]; //RSSI start time for 3 LNA mode
+ kal_uint8 rx_rssi_duration[3];
+ kal_uint16 rx_ber_start_time; //BER start time
+ kal_uint8 rx_ber_duration;
+ kal_uint16 ILPC_ABC_time; //the time of ILPC ABC
+ kal_uint16 ILPC_EF_time; //the time of ILPC EF
+ kal_uint16 ILPC_GH_time; //the time of ILPC GH
+ kal_uint16 transition_time; //the limitation of UE state machine is 4 frame at least
+} UL1TSTCmdLISTMODE;
+
+typedef struct
+{
+ /* common parameters */
+ kal_bool afc_dac_valid;
+ kal_uint16 afc_dac;
+ kal_uint8 loopbackType;//0: no loopback, 1: loopback type 1, 2: loopback type 2
+ kal_uint8 frame_shift;//default=0, depends on Test Machine
+ kal_uint8 rmc_type;//1: 12.2k, 2: 64k, 3: 144k, 4: 384k
+ kal_uint8 ctfc[4];//8960=0,1,2,3; cmu200=0,2,1,3
+ kal_uint8 bit_pattern;//0: single ended ber disable, 1: all one, 2: all zero
+ /* DL parameters */
+ kal_int16 dl_freq;
+ kal_int16 dl_psc;/* 0~511. */
+ kal_int16 dl_ovsf;//RMC12.2k: <128, but test set not allow all ovsf,
+ //RMC12.2k default ovsf=9
+ /* UL parameters */
+ kal_int16 ul_freq;
+ kal_uint16 ul_tfci;
+ kal_uint32 ul_sc_code; /* Scrambling code #. 0 ~ 16777215 */
+ kal_bool iq_pwr_valid;//valid dpcch, dpdch power
+ kal_uint8 dpcch_pwr;//default 8, depends on testing requirement
+ kal_uint8 dpdch_pwr;//default 15, depends on testing requirement
+
+ kal_uint8 subtest; // for DPA/UPA use
+} UL1TSTCmdNSFT;
+
+#define FDD_MAX_FREQ_LIST 36
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int16 scc_dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int16 settings; // PCC SRX/LNA Settings
+ kal_uint8 srxcfg;
+ kal_uint8 vcocfg;
+ kal_uint8 lnaport;
+ kal_uint8 temperature;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain[2]; /* mode0. */
+ kal_uint8 LNAmode[2]; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga[2]; /* mode1. */
+ kal_uint8 lpm_mode; /* 0: normal LNA gain mode , 1: low power LNA gain mode. */
+
+ kal_bool rssi_continue;
+} UL1TSTCmdRSSI;
+
+typedef struct
+{
+ kal_bool pscan_before_cell_search; /* True if UL1TST needs power scan before cell search/RSCP. */
+ kal_int16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+ kal_uint8 sample_num_per_cell;
+ kal_bool read_sfn; /* True if we need to do SFN measurement for the found cell. */
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} UL1TSTCmdRSCP;
+
+typedef struct
+{
+// kal_bool pscan_before_cell_search; /* True if UL1TST needs power scan before cell search/RSCP. */
+ kal_int16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+// kal_uint8 sample_num_per_cell;
+// kal_bool read_sfn; /* True if we need to do SFN measurement for the found cell. */
+
+ kal_int16 afc_dac;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} UL1TSTCmdAFC;
+
+//20081115 congo, add MQC cmd
+#define MAX_MQC_FREQ_COUNT 15 // 6293 need 14 frequency
+#define MAX_MQC_PWR_COUNT 15 // 6293 need 13 point
+#define MAX_CAL_BAND 10 // 6293 need 5 band
+#define MAX_MQC_RSSI_COUNT 200 // 6293 need 15*14=195 point
+
+typedef struct
+{
+/* Tx part settings */
+
+/* Below for UL1D_RF_Meta_SetTxInfo. */
+ kal_bool no_loop_ctrl;
+ kal_uint16 afc_dac;
+/* Below for setPaApcDac. */
+//for 3 PA mode, 0:H, 1:M, 2:L
+//Add Tx band
+ kal_bool pwr_det;//0 off/manual mode, 1 on/auto mode
+//kal_uint16 pwr_det_threshold;
+ kal_uint8 power_ctrl_mode;//1: HW->O3, 2: SW->59D, Smarti
+// kal_uint8 vm1[MAX_CAL_BAND][3]; //PA param
+// kal_uint8 vm2[MAX_CAL_BAND][3]; //PA param
+// kal_uint16 dc2dc_dac[MAX_CAL_BAND][3];//PA param
+// kal_uint16 vbias_dac[MAX_CAL_BAND][3];//PA param
+// kal_bool init_tx_onoff; //0:off, 1:on
+// kal_bool ready_tx_onoff; //0:off, 1:on
+// kal_uint8 init_pa_mode;
+// kal_uint8 ready_pa_mode;
+// kal_uint16 init_pa_gain;
+// kal_uint16 ready_pa_gain;
+// kal_uint16 init_vga_dac_tpc_idx;
+// kal_uint16 ready_vga_dac_tpc_idx;
+
+/* Rx part settings */
+
+/* Below for RF_SetBBRxParams. */
+// For high gain cal. @ high power: replace gain table
+ kal_uint8 temperature;
+// kal_bool hwAGC; //0:SW gain mode, 1:HW AGC. AGC must on for RSSI measure. HW limit
+// kal_int16 gain_init; /* for HW mode */
+
+/* Mobile Quick Calibration settings */
+
+/* general settings */
+// kal_bool init_condition; //0: max_pwr, 1:min_pwr
+ kal_uint8 step_duration; //in slot
+// kal_uint8 ready_duration; //in slot
+ kal_uint8 retune_duration; //in slot
+// kal_uint8 gain_stable_time; //in slot
+// kal_uint16 max_vga_dac;
+// kal_uint16 min_vga_dac;
+// kal_uint16 jump_vga_dac;
+
+/* freq-pwr table */
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 hpm_cal_point;
+ kal_uint8 lpm_cal_point;
+
+// kal_uint8 odd_record; /*for Anritsu8820, only odd step (1,3,5...start from 1) is for measurement. */
+
+// kal_uint8 pa_gain_start_idx; // for O3 TPC
+// kal_uint8 pd_gain_start_idx; // for O3 TPC
+
+ kal_uint8 dl_band; //1:band1, 2:band2, 3:band3, 5:band5
+ kal_uint8 ul_band; //1:band1, 2:band2, 3:band3, 5:band5
+ kal_uint16 dl_freq[MAX_MQC_FREQ_COUNT]; //in uarfcn
+ kal_uint16 ul_freq[MAX_MQC_FREQ_COUNT]; //in uarfcn
+ kal_uint8 pa_mode[MAX_MQC_PWR_COUNT];
+ kal_uint16 vga_dac_tpc_idx[MAX_MQC_PWR_COUNT];//power_ctrl_mode=HW, tpc_idx. Vice versa.
+
+ kal_uint16 pa_gain[MAX_MQC_PWR_COUNT]; // for O3 TPC
+ kal_uint8 pd_gain[MAX_MQC_FREQ_COUNT]; // for O3 TPC
+ kal_uint8 pa_section[MAX_MQC_PWR_COUNT];
+
+ kal_uint16 rx_lna_gain[MAX_MQC_PWR_COUNT]; /* PRX total RF gain .5 after 6293*/
+ kal_uint16 rxd_lna_gain[MAX_MQC_PWR_COUNT]; /* DRX total RF gain .5 after 6293*/
+
+ kal_uint8 fix_pga_gain[MAX_MQC_PWR_COUNT]; /* fix pga gain for APC calibration */
+ kal_uint8 fix_lpm[MAX_MQC_PWR_COUNT]; /* fix LPM for AGC calibration */
+ kal_uint8 rx_elna_bypass[MAX_MQC_PWR_COUNT];
+ kal_uint8 rxd_elna_bypass[MAX_MQC_PWR_COUNT];
+ kal_uint8 rx_elna_mode;
+ kal_uint8 rxd_elna_mode;
+
+ kal_uint8 rx_cal_sequency[MAX_MQC_PWR_COUNT];
+ kal_int16 rx_cal_dl_power[MAX_MQC_PWR_COUNT];
+ kal_uint8 rx_gain_table; //0:18dB 1:13.5dB
+ kal_uint8 rxd_gain_table; //0:18dB 1:13.5dB
+// kal_uint8 lna_gain_start_idx;
+// kal_uint8 cal_num;
+// kal_uint8 route_setting[3];
+} UL1TSTCmdMQC;
+
+#ifdef __RF_SCAN_FOR_DESENSE_TEST__
+typedef struct
+{
+ kal_uint8 src_id;
+ kal_uint8 band;
+ kal_uint16 dl_uarfcn;
+ kal_uint16 ul_uarfcn;
+ kal_bool tx_on_flag;
+ kal_int8 tx_power;
+ kal_uint8 repeat_times;
+}UL1TSTEMMQC;
+#endif
+
+typedef struct
+{
+ kal_uint32 lid; // the lid is needed to update run-time value
+ kal_uint32 eg_ptr; // the event group pointer used to notify runt-time update finish
+} UL1TSTCmdReloadNVRAM;
+
+typedef struct
+{
+ kal_uint16 measure_count; /*<! specify the measurement count UL1D will do the measurement measure_count times */
+} UL1TSTCmdGetRfTempSensor;
+
+typedef struct
+{
+ kal_uint16 rf_band_idx;
+ kal_uint16 power_level_num;
+ kal_uint16 code_word_num;
+}
+UL1TSTCmdSetMipiCodeWord;
+
+
+typedef union
+{
+ UL1TSTCmdTxAccess txaccess;
+ UL1TSTCmdTxDPCh txdpch; //Anthony
+ UL1TSTCmdRxDPCh rxdpch;
+ UL1TSTCmdRSSI rssi;
+ UL1TSTCmdRSCP rscp;
+ UL1TSTCmdAFC afc; //anthony 0514
+ UL1TSTCmdMQC mqc;
+ UL1TSTCmdNSFT nsft;
+ UL1TSTCmdLISTMODE listmode; //for list mode
+ UL1TSTCmdReloadNVRAM reload;
+ UL1TSTCmdGetRfTempSensor rfTemperature; /*<! UL1TST_CMD_GET_RF_TEMP */
+ kal_uint8 is_PaDrift; // PA drfit compensation switch message
+ kal_uint8 rxdMode; /**< \brief R8 set rx path: 0:none 1:main 2:diversity: 3: both */
+ kal_int32 rx_cell_power;// configure the Rx cell power before cell search. uints:qdbm
+ kal_uint8 mipi_rf_band;
+ kal_uint8 fdd_mode_setup; // 1 : UBIN mode Init 3G FDD , 0 : UBIN mode de-init 3G FDD
+ UL1TSTCmdSetMipiCodeWord setMipiPaCwParam;
+} UL1TSTCmdParam;
+
+#define IS_META_CA_SUPPORT 0
+
+#define IS_ARX_LPM_SUPPORT 1
+
+// For CA enum
+
+typedef enum
+{
+ VCO_SRX_SEL_INVALID = 0,
+ VCO_SRX_SEL_SRX = 1,
+ VCO_SRX_SEL_VCO = 2,
+} UL1TSTVcoSrxSel;
+
+
+typedef struct
+{
+ kal_uint8 vco_cfg;
+ kal_uint8 srx_cfg;
+ kal_uint8 lna_port;
+ kal_uint8 lna_group;
+} UL1TSTVcoSrxLnaCfg;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 padding[3];
+ UL1TSTVcoSrxLnaCfg cfg[3];
+} UL1TSTSettingByBand;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 cls;
+ kal_uint8 vco_cfg;
+ kal_uint8 srx_cfg;
+ kal_uint8 lna_port;
+ kal_uint8 lna_group;
+} UL1TSTCaRouteDes;
+
+typedef struct
+{
+ UL1TSTCaRouteDes cfg[2];
+} UL1TSTCaCombineDes;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 cls;
+} UL1TSTBandClass;
+
+typedef struct
+{
+ kal_uint8 cc_num;
+ kal_uint8 used_band;
+ UL1TSTBandClass cc_setting[2];
+} UL1TSTRxUsageDes;
+
+
+typedef struct
+{
+ kal_uint16 scenario;
+ kal_uint8 cc_rx_route_idx[2];
+ kal_uint8 cc_tx_route_idx;
+
+} UL1TSTUsageMapTable;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 index[3];
+} UL1TSTSupportCaCombTblIdx;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 route_idx;
+ kal_uint8 usg_start_idx;
+ kal_uint8 usg_stop_idx;
+} UL1TSTUsageElm;
+
+typedef struct
+{
+ UL1TSTUsageElm sb;
+ UL1TSTUsageElm ca[2];
+} UL1TSTSupportRxUsageByBand;
+
+typedef struct
+{
+ kal_uint16 tbl_offset;
+ kal_uint16 tbl_size;
+} UL1TSTVarTblInfo;
+
+typedef struct
+{
+ kal_uint32 support_route_bitmap;
+ kal_uint32 umts_vco_srx_sel;
+ UL1TSTSettingByBand support_vco_srx_lna_cfg[5];
+ UL1TSTVarTblInfo ca_comb_tbl_info;
+ UL1TSTSupportCaCombTblIdx support_ca_tbl_idx[5];
+ UL1TSTVarTblInfo rx_usage_tbl_info;
+ UL1TSTSupportRxUsageByBand support_rx_use_by_band[5];
+} UL1TSTCaConfig;
+
+
+
+//Result
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi[ FDD_MAX_FREQ_LIST ];
+ kal_int16 scc_dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 scc_rssi[ FDD_MAX_FREQ_LIST ];
+} UL1TSTResultRSSI;
+
+// R8 get both rx path RSSI result
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi_rxd[ FDD_MAX_FREQ_LIST ];
+ kal_int16 scc_dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 scc_rssi[ FDD_MAX_FREQ_LIST ];
+ kal_int32 scc_rssi_rxd[ FDD_MAX_FREQ_LIST ];
+
+ kal_uint8 rx_LNAmode[FDD_MAX_FREQ_LIST];
+ kal_uint8 rxd_LNAmode[FDD_MAX_FREQ_LIST];
+} UL1TSTResultRSSIRxD;
+
+typedef struct
+{
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_int32 tm; /* Cell frame boundary offset to LST */
+ kal_int16 off; /* Cell frame number offset to LST */
+ kal_bool sttd; /* True for STTD used. */
+ kal_uint8 sample_num;
+ kal_int16 rscp_sum; //kal_uint8 rscp_sum;
+ kal_int16 freq_error; //anthony 0514
+} UL1TST_cpich_result_T;
+
+#define UL1_MAX_NUM_MEAS_CELL 32
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_cell;
+ UL1TST_cpich_result_T cpich_result[ UL1_MAX_NUM_MEAS_CELL ];
+} UL1TSTResultRSCP;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_int32 tm; /* Cell frame boundary offset to LST */
+ kal_bool sttd; /* True for STTD used. */
+ kal_uint8 rscp_sum;
+ kal_int16 freq_error;
+} UL1TSTResultAFC;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_int32 tm; /* Cell frame boundary offset to LST */
+ kal_bool sttd; /* True for STTD used. */
+ kal_uint8 rscp_sum;
+ kal_int32 freq_error;
+} UL1TSTResultAFC_EXT;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint32 ber; /* Spec requirement=10^-3. We will count 10^5 frames(100 times spec requirement) for BER calculation. Only count for the only TRCh for DPDCh. */
+} UL1TSTResultRxDPCh;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 link_status;
+} UL1TSTResultNSFT;
+
+//#define MAX_MQC_RSSI_COUNT 400
+typedef struct
+{
+ kal_bool ok;
+ /* freq-pwr table */
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 rx_lna_mode[MAX_MQC_RSSI_COUNT]; // 0: high, 1: middle, 2: low
+ kal_int16 rssi[MAX_MQC_RSSI_COUNT];
+ kal_uint8 rxd_lna_mode[MAX_MQC_RSSI_COUNT]; // 0: high, 1: middle, 2: low
+ kal_int16 rssi_rxd[MAX_MQC_RSSI_COUNT];
+ kal_uint16 pwr_det_value[MAX_MQC_FREQ_COUNT][3];
+ kal_int16 mqc_tx_gvgabb0_report[MAX_MQC_RSSI_COUNT];
+ /* {pd_meas-PA_high, pd_meas-PA_mid, pd_meas-PA_low}, //freq-1
+ * {pd_meas-PA_high, pd_meas-PA_mid, pd_meas-PA_low}, //freq-2
+ * ...
+ * {pd_meas-PA_high, pd_meas-PA_mid, pd_meas-PA_low}, //freq-freq_count
+ */
+} UL1TSTResultMQCOctLev;
+
+typedef struct
+{
+ kal_bool ok;
+ /* freq-pwr table */
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_int16 rssi[MAX_MQC_RSSI_COUNT];
+ kal_uint16 pwr_det_value[MAX_MQC_FREQ_COUNT];
+ /* {RSSI-1, RSSI-2, ... , RSSI-pwrcount}, //freq-1
+ * {RSSI-1, RSSI-2, ... , RSSI-pwrcount}, //freq-2
+ * ...
+ * {RSSI-1, RSSI-2, ... , RSSI-pwrcount}, //freq-freq_count
+ * Same for power detector.
+ */
+} UL1TSTResultMQC;
+
+//for list mode
+typedef struct
+{
+ kal_uint8 status;
+ kal_uint8 current_idx;
+ kal_int16 total_bits[MAX_LM_VALID_FREQ][2]; //0:real ber test. 1:debug before ber test
+ kal_int16 error_bits[MAX_LM_VALID_FREQ][2];
+ kal_int16 rssi[MAX_LM_VALID_FREQ][3]; //RSSI at 3 LNA mode
+ kal_int16 rssi_rxd[MAX_LM_VALID_FREQ][3]; //RSSI RXD at 3 LNA mode
+ kal_int8 lnamode[3];
+} UL1TSTResultListMode;
+
+typedef struct
+{
+ kal_bool ok; /*<! ok indicator */
+ kal_uint32 sum; /*<! the sum of measure_count times of temp sensor result */
+} UL1TSTResultGetRfTempSensor;
+
+/* DO NOT Modify the definition of UL1TSTCalibrationItem */
+typedef struct
+{
+ kal_uint32 is_capable:1; /*<! the indicator to indicate if this item is supported by SW or HW */
+ kal_uint32 is_mandatory:1; /*<! the indicator to indicate if this item is mandatory to be calibrated */
+ kal_uint32 parameters:30; /*<! parameter to be carried to tool side */
+} UL1TSTCalibrationItem;
+
+/* DO NOT Modify the member order of UL1TSTCalibrationItemSet, Items must be added to the end */
+typedef struct
+{
+ UL1TSTCalibrationItem tadc_cal; /*[ 0] TADC calibration capability */
+ UL1TSTCalibrationItem multi_rat_tadc_bitmap; /*[ 1] bit map of multi-rat TADC calibration */
+ UL1TSTCalibrationItem multi_rat_afc_bitmap; /*[ 2] bit map of multi-rat AFC calibration */
+ UL1TSTCalibrationItem mipi_pa_level_and_cw_num; /*[ 3] Number of MIPI PA CW */
+ UL1TSTCalibrationItem temperature_info; /*[ 4] */
+ UL1TSTCalibrationItem list_mode_support; /*[ 5] Target support list mode API; is_capable (0: not supported, 1: supported) */
+ UL1TSTCalibrationItem thermal_sensor_type; /*[ 6] Target support temp sensor type; is_capable (0: not supported, 1: supported) parameter (0: internal, 1: external) */
+ UL1TSTCalibrationItem ubin_mode_switch_support; /*[ 7] */
+ UL1TSTCalibrationItem nvram_access_interface; /*[ 8] Target support nvram access API by ul1tst ; is_capable (0: not supported, 1: supported) */
+ UL1TSTCalibrationItem rx_gain_lpm_support; /*[ 9] Target support RX low power gain mode ; is_capable (0: not supported, 1: supported) */
+ UL1TSTCalibrationItem nsft_get_RSSI; /*[10] Target support get RSSI during NSFT flow ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem prf_select; /*[11] Target support prf select modify ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem nsft_reset_ber_result; /*[12] Target support NSFT reset BER result ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem elna_addition; /*[13] Target PRX support eLNA addition ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem apc_extend; /*[14] Target support APC calibration extend ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem elna_addition_diversity_path; /*[15] Target DRX support eLNA addition ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem cancel_polling_action_when_get_fhc_result; /*[16] Target remove polling action when get FHC result ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem wcdma_md_cal_generation; /*[17] Target remove polling action when get FHC result ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem wcdma_dpd; /*[18] Target support WCDMA DPD ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem wcdma_iq_dump; /*[19] Target support WCDMA Auto IQ dump*/
+ UL1TSTCalibrationItem wcdma_afc_rscp_generation; /*[20] Target support WCDMA New AFC_RSCP interface*/
+ UL1TSTCalibrationItem wcdma_nsft_tx_power_offset; /*[21] Target support WCDMA NSFT Set/Get Tx power offset ; is_capable (0: not supported, 1: supported)*/
+} UL1TSTCalibrationItemSet;
+
+/* DO NOT Modify the member order of UL1TSTCalibrationItemSet, Items must be added to the end */
+typedef struct
+{
+ kal_uint32 mipi_pa_band_support; /*<! band support bit map of MIPI PA */
+ kal_uint32 ue_capability_ext1; /*<! 0x00000001 : support RX gain sweep */
+} UL1TSTCapabilityItemSet;
+
+//(this part is put into peer buffer)
+typedef struct
+{
+ kal_uint32 capability_item_offset; /*!< the offset value of the starting address of UL1TSTCapabilityItemSet in UL1TSTRfCapability */
+ kal_uint32 calibration_item_offset; /*!< the offset value of the starting address of UL1TSTCalibrationItemSet in UL1TSTRfCapability */
+ UL1TSTCapabilityItemSet capabilityItems;
+ UL1TSTCalibrationItemSet calibrationItems;
+} UL1TSTResultGetRfCapability;
+
+typedef struct
+{
+ kal_bool ok; /*<! ok indicator */
+ kal_uint32 cwNum; /*<! the Number of MIPI PA CWt */
+} UL1TSTResultGetMipiCwNum;
+
+typedef struct
+{
+ kal_uint8 status;
+ kal_uint16 power_level_num;
+ kal_uint16 code_word_num;
+}
+UL1TSTResultGetMipiCodeWord;
+
+typedef struct
+{
+ kal_bool ok;
+}
+UL1TSTResultSetMipiCodeWord;
+
+typedef struct
+{
+ kal_int16 status;
+ kal_int16 tadc_dac;
+ kal_int16 temperature;
+ kal_int16 temp_idx;
+}
+UL1TSTResultTemperatureInfo;
+
+typedef union
+{
+ kal_bool ok;
+ UL1TSTResultRSSI rssi;
+ UL1TSTResultRSSIRxD rssi_rxd; /**< \breif R8 get both rx path RSSI */
+ UL1TSTResultRSCP rscp;
+ UL1TSTResultRxDPCh rx_dpch;
+ UL1TSTResultAFC afc;
+ UL1TSTResultAFC_EXT afc_ext;
+ UL1TSTResultNSFT nsft;
+ UL1TSTResultMQC mqc;
+ UL1TSTResultMQCOctLev mqc_octlev;
+ UL1TSTResultGetRfTempSensor rfTemperature;
+ UL1TSTResultGetMipiCwNum mipiPaCwNum;
+ UL1TSTResultGetMipiCodeWord mipiPaGetCwData;
+ UL1TSTResultSetMipiCodeWord mipiPaSetCwData;
+ UL1TSTResultTemperatureInfo temperature_info;
+} UL1TSTResultParam;
+
+typedef struct
+{
+ //kal_uint8 ref_count; // part of LOCAL_PARA_HDR
+ //kal_uint16 msg_len; // part of LOCAL_PARA_HDR
+ LOCAL_PARA_HDR
+ UL1TSTCmdType type;
+ UL1TSTCmdParam param;
+} ft_ul1tst_req_T;
+
+typedef struct
+{
+ //kal_uint8 ref_count; // part of LOCAL_PARA_HDR
+ //kal_uint16 msg_len; // part of LOCAL_PARA_HDR
+ LOCAL_PARA_HDR
+ UL1TSTCmdType type;
+ UL1TSTResultParam param;
+} ul1tst_ft_cnf_T;
+
+//#endif
+#endif
diff --git a/mcu/interface/middleware/meta/ul1tst_msg_gen97.h b/mcu/interface/middleware/meta/ul1tst_msg_gen97.h
new file mode 100644
index 0000000..401d3ee
--- /dev/null
+++ b/mcu/interface/middleware/meta/ul1tst_msg_gen97.h
@@ -0,0 +1,1008 @@
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*******************************************************************************/
+
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ul1tst_msg.h
+ *
+ * Project:
+ * --------
+ * MT6268 Project
+ *
+ * Description:
+ * ------------
+ * ul1tst_msg.h
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
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+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef UL1TST_MSG_H
+#define UL1TST_MSG_H
+
+/*===============================================================================*/
+
+#include "kal_general_types.h"
+//#include "nvram_data_items.h"
+#include "kal_public_defs.h"
+
+#include "ft_msg_ul1rf.h"
+/*===============================================================================*/
+
+//#ifdef MT6268T
+typedef enum
+{
+ UL1TST_CMD_TXACCESS = 0
+ ,UL1TST_CMD_TX_DPCH
+ ,UL1TST_CMD_RX_DPCH
+ ,UL1TST_CMD_RSSI
+ ,UL1TST_CMD_RSSI_RXD /**< \breif R8 get both rx path RSSI */
+ ,UL1TST_CMD_RSSI_CONT
+ ,UL1TST_CMD_RSCP
+ ,UL1TST_CMD_AFC //anthony 0514
+ ,UL1TST_CMD_MQC //20081114 congo, add msg for mobile quick caliration
+ ,UL1TST_CMD_NSFT
+ ,UL1TST_CMD_HSDPA_NSFT
+ ,UL1TST_CMD_HSUPA_NSFT
+ ,UL1TST_CMD_STOP
+ ,UL1TST_CMD_MQC_OCTLEV
+ ,UL1TST_CMD_MQC_EXT //rxd, gvgabb0
+ ,UL1TST_CMD_AFC_EXT //Add msg for DCXO to do multi-bin detection (ics_mode=CFE_MODE1)
+ ,UL1TST_CMD_RELOAD_NVRAM
+ ,UL1TST_CMD_ANT_MODE /**< \brief R8 set rx path: 0:none 1:main 2:diversity: 3: both */
+ ,UL1TST_CMD_PA_DRIFT_SWITCH // PA drift compensation switch message
+ ,UL1TST_CMD_RX_CELL_POWER // configure the Rx cell power before cell search
+ ,UL1TST_CMD_GET_RF_TEMP /*20*/ // Get the RF Temperature sensor reading (parameter:UL1TSTCmdGetRfTempSensor)
+ ,UL1TST_CMD_GET_RF_CAPABILITY /*21*/ // Get the RF capability (no parameter)
+ ,UL1TST_CMD_GET_MIPI_PA_CW_NUMBER /*22*/
+ ,UL1TST_CMD_LIST_MODE //for list mode
+ ,UL1TST_CMD_GET_RF_MIPI_CODEWORD /*24*/
+ ,UL1TST_CMD_SET_RF_MIPI_CODEWORD /*25*/
+ ,UL1TST_CMD_GET_RF_TEMP_INFO /*26*/
+ ,UL1TST_CMD_RX_GAIN_SWEEP /* 27 */
+ ,UL1TST_CMD_END
+} UL1TSTCmdType;
+
+typedef struct
+{
+ kal_uint16 ul_uarfcn; /* UL uarfcn range:????Read from NVRAM?? (9612 ~ 9888) */
+ kal_uint16 dl_uarfcn;
+ kal_uint16 dl_psc; /* 0~511. */
+ kal_uint8 signature; /* 0~15, for single signature decision. */
+ kal_uint8 pa_mode; /* 0: high 1: middle 2: low */
+ kal_int8 init_power; /* Assume cpich_rscp=0, ul_interference=0. */
+ kal_uint8 power_step; /* Preamble power ramping step. 1 ~ 8dB */
+ kal_uint8 max_retrans; /* 1~64 */
+ kal_uint8 asc; /* 0~7 */
+} UL1TSTCmdTxAccess;
+
+typedef struct
+{
+ //kal_int16 dl_freq;
+ kal_int16 ul_freq;
+ kal_int16 psc; /* 0~511. */
+ kal_uint32 sc_code; /* Scrambling code #. 0 ~ 16777215 */
+ kal_uint8 power_ctrl_mode;
+ kal_uint8 pa_mode;
+ kal_uint16 idx;
+ kal_uint16 afc_dac;
+ kal_uint8 dpcch_pwr;
+ kal_uint8 dpdch_pwr;
+
+ /* Below for UL1D_RF_Meta_SetTxInfo. */
+ /* Below for setPaApcDac. */
+ kal_uint8 rf_band;
+ kal_uint8 vm1;
+ kal_uint8 vm2;
+ kal_uint16 dc2dc_dac;
+ kal_uint16 vbias_dac;
+ kal_bool pwr_det;
+ kal_uint16 apc_dac;
+ kal_uint16 pa_dac;
+} UL1TSTCmdTxDPCh; //Anthony
+
+typedef struct
+{
+ kal_int16 dl_freq;
+ kal_int16 psc; /* 0~511. */
+ kal_uint8 ssc; /* 0~15. */
+ kal_int16 ovsf; /* 0~sf-1. */
+ kal_uint16 afc_dac;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} UL1TSTCmdRxDPCh;
+
+//for list mode
+#define MAX_LM_VALID_FREQ 50
+typedef struct
+{
+ /* common parameters */
+ kal_bool afc_dac_valid;
+ kal_uint16 afc_dac;
+ kal_uint8 loopbackType;//0: no loopback, 1: loopback type 1, 2: loopback type 2
+ kal_uint8 frame_shift;//default=0, depends on Test Machine
+ kal_uint8 rmc_type;//1: 12.2k, 2: 64k, 3: 144k, 4: 384k
+ kal_uint8 ctfc[4];//8960=0,1,2,3; cmu200=0,2,1,3
+ kal_uint8 bit_pattern;//0: single ended ber disable, 1: all one, 2: all zero
+ /* DL parameters */
+ kal_int16 dl_freq[MAX_LM_VALID_FREQ];
+ kal_int16 dl_psc;/* 0~511. */
+ kal_int16 dl_ovsf;//RMC12.2k: <128, but test set not allow all ovsf,
+ //RMC12.2k default ovsf=9
+ /* UL parameters */
+ kal_int16 ul_freq[MAX_LM_VALID_FREQ];
+ kal_uint16 ul_tfci;
+ kal_uint32 ul_sc_code; /* Scrambling code #. 0 ~ 16777215 */
+ kal_bool iq_pwr_valid;//valid dpcch, dpdch power
+ kal_uint8 dpcch_pwr;//default 8, depends on testing requirement
+ kal_uint8 dpdch_pwr;//default 15, depends on testing requirement
+
+ /* common parameters */
+ kal_uint8 valid_freq; //valid count of dl/ul freq.
+ kal_uint16 test_item[MAX_LM_VALID_FREQ]; //bit0:reserved. bit1:single end BER. bit2:RSSI measure. bit3:reserved. bit4:reserved. bit5:ILPC_ABC. bit6:ILPC_EF. bit7:ILPC_GH.
+ /* the time settings, unit = frame */
+ kal_uint16 full_test_time;//the total time of one freq.
+ kal_uint8 ready_time; // for first sync after TX transmit
+ kal_uint8 sync_time; //the time of sync, from cs_start to LBK is 26 frame
+ kal_uint8 retrial; //just for first sync
+ kal_uint16 test_time; //the time of test for max&min TX power tests
+ kal_uint16 rx_rssi_start_time[3]; //RSSI start time for 3 LNA mode
+ kal_uint8 rx_rssi_duration[3];
+ kal_uint16 rx_ber_start_time; //BER start time
+ kal_uint8 rx_ber_duration;
+ kal_uint16 ILPC_ABC_time; //the time of ILPC ABC
+ kal_uint16 ILPC_EF_time; //the time of ILPC EF
+ kal_uint16 ILPC_GH_time; //the time of ILPC GH
+ kal_uint16 transition_time; //the limitation of UE state machine is 4 frame at least
+} UL1TSTCmdLISTMODE;
+
+typedef struct
+{
+ /* common parameters */
+ kal_bool afc_dac_valid;
+ kal_uint16 afc_dac;
+ kal_uint8 loopbackType;//0: no loopback, 1: loopback type 1, 2: loopback type 2
+ kal_uint8 frame_shift;//default=0, depends on Test Machine
+ kal_uint8 rmc_type;//1: 12.2k, 2: 64k, 3: 144k, 4: 384k
+ kal_uint8 ctfc[4];//8960=0,1,2,3; cmu200=0,2,1,3
+ kal_uint8 bit_pattern;//0: single ended ber disable, 1: all one, 2: all zero
+ /* DL parameters */
+ kal_int16 dl_freq;
+ kal_int16 dl_psc;/* 0~511. */
+ kal_int16 dl_ovsf;//RMC12.2k: <128, but test set not allow all ovsf,
+ //RMC12.2k default ovsf=9
+ /* UL parameters */
+ kal_int16 ul_freq;
+ kal_uint16 ul_tfci;
+ kal_uint32 ul_sc_code; /* Scrambling code #. 0 ~ 16777215 */
+ kal_bool iq_pwr_valid;//valid dpcch, dpdch power
+ kal_uint8 dpcch_pwr;//default 8, depends on testing requirement
+ kal_uint8 dpdch_pwr;//default 15, depends on testing requirement
+
+ kal_uint8 subtest; // for DPA/UPA use
+} UL1TSTCmdNSFT;
+
+#define FDD_MAX_FREQ_LIST 36
+typedef struct
+{
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int16 scc_dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int16 settings; // PCC SRX/LNA Settings
+ kal_uint8 srxcfg;
+ kal_uint8 vcocfg;
+ kal_uint8 lnaport;
+ kal_uint8 temperature;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain[2]; /* mode0. */
+ kal_uint8 LNAmode[2]; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga[2]; /* mode1. */
+ kal_uint8 lpm_mode; /* 0: normal LNA gain mode , 1: low power LNA gain mode. */
+
+ kal_bool rssi_continue;
+} UL1TSTCmdRSSI;
+
+typedef struct
+{
+ kal_bool pscan_before_cell_search; /* True if UL1TST needs power scan before cell search/RSCP. */
+ kal_int16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+ kal_uint8 sample_num_per_cell;
+ kal_bool read_sfn; /* True if we need to do SFN measurement for the found cell. */
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} UL1TSTCmdRSCP;
+
+typedef struct
+{
+// kal_bool pscan_before_cell_search; /* True if UL1TST needs power scan before cell search/RSCP. */
+ kal_int16 dl_freq; /* Specific dl_freq to do cell search. Valid if pscan_before_cell_search=F. */
+// kal_uint8 sample_num_per_cell;
+// kal_bool read_sfn; /* True if we need to do SFN measurement for the found cell. */
+
+ kal_int16 afc_dac;
+
+ /* Below for RF_SetBBRxParams. */
+ kal_bool hwAGC;
+ kal_uint8 mode; /* 0: mode0, 1: mode1. */
+ kal_int16 gain; /* mode0. */
+ kal_uint8 LNAmode; /* mode1. 0: LNA low, 1: LNA mid, 2: LNA high. */
+ kal_uint16 pga; /* mode1. */
+} UL1TSTCmdAFC;
+
+//20081115 congo, add MQC cmd
+#define MAX_MQC_FREQ_COUNT 15 // 6297 need 14 frequency
+#define MAX_MQC_PWR_COUNT 15 // 6297 need 14 point
+#define MAX_CAL_BAND 10 // 6297 need 8 band
+#define MAX_MQC_RSSI_COUNT 200 // 6297 need 15*14=195 point
+
+typedef struct
+{
+/* Tx part settings */
+
+/* Below for UL1D_RF_Meta_SetTxInfo. */
+ kal_bool no_loop_ctrl;
+ kal_uint16 afc_dac;
+/* Below for setPaApcDac. */
+//for 3 PA mode, 0:H, 1:M, 2:L
+//Add Tx band
+ kal_bool pwr_det;//0 off/manual mode, 1 on/auto mode
+//kal_uint16 pwr_det_threshold;
+ kal_uint8 power_ctrl_mode;//1: HW->O3, 2: SW->59D, Smarti
+// kal_uint8 vm1[MAX_CAL_BAND][3]; //PA param
+// kal_uint8 vm2[MAX_CAL_BAND][3]; //PA param
+// kal_uint16 dc2dc_dac[MAX_CAL_BAND][3];//PA param
+// kal_uint16 vbias_dac[MAX_CAL_BAND][3];//PA param
+// kal_bool init_tx_onoff; //0:off, 1:on
+// kal_bool ready_tx_onoff; //0:off, 1:on
+// kal_uint8 init_pa_mode;
+// kal_uint8 ready_pa_mode;
+// kal_uint16 init_pa_gain;
+// kal_uint16 ready_pa_gain;
+// kal_uint16 init_vga_dac_tpc_idx;
+// kal_uint16 ready_vga_dac_tpc_idx;
+
+/* Rx part settings */
+
+/* Below for RF_SetBBRxParams. */
+// For high gain cal. @ high power: replace gain table
+ kal_uint8 temperature;
+// kal_bool hwAGC; //0:SW gain mode, 1:HW AGC. AGC must on for RSSI measure. HW limit
+// kal_int16 gain_init; /* for HW mode */
+
+/* Mobile Quick Calibration settings */
+
+/* general settings */
+// kal_bool init_condition; //0: max_pwr, 1:min_pwr
+ kal_uint8 step_duration; //in slot
+// kal_uint8 ready_duration; //in slot
+ kal_uint8 retune_duration; //in slot
+// kal_uint8 gain_stable_time; //in slot
+// kal_uint16 max_vga_dac;
+// kal_uint16 min_vga_dac;
+// kal_uint16 jump_vga_dac;
+
+/* freq-pwr table */
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 hpm_cal_point;
+ kal_uint8 lpm_cal_point;
+ kal_uint8 tkm_cal_point;
+// kal_uint8 odd_record; /*for Anritsu8820, only odd step (1,3,5...start from 1) is for measurement. */
+
+// kal_uint8 pa_gain_start_idx; // for O3 TPC
+// kal_uint8 pd_gain_start_idx; // for O3 TPC
+
+ kal_uint8 dl_band; //1:band1, 2:band2, 3:band3, 5:band5
+ kal_uint8 ul_band; //1:band1, 2:band2, 3:band3, 5:band5
+ kal_uint16 dl_freq[MAX_MQC_FREQ_COUNT]; //in uarfcn
+ kal_uint16 ul_freq[MAX_MQC_FREQ_COUNT]; //in uarfcn
+ kal_uint8 pa_mode[MAX_MQC_PWR_COUNT];
+ kal_uint16 vga_dac_tpc_idx[MAX_MQC_PWR_COUNT];//power_ctrl_mode=HW, tpc_idx. Vice versa.
+
+ kal_uint16 pa_gain[MAX_MQC_PWR_COUNT]; // for O3 TPC
+ kal_uint8 pd_gain[MAX_MQC_FREQ_COUNT]; // for O3 TPC
+ kal_uint8 pa_section[MAX_MQC_PWR_COUNT];
+
+ kal_uint16 rx_lna_gain[MAX_MQC_PWR_COUNT]; /* PRX total RF gain .5 after 6293*/
+ kal_uint16 rxd_lna_gain[MAX_MQC_PWR_COUNT]; /* DRX total RF gain .5 after 6293*/
+
+ kal_uint8 fix_pga_gain[MAX_MQC_PWR_COUNT]; /* fix pga gain for APC calibration */
+ kal_uint8 pwr_mode[MAX_MQC_PWR_COUNT]; /* pwr mode for AGC calibration */
+ kal_uint8 rx_elna_bypass[MAX_MQC_PWR_COUNT];
+ kal_uint8 rxd_elna_bypass[MAX_MQC_PWR_COUNT];
+ kal_uint8 rx_elna_mode;
+ kal_uint8 rxd_elna_mode;
+
+ kal_uint8 rx_cal_sequency[MAX_MQC_PWR_COUNT];
+ kal_int16 rx_cal_dl_power[MAX_MQC_PWR_COUNT];
+ kal_uint8 rx_gain_table; //0:18dB 1:13.5dB
+ kal_uint8 rxd_gain_table; //0:18dB 1:13.5dB
+// kal_uint8 lna_gain_start_idx;
+// kal_uint8 cal_num;
+// kal_uint8 route_setting[3];
+} UL1TSTCmdMQC;
+
+#ifdef __RF_SCAN_FOR_DESENSE_TEST__
+typedef struct
+{
+ kal_uint8 src_id;
+ kal_uint8 band;
+ kal_uint16 dl_uarfcn;
+ kal_uint16 ul_uarfcn;
+ kal_bool tx_on_flag;
+ kal_int8 tx_power;
+ kal_uint8 repeat_times;
+}UL1TSTEMMQC;
+#endif
+
+typedef struct
+{
+ kal_uint32 lid; // the lid is needed to update run-time value
+ kal_uint32 eg_ptr; // the event group pointer used to notify runt-time update finish
+} UL1TSTCmdReloadNVRAM;
+
+typedef struct
+{
+ kal_uint16 measure_count; /*<! specify the measurement count UL1D will do the measurement measure_count times */
+} UL1TSTCmdGetRfTempSensor;
+
+typedef struct
+{
+ kal_uint16 rf_band_idx;
+ kal_uint16 power_level_num;
+ kal_uint16 code_word_num;
+}
+UL1TSTCmdSetMipiCodeWord;
+
+
+typedef union
+{
+ UL1TSTCmdTxAccess txaccess;
+ UL1TSTCmdTxDPCh txdpch; //Anthony
+ UL1TSTCmdRxDPCh rxdpch;
+ UL1TSTCmdRSSI rssi;
+ UL1TSTCmdRSCP rscp;
+ UL1TSTCmdAFC afc; //anthony 0514
+ UL1TSTCmdMQC mqc;
+ UL1TSTCmdNSFT nsft;
+ UL1TSTCmdLISTMODE listmode; //for list mode
+ UL1TSTCmdReloadNVRAM reload;
+ UL1TSTCmdGetRfTempSensor rfTemperature; /*<! UL1TST_CMD_GET_RF_TEMP */
+ kal_uint8 is_PaDrift; // PA drfit compensation switch message
+ kal_uint8 rxdMode; /**< \brief R8 set rx path: 0:none 1:main 2:diversity: 3: both */
+ kal_int32 rx_cell_power;// configure the Rx cell power before cell search. uints:qdbm
+ kal_uint8 mipi_rf_band;
+ kal_uint8 fdd_mode_setup; // 1 : UBIN mode Init 3G FDD , 0 : UBIN mode de-init 3G FDD
+ UL1TSTCmdSetMipiCodeWord setMipiPaCwParam;
+} UL1TSTCmdParam;
+
+#define IS_META_CA_SUPPORT 0
+
+#define IS_ARX_LPM_SUPPORT 1
+
+// For CA enum
+
+typedef enum
+{
+ VCO_SRX_SEL_INVALID = 0,
+ VCO_SRX_SEL_SRX = 1,
+ VCO_SRX_SEL_VCO = 2,
+} UL1TSTVcoSrxSel;
+
+
+typedef struct
+{
+ kal_uint8 vco_cfg;
+ kal_uint8 srx_cfg;
+ kal_uint8 lna_port;
+ kal_uint8 lna_group;
+} UL1TSTVcoSrxLnaCfg;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 padding[3];
+ UL1TSTVcoSrxLnaCfg cfg[3];
+} UL1TSTSettingByBand;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 cls;
+ kal_uint8 vco_cfg;
+ kal_uint8 srx_cfg;
+ kal_uint8 lna_port;
+ kal_uint8 lna_group;
+} UL1TSTCaRouteDes;
+
+typedef struct
+{
+ UL1TSTCaRouteDes cfg[2];
+} UL1TSTCaCombineDes;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 cls;
+} UL1TSTBandClass;
+
+typedef struct
+{
+ kal_uint8 cc_num;
+ kal_uint8 used_band;
+ UL1TSTBandClass cc_setting[2];
+} UL1TSTRxUsageDes;
+
+
+typedef struct
+{
+ kal_uint16 scenario;
+ kal_uint8 cc_rx_route_idx[2];
+ kal_uint8 cc_tx_route_idx;
+
+} UL1TSTUsageMapTable;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 index[3];
+} UL1TSTSupportCaCombTblIdx;
+
+typedef struct
+{
+ kal_uint8 band;
+ kal_uint8 route_idx;
+ kal_uint8 usg_start_idx;
+ kal_uint8 usg_stop_idx;
+} UL1TSTUsageElm;
+
+typedef struct
+{
+ UL1TSTUsageElm sb;
+ UL1TSTUsageElm ca[2];
+} UL1TSTSupportRxUsageByBand;
+
+typedef struct
+{
+ kal_uint16 tbl_offset;
+ kal_uint16 tbl_size;
+} UL1TSTVarTblInfo;
+
+typedef struct
+{
+ kal_uint32 support_route_bitmap;
+ kal_uint32 umts_vco_srx_sel;
+ UL1TSTSettingByBand support_vco_srx_lna_cfg[5];
+ UL1TSTVarTblInfo ca_comb_tbl_info;
+ UL1TSTSupportCaCombTblIdx support_ca_tbl_idx[5];
+ UL1TSTVarTblInfo rx_usage_tbl_info;
+ UL1TSTSupportRxUsageByBand support_rx_use_by_band[5];
+} UL1TSTCaConfig;
+
+
+
+//Result
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi[ FDD_MAX_FREQ_LIST ];
+ kal_int16 scc_dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 scc_rssi[ FDD_MAX_FREQ_LIST ];
+} UL1TSTResultRSSI;
+
+// R8 get both rx path RSSI result
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_freq;
+ kal_int16 dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi[ FDD_MAX_FREQ_LIST ];
+ kal_int32 rssi_rxd[ FDD_MAX_FREQ_LIST ];
+ kal_int16 scc_dl_freq[ FDD_MAX_FREQ_LIST ];
+ kal_int32 scc_rssi[ FDD_MAX_FREQ_LIST ];
+ kal_int32 scc_rssi_rxd[ FDD_MAX_FREQ_LIST ];
+
+ kal_uint8 rx_LNAmode[FDD_MAX_FREQ_LIST];
+ kal_uint8 rxd_LNAmode[FDD_MAX_FREQ_LIST];
+} UL1TSTResultRSSIRxD;
+
+typedef struct
+{
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_int32 tm; /* Cell frame boundary offset to LST */
+ kal_int16 off; /* Cell frame number offset to LST */
+ kal_bool sttd; /* True for STTD used. */
+ kal_uint8 sample_num;
+ kal_int16 rscp_sum; //kal_uint8 rscp_sum;
+ kal_int16 freq_error; //anthony 0514
+} UL1TST_cpich_result_T;
+
+#define UL1_MAX_NUM_MEAS_CELL 32
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 num_cell;
+ UL1TST_cpich_result_T cpich_result[ UL1_MAX_NUM_MEAS_CELL ];
+} UL1TSTResultRSCP;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_int32 tm; /* Cell frame boundary offset to LST */
+ kal_bool sttd; /* True for STTD used. */
+ kal_uint8 rscp_sum;
+ kal_int16 freq_error;
+} UL1TSTResultAFC;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint16 psc; /* Primary scrambling code */
+ kal_int32 tm; /* Cell frame boundary offset to LST */
+ kal_bool sttd; /* True for STTD used. */
+ kal_uint8 rscp_sum;
+ kal_int32 freq_error;
+} UL1TSTResultAFC_EXT;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint32 ber; /* Spec requirement=10^-3. We will count 10^5 frames(100 times spec requirement) for BER calculation. Only count for the only TRCh for DPDCh. */
+} UL1TSTResultRxDPCh;
+
+typedef struct
+{
+ kal_bool ok;
+ kal_uint8 link_status;
+} UL1TSTResultNSFT;
+
+//#define MAX_MQC_RSSI_COUNT 400
+typedef struct
+{
+ kal_bool ok;
+ /* freq-pwr table */
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_uint8 rx_lna_mode[MAX_MQC_RSSI_COUNT]; // 0: high, 1: middle, 2: low
+ kal_int16 rssi[MAX_MQC_RSSI_COUNT];
+ kal_uint8 rxd_lna_mode[MAX_MQC_RSSI_COUNT]; // 0: high, 1: middle, 2: low
+ kal_int16 rssi_rxd[MAX_MQC_RSSI_COUNT];
+ kal_uint16 pwr_det_value[MAX_MQC_FREQ_COUNT][3];
+ kal_int16 mqc_tx_gvgabb0_report[MAX_MQC_RSSI_COUNT];
+ /* {pd_meas-PA_high, pd_meas-PA_mid, pd_meas-PA_low}, //freq-1
+ * {pd_meas-PA_high, pd_meas-PA_mid, pd_meas-PA_low}, //freq-2
+ * ...
+ * {pd_meas-PA_high, pd_meas-PA_mid, pd_meas-PA_low}, //freq-freq_count
+ */
+} UL1TSTResultMQCOctLev;
+
+typedef struct
+{
+ kal_bool ok;
+ /* freq-pwr table */
+ kal_uint8 freq_count;
+ kal_uint8 pwr_count;
+ kal_uint8 freq_start_idx;
+ kal_uint8 pwr_start_idx;
+ kal_int16 rssi[MAX_MQC_RSSI_COUNT];
+ kal_uint16 pwr_det_value[MAX_MQC_FREQ_COUNT];
+ /* {RSSI-1, RSSI-2, ... , RSSI-pwrcount}, //freq-1
+ * {RSSI-1, RSSI-2, ... , RSSI-pwrcount}, //freq-2
+ * ...
+ * {RSSI-1, RSSI-2, ... , RSSI-pwrcount}, //freq-freq_count
+ * Same for power detector.
+ */
+} UL1TSTResultMQC;
+
+//for list mode
+typedef struct
+{
+ kal_uint8 status;
+ kal_uint8 current_idx;
+ kal_int16 total_bits[MAX_LM_VALID_FREQ][2]; //0:real ber test. 1:debug before ber test
+ kal_int16 error_bits[MAX_LM_VALID_FREQ][2];
+ kal_int16 rssi[MAX_LM_VALID_FREQ][3]; //RSSI at 3 LNA mode
+ kal_int16 rssi_rxd[MAX_LM_VALID_FREQ][3]; //RSSI RXD at 3 LNA mode
+ kal_int8 lnamode[3];
+} UL1TSTResultListMode;
+
+typedef struct
+{
+ kal_bool ok; /*<! ok indicator */
+ kal_uint32 sum; /*<! the sum of measure_count times of temp sensor result */
+} UL1TSTResultGetRfTempSensor;
+
+/* DO NOT Modify the definition of UL1TSTCalibrationItem */
+typedef struct
+{
+ kal_uint32 is_capable:1; /*<! the indicator to indicate if this item is supported by SW or HW */
+ kal_uint32 is_mandatory:1; /*<! the indicator to indicate if this item is mandatory to be calibrated */
+ kal_uint32 parameters:30; /*<! parameter to be carried to tool side */
+} UL1TSTCalibrationItem;
+
+/* DO NOT Modify the member order of UL1TSTCalibrationItemSet, Items must be added to the end */
+typedef struct
+{
+ UL1TSTCalibrationItem tadc_cal; /*[ 0] TADC calibration capability */
+ UL1TSTCalibrationItem multi_rat_tadc_bitmap; /*[ 1] bit map of multi-rat TADC calibration */
+ UL1TSTCalibrationItem multi_rat_afc_bitmap; /*[ 2] bit map of multi-rat AFC calibration */
+ UL1TSTCalibrationItem mipi_pa_level_and_cw_num; /*[ 3] Number of MIPI PA CW */
+ UL1TSTCalibrationItem temperature_info; /*[ 4] */
+ UL1TSTCalibrationItem list_mode_support; /*[ 5] Target support list mode API; is_capable (0: not supported, 1: supported) */
+ UL1TSTCalibrationItem thermal_sensor_type; /*[ 6] Target support temp sensor type; is_capable (0: not supported, 1: supported) parameter (0: internal, 1: external) */
+ UL1TSTCalibrationItem ubin_mode_switch_support; /*[ 7] */
+ UL1TSTCalibrationItem nvram_access_interface; /*[ 8] Target support nvram access API by ul1tst ; is_capable (0: not supported, 1: supported) */
+ UL1TSTCalibrationItem rx_gain_lpm_support; /*[ 9] Target support RX low power gain mode ; is_capable (0: not supported, 1: supported) */
+ UL1TSTCalibrationItem nsft_get_RSSI; /*[10] Target support get RSSI during NSFT flow ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem prf_select; /*[11] Target support prf select modify ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem nsft_reset_ber_result; /*[12] Target support NSFT reset BER result ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem elna_addition; /*[13] Target PRX support eLNA addition ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem apc_extend; /*[14] Target support APC calibration extend ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem elna_addition_diversity_path; /*[15] Target DRX support eLNA addition ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem cancel_polling_action_when_get_fhc_result; /*[16] Target remove polling action when get FHC result ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem wcdma_md_cal_generation; /*[17] Target remove polling action when get FHC result ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem wcdma_dpd; /*[18] Target support WCDMA DPD ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem wcdma_iq_dump; /*[19] Target support WCDMA Auto IQ dump*/
+ UL1TSTCalibrationItem wcdma_afc_rscp_generation; /*[20] Target support WCDMA New AFC_RSCP interface*/
+ UL1TSTCalibrationItem wcdma_nsft_tx_power_offset; /*[21] Target support WCDMA NSFT Set/Get Tx power offset ; is_capable (0: not supported, 1: supported)*/
+ UL1TSTCalibrationItem wcdma_tx_dpch_adjust; /*[22] Target support WCDMA TX DPCH Power adjust ; is_capable (0: not supported, 1: supported)*/
+} UL1TSTCalibrationItemSet;
+
+/* DO NOT Modify the member order of UL1TSTCalibrationItemSet, Items must be added to the end */
+typedef struct
+{
+ kal_uint32 mipi_pa_band_support; /*<! band support bit map of MIPI PA */
+ kal_uint32 ue_capability_ext1; /*<! 0x00000001 : support RX gain sweep */
+} UL1TSTCapabilityItemSet;
+
+//(this part is put into peer buffer)
+typedef struct
+{
+ kal_uint32 capability_item_offset; /*!< the offset value of the starting address of UL1TSTCapabilityItemSet in UL1TSTRfCapability */
+ kal_uint32 calibration_item_offset; /*!< the offset value of the starting address of UL1TSTCalibrationItemSet in UL1TSTRfCapability */
+ UL1TSTCapabilityItemSet capabilityItems;
+ UL1TSTCalibrationItemSet calibrationItems;
+} UL1TSTResultGetRfCapability;
+
+typedef struct
+{
+ kal_bool ok; /*<! ok indicator */
+ kal_uint32 cwNum; /*<! the Number of MIPI PA CWt */
+} UL1TSTResultGetMipiCwNum;
+
+typedef struct
+{
+ kal_uint8 status;
+ kal_uint16 power_level_num;
+ kal_uint16 code_word_num;
+}
+UL1TSTResultGetMipiCodeWord;
+
+typedef struct
+{
+ kal_bool ok;
+}
+UL1TSTResultSetMipiCodeWord;
+
+typedef struct
+{
+ kal_int16 status;
+ kal_int16 tadc_dac;
+ kal_int16 temperature;
+ kal_int16 temp_idx;
+}
+UL1TSTResultTemperatureInfo;
+
+typedef union
+{
+ kal_bool ok;
+ UL1TSTResultRSSI rssi;
+ UL1TSTResultRSSIRxD rssi_rxd; /**< \breif R8 get both rx path RSSI */
+ UL1TSTResultRSCP rscp;
+ UL1TSTResultRxDPCh rx_dpch;
+ UL1TSTResultAFC afc;
+ UL1TSTResultAFC_EXT afc_ext;
+ UL1TSTResultNSFT nsft;
+ UL1TSTResultMQC mqc;
+ UL1TSTResultMQCOctLev mqc_octlev;
+ UL1TSTResultGetRfTempSensor rfTemperature;
+ UL1TSTResultGetMipiCwNum mipiPaCwNum;
+ UL1TSTResultGetMipiCodeWord mipiPaGetCwData;
+ UL1TSTResultSetMipiCodeWord mipiPaSetCwData;
+ UL1TSTResultTemperatureInfo temperature_info;
+} UL1TSTResultParam;
+
+typedef struct
+{
+ //kal_uint8 ref_count; // part of LOCAL_PARA_HDR
+ //kal_uint16 msg_len; // part of LOCAL_PARA_HDR
+ LOCAL_PARA_HDR
+ UL1TSTCmdType type;
+ UL1TSTCmdParam param;
+} ft_ul1tst_req_T;
+
+typedef struct
+{
+ //kal_uint8 ref_count; // part of LOCAL_PARA_HDR
+ //kal_uint16 msg_len; // part of LOCAL_PARA_HDR
+ LOCAL_PARA_HDR
+ UL1TSTCmdType type;
+ UL1TSTResultParam param;
+} ul1tst_ft_cnf_T;
+
+//#endif
+#endif
diff --git a/mcu/interface/middleware/meta/ul1tst_public.h b/mcu/interface/middleware/meta/ul1tst_public.h
new file mode 100644
index 0000000..38c2252
--- /dev/null
+++ b/mcu/interface/middleware/meta/ul1tst_public.h
@@ -0,0 +1,9 @@
+#if (defined __MD93__)
+#include "ul1tst_public_gen93.h"
+#elif (defined __MD95__)
+#include "ul1tst_public_gen95.h"
+#elif (defined __MD97__) || (defined __MD97P__)
+#include "ul1tst_public_gen97.h"
+#else
+#error "[ERROR] Invalid MD generation"
+#endif
diff --git a/mcu/interface/middleware/meta/ul1tst_public_gen93.h b/mcu/interface/middleware/meta/ul1tst_public_gen93.h
new file mode 100644
index 0000000..830fb1a
--- /dev/null
+++ b/mcu/interface/middleware/meta/ul1tst_public_gen93.h
@@ -0,0 +1,149 @@
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*******************************************************************************/
+
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ul1tst_public.h
+ *
+ * Project:
+ * --------
+ * MT6268 Project
+ *
+ * Description:
+ * ------------
+ * ul1tst_public.h
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+
+#ifndef ul1tst_public_h
+#define ul1tst_public_h
+
+#ifdef __MTK_TARGET__
+#include "ul1tst_msg.h"
+#endif
+//#include "ul1_def.h"
+//#include "ul1_struct.h"
+
+/*===============================================================================*/
+
+#include "kal_general_types.h"
+
+/*===============================================================================*/
+
+//#ifdef MT6268T
+#ifdef __MTK_TARGET__
+void UL1TST_Initialization(kal_bool from_normal_task);
+#else
+void UL1TST_Initialization(kal_bool from_normal_task);
+#endif
+
+void UL1TST_Init(void);
+UL1TSTCmdType UL1TST_Get_ExecuteCmd( void );
+
+void UL1TST_Init_from_normal(void);
+void UL1TST_DispatchMessage(ilm_struct* ptrMsg, kal_bool from_normal);
+void UL1TST_Stop(void);
+
+void UL1TST_Start_ULDCH( /*kal_int16 dl_freq,*/ kal_int16 ul_freq, kal_int16 psc, kal_uint32 sc_code, kal_uint8 power_ctrl_mode,
+ kal_uint8 pa_mode, kal_uint16 idx, kal_uint16 afc_dac, kal_uint8 dpcch_pwr, kal_uint8 dpdch_pwr,
+ kal_uint8 rf_band, kal_uint8 vm1, kal_uint8 vm2, kal_uint16 dc2dc_dac, kal_uint16 vbias_dac, kal_uint16 apc_dac, kal_bool pwr_det );
+
+kal_bool UL1TST_NSFT_SetILPC_Step(kal_uint8 step);
+
+#endif
diff --git a/mcu/interface/middleware/meta/ul1tst_public_gen95.h b/mcu/interface/middleware/meta/ul1tst_public_gen95.h
new file mode 100644
index 0000000..830fb1a
--- /dev/null
+++ b/mcu/interface/middleware/meta/ul1tst_public_gen95.h
@@ -0,0 +1,149 @@
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*******************************************************************************/
+
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ul1tst_public.h
+ *
+ * Project:
+ * --------
+ * MT6268 Project
+ *
+ * Description:
+ * ------------
+ * ul1tst_public.h
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+
+#ifndef ul1tst_public_h
+#define ul1tst_public_h
+
+#ifdef __MTK_TARGET__
+#include "ul1tst_msg.h"
+#endif
+//#include "ul1_def.h"
+//#include "ul1_struct.h"
+
+/*===============================================================================*/
+
+#include "kal_general_types.h"
+
+/*===============================================================================*/
+
+//#ifdef MT6268T
+#ifdef __MTK_TARGET__
+void UL1TST_Initialization(kal_bool from_normal_task);
+#else
+void UL1TST_Initialization(kal_bool from_normal_task);
+#endif
+
+void UL1TST_Init(void);
+UL1TSTCmdType UL1TST_Get_ExecuteCmd( void );
+
+void UL1TST_Init_from_normal(void);
+void UL1TST_DispatchMessage(ilm_struct* ptrMsg, kal_bool from_normal);
+void UL1TST_Stop(void);
+
+void UL1TST_Start_ULDCH( /*kal_int16 dl_freq,*/ kal_int16 ul_freq, kal_int16 psc, kal_uint32 sc_code, kal_uint8 power_ctrl_mode,
+ kal_uint8 pa_mode, kal_uint16 idx, kal_uint16 afc_dac, kal_uint8 dpcch_pwr, kal_uint8 dpdch_pwr,
+ kal_uint8 rf_band, kal_uint8 vm1, kal_uint8 vm2, kal_uint16 dc2dc_dac, kal_uint16 vbias_dac, kal_uint16 apc_dac, kal_bool pwr_det );
+
+kal_bool UL1TST_NSFT_SetILPC_Step(kal_uint8 step);
+
+#endif
diff --git a/mcu/interface/middleware/meta/ul1tst_public_gen97.h b/mcu/interface/middleware/meta/ul1tst_public_gen97.h
new file mode 100644
index 0000000..b174c4c
--- /dev/null
+++ b/mcu/interface/middleware/meta/ul1tst_public_gen97.h
@@ -0,0 +1,159 @@
+/*******************************************************************************
+* Modification Notice:
+* --------------------------
+* This software is modified by MediaTek Inc. and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2005
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*******************************************************************************/
+
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ul1tst_public.h
+ *
+ * Project:
+ * --------
+ * MT6268 Project
+ *
+ * Description:
+ * ------------
+ * ul1tst_public.h
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+
+#ifndef ul1tst_public_h
+#define ul1tst_public_h
+
+//#ifdef __MTK_TARGET__
+#include "ul1tst_msg.h"
+//#endif
+//#include "ul1_def.h"
+//#include "ul1_struct.h"
+
+/*===============================================================================*/
+
+#include "kal_general_types.h"
+
+/*===============================================================================*/
+
+//#ifdef MT6268T
+#ifdef __MTK_TARGET__
+void UL1TST_Initialization(kal_bool from_normal_task);
+#else
+void UL1TST_Initialization(kal_bool from_normal_task);
+#endif
+
+void UL1TST_Init(void);
+UL1TSTCmdType UL1TST_Get_ExecuteCmd( void );
+
+void UL1TST_Init_from_normal(void);
+void UL1TST_DispatchMessage(ilm_struct* ptrMsg, kal_bool from_normal);
+void UL1TST_Stop(void);
+
+void UL1TST_Start_ULDCH( /*kal_int16 dl_freq,*/ kal_int16 ul_freq, kal_int16 psc, kal_uint32 sc_code, kal_uint8 power_ctrl_mode,
+ kal_uint8 pa_mode, kal_int16 prf, kal_uint16 afc_dac, kal_uint8 dpcch_pwr, kal_uint8 dpdch_pwr,
+ kal_uint8 rf_band, kal_uint8 vm1, kal_uint8 vm2, kal_uint16 dc2dc_dac, kal_uint16 vbias_dac, kal_uint16 apc_dac, kal_bool pwr_det );
+
+kal_bool UL1TST_NSFT_SetILPC_Step(kal_uint8 step);
+
+#endif