[Feature]Upload Modem source code
Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I10_UL1D_CS_Test.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I10_UL1D_CS_Test.l1v
new file mode 100755
index 0000000..8d6b9da
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I10_UL1D_CS_Test.l1v
@@ -0,0 +1,131 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][1_Idle]I10: MTK UL1 internal CS testing (UL1D request)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_UL1D_CS_TEST
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ CS_TEST_MODE MODE;// choose: ics_cs1, tcs_cs1, cs2, ics_cs3, tcs_cs3, 2stage_cs3
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 cs1_acc_frame;// range 1~7
+ kal_uint8 cs2_acc_frame;// range 1~7
+ kal_uint8 dump_cnt; // range 1~5
+ kal_uint8 fading;
+ kal_int16 freq_err;
+ kal_uint16 cfe_thr;
+ kal_uint16 cs1_thr;
+ kal_uint16 cs2_thr;
+ kal_uint16 cs3_thr;
+ kal_uint8 cs1_local_max;
+ kal_uint8 cs2_coht_detection;
+ kal_uint8 cs3_coht_sym;
+ kal_uint8 cs3_noncoht_sample;
+ kal_uint16 process_count;
+ kal_bool ics_cfe;
+} udps_ul1d_cs_test_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[MODE] "Choose CS Test Mode"
+@ICS_CS1 0
+TCS_CS1 1
+ICS_CS2 2
+TCS_CS2 3
+CS3_3stage 4
+CS3_2stage 5
+CS4 6
+ICS 7
+TCS_3stage 8
+TCS_2stage 9
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[cs1_acc_frame] "CS1 accumulate frame"
+1~7
+@1
+
+[cs2_acc_frame] "CS2 accumulate frame"
+1~7
+@1
+
+[dump_cnt] "CS3 DUMP count"
+1~5
+@1
+
+[fading] "Fading channel"
+@Static 0
+C1 1
+C2 2
+C3 3
+C4 4
+C5 5
+C6 6
+
+[freq_err] "Freq off"
+-6000~6000
+@0
+
+[cfe_thr] "CFE threshold"
+0~65535
+@0
+
+[cs1_thr] "CS1 threshold"
+0~65535
+@0
+
+[cs2_thr] "CS2 threshold"
+0~65535
+@0
+
+[cs3_thr] "CS3 threshold"
+0~65535
+@0
+
+[cs1_local_max] "cs1_local_max"
+0~1
+@1
+
+[cs2_coht_detection] "cs2_coht_detection"
+0~1
+@1
+
+[cs3_coht_sym] "cs3_coht_sym"
+0~8
+@8
+
+[cs3_noncoht_sample] "cs3_noncoht_sample"
+0~32
+@4
+
+[process_count] "process_count"
+0~65535
+@1000
+
+[ics_cfe] "ics_cfe"
+@KAL_FALSE
+
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I12_pch_measurement_8960.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I12_pch_measurement_8960.l1v
new file mode 100755
index 0000000..2edeb4c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I12_pch_measurement_8960.l1v
@@ -0,0 +1,56 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][1_Idle]I12 (3G Sleep Mode Testing)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PCH_MEASUREMENT_8960
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power; // Didn't decode from SIB3
+ kal_int8 UL_interference; //range: -110~-70 dBm, Didn't decode from SIB7
+
+ kal_uint8 DRX_cycle_length; // Didn't decode from SIB1
+ kal_bool IsMeasEnabled; // Indicate wether the measurement func. is activated
+} udps_pch_measurement_8960_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10814
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@0
+
+[max_tx_power] "Maximum allowed UL TX power [dBm] (from 8960)"
+-50~33
+@-49
+
+[UL_interference] "UL_interference [dBm] (from 8960)"
+-110~-70
+@-80
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+DRX6 6
+DRX7 7
+@DRX8 8
+DRX9 9
+
+[IsMeasEnabled] "Indicate wether the measurement func. is activated"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I13_Continual_ICS.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I13_Continual_ICS.l1v
new file mode 100755
index 0000000..8ee7ee1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I13_Continual_ICS.l1v
@@ -0,0 +1,109 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][1_Idle]I13 (UL1D continual ICS)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_CONTINUAL_ICS
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO pef
+ kal_uint16 OVSFdpch_rl2; // for SHO pef
+ kal_uint8 ssdt_s_bit;
+ kal_uint8 ssdt_CWS_len;
+ kal_uint8 ssdt_id_rl1; // for SSDT
+ kal_uint8 ssdt_id_rl2; // for SSDT
+ kal_uint16 ICS_run_num;
+} udps_continual_ics_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+
+[ICS_run_num] "Continual ICS total run number"
+1~60000
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+
+[ssdt_s_bit] "Number of S_filed bits for SSDT"
+0~2
+
+[ssdt_CWS_len] "Code word set length for SSDT"
+SSDT_LONG 0
+SSDT_SHORT 2
+SSDT_OFF 3
+
+[ssdt_id_rl1] "The SSDT cell id for this RL1. 0~7=A~H. 8 for not applicable"
+0~8
+
+[ssdt_id_rl2] "The SSDT cell id for this RL2. 0~7=A~H. 8 for not applicable"
+0~8
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I1_Initial_Cell_Search.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I1_Initial_Cell_Search.l1v
new file mode 100755
index 0000000..5d4e405
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I1_Initial_Cell_Search.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][1_Idle]I1: Initial Cell Search"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INITIAL_CELL_SEARCH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 uarfcn_bts2;
+} udps_initial_cell_search_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of lower frequency BTS"
+10587~10640
+@10600
+
+[uarfcn_bts2] "UARFCN of higher frequency BTS"
+10670~10814
+@10700
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I2_SFN_Read_SIB_Listen.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I2_SFN_Read_SIB_Listen.l1v
new file mode 100755
index 0000000..790a742
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I2_SFN_Read_SIB_Listen.l1v
@@ -0,0 +1,52 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][1_Idle]I2: ICS, SFN Reading (SetSync) and System Info. Listening"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_SFN_READ_SIB_LISTEN
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2; // Only for CPICH meas
+ kal_uint16 psc_bts2; // Only for CPICH meas
+ kal_bool read_BCH_only; // for BSC1(CSD) only (I2, I5): contineous rx BCH
+ kal_uint16 count_blks; // for Self BLER cal.
+} udps_sfn_read_sib_listen_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[read_BCH_only] "(CSD) Conti. Read BCH?"
+@KAL_FALSE
+
+[count_blks] "(CSD)Wanted total BCH Blocks number?"
+@2000
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I3_Paging_Response.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I3_Paging_Response.l1v
new file mode 100755
index 0000000..8feb882
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I3_Paging_Response.l1v
@@ -0,0 +1,108 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][1_Idle]I3: Response to Paging Occasion"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PAGING_RESPONSE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ kal_int16 freq_offset;//I3, I5 add I/F for CSD's freq. offset requirement.
+ kal_uint16 offline_rake_test_count; // for I3, I5, I6
+} udps_paging_response_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[freq_offset] "(CSD) Offline Rake Test's freq. offset:"
+@0
+
+[offline_rake_test_count] "offline RAKE test count"
+@1000
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I4_Target_Cell_Search.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I4_Target_Cell_Search.l1v
new file mode 100755
index 0000000..707dd0b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/1_Idle/udps_I4_Target_Cell_Search.l1v
@@ -0,0 +1,98 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][1_Idle]I4: Target Cell Search"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_TARGET_CELL_SEARCH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts1;
+ kal_uint16 psc_bts2;
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+} udps_target_cell_search_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for FS)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for FS)"
+0~511
+@511
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, 2^(6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A1_UL_Open_Loop_Pwr_Ctrl.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A1_UL_Open_Loop_Pwr_Ctrl.l1v
new file mode 100755
index 0000000..7fd094a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A1_UL_Open_Loop_Pwr_Ctrl.l1v
@@ -0,0 +1,52 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][2_Access]A1: Open Loop Power Control in Uplink"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_UL_OPEN_LOOP_PWR_CTRL
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power; // Didn't decode from SIB3
+ kal_int8 UL_interference; //range: -110~-70 dBm, Didn't decode from SIB7
+
+ kal_uint8 DRX_cycle_length; // Didn't decode from SIB1
+} udps_ul_open_loop_pwr_ctrl_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[max_tx_power] "Maximum allowed UL TX power [dBm] (from 8960)"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm] (from 8960)"
+-110~-70
+@-75
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A2_Tx_On_Off_Time_Mask.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A2_Tx_On_Off_Time_Mask.l1v
new file mode 100755
index 0000000..5ff92e8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A2_Tx_On_Off_Time_Mask.l1v
@@ -0,0 +1,52 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][2_Access]A2: Transmit On/Off Time Mask"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_TX_ON_OFF_TIME_MASK
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power; // Didn't decode from SIB3
+ kal_int8 UL_interference; //range: -110~-70 dBm, Didn't decode from SIB7
+
+ kal_uint8 DRX_cycle_length; // Didn't decode from SIB1
+} udps_tx_on_off_time_mask_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[max_tx_power] "Maximum allowed UL TX power [dBm] (from 8960)"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm] (from 8960)"
+-110~-70
+@-80
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A3_Rx_ACK_on_AICH.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A3_Rx_ACK_on_AICH.l1v
new file mode 100755
index 0000000..95c7652
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A3_Rx_ACK_on_AICH.l1v
@@ -0,0 +1,52 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][2_Access]A3: Correct Behavior when receiving an ACK on AICH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RX_ACK_ON_AICH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power; // Didn't decode from SIB3
+ kal_int8 UL_interference; //range: -110~-70 dBm, Didn't decode from SIB7
+
+ kal_uint8 DRX_cycle_length; // Didn't decode from SIB1
+} udps_rx_ack_on_aich_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[max_tx_power] "Maximum allowed UL TX power [dBm] (from 8960)"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm] (from 8960)"
+-110~-70
+@-80
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A4_Rx_No_ACK_on_AICH.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A4_Rx_No_ACK_on_AICH.l1v
new file mode 100755
index 0000000..d0b16b1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A4_Rx_No_ACK_on_AICH.l1v
@@ -0,0 +1,52 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][2_Access]A4: Correct Behavior at Time-out"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RX_NO_ACK_ON_AICH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power; // Didn't decode from SIB3
+ kal_int8 UL_interference; //range: -110~-70 dBm, Didn't decode from SIB7
+
+ kal_uint8 DRX_cycle_length; // Didn't decode from SIB1
+} udps_rx_no_ack_on_aich_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[max_tx_power] "Maximum allowed UL TX power [dBm] (from 8960)"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm] (from 8960)"
+-110~-70
+@-80
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A5_Rx_NACK_on_AICH.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A5_Rx_NACK_on_AICH.l1v
new file mode 100755
index 0000000..e036d80
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/2_Access/udps_A5_Rx_NACK_on_AICH.l1v
@@ -0,0 +1,180 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][2_Access]A5: Correct Behavior when receiving an NACK on AICH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RX_NACK_ON_AICH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ // For PCH not FACH
+ //kal_uint8 Ts_ccpch; // Should be the same as FACH/S_CCPCH
+ //kal_uint16 OVSFs_ccpch; // Should be the same as FACH/S_CCPCH
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ // For PCH not FACH
+ kal_int8 pich_power_off; // New added for PCH
+ kal_uint8 DRX_cycle_length; // New added for PCH
+ kal_uint8 PI_num; // New added for PCH
+ kal_uint8 page_occa; // New added for PCH
+ kal_uint32 DRX_index; // New added for PCH
+} udps_rx_nack_on_aich_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+/******************************************
+* For PCH not FACH
+******************************************/
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@-8
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, 2^(6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC12.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC12.l1v
new file mode 100755
index 0000000..dbdba9a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC12.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD05]CD05: Demodulation of DCH in Static Propagation Conditions(RMC12.2)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_STATIC_CH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+ kal_uint8 fading_case; //pass to UL1D: 0=static, 1..6=fading case 1..6
+} udps_pef_in_static_ch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+[fading_case] "(CSD) Fading Case 0: Static, 1~6?"
+0~6
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC144.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC144.l1v
new file mode 100755
index 0000000..2d47f8a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC144.l1v
@@ -0,0 +1,101 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD05]CD05: Demodulation of DCH in Static Propagation Conditions(RMC144)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_STATIC_CH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+} udps_pef_in_static_ch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_144
+RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@13
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@16
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+@16
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC384.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC384.l1v
new file mode 100755
index 0000000..9f5334d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC384.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD05]CD05: Demodulation of DCH in Static Propagation Conditions(RMC384)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_STATIC_CH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+} udps_pef_in_static_ch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+RMC_64
+@RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@6
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@8
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@16
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC64.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC64.l1v
new file mode 100755
index 0000000..d0b6c72
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC64.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD05]CD05: Demodulation of DCH in Static Propagation Conditions(RMC64)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_STATIC_CH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+} udps_pef_in_static_ch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@32
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC12.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC12.l1v
new file mode 100755
index 0000000..89cf52e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC12.l1v
@@ -0,0 +1,89 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD10]CD10: Power Control in Downlink, constant BLER target(RMC12)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DL_PWR_CTRL_CONST_BLER
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_int8 target_bler;
+} udps_dl_pwr_ctrl_const_bler_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[target_bler] "(DCH) Diving the value of this field to 10 get the real BLER. -63 ~ 0"
+-63~0
+@-20
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC64.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC64.l1v
new file mode 100755
index 0000000..ced2286
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC64.l1v
@@ -0,0 +1,89 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD10]CD10: Power Control in Downlink, constant BLER target(RMC64)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DL_PWR_CTRL_CONST_BLER
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_int8 target_bler;
+} udps_dl_pwr_ctrl_const_bler_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[target_bler] "(DCH) Diving the value of this field to 10 get the real BLER. -63 ~ 0"
+-63~0
+@-20
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC12.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC12.l1v
new file mode 100755
index 0000000..623f03b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC12.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD13]CD13: Demodulation of DCH in Inter-Cell Soft Handover(RMC12)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_SHO
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for SHO pef, at the same time
+ kal_uint8 Tdpch_rl2; // for SHO pef
+ kal_uint16 OVSFdpch_rl2; // for SHO pef
+} udps_pef_in_sho_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC64.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC64.l1v
new file mode 100755
index 0000000..46a29ee
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC64.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][CD13]CD13: Demodulation of DCH in Inter-Cell Soft Handover(RMC64)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_SHO
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for SHO pef, at the same time
+ kal_uint8 Tdpch_rl2; // for SHO pef
+ kal_uint16 OVSFdpch_rl2; // for SHO pef
+} udps_pef_in_sho_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_AMR_LoRx01.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_AMR_LoRx01.l1v
new file mode 100644
index 0000000..966ce9b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_AMR_LoRx01.l1v
@@ -0,0 +1,77 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated][LoRx] LoRx01"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_AMR_LORX01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_amr_lorx01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD01_UL_Inner_Loop_Pwr_Ctrl.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD01_UL_Inner_Loop_Pwr_Ctrl.l1v
new file mode 100755
index 0000000..737404e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD01_UL_Inner_Loop_Pwr_Ctrl.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD01: Inner Loop Power Control in Uplink"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_UL_INNER_LOOP_PWR_CTRL
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH only
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 pc_algo;
+ kal_uint8 tpc_step;
+} udps_ul_inner_loop_pwr_ctrl_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[pc_algo] "UL Power control algorithm"
+1~2
+@1
+
+[tpc_step] "UL Power control step size"
+1~2
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD02_Out_of_Sync_Handling.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD02_Out_of_Sync_Handling.l1v
new file mode 100755
index 0000000..723e7ee
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD02_Out_of_Sync_Handling.l1v
@@ -0,0 +1,82 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD02: Out-of-synchronization Handling of Output Power"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_OUT_OF_SYNC_HANDLING
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_out_of_sync_handling_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD03_Change_of_TFC.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD03_Change_of_TFC.l1v
new file mode 100755
index 0000000..544d9f5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD03_Change_of_TFC.l1v
@@ -0,0 +1,74 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD03: Change of TFC"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_CHANGE_OF_TFC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_change_of_tfc_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD04_UL_Compressed_Mode.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD04_UL_Compressed_Mode.l1v
new file mode 100755
index 0000000..b8ffe27
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD04_UL_Compressed_Mode.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD04: Power Setting in Uplink Compressed Mode"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_UL_COMPRESSED_MODE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_ul_compressed_mode_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD09_Pef_in_TX_Div_Mode.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD09_Pef_in_TX_Div_Mode.l1v
new file mode 100755
index 0000000..7c90cb7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD09_Pef_in_TX_Div_Mode.l1v
@@ -0,0 +1,123 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD09: Demodulation of DCH in Downlink Transmit Diversity Mode"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_TX_DIV_MODE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+} udps_pef_in_tx_div_mode_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+@FDD_DL_TX_STTD
+FDD_DL_TX_CLM1
+FDD_DL_TX_CLM2
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD11_Pef_in_DL_Compressed_Mode.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD11_Pef_in_DL_Compressed_Mode.l1v
new file mode 100755
index 0000000..11c6ef8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD11_Pef_in_DL_Compressed_Mode.l1v
@@ -0,0 +1,117 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD11: Performance of DCH in Downlink Compressed Mode(RMC12)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_DL_COMPRESSED_MODE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 CM_set_pef; //for CD11
+ kal_uint8 CM_DeltaSIR1; //for CD11
+ kal_uint8 CM_DeltaSIRafter1; //for CD11
+ kal_uint8 CM_tgpl2; // (R99) TGPL2. 1 ~ 144
+ kal_bool self_cal_BLER_CM; // for CD11 only (Seperate BLER calculation)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool sc_change;//for CD11 (CSD: DPC67)
+} udps_pef_in_dl_compressed_mode_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[CM_set_pef] "compressed mode parameters in table C.5.1 (Set3 for TGL2)"
+@Set1 1
+Set2 2
+Set3 3
+
+[CM_DeltaSIR1] "The Delta SIR1 (0:0.1:3)*10"
+0~30
+@0
+
+[CM_DeltaSIRafter1] "The Delta SIR_AFTER1 (0:0.1:3)*10"
+0~30
+@0
+
+[CM_tgpl2] "(R99)TGPL2 only valid in Test Set 3"
+1~144
+@4
+
+[self_cal_BLER_CM] "Use UDPS to count Seperate CM BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted total (odd+even) Blocks number?"
+@2000
+
+[sc_change] "(CSD) Change the DL Scr Code for CM?"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD12_Pef_of_BTFD.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD12_Pef_of_BTFD.l1v
new file mode 100755
index 0000000..379f3f2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD12_Pef_of_BTFD.l1v
@@ -0,0 +1,74 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD12: Performance of Blind Transport Format Detection (BTFD)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_OF_BTFD
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_pef_of_btfd_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD14_Pef_of_TPC_Combining.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD14_Pef_of_TPC_Combining.l1v
new file mode 100755
index 0000000..d432f27
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD14_Pef_of_TPC_Combining.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD14: Combining of TPC Commands from Radio Links of Different Radio Link Sets"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_OF_TPC_COMBINING
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for SHO pef, at the same time
+ kal_uint8 Tdpch_rl2; // for SHO pef
+ kal_uint16 OVSFdpch_rl2; // for SHO pef
+} udps_pef_of_tpc_combining_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@2
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@4
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD15_Pef_in_SSDT_Pwr_Ctrl.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD15_Pef_in_SSDT_Pwr_Ctrl.l1v
new file mode 100755
index 0000000..5fc6c9a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD15_Pef_in_SSDT_Pwr_Ctrl.l1v
@@ -0,0 +1,103 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD15: Demodulation of DCH in Site Selection Diversity Transmission Power Control Mode (SSDT)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_IN_SSDT_PWR_CTRL
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO pef
+ kal_uint16 OVSFdpch_rl2; // for SHO pef
+ kal_uint8 ssdt_s_bit;
+ kal_uint8 ssdt_CWS_len;
+ kal_uint8 ssdt_id_rl1; // for SSDT
+ kal_uint8 ssdt_id_rl2; // for SSDT
+} udps_pef_in_ssdt_pwr_ctrl_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+
+[ssdt_s_bit] "Number of S_filed bits for SSDT"
+0~2
+
+[ssdt_CWS_len] "Code word set length for SSDT"
+FDD_SSDT_LONG 0
+FDD_SSDT_SHORT 2
+FDD_SSDT_OFF 3
+
+[ssdt_id_rl1] "The SSDT cell id for this RL1. 0~7=A~H. 8 for not applicable"
+0~8
+
+[ssdt_id_rl2] "The SSDT cell id for this RL2. 0~7=A~H. 8 for not applicable"
+0~8
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD16_Active_Set_Update_Delay.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD16_Active_Set_Update_Delay.l1v
new file mode 100755
index 0000000..4d495be
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD16_Active_Set_Update_Delay.l1v
@@ -0,0 +1,103 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD16: FDD/FDD Soft Handover for Active Set Update Delay Verification"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ACTIVE_SET_UPDATE_DELAY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+} udps_active_set_update_delay_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD17_TX_Timing_in_SHO.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD17_TX_Timing_in_SHO.l1v
new file mode 100755
index 0000000..778009e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD17_TX_Timing_in_SHO.l1v
@@ -0,0 +1,113 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD17: UE Transmit Timing in SHO Condition"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_TX_TIMING_IN_SHO
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ kal_uint8 ssc_rl1;
+ kal_uint8 ssc_rl2;
+} udps_tx_timing_in_sho_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@50
+
+
+[ssc_rl1] "ssc_rl1: 0 ~ 15. 0 for the same scrambling code for the P-CPICH "
+0~15
+@1
+
+[ssc_rl2] "ssc_rl2: 0 ~ 15. 0 for the same scrambling code for the P-CPICH "
+0~15
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD18_Intra_Freq_TRHHO_Delay.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD18_Intra_Freq_TRHHO_Delay.l1v
new file mode 100755
index 0000000..326eaa7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD18_Intra_Freq_TRHHO_Delay.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD18: FDD/FDD Hard Handover to Intra-frequency Cell for Interruption Time Verification (Timing Re-initialized)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTRA_FREQ_TRHHO_DELAY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for HHO delay
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+} udps_intra_freq_trhho_delay_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD19_Inter_Freq_TRHHO_Delay.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD19_Inter_Freq_TRHHO_Delay.l1v
new file mode 100755
index 0000000..def8fda
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD19_Inter_Freq_TRHHO_Delay.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD19: FDD/FDD Hard Handover to Inter-frequency Cell for Interruption Time Verification (Timing Re-initialized)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_TRHHO_DELAY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for HHO delay
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+} udps_inter_freq_trhho_delay_struct; // CD19
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD20_RRC_Re_estab_Delay.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD20_RRC_Re_estab_Delay.l1v
new file mode 100755
index 0000000..55eab1b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD20_RRC_Re_estab_Delay.l1v
@@ -0,0 +1,171 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD20: RRC Re-establishment Delay for Known Cell"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RRC_REESTAB_DELAY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+} udps_rrc_reestab_delay_struct; // CD20
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD21_Inter_Freq_TMHHO.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD21_Inter_Freq_TMHHO.l1v
new file mode 100755
index 0000000..fb3bfb3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD21_Inter_Freq_TMHHO.l1v
@@ -0,0 +1,103 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD21: FDD HHO to Inter-frequency Cell(Timing Mainitained)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_TMHHO
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_uint16 DOFF_bts2; // Don't Care for TMHHO
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+} udps_inter_freq_tmhho_struct; // CD21
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD22_Inter_Freq_TRHHO_Revert.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD22_Inter_Freq_TRHHO_Revert.l1v
new file mode 100755
index 0000000..82b3ccb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD22_Inter_Freq_TRHHO_Revert.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD22: FDD HHO to Inter-frequency Cell failed and REVERT (Timing Re-initialized)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_TRHHO_REVERT
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for HHO delay
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+} udps_inter_freq_trhho_revert_struct; // CD22
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD23_Inter_Freq_TMHHO_Revert.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD23_Inter_Freq_TMHHO_Revert.l1v
new file mode 100755
index 0000000..057449d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD23_Inter_Freq_TMHHO_Revert.l1v
@@ -0,0 +1,103 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD23: FDD HHO to Inter-frequency Cell failed and REVERT (Timing Maintained)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_TMHHO_REVERT
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_uint16 DOFF_bts2; // Don't Care for TMHHO
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+} udps_inter_freq_tmhho_revert_struct; // CD23
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD24_abort_enter_DCH.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD24_abort_enter_DCH.l1v
new file mode 100755
index 0000000..ffe6c4a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD24_abort_enter_DCH.l1v
@@ -0,0 +1,82 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD24: Verify if the L1 can handle the ABORT mechanism when setup DCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ABORT_ENTER_DCH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_abort_enter_dch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD39_BER_test_in_DCH_mode.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD39_BER_test_in_DCH_mode.l1v
new file mode 100755
index 0000000..e266239
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD39_BER_test_in_DCH_mode.l1v
@@ -0,0 +1,64 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD39: BER test in DCH mode (SA/CS request)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_BER_TEST_IN_DCH_MODE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool all_zero;
+ kal_uint32 reset_cnt;// CD39, SA/CS request
+} udps_ber_test_in_dch_mode_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[all_zero] "All zero or Not?"
+@KAL_TRUE
+
+[reset_cnt] "Number of total bits for RESET"
+@30000
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD40_SADCH_TTI_eighty.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD40_SADCH_TTI_eighty.l1v
new file mode 100755
index 0000000..da0ba15
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD40_SADCH_TTI_eighty.l1v
@@ -0,0 +1,86 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD40: Demodulation of Stand-Alone DCH(TTI=80ms)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_SADCH_TTI_EIGHTY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD40
+ kal_uint16 count_blks; // for CD40
+} udps_sadch_tti_eighty_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD41_SADCH_TTI_eighty_with_CM.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD41_SADCH_TTI_eighty_with_CM.l1v
new file mode 100755
index 0000000..393e99b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD41_SADCH_TTI_eighty_with_CM.l1v
@@ -0,0 +1,86 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD41: Demodulation of Stand-Alone DCH(TTI=80ms)with CM"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_SADCH_TTI_EIGHTY_WITH_CM
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD41
+ kal_uint16 count_blks; // for CD41
+} udps_sadch_tti_eighty_with_cm_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD50.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD50.l1v
new file mode 100755
index 0000000..b9168ef
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD50.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD50: Extened L1S for continuous auto reconfig"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_AUTO_RECONFIG
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+ kal_uint8 fading_case; //pass to UL1D: 0=static, 1..6=fading case 1..6
+} udps_auto_reconfig_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+[fading_case] "(CSD) Fading Case 0: Static, 1~6?"
+0~6
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD51_DCH_FACH_transition.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD51_DCH_FACH_transition.l1v
new file mode 100755
index 0000000..d710414
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/3_Dedicated/udps_CD51_DCH_FACH_transition.l1v
@@ -0,0 +1,169 @@
+{ Validation }
+Title = "[0_3G_Single_Channel][3_Dedicated]CD51: FDD/FDD DCH - FACH transition triggered by event4A/4B report"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DCH_FACH_TRANSIT
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 pc_algo;
+ kal_uint8 tpc_step;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+ kal_int8 cpich_tx_power; //RACH only
+ kal_bool sttd_ind;
+} udps_dch_fach_transit_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[pc_algo] "UL Power control algorithm"
+1~2
+@1
+
+[tpc_step] "UL Power control step size"
+1~2
+@1
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
diff --git a/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/udps_Test_Stop.l1v b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/udps_Test_Stop.l1v
new file mode 100755
index 0000000..bb3771f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/0_3G_Single_Channel/udps_Test_Stop.l1v
@@ -0,0 +1,13 @@
+{ Validation }
+Title = "[0_3G_Single_Channel]Stop Currently Running Test"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_TEST_STOP2_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct {
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+}dps_test_stop2_req_struct;
+*/
+
+{Parameters}
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp1.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp1.l1v
new file mode 100755
index 0000000..326bffc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp1.l1v
@@ -0,0 +1,74 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 1"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+FCCh 1
+SCh 2
+BCCh 3
+SDCCh 4
+RACh 5
+BfeCalibration 6
+TChFS_Speech 7
+TChFS_TimeDrift 8
+TChFS_Data 9
+TChFS_regular 10
+TChFS_facch_13 11
+TChFS_facch_13_17 12
+TChFS_dtx_facch_13_17 13
+TChFS_dtx_facch_4_52 14
+TChFS_dtx_facch_4_8_52_56 15
+TChEFS_Speech 16
+TChEFS_TimeDrift 17
+TChEFS_Data 18
+TChEFS_regular 19
+TChEFS_facch_13 20
+TChEFS_dtx_facch_13_17_56_60_65 21
+TChHS0_Speech 22
+TChHS0_TimeDrift 23
+TChHS0_Data 24
+TChHS0_regular 25
+TChHS0_dtx 26
+TChHS0_dtx_facch_8_17_52_60 27
+TChHS1_Speech 28
+TChHS1_TimeDrift 29
+TChHS1_Data 30
+TChHS1_regular 31
+TChHS1_dtx_facch_9_53_61 32
+TChCSD_144F 33
+TChCSD_96F 34
+TChCSD_48F 35
+TChCSD_24F 36
+TChCSD_48H0 37
+TChCSD_48H1 38
+TChCSD_24H0 39
+TChCSD_24H1 40
+TChCSD_144F_dtx_facch_8_13_17_52_56_60 41
+TCh_SpeechHandover 42
+TCh_SpeechCodecChange 43
+CipherA52_TChFS_Normal 44
+CipherA52_TChFS_Loopback 45
+CipherA52_SDCCh_Normal 46
+CipherA52_SDCCh_Loopback 47
+GPRS_PDTCh_TX 48
+GPRS_PDTCh_RX 49
+GPRS_PBCCh 50
+GPRS_FCChT 51
+GPRS_APC 52
+
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp2.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp2.l1v
new file mode 100755
index 0000000..3c3c73c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp2.l1v
@@ -0,0 +1,147 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 2"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+SCh 1
+SDCCh 2
+SDCCh_A51 3
+SDCCh_A52 4
+TChFS_dtx_8_77_facch_8_13_52_56_60 5
+TChEFS_dtx_8_77_facch_8_13_52_56_60 6
+TChHS0_dtx_8_77_facch_8_52_60 7
+TChCSD_144F_dtx_8_77_facch_8_13_52_56_60 8
+TChCSD_24HS0_dtx_8_77_facch_8_52_60 9
+TChCSD_48F_dtx_8_77_facch_8_13_56_60 10
+TChCSD_48HS1_dtx_8_77_facch_52_60 11
+TChCSD_96F_dtx_8_77_facch_8_13_52_56_60 12
+TChCSD_24F_dtx_8_77_facch_8_13_52_56_60 13
+TChFS_Speech 14
+TChEFS_Speech 15
+TChHS0_Speech 16
+TChHS1_Speech 17
+DynamicPatch 18
+FCCh 19
+TChAFS1220_regular 20
+TChAFS1020_regular 21
+TChAFS795_regular 22
+TChAFS740_regular 23
+TChAFS670_regular 24
+TChAFS590_regular 25
+TChAFS515_regular 26
+TChAFS475_regular 27
+TChAHS795_regular 28
+TChAHS740_regular 29
+TChAHS670_regular 30
+TChAHS590_regular 31
+TChAHS515_regular 32
+TChAHS475_regular 33
+PDTCh_RXTX 34
+PBCCh 35
+TChAFS1220_dtx_8_26_facch_8_ratscch_13 36
+TChAHS795_dtx_4_26_ratscch_8 37
+TChAFS1220_dtx_8_16_21_24_sidupdate_17 38
+TChAHS795_dtx_4_sidupdate_26_34 39
+TChAFS1220_Speech 40
+TChAFS1020_Speech 41
+TChAFS795_Speech 42
+TChAFS740_Speech 43
+TChAFS670_Speech 44
+TChAFS590_Speech 45
+TChAFS515_Speech 46
+TChAFS475_Speech 47
+TChAFS1220_Speech_dtx 48
+TChAFS1020_Speech_dtx 49
+TChAFS795_Speech_dtx 50
+TChAFS740_Speech_dtx 51
+TChAFS670_Speech_dtx 52
+TChAFS590_Speech_dtx 53
+TChAFS515_Speech_dtx 54
+TChAFS475_Speech_dtx 55
+WaveTable_OneNote 56
+DynamicDownload 57
+WaveTable_SixteenNote 58
+DynamicDownload2 59
+PDTCh_RXTX_WaveTable16 60
+PDTCh_RXTX_WaveTable32 61
+FCCh_SineWave 62
+WaveTable_EightNote 63
+PDTCh_RXTX_WaveTable8 64
+Huffman_Decoder 65
+DAF_Decoder 66
+SDCCh_New 67
+AAC_Huffman_Decoder 68
+AAC_Decoder 69
+WB_AMR_660 70
+WB_AMR_885 71
+WB_AMR_1265 72
+WB_AMR_1425 73
+WB_AMR_1585 74
+WB_AMR_1825 75
+WB_AMR_1985 76
+WB_AMR_2305 77
+WB_AMR_2385 78
+SDCCh_New2 79
+PDTCh_RXTX_AAC_Decoder 80
+PDTCh_RXTX_RXTX_WBAMR2385 81
+TChFS_dtx_8_77_facch_8_13_52_56_60_New 82
+TChFS_Speech_New 83
+TChAFS_INB 84
+TChAHS_INB 85
+AMR_EQ_CI 86
+TChAFS1220_dtx_8_26_facch_4_8_ratscch_13 87
+TChAHS795_dtx_4_12_17_26_ratscch_8 88
+TChAFS1220_dtx_4_21_facch_13_sidupdate_21 89
+TChAHS795_dtx_4_ratscch_21_sidupdate_26_34 90
+FCCh_ScanMode 91
+FCCh_IdleFrame 92
+SCh_New 93
+SDCCh_New3 94
+Post_Process_TS 95
+Post_Process_3D 96
+Via_ROM_Power_Down 97
+AAC_PLUS_Huffman_Decoder 98
+INTX_EQ_BYPASS 99
+INTX2_EQ 100
+INTX4_EQ 101
+EQ_test 102
+AAC_PLUS_Decoder 103
+PDTCh_RXTX_VDO_CAPTURE 104
+PDTCh_RXTX_5tap_148 105
+PDTCh_RXTX_6tap_156 106
+PDTCh_RXTX_6tap_148 107
+DSP_Memory_Test 108
+ADC_Linearity 109
+AFC_Linearity 110
+GPRS_APC 111
+GPRS_RepeatRACh 112
+CTM 113
+SDCCh_NBFilter 114
+SDCCh_WBFilter 115
+PCh 116
+SBC_Enc 117
+TChHS0_dtx_8_26_52_77_facch_0_to_86 118
+TChFS_Speech_CNTR 119
+PDTCh_RXTX_WBAMR2385_AudioDAC 120
+TChFS_Speech_CNTR_BT_COMP 121
+TChFS_Speech_CNTR_BT 122
+TChFS_dtx_8_77_facch_8_13_52_56_60_BFI 123
+TChEFS_dtx_8_77_facch_8_13_52_56_60_BFI 124
+TChHS0_dtx_8_77_facch_8_52_60_BFI 125
+TChAHS590_dtx_4_15_sidupdateINH 126
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp3.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp3.l1v
new file mode 100755
index 0000000..85a3981
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp3.l1v
@@ -0,0 +1,246 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 3"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+ID_001_SCh 1
+ID_002_SDCCh 2
+ID_003_SDCCh_A51 3
+ID_004_SDCCh_A52 4
+ID_005_TChFS_dtx_8_77_facch_8_13_52_56_60 5
+ID_006_TChEFS_dtx_8_77_facch_8_13_52_56_60 6
+ID_007_TChHS0_dtx_8_77_facch_8_52_60 7
+ID_008_TChCSD_144F_dtx_8_77_facch_8_13_52_56_60 8
+ID_009_TChCSD_24HS0_dtx_8_77_facch_8_52_60 9
+ID_010_TChCSD_48F_dtx_8_77_facch_8_13_56_60 10
+ID_011_TChCSD_48HS1_dtx_8_77_facch_52_60 11
+ID_012_TChCSD_96F_dtx_8_77_facch_8_13_52_56_60 12
+ID_013_TChCSD_24F_dtx_8_77_facch_8_13_52_56_60 13
+ID_014_TChFS_Speech 14
+ID_015_TChEFS_Speech 15
+ID_016_TChHS0_Speech 16
+ID_017_TChHS1_Speech 17
+//ID_018_DynamicPatch 18
+//ID_019_FCCh 19
+ID_020_TChAFS1220_regular 20
+ID_021_TChAFS1020_regular 21
+ID_022_TChAFS795_regular 22
+ID_023_TChAFS740_regular 23
+ID_024_TChAFS670_regular 24
+ID_025_TChAFS590_regular 25
+ID_026_TChAFS515_regular 26
+ID_027_TChAFS475_regular 27
+ID_028_TChAHS795_regular 28
+ID_029_TChAHS740_regular 29
+ID_030_TChAHS670_regular 30
+ID_031_TChAHS590_regular 31
+ID_032_TChAHS515_regular 32
+ID_033_TChAHS475_regular 33
+ID_034_PDTCh_RXTX 34
+ID_035_PBCCh 35
+ID_036_TChAFS1220_dtx_8_26_facch_8_ratscch_13 36
+ID_037_TChAHS795_dtx_4_26_ratscch_8 37
+ID_038_TChAFS1220_dtx_8_16_21_24_sidupdate_17 38
+ID_039_TChAHS795_dtx_4_sidupdate_26_34 39
+//ID_040_TChAFS1220_Speech 40
+//ID_041_TChAFS1020_Speech 41
+//ID_042_TChAFS795_Speech 42
+//ID_043_TChAFS740_Speech 43
+//ID_044_TChAFS670_Speech 44
+//ID_045_TChAFS590_Speech 45
+//ID_046_TChAFS515_Speech 46
+//ID_047_TChAFS475_Speech 47
+//ID_048_TChAFS1220_Speech_dtx 48
+//ID_049_TChAFS1020_Speech_dtx 49
+//ID_050_TChAFS795_Speech_dtx 50
+//ID_051_TChAFS740_Speech_dtx 51
+//ID_052_TChAFS670_Speech_dtx 52
+//ID_053_TChAFS590_Speech_dtx 53
+//ID_054_TChAFS515_Speech_dtx 54
+//ID_055_TChAFS475_Speech_dtx 55
+//ID_056_WaveTable_OneNote 56
+//ID_057_DynamicDownload 57
+//ID_058_WaveTable_SixteenNote 58
+//ID_059_DynamicDownload2 59
+//ID_060_PDTCh_RXTX_WaveTable16 60
+//ID_061_PDTCh_RXTX_WaveTable32 61
+//ID_062_FCCh_SineWave 62
+//ID_063_WaveTable_EightNote 63
+//ID_064_PDTCh_RXTX_WaveTable8 64
+//ID_065_Huffman_Decoder 65
+//ID_066_DAF_Decoder 66
+//ID_067_SDCCh_New 67
+//ID_068_AAC_Huffman_Decoder 68
+//ID_069_AAC_Decoder 69
+//ID_070_WB_AMR_660 70
+//ID_071_WB_AMR_885 71
+//ID_072_WB_AMR_1265 72
+//ID_073_WB_AMR_1425 73
+//ID_074_WB_AMR_1585 74
+//ID_075_WB_AMR_1825 75
+//ID_076_WB_AMR_1985 76
+//ID_077_WB_AMR_2305 77
+//ID_078_WB_AMR_2385 78
+//ID_079_SDCCh_New2 79
+//ID_080_PDTCh_RXTX_AAC_Decoder 80
+//ID_081_PDTCh_RXTX_RXTX_WBAMR2385 81
+ID_082_TChFS_dtx_8_77_facch_8_13_52_56_60_New 82
+//ID_083_TChFS_Speech_New 83
+
+//ID_084_ADC_Linearity 84
+//ID_085_AFC_Linearity 85
+//ID_086_GPRS_APC 86
+//ID_087_GPRS_RepeatRACh 87
+
+ID_088_SDCCh_A53 88
+ID_089_SDCCh_NBFilter 89
+ID_090_SDCCh_WBFilter 90
+ID_091_E5_FCCh_SDCCh 91
+ID_092_E6_FCCh_SCh 92
+
+ID_093_TX_PDTCh_MCS1_P1 93
+ID_094_TX_PDTCh_MCS1_P2 94
+ID_095_TX_PDTCh_MCS2_P1 95
+ID_096_TX_PDTCh_MCS2_P2 96
+ID_097_TX_PDTCh_MCS3_P1 97
+ID_098_TX_PDTCh_MCS3_P2 98
+ID_099_TX_PDTCh_MCS3_P3 99
+ID_100_TX_PDTCh_MCS4_P1 100
+ID_101_TX_PDTCh_MCS4_P2 101
+ID_102_TX_PDTCh_MCS4_P3 102
+ID_103_TX_PDTCh_MCS5_P1 103
+ID_104_TX_PDTCh_MCS5_P2 104
+ID_105_TX_PDTCh_MCS6_P1 105
+ID_106_TX_PDTCh_MCS6_P2 106
+ID_107_TX_PDTCh_MCS7_P1 107
+ID_108_TX_PDTCh_MCS7_P2 108
+ID_109_TX_PDTCh_MCS7_P3 109
+ID_110_TX_PDTCh_MCS8_P1 110
+ID_111_TX_PDTCh_MCS8_P2 111
+ID_112_TX_PDTCh_MCS8_P3 112
+ID_113_TX_PDTCh_MCS9_P1 113
+ID_114_TX_PDTCh_MCS9_P2 114
+ID_115_TX_PDTCh_MCS9_P3 115
+ID_116_TX_PDTCh_MCS1_9_P1_3 116
+
+ID_117_RX_PDTCh_MCS1_P1 117
+ID_118_RX_PDTCh_MCS1_P2 118
+ID_119_RX_PDTCh_MCS2_P1 119
+ID_120_RX_PDTCh_MCS2_P2 120
+ID_121_RX_PDTCh_MCS3_P1 121
+ID_122_RX_PDTCh_MCS3_P2 122
+ID_123_RX_PDTCh_MCS3_P3 123
+ID_124_RX_PDTCh_MCS4_P1 124
+ID_125_RX_PDTCh_MCS4_P2 125
+ID_126_RX_PDTCh_MCS4_P3 126
+ID_127_RX_PDTCh_MCS5_P1 127
+ID_128_RX_PDTCh_MCS5_P2 128
+ID_129_RX_PDTCh_MCS6_P1 129
+ID_130_RX_PDTCh_MCS6_P2 130
+ID_131_RX_PDTCh_MCS7_P1 131
+ID_132_RX_PDTCh_MCS7_P2 132
+ID_133_RX_PDTCh_MCS7_P3 133
+ID_134_RX_PDTCh_MCS8_P1 134
+ID_135_RX_PDTCh_MCS8_P2 135
+ID_136_RX_PDTCh_MCS8_P3 136
+ID_137_RX_PDTCh_MCS9_P1 137
+ID_138_RX_PDTCh_MCS9_P2 138
+ID_139_RX_PDTCh_MCS9_P3 139
+ID_140_RX_PDTCh_MCS1_9_P1_3 140
+
+ID_141_IR_PDTCh_MCS1_IR 141
+ID_142_IR_PDTCh_MCS2_IR 142
+ID_143_IR_PDTCh_MCS3_IR 143
+ID_144_IR_PDTCh_MCS4_IR 144
+ID_145_IR_PDTCh_MCS5_IR 145
+ID_146_IR_PDTCh_MCS6_IR 146
+ID_147_IR_PDTCh_MCS7_IR 147
+ID_148_IR_PDTCh_MCS8_IR 148
+ID_149_IR_PDTCh_MCS9_IR 149
+
+ID_150_IR_PDTCh_MCS1_4_IR 150
+ID_151_IR_PDTCh_MCS1_4_IR2 151
+ID_152_IR_PDTCh_MCS3_3_9_IR 152
+ID_153_IR_PDTCh_MCS3_3_9_IR2 153
+ID_154_IR_PDTCh_MCS9_9_3_IR 154
+ID_155_IR_PDTCh_MCS9_9_3_IR2 155
+ID_156_IR_PDTCh_MCS3_6_9_IR 156
+ID_157_IR_PDTCh_MCS3_6_9_IR2 157
+ID_158_IR_PDTCh_MCS3_6_9_IR3 158
+ID_159_IR_PDTCh_MCS3_6_9_IR4 159
+ID_160_IR_PDTCh_MCS3_6_8_IR 160
+ID_161_IR_PDTCh_MCS3_6_8_IR2 161
+ID_162_IR_PDTCh_MCS3_6_8_IR3 162
+ID_163_IR_PDTCh_MCS3_6_8_IR4 163
+ID_164_IR_PDTCh_MCS2_5_7_IR 164
+ID_165_IR_PDTCh_MCS2_5_7_IR2 165
+ID_166_IR_PDTCh_MCS2_5_7_IR3 166
+ID_167_IR_PDTCh_MCS2_5_7_IR4 167
+ID_168_IR_PDTCh_MCS3_7_9_IR 168
+ID_169_IR_PDTCh_MCS3_7_3_8_IR 169
+ID_170_SRB_4R1T_EGPRS 170
+
+ID_171_E1_FCCh 171
+ID_172_E2_FCCh 172
+ID_173_E3_FCCh 173
+//ID_174_E4_FCCh 174
+ID_175_TChAFS_INB 175
+ID_176_TChAHS_INB 176
+//ID_177_AMR_EQ_CI 177
+ID_178_TChAFS1220_dtx_8_26_facch_4_8_ratscch_13 178
+ID_179_TChAHS795_dtx_4_12_17_26_ratscch_8 179
+ID_180_TChAFS1220_dtx_4_21_facch_13_sidupdate_21 180
+ID_181_TChAHS795_dtx_4_ratscch_21_sidupdate_26_34 181
+//ID_182_Post_Process_TS 182
+//ID_183_Post_Process_3D 183
+//ID_184_Via_ROM_Power_Down 184
+//ID_185_AAC_PLUS_Huffman_Decoder 185
+//ID_186_INTX_EQ_BYPASS 186
+//ID_187_INTX2_EQ 187
+//ID_188_INTX4_EQ 188
+//ID_189_EQ_test 189
+
+ID_190_IR_PDTCh_same_BSN 190
+ID_191_IR_PDTCh_diff_BSN 191
+ID_192_IR_PDTCh_MCS7_5_2_2_IR 192
+ID_193_IR_PDTCh_MCS8_6_3_3_IR 193
+ID_194_IR_PDTCh_MCS9_6_3_3_IR 194
+ID_195_RX_IGAIN 195
+ID_196_E7_FCCh_tcvcxo 196
+ID_197_E8_FCCh_SDCCh_tcvcxo 197
+ID_170_SRB_4R1T_EGPRS 170
+ID_198_SRB_3R2T_EGPRS 198
+ID_199_SRB_2R3T_EGPRS 199
+ID_200_SRB_1R4T_EGPRS 200
+ID_201_E9_FCCh_SineWave 201
+//ID_202_IR_PDTCh_MCS3_6_9_IR4_JPEG_CODEC 202
+//ID_203_IR_PDTCh_MCS3_6_9_IR4_VDO_PHONE 203
+ID_204_IR_PDTCh_MCS3_6_9_IR4_WT 204
+ID_205_IR_PDTCh_MCS6_HIGH_BSN0_IR 205
+ID_206_IR_PDTCh_MCS6_HIGH_BSN1_IR 206
+ID_207_CTM 207
+ID_208_TChHS0_dtx_8_26_52_77_facch_0_to_86 208
+
+//ID_209_TChFS_Speech_CNTR 209
+//ID_210_TChFS_Speech_CNTR_BT_COMP 210
+//ID_211_TChFS_Speech_CNTR_BT 211
+ID_212_FastPCh 212
+ID_213_IR_PDTCh_MCS9_IR_NoTFI_CD 213
+ID_214_IR_PDTCh_MCS9_IR_NoTFI_NoCD 214
+
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp5.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp5.l1v
new file mode 100755
index 0000000..474cfe7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp5.l1v
@@ -0,0 +1,292 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 5"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+ID_001_SCh 1
+ID_002_SDCCh 2
+ID_003_SDCCh_A51 3
+ID_004_SDCCh_A52 4
+ID_005_TChFS_dtx_8_77_facch_8_13_52_56_60 5
+ID_006_TChEFS_dtx_8_77_facch_8_13_52_56_60 6
+ID_007_TChHS0_dtx_8_77_facch_8_52_60 7
+ID_008_TChCSD_144F_dtx_8_77_facch_8_13_52_56_60 8
+ID_009_TChCSD_24HS0_dtx_8_77_facch_8_52_60 9
+ID_010_TChCSD_48F_dtx_8_77_facch_8_13_56_60 10
+ID_011_TChCSD_48HS1_dtx_8_77_facch_52_60 11
+ID_012_TChCSD_96F_dtx_8_77_facch_8_13_52_56_60 12
+ID_013_TChCSD_24F_dtx_8_77_facch_8_13_52_56_60 13
+ID_014_TChFS_Speech 14
+ID_015_TChEFS_Speech 15
+ID_016_TChHS0_Speech 16
+ID_017_TChHS1_Speech 17
+//ID_018_DynamicPatch 18
+//ID_019_FCCh 19
+ID_020_TChAFS1220_regular 20
+ID_021_TChAFS1020_regular 21
+ID_022_TChAFS795_regular 22
+ID_023_TChAFS740_regular 23
+ID_024_TChAFS670_regular 24
+ID_025_TChAFS590_regular 25
+ID_026_TChAFS515_regular 26
+ID_027_TChAFS475_regular 27
+ID_028_TChAHS795_regular 28
+ID_029_TChAHS740_regular 29
+ID_030_TChAHS670_regular 30
+ID_031_TChAHS590_regular 31
+ID_032_TChAHS515_regular 32
+ID_033_TChAHS475_regular 33
+ID_034_PDTCh_RXTX 34
+ID_035_PBCCh 35
+ID_036_TChAFS1220_dtx_8_26_facch_8_ratscch_13 36
+ID_037_TChAHS795_dtx_4_26_ratscch_8 37
+ID_038_TChAFS1220_dtx_8_16_21_24_sidupdate_17 38
+ID_039_TChAHS795_dtx_4_sidupdate_26_34 39
+//ID_040_TChAFS1220_Speech 40
+//ID_041_TChAFS1020_Speech 41
+//ID_042_TChAFS795_Speech 42
+//ID_043_TChAFS740_Speech 43
+//ID_044_TChAFS670_Speech 44
+//ID_045_TChAFS590_Speech 45
+//ID_046_TChAFS515_Speech 46
+//ID_047_TChAFS475_Speech 47
+//ID_048_TChAFS1220_Speech_dtx 48
+//ID_049_TChAFS1020_Speech_dtx 49
+//ID_050_TChAFS795_Speech_dtx 50
+//ID_051_TChAFS740_Speech_dtx 51
+//ID_052_TChAFS670_Speech_dtx 52
+//ID_053_TChAFS590_Speech_dtx 53
+//ID_054_TChAFS515_Speech_dtx 54
+//ID_055_TChAFS475_Speech_dtx 55
+//ID_056_WaveTable_OneNote 56
+//ID_057_DynamicDownload 57
+//ID_058_WaveTable_SixteenNote 58
+//ID_059_DynamicDownload2 59
+//ID_060_PDTCh_RXTX_WaveTable16 60
+//ID_061_PDTCh_RXTX_WaveTable32 61
+//ID_062_FCCh_SineWave 62
+ID_063_WaveTable_EightNote 63
+ID_064_PDTCh_RXTX_WaveTable8 64
+//ID_065_Huffman_Decoder 65
+//ID_066_DAF_Decoder 66
+//ID_067_SDCCh_New 67
+//ID_068_AAC_Huffman_Decoder 68
+ID_069_AAC_Decoder 69
+//ID_070_WB_AMR_660 70
+//ID_071_WB_AMR_885 71
+//ID_072_WB_AMR_1265 72
+//ID_073_WB_AMR_1425 73
+//ID_074_WB_AMR_1585 74
+//ID_075_WB_AMR_1825 75
+//ID_076_WB_AMR_1985 76
+//ID_077_WB_AMR_2305 77
+//ID_078_WB_AMR_2385 78
+//ID_079_SDCCh_New2 79
+ID_080_PDTCh_RXTX_AAC_Decoder 80
+//ID_081_PDTCh_RXTX_RXTX_WBAMR2385 81
+ID_082_TChFS_dtx_8_77_facch_8_13_52_56_60_New 82
+ID_083_TChFS_Speech_New 83
+
+//ID_084_ADC_Linearity 84
+//ID_085_AFC_Linearity 85
+//ID_086_GPRS_APC 86
+//ID_087_GPRS_RepeatRACh 87
+
+ID_088_SDCCh_A53 88
+ID_089_SDCCh_NBFilter 89
+ID_090_SDCCh_WBFilter 90
+ID_091_E5_FCCh_SDCCh 91
+ID_092_E6_FCCh_SCh 92
+
+ID_093_TX_PDTCh_MCS1_P1 93
+ID_094_TX_PDTCh_MCS1_P2 94
+ID_095_TX_PDTCh_MCS2_P1 95
+ID_096_TX_PDTCh_MCS2_P2 96
+ID_097_TX_PDTCh_MCS3_P1 97
+ID_098_TX_PDTCh_MCS3_P2 98
+ID_099_TX_PDTCh_MCS3_P3 99
+ID_100_TX_PDTCh_MCS4_P1 100
+ID_101_TX_PDTCh_MCS4_P2 101
+ID_102_TX_PDTCh_MCS4_P3 102
+ID_103_TX_PDTCh_MCS5_P1 103
+ID_104_TX_PDTCh_MCS5_P2 104
+ID_105_TX_PDTCh_MCS6_P1 105
+ID_106_TX_PDTCh_MCS6_P2 106
+ID_107_TX_PDTCh_MCS7_P1 107
+ID_108_TX_PDTCh_MCS7_P2 108
+ID_109_TX_PDTCh_MCS7_P3 109
+ID_110_TX_PDTCh_MCS8_P1 110
+ID_111_TX_PDTCh_MCS8_P2 111
+ID_112_TX_PDTCh_MCS8_P3 112
+ID_113_TX_PDTCh_MCS9_P1 113
+ID_114_TX_PDTCh_MCS9_P2 114
+ID_115_TX_PDTCh_MCS9_P3 115
+ID_116_TX_PDTCh_MCS1_9_P1_3 116
+
+ID_117_RX_PDTCh_MCS1_P1 117
+ID_118_RX_PDTCh_MCS1_P2 118
+ID_119_RX_PDTCh_MCS2_P1 119
+ID_120_RX_PDTCh_MCS2_P2 120
+ID_121_RX_PDTCh_MCS3_P1 121
+ID_122_RX_PDTCh_MCS3_P2 122
+ID_123_RX_PDTCh_MCS3_P3 123
+ID_124_RX_PDTCh_MCS4_P1 124
+ID_125_RX_PDTCh_MCS4_P2 125
+ID_126_RX_PDTCh_MCS4_P3 126
+ID_127_RX_PDTCh_MCS5_P1 127
+ID_128_RX_PDTCh_MCS5_P2 128
+ID_129_RX_PDTCh_MCS6_P1 129
+ID_130_RX_PDTCh_MCS6_P2 130
+ID_131_RX_PDTCh_MCS7_P1 131
+ID_132_RX_PDTCh_MCS7_P2 132
+ID_133_RX_PDTCh_MCS7_P3 133
+ID_134_RX_PDTCh_MCS8_P1 134
+ID_135_RX_PDTCh_MCS8_P2 135
+ID_136_RX_PDTCh_MCS8_P3 136
+ID_137_RX_PDTCh_MCS9_P1 137
+ID_138_RX_PDTCh_MCS9_P2 138
+ID_139_RX_PDTCh_MCS9_P3 139
+ID_140_RX_PDTCh_MCS1_9_P1_3 140
+
+ID_141_IR_PDTCh_MCS1_IR 141
+ID_142_IR_PDTCh_MCS2_IR 142
+ID_143_IR_PDTCh_MCS3_IR 143
+ID_144_IR_PDTCh_MCS4_IR 144
+ID_145_IR_PDTCh_MCS5_IR 145
+ID_146_IR_PDTCh_MCS6_IR 146
+ID_147_IR_PDTCh_MCS7_IR 147
+ID_148_IR_PDTCh_MCS8_IR 148
+ID_149_IR_PDTCh_MCS9_IR 149
+
+ID_150_IR_PDTCh_MCS1_4_IR 150
+ID_151_IR_PDTCh_MCS1_4_IR2 151
+ID_152_IR_PDTCh_MCS3_3_9_IR 152
+ID_153_IR_PDTCh_MCS3_3_9_IR2 153
+ID_154_IR_PDTCh_MCS9_9_3_IR 154
+ID_155_IR_PDTCh_MCS9_9_3_IR2 155
+ID_156_IR_PDTCh_MCS3_6_9_IR 156
+ID_157_IR_PDTCh_MCS3_6_9_IR2 157
+ID_158_IR_PDTCh_MCS3_6_9_IR3 158
+ID_159_IR_PDTCh_MCS3_6_9_IR4 159
+ID_160_IR_PDTCh_MCS3_6_8_IR 160
+ID_161_IR_PDTCh_MCS3_6_8_IR2 161
+ID_162_IR_PDTCh_MCS3_6_8_IR3 162
+ID_163_IR_PDTCh_MCS3_6_8_IR4 163
+ID_164_IR_PDTCh_MCS2_5_7_IR 164
+ID_165_IR_PDTCh_MCS2_5_7_IR2 165
+ID_166_IR_PDTCh_MCS2_5_7_IR3 166
+ID_167_IR_PDTCh_MCS2_5_7_IR4 167
+ID_168_IR_PDTCh_MCS3_7_9_IR 168
+ID_169_IR_PDTCh_MCS3_7_3_8_IR 169
+ID_170_SRB_4R1T_EGPRS 170
+
+ID_171_E1_FCCh 171
+ID_172_E2_FCCh 172
+ID_173_E3_FCCh 173
+//ID_174_E4_FCCh 174
+ID_175_TChAFS_INB 175
+ID_176_TChAHS_INB 176
+//ID_177_AMR_EQ_CI 177
+ID_178_TChAFS1220_dtx_8_26_facch_4_8_ratscch_13 178
+ID_179_TChAHS795_dtx_4_12_17_26_ratscch_8 179
+ID_180_TChAFS1220_dtx_4_21_facch_13_sidupdate_21 180
+ID_181_TChAHS795_dtx_4_ratscch_21_sidupdate_26_34 181
+//ID_182_Post_Process_TS 182
+//ID_183_Post_Process_3D 183
+//ID_184_Via_ROM_Power_Down 184
+//ID_185_AAC_PLUS_Huffman_Decoder 185
+//ID_186_INTX_EQ_BYPASS 186
+//ID_187_INTX2_EQ 187
+//ID_188_INTX4_EQ 188
+//ID_189_EQ_test 189
+
+ID_190_IR_PDTCh_same_BSN 190
+ID_191_IR_PDTCh_diff_BSN 191
+ID_192_IR_PDTCh_MCS7_5_2_2_IR 192
+ID_193_IR_PDTCh_MCS8_6_3_3_IR 193
+ID_194_IR_PDTCh_MCS9_6_3_3_IR 194
+ID_195_RX_IGAIN 195
+ID_196_E7_FCCh_tcvcxo 196
+ID_197_E8_FCCh_SDCCh_tcvcxo 197
+ID_198_SRB_3R2T_EGPRS 198
+ID_199_SRB_2R3T_EGPRS 199
+ID_200_SRB_1R4T_EGPRS 200
+ID_201_E9_FCCh_SineWave 201
+//ID_202_IR_PDTCh_MCS3_6_9_IR4_JPEG_CODEC 202
+//ID_203_IR_PDTCh_MCS3_6_9_IR4_VDO_PHONE 203
+ID_204_IR_PDTCh_MCS3_6_9_IR4_WT 204
+ID_205_IR_PDTCh_MCS6_HIGH_BSN0_IR 205
+ID_206_IR_PDTCh_MCS6_HIGH_BSN1_IR 206
+ID_207_CTM 207
+ID_208_TChHS0_dtx_8_26_52_77_facch_0_to_86 208
+
+//ID_209_TChFS_Speech_CNTR 209
+//ID_210_TChFS_Speech_CNTR_BT_COMP 210
+//ID_211_TChFS_Speech_CNTR_BT 211
+ID_212_FastPCh 212
+ID_213_IR_PDTCh_MCS9_IR_NoTFI_CD 213
+ID_214_IR_PDTCh_MCS9_IR_NoTFI_NoCD 214
+
+ID_215_TChAHS590_dtx_4_15_sidupdateINH 215
+ID_216_PDTCh_CS4_CRC_Correction 216
+ID_217_PDTCh_CS4_CRC_Correction_Fail 217
+ID_218_PDTCh_RXTX_SAIC_dynamic 218
+ID_219_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_dynamic 219
+ID_220_PDTCh_AMR1120_AudioDAC 220
+//ID_221_E10_FCCh_SCh_stage3 221
+ID_222_PDTCh_PM 222
+//ID_223_E11_FCCh_SCh_stage3_DCM 223
+//ID_224_P7_INTX2_DSP_EQ 224
+//ID_225_P8_INTX4_DSP_EQ 225
+ID_226_PBCCh_FireCode_Correction_ON 226
+//ID_227_PBCCh_FireCode_Correction_OFF 227
+
+ID_228_AAC_PLUS_Decoder 228
+ID_229_TChFS_Speech_AFE 229
+ID_230_PDTCh_MCS1_9_P1_3_RX_SAIC_off 230
+ID_231_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_off 231
+ID_232_AGCSRC_4k_Speech 232
+ID_233_AGCSRC_8k_Speech 233
+//ID_234_ENHANCED_TURBO_SLEEP_MODE 234
+ID_235_PDTCh_MCS1_9_P1_3_RX_SAIC_dynamic 235
+ID_236_OneBurstPCh 236
+//ID_237_PDTCH_BFE_FIR_NB 237
+//ID_238_PDTCH_BFE_FIR_WB 238
+
+ID_239_SDCCh_A53_DSP 239
+//ID_240_TChFS_Speech_CNTR_BT_COMP_Gain 240
+//ID_241_TChFS_Speech_CNTR_BT_Gain 241
+//ID_242_TChFS_Speech_CNTR_BT_COMP_SgnExt 242
+//ID_243_TChFS_Speech_CNTR_BT_SgnExt 243
+//ID_244_TChFS_Speech_AFE_FltOff 244
+//ID_245_TChFS_Speech_AFE_20msBlk 245
+//ID_246_TChFS_Speech_AFE_20msBlk_FltOff 246
+//ID_247_ENHANCED_TURBO_SLEEP_MODE_EINT 247
+//ID_248_OneBurstPCh_7PM 248
+ID_249_Divider_Test 249
+
+//ID_250_IR19_Bus_Concurrent 250
+//ID_251_PDTCh_1R_PM_DSP2MCU_Interrupt 251
+//ID_252_Enhanced_Turbo_Sleep_Mode_65NM_PDN 252
+//ID_253_IRDGB_for_65NM_PDN 253
+//ID_254_UL_DL_SRC_and_DAGC_8k_mode_WB 254
+//ID_255_TDMA_Wrap_Count_Test 255
+ID_256_TChFS_dtx_8_77_facch_8_13_52_56_60_HybridSAIC 256
+ID_257_TCh_HS0_DTX_8_77_mode_with_3_FACCH_8_52_60_BFIPATCH 257
+
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp5_23.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp5_23.l1v
new file mode 100755
index 0000000..854d724
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp5_23.l1v
@@ -0,0 +1,283 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 5 (23)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+ID_001_SCh 1
+ID_002_SDCCh 2
+ID_003_SDCCh_A51 3
+ID_004_SDCCh_A52 4
+ID_005_TChFS_dtx_8_77_facch_8_13_52_56_60 5
+ID_006_TChEFS_dtx_8_77_facch_8_13_52_56_60 6
+ID_007_TChHS0_dtx_8_77_facch_8_52_60 7
+ID_008_TChCSD_144F_dtx_8_77_facch_8_13_52_56_60 8
+ID_009_TChCSD_24HS0_dtx_8_77_facch_8_52_60 9
+ID_010_TChCSD_48F_dtx_8_77_facch_8_13_56_60 10
+ID_011_TChCSD_48HS1_dtx_8_77_facch_52_60 11
+ID_012_TChCSD_96F_dtx_8_77_facch_8_13_52_56_60 12
+ID_013_TChCSD_24F_dtx_8_77_facch_8_13_52_56_60 13
+ID_014_TChFS_Speech 14
+ID_015_TChEFS_Speech 15
+ID_016_TChHS0_Speech 16
+ID_017_TChHS1_Speech 17
+//ID_018_DynamicPatch 18
+//ID_019_FCCh 19
+ID_020_TChAFS1220_regular 20
+ID_021_TChAFS1020_regular 21
+ID_022_TChAFS795_regular 22
+ID_023_TChAFS740_regular 23
+ID_024_TChAFS670_regular 24
+ID_025_TChAFS590_regular 25
+ID_026_TChAFS515_regular 26
+ID_027_TChAFS475_regular 27
+ID_028_TChAHS795_regular 28
+ID_029_TChAHS740_regular 29
+ID_030_TChAHS670_regular 30
+ID_031_TChAHS590_regular 31
+ID_032_TChAHS515_regular 32
+ID_033_TChAHS475_regular 33
+ID_034_PDTCh_RXTX 34
+ID_035_PBCCh 35
+ID_036_TChAFS1220_dtx_8_26_facch_8_ratscch_13 36
+ID_037_TChAHS795_dtx_4_26_ratscch_8 37
+ID_038_TChAFS1220_dtx_8_16_21_24_sidupdate_17 38
+ID_039_TChAHS795_dtx_4_sidupdate_26_34 39
+//ID_040_TChAFS1220_Speech 40
+//ID_041_TChAFS1020_Speech 41
+//ID_042_TChAFS795_Speech 42
+//ID_043_TChAFS740_Speech 43
+//ID_044_TChAFS670_Speech 44
+//ID_045_TChAFS590_Speech 45
+//ID_046_TChAFS515_Speech 46
+//ID_047_TChAFS475_Speech 47
+//ID_048_TChAFS1220_Speech_dtx 48
+//ID_049_TChAFS1020_Speech_dtx 49
+//ID_050_TChAFS795_Speech_dtx 50
+//ID_051_TChAFS740_Speech_dtx 51
+//ID_052_TChAFS670_Speech_dtx 52
+//ID_053_TChAFS590_Speech_dtx 53
+//ID_054_TChAFS515_Speech_dtx 54
+//ID_055_TChAFS475_Speech_dtx 55
+//ID_056_WaveTable_OneNote 56
+//ID_057_DynamicDownload 57
+//ID_058_WaveTable_SixteenNote 58
+//ID_059_DynamicDownload2 59
+//ID_060_PDTCh_RXTX_WaveTable16 60
+//ID_061_PDTCh_RXTX_WaveTable32 61
+//ID_062_FCCh_SineWave 62
+//ID_063_WaveTable_EightNote 63
+//ID_064_PDTCh_RXTX_WaveTable8 64
+//ID_065_Huffman_Decoder 65
+//ID_066_DAF_Decoder 66
+//ID_067_SDCCh_New 67
+//ID_068_AAC_Huffman_Decoder 68
+//ID_069_AAC_Decoder 69
+//ID_070_WB_AMR_660 70
+//ID_071_WB_AMR_885 71
+//ID_072_WB_AMR_1265 72
+//ID_073_WB_AMR_1425 73
+//ID_074_WB_AMR_1585 74
+//ID_075_WB_AMR_1825 75
+//ID_076_WB_AMR_1985 76
+//ID_077_WB_AMR_2305 77
+//ID_078_WB_AMR_2385 78
+//ID_079_SDCCh_New2 79
+//ID_080_PDTCh_RXTX_AAC_Decoder 80
+//ID_081_PDTCh_RXTX_RXTX_WBAMR2385 81
+ID_082_TChFS_dtx_8_77_facch_8_13_52_56_60_New 82
+//ID_083_TChFS_Speech_New 83
+
+//ID_084_ADC_Linearity 84
+//ID_085_AFC_Linearity 85
+//ID_086_GPRS_APC 86
+//ID_087_GPRS_RepeatRACh 87
+
+ID_088_SDCCh_A53 88
+ID_089_SDCCh_NBFilter 89
+ID_090_SDCCh_WBFilter 90
+ID_091_E5_FCCh_SDCCh 91
+ID_092_E6_FCCh_SCh 92
+
+//ID_093_TX_PDTCh_MCS1_P1 93
+//ID_094_TX_PDTCh_MCS1_P2 94
+//ID_095_TX_PDTCh_MCS2_P1 95
+//ID_096_TX_PDTCh_MCS2_P2 96
+//ID_097_TX_PDTCh_MCS3_P1 97
+//ID_098_TX_PDTCh_MCS3_P2 98
+//ID_099_TX_PDTCh_MCS3_P3 99
+//ID_100_TX_PDTCh_MCS4_P1 100
+//ID_101_TX_PDTCh_MCS4_P2 101
+//ID_102_TX_PDTCh_MCS4_P3 102
+//ID_103_TX_PDTCh_MCS5_P1 103
+//ID_104_TX_PDTCh_MCS5_P2 104
+//ID_105_TX_PDTCh_MCS6_P1 105
+//ID_106_TX_PDTCh_MCS6_P2 106
+//ID_107_TX_PDTCh_MCS7_P1 107
+//ID_108_TX_PDTCh_MCS7_P2 108
+//ID_109_TX_PDTCh_MCS7_P3 109
+//ID_110_TX_PDTCh_MCS8_P1 110
+//ID_111_TX_PDTCh_MCS8_P2 111
+//ID_112_TX_PDTCh_MCS8_P3 112
+//ID_113_TX_PDTCh_MCS9_P1 113
+//ID_114_TX_PDTCh_MCS9_P2 114
+//ID_115_TX_PDTCh_MCS9_P3 115
+//ID_116_TX_PDTCh_MCS1_9_P1_3 116
+
+//ID_117_RX_PDTCh_MCS1_P1 117
+//ID_118_RX_PDTCh_MCS1_P2 118
+//ID_119_RX_PDTCh_MCS2_P1 119
+//ID_120_RX_PDTCh_MCS2_P2 120
+//ID_121_RX_PDTCh_MCS3_P1 121
+//ID_122_RX_PDTCh_MCS3_P2 122
+//ID_123_RX_PDTCh_MCS3_P3 123
+//ID_124_RX_PDTCh_MCS4_P1 124
+//ID_125_RX_PDTCh_MCS4_P2 125
+//ID_126_RX_PDTCh_MCS4_P3 126
+//ID_127_RX_PDTCh_MCS5_P1 127
+//ID_128_RX_PDTCh_MCS5_P2 128
+//ID_129_RX_PDTCh_MCS6_P1 129
+//ID_130_RX_PDTCh_MCS6_P2 130
+//ID_131_RX_PDTCh_MCS7_P1 131
+//ID_132_RX_PDTCh_MCS7_P2 132
+//ID_133_RX_PDTCh_MCS7_P3 133
+//ID_134_RX_PDTCh_MCS8_P1 134
+//ID_135_RX_PDTCh_MCS8_P2 135
+//ID_136_RX_PDTCh_MCS8_P3 136
+//ID_137_RX_PDTCh_MCS9_P1 137
+//ID_138_RX_PDTCh_MCS9_P2 138
+//ID_139_RX_PDTCh_MCS9_P3 139
+//ID_140_RX_PDTCh_MCS1_9_P1_3 140
+
+//ID_141_IR_PDTCh_MCS1_IR 141
+//ID_142_IR_PDTCh_MCS2_IR 142
+//ID_143_IR_PDTCh_MCS3_IR 143
+//ID_144_IR_PDTCh_MCS4_IR 144
+//ID_145_IR_PDTCh_MCS5_IR 145
+//ID_146_IR_PDTCh_MCS6_IR 146
+//ID_147_IR_PDTCh_MCS7_IR 147
+//ID_148_IR_PDTCh_MCS8_IR 148
+//ID_149_IR_PDTCh_MCS9_IR 149
+
+//ID_150_IR_PDTCh_MCS1_4_IR 150
+//ID_151_IR_PDTCh_MCS1_4_IR2 151
+//ID_152_IR_PDTCh_MCS3_3_9_IR 152
+//ID_153_IR_PDTCh_MCS3_3_9_IR2 153
+//ID_154_IR_PDTCh_MCS9_9_3_IR 154
+//ID_155_IR_PDTCh_MCS9_9_3_IR2 155
+//ID_156_IR_PDTCh_MCS3_6_9_IR 156
+//ID_157_IR_PDTCh_MCS3_6_9_IR2 157
+//ID_158_IR_PDTCh_MCS3_6_9_IR3 158
+//ID_159_IR_PDTCh_MCS3_6_9_IR4 159
+//ID_160_IR_PDTCh_MCS3_6_8_IR 160
+//ID_161_IR_PDTCh_MCS3_6_8_IR2 161
+//ID_162_IR_PDTCh_MCS3_6_8_IR3 162
+//ID_163_IR_PDTCh_MCS3_6_8_IR4 163
+//ID_164_IR_PDTCh_MCS2_5_7_IR 164
+//ID_165_IR_PDTCh_MCS2_5_7_IR2 165
+//ID_166_IR_PDTCh_MCS2_5_7_IR3 166
+//ID_167_IR_PDTCh_MCS2_5_7_IR4 167
+//ID_168_IR_PDTCh_MCS3_7_9_IR 168
+//ID_169_IR_PDTCh_MCS3_7_3_8_IR 169
+//ID_170_SRB_4R1T_EGPRS 170
+
+ID_171_E1_FCCh 171
+ID_172_E2_FCCh 172
+ID_173_E3_FCCh 173
+//ID_174_E4_FCCh 174
+ID_175_TChAFS_INB 175
+ID_176_TChAHS_INB 176
+//ID_177_AMR_EQ_CI 177
+ID_178_TChAFS1220_dtx_8_26_facch_4_8_ratscch_13 178
+ID_179_TChAHS795_dtx_4_12_17_26_ratscch_8 179
+ID_180_TChAFS1220_dtx_4_21_facch_13_sidupdate_21 180
+ID_181_TChAHS795_dtx_4_ratscch_21_sidupdate_26_34 181
+//ID_182_Post_Process_TS 182
+//ID_183_Post_Process_3D 183
+//ID_184_Via_ROM_Power_Down 184
+//ID_185_AAC_PLUS_Huffman_Decoder 185
+//ID_186_INTX_EQ_BYPASS 186
+//ID_187_INTX2_EQ 187
+//ID_188_INTX4_EQ 188
+//ID_189_EQ_test 189
+
+//ID_190_IR_PDTCh_same_BSN 190
+//ID_191_IR_PDTCh_diff_BSN 191
+//ID_192_IR_PDTCh_MCS7_5_2_2_IR 192
+//ID_193_IR_PDTCh_MCS8_6_3_3_IR 193
+//ID_194_IR_PDTCh_MCS9_6_3_3_IR 194
+ID_195_RX_IGAIN 195
+ID_196_E7_FCCh_tcvcxo 196
+ID_197_E8_FCCh_SDCCh_tcvcxo 197
+//ID_198_SRB_3R2T_EGPRS 198
+//ID_199_SRB_2R3T_EGPRS 199
+//ID_200_SRB_1R4T_EGPRS 200
+ID_201_E9_FCCh_SineWave 201
+//ID_202_IR_PDTCh_MCS3_6_9_IR4_JPEG_CODEC 202
+//ID_203_IR_PDTCh_MCS3_6_9_IR4_VDO_PHONE 203
+//ID_204_IR_PDTCh_MCS3_6_9_IR4_WT 204
+//ID_205_IR_PDTCh_MCS6_HIGH_BSN0_IR 205
+//ID_206_IR_PDTCh_MCS6_HIGH_BSN1_IR 206
+ID_207_CTM 207
+ID_208_TChHS0_dtx_8_26_52_77_facch_0_to_86 208
+
+//ID_209_TChFS_Speech_CNTR 209
+//ID_210_TChFS_Speech_CNTR_BT_COMP 210
+//ID_211_TChFS_Speech_CNTR_BT 211
+ID_212_FastPCh 212
+//ID_213_IR_PDTCh_MCS9_IR_NoTFI_CD 213
+//ID_214_IR_PDTCh_MCS9_IR_NoTFI_NoCD 214
+
+ID_215_TChAHS590_dtx_4_15_sidupdateINH 215
+ID_216_PDTCh_CS4_CRC_Correction 216
+ID_217_PDTCh_CS4_CRC_Correction_Fail 217
+ID_218_PDTCh_RXTX_SAIC_dynamic 218
+ID_219_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_dynamic 219
+//ID_220_PDTCh_AMR1120_AudioDAC 220
+//ID_221_E10_FCCh_SCh_stage3 221
+ID_222_PDTCh_PM 222
+//ID_223_E11_FCCh_SCh_stage3_DCM 223
+//ID_224_P7_INTX2_DSP_EQ 224
+//ID_225_P8_INTX4_DSP_EQ 225
+ID_226_PBCCh_FireCode_Correction_ON 226
+//ID_227_PBCCh_FireCode_Correction_OFF 227
+
+//ID_228_AAC_PLUS_Decoder 228
+//ID_229_TChFS_Speech_AFE 229
+//ID_230_PDTCh_MCS1_9_P1_3_RX_SAIC_off 230
+//ID_231_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_off 231
+//ID_232_AGCSRC_4k_Speech 232
+//ID_233_AGCSRC_8k_Speech 233
+//ID_234_ENHANCED_TURBO_SLEEP_MODE 234
+//ID_235_PDTCh_MCS1_9_P1_3_RX_SAIC_dynamic 235
+//ID_236_OneBurstPCh 236
+//ID_237_PDTCH_BFE_FIR_NB 237
+//ID_238_PDTCH_BFE_FIR_WB 238
+
+//ID_239_SDCCh_A53_DSP 239
+//ID_240_TChFS_Speech_CNTR_BT_COMP_Gain 240
+//ID_241_TChFS_Speech_CNTR_BT_Gain 241
+//ID_242_TChFS_Speech_CNTR_BT_COMP_SgnExt 242
+//ID_243_TChFS_Speech_CNTR_BT_SgnExt 243
+//ID_244_TChFS_Speech_AFE_FltOff 244
+//ID_245_TChFS_Speech_AFE_20msBlk 245
+//ID_246_TChFS_Speech_AFE_20msBlk_FltOff 246
+//ID_247_ENHANCED_TURBO_SLEEP_MODE_EINT 247
+//ID_248_OneBurstPCh_7PM 248
+//ID_249_Divider_Test 249
+
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp6.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp6.l1v
new file mode 100755
index 0000000..4a49c8e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp6.l1v
@@ -0,0 +1,280 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 6"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+
+ID_001_SCh 1
+ID_002_SDCCh 2
+ID_003_SDCCh_A51 3
+ID_004_SDCCh_A52 4
+ID_005_SDCCh_A53 5
+ID_006_SDCCh_NBFilter 6
+ID_007_SDCCh_WBFilter 7
+ID_008_TChFS_dtx_8_77_facch_8_13_52_56_60 8
+ID_009_TChFS_dtx_8_77_facch_8_13_52_56_60_New 9
+ID_010_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_off 10
+ID_011_TChEFS_dtx_8_77_facch_8_13_52_56_60 11
+ID_012_TChHS0_dtx_8_77_facch_8_52_60 12
+ID_013_TChHS0_dtx_8_26_52_77_facch_0_to_86 13
+ID_014_TChCSD_144F_dtx_8_77_facch_8_13_52_56_60 14
+ID_015_TChCSD_24HS0_dtx_8_77_facch_8_52_60 15
+ID_016_TChCSD_48F_dtx_8_77_facch_8_13_56_60 16
+ID_017_TChCSD_48HS1_dtx_8_77_facch_52_60 17
+ID_018_TChCSD_96F_dtx_8_77_facch_8_13_52_56_60 18
+ID_019_TChCSD_24F_dtx_8_77_facch_8_13_52_56_60 19
+ID_020_PDTCh_RXTX 20
+ID_021_PBCCh 21
+ID_022_E5_FCCh_SDCCh 22
+ID_023_E6_FCCh_SCh 23
+ID_024_E1_FCCh 24
+ID_025_E2_FCCh 25
+ID_026_E3_FCCh 26
+ID_027_E7_IGAIN 27
+ID_028_E7_FCCh 28
+ID_029_E8_FCCh_SDCCh 29
+ID_030_E9_FCCh_SineWave 30
+ID_031_FastPCh 31
+ID_032_PDTCh_RX_SAIC_dynamic 32
+ID_033_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_dynamic 33
+ID_034_E10_FCCh_SCh_stage3 34
+ID_035_PDTCh_1R_PM 35
+ID_036_E11_FCCh_SCh_stage3_DCM 36
+ID_037_PBCCh_FireCode_Correction_ON 37
+ID_039_A15_OneBurstPCh 39
+ID_040_A16_OneBurstPCh_7PM 40
+ID_041_K11_PDTCh_PM_DSP2MCU_INT 41
+ID_042_TChFS_dtx_8_77_facch_8_13_52_56_60_HybridSAIC 42
+ID_043_TChHS0_dtx_8_77_facch_8_52_60_BFIPATCH 43
+ID_044_TChFS_RepeatedFACCH 44
+ID_045_TChHS0_RepeatedFACCH 45
+//ID_046_E11_FB_Sniffer_FCCh_Recursive_SCh 46
+ID_047_FWBW_DCOC 47
+ID_048_A17_OneBurstPCh_Empty 48
+ID_049_A19_8PM 49
+ID_050_A20_RACH 50
+ID_051_SDCCh_A53_NoTxCipher 51
+ID_052_K11_PDTCh_PM_DSP2MCU_INT_use_win6_win7 52
+
+ID_053_B11_TChFS_Speech 53
+ID_054_D8_TChHS0_Speech 54
+ID_055_C8_TChEFS_Speech 55
+ID_056_R48_TCHAFS1220_speech 56
+ID_057_R47_TCHWFS1265_speech 57
+ID_058_B11_TChFS_Speech_30s 58
+ID_059_R47_TCHWFS1265_speech_30s 59
+
+ID_060_TChAFS1220_regular 60
+ID_061_TChAFS1020_regular 61
+ID_062_TChAFS795_regular 62
+ID_063_TChAFS740_regular 63
+ID_064_TChAFS670_regular 64
+ID_065_TChAFS590_regular 65
+ID_066_TChAFS515_regular 66
+ID_067_TChAFS475_regular 67
+ID_068_TChAHS795_regular 68
+ID_069_TChAHS740_regular 69
+ID_070_TChAHS670_regular 70
+ID_071_TChAHS590_regular 71
+ID_072_TChAHS515_regular 72
+ID_073_TChAHS475_regular 73
+ID_074_TChAFS1220_dtx_8_26_facch_8_ratscch_13 74
+ID_075_TChAHS795_dtx_4_26_ratscch_8 75
+ID_076_TChAFS1220_dtx_8_16_21_24_sidupdate_17 76
+ID_077_TChAHS795_dtx_4_sidupdate_26_34 77
+ID_078_TChAFS_INB 78
+ID_079_TChAHS_INB 79
+ID_080_TChAFS1220_dtx_8_26_facch_4_8_ratscch_13 80
+ID_081_TChAHS795_dtx_4_12_17_26_ratscch_8 81
+ID_082_TChAFS1220_dtx_4_21_facch_13_sidupdate_21 82
+ID_083_TChAHS795_dtx_4_ratscch_21_sidupdate_26_34 83
+ID_084_TChAHS590_dtx_4_15_sidupdateINH 84
+ID_085_TCHAHS475_dtx_4_7_13_77 85
+ID_086_TCHAHS670_dtx_13_16_30_52_FACCH_0_17_43 86
+ID_087_TCHAHS795_dtx_13_16_30_52_RATSCCH_0_17_43 87
+ID_088_TCHAHS515_dtx_4_24_RATSCCH_13_FACCH_17 88
+ID_089_TCHAFS670_dtx_4_29_FACCH_8_43 89
+ID_090_TCHAFS740_dtx_4_29_RATSCCH_8_39_FACCH_39 90
+ID_091_TChWFS1265_regular 91
+ID_092_TChWFS885_regular 92
+ID_093_TChWFS660_regular 93
+ID_094_TChWFS1265_DTX_4_29_FACCH_8_43 94
+ID_095_TChWFS885_DTX_4_29_RATSCCH_8_43 95
+ID_096_TChWFS_660_DTX_4_7_21_52_RATSCCH_13_FACCH_43 96
+
+ID_102_PDTCh_MCS1_P1_TX 102
+ID_103_PDTCh_MCS1_P2_TX 103
+ID_104_PDTCh_MCS2_P1_TX 104
+ID_105_PDTCh_MCS2_P2_TX 105
+ID_106_PDTCh_MCS3_P1_TX 106
+ID_107_PDTCh_MCS3_P2_TX 107
+ID_108_PDTCh_MCS3_P3_TX 108
+ID_109_PDTCh_MCS4_P1_TX 109
+ID_110_PDTCh_MCS4_P2_TX 110
+ID_111_PDTCh_MCS4_P3_TX 111
+ID_112_PDTCh_MCS5_P1_TX 112
+ID_113_PDTCh_MCS5_P2_TX 113
+ID_114_PDTCh_MCS6_P1_TX 114
+ID_115_PDTCh_MCS6_P2_TX 115
+ID_116_PDTCh_MCS7_P1_TX 116
+ID_117_PDTCh_MCS7_P2_TX 117
+ID_118_PDTCh_MCS7_P3_TX 118
+ID_119_PDTCh_MCS8_P1_TX 119
+ID_120_PDTCh_MCS8_P2_TX 120
+ID_121_PDTCh_MCS8_P3_TX 121
+ID_122_PDTCh_MCS9_P1_TX 122
+ID_123_PDTCh_MCS9_P2_TX 123
+ID_124_PDTCh_MCS9_P3_TX 124
+ID_125_PDTCh_MCS1_9_P1_3_TX 125
+ID_126_PDTCh_MCS3_6_Padding_TX 126
+
+ID_131_PDTCh_MCS1_P1_RX 131
+ID_132_PDTCh_MCS1_P2_RX 132
+ID_133_PDTCh_MCS2_P1_RX 133
+ID_134_PDTCh_MCS2_P2_RX 134
+ID_135_PDTCh_MCS3_P1_RX 135
+ID_136_PDTCh_MCS3_P2_RX 136
+ID_137_PDTCh_MCS3_P3_RX 137
+ID_138_PDTCh_MCS4_P1_RX 138
+ID_139_PDTCh_MCS4_P2_RX 139
+ID_140_PDTCh_MCS4_P3_RX 140
+ID_141_PDTCh_MCS5_P1_RX 141
+ID_142_PDTCh_MCS5_P2_RX 142
+ID_143_PDTCh_MCS6_P1_RX 143
+ID_144_PDTCh_MCS6_P2_RX 144
+ID_145_PDTCh_MCS7_P1_RX 145
+ID_146_PDTCh_MCS7_P2_RX 146
+ID_147_PDTCh_MCS7_P3_RX 147
+ID_148_PDTCh_MCS8_P1_RX 148
+ID_149_PDTCh_MCS8_P2_RX 149
+ID_150_PDTCh_MCS8_P3_RX 150
+ID_151_PDTCh_MCS9_P1_RX 151
+ID_152_PDTCh_MCS9_P2_RX 152
+ID_153_PDTCh_MCS9_P3_RX 153
+ID_154_PDTCh_MCS1_9_P1_3_RX 154
+ID_155_PDTCh_MCS1_9_P1_3_RX_SAIC_off 155
+ID_156_PDTCh_MCS1_9_P1_3_RX_SAIC_dynamic 156
+ID_157_PDTCh_MCS1_9_P1_3_RX_MTBF 157
+
+ID_163_PDTCh_MCS1_IR 163
+ID_164_PDTCh_MCS2_IR 164
+ID_165_PDTCh_MCS3_IR 165
+ID_166_PDTCh_MCS4_IR 166
+ID_167_PDTCh_MCS5_IR 167
+ID_168_PDTCh_MCS6_IR 168
+ID_169_PDTCh_MCS7_IR 169
+ID_170_PDTCh_MCS8_IR 170
+ID_171_PDTCh_MCS9_IR 171
+ID_172_PDTCh_MCS1_4_IR 172
+ID_173_PDTCh_MCS1_4_IR2 173
+ID_174_PDTCh_MCS3_3_9_IR 174
+ID_175_PDTCh_MCS3_3_9_IR2 175
+ID_176_PDTCh_MCS9_9_3_IR 176
+ID_177_PDTCh_MCS9_9_3_IR2 177
+ID_178_PDTCh_MCS3_6_9_IR 178
+ID_179_PDTCh_MCS3_6_9_IR2 179
+ID_180_PDTCh_MCS3_6_9_IR3 180
+ID_181_PDTCh_MCS3_6_9_IR4 181
+ID_182_PDTCh_MCS3_6_8_IR 182
+ID_183_PDTCh_MCS3_6_8_IR2 183
+ID_184_PDTCh_MCS3_6_8_IR3 184
+ID_185_PDTCh_MCS3_6_8_IR4 185
+ID_186_PDTCh_MCS2_5_7_IR 186
+ID_187_PDTCh_MCS2_5_7_IR2 187
+ID_188_PDTCh_MCS2_5_7_IR3 188
+ID_189_PDTCh_MCS2_5_7_IR4 189
+ID_190_PDTCh_MCS3_7_9_IR 190
+ID_191_PDTCh_MCS3_7_3_8_IR 191
+ID_192_PDTCh_same_BSN_IR 192
+ID_193_PDTCh_diff_BSN_IR 193
+ID_194_PDTCh_MCS7_5_2_2_IR 194
+ID_195_PDTCh_MCS8_6_3_3_IR 195
+ID_196_PDTCh_MCS9_6_3_3_IR 196
+ID_197_PDTCh_MCS6_BSN0_IR 197
+ID_198_PDTCh_MCS6_BSN1_IR 198
+ID_199_PDTCh_MCS9_IR_NoTFI_CD 199
+ID_200_PDTCh_MCS9_IR_NoTFI_NoCD 200
+ID_201_PDTCh_MCS4_IR_long 201
+ID_202_PDTCh_MCS4_IR_PSHO_NoReset 202
+ID_203_PDTCh_MCS4_IR_PSHO_resetIR 203
+ID_204_PDTCh_MCS4_IR_PSHO_resume1 204
+ID_205_PDTCh_MCS4_IR_PSHO_resume2 205
+ID_206_PDTCh_MCS4_IR_PSHO_resume3 206
+ID_207_PDTCh_MCS4_IR_PSHO_resetVQ 207
+ID_208_PDTCh_MTBF_IR 208
+ID_209_PDTCh_MTBF_IR_RX 209
+
+ID_213_PDTCh_SRB_4R1T 213
+ID_214_PDTCh_SRB_3R2T 214
+ID_215_PDTCh_SRB_2R3T 215
+ID_216_PDTCh_SRB_1R4T 216
+
+//ID_220_PDTCh_BFE_FIR_NB 220
+//ID_221_PDTCh_BFE_FIR_WB 221
+ID_222_PDTCh_CS4_CRC_Correction 222
+ID_223_PDTCh_CS4_CRC_Correction_Fail 223
+
+ID_224_AudioSys_IRQ 224
+ID_225_AudioSys_MEMIF 225
+ID_226_AudioSys_SRCLoopback 226
+
+ID_227_SCh_Logger 227
+ID_228_FCCh_SCh_Logger 228
+ID_229_PDTCh_PM_Logger 229
+ID_230_8PM_Logger 230
+ID_231_PDTCh_MCS1_9_P1_3_RX_SAIC_Logger 231
+
+ID_233_AUXADC_TX_PM 233
+ID_234_Divider_Test 234
+//ID_235_PDTCh_RXTX_6R 235
+ID_236_PDTCh_TX_6T 236
+ID_237_FCChStop_SDCCh 237
+
+ID_241_PDTCh_CS1_TX_RTTI 241
+ID_242_PDTCh_CS1_RX_RTTI_RttiUsfMode 242
+ID_243_PDTCh_MCS1_9_P1_3_TX_RTTI 243
+ID_244_PDTCh_MCS1_9_P1_3_TX_RTTI_EO 244
+ID_245_PDTCh_MCS1_9_P1_3_RX_RTTI_RttiUsfMode 245
+ID_246_PDTCh_MCS1_9_P1_3_RX_RTTI_BttiUsfMode 246
+ID_247_PDTCh_MCS1_9_P1_3_RX_RTTI_BttiUsfMode_SWO 247
+ID_248_PDTCh_MCS1_9_P1_3_RX_RTTI_BttiUsfMode_MixedModulation 248
+ID_249_PDTCh_IR_RX_RTTI_BttiUsfMode 249
+
+ID_251_PDTCh_MCS1_9_P1_3_TX_FANR 251
+ID_252_PDTCh_MCS1_9_P1_3_RX_FANR 252
+ID_253_PDTCh_MCS1_9_P1_3_RX_FANR_UL_TBF 253
+ID_254_PDTCh_MCS1_9_P1_3_RX_FANR_TB 254
+
+ID_256_PDTCh_IR_RX_FANR_Family_A 256
+ID_257_PDTCh_IR_RX_FANR_Family_A_Padding 257
+ID_258_PDTCh_IR_RX_FANR_Family_B 258
+ID_259_PDTCh_IR_RX_FANR_Family_C 259
+
+ID_261_PDTCh_MCS1_9_P1_3_TX_RTTI_FANR 261
+ID_262_PDTCh_MCS1_9_P1_3_RX_RTTI_BttiUsfMode_FANR 262
+ID_263_PDTCh_MCS1_9_P1_3_RX_RTTI_RttiUsfMode_FANR 263
+
+ID_266_PDTCh_MCS1_9_P1_3_RX_FANR_PARTIAL 266
+ID_267_PDTCh_MCS1_9_P1_3_RX_MTBF_BttiUsfMode 267
+ID_268_PDTCh_MCS1_9_P1_3_RX_MTBF_RttiUsfMode 268
+ID_269_PDTCh_MCS1_9_P1_3_RX_MTBF_FANR_BttiUsfMode 269
+ID_270_PDTCh_MCS1_9_P1_3_RX_MTBF_FANR_RttiUsfMode 270
+ID_271_PDTCh_MCS1_9_P1_3_RX_MTBF_FANR_BttiUsfMode_FANR 271
+ID_272_PDTCh_MCS1_9_P1_3_RX_MTBF_FANR_RttiUsfMode_FANR 272
+
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp7.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp7.l1v
new file mode 100755
index 0000000..911be69
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp7.l1v
@@ -0,0 +1,331 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 7"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+ID_001_SCh 1
+ID_002_SDCCh 2
+ID_003_SDCCh_A51 3
+ID_004_SDCCh_A52 4
+ID_005_TChFS_dtx_8_77_facch_8_13_52_56_60 5
+ID_006_TChEFS_dtx_8_77_facch_8_13_52_56_60 6
+ID_007_TChHS0_dtx_8_77_facch_8_52_60 7
+ID_008_TChCSD_144F_dtx_8_77_facch_8_13_52_56_60 8
+ID_009_TChCSD_24HS0_dtx_8_77_facch_8_52_60 9
+ID_010_TChCSD_48F_dtx_8_77_facch_8_13_56_60 10
+ID_011_TChCSD_48HS1_dtx_8_77_facch_52_60 11
+ID_012_TChCSD_96F_dtx_8_77_facch_8_13_52_56_60 12
+ID_013_TChCSD_24F_dtx_8_77_facch_8_13_52_56_60 13
+ID_014_TChFS_Speech 14
+ID_015_TChEFS_Speech 15
+ID_016_TChHS0_Speech 16
+ID_017_TChHS1_Speech 17
+ID_018_DynamicPatch 18
+//ID_019_FCCh 19
+ID_020_TChAFS1220_regular 20
+ID_021_TChAFS1020_regular 21
+ID_022_TChAFS795_regular 22
+ID_023_TChAFS740_regular 23
+ID_024_TChAFS670_regular 24
+ID_025_TChAFS590_regular 25
+ID_026_TChAFS515_regular 26
+ID_027_TChAFS475_regular 27
+ID_028_TChAHS795_regular 28
+ID_029_TChAHS740_regular 29
+ID_030_TChAHS670_regular 30
+ID_031_TChAHS590_regular 31
+ID_032_TChAHS515_regular 32
+ID_033_TChAHS475_regular 33
+ID_034_PDTCh_RXTX 34
+ID_035_PBCCh 35
+ID_036_TChAFS1220_dtx_8_26_facch_8_ratscch_13 36
+ID_037_TChAHS795_dtx_4_26_ratscch_8 37
+ID_038_TChAFS1220_dtx_8_16_21_24_sidupdate_17 38
+ID_039_TChAHS795_dtx_4_sidupdate_26_34 39
+//ID_040_TChAFS1220_Speech 40
+//ID_041_TChAFS1020_Speech 41
+//ID_042_TChAFS795_Speech 42
+//ID_043_TChAFS740_Speech 43
+//ID_044_TChAFS670_Speech 44
+//ID_045_TChAFS590_Speech 45
+//ID_046_TChAFS515_Speech 46
+//ID_047_TChAFS475_Speech 47
+//ID_048_TChAFS1220_Speech_dtx 48
+//ID_049_TChAFS1020_Speech_dtx 49
+//ID_050_TChAFS795_Speech_dtx 50
+//ID_051_TChAFS740_Speech_dtx 51
+//ID_052_TChAFS670_Speech_dtx 52
+//ID_053_TChAFS590_Speech_dtx 53
+//ID_054_TChAFS515_Speech_dtx 54
+//ID_055_TChAFS475_Speech_dtx 55
+//ID_056_WaveTable_OneNote 56
+//ID_057_DynamicDownload 57
+//ID_058_WaveTable_SixteenNote 58
+//ID_059_DynamicDownload2 59
+//ID_060_PDTCh_RXTX_WaveTable16 60
+//ID_061_PDTCh_RXTX_WaveTable32 61
+//ID_062_FCCh_SineWave 62
+ID_063_WaveTable_EightNote 63
+ID_064_PDTCh_RXTX_WaveTable8 64
+//ID_065_Huffman_Decoder 65
+//ID_066_DAF_Decoder 66
+//ID_067_SDCCh_New 67
+//ID_068_AAC_Huffman_Decoder 68
+ID_069_AAC_Decoder 69
+//ID_070_WB_AMR_660 70
+//ID_071_WB_AMR_885 71
+//ID_072_WB_AMR_1265 72
+//ID_073_WB_AMR_1425 73
+//ID_074_WB_AMR_1585 74
+//ID_075_WB_AMR_1825 75
+//ID_076_WB_AMR_1985 76
+//ID_077_WB_AMR_2305 77
+//ID_078_WB_AMR_2385 78
+//ID_079_SDCCh_New2 79
+ID_080_PDTCh_RXTX_AAC_Decoder 80
+//ID_081_PDTCh_RXTX_RXTX_WBAMR2385 81
+ID_082_TChFS_dtx_8_77_facch_8_13_52_56_60_New 82
+ID_083_TChFS_Speech_New 83
+
+//ID_084_ADC_Linearity 84
+//ID_085_AFC_Linearity 85
+//ID_086_GPRS_APC 86
+//ID_087_GPRS_RepeatRACh 87
+
+ID_088_SDCCh_A53 88
+ID_089_SDCCh_NBFilter 89
+ID_090_SDCCh_WBFilter 90
+ID_091_E5_FCCh_SDCCh 91
+ID_092_E6_FCCh_SCh 92
+
+ID_093_TX_PDTCh_MCS1_P1 93
+ID_094_TX_PDTCh_MCS1_P2 94
+ID_095_TX_PDTCh_MCS2_P1 95
+ID_096_TX_PDTCh_MCS2_P2 96
+ID_097_TX_PDTCh_MCS3_P1 97
+ID_098_TX_PDTCh_MCS3_P2 98
+ID_099_TX_PDTCh_MCS3_P3 99
+ID_100_TX_PDTCh_MCS4_P1 100
+ID_101_TX_PDTCh_MCS4_P2 101
+ID_102_TX_PDTCh_MCS4_P3 102
+ID_103_TX_PDTCh_MCS5_P1 103
+ID_104_TX_PDTCh_MCS5_P2 104
+ID_105_TX_PDTCh_MCS6_P1 105
+ID_106_TX_PDTCh_MCS6_P2 106
+ID_107_TX_PDTCh_MCS7_P1 107
+ID_108_TX_PDTCh_MCS7_P2 108
+ID_109_TX_PDTCh_MCS7_P3 109
+ID_110_TX_PDTCh_MCS8_P1 110
+ID_111_TX_PDTCh_MCS8_P2 111
+ID_112_TX_PDTCh_MCS8_P3 112
+ID_113_TX_PDTCh_MCS9_P1 113
+ID_114_TX_PDTCh_MCS9_P2 114
+ID_115_TX_PDTCh_MCS9_P3 115
+ID_116_TX_PDTCh_MCS1_9_P1_3 116
+
+ID_117_RX_PDTCh_MCS1_P1 117
+ID_118_RX_PDTCh_MCS1_P2 118
+ID_119_RX_PDTCh_MCS2_P1 119
+ID_120_RX_PDTCh_MCS2_P2 120
+ID_121_RX_PDTCh_MCS3_P1 121
+ID_122_RX_PDTCh_MCS3_P2 122
+ID_123_RX_PDTCh_MCS3_P3 123
+ID_124_RX_PDTCh_MCS4_P1 124
+ID_125_RX_PDTCh_MCS4_P2 125
+ID_126_RX_PDTCh_MCS4_P3 126
+ID_127_RX_PDTCh_MCS5_P1 127
+ID_128_RX_PDTCh_MCS5_P2 128
+ID_129_RX_PDTCh_MCS6_P1 129
+ID_130_RX_PDTCh_MCS6_P2 130
+ID_131_RX_PDTCh_MCS7_P1 131
+ID_132_RX_PDTCh_MCS7_P2 132
+ID_133_RX_PDTCh_MCS7_P3 133
+ID_134_RX_PDTCh_MCS8_P1 134
+ID_135_RX_PDTCh_MCS8_P2 135
+ID_136_RX_PDTCh_MCS8_P3 136
+ID_137_RX_PDTCh_MCS9_P1 137
+ID_138_RX_PDTCh_MCS9_P2 138
+ID_139_RX_PDTCh_MCS9_P3 139
+ID_140_RX_PDTCh_MCS1_9_P1_3 140
+
+ID_141_IR_PDTCh_MCS1_IR 141
+ID_142_IR_PDTCh_MCS2_IR 142
+ID_143_IR_PDTCh_MCS3_IR 143
+ID_144_IR_PDTCh_MCS4_IR 144
+ID_145_IR_PDTCh_MCS5_IR 145
+ID_146_IR_PDTCh_MCS6_IR 146
+ID_147_IR_PDTCh_MCS7_IR 147
+ID_148_IR_PDTCh_MCS8_IR 148
+ID_149_IR_PDTCh_MCS9_IR 149
+
+ID_150_IR_PDTCh_MCS1_4_IR 150
+ID_151_IR_PDTCh_MCS1_4_IR2 151
+ID_152_IR_PDTCh_MCS3_3_9_IR 152
+ID_153_IR_PDTCh_MCS3_3_9_IR2 153
+ID_154_IR_PDTCh_MCS9_9_3_IR 154
+ID_155_IR_PDTCh_MCS9_9_3_IR2 155
+ID_156_IR_PDTCh_MCS3_6_9_IR 156
+ID_157_IR_PDTCh_MCS3_6_9_IR2 157
+ID_158_IR_PDTCh_MCS3_6_9_IR3 158
+ID_159_IR_PDTCh_MCS3_6_9_IR4 159
+ID_160_IR_PDTCh_MCS3_6_8_IR 160
+ID_161_IR_PDTCh_MCS3_6_8_IR2 161
+ID_162_IR_PDTCh_MCS3_6_8_IR3 162
+ID_163_IR_PDTCh_MCS3_6_8_IR4 163
+ID_164_IR_PDTCh_MCS2_5_7_IR 164
+ID_165_IR_PDTCh_MCS2_5_7_IR2 165
+ID_166_IR_PDTCh_MCS2_5_7_IR3 166
+ID_167_IR_PDTCh_MCS2_5_7_IR4 167
+ID_168_IR_PDTCh_MCS3_7_9_IR 168
+ID_169_IR_PDTCh_MCS3_7_3_8_IR 169
+ID_170_SRB_4R1T_EGPRS 170
+
+//ID_171_E1_FCCh 171
+//ID_172_E2_FCCh 172
+ID_173_E3_FCCh 173
+//ID_174_E4_FCCh 174
+ID_175_TChAFS_INB 175
+ID_176_TChAHS_INB 176
+//ID_177_AMR_EQ_CI 177
+ID_178_TChAFS1220_dtx_8_26_facch_4_8_ratscch_13 178
+ID_179_TChAHS795_dtx_4_12_17_26_ratscch_8 179
+ID_180_TChAFS1220_dtx_4_21_facch_13_sidupdate_21 180
+ID_181_TChAHS795_dtx_4_ratscch_21_sidupdate_26_34 181
+//ID_182_Post_Process_TS 182
+//ID_183_Post_Process_3D 183
+//ID_184_Via_ROM_Power_Down 184
+//ID_185_AAC_PLUS_Huffman_Decoder 185
+//ID_186_INTX_EQ_BYPASS 186
+//ID_187_INTX2_EQ 187
+//ID_188_INTX4_EQ 188
+//ID_189_EQ_test 189
+
+ID_190_IR_PDTCh_same_BSN 190
+ID_191_IR_PDTCh_diff_BSN 191
+ID_192_IR_PDTCh_MCS7_5_2_2_IR 192
+ID_193_IR_PDTCh_MCS8_6_3_3_IR 193
+ID_194_IR_PDTCh_MCS9_6_3_3_IR 194
+//ID_195_RX_IGAIN 195
+ID_196_E7_FCCh_tcvcxo 196
+ID_197_E8_FCCh_SDCCh_tcvcxo 197
+ID_198_SRB_3R2T_EGPRS 198
+ID_199_SRB_2R3T_EGPRS 199
+ID_200_SRB_1R4T_EGPRS 200
+ID_201_E9_FCCh_SineWave 201
+//ID_202_IR_PDTCh_MCS3_6_9_IR4_JPEG_CODEC 202
+//ID_203_IR_PDTCh_MCS3_6_9_IR4_VDO_PHONE 203
+ID_204_IR_PDTCh_MCS3_6_9_IR4_WT 204
+ID_205_IR_PDTCh_MCS6_HIGH_BSN0_IR 205
+ID_206_IR_PDTCh_MCS6_HIGH_BSN1_IR 206
+ID_207_CTM 207
+ID_208_TChHS0_dtx_8_26_52_77_facch_0_to_86 208
+
+//ID_209_TChFS_Speech_CNTR 209
+//ID_210_TChFS_Speech_CNTR_BT_COMP 210
+//ID_211_TChFS_Speech_CNTR_BT 211
+ID_212_FastPCh 212
+ID_213_IR_PDTCh_MCS9_IR_NoTFI_CD 213
+ID_214_IR_PDTCh_MCS9_IR_NoTFI_NoCD 214
+
+ID_215_TChAHS590_dtx_4_15_sidupdateINH 215
+ID_216_PDTCh_CS4_CRC_Correction 216
+ID_217_PDTCh_CS4_CRC_Correction_Fail 217
+ID_218_PDTCh_RXTX_SAIC_dynamic 218
+ID_219_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_dynamic 219
+//ID_220_PDTCh_AMR1120_AudioDAC 220
+//ID_221_E10_FCCh_SCh_stage3 221
+ID_222_PDTCh_PM 222
+//ID_223_E11_FCCh_SCh_stage3_DCM 223
+//ID_224_P7_INTX2_DSP_EQ 224
+//ID_225_P8_INTX4_DSP_EQ 225
+ID_226_PBCCh_FireCode_Correction_ON 226
+//ID_227_PBCCh_FireCode_Correction_OFF 227
+
+ID_228_AAC_PLUS_Decoder 228
+ID_229_TChFS_Speech_AFE 229
+ID_230_PDTCh_MCS1_9_P1_3_RX_SAIC_off 230
+ID_231_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_off 231
+ID_232_AGCSRC_4k_Speech 232
+ID_233_AGCSRC_8k_Speech 233
+//ID_234_ENHANCED_TURBO_SLEEP_MODE 234
+ID_235_PDTCh_MCS1_9_P1_3_RX_SAIC_dynamic 235
+ID_236_OneBurstPCh 236
+//ID_237_PDTCH_BFE_FIR_NB 237
+//ID_238_PDTCH_BFE_FIR_WB 238
+
+//ID_239_SDCCh_A53_DSP 239
+//ID_240_TChFS_Speech_CNTR_BT_COMP_Gain 240
+//ID_241_TChFS_Speech_CNTR_BT_Gain 241
+//ID_242_TChFS_Speech_CNTR_BT_COMP_SgnExt 242
+//ID_243_TChFS_Speech_CNTR_BT_SgnExt 243
+//ID_244_TChFS_Speech_AFE_FltOff 244
+//ID_245_TChFS_Speech_AFE_20msBlk 245
+//ID_246_TChFS_Speech_AFE_20msBlk_FltOff 246
+//ID_247_ENHANCED_TURBO_SLEEP_MODE_EINT 247
+//ID_248_OneBurstPCh_7PM 248
+ID_249_Divider_Test 249
+
+//ID_250_IR19_Bus_Concurrent 250
+ID_251_PDTCh_1R_PM_DSP2MCU_Interrupt 251
+//ID_252_Enhanced_Turbo_Sleep_Mode_65NM_PDN 252
+ID_253_IRDGB_for_65NM_PDN 253
+//ID_254_UL_DL_SRC_and_DAGC_8k_mode_WB 254
+ID_255_TDMA_Wrap_Count_Test 255
+ID_256_TChFS_dtx_8_77_facch_8_13_52_56_60_HybridSAIC 256
+ID_257_TCh_HS0_DTX_8_77_mode_with_3_FACCH_8_52_60_BFIPATCH 257
+//ID_258_TChFS_Speech_SPE_RAM 258
+ID_259_TChFS_RepeatedFACCH 259
+ID_260_TChHS0_RepeatedFACCH 260
+ID_261_RF_BSI_Porting 261
+ID_262_FCCh_Recursive 262
+ID_263_PDTCh_MCS1_9_P1_3_RX_MTBF 263
+ID_264_PDTCh_MTBF_IR 264
+ID_265_PDTCh_MTBF_IR_RX 265
+ID_266_PDTCH_MCS4_IR_LONG 266
+ID_267_PDTCH_MCS4_IR_PSHO_NORESET 267
+ID_268_PDTCH_MCS4_IR_PSHO_IR 268
+ID_269_PDTCH_MCS4_IR_PSHO_VQ 269
+ID_270_PDTCH_MCS4_IR_PSHO_RESUME1 270
+ID_271_PDTCH_MCS4_IR_PSHO_RESUME2 271
+ID_272_PDTCH_MCS4_IR_PSHO_RESUME3 272
+ID_273_PDTCH_PM_DSP2MCU_INT_USE_WIN6_WIN7 273
+ID_274_TCHFS_SPEECH_DUALMIC_HWANTIALIASING 274
+ID_275_TCHFS_SPEECH_DUALMIC_FWANTIALIASING 275
+ID_276_TCHFS_SPEECH_32BITS_DAI 276
+ID_277_AUDMA_DECODER 277
+//ID_278_AUXADC_TXPM 278
+ID_279_MP3LP_SLEEP_D2C_WAKEUP 279
+ID_280_AGCSRC_MIC_4K_SPEECH 280
+ID_281_AGCSRC_MIC_8K_SPEECH 281
+ID_282_TCHFS_SPEECH_SPE_RAM_CM7 282
+ID_283_AUDMA_DECODER_BURST 283
+ID_284_DAFLP_DECODER 284
+ID_285_AUDMA_NFI_READDATA 285
+ID_286_BFE_TO_RXBUF_BY_IDMA 286
+ID_287_DLIF_IF_SWITCH 287
+ID_288_DLIF_ITD_SWITCH 288
+ID_289_MP3LP_DECODER_SLEEP_MODE_MODEM_MSDC 289
+ID_290_AUDMA_NFI_READDATA_SLEEP_MODE 290
+ID_291_DLIF_WFORCE 291
+ID_292_MP3LP_DECODER_SLEEP_MODE_NFI 292
+ID_293_MP3LP_DECODER_SLEEP_MODE_MODEM_NFI 293
+ID_294_CSD_MONITOR_MODE 294
+ID_295_AUDMA_MSDC_READDATA_SLEEP_MODE 295
+ID_296_FWBW_DC0C 296
+
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp8.l1v b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp8.l1v
new file mode 100755
index 0000000..3523f3a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/10_2G_L1D/dps_l1d_lp8.l1v
@@ -0,0 +1,360 @@
+{ Validation }
+Title = "[10_2G_L1D]L1D Loopback 8"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_L1D_LOOPBACK_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint16 test_id;
+ kal_uint16 test_count;
+} l1d_loopback_req_struct;
+*/
+
+{Parameters}
+
+[test_id] "L1D Loopback Test Items"
+ID_001_SCh 1
+ID_002_SDCCh 2
+ID_003_SDCCh_A51 3
+ID_004_SDCCh_A52 4
+ID_005_TChFS_dtx_8_77_facch_8_13_52_56_60 5
+ID_006_TChEFS_dtx_8_77_facch_8_13_52_56_60 6
+ID_007_TChHS0_dtx_8_77_facch_8_52_60 7
+ID_008_TChCSD_144F_dtx_8_77_facch_8_13_52_56_60 8
+ID_009_TChCSD_24HS0_dtx_8_77_facch_8_52_60 9
+ID_010_TChCSD_48F_dtx_8_77_facch_8_13_56_60 10
+ID_011_TChCSD_48HS1_dtx_8_77_facch_52_60 11
+ID_012_TChCSD_96F_dtx_8_77_facch_8_13_52_56_60 12
+ID_013_TChCSD_24F_dtx_8_77_facch_8_13_52_56_60 13
+ID_014_TChFS_Speech 14
+ID_015_TChEFS_Speech 15
+ID_016_TChHS0_Speech 16
+ID_017_TChHS1_Speech 17
+//ID_018_DynamicPatch 18
+//ID_019_FCCh 19
+ID_020_TChAFS1220_regular 20
+ID_021_TChAFS1020_regular 21
+ID_022_TChAFS795_regular 22
+ID_023_TChAFS740_regular 23
+ID_024_TChAFS670_regular 24
+ID_025_TChAFS590_regular 25
+ID_026_TChAFS515_regular 26
+ID_027_TChAFS475_regular 27
+ID_028_TChAHS795_regular 28
+ID_029_TChAHS740_regular 29
+ID_030_TChAHS670_regular 30
+ID_031_TChAHS590_regular 31
+ID_032_TChAHS515_regular 32
+ID_033_TChAHS475_regular 33
+ID_034_PDTCh_RXTX 34
+ID_035_PBCCh 35
+ID_036_TChAFS1220_dtx_8_26_facch_8_ratscch_13 36
+ID_037_TChAHS795_dtx_4_26_ratscch_8 37
+ID_038_TChAFS1220_dtx_8_16_21_24_sidupdate_17 38
+ID_039_TChAHS795_dtx_4_sidupdate_26_34 39
+//ID_040_TChAFS1220_Speech 40
+//ID_041_TChAFS1020_Speech 41
+//ID_042_TChAFS795_Speech 42
+//ID_043_TChAFS740_Speech 43
+//ID_044_TChAFS670_Speech 44
+//ID_045_TChAFS590_Speech 45
+//ID_046_TChAFS515_Speech 46
+//ID_047_TChAFS475_Speech 47
+//ID_048_TChAFS1220_Speech_dtx 48
+//ID_049_TChAFS1020_Speech_dtx 49
+//ID_050_TChAFS795_Speech_dtx 50
+//ID_051_TChAFS740_Speech_dtx 51
+//ID_052_TChAFS670_Speech_dtx 52
+//ID_053_TChAFS590_Speech_dtx 53
+//ID_054_TChAFS515_Speech_dtx 54
+//ID_055_TChAFS475_Speech_dtx 55
+//ID_056_WaveTable_OneNote 56
+//ID_057_DynamicDownload 57
+//ID_058_WaveTable_SixteenNote 58
+//ID_059_DynamicDownload2 59
+//ID_060_PDTCh_RXTX_WaveTable16 60
+//ID_061_PDTCh_RXTX_WaveTable32 61
+//ID_062_FCCh_SineWave 62
+//ID_063_WaveTable_EightNote 63
+//ID_064_PDTCh_RXTX_WaveTable8 64
+//ID_065_Huffman_Decoder 65
+//ID_066_DAF_Decoder 66
+//ID_067_SDCCh_New 67
+//ID_068_AAC_Huffman_Decoder 68
+//ID_069_AAC_Decoder 69
+//ID_070_WB_AMR_660 70
+//ID_071_WB_AMR_885 71
+//ID_072_WB_AMR_1265 72
+//ID_073_WB_AMR_1425 73
+//ID_074_WB_AMR_1585 74
+//ID_075_WB_AMR_1825 75
+//ID_076_WB_AMR_1985 76
+//ID_077_WB_AMR_2305 77
+//ID_078_WB_AMR_2385 78
+//ID_079_SDCCh_New2 79
+//ID_080_PDTCh_RXTX_AAC_Decoder 80
+//ID_081_PDTCh_RXTX_RXTX_WBAMR2385 81
+//ID_082_TChFS_dtx_8_77_facch_8_13_52_56_60_New 82
+//ID_083_TChFS_Speech_New 83
+
+//ID_084_ADC_Linearity 84
+//ID_085_AFC_Linearity 85
+//ID_086_GPRS_APC 86
+//ID_087_GPRS_RepeatRACh 87
+
+ID_088_SDCCh_A53 88
+ID_089_SDCCh_NBFilter 89
+ID_090_SDCCh_WBFilter 90
+ID_091_E5_FCCh_SDCCh 91
+ID_092_E6_FCCh_SCh 92
+
+ID_093_TX_PDTCh_MCS1_P1 93
+ID_094_TX_PDTCh_MCS1_P2 94
+ID_095_TX_PDTCh_MCS2_P1 95
+ID_096_TX_PDTCh_MCS2_P2 96
+ID_097_TX_PDTCh_MCS3_P1 97
+ID_098_TX_PDTCh_MCS3_P2 98
+ID_099_TX_PDTCh_MCS3_P3 99
+ID_100_TX_PDTCh_MCS4_P1 100
+ID_101_TX_PDTCh_MCS4_P2 101
+ID_102_TX_PDTCh_MCS4_P3 102
+ID_103_TX_PDTCh_MCS5_P1 103
+ID_104_TX_PDTCh_MCS5_P2 104
+ID_105_TX_PDTCh_MCS6_P1 105
+ID_106_TX_PDTCh_MCS6_P2 106
+ID_107_TX_PDTCh_MCS7_P1 107
+ID_108_TX_PDTCh_MCS7_P2 108
+ID_109_TX_PDTCh_MCS7_P3 109
+ID_110_TX_PDTCh_MCS8_P1 110
+ID_111_TX_PDTCh_MCS8_P2 111
+ID_112_TX_PDTCh_MCS8_P3 112
+ID_113_TX_PDTCh_MCS9_P1 113
+ID_114_TX_PDTCh_MCS9_P2 114
+ID_115_TX_PDTCh_MCS9_P3 115
+ID_116_TX_PDTCh_MCS1_9_P1_3 116
+
+ID_117_RX_PDTCh_MCS1_P1 117
+ID_118_RX_PDTCh_MCS1_P2 118
+ID_119_RX_PDTCh_MCS2_P1 119
+ID_120_RX_PDTCh_MCS2_P2 120
+ID_121_RX_PDTCh_MCS3_P1 121
+ID_122_RX_PDTCh_MCS3_P2 122
+ID_123_RX_PDTCh_MCS3_P3 123
+ID_124_RX_PDTCh_MCS4_P1 124
+ID_125_RX_PDTCh_MCS4_P2 125
+ID_126_RX_PDTCh_MCS4_P3 126
+ID_127_RX_PDTCh_MCS5_P1 127
+ID_128_RX_PDTCh_MCS5_P2 128
+ID_129_RX_PDTCh_MCS6_P1 129
+ID_130_RX_PDTCh_MCS6_P2 130
+ID_131_RX_PDTCh_MCS7_P1 131
+ID_132_RX_PDTCh_MCS7_P2 132
+ID_133_RX_PDTCh_MCS7_P3 133
+ID_134_RX_PDTCh_MCS8_P1 134
+ID_135_RX_PDTCh_MCS8_P2 135
+ID_136_RX_PDTCh_MCS8_P3 136
+ID_137_RX_PDTCh_MCS9_P1 137
+ID_138_RX_PDTCh_MCS9_P2 138
+ID_139_RX_PDTCh_MCS9_P3 139
+ID_140_RX_PDTCh_MCS1_9_P1_3 140
+
+ID_141_IR_PDTCh_MCS1_IR 141
+ID_142_IR_PDTCh_MCS2_IR 142
+ID_143_IR_PDTCh_MCS3_IR 143
+ID_144_IR_PDTCh_MCS4_IR 144
+ID_145_IR_PDTCh_MCS5_IR 145
+ID_146_IR_PDTCh_MCS6_IR 146
+ID_147_IR_PDTCh_MCS7_IR 147
+ID_148_IR_PDTCh_MCS8_IR 148
+ID_149_IR_PDTCh_MCS9_IR 149
+
+ID_150_IR_PDTCh_MCS1_4_IR 150
+ID_151_IR_PDTCh_MCS1_4_IR2 151
+ID_152_IR_PDTCh_MCS3_3_9_IR 152
+ID_153_IR_PDTCh_MCS3_3_9_IR2 153
+ID_154_IR_PDTCh_MCS9_9_3_IR 154
+ID_155_IR_PDTCh_MCS9_9_3_IR2 155
+ID_156_IR_PDTCh_MCS3_6_9_IR 156
+ID_157_IR_PDTCh_MCS3_6_9_IR2 157
+ID_158_IR_PDTCh_MCS3_6_9_IR3 158
+ID_159_IR_PDTCh_MCS3_6_9_IR4 159
+ID_160_IR_PDTCh_MCS3_6_8_IR 160
+ID_161_IR_PDTCh_MCS3_6_8_IR2 161
+ID_162_IR_PDTCh_MCS3_6_8_IR3 162
+ID_163_IR_PDTCh_MCS3_6_8_IR4 163
+ID_164_IR_PDTCh_MCS2_5_7_IR 164
+ID_165_IR_PDTCh_MCS2_5_7_IR2 165
+ID_166_IR_PDTCh_MCS2_5_7_IR3 166
+ID_167_IR_PDTCh_MCS2_5_7_IR4 167
+ID_168_IR_PDTCh_MCS3_7_9_IR 168
+ID_169_IR_PDTCh_MCS3_7_3_8_IR 169
+
+ID_170_SRB_4R1T_EGPRS 170
+
+//ID_171_E1_FCCh 171
+//ID_172_E2_FCCh 172
+ID_173_E3_FCCh 173
+//ID_174_E4_FCCh 174
+ID_175_TChAFS_INB 175
+ID_176_TChAHS_INB 176
+//ID_177_AMR_EQ_CI 177
+ID_178_TChAFS1220_dtx_8_26_facch_4_8_ratscch_13 178
+ID_179_TChAHS795_dtx_4_12_17_26_ratscch_8 179
+ID_180_TChAFS1220_dtx_4_21_facch_13_sidupdate_21 180
+ID_181_TChAHS795_dtx_4_ratscch_21_sidupdate_26_34 181
+//ID_182_Post_Process_TS 182
+//ID_183_Post_Process_3D 183
+//ID_184_Via_ROM_Power_Down 184
+//ID_185_AAC_PLUS_Huffman_Decoder 185
+//ID_186_INTX_EQ_BYPASS 186
+//ID_187_INTX2_EQ 187
+//ID_188_INTX4_EQ 188
+//ID_189_EQ_test 189
+
+ID_190_IR_PDTCh_same_BSN 190
+ID_191_IR_PDTCh_diff_BSN 191
+ID_192_IR_PDTCh_MCS7_5_2_2_IR 192
+ID_193_IR_PDTCh_MCS8_6_3_3_IR 193
+ID_194_IR_PDTCh_MCS9_6_3_3_IR 194
+//ID_195_RX_IGAIN 195
+//ID_196_E7_FCCh_tcvcxo 196
+ID_197_E8_FCCh_SDCCh_tcvcxo 197
+ID_198_SRB_3R2T_EGPRS 198
+ID_199_SRB_2R3T_EGPRS 199
+ID_200_SRB_1R4T_EGPRS 200
+ID_201_E9_FCCh_SineWave 201
+//ID_202_IR_PDTCh_MCS3_6_9_IR4_JPEG_CODEC 202
+//ID_203_IR_PDTCh_MCS3_6_9_IR4_VDO_PHONE 203
+//ID_204_IR_PDTCh_MCS3_6_9_IR4_WT 204
+ID_205_IR_PDTCh_MCS6_HIGH_BSN0_IR 205
+ID_206_IR_PDTCh_MCS6_HIGH_BSN1_IR 206
+ID_207_CTM 207
+ID_208_TChHS0_dtx_8_26_52_77_facch_0_to_86 208
+
+//ID_209_TChFS_Speech_CNTR 209
+//ID_210_TChFS_Speech_CNTR_BT_COMP 210
+ID_211_TChFS_Speech_CNTR_BT 211
+ID_212_FastPCh 212
+ID_213_IR_PDTCh_MCS9_IR_NoTFI_CD 213
+ID_214_IR_PDTCh_MCS9_IR_NoTFI_NoCD 214
+
+ID_215_TChAHS590_dtx_4_15_sidupdateINH 215
+ID_216_PDTCh_CS4_CRC_Correction 216
+ID_217_PDTCh_CS4_CRC_Correction_Fail 217
+ID_218_PDTCh_RXTX_SAIC_dynamic 218
+ID_219_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_dynamic 219
+//ID_220_PDTCh_AMR1120_AudioDAC 220
+//ID_221_E10_FCCh_SCh_stage3 221
+ID_222_PDTCh_PM 222
+//ID_223_E11_FCCh_SCh_stage3_DCM 223
+//ID_224_P7_INTX2_DSP_EQ 224
+//ID_225_P8_INTX4_DSP_EQ 225
+ID_226_PBCCh_FireCode_Correction_ON 226
+//ID_227_PBCCh_FireCode_Correction_OFF 227
+
+//ID_228_AAC_PLUS_Decoder 228
+ID_229_TChFS_Speech_AFE 229
+ID_230_PDTCh_MCS1_9_P1_3_RX_SAIC_off 230
+ID_231_TChFS_dtx_8_77_facch_8_13_52_56_60_SAIC_off 231
+//ID_232_AGCSRC_4k_Speech 232
+//ID_233_AGCSRC_8k_Speech 233
+//ID_234_ENHANCED_TURBO_SLEEP_MODE 234
+ID_235_PDTCh_MCS1_9_P1_3_RX_SAIC_dynamic 235
+ID_236_OneBurstPCh 236
+//ID_237_PDTCH_BFE_FIR_NB 237
+//ID_238_PDTCH_BFE_FIR_WB 238
+
+//ID_239_SDCCh_A53_DSP 239
+//ID_240_TChFS_Speech_CNTR_BT_COMP_Gain 240
+//ID_241_TChFS_Speech_CNTR_BT_Gain 241
+//ID_242_TChFS_Speech_CNTR_BT_COMP_SgnExt 242
+//ID_243_TChFS_Speech_CNTR_BT_SgnExt 243
+//ID_244_TChFS_Speech_AFE_FltOff 244
+//ID_245_TChFS_Speech_AFE_20msBlk 245
+//ID_246_TChFS_Speech_AFE_20msBlk_FltOff 246
+//ID_247_ENHANCED_TURBO_SLEEP_MODE_EINT 247
+//ID_248_OneBurstPCh_7PM 248
+ID_249_Divider_Test 249
+
+//ID_250_IR19_Bus_Concurrent 250
+ID_251_PDTCh_1R_PM_DSP2MCU_Interrupt 251
+//ID_252_Enhanced_Turbo_Sleep_Mode_65NM_PDN 252
+//ID_253_IRDGB_for_65NM_PDN 253
+//ID_254_UL_DL_SRC_and_DAGC_8k_mode_WB 254
+ID_255_TDMA_Wrap_Count_Test 255
+ID_256_TChFS_dtx_8_77_facch_8_13_52_56_60_HybridSAIC 256
+ID_257_TCh_HS0_DTX_8_77_mode_with_3_FACCH_8_52_60_BFIPATCH 257
+//ID_258_TChFS_Speech_SPE_RAM 258
+ID_259_TChFS_RepeatedFACCH 259
+ID_260_TChHS0_RepeatedFACCH 260
+ID_261_RF_BSI_Porting 261
+ID_262_FCCh_Recursive 262
+//ID_263_PDTCh_MCS1_9_P1_3_RX_MTBF 263
+//ID_264_PDTCh_MTBF_IR 264
+//ID_265_PDTCh_MTBF_IR_RX 265
+//ID_266_PDTCH_MCS4_IR_LONG 266
+//ID_267_PDTCH_MCS4_IR_PSHO_NORESET 267
+//ID_268_PDTCH_MCS4_IR_PSHO_IR 268
+//ID_269_PDTCH_MCS4_IR_PSHO_VQ 269
+//ID_270_PDTCH_MCS4_IR_PSHO_RESUME1 270
+//ID_271_PDTCH_MCS4_IR_PSHO_RESUME2 271
+//ID_272_PDTCH_MCS4_IR_PSHO_RESUME3 272
+ID_273_PDTCH_PM_DSP2MCU_INT_USE_WIN6_WIN7 273
+ID_274_TCHFS_SPEECH_DUALMIC_HWANTIALIASING 274
+ID_275_TCHFS_SPEECH_DUALMIC_FWANTIALIASING 275
+//ID_276_TCHFS_SPEECH_32BITS_DAI 276
+//ID_277_AUDMA_DECODER 277
+//ID_278_AUXADC_TXPM 278
+//ID_279_MP3LP_SLEEP_D2C_WAKEUP 279
+//ID_280_AGCSRC_MIC_4K_SPEECH 280
+//ID_281_AGCSRC_MIC_8K_SPEECH 281
+//ID_282_TCHFS_SPEECH_SPE_RAM_CM7 282
+//ID_283_AUDMA_DECODER_BURST 283
+//ID_284_DAFLP_DECODER 284
+//ID_285_AUDMA_NFI_READDATA 285
+//ID_286_BFE_TO_RXBUF_BY_IDMA 286
+ID_287_DLIF_IF_SWITCH 287
+ID_288_DLIF_ITD_SWITCH 288
+//ID_289_MP3LP_DECODER_SLEEP_MODE_MODEM_MSDC 289
+//ID_290_AUDMA_NFI_READDATA_SLEEP_MODE 290
+ID_291_DLIF_WFORCE 291
+//ID_292_MP3LP_DECODER_SLEEP_MODE_NFI 292
+//ID_293_MP3LP_DECODER_SLEEP_MODE_MODEM_NFI 293
+ID_294_CSD_MONITOR_MODE 294
+//ID_295_AUDMA_MSDC_READDATA_SLEEP_MODE 295
+//ID_296_FWBW_DC0C 296
+ID_297_E12_FCCHSTOP_SDCCH 297
+ID_298_IRDMA_MPU_VIOLATION 298
+
+ID_299_A6_SDCCH_A51_DFM 299
+//ID_300_B25_TCHFS_SPEECH_AFE_32BST 300
+//ID_301_Y1_DSP_CACHE_VALIDATION 301
+ID_302_E13_TDDM_SHORT_FCCH 302
+ID_303_E14_TDDM_SHORT_FCCh_PM 303
+ID_304_E15_TDDM_SHORT_SCH 304
+ID_305_E16_TDDM_SHORT_SCH_PM 305
+ID_306_Z8_TXBUF_CLOCK_CONTROL 306
+ID_307_A6_SDCCH_A51_DFM_HB 307
+//ID_308_Y2_AUDIO_EM_REMAP 308
+ID_309_B26_CM8_INTERNAL_RAM_VALIDATION 309
+//ID_310_Y3_EMI_SECURITY_VALIDATION 310
+//ID_311_W26_AUDIO_AMR_DECODER 311
+ID_312_B16_TChFS_Speech_VSBT 312
+
+ID_313_AUDIOLP_ReadData_Sleep_Mode 313
+//ID_314_None 314
+ID_315_EQ_Change_SampleRate 315
+ID_316_I2S 316
+ID_317_TChFS_Speech_DAI 317
+ID_318_TChFS_Speech_VBI 318
+ID_319_W29_IR19_W10_AAC_Decoder 319
+ID_320_W28_Audio_AWB_Decoder 320
+ID_321_SDCCh_A53_BBRX 321
+ID_322_IRDBG_MPU_Violation 322
+
+[test_count] "Test Count"
+1~99999
+
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test1.l1v
new file mode 100755
index 0000000..5c1b61c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test1.l1v
@@ -0,0 +1,158 @@
+{ Validation }
+Title = "[11_HSDPA][1_FDDTest_8960]DPAS_FDD_TEST_SL1: H-Set BLER test in HS-DSCH mode (CSD request)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_FDD_TEST_SL1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 ul_dch_PCA; // Power control algorithm: 1 or 2
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ kal_uint8 dpas_sl12_par_idx;
+ kal_uint8 beta_c; // for HSDPA FDD test (TS34.121 5.2A)
+ kal_uint8 beta_d; // for HSDPA FDD test (TS34.121 5.2A)
+} udps_dpas_FDDTest_sl1_struct; // DPA01
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@0
+
+/******************************************
+* For RACH
+******************************************/
+/*
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+*/
+/******************************************
+* For DCH
+******************************************/
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@20
+
+
+[beta_c] "beta_c of UL DPCH (TF1,TF0)"
+1~15
+@8
+
+[beta_d] "beta_d of UL DPCH (TF1,TF0)"
+1~15
+@15
+
+[ul_dch_PCA] "UL DCH Power Control Algo. (1~2)"
+1~2
+@1
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@3
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@3
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[dpas_sl12_par_idx] "HSDPA H-set parameters 1~10"
+1~10
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test2.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test2.l1v
new file mode 100755
index 0000000..4a186ba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test2.l1v
@@ -0,0 +1,192 @@
+{ Validation }
+Title = "[11_HSDPA][1_FDDTest_8960]DPAS_FDD_TEST_SL2: User Define BLER test in HS-DSCH mode (CSD request)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_FDD_TEST_SL2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 ul_dch_PCA; // Power control algorithm: 1 or 2
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ udps_SMLs_E SMLs;
+ kal_uint8 beta_c; // for HSDPA FDD test (TS34.121 5.2A)
+ kal_uint8 beta_d; // for HSDPA FDD test (TS34.121 5.2A)
+} udps_dpas_FDDTest_sl2_struct; // DPA01
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@0
+
+
+/******************************************
+* For RACH
+******************************************/
+/*
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+*/
+/******************************************
+* For DCH
+******************************************/
+/*
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+*/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@20
+
+
+[beta_c] "beta_c of UL DPCH (TF1,TF0)"
+1~15
+@8
+
+[beta_d] "beta_d of UL DPCH (TF1,TF0)"
+1~15
+@15
+
+[ul_dch_PCA] "UL DCH Power Control Algo. (1~2)"
+1~2
+@1
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+/*
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+*/
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@3
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@3
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+[SMLs] "IR Buffer Size"
+hms4800
+hms7200
+hms9600
+hms11200
+hms12800
+hms14400
+hms19200
+@hms22400
+
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF01.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF01.l1v
new file mode 100755
index 0000000..bbe64ab
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF01.l1v
@@ -0,0 +1,100 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF01: Demodulation of HS-PDSCH with Single Link under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 dpaf01_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpaf01_par_idx] "HSDPA parameters 1~24"
+1~24
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF02.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF02.l1v
new file mode 100755
index 0000000..b0d5262
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF02.l1v
@@ -0,0 +1,128 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF02: Demodulation of HS-PDSCH with Diversity under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+ kal_uint8 dpaf02_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpas02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpaf02_par_idx] "HSDPA parameters 1~38"
+1~38
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF03.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF03.l1v
new file mode 100755
index 0000000..67324db
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF03.l1v
@@ -0,0 +1,100 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF03: HS-SCCH Detection Performance with Single Link under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 dpaf03_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpaf03_par_idx] "HSDPA parameters 1~3"
+1~3
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF04.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF04.l1v
new file mode 100755
index 0000000..d811618
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF04.l1v
@@ -0,0 +1,132 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF04: HS-SCCH Detection Performance with Diversity under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+ kal_uint8 dpaf04_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpas04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpaf04_par_idx] "HSDPA parameters 1~3"
+1~3
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF07.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF07.l1v
new file mode 100755
index 0000000..f876281
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF07.l1v
@@ -0,0 +1,100 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF07: Reporting of Channel Quality Indicator (Fading+Single Link)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 dpaf07_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpaf07_par_idx] "HSDPA parameters 1~2"
+1~2
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF08.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF08.l1v
new file mode 100755
index 0000000..b1007b3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF08.l1v
@@ -0,0 +1,132 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF08: Reporting of Channel Quality Indicator (Fading+Diversity)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+ {
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 dpaf08_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf08_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpaf08_par_idx] "HSDPA parameters 1~4"
+1~4
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF09.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF09.l1v
new file mode 100755
index 0000000..c8e1748
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF09.l1v
@@ -0,0 +1,100 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF09: Demodulation of HS-PDSCH with VRC under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_int8 meas_po;
+ kal_uint8 dpaf09_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF10.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF10.l1v
new file mode 100755
index 0000000..3290e90
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF10.l1v
@@ -0,0 +1,101 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF10: DCH(384K) and HS-PDSCH(max capability) Transmission Test under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_int8 meas_po;
+ kal_uint8 dpaf10_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+RMC_64
+@RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11.l1v
new file mode 100755
index 0000000..c8d3bee
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11.l1v
@@ -0,0 +1,126 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF11: HSDPA with SHO under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+
+ kal_int8 meas_po;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11_1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11_1.l1v
new file mode 100755
index 0000000..a72704a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11_1.l1v
@@ -0,0 +1,125 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF11_1: HSDPA with measurement under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF11_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+ kal_int8 meas_po;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf11_1_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11_2.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11_2.l1v
new file mode 100755
index 0000000..6f7379c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF11_2.l1v
@@ -0,0 +1,120 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF11_2: HSDPA with IF under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF11_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf11_2_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF12.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF12.l1v
new file mode 100755
index 0000000..8695205
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF12.l1v
@@ -0,0 +1,101 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF12: CQI calibration under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_int8 meas_po;
+ kal_uint8 dpaf12_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF13.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF13.l1v
new file mode 100755
index 0000000..ce090c2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF13.l1v
@@ -0,0 +1,105 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF13: Demodulation of HS-PDSCH with Single Link under Fading (Configure H-Set and Modulation)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF13
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_int8 meas_po;
+ kal_uint8 dpaf13_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf13_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+[dpaf13_par_idx] "HSDPA parameter number"
+1~10
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF14.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF14.l1v
new file mode 100755
index 0000000..7f58707
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF14.l1v
@@ -0,0 +1,101 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF14: CQI calibration with variety of Ior/Ioc under Static Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF14
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_int8 meas_po;
+ kal_uint8 dpaf14_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpaf14_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF15.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF15.l1v
new file mode 100755
index 0000000..630f90b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAF15.l1v
@@ -0,0 +1,132 @@
+{ Validation }
+Title = "[11_HSDPA]DPAF15: H-Set6 with TxDiversity under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAF15
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+ kal_int8 meas_po;
+ kal_uint8 dpaf15_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_dpas15_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[meas_po] "Meas power offset of HS-DPSCH"
+-12~26
+@0
+[dpaf15_par_idx] "HSDPA parameters 1~10"
+1~10
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS02_OCIC.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS02_OCIC.l1v
new file mode 100755
index 0000000..ecece58
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS02_OCIC.l1v
@@ -0,0 +1,167 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS02(OCIC): SHO but no HS serving cell change"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS02_OCIC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas02_ocic_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@0
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS08_1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS08_1.l1v
new file mode 100755
index 0000000..b3eb1c8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS08_1.l1v
@@ -0,0 +1,152 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS08_1: Verify HS-PDSCH receiving before ASU procedure for SHO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS08_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas08_1_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[harq_preamble_mode] " HARQ ACK/NACK preamble enable or not "
+0~1
+@0
+
+[cqi_k] " 0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms "
+0~8
+@1
+
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[process_num] " HARQ process number "
+1~8
+@6
+
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC1.l1v
new file mode 100755
index 0000000..213c842
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC1.l1v
@@ -0,0 +1,167 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_CC1: HSDPA Serving Cell Changes When Doing SHO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_CC1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas_cc1_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC2.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC2.l1v
new file mode 100755
index 0000000..d606aed
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC2.l1v
@@ -0,0 +1,185 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_CC2: HSDPA Serving Cell Changes When Doing TRHHO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_CC2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+{
+ kal_uint ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for HHO delay
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+}
+} udps_dpas_cc2_struct; // DPAS_CC2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC3.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC3.l1v
new file mode 100755
index 0000000..79297b6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC3.l1v
@@ -0,0 +1,179 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_CC3: HSDPA Serving Cell Changes When Doing TMHHO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_CC3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_uint16 DOFF_bts2; // Don't Care for TMHHO
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+}
+} udps_dpas_cc3_struct; // DPAS_CC3
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC4.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC4.l1v
new file mode 100755
index 0000000..070ea41
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC4.l1v
@@ -0,0 +1,152 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_CC4: Verify HS-PDSCH receiving under SHO(serving cell not change)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_CC4
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas_cc4_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[harq_preamble_mode] " HARQ ACK/NACK preamble enable or not "
+0~1
+@0
+
+[cqi_k] " 0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms "
+0~8
+@1
+
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[process_num] " HARQ process number "
+1~8
+@6
+
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC5.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC5.l1v
new file mode 100755
index 0000000..e6eae14
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC5.l1v
@@ -0,0 +1,183 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_CC5: Verify HS-DSCH can work as normal when TR-HHO is failed"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_CC5
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for HHO delay
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+} udps_dpas_cc5_struct; // DPAS_CC5
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset for BTS2 [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC6.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC6.l1v
new file mode 100755
index 0000000..443963d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_CC6.l1v
@@ -0,0 +1,177 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_CC6: Verify HS-DSCH can work as normal when TM-HHO is failed"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_CC6
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_uint16 DOFF_bts2; // Don't Care for TMHHO
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+} udps_dpas_cc6_struct; // DPAS_CC6
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS1.l1v
new file mode 100755
index 0000000..7acaca0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS1.l1v
@@ -0,0 +1,167 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_MEAS1: Add neighbor cell to Monitor set, and no ASU"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_MEAS1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas_meas1_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS2.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS2.l1v
new file mode 100755
index 0000000..b7f898e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS2.l1v
@@ -0,0 +1,164 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_MEAS2: Verify HS-DSCH can work as normal when UE is reading SFN"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_MEAS2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3;
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas_meas2_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@11
+
+[uarfcn_bts3] "UARFCN of Serving Cell 3"
+10562~10838
+@10600
+
+[psc_bts3] "PSC of Serving Cell 3"
+0~511
+@12
+
+[uarfcn_bts4] "UARFCN of Serving Cell 4"
+10562~10838
+@10600
+
+[psc_bts4] "PSC of Serving Cell 4"
+0~511
+@13
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[harq_preamble_mode] " HARQ ACK/NACK preamble enable or not "
+0~1
+@0
+
+[cqi_k] " 0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms "
+0~8
+@1
+
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[process_num] " HARQ process number "
+1~8
+@6
+
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS3.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS3.l1v
new file mode 100755
index 0000000..6e4b68e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_MEAS3.l1v
@@ -0,0 +1,150 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_MEAS3: GSM measurements (Event triggered report with BSIC verfication required) when HSDSCH connection exists."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_MEAS3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas_meas3_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[harq_preamble_mode] " HARQ ACK/NACK preamble enable or not "
+0~1
+@0
+
+[cqi_k] " 0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms "
+0~8
+@1
+
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[process_num] " HARQ process number "
+1~8
+@6
+
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_OCIC1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_OCIC1.l1v
new file mode 100755
index 0000000..266b8dd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_OCIC1.l1v
@@ -0,0 +1,167 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_OCIC1: Establish HS connection after ASU"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_OCIC1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas_ocic1_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_OCIC2.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_OCIC2.l1v
new file mode 100755
index 0000000..87acb18
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_OCIC2.l1v
@@ -0,0 +1,167 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_OCIC2: Consecutive HSDPA serving cell change"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_OCIC2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 num_of_hsscch;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 cqi_k;//0~8 map to 0/2/4/8/10/20/40/80/160 ms
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 process_num;
+} udps_dpas_ocic2_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@15
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL1.l1v
new file mode 100755
index 0000000..2eac632
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL1.l1v
@@ -0,0 +1,166 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL1: Connection Setup of HSDPA"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+{
+ kal_uint ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+}
+} udps_dpas_Sl1_struct; // DPA01
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL10.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL10.l1v
new file mode 100755
index 0000000..b1aa58b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL10.l1v
@@ -0,0 +1,93 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL10: Reporting of Channel Quality Indicator (AWGN+Single Link)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 dpas_sl10_par_idx;
+
+} udps_dpas_sl10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL11.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL11.l1v
new file mode 100755
index 0000000..6b0ef09
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL11.l1v
@@ -0,0 +1,120 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL11: Reporting of Channel Quality Indicator (AWGN+Diversity)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+ {
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 dpas_sl11_par_idx;
+} udps_dpas_sl11_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpas_sl11_par_idx] "HSDPA parameters 1~6"
+1~6
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL12.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL12.l1v
new file mode 100755
index 0000000..4a43ee7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL12.l1v
@@ -0,0 +1,82 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL12: HSDPA connection with different DPCH timing"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 dpas_sl12_par_idx;
+} udps_dpas_sl2_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpas_sl12_par_idx] "HSDPA parameters 1~15"
+1~15
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL13.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL13.l1v
new file mode 100755
index 0000000..43f6e23
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL13.l1v
@@ -0,0 +1,94 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL13: HSDPA connection with dual scrambling code"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL13
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint32 dl_sc;
+ kal_uint16 OVSFdpch_rl1;
+
+} udps_dpas_sl13_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[dl_sc] "(DCH) Dedicated DL Scrambling code Num.(SSC)"
+0~15
+@3
+
+
+/******************************************
+* For HSDPA
+******************************************/
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL2.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL2.l1v
new file mode 100755
index 0000000..32f9454
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL2.l1v
@@ -0,0 +1,96 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL2: Demodulation of HS-PDSCH with Single Link under Static Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 dpas_sl2_par_idx;
+
+} udps_dpas_sl2_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpas_sl2_par_idx] "HSDPA parameters 1~15"
+1~15
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL3.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL3.l1v
new file mode 100755
index 0000000..8b9094c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL3.l1v
@@ -0,0 +1,162 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL3: Highest data rate for category 8 (TB size=14411, # of HS-PDSCH=10, 16QAM, inter-TTI dist=1)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+} udps_dpas_sl3_struct; // DPAS_SL3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+RMC_64
+@RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@6
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@14
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL4.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL4.l1v
new file mode 100755
index 0000000..018e38c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL4.l1v
@@ -0,0 +1,172 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL4: HS-DSCH receiving with DCH(384K/144K/64K/12.2K)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL4
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_RMC_12_2; // OVSF code for DPCH of RMC_12_2
+ kal_uint16 OVSFdpch_RMC_64; // OVSF code for DPCH of RMC_64
+ kal_uint16 OVSFdpch_RMC_144; // OVSF code for DPCH of RMC_144
+ kal_uint16 OVSFdpch_RMC_384; // OVSF code for DPCH of RMC_384
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+ kal_uint8 process_num;
+} udps_dpas_sl4_struct; //DPAS_SL4
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_RMC_12_2] "OVSF code of DL DPCH for RMC_12_2 - SF128"
+0~127
+@15
+
+[OVSFdpch_RMC_64] "OVSF code of DL DPCH for RMC_64 - SF32"
+0~31
+@3
+
+[OVSFdpch_RMC_144] "OVSF code of DL DPCH for RMC_144 - SF16"
+0~15
+@1
+
+[OVSFdpch_RMC_384] "OVSF code of DL DPCH for RMC_384 - SF8"
+0~7
+@6
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL5.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL5.l1v
new file mode 100755
index 0000000..78d0995
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL5.l1v
@@ -0,0 +1,131 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL5: Demodulation of HS-PDSCH with Diversity under Static Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL5
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+ kal_uint8 dpas_sl5_par_idx;
+} udps_dpas_sl5_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/*
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+*/
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpas_sl5_par_idx] "HSDPA parameters 1~20"
+1~20
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL6.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL6.l1v
new file mode 100755
index 0000000..577a1d5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL6.l1v
@@ -0,0 +1,96 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL6: HSDPA Enhancement- Preamble/Postamble"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL6
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+ {
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 dpas_sl6_par_idx;
+
+ } udps_dpas_sl6_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[dpas_sl6_par_idx] "HSDPA parameters 1~5"
+1~5
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL7.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL7.l1v
new file mode 100755
index 0000000..82d389e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL7.l1v
@@ -0,0 +1,162 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL7: Verify UE can work as normal when MAC-hs Reset is requested."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL7
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+} udps_dpas_sl7_struct; // DPAS_SL7
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL8.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL8.l1v
new file mode 100755
index 0000000..7d51df1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL8.l1v
@@ -0,0 +1,199 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL8: Verify HS-DSCH can work as normal when rx out of sync."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL8
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //Timer in connected mode
+ kal_uint8 T313; // 0~15
+ kal_uint16 N313; // 1, 2, 4, 10, 20, 50, 100, 200
+ kal_uint16 N315; // 1, 2, 4, 10, 20, 50, 100, 200, 400, 600, 800, 1000
+} udps_dpas_sl8_struct; // DPAS_SL8
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+
+/******************************************
+* Timer in connected mode
+******************************************/
+[T313] " T313 "
+0~15
+@15
+
+[N313] " N313 "
+N313_1 1
+N313_2 2
+N313_4 4
+N313_10 10
+N313_20 20
+N313_50 50
+N313_100 100
+@N313_200 200
+
+[N315] " N315 "
+@N315_1 1
+N315_2 2
+N315_4 4
+N315_10 10
+N315_20 20
+N315_50 50
+N315_100 100
+N315_200 200
+N315_400 400
+N315_600 600
+N315_800 800
+N315_1000 1000
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL9.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL9.l1v
new file mode 100755
index 0000000..b45eb30
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_SL9.l1v
@@ -0,0 +1,183 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_SL9: Verify UE can work as normal when setting phase reference to S-CPICH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_SL9
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //Phase reference of dedicated channel
+ kal_bool pcpich_usage;
+ kal_int8 scpich_ssc;
+ kal_uint8 scpich_ovsf;
+} udps_dpas_SL9_struct; // DPAS_SL9
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+
+/******************************************
+* For S-CPICH
+******************************************/
+[pcpich_usage] " Indicate if P-CPICH can be used for channel estimation "
+@KAL_FALSE
+KAL_TRUE
+
+[scpich_ssc] " Scrambling code of S-CPICH "
+-1~15
+@0
+
+[scpich_ovsf] " OVSF code of S-CPICH, 0 ~ 255 "
+0~255
+@28
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_TGPS1.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_TGPS1.l1v
new file mode 100755
index 0000000..08e6fdf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_TGPS1.l1v
@@ -0,0 +1,169 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_TGPS1:ACK/NACK/CQI Reporting When Conflicting With Transmission Gap."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_TGPS1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+{
+ kal_uint ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2; // for HHO delay
+ kal_uint8 Tdpch_rl2; // for HHO delay
+ kal_uint16 OVSFdpch_rl2; // for HHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+}
+} udps_dpas_tgps1_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@5
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@10
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_TGPS2.l1v b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_TGPS2.l1v
new file mode 100755
index 0000000..c039299
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/11_HSDPA/udps_DPAS_TGPS2.l1v
@@ -0,0 +1,173 @@
+{ Validation }
+Title = "[11_HSDPA]DPAS_TGPS2: HS-DSCH can work as normal when CM for executing GSM/Interfreq measurement."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DPAS_TGPS2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ kal_uint8 single_or_double_frame_tg;
+} udps_dpas_tgps2_struct; // DPAS_TGPS2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+[num_of_hsscch] "number of hs_scch"
+1~4
+@1
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@6
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@7
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@8
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@9
+
+[meas_po] "meas_po ,-12~26 * 0.5"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] "cqi_repetition_factor"
+1~4
+@1
+[delta_cqi] "delta_cqi 0~8"
+0~8
+@5
+[acknack_repe_factor] "acknack_repe_factor"
+1~4
+@1
+
+[delta_nack] "delta_nack 0~8"
+0~8
+@5
+
+[delta_ack] "delta_ack 0~8"
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+[single_or_double_frame_tg] "single frame:1, double frame:2"
+1~2
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_1.l1v
new file mode 100755
index 0000000..ccb195d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN01-1: Connection Setup of E-DCH(10ms) and E-DCH TTI modification from 10ms to 2ms."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn01_1_struct; // R6-CN01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_2.l1v
new file mode 100755
index 0000000..ec552dd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN01-2: Connection Setup of E-DCH(10m) and E-DCH TTI modification from 2ms to 10ms."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn01_2_struct; // R6-CN01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_1.l1v
new file mode 100755
index 0000000..11def56
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN02-1: E-DCH retransmission (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn02_1_struct; // R6-CN02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_2.l1v
new file mode 100755
index 0000000..966e77e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN02-2: E-DCH retransmission (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn02_2_struct; // R6-CN02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_1.l1v
new file mode 100755
index 0000000..d53f2ce
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_1.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN03-1: ASU procedure for adding a DPCH RL (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn03_1_struct; // R6-CN03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_2.l1v
new file mode 100755
index 0000000..7a131bd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_2.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN03-2: ASU procedure for adding a DPCH RL (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn03_2_struct; // R6-CN03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_1.l1v
new file mode 100755
index 0000000..a7e5291
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_1.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN04-1: ASU procedure for adding an E-DCH RL (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN04_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn04_1_struct; // R6-CN04-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_2.l1v
new file mode 100755
index 0000000..2eef1da
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_2.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN04-2: ASU procedure for adding an E-DCH RL (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN04_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn04_2_struct; // R6-CN04-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_1.l1v
new file mode 100755
index 0000000..3e7c152
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_1.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN05-1: ASU procedure for removing a DPCH RL (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN05_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn05_1_struct; // R6-CN05-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_2.l1v
new file mode 100755
index 0000000..670d09d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_2.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN05-2: ASU procedure for removing a DPCH RL (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN05_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn05_2_struct; // R6-CN05-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_1.l1v
new file mode 100755
index 0000000..fbba4b4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_1.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN06-1: ASU procedure for removing an E-DCH RL (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN06_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn06_1_struct; // R6-CN06-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_2.l1v
new file mode 100755
index 0000000..e7fb168
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_2.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN06-2: ASU procedure for removing an E-DCH RL (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN06_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn06_2_struct; // R6-CN06-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_1.l1v
new file mode 100755
index 0000000..58490e5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_1.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN07-1: ASU procedure for removing an E-DCH RL and change of serving E-DCH cell (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN07_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn07_1_struct; // R6-CN07-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_2.l1v
new file mode 100755
index 0000000..aad3ce9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN07-2: ASU procedure for removing an E-DCH RL and change of serving E-DCH cell (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN07_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn07_2_struct; // R6-CN07-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_1.l1v
new file mode 100755
index 0000000..023c956
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_1.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN08-1: TM HHO to intra-frequency cell (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN08_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn08_1_struct; // R6-CN08-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_2.l1v
new file mode 100755
index 0000000..f2e66e1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN08-2: TM HHO to intra-frequency cell (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN08_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn08_2_struct; // R6-CN08-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_1.l1v
new file mode 100755
index 0000000..62fa99f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_1.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN09-1: TM HHO to intra-frequency cell failed and revert (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN09_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn09_1_struct; // R6-CN09-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_2.l1v
new file mode 100755
index 0000000..93b07c8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN09-2: TM HHO to intra-frequency cell failed and revert (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN09_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn09_2_struct; // R6-CN09-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_1.l1v
new file mode 100755
index 0000000..ea714da
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_1.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN10-1: TR HHO to intra-frequency cell (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN10_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn10_1_struct; // R6-CN10-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_2.l1v
new file mode 100755
index 0000000..9e0428d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_2.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN10-2: TR HHO to intra-frequency cell (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN10_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn10_2_struct; // R6-CN10-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_1.l1v
new file mode 100755
index 0000000..576af07
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_1.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN11-1: TR HHO to intra-frequency cell failed and revert (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN11_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn11_1_struct; // R6-CN11-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_2.l1v
new file mode 100755
index 0000000..be4993d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_2.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN11-2: TR HHO to intra-frequency cell failed and revert (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN11_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn11_2_struct; // R6-CN11-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_1.l1v
new file mode 100755
index 0000000..6522836
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_1.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN12-1: TM HHO to inter-frequency cell (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN12_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn12_1_struct; // R6-CN12-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_2.l1v
new file mode 100755
index 0000000..8b1ff35
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN12-2: TM HHO to inter-frequency cell (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN12_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn12_2_struct; // R6-CN12-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_1.l1v
new file mode 100755
index 0000000..b6fbfbc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_1.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN13-1: TM HHO to inter-frequency cell failed and revert (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN13_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn13_1_struct; // R6-CN13-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_2.l1v
new file mode 100755
index 0000000..5e82fb6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN13-2: TM HHO to inter-frequency cell failed and revert (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN13_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn13_2_struct; // R6-CN13-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_1.l1v
new file mode 100755
index 0000000..a68b1be
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_1.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN14-1: TR HHO to inter-frequency cell (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN14_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn14_1_struct; // R6-CN14-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_2.l1v
new file mode 100755
index 0000000..ba691cd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_2.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN14-2: TR HHO to inter-frequency cell (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN14_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn14_2_struct; // R6-CN14-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_1.l1v
new file mode 100755
index 0000000..cb63b2e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_1.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN15-1: TR HHO to inter-frequency cell failed and revert (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN15_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn14_1_struct; // R6-CN15-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_2.l1v
new file mode 100755
index 0000000..5296855
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_2.l1v
@@ -0,0 +1,388 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN15-2: TR HHO to inter-frequency cell failed and revert (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN15_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn15_2_struct; // R6-CN14-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN16.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN16.l1v
new file mode 100755
index 0000000..4220eeb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN16.l1v
@@ -0,0 +1,255 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN16: Connection Setup of E-DCH without HS-DSCH and E-DCH TTI modification."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN16
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn16_struct; // R6-CN16
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_1.l1v
new file mode 100755
index 0000000..b699a36
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN17-1: E-RGCH added and removed (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN17_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn17_1_struct; // R6-CN17-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@0
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_2.l1v
new file mode 100755
index 0000000..bca8f5c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN17-2: E-RGCH added and removed (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN17_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn17_2_struct; // R6-CN17-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@0
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_1.l1v
new file mode 100755
index 0000000..d145c9b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN18-1: E-DCH transmission (10ms) while F-DPCH is switched to/from DL DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN18_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn18_1_struct; // R6-CN18-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_2.l1v
new file mode 100755
index 0000000..6514ead
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN18-2: E-DCH transmission (2ms) while F-DPCH is switched to/from DL DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN18_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn18_2_struct; // R6-CN18-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_1.l1v
new file mode 100755
index 0000000..d83ebef
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN19-1: Maximum Tx and Rx test while 10ms E-DCH TTI."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN19_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn19_1_struct; // R6-CN19-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@1
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_2.l1v
new file mode 100755
index 0000000..990d3f8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN19-2: Maximum Tx and Rx test while 2ms E-DCH TTI."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN19_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn19_2_struct; // R6-CN19-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@1
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN20.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN20.l1v
new file mode 100755
index 0000000..55f9c4a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN20.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN20: E-DCH connection test with STTD and closed loop transmit diversity."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN20
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn20_struct; // R6-CN20
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN21.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN21.l1v
new file mode 100755
index 0000000..6ff04cf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN21.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN21: TM HHO to intra-frequency cell without synchonization procedure."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN21
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn21_struct; // R6-CN21
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN22.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN22.l1v
new file mode 100755
index 0000000..ec03633
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN22.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN22: E-DCH connection test with F-DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN22
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn22_struct; // R6-CN22
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_1.l1v
new file mode 100755
index 0000000..ff6b579
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN90-1: TC for debugging R6-CN19-1."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN90_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn90_1_struct; // R6-CN90-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] " Choose One of the FOUR standard RMC "
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] " (DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@1
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] "number of HS-SCCH"
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_2.l1v
new file mode 100755
index 0000000..fee4829
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN90-2: TC for debugging R6-CN19-2."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN90_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn90_2_struct; // R6-CN90-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] " Choose One of the FOUR standard RMC "
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] " (DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@1
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] "number of HS-SCCH"
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_1.l1v
new file mode 100755
index 0000000..11605a9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN91-1: TC for debugging R6-CN19-1."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN91_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn91_1_struct; // R6-CN91-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] " Choose One of the FOUR standard RMC "
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] " (DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@1
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] "number of HS-SCCH"
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_2.l1v
new file mode 100755
index 0000000..2f01ebf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][1_E_DCH_CONN]R6-CN91-2: TC for debugging R6-CN19-2."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CN91_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn91_2_struct; // R6-CN91-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] " Choose One of the FOUR standard RMC "
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] " (DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@1
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] "number of HS-SCCH"
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW01_1.l1v
new file mode 100755
index 0000000..38e4d5e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW01-1: UE Transmission Power Headroom (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw01_1_struct; // R6-PW01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@20
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW01_2.l1v
new file mode 100755
index 0000000..a3e2185
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW01-2: UE Transmission Power Headroom (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw01_2_struct; // R6-PW01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@20
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW02.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW02.l1v
new file mode 100755
index 0000000..f9d6d54
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW02.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW02: Power control in the downlink for F-DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw02_struct; // R6-PW02
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW03.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW03.l1v
new file mode 100755
index 0000000..80a797b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW03.l1v
@@ -0,0 +1,342 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW03: Power control in the downlink for F-DPCH - STTD."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-PW03 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw03_struct; // R6-PW03
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+@FDD_DL_TX_STTD
+FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW04.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW04.l1v
new file mode 100755
index 0000000..365b136
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW04.l1v
@@ -0,0 +1,344 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW04: Power control in the downlink for F-DPCH - compressed mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw04_struct; // R6-PW04
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW05.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW05.l1v
new file mode 100755
index 0000000..8271235
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW05.l1v
@@ -0,0 +1,351 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW05: Power control in the downlink for F-DPCH - SHO condition."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSF_fdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw05_struct; // R6-PW05
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH for BTS1: 0~SF-1"
+0~255
+@14
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSF_fdpch_rl2] "(DCH) OVSF code of F-DPCH for BTS2: 0~SF-1 "
+0~255
+@14
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_1.l1v
new file mode 100755
index 0000000..ea91cba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_1.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW06-1: Post verification fail with DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW06_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+} udps_r6_pw06_1_struct; // R6-PW06-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_2.l1v
new file mode 100755
index 0000000..543b3fd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW06-2: Post verification fail with DPCH, HS-DSCH and E-DCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW06_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw06_2_struct; // R6-PW06-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_3.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_3.l1v
new file mode 100755
index 0000000..4a34f68
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW06_3.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW06-3: Post verification fail with F-DPCH, HS-DSCH and E-DCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW06_3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSF_fdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw06_3_struct; // R6-PW06-3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH for BTS1: 0~SF-1"
+0~255
+@14
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSF_fdpch_rl2] "(DCH) OVSF code of F-DPCH for BTS2: 0~SF-1 "
+0~255
+@14
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@9
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@10
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code of BTS1:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_1.l1v
new file mode 100755
index 0000000..cd120b8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_1.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW07-1: Post verification succeed with DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW07_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+} udps_r6_pw07_1_struct; // R6-PW07-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_2.l1v
new file mode 100755
index 0000000..1ad5da1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW07-2: Post verification succeed with DPCH, HS-DSCH and E-DCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW07_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw07_2_struct; // R6-PW07-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_3.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_3.l1v
new file mode 100755
index 0000000..26ee4f2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW07_3.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW07-3: Post verification succeed with F-DPCH, HS-DSCH and E-DCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW07_3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSF_fdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw07_3_struct; // R6-PW07-3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH for BTS1: 0~SF-1"
+0~255
+@14
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSF_fdpch_rl2] "(DCH) OVSF code of F-DPCH for BTS2: 0~SF-1 "
+0~255
+@14
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@9
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@10
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code of BTS1:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_1.l1v
new file mode 100755
index 0000000..93ab0b8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_1.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW08-1: Post verification fail and sync succeed with DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW08_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+} udps_r6_pw08_1_struct; // R6-PW08-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_2.l1v
new file mode 100755
index 0000000..eabfa6d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW08-2: Post verification fail and sync succeed with DPCH, HS-DSCH and E-DCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW08_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw08_2_struct; // R6-PW08-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_3.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_3.l1v
new file mode 100755
index 0000000..9f8415d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/2_POWER/udps_R6_PW08_3.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][2_POWER]R6-PW08-3: Post verification fail and sync succeed with F-DPCH, HS-DSCH and E-DCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_PW08_3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSF_fdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_pw08_3_struct; // R6-PW08-3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH for BTS1: 0~SF-1"
+0~255
+@14
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSF_fdpch_rl2] "(DCH) OVSF code of F-DPCH for BTS2: 0~SF-1 "
+0~255
+@14
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@9
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@10
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code of BTS1:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM01_1.l1v
new file mode 100755
index 0000000..948e09a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM01_1.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM01-1: E-DCH transmission during compressed mode (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm01_1_struct; // R6-CM01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM01_2.l1v
new file mode 100755
index 0000000..0facbca
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM01_2.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM01-2: E-DCH transmission during compressed mode (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm01_2_struct; // R6-CM01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM02_1.l1v
new file mode 100755
index 0000000..c32782f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM02_1.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM02-1: E-DCH transmission during compressed mode (10ms TTI) - two successive CM frames TG."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm02_1_struct; // R6-CM02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM02_2.l1v
new file mode 100755
index 0000000..68e29ab
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM02_2.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM02-2: E-DCH transmission during compressed mode (2ms TTI) - two successive CM frames TG."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm02_2_struct; // R6-CM02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM03_1.l1v
new file mode 100755
index 0000000..0fb7ae9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM03_1.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM03-1: E-DCH transmission during compressed mode (10ms TTI) - double frame TG."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm03_1_struct; // R6-CM03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM03_2.l1v
new file mode 100755
index 0000000..47ad8f7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM03_2.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM03-2: E-DCH transmission during compressed mode (2ms TTI) - double frame TG."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm03_2_struct; // R6-CM03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM04.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM04.l1v
new file mode 100755
index 0000000..44bf0cc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM04.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM04: E-DCH retransmission during compressed mode (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm04_struct; // R6-CM04
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM05_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM05_1.l1v
new file mode 100755
index 0000000..0eda4ee
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM05_1.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM05-1: E-DCH transmission(10ms TTI) in compressed mode while CM method of HLS and frame type B."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM05_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //udps_RMC_type_struct udps_RMC_type;
+ udps_RMC_PxxxK_type_struct udps_RMC_PxxxK_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm05_1_struct; // R6-CM05-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_PxxxK_type] "Choose One of RMC P32K P64K P128K P384K"
+@RMC_P32K
+RMC_P64K
+RMC_P128K
+RMC_P384K
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] " (DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@3
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM05_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM05_2.l1v
new file mode 100755
index 0000000..f875950
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/3_CM/udps_R6_CM05_2.l1v
@@ -0,0 +1,375 @@
+{ Validation }
+Title = "[12_HSUPA_R6][3_CM]R6-CM05-2: E-DCH transmission(2ms TTI) in compressed mode while CM method of HLS and frame type B."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CM05_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //udps_RMC_type_struct udps_RMC_type;
+ udps_RMC_PxxxK_type_struct udps_RMC_PxxxK_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cm05_2_struct; // R6-CM05-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_PxxxK_type] "Choose One of RMC P32K P64K P128K P384K"
+@RMC_P32K
+RMC_P64K
+RMC_P128K
+RMC_P384K
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] " (DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@3
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_1.l1v
new file mode 100755
index 0000000..4fdc965
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-AG01-1: Demodulation of E-AGCH (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AG01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_ag01_1_struct; // R6-AG01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_2.l1v
new file mode 100755
index 0000000..d715da3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-AG01-2: Demodulation of E-AGCH (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AG01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_ag01_2_struct; // R6-AG01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_1.l1v
new file mode 100755
index 0000000..cfd2e47
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_1.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-AG02-1: Demodulation of E-AGCH (10ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AG02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_ag02_1_struct; // R6-AG02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_2.l1v
new file mode 100755
index 0000000..3fe0040
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_2.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-AG02-2: Demodulation of E-AGCH (2ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AG02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_ag02_2_struct; // R6-AG02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_1.l1v
new file mode 100755
index 0000000..f2a6703
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-AG03-1: Demodulation of E-AGCH (10ms TTI) after E-RNTI modification."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AG03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_ag03_1_struct; // R6-AG03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@52428
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_2.l1v
new file mode 100755
index 0000000..5cc878a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-AG03-2: Demodulation of E-AGCH (2ms TTI) after E-RNTI modification."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AG03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_ag03_2_struct; // R6-AG03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@52428
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_1.l1v
new file mode 100755
index 0000000..1bc7f71
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI01-1: Detection of E-HICH in single RL conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi01_1_struct; // R6-HI01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_2.l1v
new file mode 100755
index 0000000..2730114
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI01-2: Detection of E-HICH in single RL conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi01_2_struct; // R6-HI01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_1.l1v
new file mode 100755
index 0000000..c5153b4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_1.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI02-1: Detection of E-HICH from cell in RLS not containing the Serving E-DCH cell in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi02_1_struct; // R6-HI02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_2.l1v
new file mode 100755
index 0000000..6524a05
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_2.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI02-2: Detection of E-HICH from cell in RLS not containing the Serving E-DCH cell in SHO conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi02_2_struct; // R6-HI02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_1.l1v
new file mode 100755
index 0000000..2df2aa7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_1.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI03-1: Detection of E-HICH from cell in RLS containing the Serving E-DCH cell in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi03_1_struct; // R6-HI03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_2.l1v
new file mode 100755
index 0000000..47f9938
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_2.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI03-2: Detection of E-HICH from cell in RLS containing the Serving E-DCH cell in SHO conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi03_2_struct; // R6-HI03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_1.l1v
new file mode 100755
index 0000000..1a06108
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_1.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI04-1: Detection of E-HICH in single RL conditions (10ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI04_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi04_1_struct; // R6-HI04-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_2.l1v
new file mode 100755
index 0000000..56a0ac8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_2.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-HI04-2: Detection of E-HICH in single RL conditions (2ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_HI04_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_hi04_2_struct; // R6-HI04-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_1.l1v
new file mode 100755
index 0000000..1ca4c3d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-RG01-1: Detection of E-RGCH in single RL conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_RG01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_rg01_1_struct; // R6-RG01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_2.l1v
new file mode 100755
index 0000000..2abe9fd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-RG01-2: Detection of E-RGCH in single RL conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_RG01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_rg01_2_struct; // R6-RG01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG02.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG02.l1v
new file mode 100755
index 0000000..5615d50
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG02.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-RG02: Detection of E-RGCH from cell not in serving E-DCH RLS in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_RG02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_rg02_struct; // R6-RG02
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_1.l1v
new file mode 100755
index 0000000..b5248b0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_1.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-RG03-1: Detection of E-RGCH from cell in serving E-DCH RLS in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_RG03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_rg03_1_struct; // R6-RG03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_2.l1v
new file mode 100755
index 0000000..227eaac
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_2.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-RG03-2: Detection of E-RGCH from cell in serving E-DCH RLS in SHO conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_RG03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_rg03_2_struct; // R6-RG03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_1.l1v
new file mode 100755
index 0000000..a0b83fe
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_1.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-RG04-1: Detection of E-RGCH in single RL conditions (10ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_RG04_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_rg04_1_struct; // R6-RG04-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_2.l1v
new file mode 100755
index 0000000..0a039a1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_2.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][4_E_AG_HI_RG]R6-RG04-2: Detection of E-RGCH in single RL conditions (2ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_RG04_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_rg04_2_struct; // R6-RG04-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF01_1.l1v
new file mode 100755
index 0000000..02907c8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][5_E_TFC]R6-TF01-1: E-TFC restriction while E-DCH TTI is 10ms."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_TF01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_tf01_1_struct; // R6-TF01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF01_2.l1v
new file mode 100755
index 0000000..fc33d4d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][5_E_TFC]R6-TF01-2: E-TFC restriction while E-DCH TTI is 2ms."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_TF01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_tf01_2_struct; // R6-TF01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF02_1.l1v
new file mode 100755
index 0000000..07e432d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF02_1.l1v
@@ -0,0 +1,343 @@
+{ Validation }
+Title = "[12_HSUPA_R6][5_E_TFC]R6-TF02-1: E-TFC switch test while E-DCH TTI is 10ms."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_TF02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+} udps_r6_tf02_1_struct; // R6-TF02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF02_2.l1v
new file mode 100755
index 0000000..efe01a3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/5_E_TFC/udps_R6_TF02_2.l1v
@@ -0,0 +1,343 @@
+{ Validation }
+Title = "[12_HSUPA_R6][5_E_TFC]R6-TF02-2: E-TFC switch test while E-DCH TTI is 2ms."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_TF02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+
+} udps_r6_tf02_2_struct; // R6-TF02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CD01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CD01_1.l1v
new file mode 100755
index 0000000..9e68af8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CD01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CD01-1: Maximum Tx and Rx test while 10ms E-DCH TTI."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CD01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_cn19_1_struct; // R6-CN19-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+RMC_12_2
+@RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@1
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] " PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_1.l1v
new file mode 100755
index 0000000..64a39d8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-AG01-1: CSD performance - Demodulation of E-AGCH (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_AG01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_ag01_1_struct; // R6-CSD-AG01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_2.l1v
new file mode 100755
index 0000000..820c71d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-AG01-2: CSD performance - Demodulation of E-AGCH (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_AG01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_ag01_2_struct; // R6-CSD-AG01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_1.l1v
new file mode 100755
index 0000000..97f6965
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_1.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-AG02-1: CSD performance - Demodulation of E-AGCH (10ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_AG02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_ag02_1_struct; // R6-CSD-AG02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_2.l1v
new file mode 100755
index 0000000..8e5063e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_2.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-AG02-2: CSD performance - Demodulation of E-AGCH (2ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_AG02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_ag02_2_struct; // R6-CSD-AG02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_1.l1v
new file mode 100755
index 0000000..fccb02d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI01-1: CSD performance - Detection of E-HICH in single RL conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi01_1_struct; // R6-CSD-HI01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_2.l1v
new file mode 100755
index 0000000..3168348
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI01-2: CSD performance - Detection of E-HICH in single RL conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi01_2_struct; // R6-CSD-HI01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_1.l1v
new file mode 100755
index 0000000..f5f8df7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_1.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI02-1: CSD performance - Detection of E-HICH from cell in RLS not containing the Serving E-DCH cell in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi02_1_struct; // R6-CSD-HI02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_2.l1v
new file mode 100755
index 0000000..b2d44ea
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_2.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI02-2: CSD performance - Detection of E-HICH from cell in RLS not containing the Serving E-DCH cell in SHO conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi02_2_struct; // R6-CSD-HI02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_1.l1v
new file mode 100755
index 0000000..9273ea7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_1.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI03-1: CSD performance - Detection of E-HICH from cell in RLS containing the Serving E-DCH cell in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi03_1_struct; // R6-CSD-HI03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_2.l1v
new file mode 100755
index 0000000..3f1d89f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_2.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI03-2: CSD performance - Detection of E-HICH from cell in RLS containing the Serving E-DCH cell in SHO conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi03_2_struct; // R6-CSD-HI03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_1.l1v
new file mode 100755
index 0000000..febe511
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_1.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI04-1: CSD performance - Detection of E-HICH in single RL conditions (10ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI04_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi04_1_struct; // R6-CSD-HI04-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_2.l1v
new file mode 100755
index 0000000..dc9211b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_2.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-HI04-2: CSD performance - Detection of E-HICH in single RL conditions (2ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_HI04_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_hi04_2_struct; // R6-CSD-HI04-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW02.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW02.l1v
new file mode 100755
index 0000000..710b780
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW02.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-PW02: CSD performance - Power control in the downlink for F-DPCH."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_PW02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_pw02_struct; // R6-CSD-PW02
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW03.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW03.l1v
new file mode 100755
index 0000000..dacbcf1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW03.l1v
@@ -0,0 +1,342 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-PW03: CSD performance - Power control in the downlink for F-DPCH - STTD."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_PW03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-PW03 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_pw03_struct; // R6-CSD-PW03
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+@FDD_DL_TX_STTD
+FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_1.l1v
new file mode 100755
index 0000000..56cd07a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_1.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-RG01-1: CSD performance - Detection of E-RGCH in single RL conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_RG01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_rg01_1_struct; // R6-CSD-RG01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_2.l1v
new file mode 100755
index 0000000..6504b9e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_2.l1v
@@ -0,0 +1,336 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-RG01-2: CSD performance - Detection of E-RGCH in single RL conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_RG01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_rg01_2_struct; // R6-CSD-RG01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG02.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG02.l1v
new file mode 100755
index 0000000..18f64cf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG02.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-RG02: CSD performance - Detection of E-RGCH from cell not in serving E-DCH RLS in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_RG02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_rg02_struct; // R6-CSD-RG02
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_1.l1v
new file mode 100755
index 0000000..26462ab
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_1.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-RG03-1: CSD performance - Detection of E-RGCH from cell in serving E-DCH RLS in SHO conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_RG03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_rg03_1_struct; // R6-CSD-RG03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_2.l1v
new file mode 100755
index 0000000..cabaa7d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_2.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-RG03-2: CSD performance - Detection of E-RGCH from cell in serving E-DCH RLS in SHO conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_RG03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_rg03_2_struct; // R6-CSD-RG03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@1
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@1
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@1
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@1
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_1.l1v
new file mode 100755
index 0000000..8c8bc1c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_1.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-RG04-1: CSD performance - Detection of E-RGCH in single RL conditions (10ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_RG04_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_rg04_1_struct; // R6-CSD-RG04-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_2.l1v
new file mode 100755
index 0000000..3550583
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_2.l1v
@@ -0,0 +1,345 @@
+{ Validation }
+Title = "[12_HSUPA_R6][6_CSD_REQ]R6-CSD-RG04-2: CSD performance - Detection of E-RGCH in single RL conditions (2ms TTI) - STTD performance."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_CSD_RG04_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for R6-CN20 only (Tx DivirsityL CLTD)
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_csd_rg04_2_struct; // R6-CSD-RG04-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+FDD_DL_TX_STTD
+@FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~1
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_1.l1v
new file mode 100755
index 0000000..9dbb9b9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_1.l1v
@@ -0,0 +1,302 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL01-1: Agilent 8960 FDD test: RMC12.2k +HSPA (10ms E-DCH TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ kal_uint8 beta_c; // for HSDPA FDD test (TS34.121 5.2A)
+ kal_uint8 beta_d; // for HSDPA FDD test (TS34.121 5.2A)
+
+ //E-DCH parameters
+ kal_uint8 edch_target_etfci; //E-TFCI 0~127 128: for E-TFCI switching test 129: for all E-TFCI blocked test
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+
+ kal_uint8 edpcch_po; // E-DPCCH/DPCCH power offset. 0~8
+ kal_uint8 hsupa_sub_test; // sub-test id used to configure ref E-TFCI (TS34.121 5.2B)
+} udps_r6_agl01_1_struct; // R6-AGL01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@20
+
+
+[beta_c] "beta_c of UL DPCH (TF1,TF0)"
+1~15
+@8
+
+[beta_d] "beta_d of UL DPCH (TF1,TF0)"
+1~15
+@15
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[edch_target_etfci] "E-TFCI under test (0~127,128:E-TFCI switch,129:all E-TFCI blocked)"
+0~129
+@45
+
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~1
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+22~22
+@22
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+1~1
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+1~1
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~0
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+21~21
+@21
+
+[edpcch_po] "E-DPCCH/DPCCH power offset. (0~8)"
+0~8
+@5
+
+[hsupa_sub_test] "HSUPA sub-test ID (1~5)"
+1~5
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_2.l1v
new file mode 100755
index 0000000..fb46019
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_2.l1v
@@ -0,0 +1,302 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL01-2: Agilent 8960 FDD test: RMC12.2k +HSPA (2ms E-DCH TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ kal_uint8 beta_c; // for HSDPA FDD test (TS34.121 5.2A)
+ kal_uint8 beta_d; // for HSDPA FDD test (TS34.121 5.2A)
+
+ //E-DCH parameters
+ kal_uint8 edch_target_etfci; //E-TFCI 0~127 128: for E-TFCI switching test 129: for all E-TFCI blocked test
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+
+ kal_uint8 edpcch_po; // E-DPCCH/DPCCH power offset. 0~8
+ kal_uint8 hsupa_sub_test; // sub-test id used to configure ref E-TFCI (TS34.121 5.2B)
+} udps_r6_agl01_2_struct; // R6-AGL01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@20
+
+
+[beta_c] "beta_c of UL DPCH (TF1,TF0)"
+1~15
+@8
+
+[beta_d] "beta_d of UL DPCH (TF1,TF0)"
+1~15
+@15
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[edch_target_etfci] "E-TFCI under test (0~127,128:E-TFCI switch,129:all E-TFCI blocked)"
+0~129
+@60
+
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~1
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+22~22
+@22
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+1~1
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+1~1
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~0
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+21~21
+@21
+
+[edpcch_po] "E-DPCCH/DPCCH power offset. (0~8)"
+0~8
+@5
+
+[hsupa_sub_test] "HSUPA sub-test ID (1~5)"
+1~5
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_1.l1v
new file mode 100755
index 0000000..e836215
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_1.l1v
@@ -0,0 +1,293 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL02-1: Agilent 8960 FDD test: HSPA (10ms E-DCH TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ kal_uint8 beta_c; // for HSDPA FDD test (TS34.121 5.2A)
+ kal_uint8 beta_d; // for HSDPA FDD test (TS34.121 5.2A)
+
+ //E-DCH parameters
+ kal_uint8 edch_target_etfci; //E-TFCI 0~127 128: for E-TFCI switching test 129: for all E-TFCI blocked test
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+
+ kal_uint8 edpcch_po; // E-DPCCH/DPCCH power offset. 0~8
+ kal_uint8 hsupa_sub_test; // sub-test id used to configure ref E-TFCI (TS34.121 5.2B)
+} udps_r6_agl01_1_struct; // R6-AGL01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@40
+
+[beta_c] "beta_c of UL DPCH (TF1,TF0)"
+1~15
+@8
+
+[beta_d] "beta_d of UL DPCH (TF1,TF0)"
+1~15
+@15
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[edch_target_etfci] "E-TFCI under test (0~127,128:E-TFCI switch,129:all E-TFCI blocked)"
+0~129
+@45
+
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~1
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+22~22
+@22
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+1~1
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+1~1
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~0
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+21~21
+@21
+
+[edpcch_po] "E-DPCCH/DPCCH power offset. (0~8)"
+0~8
+@5
+
+[hsupa_sub_test] "HSUPA sub-test ID (1~5)"
+1~5
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_2.l1v
new file mode 100755
index 0000000..d71d2b2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_2.l1v
@@ -0,0 +1,294 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL02-2: Agilent 8960 FDD test: HSPA (2ms E-DCH TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ kal_uint8 beta_c; // for HSDPA FDD test (TS34.121 5.2A)
+ kal_uint8 beta_d; // for HSDPA FDD test (TS34.121 5.2A)
+
+ //E-DCH parameters
+ kal_uint8 edch_target_etfci; //E-TFCI 0~127 128: for E-TFCI switching test 129: for all E-TFCI blocked test
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+
+ kal_uint8 edpcch_po; // E-DPCCH/DPCCH power offset. 0~8
+ kal_uint8 hsupa_sub_test; // sub-test id used to configure ref E-TFCI (TS34.121 5.2B)
+} udps_r6_agl01_2_struct; // R6-AGL01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@40
+
+
+[beta_c] "beta_c of UL DPCH (TF1,TF0)"
+1~15
+@8
+
+[beta_d] "beta_d of UL DPCH (TF1,TF0)"
+1~15
+@15
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[edch_target_etfci] "E-TFCI under test (0~127,128:E-TFCI switch,129:all E-TFCI blocked)"
+0~129
+@60
+
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~1
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+22~22
+@22
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+1~1
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+1~1
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~0
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+21~21
+@21
+
+[edpcch_po] "E-DPCCH/DPCCH power offset. (0~8)"
+0~8
+@5
+
+[hsupa_sub_test] "HSUPA sub-test ID (1~5)"
+1~5
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_1.l1v
new file mode 100755
index 0000000..e2072a7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_1.l1v
@@ -0,0 +1,341 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL-AG01-1: CSD performance on 8960 - Demodulation of E-AGCH (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL_AG01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint32 EAgchTestSampleNum; // Number of E-AGCH test sample
+} udps_r6_agl_ag01_1_struct; // R6-AGL-AG01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell "
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num. "
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@20
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH"
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255) "
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127) "
+0~127
+@22
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code "
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+@FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
+
+[EAgchTestSampleNum] "Number of E-AGCH test sample: Integer(1..2000000000)"
+1~2000000000
+@1000
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_2.l1v
new file mode 100755
index 0000000..8bcd9e7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_2.l1v
@@ -0,0 +1,341 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL-AG01-2: CSD performance on 8960 - Demodulation of E-AGCH (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL_AG01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint32 EAgchTestSampleNum; // Number of E-AGCH test sample
+} udps_r6_agl_ag01_2_struct; // R6-AGL-AG01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell "
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num. "
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@20
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH"
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255) "
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127) "
+0~127
+@22
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code "
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+@FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
+
+[EAgchTestSampleNum] "Number of E-AGCH test sample: Integer(1..2000000000)"
+1~2000000000
+@1000
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_ACK.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_ACK.l1v
new file mode 100755
index 0000000..3b5f6e6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_ACK.l1v
@@ -0,0 +1,341 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL-HI01-1-ACK: CSD performance on 8960 - Detection of E-HICH ACK in single RL conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL_HI01_1_ACK
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint32 EHichTestSampleNum; // Number of E-HICH test sample
+} udps_r6_agl_hi01_1_ack_struct; // R6-AGL-HI01-1-ACK
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell "
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num. "
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@20
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH"
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255) "
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127) "
+0~127
+@22
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code "
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+@FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
+
+[EHichTestSampleNum] "Number of E-HICH test sample: Integer(1..2000000000)"
+1~2000000000
+@1000
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_FALSE_ACK.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_FALSE_ACK.l1v
new file mode 100755
index 0000000..0ec50cf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_FALSE_ACK.l1v
@@ -0,0 +1,341 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL-HI01-1-FALSE-ACK: CSD performance on 8960 - Detection of E-HICH DTX in single RL conditions (10ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL_HI01_1_FALSE_ACK
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint32 EHichTestSampleNum; // Number of E-HICH test sample
+} udps_r6_agl_hi01_1_false_ack_struct; // R6-AGL-HI01-1-FALSE-ACK
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell "
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num. "
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@20
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH"
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255) "
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@23
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code "
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+@FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
+
+[EHichTestSampleNum] "Number of E-HICH test sample: Integer(1..2000000000)"
+1~2000000000
+@1000
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_ACK.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_ACK.l1v
new file mode 100755
index 0000000..ca539fb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_ACK.l1v
@@ -0,0 +1,341 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL-HI01-2-ACK: CSD performance on 8960 - Detection of E-HICH ACK in single RL conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL_HI01_2_ACK
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint32 EHichTestSampleNum; // Number of E-HICH test sample
+} udps_r6_agl_hi01_2_ack_struct; // R6-AGL-HI01-2-ACK
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell "
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num. "
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@20
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH"
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255) "
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127) "
+0~127
+@22
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code "
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+@FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
+
+[EHichTestSampleNum] "Number of E-HICH test sample: Integer(1..2000000000)"
+1~2000000000
+@1000
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_FALSE_ACK.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_FALSE_ACK.l1v
new file mode 100755
index 0000000..1b04789
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_FALSE_ACK.l1v
@@ -0,0 +1,341 @@
+{ Validation }
+Title = "[12_HSUPA_R6][7_AGL8960]R6-AGL-HI01-2-FALSE-ACK: CSD performance on 8960 - Detection of E-HICH DTX in single RL conditions (2ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_AGL_HI01_2_FALSE_ACK
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint32 EHichTestSampleNum; // Number of E-HICH test sample
+} udps_r6_agl_hi01_2_false_ack_struct; // R6-AGL-HI01-2-FALSE-ACK
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell "
+0~511
+@0
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num. "
+0~16777215
+@0
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1 "
+0~511
+@20
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH"
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@2
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@6
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@9
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@10
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255) "
+0~255
+@42
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@23
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code "
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+@FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@21
+
+[EHichTestSampleNum] "Number of E-HICH test sample: Integer(1..2000000000)"
+1~2000000000
+@1000
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME01_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME01_1.l1v
new file mode 100755
index 0000000..5f0161e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME01_1.l1v
@@ -0,0 +1,354 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME01-1: GSM measurements with E-DCH connection(10 ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_me01_1_struct; // R6-ME01-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME01_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME01_2.l1v
new file mode 100755
index 0000000..f780886
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME01_2.l1v
@@ -0,0 +1,354 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME01-2: GSM measurements with E-DCH connection(2 ms TTI)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_me01_2_struct; // R6-ME01-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_1.l1v
new file mode 100755
index 0000000..373725b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_1.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME02-1: Event 6C measurement report (with DPCH)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME02_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+} udps_r6_me02_1_struct; // R6-ME02-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_2.l1v
new file mode 100755
index 0000000..743c165
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME02-2: Event 6C measurement report (with DPCH, HS-DSCH and E-DCH)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME02_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_me02_2_struct; // R6-ME02-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@0
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_3.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_3.l1v
new file mode 100755
index 0000000..e61f604
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME02_3.l1v
@@ -0,0 +1,377 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME02-3: Event 6C measurement report (with F-DPCH, HS-DSCH and E-DCH)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME02_3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSF_fdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_me02_3_struct; // R6-ME02-3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH for BTS1: 0~SF-1"
+0~255
+@14
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSF_fdpch_rl2] "(DCH) OVSF code of F-DPCH for BTS2: 0~SF-1 "
+0~255
+@14
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@9
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@10
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@0
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code of BTS1:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_1.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_1.l1v
new file mode 100755
index 0000000..6f232af
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_1.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME03-1: Event 6D measurement report (with DPCH)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME03_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+} udps_r6_me03_1_struct; // R6-ME03-1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_2.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_2.l1v
new file mode 100755
index 0000000..44ea041
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_2.l1v
@@ -0,0 +1,384 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME03-2: Event 6D measurement report (with DPCH, HS-DSCH and E-DCH)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME03_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_me03_2_struct; // R6-ME03-2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_3.l1v b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_3.l1v
new file mode 100755
index 0000000..8087d41
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/12_HSUPA_R6/8_MEAS/udps_R6_ME03_3.l1v
@@ -0,0 +1,377 @@
+{ Validation }
+Title = "[12_HSUPA_R6][8_MEAS]R6-ME03-3: Event 6D measurement report (with F-DPCH, HS-DSCH and E-DCH)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R6_ME03_3
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSF_fdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+} udps_r6_me03_3_struct; // R6-ME03-3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@200
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH for BTS1: 0~SF-1"
+0~255
+@14
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSF_fdpch_rl2] "(DCH) OVSF code of F-DPCH for BTS2: 0~SF-1 "
+0~255
+@14
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@9
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@10
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code of BTS1:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_01.l1v
new file mode 100755
index 0000000..2caf051
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_01.l1v
@@ -0,0 +1,353 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-01: DRX Behavior Check for HSSCCH/HSPDSCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_01_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r7_cpc_01_par_idx] "cpc parameters 1~4"
+1~4
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_02.l1v
new file mode 100755
index 0000000..985b791
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_02.l1v
@@ -0,0 +1,351 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-02: DRX Check for E-AGCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_02_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+[r7_cpc_02_par_idx] "cpc parameters 1~2"
+1~2
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_03.l1v
new file mode 100755
index 0000000..6c537fd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_03.l1v
@@ -0,0 +1,350 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-03: DRX Check for E-RGCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_03_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+[r7_cpc_03_par_idx] "cpc parameters 1~2"
+1~2
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_04.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_04.l1v
new file mode 100755
index 0000000..c6f0a28
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_04.l1v
@@ -0,0 +1,348 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-04: DRX pattern overlaps with gap"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r7_cpc_04_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_05.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_05.l1v
new file mode 100755
index 0000000..7860001
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_05.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-05: DTX Behavior Check with E-DCH data "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_05_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+[r7_cpc_05_par_idx] "cpc parameters 1~2"
+1~2
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_06.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_06.l1v
new file mode 100755
index 0000000..950af50
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_06.l1v
@@ -0,0 +1,350 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-06: DTX Behavior Check without E-DCH data "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_06_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+[r7_cpc_06_par_idx] "cpc parameters 1~2"
+1~2
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_07.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_07.l1v
new file mode 100755
index 0000000..ceca06a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_07.l1v
@@ -0,0 +1,350 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-07: DTX on /DRX off Behavior Check with E-DCH data (HS-DSCH data on) "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_07_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+[r7_cpc_07_par_idx] "cpc parameters 1~2"
+1~2
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_08.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_08.l1v
new file mode 100755
index 0000000..518e36f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_08.l1v
@@ -0,0 +1,350 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-08: DTX Behavior Check without E-DCH data with Post Verfication Successfully "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_08_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+[r7_cpc_08_par_idx] "cpc parameters 1~2"
+1~2
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_09.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_09.l1v
new file mode 100755
index 0000000..2cbffd8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_09.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-09: DTX pattern overlaps with gap"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_09_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+[r7_cpc_09_par_idx] "cpc parameters 1~2"
+1~2
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_10.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_10.l1v
new file mode 100755
index 0000000..02ff25b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_10.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-10: DRX Order Command Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r7_cpc_10_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_11.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_11.l1v
new file mode 100755
index 0000000..488257b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_11.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-11: DTX/DRX Order Command Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r7_cpc_11_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_12.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_12.l1v
new file mode 100755
index 0000000..070456a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_12.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-12: CPC switch Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r7_cpc_12_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_13.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_13.l1v
new file mode 100755
index 0000000..7f4d6eb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_13.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-13: CPC Modification Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_13
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r7_cpc_13_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_13_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+FDD_EDCH_2SF2AND2SF4_16QAM
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_14.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_14.l1v
new file mode 100755
index 0000000..1433e72
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_14.l1v
@@ -0,0 +1,389 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-14: CPC behavior check after HHO to inter-frequency cell successfully. "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_14
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ //kal_uint8 r7_cpc_14_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_14_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_15.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_15.l1v
new file mode 100755
index 0000000..6c19219
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_15.l1v
@@ -0,0 +1,389 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-15: CPC behavior check after HHO to inter-frequency cell failed and reverts. "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_15
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ //kal_uint8 r7_cpc_15_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_15_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@1
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_16.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_16.l1v
new file mode 100755
index 0000000..3aad2aa
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_CPC_16.l1v
@@ -0,0 +1,354 @@
+{ Validation }
+Title = "[13_R7R8]R7-CPC-16: CPC with SHO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_CPC_16
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+ //kal_uint16 cells_tm; // for SHO delay only
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ kal_uint8 cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, @FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+} udps_r7_cpc_16_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_01.l1v
new file mode 100755
index 0000000..1ba69f5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_01.l1v
@@ -0,0 +1,151 @@
+{ Validation }
+Title = "[13_R7R8]R7_EFACH_01: HS-DSCH setup in FDD_CELL_FACH state with FMO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_EFACH_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ //udps_RMC_type_struct udps_RMC_type;
+
+
+
+ //kal_uint8 r7_efach_01_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_efach_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_02.l1v
new file mode 100755
index 0000000..9f0654f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_02.l1v
@@ -0,0 +1,109 @@
+{ Validation }
+Title = "[13_R7R8]R7_EFACH_02: HS-DSCH setup in FDD_CELL_PCH state without dedicated H-RNTI"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_EFACH_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ kal_uint8 DRX_cycle2_length;
+ kal_uint16 drx_cycle2_time; // if it's not 0. UL1 shall use pich_drx_2 for PICH receptin, else shall directly use pich_drx for PICH reception. 0~5120 ms
+
+ //kal_uint8 r7_efach_02_par_idx;
+ kal_uint8 pcch_tx_num;
+ kal_uint8 rxd_mode;
+}udps_r7_efach_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@2
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[DRX_cycle2_length] "DRX cycle2 length for PICH, (6~9)"
+DRX6 6
+DRX7 7
+DRX8 8
+@DRX9 9
+
+[drx_cycle2_time] "drx_cycle2_time 0~5120ms"
+0~5120
+@0
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[pcch_tx_num] "pcch tx number 1~5"
+1~5
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_03.l1v
new file mode 100755
index 0000000..e696186
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_03.l1v
@@ -0,0 +1,106 @@
+{ Validation }
+Title = "[13_R7R8]R7_EFACH_03: HS-DSCH setup in FDD_CELL_PCH state with dedicated H-RNTI"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_EFACH_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ kal_uint8 DRX_cycle2_length;
+ kal_uint16 drx_cycle2_time; // if it's not 0. UL1 shall use pich_drx_2 for PICH receptin, else shall directly use pich_drx for PICH reception. 0~5120 ms
+
+ //kal_uint8 r7_efach_03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_efach_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@2
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[DRX_cycle2_length] "DRX cycle2 length for PICH, (6~9)"
+DRX6 6
+DRX7 7
+DRX8 8
+@DRX9 9
+
+[drx_cycle2_time] "drx_cycle2_time 0~5120ms"
+0~5120
+@0
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_04.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_04.l1v
new file mode 100755
index 0000000..4cdc903
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_04.l1v
@@ -0,0 +1,141 @@
+{ Validation }
+Title = "[13_R7R8]R7_EFACH_04: Paging On DRX Cycle2 Period"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_EFACH_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint16 OVSFpich;
+
+ // kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ kal_uint8 DRX_cycle2_length;
+ kal_uint16 drx_cycle2_time; // if it's not 0. UL1 shall use pich_drx_2 for PICH receptin, else shall directly use pich_drx for PICH reception. 0~5120 ms
+
+
+ //kal_uint8 r7_hsdpa_06_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_hsdpa_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+// Idle parameters
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@2
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[DRX_cycle2_length] "DRX cycle2 length for PICH, (6~9)"
+@DRX6 6
+
+[drx_cycle2_time] "drx_cycle2_time 0~5120ms"
+0~5120
+@5120
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_05.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_05.l1v
new file mode 100755
index 0000000..a463e90
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_05.l1v
@@ -0,0 +1,151 @@
+{ Validation }
+Title = "[13_R7R8]R7_EFACH_05: Paging On DRX Cycle2 Period without HS-DSCH on EFACH state"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_EFACH_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+
+
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_uint8 DRX_cycle2_length;
+ kal_uint16 drx_cycle2_time;
+
+
+ kal_uint8 r7_efach_05_par_idx;
+ kal_uint8 rxd_mode;
+
+} udps_r7_efach_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+/*for PCH*/
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@3
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@2
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+[DRX_cycle2_length] "DRX cycle2 length for PICH, (6~9)"
+@DRX6 6
+
+
+[drx_cycle2_time] "drx_cycle2_time 0~5120ms"
+0~5120
+@5120
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_06.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_06.l1v
new file mode 100755
index 0000000..1b477c3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_06.l1v
@@ -0,0 +1,106 @@
+{ Validation }
+Title = "[13_R7R8]R7_EFACH_06: HS-DSCH setup in FDD_CELL_PCH state with dedicated H-RNTI and BCCH HRNTI"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_EFACH_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ kal_uint8 DRX_cycle2_length;
+ kal_uint16 drx_cycle2_time; // if it's not 0. UL1 shall use pich_drx_2 for PICH receptin, else shall directly use pich_drx for PICH reception. 0~5120 ms
+
+ //kal_uint8 r7_efach_06_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_efach_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@2
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[DRX_cycle2_length] "DRX cycle2 length for PICH, (6~9)"
+DRX6 6
+DRX7 7
+DRX8 8
+@DRX9 9
+
+[drx_cycle2_time] "drx_cycle2_time 0~5120ms"
+0~5120
+@0
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_07.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_07.l1v
new file mode 100755
index 0000000..9750e46
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_EFACH_07.l1v
@@ -0,0 +1,151 @@
+{ Validation }
+Title = "[13_R7R8]R7_EFACH_07: HS-DSCH setup in FDD_CELL_FACH state with dedicated H-RNTI and BCCH HRNTI"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_EFACH_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ //udps_RMC_type_struct udps_RMC_type;
+
+
+
+ //kal_uint8 r7_efach_07_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_efach_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_01.l1v
new file mode 100755
index 0000000..0b103d7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_01.l1v
@@ -0,0 +1,344 @@
+{ Validation }
+Title = "[13_R7R8]R7_FDPCH_01: Power control in the downlink for F-DPCH - single link with UE RXD "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_FDPCH_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ // kal_uint8 r7_fdpch_01_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_fdpch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_02.l1v
new file mode 100755
index 0000000..60fbcbd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_02.l1v
@@ -0,0 +1,347 @@
+{ Validation }
+Title = "[13_R7R8]R7_FDPCH_02: Power control in the downlink for F-DPCH - STTD with UE RXD"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_FDPCH_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ // kal_uint8 r7_fdpch_02_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_fdpch_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+@FDD_DL_TX_STTD
+FDD_DL_TX_CLM1
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_03.l1v
new file mode 100755
index 0000000..f39b41b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_03.l1v
@@ -0,0 +1,350 @@
+{ Validation }
+Title = "[13_R7R8]R7_FDPCH_03: Power control in the downlink for F-DPCH - compressed mode with UE RXD"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_FDPCH_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ // kal_uint8 r7_fdpch_03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_fdpch_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_04.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_04.l1v
new file mode 100755
index 0000000..531b840
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_04.l1v
@@ -0,0 +1,361 @@
+{ Validation }
+Title = "[13_R7R8]R7_FDPCH_04: Power control in the downlink for F-DPCH - SHO condition with UE RXD, (Noff1=5/5,2/7,3/6,0/9)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_FDPCH_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSF_fdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 r7_fdpch_04_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_fdpch_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH for BTS1: 0~SF-1"
+0~255
+@14
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSF_fdpch_rl2] "(DCH) OVSF code of F-DPCH for BTS2: 0~SF-1 "
+0~255
+@14
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[r7_fdpch_04_par_idx] "1: Noff1 5/5,2: Noff1 2/7,1: Noff1 3/6,1: Noff1 0/9"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_05.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_05.l1v
new file mode 100755
index 0000000..72c6164
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_FDPCH_05.l1v
@@ -0,0 +1,344 @@
+{ Validation }
+Title = "[13_R7R8]R7_FDPCH_05: Power control in the downlink for F-DPCH - single link with UE RXD + UL TPC BitNum=4"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_FDPCH_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ tx_diversity_E diversity_mode; // for R6-CN20 only (Tx Divirsity)
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSF_fdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ // kal_uint8 r7_fdpch_01_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_fdpch_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSF_fdpch_rl1] "(DCH) OVSF code of F-DPCH: 0~SF-1"
+0~255
+@14
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@3
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_01.l1v
new file mode 100755
index 0000000..06e2622
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_01.l1v
@@ -0,0 +1,97 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_01: Demodulation of HS-PDSCH on H-Set 8/10 with single link "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r7_hsdpa_01_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_hsdpa_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[r7_hsdpa_01_par_idx] "HSDPA parameters 1~3"
+1~3
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_02.l1v
new file mode 100755
index 0000000..56a88b2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_02.l1v
@@ -0,0 +1,98 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_02: Demodulation of HS-PDSCH on H-Set 3/68/10 with single link and UE RXD under static channel "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r7_hsdpa_02_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_hsdpa_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+
+[r7_hsdpa_02_par_idx] "HSDPA parameters 1~7"
+1~7
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_03.l1v
new file mode 100755
index 0000000..5ac4d1b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_03.l1v
@@ -0,0 +1,130 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_03: Demodulation of HS-PDSCH on H-Set 8/10 with STTD/CLTD and UE RXD under static channe"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 r7_hsdpa_03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_hsdpa_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r7_hsdpa_03_par_idx ] "HSDPA parameters 1~6"
+1~6
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_04.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_04.l1v
new file mode 100755
index 0000000..a1a7dea
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_04.l1v
@@ -0,0 +1,130 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_04: Demodulation of HS-PDSCH on H-Set 3/6/8/10 with STTD/CLTD and UE RXD under static channe"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 r7_hsdpa_03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_hsdpa_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r7_hsdpa_04_par_idx ] "HSDPA parameters 1~14"
+1~14
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_05.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_05.l1v
new file mode 100755
index 0000000..5663be3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_05.l1v
@@ -0,0 +1,96 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_05:Reporting of Channel Quality Indicator (AWGN+ 64QAM)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_uint8 r7_hsdpa_05_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_hsdpa_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_06.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_06.l1v
new file mode 100755
index 0000000..6f34d32
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_06.l1v
@@ -0,0 +1,93 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_06: MAC-ehs Reset"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_uint8 r7_hsdpa_06_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_hsdpa_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_07.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_07.l1v
new file mode 100755
index 0000000..207ea46
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_07.l1v
@@ -0,0 +1,93 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_07: HSSCCH Less Mode Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ // kal_uint8 r7_hsdpa_07_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_hsdpa_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_08.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_08.l1v
new file mode 100755
index 0000000..0af9054
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R7_HSDPA_08.l1v
@@ -0,0 +1,93 @@
+{ Validation }
+Title = "[13_R7R8]R7_HSDPA_08: Highest Data Rate Test (64QAM with 15 codes)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_HSDPA_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_uint8 r7_hsdpa_08_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_hsdpa_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_64
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@1
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_01.l1v
new file mode 100755
index 0000000..37c3e00
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_01.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-01: Common EDCH setup test with default resource"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_01_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_01_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_01_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_02.l1v
new file mode 100755
index 0000000..695f1e7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_02.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-02: Common EDCH setup test with non default resource"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_02_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_02_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_02_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_03.l1v
new file mode 100755
index 0000000..95bb4f0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_03.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-03: Common EDCH with DTCH/DCCH test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_03_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_03_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_04.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_04.l1v
new file mode 100755
index 0000000..5b94be5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_04.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-04: Common EDCH with CCCH test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_04_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_04_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_04_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_05.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_05.l1v
new file mode 100755
index 0000000..2556203
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_05.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-05: Common EDCH with DTCH/DCCH test and check AG/RG/HI/HSDSCH performance"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_05_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_05_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_05_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_05.l1v.bak b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_05.l1v.bak
new file mode 100755
index 0000000..5a289ea
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_05.l1v.bak
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-05: Common EDCH with DTCH/DCCH test and check AG/RG/HI/HSDSCH performance, "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_05_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_05_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_05_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_06.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_06.l1v
new file mode 100755
index 0000000..6df375b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_06.l1v
@@ -0,0 +1,364 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-06: Common EDCH setup and change to EDCH in DCH state"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ //udps_RMC_type_struct udps_RMC_type; // for CEDCH to EDCH
+ kal_uint16 DOFF_bts1; // for CEDCH to EDCH
+ kal_uint8 Tdpch_rl1; // for CEDCH to EDCH
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_06_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_06_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+[ehich_info_num] "Number of E-HICH info:(1 ~ 4)"
+1~4
+@1
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_06_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_06.l1v.bak b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_06.l1v.bak
new file mode 100755
index 0000000..c63242f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_06.l1v.bak
@@ -0,0 +1,364 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-06: Common EDCH setup and change to EDCH in DCH state."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ //udps_RMC_type_struct udps_RMC_type; // for CEDCH to EDCH
+ kal_uint16 DOFF_bts1; // for CEDCH to EDCH
+ kal_uint8 Tdpch_rl1; // for CEDCH to EDCH
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_06_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_06_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+[ehich_info_num] "Number of E-HICH info:(1 ~ 4)"
+1~4
+@1
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_06_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_07.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_07.l1v
new file mode 100755
index 0000000..ad5fe0b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CEDCH_07.l1v
@@ -0,0 +1,350 @@
+{ Validation }
+Title = "[13_R7R8]R8-CEDCH-07: Common EDCH setup with different Soffset Value"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CEDCH_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_cedch_07_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_cedch_07_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_cedch_07_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CRS1.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CRS1.l1v
new file mode 100755
index 0000000..bcfd9de
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CRS1.l1v
@@ -0,0 +1,361 @@
+{ Validation }
+Title = "[13_R7R8]R8-CRS1: Cell Re-selection in FDD_CELL_FACH (1 frequency)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CRS1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r8_fachdrx_01_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint8 drx_idx;
+}udps_r8_crs1_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "Target Cell"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of target cell"
+0~511
+@511
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[drx_idx] "drx_idx 1~3"
+1~3
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CRS2.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CRS2.l1v
new file mode 100755
index 0000000..3205eef
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_CRS2.l1v
@@ -0,0 +1,361 @@
+{ Validation }
+Title = "[13_R7R8]R8-CRS2: Cell Re-selection in FDD_CELL_FACH (2 frequencies)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_CRS2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r8_fachdrx_01_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint8 drx_idx;
+}udps_r8_crs2_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "Target Cell"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of target cell"
+0~511
+@511
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@2
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[drx_idx] "drx_idx 1~3"
+1~3
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_01.l1v
new file mode 100755
index 0000000..174dbc1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_01.l1v
@@ -0,0 +1,110 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_01: Demodulation of HS-PDSCH on H-Set 8/10 with single link "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+
+ // kal_uint8 r8_dchsdpa_01_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_dchsdpa_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_02.l1v
new file mode 100755
index 0000000..bdba04f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_02.l1v
@@ -0,0 +1,111 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_02: Demodulation of HS-PDSCH on H-Set 3A/6A/8A/10A with single link"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r8_dchsdpa_02_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_dchsdpa_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[r8_dchsdpa_02_par_idx] "DC parameters 1~7"
+1~7
+@1
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_03.l1v
new file mode 100755
index 0000000..82b45d4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_03.l1v
@@ -0,0 +1,140 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_03: Demodulation of HS-PDSCH on H-Set 3A/6A/8A/10A with Diversity "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 r8_dchsdpa_03_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+}udps_r8_dchsdpa_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r8_dchsdpa_03_par_idx] "DC parameters 1~7"
+1~7
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_04.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_04.l1v
new file mode 100755
index 0000000..2f0ff8f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_04.l1v
@@ -0,0 +1,110 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_04: Highest Data Rate Test of Category 24"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ // kal_uint8 r8_dchsdpa_04_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+
+} udps_r8_dchsdpa_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_64
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@1
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_05.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_05.l1v
new file mode 100755
index 0000000..c6d8fcc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_05.l1v
@@ -0,0 +1,109 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_05: RXCQI Performance + Single link (64AM)on dual cell"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ // kal_uint8 r8_dchsdpa_05_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_dchsdpa_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_06.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_06.l1v
new file mode 100755
index 0000000..0fb61ea
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_06.l1v
@@ -0,0 +1,364 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_06: DCHSDPA with CPC DTX on DRX off"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ // kal_uint8 r8_dchsdpa_06_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+}udps_r8_dchsdpa_06_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_07.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_07.l1v
new file mode 100755
index 0000000..229464d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_07.l1v
@@ -0,0 +1,364 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_07: DCHSDPA with CPC and DTX DRX Order Test "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ // kal_uint8 r8_dchsdpa_07_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+}udps_r8_dchsdpa_07_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_08.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_08.l1v
new file mode 100755
index 0000000..c12f114
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_08.l1v
@@ -0,0 +1,110 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_08: DC order Test (on/off/on))"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+
+ // kal_uint8 r8_dchsdpa_08_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_dchsdpa_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_09.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_09.l1v
new file mode 100755
index 0000000..3128f75
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_09.l1v
@@ -0,0 +1,110 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_09: DC switch Test (on/off)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+
+ // kal_uint8 r8_dchsdpa_09_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_dchsdpa_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_10.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_10.l1v
new file mode 100755
index 0000000..8d0a971
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_10.l1v
@@ -0,0 +1,110 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_10: DC parameters changes test "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+
+ // kal_uint8 r8_dchsdpa_10_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_dchsdpa_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_11.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_11.l1v
new file mode 100755
index 0000000..eb880fd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_11.l1v
@@ -0,0 +1,419 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_11: HHO successfully with CPC"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts2_s;
+ kal_bool sttd_ind_bts2_s;
+ kal_uint16 uarfcn_bts2_s;
+}udps_r8_dchsdpa_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@4
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
+
+
+[uarfcn_bts2_s] "UARFCN of Secondary Serving Cell for BTS2"
+10562~10838
+@10725
+
+[psc_bts2_s] "PSC of Secondary Serving Cell for BTS2"
+0~511
+@8
+
+[sttd_ind_bts2_s] "Use STTD or not of Secondary Serving Cell for BTS2"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_12.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_12.l1v
new file mode 100755
index 0000000..d52c1e3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_12.l1v
@@ -0,0 +1,419 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_12: HHO failed and revert with CPC(DC to DC)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts2_s;
+ kal_bool sttd_ind_bts2_s;
+ kal_uint16 uarfcn_bts2_s;
+}udps_r8_dchsdpa_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@4
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
+
+
+[uarfcn_bts2_s] "UARFCN of Secondary Serving Cell for BTS2"
+10562~10838
+@10725
+
+[psc_bts2_s] "PSC of Secondary Serving Cell for BTS2"
+0~511
+@8
+
+[sttd_ind_bts2_s] "Use STTD or not of Secondary Serving Cell for BTS2"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_13.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_13.l1v
new file mode 100755
index 0000000..22dde9e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_13.l1v
@@ -0,0 +1,392 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_13: Target Serving Cell Changed with DC/CPC "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_13
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts2_s;
+ kal_bool sttd_ind_bts2_s;
+ kal_uint16 uarfcn_bts2_s;
+}udps_r8_dchsdpa_13_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code (BTS2):(0~255)"
+0~255
+@27
+
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell 1"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell 1"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell 1"
+@KAL_FALSE
+
+[uarfcn_bts2_s] "UARFCN of Secondary Serving Cell 2"
+10562~10838
+@10655
+
+[psc_bts2_s] "PSC of Secondary Serving Cell 2"
+0~511
+@8
+
+[sttd_ind_bts2_s] "Use STTD or not of Secondary Serving Cell 2"
+@KAL_FALSE
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_14.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_14.l1v
new file mode 100755
index 0000000..90d7a33
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_14.l1v
@@ -0,0 +1,391 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_14: Target serving cell change with DC / CPC/ LessMode"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_14
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts2_s;
+ kal_bool sttd_ind_bts2_s;
+ kal_uint16 uarfcn_bts2_s;
+}udps_r8_dchsdpa_14_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@100
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code (BTS2):(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell 1"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell 1"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell 1"
+@KAL_FALSE
+
+[uarfcn_bts2_s] "UARFCN of Secondary Serving Cell 2"
+10562~10838
+@10655
+
+[psc_bts2_s] "PSC of Secondary Serving Cell 2"
+0~511
+@8
+
+[sttd_ind_bts2_s] "Use STTD or not of Secondary Serving Cell 2"
+@KAL_FALSE
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_15.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_15.l1v
new file mode 100755
index 0000000..7c572b3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_DCHSDPA_15.l1v
@@ -0,0 +1,264 @@
+{ Validation }
+Title = "[13_R7R8]R8_DCHSDPA_15: Low Power Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_DCHSDPA_15
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+}udps_r8_dchsdpa_15_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10655
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_01.l1v
new file mode 100755
index 0000000..0fabc3d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_01.l1v
@@ -0,0 +1,347 @@
+{ Validation }
+Title = "[13_R7R8]R8-FACHDRX-01: UE DRX Behavior with data drx_cycle=4, burst=1, and hsdsch interruption = true"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_FACHDRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r8_fachdrx_01_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_fachdrx_01_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_02.l1v
new file mode 100755
index 0000000..0ebb5fe
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_02.l1v
@@ -0,0 +1,347 @@
+{ Validation }
+Title = "[13_R7R8]R8-FACHDRX-02: R8_FACHDRX_02: UE DRX Behavior with drx_cycle=4, burst=1, and hsdsch interruption = false"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_FACHDRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r8_fachdrx_02_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_fachdrx_02_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_03.l1v
new file mode 100755
index 0000000..0632c0f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_FACHDRX_03.l1v
@@ -0,0 +1,347 @@
+{ Validation }
+Title = "[13_R7R8]R8-FACHDRX-03: R8_FACHDRX_03: UE DRX Behavior with drx_cycle=4, burst=1, and hsdsch interruption = false"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_FACHDRX_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ // kal_uint8 r8_fachdrx_03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_fachdrx_03_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@3
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_01.l1v
new file mode 100755
index 0000000..03c97df
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_01.l1v
@@ -0,0 +1,355 @@
+{ Validation }
+Title = "[13_R7R8]R8_LessMode_01: DC with Less Mode Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_LESSMODE_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_lessmode_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_02.l1v
new file mode 100755
index 0000000..36fb7d9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_02.l1v
@@ -0,0 +1,355 @@
+{ Validation }
+Title = "[13_R7R8]R8_LessMode_02: HSSCCH Order with Less Mode control(on/off/on)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_LESSMODE_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_lessmode_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_03.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_03.l1v
new file mode 100755
index 0000000..350155f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_03.l1v
@@ -0,0 +1,419 @@
+{ Validation }
+Title = "[13_R7R8]R8_LessMode_03: HHO failed and revert (LessMode Order is off in old cell)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_LESSMODE_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts2_s;
+ kal_bool sttd_ind_bts2_s;
+ kal_uint16 uarfcn_bts2_s;
+}udps_r8_lessmode_03_struct;s
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@4
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
+
+
+[uarfcn_bts2_s] "UARFCN of Secondary Serving Cell for BTS2"
+10562~10838
+@10675
+
+[psc_bts2_s] "PSC of Secondary Serving Cell for BTS2"
+0~511
+@8
+
+[sttd_ind_bts2_s] "Use STTD or not of Secondary Serving Cell for BTS2"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_04.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_04.l1v
new file mode 100755
index 0000000..12d96b2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_04.l1v
@@ -0,0 +1,419 @@
+{ Validation }
+Title = "[13_R7R8]R8_LessMode_04: HHO failed and revert (LessMode Order is on in old cell)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_LESSMODE_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2;
+ kal_uint16 OVSFdpch_rl2;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_uint8 ssc_of_hsscch_bts2;
+ kal_uint8 num_of_hsscch_bts2;
+ kal_uint16 ovsf_of_hsscch_0_bts2;
+ kal_uint16 ovsf_of_hsscch_1_bts2;
+ kal_uint16 ovsf_of_hsscch_2_bts2;
+ kal_uint16 ovsf_of_hsscch_3_bts2;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_bool sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts2_s;
+ kal_bool sttd_ind_bts2_s;
+ kal_uint16 uarfcn_bts2_s;
+}udps_r8_lessmode_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@300
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@6
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@11
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[ssc_of_hsscch_bts2] "sc of hs_scch of BTS2"
+0~16
+@0
+
+[num_of_hsscch_bts2] " number of HS-SCCH of BTS2"
+1~4
+@4
+
+[ovsf_of_hsscch_0_bts2] "ovsf_of_hsscch_0 of BTS2"
+0~127
+@6
+
+[ovsf_of_hsscch_1_bts2] "ovsf_of_hsscch_1 of BTS2"
+0~127
+@7
+
+[ovsf_of_hsscch_2_bts2] "ovsf_of_hsscch_2 of BTS2"
+0~127
+@8
+
+[ovsf_of_hsscch_3_bts2] "ovsf_of_hsscch_3 of BTS2"
+0~127
+@9
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+@FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
+
+
+[uarfcn_bts2_s] "UARFCN of Secondary Serving Cell for BTS2"
+10562~10838
+@10675
+
+[psc_bts2_s] "PSC of Secondary Serving Cell for BTS2"
+0~511
+@8
+
+[sttd_ind_bts2_s] "Use STTD or not of Secondary Serving Cell for BTS2"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_05.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_05.l1v
new file mode 100755
index 0000000..9095f32
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_LessMode_05.l1v
@@ -0,0 +1,351 @@
+{ Validation }
+Title = "[13_R7R8]R8_LessMode_05: LessMode Switch test with CPC "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_LESSMODE_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ // kal_uint8 r8_lessmode_05_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r8_lessmode_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M1.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M1.l1v
new file mode 100755
index 0000000..c2bd8b8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M1.l1v
@@ -0,0 +1,101 @@
+{ Validation }
+Title = "[13_R7R8]R8 M01: FDD Adjacent Frequency Measurements (Event triggered reporting of 1 adjacent-frequency)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 rxd_mode;
+} udps_r8_m01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@24
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@48
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M10.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M10.l1v
new file mode 100755
index 0000000..803f858
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M10.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[13_R7R8]R8 M10: UTRA Carrier RSSI (Relative measurement accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M2.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M2.l1v
new file mode 100755
index 0000000..1febd61
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M2.l1v
@@ -0,0 +1,118 @@
+{ Validation }
+Title = "[13_R7R8]R8 M02: FDD Adjacent Frequency Measurements (Event triggered reporting of 1 inter-frequency and 1 adjacent-frequency)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 rxd_mode;
+} udps_r8_m02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Inter-freq Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Inter-freq Meas)"
+0~511
+@511
+
+[uarfcn_bts3] "UARFCN of Neighbor Cell (for Intra-freq Meas)"
+10562~10838
+@10600
+
+[psc_bts3] "PSC of Neighbor Cell (for Intra-freq Meas)"
+0~511
+@11
+
+[uarfcn_bts4] "UARFCN of Neighbor Cell (for Adjacent-freq Meas)"
+10562~10838
+@10625
+
+[psc_bts4] "PSC of Neighbor Cell (for Adjacent-freq Meas)"
+0~511
+@8
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M3.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M3.l1v
new file mode 100755
index 0000000..c821c77
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M3.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[13_R7R8]R8 M3: CPICH RSCP (Adjacent frequency measurement: absolute accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@20
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@40
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M4.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M4.l1v
new file mode 100755
index 0000000..14718a4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M4.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[13_R7R8]R8 M4: CPICH RSCP (Adjacent frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M5.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M5.l1v
new file mode 100755
index 0000000..0fd72e8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M5.l1v
@@ -0,0 +1,103 @@
+{ Validation }
+Title = "[13_R7R8]R8 M5: CPICH RSCP (Inter frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of inter-freq. Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of inter-freq. Neighbor Cell (for Meas)"
+0~511
+@511
+
+[uarfcn_bts3] "UARFCN of Adjacent Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts3] "PSC of Adjacent Cell (for Meas)"
+0~511
+@10
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M6.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M6.l1v
new file mode 100755
index 0000000..b97919c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M6.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[13_R7R8]R8 M06: CPICH Ec/Io (Adjacent frequency measurement: absolute accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@20
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@40
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M7.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M7.l1v
new file mode 100755
index 0000000..3b410cf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M7.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[13_R7R8]R8 M07: CPICH Ec/Io (Adjacent frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@20
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@40
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M8.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M8.l1v
new file mode 100755
index 0000000..cec508a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M8.l1v
@@ -0,0 +1,101 @@
+{ Validation }
+Title = "[13_R7R8]R8 M08: CPICH Ec/Io (Adjacent-inter frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[uarfcn_bts3] "UARFCN of Adjacent Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts3] "PSC of Adjacent Cell (for Meas)"
+0~511
+@511
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M9.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M9.l1v
new file mode 100755
index 0000000..e0f013e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_M9.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[13_R7R8]R8 M09: UTRA Carrier RSSI (Absolute measurement accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_M09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_r8_m09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC1_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC1_01.l1v
new file mode 100755
index 0000000..efd898d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC1_01.l1v
@@ -0,0 +1,378 @@
+{ Validation }
+Title = "[13_R7R8]R8-MCPC1-01"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_MCPC1_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //HS-SCCH info.
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ //hs_meas_fb_info_T
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ //hs_harq_info_T
+ kal_uint8 process_num;
+ //hs_ulpc_info_T
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+ //dc_hsdpa_info_T
+ kal_uint8 dc_ssc_of_hsscch;
+ kal_uint8 dc_num_of_hsscch;
+ kal_uint16 dc_ovsf_of_hsscch_0;
+ kal_uint16 dc_ovsf_of_hsscch_1;
+ kal_uint16 dc_ovsf_of_hsscch_2;
+ kal_uint16 dc_ovsf_of_hsscch_3;
+ kal_uint16 dc_psc;
+ kal_int8 dc_meas_po;
+ kal_uint16 dc_dl_freq;
+ kal_bool dc_sttd;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_cpc_01_par_idx;
+ kal_uint8 r7_rxd_mode;
+} udps_r8_mcpc1_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+[uarfcn_bts2] "UARFCN of Adjacent cell "
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Adjacent cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~3)"
+0~3
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+FDD_EDCH_2SF2AND2SF4_16QAM
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r7_rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC1_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC1_02.l1v
new file mode 100755
index 0000000..b170073
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC1_02.l1v
@@ -0,0 +1,382 @@
+{ Validation }
+Title = "[13_R7R8]R8-MCPC1-02"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_MCPC1_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //HS-SCCH info.
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ //hs_meas_fb_info_T
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ //hs_harq_info_T
+ kal_uint8 process_num;
+ //hs_ulpc_info_T
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+ //dc_hsdpa_info_T
+ kal_uint8 dc_ssc_of_hsscch;
+ kal_uint8 dc_num_of_hsscch;
+ kal_uint16 dc_ovsf_of_hsscch_0;
+ kal_uint16 dc_ovsf_of_hsscch_1;
+ kal_uint16 dc_ovsf_of_hsscch_2;
+ kal_uint16 dc_ovsf_of_hsscch_3;
+ kal_uint16 dc_psc;
+ kal_int8 dc_meas_po;
+ kal_uint16 dc_dl_freq;
+ kal_bool dc_sttd;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_rxd_mode;
+} udps_r8_mcpc1_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+[uarfcn_bts2] "UARFCN of adjacent frequency cell "
+10562~10838
+@10655
+
+[psc_bts2] "PSC of adjacent frequency cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~3)"
+0~3
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+FDD_EDCH_2SF2AND2SF4_16QAM
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+[r7_rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC2_01.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC2_01.l1v
new file mode 100755
index 0000000..d193045
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC2_01.l1v
@@ -0,0 +1,393 @@
+{ Validation }
+Title = "[13_R7R8]R8-MCPC2-01"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_MCPC2_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //HS-SCCH info.
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ //hs_meas_fb_info_T
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ //hs_harq_info_T
+ kal_uint8 process_num;
+ //hs_ulpc_info_T
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+ //dc_hsdpa_info_T
+ kal_uint8 dc_ssc_of_hsscch;
+ kal_uint8 dc_num_of_hsscch;
+ kal_uint16 dc_ovsf_of_hsscch_0;
+ kal_uint16 dc_ovsf_of_hsscch_1;
+ kal_uint16 dc_ovsf_of_hsscch_2;
+ kal_uint16 dc_ovsf_of_hsscch_3;
+ kal_uint16 dc_psc;
+ kal_int8 dc_meas_po;
+ kal_uint16 dc_dl_freq;
+ kal_bool dc_sttd;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_rxd_mode;
+} udps_r8_mcpc2_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Inter-freq Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Inter-freq Meas)"
+0~511
+@511
+
+[uarfcn_bts3] "UARFCN of Neighbor Cell (for Intra-freq Meas)"
+10562~10838
+@10630
+
+[psc_bts3] "PSC of Neighbor Cell (for Intra-freq Meas)"
+0~511
+@511
+
+[uarfcn_bts4] "UARFCN of Neighbor Cell (for Adjacent-freq Meas)"
+10562~10838
+@10655
+
+[psc_bts4] "PSC of Neighbor Cell (for Adjacent-freq Meas)"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~3)"
+0~3
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+FDD_EDCH_2SF2AND2SF4_16QAM
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r7_rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC2_02.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC2_02.l1v
new file mode 100755
index 0000000..733b9e5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/DpsTest_R8_MCPC2_02.l1v
@@ -0,0 +1,398 @@
+{ Validation }
+Title = "[13_R7R8]R8-MCPC2-02"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_MCPC2_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //HS-SCCH info.
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ //hs_meas_fb_info_T
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+ //hs_harq_info_T
+ kal_uint8 process_num;
+ //hs_ulpc_info_T
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+ //dc_hsdpa_info_T
+ kal_uint8 dc_ssc_of_hsscch;
+ kal_uint8 dc_num_of_hsscch;
+ kal_uint16 dc_ovsf_of_hsscch_0;
+ kal_uint16 dc_ovsf_of_hsscch_1;
+ kal_uint16 dc_ovsf_of_hsscch_2;
+ kal_uint16 dc_ovsf_of_hsscch_3;
+ kal_uint16 dc_psc;
+ kal_int8 dc_meas_po;
+ kal_uint16 dc_dl_freq;
+ kal_bool dc_sttd;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r7_rxd_mode;
+} udps_r8_mcpc2_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Inter-freq Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Inter-freq Meas)"
+0~511
+@511
+
+[uarfcn_bts3] "UARFCN of Neighbor Cell (for Intra-freq Meas)"
+10562~10838
+@10630
+
+[psc_bts3] "PSC of Neighbor Cell (for Intra-freq Meas)"
+0~511
+@511
+
+[uarfcn_bts4] "UARFCN of Neighbor Cell (for Adjacent-freq Meas)"
+10562~10838
+@10655
+
+[psc_bts4] "PSC of Neighbor Cell (for Adjacent-freq Meas)"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~3)"
+0~3
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+FDD_EDCH_2SF2AND2SF4_16QAM
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+[r7_rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/udps_R7_TF01_1.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/udps_R7_TF01_1.l1v
new file mode 100755
index 0000000..0f3a0a9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/udps_R7_TF01_1.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-TF01-1: E-TFC switch test while E-DCH TTI is 10ms."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_TF01_1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ // kal_uint8 r7_tf01_1_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_tf01_1_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+FDD_EDCH_TTI_2
+@FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/13_R7R8/udps_R7_TF01_2.l1v b/mcu/service/dhl/database/l1validation_db/13_R7R8/udps_R7_TF01_2.l1v
new file mode 100755
index 0000000..c15cd5f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/13_R7R8/udps_R7_TF01_2.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[13_R7R8]R7-TF01-2: E-TFC switch test while E-DCH TTI is 2ms with 16QAM."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_TF01_2
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl2; // E-HICH OVSF code of RL2 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl3; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint16 ehich_ovsf_rl4; // E-HICH OVSF code of RL3 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl2; // E-HICH signature sequence of RL2 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl3; // E-HICH signature sequence of RL3 (0~39)
+ kal_uint8 ehich_SignatureSeq_rl4; // E-HICH signature sequence of RL4 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl2; // E-HICH TPC combination index of RL2 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl3; // E-HICH TPC combination index of RL3 (0 ~ 5)
+ kal_uint8 ehich_TpcIndex_rl4; // E-HICH TPC combination index of RL4 (0 ~ 5)
+
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl2; // E-RGCH signature sequence of RL2 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl3; // E-RGCH signature sequence of RL3 (0~39)
+ kal_uint8 ergch_SignatureSeq_rl4; // E-RGCH signature sequence of RL4 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl2; // E-RGCH RG combination index of RL2 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl3; // E-RGCH RG combination index of RL3 (0 ~ 5)
+ kal_uint8 ergch_RgCombIndex_rl4; // E-RGCH RG combination index of RL4 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ //kal_uint8 r7_tf01_2_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_tf01_2_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@1
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+[edch_tti] "E-DCH TTI 2ms or 10ms"
+@FDD_EDCH_TTI_2
+FDD_EDCH_TTI_10
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_info_num] "Number of E-HICH info:(1~4)"
+1~4
+@1
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_ovsf_rl2] "E-HICH OVSF code of RL2:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl3] "E-HICH OVSF code of RL3:(0~127)"
+0~127
+@12
+
+[ehich_ovsf_rl4] "E-HICH OVSF code of RL4:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl2] "E-HICH signature sequence of RL2:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl3] "E-HICH signature sequence of RL3:(0~39)"
+0~39
+@1
+
+[ehich_SignatureSeq_rl4] "E-HICH signature sequence of RL4:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl2] "E-HICH TPC combination index of RL2:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl3] "E-HICH TPC combination index of RL3:(0~5)"
+0~5
+@0
+
+[ehich_TpcIndex_rl4] "E-HICH TPC combination index of RL4:(0~5)"
+0~5
+@0
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl2] "E-RGCH signature sequence of RL2:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl3] "E-RGCH signature sequence of RL3:(0~39)"
+0~39
+@0
+
+[ergch_SignatureSeq_rl4] "E-RGCH signature sequence of RL4:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl2] "E-RGCH RG combination index of RL2:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl3] "E-RGCH RG combination index of RL3:(0~5)"
+0~5
+@0
+
+[ergch_RgCombIndex_rl4] "E-RGCH RG combination index of RL4:(0~5)"
+0~5
+@0
+
+[etfci_table_index] "E-TFCI table index:(2~3)"
+2~3
+@2
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+FDD_EDCH_2SF2AND2SF4
+@FDD_EDCH_2SF2AND2SF4
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F01.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F01.l1v
new file mode 100755
index 0000000..c8df16b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F01.l1v
@@ -0,0 +1,97 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F01: Demodulation of HS-PDSCH on H-Set 8/10 with single link "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r7_f01_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[r7_f01_par_idx] "HSDPA parameters 1~4"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F01.l1v.bak b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F01.l1v.bak
new file mode 100755
index 0000000..6566bbb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F01.l1v.bak
@@ -0,0 +1,97 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F01: Demodulation of HS-PDSCH on H-Set 8/10 with single link "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r7_f01_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[r7_f01_par_idx] "HSDPA parameters 1~4"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F02.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F02.l1v
new file mode 100755
index 0000000..ba06081
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F02.l1v
@@ -0,0 +1,98 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F02: Demodulation of HS-PDSCH on H-Set 3/68/10 with single link and UE RXD under static channel "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r7_f02_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+
+[r7_f02_par_idx] "HSDPA parameters 1~48"
+1~48
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F02.l1v.bak b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F02.l1v.bak
new file mode 100755
index 0000000..2a48bb5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F02.l1v.bak
@@ -0,0 +1,98 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F02: Demodulation of HS-PDSCH on H-Set 3/68/10 with single link and UE RXD under static channel "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r7_f02_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+
+[r7_f02_par_idx] "HSDPA parameters 1~48"
+1~48
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F03.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F03.l1v
new file mode 100755
index 0000000..63a594a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F03.l1v
@@ -0,0 +1,130 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F03: Demodulation of HS-PDSCH on H-Set 3/6/8/10 with STTD/CLTD and UE RXD under static channe"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 r7_f03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_f03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r7_f03_par_idx ] "HSDPA parameters 1~36"
+1~36
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F03.l1v.bak b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F03.l1v.bak
new file mode 100755
index 0000000..faef0e3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F03.l1v.bak
@@ -0,0 +1,130 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F03: Demodulation of HS-PDSCH on H-Set 3/6/8/10 with STTD/CLTD and UE RXD under static channe"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 r7_f03_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r7_f03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r7_f03_par_idx ] "HSDPA parameters 1~36"
+1~36
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F04.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F04.l1v
new file mode 100755
index 0000000..0974733
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F04.l1v
@@ -0,0 +1,100 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F03: HS-SCCH Detection Performance with Single Link under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 r7_f04_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_r7_f04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[r7_f04_par_idx] "HSDPA parameters 1~3"
+1~3
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F05.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F05.l1v
new file mode 100755
index 0000000..f79258c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F05.l1v
@@ -0,0 +1,132 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F05: HS-SCCH Detection Performance with Diversity under Fading Channel"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+ kal_uint8 r7_f05_par_idx;
+ kal_uint8 iteration_num; // iteration number for turbo decoder
+} udps_r7_f05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r7_f05_par_idx] "HSDPA parameters 1~3"
+1~3
+@1
+
+[iteration_num] "iteration number for turbo decoder"
+1~10
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F06.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F06.l1v
new file mode 100755
index 0000000..47cb98d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F06.l1v
@@ -0,0 +1,93 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F06: HSSCCH Less Mode Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ // kal_uint8 r7_hsdpa_07_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F07.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F07.l1v
new file mode 100755
index 0000000..82b645f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F07.l1v
@@ -0,0 +1,93 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F07: HSSCCH Less Mode Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ // kal_uint8 r7_hsdpa_07_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F08.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F08.l1v
new file mode 100755
index 0000000..366ac46
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F08.l1v
@@ -0,0 +1,144 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F08: HS-DSCH setup in FDD_CELL_FACH state with FMO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ //udps_RMC_type_struct udps_RMC_type;
+
+
+
+ //kal_uint8 r7_efach_01_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F09.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F09.l1v
new file mode 100755
index 0000000..60abe91
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R7_F09.l1v
@@ -0,0 +1,144 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R7_F09: HS-DSCH setup in FDD_CELL_FACH state with FMO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R7_F09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ //udps_RMC_type_struct udps_RMC_type;
+
+
+
+ //kal_uint8 r7_efach_01_par_idx;
+ kal_uint8 rxd_mode;
+} udps_r7_f09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F01.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F01.l1v
new file mode 100755
index 0000000..018b7c6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F01.l1v
@@ -0,0 +1,111 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R8_F01: Demodulation of HS-PDSCH on H-Set 3A/6A/8A/10A with single link"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_F01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r8_f01_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_f01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[r8_f01_par_idx] "DC parameters 1~20"
+1~20
+@1
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10725
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F02.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F02.l1v
new file mode 100755
index 0000000..a845ce3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F02.l1v
@@ -0,0 +1,143 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R8_F02: Demodulation of HS-PDSCH on H-Set 3A/6A/8A/10A with Diversity "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_F02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 r8_f02_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+}udps_r8_f02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r8_f02_par_idx ] "DC parameters 1~14"
+1~14
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10725
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F03.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F03.l1v
new file mode 100755
index 0000000..b2df589
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F03.l1v
@@ -0,0 +1,111 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R8_F03: Demodulation of HS-PDSCH on H-Set 3A/6A/8A/10A with RXD"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_F03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ kal_uint8 r8_f03_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+} udps_r8_f03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[r8_f03_par_idx] "DC parameters 1~40"
+1~40
+@1
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10725
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F04.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F04.l1v
new file mode 100755
index 0000000..22a720f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F04.l1v
@@ -0,0 +1,143 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R8_F04: Demodulation of HS-PDSCH on H-Set 3A/6A/8A/10A with Diversity "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_F04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ //tx_diversity_E diversity_mode; // for CD9
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD9
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_bool self_cal_BLER; // for CD09 only (Tx Divirsity)
+ kal_uint16 count_blks; // for CD09 only (Tx Divirsity)
+ kal_bool vaild_slot_format; //indicate whether "dl_dch_sf, dl_dch_tfci, dl_dch_pilot" is valid.
+ kal_uint16 dl_dch_sf; // SF. 4,8,16,32,64,128,256,512
+ kal_bool dl_dch_tfci; //If TFCI is used or NOT
+ kal_uint8 dl_dch_pilot; //Set the number of pilot bits
+
+ kal_uint8 r8_f04_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+}udps_r8_f04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+
+
+/******************************************
+* For DCH
+******************************************/
+
+
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+/*
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+*/
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[self_cal_BLER] "Use UDPS to count BLER?"
+@KAL_FALSE
+
+[count_blks] "Wanted Blocks number?"
+@2000
+
+[vaild_slot_format] "(DCH) Valid slot format setting?"
+@KAL_FALSE
+
+[dl_dch_sf] "(DCH) Slot Format - SF"
+4~512
+@128
+
+[dl_dch_tfci] "(DCH) Slot Format - TFCI exist?"
+@KAL_TRUE
+
+[dl_dch_pilot] "(DCH) Slot Format - Pilot bits?"
+2~16
+@8
+
+/******************************************
+* For HSDPA
+******************************************/
+[r8_f04_par_idx ] "DC parameters 1~14"
+1~14
+@1
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+10562~10838
+@10725
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@20
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F05.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F05.l1v
new file mode 100755
index 0000000..93ed0f9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F05.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R8_F05: Common EDCH setup test with non default resource"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_F05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_f05_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_f05_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_f05_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F06.l1v b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F06.l1v
new file mode 100755
index 0000000..150733f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/14_R7R8_Fading/DpsTest_R8_F06.l1v
@@ -0,0 +1,349 @@
+{ Validation }
+Title = "[14_R7R8_Fading]R8_F06: Common EDCH setup test with non default resource"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R8_F06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ //dpch
+ kal_uint8 s_offset;
+ kal_uint32 ul_sc;
+ kal_uint16 OVSFdpch_rl1;
+ //HSDPA parameters
+ kal_uint8 ssc_of_hsscch;
+ kal_uint8 num_of_hsscch;
+ kal_uint16 ovsf_of_hsscch_0;
+ kal_uint16 ovsf_of_hsscch_1;
+ kal_uint16 ovsf_of_hsscch_2;
+ kal_uint16 ovsf_of_hsscch_3;
+ kal_int8 meas_po ;// -12~26 * 0.5
+ hs_cqi_k_E cqi_k;
+ kal_uint8 cqi_repetition_factor;
+ kal_uint8 delta_cqi;
+
+ kal_uint8 delta_nack;
+ kal_uint8 delta_ack;
+ kal_uint8 acknack_repe_factor;
+ kal_uint8 harq_preamble_mode;
+
+ kal_uint8 process_num;
+
+ //E-DCH parameters
+ kal_bool pri_e_rnti_valid;
+ kal_uint16 pri_e_rnti; //0~65535
+ kal_bool sec_e_rnti_valid;
+ kal_uint16 sec_e_rnti; //0~65535
+ edch_tti_E edch_tti; //FDD_EDCH_TTI_2, FDD_EDCH_TTI_10
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint8 ehich_info_num; // Number of E-HICH info: 1~4
+ kal_uint16 ehich_ovsf_rl1; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_rl1; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_rl1; // E-HICH TPC combination index of RL1 (0 ~ 5)
+ kal_uint8 ergch_info_num; // Number of E-RGCH info: 0~4
+ kal_uint8 ergch_SignatureSeq_rl1; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_rl1; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ edch_sf_E max_ch_code; // Max. channelisation code (FDD_EDCH_SF256, FDD_EDCH_SF128, ..., FDD_EDCH_2SF2, FDD_EDCH_2SF2AND2SF4)
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r8_f06_par_idx;
+ kal_uint8 rxd_mode;
+}udps_r8_f06_struct;
+
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@1
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@5
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[s_offset] "s_offset value"
+0~9
+@0
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+
+
+/******************************************
+* For HS-DSCH
+******************************************/
+[ssc_of_hsscch] "sc of hs_scch"
+0~16
+@0
+
+[num_of_hsscch] " number of HS-SCCH "
+1~4
+@4
+
+[ovsf_of_hsscch_0] "ovsf_of_hsscch_0"
+0~127
+@8
+
+[ovsf_of_hsscch_1] "ovsf_of_hsscch_1"
+0~127
+@9
+
+[ovsf_of_hsscch_2] "ovsf_of_hsscch_2"
+0~127
+@10
+
+[ovsf_of_hsscch_3] "ovsf_of_hsscch_3"
+0~127
+@11
+
+[meas_po] "Measurement power offset. Range: -12~26"
+-12~26
+@0
+
+[cqi_k] "0=0ms,1=2ms,2=4ms,3=8ms,4=10ms,5=20ms,6=40ms,7=80ms,8=160ms"
+0~8
+@1
+[cqi_repetition_factor] " CQI repetition factor "
+1~4
+@1
+[delta_cqi] " delta CQI 0~8 "
+0~8
+@5
+[acknack_repe_factor] " HARQ ACK/NACK repetition factor "
+1~4
+@1
+
+[delta_nack] " delta NACK 0~8 "
+0~8
+@5
+
+[delta_ack] " delta ACK 0~8 "
+0~8
+@5
+
+[harq_preamble_mode] "enable preamble or not"
+0~1
+@0
+
+[process_num] "number of harq process"
+1~8
+@6
+
+/******************************************
+* For E-DCH
+******************************************/
+[pri_e_rnti_valid] "If primary E-RNTI field is valid or not"
+@KAL_TRUE
+
+[pri_e_rnti] "Primary E-RNTI assigned to UE"
+0~65535
+@43690
+
+[sec_e_rnti_valid] "If secondary E-RNTI field is valid or not"
+@KAL_FALSE
+
+[sec_e_rnti] "Secondary E-RNTI assigned to UE"
+0~65535
+@21845
+
+
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+
+
+[ehich_ovsf_rl1] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+
+[ehich_SignatureSeq_rl1] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+
+[ehich_TpcIndex_rl1] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[ergch_info_num] "Number of E-RGCH info:(0 ~ 4)"
+0~4
+@1
+
+[ergch_SignatureSeq_rl1] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+
+[ergch_RgCombIndex_rl1] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[max_ch_code] "Max. channelisation code"
+FDD_EDCH_SF256
+FDD_EDCH_SF128
+FDD_EDCH_SF64
+FDD_EDCH_SF32
+FDD_EDCH_SF16
+FDD_EDCH_SF8
+FDD_EDCH_SF4
+FDD_EDCH_2SF4
+FDD_EDCH_2SF2
+@FDD_EDCH_2SF2AND2SF4
+
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@5
+
+
+[r8_f06_par_idx] "cedch parameters 1~2, 1 for edch tti 2ms, 2 for 10ms"
+1~2
+@1
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_01.l1v
new file mode 100755
index 0000000..dc5bfbb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_01.l1v
@@ -0,0 +1,218 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_01: Demodulation of HS-PDSCH on H-Set 3B/6B/8B/10B with single link"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_1s;
+ kal_uint16 psc_bts1_1s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+ kal_uint8 r10_3chsdpa_01_par_idx;
+} udps_r10_3chsdpa_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_1s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_1s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For E-DCH
+******************************************/
+/*
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+*/
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+/*
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+*/
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[r10_3chsdpa_01_par_idx] "test idx 1~7"
+1~7
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_02.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_02.l1v
new file mode 100755
index 0000000..36772ec
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_02.l1v
@@ -0,0 +1,213 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_02: Highest Data Rate Test of Category 29"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_1s;
+ kal_uint16 psc_bts1_1s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_3chsdpa_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_1s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_1s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_64
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@1
+
+
+/******************************************
+* For E-DCH
+******************************************/
+/*
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+*/
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+/*
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+*/
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_03.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_03.l1v
new file mode 100755
index 0000000..92fe441
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_03.l1v
@@ -0,0 +1,213 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_03: RXCQI Performance + Single link (64QAM)on 3C cell"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_1s;
+ kal_uint16 psc_bts1_1s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_3chsdpa_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_1s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_1s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For E-DCH
+******************************************/
+/*
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+*/
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+/*
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+*/
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_04.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_04.l1v
new file mode 100755
index 0000000..7b89cdf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_04.l1v
@@ -0,0 +1,206 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_04: 3C-HSDPA with CPC DTX on DRX off"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_3chsdpa_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_05.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_05.l1v
new file mode 100755
index 0000000..d410190
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_05.l1v
@@ -0,0 +1,206 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_05: 3C-HSDPA with CPC DTX on DRX off"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_3chsdpa_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_06.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_06.l1v
new file mode 100755
index 0000000..be4475d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_06.l1v
@@ -0,0 +1,214 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_06: Secondary Cell activate/deactivate by HS-SCCH order Test (3C->2C->1C->2C->3C)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_1s;
+ kal_uint16 psc_bts1_1s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_3chsdpa_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_1s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_1s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For E-DCH
+******************************************/
+/*
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+*/
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+/*
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+*/
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_07.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_07.l1v
new file mode 100755
index 0000000..0765b87
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_07.l1v
@@ -0,0 +1,214 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_07: Secondary enable/disable test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_1s;
+ kal_uint16 psc_bts1_1s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_3chsdpa_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_1s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_1s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For E-DCH
+******************************************/
+/*
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+*/
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+/*
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+*/
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_08.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_08.l1v
new file mode 100755
index 0000000..568f98e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_3chsdpa_08.l1v
@@ -0,0 +1,214 @@
+{ Validation }
+Title = "[15_R9R10]R10_3CHSDPA_08: Secondary modification test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_3CHSDPA_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_1s;
+ kal_uint16 psc_bts1_1s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_3chsdpa_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_1s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_1s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_12_2
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+/******************************************
+* For E-DCH
+******************************************/
+/*
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+*/
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+/*
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+*/
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_01.l1v
new file mode 100755
index 0000000..cb1396a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_01.l1v
@@ -0,0 +1,206 @@
+{ Validation }
+Title = "[15_R9R10]R10_LESSMODE_01: 3C-HSDPA with lessmode test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_LESSMODE_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_lessmode_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_02.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_02.l1v
new file mode 100755
index 0000000..4769cf0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_02.l1v
@@ -0,0 +1,206 @@
+{ Validation }
+Title = "[15_R9R10]R10_LESSMODE_02: HSSCCH Order with Less Mode control(on/off/on) "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_LESSMODE_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_lessmode_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_03.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_03.l1v
new file mode 100755
index 0000000..1395ae7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_lessmode_03.l1v
@@ -0,0 +1,206 @@
+{ Validation }
+Title = "[15_R9R10]R10_LESSMODE_03: LessMode Switch test with CPC (Less Mode on/off/on "
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_LESSMODE_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts1_2s;
+ kal_uint16 psc_bts1_2s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r10_lessmode_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_2s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10650
+
+[psc_bts1_2s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m01.l1v
new file mode 100755
index 0000000..c733d01
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m01.l1v
@@ -0,0 +1,110 @@
+{ Validation }
+Title = "[13_R7R8]R10 M01: FDD inter Frequency Measurements without compressed mode (Event triggered reporting)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_M01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 rxd_mode;
+} udps_r10_m01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[uarfcn_bts3] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10650
+
+[psc_bts3] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@24
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@48
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m02.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m02.l1v
new file mode 100755
index 0000000..0489cb8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m02.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[13_R7R8]R10 M02: FDD inter Frequency detected cell measurement with compressed mode (Event triggered reporting)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_M02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 rxd_mode;
+} udps_r10_m02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@24
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@48
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m03.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m03.l1v
new file mode 100755
index 0000000..1f32e50
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m03.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[13_R7R8]R10 M03: FDD inter Frequency detected cell measurement without compressed mode (Event triggered reporting)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_M03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 rxd_mode;
+} udps_r10_m03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@24
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@48
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m04.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m04.l1v
new file mode 100755
index 0000000..9e2b8f9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R10_m04.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[13_R7R8]R10 M04: frequency specific compressed mode measurement (Event triggered reporting)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R10_M04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts4;
+ kal_uint16 psc_bts4; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 rxd_mode;
+} udps_r10_m03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10625
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@24
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@48
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_DB_DCHSDPA_01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_DB_DCHSDPA_01.l1v
new file mode 100755
index 0000000..98ce212
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_DB_DCHSDPA_01.l1v
@@ -0,0 +1,110 @@
+{ Validation }
+Title = "[15_R9R10]R9_DB_DCHSDPA_01: Highest Data Rate Test of Category 24 in DB DCHSDPA configuration"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DB_DCHSDPA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+ typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ // kal_uint8 r8_dchsdpa_04_par_idx;
+ kal_uint8 rxd_mode;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 sttd_ind_bts1_s;
+ kal_uint16 uarfcn_bts1_s;
+
+} udps_r9_db_dchsdpa_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+@RMC_64
+
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@4
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@8
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+
+/******************************************
+* For HSDPA
+******************************************/
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
+
+
+[uarfcn_bts1_s] "UARFCN of Secondary Serving Cell"
+4357~4458
+@4408
+
+[psc_bts1_s] "PSC of Secondary Serving Cell"
+0~511
+@10
+
+[sttd_ind_bts1_s] "Use STTD or not of Secondary Serving Cell"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_TF_01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_TF_01.l1v
new file mode 100755
index 0000000..de7e2b0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_TF_01.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_TF_01: Second E-DCH E-TFC switch test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_TF_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_tf_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_ag01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_ag01.l1v
new file mode 100755
index 0000000..d148cd6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_ag01.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_AG01: Detection of E-AGCH of 2nd E-DCH in single RL conditions"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_AG01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_ag01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_ag02.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_ag02.l1v
new file mode 100755
index 0000000..6ccc764
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_ag02.l1v
@@ -0,0 +1,196 @@
+{ Validation }
+Title = "[15_R9R10]R9_AG02: Demodulation of E-AGCH after E-RNTI modification"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_AG02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_ag01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_01.l1v
new file mode 100755
index 0000000..03a295c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_01.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_01: DRX Check for second E-AGCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_02.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_02.l1v
new file mode 100755
index 0000000..9b31734
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_02.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_02: DRX Check for second E-RGCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_03.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_03.l1v
new file mode 100755
index 0000000..9822e9a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_03.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_03: DTX Behavior Check with E-DCH data"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_04.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_04.l1v
new file mode 100755
index 0000000..2c92e6c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_04.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_04: DTX Behavior Check without E-DCH data"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_05.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_05.l1v
new file mode 100755
index 0000000..e7eec9b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_05.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_05: DTX on /DRX off Behavior Check with E-DCH data (HS-DSCH data off)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_06.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_06.l1v
new file mode 100755
index 0000000..7266fc4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_06.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_06: DTX pattern overlaps with gap"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_07.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_07.l1v
new file mode 100755
index 0000000..7963293
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_07.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_07: DTX/DRX Order Command Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_08.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_08.l1v
new file mode 100755
index 0000000..93a120b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_08.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_08: CPC Switch Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_09.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_09.l1v
new file mode 100755
index 0000000..777f50f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_09.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_09: CPC modification Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_cpc_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_10.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_10.l1v
new file mode 100755
index 0000000..8274ee1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_10.l1v
@@ -0,0 +1,296 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_10: CPC behavior check after HHO to inter-frequency cell successfully."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[OVSFdpch_rl_dchsupa_bts2] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa_bts2] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa_bts2] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa_bts2] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa_bts2] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa_bts2] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_11.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_11.l1v
new file mode 100755
index 0000000..1581b48
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_cpc_11.l1v
@@ -0,0 +1,296 @@
+{ Validation }
+Title = "[15_R9R10]R9_CPC_11: CPC behavior check after HHO to inter-frequency cell failed and reverts."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_CPC_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[OVSFdpch_rl_dchsupa_bts2] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa_bts2] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa_bts2] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa_bts2] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa_bts2] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa_bts2] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_01.l1v
new file mode 100755
index 0000000..f79096e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_01.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_01: Second E-DCH retransmission"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_dchsupa_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_02.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_02.l1v
new file mode 100755
index 0000000..b274a98
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_02.l1v
@@ -0,0 +1,261 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_02: HHO to intra-frequency cell"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@151
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_03.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_03.l1v
new file mode 100755
index 0000000..96ade84
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_03.l1v
@@ -0,0 +1,296 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_03: HHO to intra-frequency cell"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[OVSFdpch_rl_dchsupa_bts2] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa_bts2] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa_bts2] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa_bts2] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa_bts2] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa_bts2] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_04.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_04.l1v
new file mode 100755
index 0000000..7483bd2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_04.l1v
@@ -0,0 +1,266 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_04: HHO to intra-frequency cell"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@0
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_05.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_05.l1v
new file mode 100755
index 0000000..1c5c7ab
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_05.l1v
@@ -0,0 +1,296 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_05: HHO to intra-frequency cell failed and revert"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[OVSFdpch_rl_dchsupa_bts2] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa_bts2] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa_bts2] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa_bts2] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa_bts2] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa_bts2] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_06.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_06.l1v
new file mode 100755
index 0000000..ba5e3dd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_06.l1v
@@ -0,0 +1,296 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_06: HHO to inter-frequency cell HHO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[OVSFdpch_rl_dchsupa_bts2] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa_bts2] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa_bts2] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa_bts2] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa_bts2] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa_bts2] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_07.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_07.l1v
new file mode 100755
index 0000000..8daaeca
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_07.l1v
@@ -0,0 +1,266 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_07: HHO to inter-frequency cell HHO"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_08.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_08.l1v
new file mode 100755
index 0000000..106d359
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_08.l1v
@@ -0,0 +1,296 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_08: HHO to inter-frequency cell HHO failed and revert"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2_s;
+ kal_uint16 psc_bts2_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint16 DOFF_bts2;
+ kal_uint8 Tdpch_rl2; // for SHO delay
+ kal_uint16 OVSFdpch_rl2; // for SHO delay
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ kal_uint16 eagch_ovsf_bts2; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_bts2; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_bts2 ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_bts2 ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_bts2 ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_bts2 ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+}udps_r9_dchsupa_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2 "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@20
+
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts2_s] "PSC of 2nd Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@151
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+[DOFF_bts2] "(DCH) Default DPCH Offset [x512 chips] for BTS2"
+0~599
+@306
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@12
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@22
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+[eagch_ovsf_bts2] "E-AGCH OVSF code of BTS2:(0~255)"
+0~255
+@27
+
+[ehich_ovsf_bts2] "E-HICH OVSF code of BTS2:(0~127)"
+0~127
+@12
+
+[ehich_SignatureSeq_bts2] "E-HICH signature sequence of BTS2:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_bts2] "E-HICH TPC combination index of BTS2:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_bts2] "E-RGCH signature sequence of BTS2:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_bts2] "E-RGCH RG combination index of BTS2:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[OVSFdpch_rl_dchsupa_bts2] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa_bts2] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa_bts2] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa_bts2] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa_bts2] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa_bts2] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa_bts2] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_09.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_09.l1v
new file mode 100755
index 0000000..2fb91a5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_dchsupa_09.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_DCHSUPA_09: Second E-RGCH added and removed"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_DCHSUPA_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_dchsupa_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@60
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_hi01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_hi01.l1v
new file mode 100755
index 0000000..074fda9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_hi01.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_HI01: Detection of E-HICH of 2nd E-DCH in single RL conditions"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_HI01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_tgps_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw01.l1v
new file mode 100755
index 0000000..eec1cf7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw01.l1v
@@ -0,0 +1,191 @@
+{ Validation }
+Title = "[15_R9R10]R9_PW01: UE transmission power header room on second UL frequency"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_PW01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+} udps_r9_pw01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw02.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw02.l1v
new file mode 100755
index 0000000..d3a8333
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw02.l1v
@@ -0,0 +1,191 @@
+{ Validation }
+Title = "[15_R9R10]R9_PW02: Power control in the 2nd EDCH set"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_PW02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+} udps_r9_pw02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw03.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw03.l1v
new file mode 100755
index 0000000..8e60328
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw03.l1v
@@ -0,0 +1,202 @@
+{ Validation }
+Title = "[15_R9R10]R9_PW03: Power control in the 2nd EDCH set - compressed mode"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_PW03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 rxd_mode;
+} udps_r9_pw03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts2] "UARFCN of Serving Cell "
+10562~10838
+@10650
+
+[psc_bts2] "PSC of Serving Cell"
+0~511
+@20
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw04.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw04.l1v
new file mode 100755
index 0000000..c51a868
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw04.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_PW_04: Post verification fail in 2nd EDCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_PW04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_pw04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw05.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw05.l1v
new file mode 100755
index 0000000..61f8763
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_pw05.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_PW_05: Post verification fail then Sync A success in 2nd active set"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_PW05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_pw04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_rg01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_rg01.l1v
new file mode 100755
index 0000000..585e00a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_rg01.l1v
@@ -0,0 +1,197 @@
+{ Validation }
+Title = "[15_R9R10]R9_RG01: Detection of E-HICH of 2nd E-DCH in single RL conditions"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_RG01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 rxd_mode;
+} udps_r9_rg01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_tgps_01.l1v b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_tgps_01.l1v
new file mode 100755
index 0000000..78c4d61
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/15_R9R10/udps_R9_tgps_01.l1v
@@ -0,0 +1,202 @@
+{ Validation }
+Title = "[15_R9R10]R9_TGPS_01: 2nd E-DCH transmission during compressed mode"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_R9_TGPS_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ LOCAL_PARA_HDR
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts1_s;
+ kal_uint16 psc_bts1_s;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ //HSDPA parameters
+
+ //E-DCH parameters
+
+ kal_uint16 eagch_ovsf; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf; // E-HICH OVSF code of RL (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq ; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex ; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq ; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex ; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+ //2nd E-DCH parameters
+ kal_uint32 ul_sc_dchsupa;
+ kal_uint16 OVSFdpch_rl_dchsupa;
+
+ kal_uint16 eagch_ovsf_dchsupa; //E-AGCH OVSF code (0 ~ 255)
+
+ kal_uint16 ehich_ovsf_rl_dchsupa; // E-HICH OVSF code of RL1 (0 ~ 127)
+ kal_uint8 ehich_SignatureSeq_dchsupa; // E-HICH signature sequence of RL1 (0~39)
+ kal_uint8 ehich_TpcIndex_dchsupa; // E-HICH TPC combination index of RL1 (0 ~ 5)
+
+ kal_uint8 ergch_SignatureSeq_dchsupa; // E-RGCH signature sequence of RL1 (0~39)
+ kal_uint8 ergch_RgCombIndex_dchsupa; // E-RGCH RG combination index of RL1 (0 ~ 5)
+
+
+ kal_uint8 etfci_table_index; // E-TFCI table index. 0~1
+ kal_uint8 pl_non_max; // PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)
+ kal_uint8 etfci_under_test; // E-TFCI under test: (0..129)
+ kal_uint8 r9r10_tgps_pattern;
+ kal_uint8 rxd_mode;
+} udps_r9_tgps_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell "
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts1_s] "UARFCN of 2nd Serving Cell "
+10562~10838
+@10625
+
+[psc_bts1_s] "PSC of 2nd Serving Cell"
+0~511
+@10
+
+
+
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@15
+
+
+/******************************************
+* For E-DCH
+******************************************/
+[eagch_ovsf] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+/******************************************
+* For 2nd E-DCH
+******************************************/
+[ul_sc_dchsupa] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[OVSFdpch_rl_dchsupa] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@7
+
+
+[eagch_ovsf_dchsupa] "E-AGCH OVSF code:(0~255)"
+0~255
+@24
+
+[ehich_ovsf_rl_dchsupa] "E-HICH OVSF code of RL1:(0~127)"
+0~127
+@13
+
+[ehich_SignatureSeq_dchsupa] "E-HICH signature sequence of RL1:(0~39)"
+0~39
+@1
+
+[ehich_TpcIndex_dchsupa] "E-HICH TPC combination index of RL1:(0~5)"
+0~5
+@0
+
+[ergch_SignatureSeq_dchsupa] "E-RGCH signature sequence of RL1:(0~39)"
+0~39
+@0
+
+[ergch_RgCombIndex_dchsupa] "E-RGCH RG combination index of RL1:(0~5)"
+0~5
+@0
+
+
+[etfci_table_index] "E-TFCI table index:(0~1)"
+0~1
+@0
+
+[pl_non_max] "PLnon-max= pl_non_max * 0.04; pl_non_max: Integer(11..25)"
+11~25
+@13
+
+[etfci_under_test] "E-TFCI under test: (0..129)"
+0~129
+@128
+
+[r9r10_tgps_pattern] "r9r10 tgps pattern (1..3)"
+1~3
+@1
+
+
+[rxd_mode] "rxd mode 0~1"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS1_Inter_Freq_Crs_in_Idle.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS1_Inter_Freq_Crs_in_Idle.l1v
new file mode 100755
index 0000000..dd4d451
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS1_Inter_Freq_Crs_in_Idle.l1v
@@ -0,0 +1,192 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]CRS1: FDD/FDD Cell Re-Selection in Idle Mode (Multi-carrier Case)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_CRS_IN_IDLE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+} udps_inter_freq_crs_in_idle_struct; //CRS1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for CRS)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for CRS)"
+0~511
+@511
+
+/******************************************
+* Setup PCH of BTS1
+******************************************/
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS2_Intra_Freq_Crs_in_Fach.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS2_Intra_Freq_Crs_in_Fach.l1v
new file mode 100755
index 0000000..7828eff
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS2_Intra_Freq_Crs_in_Fach.l1v
@@ -0,0 +1,144 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]CRS2: FDD/FDD Cell Re-Selection in FDD_CELL_FACH State (One Frequency Case)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTRA_FREQ_CRS_IN_FACH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+} udps_intra_freq_crs_in_fach_struct; //CRS2
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for CRS)"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Neighbor Cell (for CRS)"
+0~511
+@511
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS3_Inter_Freq_Crs_in_Fach.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS3_Inter_Freq_Crs_in_Fach.l1v
new file mode 100755
index 0000000..5b0bb34
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_CRS3_Inter_Freq_Crs_in_Fach.l1v
@@ -0,0 +1,147 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]CRS3: FDD/FDD Cell Re-Selection in FDD_CELL_FACH State (Two Frequency Case)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_CRS_IN_FACH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_uint8 Ts_ccpch; // Currently not used
+ kal_uint16 OVSFs_ccpch; // Currently not used
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+} udps_inter_freq_crs_in_fach_struct; //CRS3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for CRS)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for CRS)"
+0~511
+@511
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M01_Intra_Freq_Reporting_Delay.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M01_Intra_Freq_Reporting_Delay.l1v
new file mode 100755
index 0000000..e69ba44
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M01_Intra_Freq_Reporting_Delay.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M01: FDD Intra Frequency Measurements (Event triggered reporting of 1 neighbor cell)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTRA_FREQ_REPORTING_DELAY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_intra_freq_reporting_delay_struct; // M1
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@24
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@48
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M03_Inter_Freq_Reporting_Delay.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M03_Inter_Freq_Reporting_Delay.l1v
new file mode 100755
index 0000000..2a2a02e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M03_Inter_Freq_Reporting_Delay.l1v
@@ -0,0 +1,94 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M03: FDD Inter Frequency Measurements (Event triggered reporting of 1 intra-frequency)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_REPORTING_DELAY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts3;
+ kal_uint16 psc_bts3; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_inter_freq_reporting_delay_struct; // M3
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Inter-freq Meas)"
+10562~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Inter-freq Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M04_Abs_Intra_Freq_Cpich_Rscp.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M04_Abs_Intra_Freq_Cpich_Rscp.l1v
new file mode 100755
index 0000000..3d63a2a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M04_Abs_Intra_Freq_Cpich_Rscp.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M04: CPICH RSCP (Intra frequency measurement: absolute accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ABS_INTRA_FREQ_CPICH_RSCP
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_abs_intra_freq_cpich_rscp_struct; // M4
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@20
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@40
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M05_Rel_Intra_Freq_Cpich_Rscp.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M05_Rel_Intra_Freq_Cpich_Rscp.l1v
new file mode 100755
index 0000000..607bc1b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M05_Rel_Intra_Freq_Cpich_Rscp.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M05: CPICH RSCP (Intra frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_REL_INTRA_FREQ_CPICH_RSCP
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_rel_intra_freq_cpich_rscp_struct; // M5
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M06_Rel_Inter_Freq_Cpich_Rscp.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M06_Rel_Inter_Freq_Cpich_Rscp.l1v
new file mode 100755
index 0000000..7a3a06d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M06_Rel_Inter_Freq_Cpich_Rscp.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M06: CPICH RSCP (Inter frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_REL_INTER_FREQ_CPICH_RSCP
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_rel_inter_freq_cpich_rscp_struct; // M6
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M07_Abs_Intra_Freq_Cpich_Ecio.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M07_Abs_Intra_Freq_Cpich_Ecio.l1v
new file mode 100755
index 0000000..7ea389c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M07_Abs_Intra_Freq_Cpich_Ecio.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M07: CPICH Ec/Io (Intra frequency measurement: absolute accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ABS_INTRA_FREQ_CPICH_ECIO
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_abs_intra_freq_cpich_ecio_struct; // M7
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M08_Rel_Intra_Freq_Cpich_Ecio.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M08_Rel_Intra_Freq_Cpich_Ecio.l1v
new file mode 100755
index 0000000..354c687
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M08_Rel_Intra_Freq_Cpich_Ecio.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M08: CPICH Ec/Io (Intra frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_REL_INTRA_FREQ_CPICH_ECIO
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_rel_intra_freq_cpich_ecio_struct; // M8
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M09_Rel_Inter_Freq_Cpich_Ecio.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M09_Rel_Inter_Freq_Cpich_Ecio.l1v
new file mode 100755
index 0000000..7ce4685
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M09_Rel_Inter_Freq_Cpich_Ecio.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M09: CPICH Ec/Io (Inter frequency measurement: relative accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_REL_INTER_FREQ_CPICH_ECIO
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_rel_inter_freq_cpich_ecio_struct; // M9
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M10_Abs_Utra_Carrier_Rssi.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M10_Abs_Utra_Carrier_Rssi.l1v
new file mode 100755
index 0000000..145c194
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M10_Abs_Utra_Carrier_Rssi.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M10: UTRA Carrier RSSI (Absolute measurement accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ABS_UTRA_CARRIER_RSSI
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_abs_utra_carrier_rssi_struct; // M10
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@1
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@2
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M11_Rel_Utra_Carrier_Rssi.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M11_Rel_Utra_Carrier_Rssi.l1v
new file mode 100755
index 0000000..617b784
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M11_Rel_Utra_Carrier_Rssi.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M11: UTRA Carrier RSSI (Relative measurement accuracy)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_REL_UTRA_CARRIER_RSSI
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_rel_utra_carrier_rssi_struct; // M11
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M12_Intra_Freq_Sfn_Cfn_Diff.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M12_Intra_Freq_Sfn_Cfn_Diff.l1v
new file mode 100755
index 0000000..ca5450e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M12_Intra_Freq_Sfn_Cfn_Diff.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M12: SFN-CFN Observed Time Difference (Intra frequency measurement)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTRA_FREQ_SFN_CFN_DIFF
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_intra_freq_sfn_cfn_diff_struct; // M12
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M13_Inter_Freq_Sfn_Cfn_Diff.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M13_Inter_Freq_Sfn_Cfn_Diff.l1v
new file mode 100755
index 0000000..4d5f689
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M13_Inter_Freq_Sfn_Cfn_Diff.l1v
@@ -0,0 +1,92 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M13: SFN-CFN Observed Time Difference (Intra frequency measurement)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_INTER_FREQ_SFN_CFN_DIFF
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_inter_freq_sfn_cfn_diff_struct; // M13
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10655
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M14_Sfn_Sfn_Diff_Type1.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M14_Sfn_Sfn_Diff_Type1.l1v
new file mode 100755
index 0000000..d270a8d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M14_Sfn_Sfn_Diff_Type1.l1v
@@ -0,0 +1,144 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M14: SFN-SFN Observed Time Difference Type 1"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_SFN_SFN_DIFF_TYPE1
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+} udps_sfn_sfn_diff_type1_struct; // M14
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10630
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* Setup RACH of BTS2
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+
+/* The same for BTS1 and BTS2 */
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M15_UE_Tx_Power.l1v b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M15_UE_Tx_Power.l1v
new file mode 100755
index 0000000..997cb00
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/1_3G_Single_Meas/udps_M15_UE_Tx_Power.l1v
@@ -0,0 +1,82 @@
+{ Validation }
+Title = "[1_3G_Single_Meas]M15: UE Transmitted Power"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_UE_TX_POWER
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_ue_tx_power_struct; // M15
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10630
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM1_Gsm_Meas_in_Null.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM1_Gsm_Meas_in_Null.l1v
new file mode 100755
index 0000000..078e708
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM1_Gsm_Meas_in_Null.l1v
@@ -0,0 +1,77 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]GM1: GSM measurements in 3G NULL Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_GSM_MEAS_IN_NULL
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell: default = 1(NCC)x8 + 5(BCC) = 13
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+} udps_gsm_meas_in_null_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of lower frequency BTS"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM2_Gsm_Meas_in_Idle.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM2_Gsm_Meas_in_Idle.l1v
new file mode 100755
index 0000000..89750a2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM2_Gsm_Meas_in_Idle.l1v
@@ -0,0 +1,135 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]GM2: GSM measurements in 3G Idle Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_GSM_MEAS_IN_IDLE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell: default = 1(NCC)x8 + 5(BCC) = 13
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+} udps_gsm_meas_in_idle_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM3_Gsm_Meas_in_Fach.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM3_Gsm_Meas_in_Fach.l1v
new file mode 100755
index 0000000..7591954
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM3_Gsm_Meas_in_Fach.l1v
@@ -0,0 +1,154 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]GM3: GSM measurements in 3G FACH State."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_GSM_MEAS_IN_FACH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ //kal_uint8 bands; // Do NOT need PS
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+} udps_gsm_meas_in_fach_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM4_Gsm_Reporting_Delay.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM4_Gsm_Reporting_Delay.l1v
new file mode 100755
index 0000000..653cbb7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM4_Gsm_Reporting_Delay.l1v
@@ -0,0 +1,97 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]GM4: GSM measurements (Event triggered report with BSIC verification required)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_GSM_REPORTING_DELAY
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_gsm_reporting_delay_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM5_Gsm_Reporting_Delay_No_Bsic.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM5_Gsm_Reporting_Delay_No_Bsic.l1v
new file mode 100755
index 0000000..181f092
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM5_Gsm_Reporting_Delay_No_Bsic.l1v
@@ -0,0 +1,97 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]GM5: GSM measurements (Event triggered report without BSIC verification required)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_GSM_REPORTING_DELAY_NO_BSIC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_gsm_reporting_delay_no_bsic_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM6_Abs_Gsm_Carrier_Rssi.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM6_Abs_Gsm_Carrier_Rssi.l1v
new file mode 100755
index 0000000..7f1f43e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_GM6_Abs_Gsm_Carrier_Rssi.l1v
@@ -0,0 +1,97 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]GM6: GSM Carrier RSSI (Absolute accuracy)."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ABS_GSM_CARRIER_RSSI
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_abs_gsm_carrier_rssi_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10640
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT1_Gsm_Crs_to_Umts.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT1_Gsm_Crs_to_Umts.l1v
new file mode 100755
index 0000000..dbc1d55
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT1_Gsm_Crs_to_Umts.l1v
@@ -0,0 +1,174 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]IRT1: Cell Re-Selection from GSM to UMTS."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_GSM_CRS_TO_UMTS
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+ //kal_int8 bsic_bts2; // BSIC of GSM neighbor cell: default = 1(NCC)x8 + 5(BCC) = 13
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ // For 2G DPS
+ udps_2g_rf_pwr_cap_struct gsm450PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm480PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm850PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm900PowerClass;
+ udps_2g_rf_pwr_cap_struct dcsPowerClass;
+ udps_2g_rf_pwr_cap_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+} udps_gsm_crs_to_umts_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+//[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+//0~63
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[imsi1_valid] "Is there valid IMSI"
+@KAL_FALSE
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT2_Umts_Crs_to_Gsm.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT2_Umts_Crs_to_Gsm.l1v
new file mode 100755
index 0000000..ff500c5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT2_Umts_Crs_to_Gsm.l1v
@@ -0,0 +1,176 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]IRT2: Cell Re-Selection from UMTS to GSM."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_UMTS_CRS_TO_GSM
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell: default = 1(NCC)x8 + 5(BCC) = 13
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ // For 2G DPS
+ udps_2g_rf_pwr_cap_struct gsm450PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm480PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm850PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm900PowerClass;
+ udps_2g_rf_pwr_cap_struct dcsPowerClass;
+ udps_2g_rf_pwr_cap_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+} udps_umts_crs_to_gsm_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[imsi1_valid] "Is there valid IMSI"
+@KAL_FALSE
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT3_Gsm_Hho_to_Umts.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT3_Gsm_Hho_to_Umts.l1v
new file mode 100755
index 0000000..247a772
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_IRT3_Gsm_Hho_to_Umts.l1v
@@ -0,0 +1,155 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]IRT3: Inter-RAT HHO from GSM to UMTS."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_GSM_HHO_TO_UMTS
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+
+ // For 2G DPS
+ udps_2g_rf_pwr_cap_struct gsm450PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm480PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm850PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm900PowerClass;
+ udps_2g_rf_pwr_cap_struct dcsPowerClass;
+ udps_2g_rf_pwr_cap_struct pcsPowerClass;
+} udps_gsm_hho_to_umts_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM1_Wcdma_Meas_in_Scan.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM1_Wcdma_Meas_in_Scan.l1v
new file mode 100755
index 0000000..604c192
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM1_Wcdma_Meas_in_Scan.l1v
@@ -0,0 +1,78 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]UM1: WCDMA measurements in 2G SCAN Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_WCDMA_MEAS_IN_SCAN
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+ kal_int8 bsic_bts2; // BSIC of GSM neighbor cell: default = 1(NCC)x8 + 5(BCC) = 13
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+} udps_wcdma_meas_in_scan_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+0~63
+@13
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM2_Wcdma_Meas_in_Idle.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM2_Wcdma_Meas_in_Idle.l1v
new file mode 100755
index 0000000..993a4b8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM2_Wcdma_Meas_in_Idle.l1v
@@ -0,0 +1,143 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]UM2: WCDMA measurements in 2G IDLE Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_WCDMA_MEAS_IN_IDLE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+ //kal_int8 bsic_bts2; // BSIC of GSM neighbor cell: default = 1(NCC)x8 + 5(BCC) = 13
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ //For 2G DPS
+ udps_2g_rf_pwr_cap_struct gsm450PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm480PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm850PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm900PowerClass;
+ udps_2g_rf_pwr_cap_struct dcsPowerClass;
+ udps_2g_rf_pwr_cap_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+} udps_wcdma_meas_in_idle_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for FS)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for FS)"
+0~511
+@511
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+//[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+//0~63
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[imsi1_valid] "Is there valid IMSI"
+@KAL_FALSE
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM3_Wcdma_Meas_in_Dedi.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM3_Wcdma_Meas_in_Dedi.l1v
new file mode 100755
index 0000000..61b34d3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM3_Wcdma_Meas_in_Dedi.l1v
@@ -0,0 +1,123 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]UM3: WCDMA measurements in 2G Dedicated Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_WCDMA_MEAS_IN_DEDI
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ //For 2G DPS
+ udps_2g_rf_pwr_cap_struct gsm450PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm480PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm850PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm900PowerClass;
+ udps_2g_rf_pwr_cap_struct dcsPowerClass;
+ udps_2g_rf_pwr_cap_struct pcsPowerClass;
+} udps_wcdma_meas_in_dedi_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM4_Wcdma_Meas_in_Pidle.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM4_Wcdma_Meas_in_Pidle.l1v
new file mode 100755
index 0000000..f586255
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM4_Wcdma_Meas_in_Pidle.l1v
@@ -0,0 +1,88 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]UM4: WCDMA measurements in 2G Packet Idle Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_WCDMA_MEAS_IN_PIDLE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ //For 2G DPS
+ kal_bool GprsMeasMode;
+} udps_wcdma_meas_in_pidle_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for FS)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for FS)"
+0~511
+@511
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+[GprsMeasMode] "Assume PMO/PCO Received (GPRS meas mode)"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM5_Wcdma_Meas_in_Ptx.l1v b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM5_Wcdma_Meas_in_Ptx.l1v
new file mode 100755
index 0000000..b6ac813
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/2_3G_Dual_Mode/udps_UM5_Wcdma_Meas_in_Ptx.l1v
@@ -0,0 +1,95 @@
+{ Validation }
+Title = "[2_3G_Dual_Mode]UM5: WCDMA measurements in 2G Packet Transfer Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_WCDMA_MEAS_IN_PTX
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands; // BAND of GSM neighbor cell: default 0=PGSM
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell: default = 20
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+ //For 2G DPS
+ kal_bool RlcChanReq;
+ //kal_uint8 AutoRepeat;
+ kal_uint8 InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+} udps_wcdma_meas_in_ptx_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10587~10814
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+
+//[AutoRepeat] "Repeat the Test"
+//@KAL_FALSE
+
+[InfiniteTBF] "End TBF from MS side"
+@0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+@3000
+
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_A6_Best_Effort_for_PRACH.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_A6_Best_Effort_for_PRACH.l1v
new file mode 100755
index 0000000..a49e137
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_A6_Best_Effort_for_PRACH.l1v
@@ -0,0 +1,154 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]A6: Best Effort for PRACH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_BEST_EFFORT_FOR_PRACH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 UL_interference; //range: -110~-70 dBm
+ kal_uint8 available_SF;
+ kal_uint8 preamble_sc;
+ kal_uint16 sig_index;
+ kal_uint16 sub_CH_index;
+ kal_uint8 RACH_TTI;
+ kal_int8 const_value;
+ kal_uint8 pwr_ramp_size;
+ kal_uint8 preamble_reTx_max;
+ kal_uint8 Mmax;
+ kal_uint8 NBO1min;
+ kal_uint8 NBO1max;
+ kal_uint8 OVSFaich;
+ kal_int8 aich_pwr_off;
+ kal_uint8 aich_timing;
+
+ // For FACH
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_bool pilot_exit;
+ kal_bool tfci_exit;
+
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+
+} udps_best_effort_for_prach_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[UL_interference] "UL_interference [dBm]"
+-110~-70
+@-92
+
+/******************************************
+* For RACH
+******************************************/
+[available_SF] "(RACH)Min allowed SF for"
+@SF32 32
+SF64 64
+SF128 128
+SF256 256
+
+[preamble_sc] "(RACH) Preamble scrambling code"
+0~15
+@5
+
+[sig_index] "(RACH) Available signature. Bit string (16)"
+0~65535
+@65535
+
+[sub_CH_index] "(RACH) Available sub-channel. Bit string (12)"
+0~4095
+@4095
+
+[RACH_TTI] "(RACH) TTI. [Number of frames]"
+@TTI10 1
+TTI20 2
+
+[const_value] "(RACH) Constant Value [dB]"
+-35~-10
+@-10
+
+[pwr_ramp_size] "(RACH) Preamble Power Ramping Step [dB]"
+1~8
+@3
+
+[preamble_reTx_max] "(RACH) Max preamble retransmission"
+1~64
+@12
+
+[Mmax] "(RACH) Max. of ramping cycle"
+1~32
+@2
+
+[NBO1min] "(RACH) Lower bound for random back-off"
+0~50
+@0
+[NBO1max] "(RACH) Upper bound for random back-off"
+0~50
+@0
+[OVSFaich] "(RACH) OVSF code of AICH"
+0~255
+@150
+
+[aich_pwr_off] "(RACH) AICH's Power offset to CPICH [dB]"
+-22~5
+@-7
+
+[aich_timing] "(RACH) AICH Tx timing, i.e. Tau_p_a"
+@slots_3 0
+slots_5 1
+
+/******************************************
+* For FACH
+******************************************/
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[pilot_exit] "Pilot Exit for Slot Format of the S-CCPCH"
+@KAL_TRUE
+
+[tfci_exit] "TFCI Exit for Slot Format of the S-CCPCH"
+@KAL_TRUE
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_A7_Recursive_TCS_in_FACH.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_A7_Recursive_TCS_in_FACH.l1v
new file mode 100755
index 0000000..3cb7416
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_A7_Recursive_TCS_in_FACH.l1v
@@ -0,0 +1,59 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]A7: Recursive TCS in FACH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RECURSIVE_TCS_IN_FACH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_int8 max_tx_power;
+ // For RACH
+ // Use Default Value
+
+ // For FACH
+ // Use Default Value
+} udps_recursive_tcs_in_fach_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD25_Recursive_TCS_in_DCH.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD25_Recursive_TCS_in_DCH.l1v
new file mode 100755
index 0000000..848c6df
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD25_Recursive_TCS_in_DCH.l1v
@@ -0,0 +1,86 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD25: Recursive TCS in DCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RECURSIVE_TCS_IN_DCH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ udps_TCS_type_struct udps_TCS_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_recursive_tcs_in_dch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Inter-freq. Cell (CS4 only)"
+10562~10814
+@10600
+
+[psc_bts2] "PSC of Inter-freq. Cell"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+
+/******************************************
+* For DCH
+******************************************/
+[udps_TCS_type] "Choose the TCS type in DCH"
+@TCS3_INTRA
+TCS2_INTRA
+TCS2_INTER
+TCS3_IRT
+TCS2_IRT
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD26_Unknown_SFN_Decoding_in_DCH.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD26_Unknown_SFN_Decoding_in_DCH.l1v
new file mode 100755
index 0000000..4db524a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD26_Unknown_SFN_Decoding_in_DCH.l1v
@@ -0,0 +1,83 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD26: Unknown SFN decoding in DCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_UNKNOWN_SFN_DECODING_IN_DCH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_int8 max_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 sfn_frame_len; //CD26 only
+} udps_unknown_sfn_decoding_in_dch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10814
+@10600
+
+[psc_bts2] "PSC of Inter-freq. Cell"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[sfn_frame_len] "Enter the SFN decoding length:"
+3~255
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD28_TPC_Combining_Reliable_Test.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD28_TPC_Combining_Reliable_Test.l1v
new file mode 100755
index 0000000..c014e66
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD28_TPC_Combining_Reliable_Test.l1v
@@ -0,0 +1,133 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD28: TPC_Combining_Reliable_Test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_TPC_COMBINING_RELIABLE_TEST
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+ kal_bool bts3_valid;
+ kal_uint16 psc_bts3;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 Tdpch_rl2; // for SHO pef
+ kal_uint16 OVSFdpch_rl2; // for SHO pef
+ kal_uint8 Tdpch_rl3; // only when bts3_valid = TRUE
+ kal_uint16 OVSFdpch_rl3; // only when bts3_valid = TRUE
+ kal_uint8 pc_algo; //CD28 needed
+ kal_uint8 tpc_step; //CD28 needed
+} udps_tpc_combining_reliable_test_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell 1 (MUST LINK first)"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell 1 (MUST LINK first)"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Serving Cell 2"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Serving Cell 2"
+0~511
+@511
+
+[bts3_valid] "Is BTS3 available?"
+@KAL_FALSE
+
+[psc_bts3] "PSC of Serving Cell 3"
+0~511
+@0
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
+
+[Tdpch_rl2] "(DCH) Timing offset between 1st DPCH and CPICH for BTS2 [x256 chips]"
+0~149
+@4
+
+[OVSFdpch_rl2] "(DCH) OVSF code of DL DCH for BTS2: 0~SF-1 "
+0~511
+@30
+
+[Tdpch_rl3] "(DCH) Timing offset between 1st DPCH and CPICH for BTS3 [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl3] "(DCH) OVSF code of DL DCH for BTS3: 0~SF-1 "
+0~511
+@30
+
+[pc_algo] "UL Power control algorithm"
+1~2
+@1
+
+[tpc_step] "UL Power control step size"
+1~2
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD31_SIR_Meas_In_DCH_with_TXTD_CM.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD31_SIR_Meas_In_DCH_with_TXTD_CM.l1v
new file mode 100755
index 0000000..fa7a324
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD31_SIR_Meas_In_DCH_with_TXTD_CM.l1v
@@ -0,0 +1,94 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD31: SIR_Meas_In_DCH_with_TXTD_CM"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_SIR_MEAS_IN_DCH_WITH_TXTD_CM
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ tx_diversity_E diversity_mode; // for CD31
+ kal_uint32 ul_sc;
+ kal_uint8 ul_dch_FBI_bit; // for CD31
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ //kal_bool using_HLS; // CD31 only
+ kal_uint8 CM_set_pef;
+} udps_sir_meas_in_dch_with_txtd_cm_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[diversity_mode] "Tx Diversity Mode"
+FDD_DL_TX_NONE
+@FDD_DL_TX_STTD
+FDD_DL_TX_CLM1
+FDD_DL_TX_CLM2
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[ul_dch_FBI_bit] "Number of FBI bits"
+0~2
+@1
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[CM_set_pef] "compressed mode pattern 1/2"
+@Set1 1
+Set2 2
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD32_DLPC_Test_Wind_Up_Down.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD32_DLPC_Test_Wind_Up_Down.l1v
new file mode 100755
index 0000000..5948e74
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD32_DLPC_Test_Wind_Up_Down.l1v
@@ -0,0 +1,80 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD32: DLPC_Test_Wind_Up_Down"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DLPC_TEST_WIND_UP_DOWN
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_dlpc_test_wind_up_down_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the RMC 12.2 or 64kbps."
+@RMC_12_2
+RMC_64
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD33_Pef_of_TrCH_Reconfig.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD33_Pef_of_TrCH_Reconfig.l1v
new file mode 100755
index 0000000..60d7355
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD33_Pef_of_TrCH_Reconfig.l1v
@@ -0,0 +1,83 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD33: Performance of TrCH Reconfiguration (DL CLPC) (No LB2)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PEF_OF_TRCH_RECONFIG
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ udps_RMC_type_struct udps_RMC_type; // Enum: 12.2, 64,
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_pef_of_trch_reconfig_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC for stage 2 setting"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD34_DLPC_for_Diff_TF.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD34_DLPC_for_Diff_TF.l1v
new file mode 100755
index 0000000..ac630e2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD34_DLPC_for_Diff_TF.l1v
@@ -0,0 +1,72 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD34: Power Control in Downlink Different TF (No LB2)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DLPC_FOR_DIFF_TF
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_dlpc_for_diff_tf_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD35_DLPC_for_BTFD_Dual_TF.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD35_DLPC_for_BTFD_Dual_TF.l1v
new file mode 100755
index 0000000..d10f1ea
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD35_DLPC_for_BTFD_Dual_TF.l1v
@@ -0,0 +1,72 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD35: Performance of BTFD with DUAL TF (With DL CLPC) (No LB2)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DLPC_FOR_BTFD_DUAL_TF
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_dlpc_for_btfd_dual_tf_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD36_DLPC_for_TFCI_Dual_TF.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD36_DLPC_for_TFCI_Dual_TF.l1v
new file mode 100755
index 0000000..4eedbf2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD36_DLPC_for_TFCI_Dual_TF.l1v
@@ -0,0 +1,72 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD36: Performance of RMC12.2 with DUAL TF (With DL CLPC) (No LB2)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DLPC_FOR_TFCI_DUAL_TF
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_dlpc_for_btfd_dual_tf_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD37_DLPC_Test_Initial_Convergence.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD37_DLPC_Test_Initial_Convergence.l1v
new file mode 100755
index 0000000..b3f51a8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD37_DLPC_Test_Initial_Convergence.l1v
@@ -0,0 +1,80 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD37: DLPC_Test_Initial_Convergence"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_DLPC_TEST_INITIAL_CONVERGENCE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power;
+ kal_bool sttd_ind;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_dlpc_test_wind_up_down_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the RMC 12.2 or 64kbps."
+@RMC_12_2 0
+RMC_64 1
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD38_ULPC_for_TX_AGC_test.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD38_ULPC_for_TX_AGC_test.l1v
new file mode 100755
index 0000000..c314101
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_CD38_ULPC_for_TX_AGC_test.l1v
@@ -0,0 +1,102 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]CD38: ULPC of TX AGC test"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ULPC_FOR_TX_AGC_TEST
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+ kal_uint8 pc_algo; //CD38
+ kal_uint8 tpc_step; //CD38
+ kal_uint8 ul_dch_pc_pream;
+ kal_uint8 CM_rpp; //CD38
+ kal_uint8 CM_itp; //CD38
+} udps_ulpc_for_tx_agc_test_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+/******************************************
+* For DCH
+******************************************/
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@0
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@50
+
+[pc_algo] "UL Power control algorithm"
+1~2
+@1
+
+[tpc_step] "UL Power control step size"
+1~2
+@1
+
+[ul_dch_pc_pream] "UL Power control preamble"
+0~7
+@1
+
+[CM_rpp] "CM's RPP"
+0~1
+@0
+
+[CM_itp] "CM's ITP"
+0~1
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I11_Recursive_IPS_in_NULL.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I11_Recursive_IPS_in_NULL.l1v
new file mode 100755
index 0000000..d88e6e8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I11_Recursive_IPS_in_NULL.l1v
@@ -0,0 +1,31 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]I11: Recursive IPS in NULL"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RECURSIVE_IPS_IN_NULL
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+} udps_recursive_ips_in_null_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of lower frequency BTS"
+10562~10838
+9662~9938
+4357~4458
+@10600
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I5_PCH_reading_on_STTD_Cell.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I5_PCH_reading_on_STTD_Cell.l1v
new file mode 100755
index 0000000..9b2e3b4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I5_PCH_reading_on_STTD_Cell.l1v
@@ -0,0 +1,117 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]I5: PCH_reading_on_STTD_Cell"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PCH_READING_ON_STTD_CELL
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ //for STTD cell, no 2nd BTS
+
+ kal_bool read_BCH_only; // for BSC1(CSD) only
+
+ //for PCH on S-CCPCH
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+ //kal_uint16 SFs_ccpch; //for Slot Format
+ kal_bool pilot_exit; //for Slot Format
+ kal_bool tfci_exit; //for Slot Format
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_uint16 count_blks; // for Self BLER cal.
+
+ kal_int16 freq_offset;//I3, I5 add I/F for CSD's freq. offset requirement.
+ kal_uint16 offline_rake_test_count; // for I3, I5, I6
+} udps_pch_reading_on_sttd_cell_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+
+[read_BCH_only] "(CSD) Conti. Read BCH on this STTD Cell?"
+@KAL_FALSE
+
+[count_blks] "(CSD)Wanted total BCH Blocks number?"
+@2000
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[pilot_exit] "Pilot Exit for Slot Format of the S-CCPCH"
+@KAL_TRUE
+
+[tfci_exit] "TFCI Exit for Slot Format of the S-CCPCH"
+@KAL_TRUE
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[freq_offset] "(CSD) Offline Rake Test's freq. offset:"
+@0
+
+[offline_rake_test_count] "offline RAKE test count"
+@1000
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I6_Pch_Receive.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I6_Pch_Receive.l1v
new file mode 100755
index 0000000..ecc7062
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I6_Pch_Receive.l1v
@@ -0,0 +1,118 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]I6: PCH receive"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_PCH_RECEIVE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ kal_uint8 sccpch_slot_format;
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+ kal_bool sttd_ind;
+
+ kal_int16 freq_offset;//I3, I5 add I/F for CSD's freq. offset requirement.
+ kal_uint8 offline_rake_test_mode; // for I6
+ kal_uint16 offline_rake_test_count; // for I3, I5, I6
+} udps_pch_receive_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10700
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[sccpch_slot_format] "S-CCPCH slot format"
+0~17
+@4
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@3
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@2
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+PI18 18
+PI36 36
+@PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
+[sttd_ind] "Use STTD or not"
+@KAL_FALSE
+
+[freq_offset] "(CSD) Offline Rake Test's freq. offset:"
+@0
+
+[offline_rake_test_mode] "offline RAKE test mode"
+1~3
+@1
+
+[offline_rake_test_count] "offline RAKE test count"
+@1000
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I8_Recursive_TCS_in_PCH.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I8_Recursive_TCS_in_PCH.l1v
new file mode 100755
index 0000000..f889a98
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I8_Recursive_TCS_in_PCH.l1v
@@ -0,0 +1,107 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]I8: Recursive TCS in PCH"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RECURSIVE_TCS_IN_PCH
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2;
+
+ udps_TCS_type_struct udps_TCS_type;
+
+ kal_uint8 Ts_ccpch;
+ kal_uint16 OVSFs_ccpch;
+ kal_uint16 OVSFpich;
+
+ kal_int8 cpich_tx_power;
+ kal_int8 pich_power_off;
+ kal_uint8 DRX_cycle_length;
+ kal_uint8 PI_num;
+ kal_uint8 page_occa;
+ kal_uint32 DRX_index;
+} udps_recursive_tcs_in_pch_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10670~10838
+@10700
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+[udps_TCS_type] "Choose the TCS type in PCH"
+@TCS3_INTRA
+TCS2_INTRA
+TCS2_INTER
+TCS3_IRT
+TCS2_IRT
+
+[Ts_ccpch] "Timing offset between S-CCPCH and CPICH [x256 chips]"
+0~149
+@0
+
+[OVSFs_ccpch] "The OVSF code number of the S-CCPCH (0~SF-1)"
+0~63
+@7
+
+[OVSFpich] "The OVSF code number of the PICH"
+0~255
+@100
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+[pich_power_off] "PICH power offset from CPICH [dB]"
+-10~5
+@-5
+
+[DRX_cycle_length] "DRX cycle length for PICH, (6~9)"
+@DRX6 6
+DRX7 7
+DRX8 8
+DRX9 9
+
+[PI_num] "Number of paging indicators per frame (Np)"
+@PI18 18
+PI36 36
+PI72 72
+PI144 144
+
+[page_occa] "Paging occassion when IMSI mod DRX, n=0"
+0~511
+@0
+
+[DRX_index] "DRX_index defined in 25.304 (IMSI/8192)"
+0~122070312499
+@0
+
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I9_Recursive_ICS_in_NULL.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I9_Recursive_ICS_in_NULL.l1v
new file mode 100755
index 0000000..538b190
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_I9_Recursive_ICS_in_NULL.l1v
@@ -0,0 +1,31 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]I9: Recursive ICS in NULL"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RECURSIVE_ICS_IN_NULL
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+} udps_initial_cell_search_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of lower frequency BTS"
+10562~10838
+9662~9938
+4357~4458
+@10600
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_M16_all_meas_statistic.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_M16_all_meas_statistic.l1v
new file mode 100755
index 0000000..9979c06
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_M16_all_meas_statistic.l1v
@@ -0,0 +1,89 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]M16: All Measurement Statistic (RSSI, RSCP, Ec/No)(CSD)"
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_ALL_MEAS_STATISTIC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1; //except psc = x49 or x99.
+ kal_uint16 uarfcn_bts2;
+ kal_uint16 psc_bts2; //except psc = x49 or x99.
+ kal_int8 max_tx_power;
+ kal_int8 cpich_tx_power; //RACH use
+ kal_bool sttd_ind; //RACH use
+ udps_RMC_type_struct udps_RMC_type;
+ kal_uint32 ul_sc;
+ kal_uint16 DOFF_bts1;
+ kal_uint8 Tdpch_rl1;
+ kal_uint16 OVSFdpch_rl1;
+} udps_all_meas_statistic_struct; // M16
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Serving Cell"
+10562~10838
+@10600
+
+[psc_bts1] "PSC of Serving Cell"
+0~511
+@10
+
+[uarfcn_bts2] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+@10600
+
+[psc_bts2] "PSC of Neighbor Cell (for Meas)"
+0~511
+@511
+
+/******************************************
+* For RACH
+******************************************/
+[max_tx_power] "Maximum allowed UL TX power [dBm]"
+-50~33
+@24
+
+[cpich_tx_power] "CPICH TX power [dBm]"
+-10~50
+@0
+
+/******************************************
+* For DCH
+******************************************/
+[udps_RMC_type] "Choose One of the FOUR standard RMC"
+RMC_144
+@RMC_12_2
+RMC_64
+RMC_384
+RMC_BTFD
+
+[ul_sc] "(DCH) UL Scrambling code Num."
+0~16777215
+@13
+
+[DOFF_bts1] "(DCH) Default DPCH Offset [x512 chips]"
+0~599
+@20
+
+[Tdpch_rl1] "(DCH) Timing offset between 1st DPCH and CPICH [x256 chips]"
+0~149
+@40
+
+[OVSFdpch_rl1] "(DCH) OVSF code of DL DCH: 0~SF-1"
+0~511
+@30
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_UM6_Recursive_TCS_in_2G_Idle.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_UM6_Recursive_TCS_in_2G_Idle.l1v
new file mode 100755
index 0000000..c5287f4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_UM6_Recursive_TCS_in_2G_Idle.l1v
@@ -0,0 +1,130 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]UM6: Recursive_TCS_in_2G_Idle."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RECURSIVE_TCS_IN_2G_IDLE
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands;/// BAND of GSM neighbor cell
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+ //kal_int8 bsic_bts2; // BSIC of GSM neighbor cell
+
+ udps_TCS_type_struct udps_TCS_type; // CSx(CSD) only
+
+ // For 2G DPS
+ udps_2g_rf_pwr_cap_struct gsm450PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm480PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm850PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm900PowerClass;
+ udps_2g_rf_pwr_cap_struct dcsPowerClass;
+ udps_2g_rf_pwr_cap_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+} udps_recursive_tcs_in_2g_idle_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for TCS)"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for TCS)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+//[bsic_bts2] "6bit BSIC(3bit NCC + 3bitBCC)"
+//0~63
+
+[udps_TCS_type] "Choose the TCS type in DCH"
+@TCS3_INTRA
+TCS2_INTRA
+TCS2_INTER
+TCS3_IRT
+TCS2_IRT
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[imsi1_valid] "Is there valid IMSI"
+@KAL_FALSE
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_UM7_Recursive_TCS_in_2G_Dedi.l1v b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_UM7_Recursive_TCS_in_2G_Dedi.l1v
new file mode 100755
index 0000000..3d5272c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/3_3G_CSD_Request/udps_UM7_Recursive_TCS_in_2G_Dedi.l1v
@@ -0,0 +1,114 @@
+{ Validation }
+Title = "[3_3G_CSD_Request]UM7: Recursive_TCS_in_2G Dedicated Mode."
+ModuleID = MOD_DUMMYURR
+MsgID = MSG_ID_UDPS_RECURSIVE_TCS_IN_2G_DEDI
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ kal_uint16 uarfcn_bts1;
+ kal_uint16 psc_bts1;
+ kal_uint8 bands;// BAND of GSM neighbor cell
+ kal_int16 arfcn_bts2; // ARFCN of GSM neighbor cell
+
+ udps_TCS_type_struct udps_TCS_type; // CSx(CSD) only
+
+ // For 2G DPS
+ udps_2g_rf_pwr_cap_struct gsm450PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm480PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm850PowerClass;
+ udps_2g_rf_pwr_cap_struct gsm900PowerClass;
+ udps_2g_rf_pwr_cap_struct dcsPowerClass;
+ udps_2g_rf_pwr_cap_struct pcsPowerClass;
+} udps_recursive_tcs_in_2g_dedi_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[uarfcn_bts1] "UARFCN of Neighbor Cell (for Meas)"
+10562~10838
+9662~9938
+4357~4458
+@10600
+
+[psc_bts1] "PSC of Neighbor Cell (for Meas)"
+0~511
+@10
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+@EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+
+[arfcn_bts2] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+
+[udps_TCS_type] "Choose the TCS type in DCH"
+@24
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
diff --git a/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT1_PowerScanWithStoredList.l1v b/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT1_PowerScanWithStoredList.l1v
new file mode 100755
index 0000000..cae8e17
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT1_PowerScanWithStoredList.l1v
@@ -0,0 +1,65 @@
+{ Validation }
+Title = "[4_2G_FT]FT1: Repeated Power Scan with stored list"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_POWER_SCAN_WITH_STORED_LIST_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ kal_int16 PM1;
+ kal_int16 PM2;
+ kal_int16 PM3;
+ kal_int16 PM4;
+ kal_int16 PM5;
+ kal_int16 PM6;
+} dps_power_scan_with_stored_list_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+
+[PM1] "PM1"
+0~124
+975~1023
+512~885
+
+[PM2] "PM2"
+0~124
+975~1023
+512~885
+
+[PM3] "PM3"
+0~124
+975~1023
+512~885
+
+[PM4] "PM4"
+0~124
+975~1023
+512~885
+
+[PM5] "PM5"
+0~124
+975~1023
+512~885
+
+[PM6] "PM6"
+0~124
+975~1023
+512~885
diff --git a/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT2_CCCh_nonSig_FT.l1v b/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT2_CCCh_nonSig_FT.l1v
new file mode 100755
index 0000000..e95bb90
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT2_CCCh_nonSig_FT.l1v
@@ -0,0 +1,81 @@
+{ Validation }
+Title = "[4_2G_FT]FT2: GPRS PDTCH for field trail"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_GPRS_NONSIG_FT_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcnPDTCh1;
+ ARFCN arfcnPDTCh2;
+ ARFCN arfcnPDTCh3;
+ ARFCN arfcnPDTCh4;
+ kal_int8 tsc;
+ kal_int8 syncTimeslotPDTCh;
+ kal_int8 constellationPDTCh;
+ kal_int16 startPM1;
+ kal_int16 endPM1;
+ kal_int16 startPM2;
+ kal_int16 endPM2;
+ kal_int16 repeat_second;
+}dps_ccch_gprs_nonsig_ft_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+
+
+[repeat_second] "Repeat Period (sec)"
+1 ~ 8888888
+
+[arfcnSpec] "BCCH ARFCN"
+-1~124
+975~1023
+512~885
+
+[arfcnPDTCh1] "PDTCH ARFCN1"
+-1~124
+975~1023
+512~885
+
+[arfcnPDTCh2] "PDTCH ARFCN2"
+-1~124
+975~1023
+512~885
+
+[arfcnPDTCh3] "PDTCH ARFCN3"
+-1~124
+975~1023
+512~885
+
+[arfcnPDTCh4] "PDTCH ARFCN4"
+-1~124
+975~1023
+512~885
+
+[tsc] "TSC of PDTCH"
+-2~7
+
+[syncTimeslotPDTCh] "Sync TS of PDTCH"
+0~7
+
+[constellationPDTCh] "Constellation of PDTCH"
+1~15
diff --git a/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT3_CCCh_Comb_Page_Reorg.l1v b/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT3_CCCh_Comb_Page_Reorg.l1v
new file mode 100755
index 0000000..dd8785a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/4_2G_FT/dps_FT3_CCCh_Comb_Page_Reorg.l1v
@@ -0,0 +1,41 @@
+{ Validation }
+Title = "[4_2G_FT]FT3: Combined CCCH with Page Reorg"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_COMB_PAGE_REORG_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_uint32 repeat_second;
+}dps_ccch_comb_page_reorg_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+
+[arfcnSpec] "BCCH ARFCN"
+-1~124
+975~1023
+512~885
+
+[repeat_second] "Repeat Period (sec)"
+1 ~ 8888888
+
diff --git a/mcu/service/dhl/database/l1validation_db/4g/l1v_db_4g.c b/mcu/service/dhl/database/l1validation_db/4g/l1v_db_4g.c
new file mode 100644
index 0000000..1b822f8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/4g/l1v_db_4g.c
@@ -0,0 +1,68 @@
+/********************************************************************************************
+ * LEGAL DISCLAIMER
+ *
+ * (Header of MediaTek Software/Firmware Release or Documentation)
+ *
+ * BY OPENING OR USING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") RECEIVED
+ * FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON AN "AS-IS" BASIS
+ * ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
+ * A PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY
+ * WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK
+ * ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+ * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION
+ * OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+ *
+ * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE LIABILITY WITH
+ * RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION,
+ *
+ * TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE
+ * FEES OR SERVICE CHARGE PAID BY BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE WITH THE LAWS
+ * OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF LAWS PRINCIPLES.
+ ************************************************************************************************/
+
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * l1v_db.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file used for pre-processing to build L1V DB
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ * How to add a new gv script
+ * 1. Put the l1v script into the proper folder e.g: \tst\database\l1validation_db
+ *
+ * 2. #include "xxx.l1v".
+ *
+ *******************************************************************************/
+
+#ifdef STDC_HEADERS
+#undef STDC_HEADERS //it will include stdio.h
+#endif
diff --git a/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S1_PowerScan.l1v b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S1_PowerScan.l1v
new file mode 100755
index 0000000..83767d8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S1_PowerScan.l1v
@@ -0,0 +1,32 @@
+{ Validation }
+Title = "[5_2G_Scan]S1: Repeated Power Scan"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_POWER_SCAN_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+} dps_power_scan_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
diff --git a/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S2_FBSBsearch.l1v b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S2_FBSBsearch.l1v
new file mode 100755
index 0000000..aadc915
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S2_FBSBsearch.l1v
@@ -0,0 +1,40 @@
+{ Validation }
+Title = "[5_2G_Scan]S2: Repeated power scan and FB+SB Search"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_STRONGEST_ARFCN_FB_SEARCH_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+} dps_strongest_arfcn_fb_search_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN specified"
+0~124
+975~1023
+512~885
+128~251
+@20
diff --git a/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S3_repeated_FBSB.l1v b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S3_repeated_FBSB.l1v
new file mode 100755
index 0000000..49fe464
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S3_repeated_FBSB.l1v
@@ -0,0 +1,48 @@
+{ Validation }
+Title = "[5_2G_Scan]S3: Repeated FB+SB Search"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_REPEATED_FB_SEARCH_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+} dps_repeated_fb_search_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+//Strongest ARFCN based on Power Scan is already used for FB search
+[arfcn2nd] "First ARFCN on which to test FB+SB search "
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn3rd] "Second ARFCN on which to test FB+SB search"
+0~124
+975~1023
+512~885
+128~251
+@40
diff --git a/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S4_BCCH_SI_receive.l1v b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S4_BCCH_SI_receive.l1v
new file mode 100755
index 0000000..776f11f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/5_2G_Scan/dps_S4_BCCH_SI_receive.l1v
@@ -0,0 +1,40 @@
+{ Validation }
+Title = "[5_2G_Scan]S4: BCCH/SI Receive"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_SPECIFIC_BCCH_RX_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+} dps_specific_bcch_rx_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
diff --git a/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I1_RepeatCampOn.l1v b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I1_RepeatCampOn.l1v
new file mode 100755
index 0000000..5cd47e1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I1_RepeatCampOn.l1v
@@ -0,0 +1,94 @@
+{ Validation }
+Title = "[6_2G_Idle]I1: Repeatedly Camp on the Strongest Base"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_REPEATED_IDLE_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+} dps_start_idle_req_struct, dps_repeated_idle_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[imsi1_valid] "Is there valid IMSI"
+@TRUE 1
+FALSE 0
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@789
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
diff --git a/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I2_EnterIdleState.l1v b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I2_EnterIdleState.l1v
new file mode 100755
index 0000000..655fdd5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I2_EnterIdleState.l1v
@@ -0,0 +1,94 @@
+{ Validation }
+Title = "[6_2G_Idle]I2: Enter Idle State"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_START_IDLE_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+} dps_start_idle_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[imsi1_valid] "Is there valid IMSI"
+@TRUE 1
+FALSE 0
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@789
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
diff --git a/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I3_SC_Test.l1v b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I3_SC_Test.l1v
new file mode 100755
index 0000000..cd3996a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I3_SC_Test.l1v
@@ -0,0 +1,114 @@
+{ Validation }
+Title = "[6_2G_Idle]I3: Surrounding Cell BSIC+BCCH Decode"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_SC_TEST_REQ // will be defined in appropriate header file
+
+/* DPS uses 2nd and 3rd strongest ARFCNs as the neighbor cell ARFCNs.
+ We can specify the neighbor cell ARFCNs from validation file by
+ making appropriate additions to the data structure below */
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 cbch_mode;
+} dps_sc_test_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@60
+[imsi1_valid] "Is there valid IMSI"
+@TRUE 1
+FALSE 0
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@789
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
diff --git a/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I4_CBCH_receive.l1v b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I4_CBCH_receive.l1v
new file mode 100755
index 0000000..96223da
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I4_CBCH_receive.l1v
@@ -0,0 +1,100 @@
+{ Validation }
+Title = "[6_2G_Idle]I4: CBCh Receive"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CBCH_RX_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 cbch_mode;
+} dps_cbch_rx_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[imsi1_valid] "Is there valid IMSI"
+@TRUE 1
+FALSE 0
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@789
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[cbch_mode] "CBCH Receive Mode (Normal/Extended)"
+MPH_CBCH_MODE_NORMAL 1
+MPH_CBCH_MODE_EXTENDED 2
+@MPH_CBCH_ALL 3
diff --git a/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I5_LocUpdate.l1v b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I5_LocUpdate.l1v
new file mode 100755
index 0000000..8a2c00d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/6_2G_Idle/dps_I5_LocUpdate.l1v
@@ -0,0 +1,88 @@
+{ Validation }
+Title = "[6_2G_Idle]I5: Location Update Procedure"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_LOCATION_UPDATE_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_uint8 cbch_mode;
+} dps_location_update_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
diff --git a/mcu/service/dhl/database/l1validation_db/7_2G_Dedicated/dps_D1_MT_call.l1v b/mcu/service/dhl/database/l1validation_db/7_2G_Dedicated/dps_D1_MT_call.l1v
new file mode 100755
index 0000000..c7cfce3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/7_2G_Dedicated/dps_D1_MT_call.l1v
@@ -0,0 +1,104 @@
+{ Validation }
+Title = "[7_2G_Dedicated]D1: Mobile Terminated Call Setup"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_MT_CALL_REQ // will be defined in appropriate header file
+
+/* Early and Late assignment are handled automatically */
+/* Currently the ARFCN of the SDCCH and TCH/FACCH are not controlled from the script */
+/* ARFCNs assigned by the BTS are used by the DPS */
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_uint8 cbch_mode;
+} dps_location_update_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@60
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+@POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+@POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+@POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+@POWER_CLASS_3 2
+POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
diff --git a/mcu/service/dhl/database/l1validation_db/7_2G_Dedicated/dps_D2_MO_call.l1v b/mcu/service/dhl/database/l1validation_db/7_2G_Dedicated/dps_D2_MO_call.l1v
new file mode 100755
index 0000000..8a4cd68
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/7_2G_Dedicated/dps_D2_MO_call.l1v
@@ -0,0 +1,104 @@
+{ Validation }
+Title = "[7_2G_Dedicated]D2: Mobile Originated Call Setup"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_MO_CALL_REQ // will be defined in appropriate header file
+
+/* Early and Late assignment are handled automatically */
+/* Currently the ARFCN of the SDCCH and TCH/FACCH are not controlled from the script */
+/* ARFCNs assigned by the BTS are used by the DPS */
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_uint8 cbch_mode;
+} dps_location_update_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@60
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI10_CCCh_Pkt_Idle_SC_Test.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI10_CCCh_Pkt_Idle_SC_Test.l1v
new file mode 100755
index 0000000..c7d370b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI10_CCCh_Pkt_Idle_SC_Test.l1v
@@ -0,0 +1,113 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI10: CCCh Packet Idle Surrounding Cell BSIC+BCCH Decode"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_PKT_IDLE_SC_TEST_REQ // will be defined in appropriate header file
+
+/* DPS uses 2nd and 3rd strongest ARFCNs as the neighbor cell ARFCNs.
+ We can specify the neighbor cell ARFCNs from validation file by
+ making appropriate additions to the data structure below */
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ rf_power_capability_struct gsm900PowerClass;
+ rf_power_capability_struct gsm850PowerClass;
+ rf_power_capability_struct gsm480PowerClass;
+ rf_power_capability_struct gsm450PowerClass;
+ rf_power_capability_struct dcsPowerClass;
+ rf_power_capability_struct pcsPowerClass;
+ kal_bool imsi1_valid;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 cbch_mode;
+} dps_ccch_pkt_idle_sc_test_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@60
+[imsi1_valid] "Is there valid IMSI"
+@TRUE 1
+FALSE 0
+
+[imsi1_mod_1000] "IMSI modulo 1000"
+0~999
+@789
+[gsm900PowerClass] "MS Power Class for GSM 900 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm850PowerClass] "MS Power Class for GSM 850 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm480PowerClass] "MS Power Class for GSM 480 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[gsm450PowerClass] "MS Power Class for GSM 450 band"
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+@POWER_CLASS_4 3
+POWER_CLASS_5 4
+POWER_CLASS_INVALID -1
+
+[dcsPowerClass] "MS Power Class for DCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
+
+[pcsPowerClass] "MS Power Class for PCS band"
+@POWER_CLASS_1 0
+POWER_CLASS_2 1
+POWER_CLASS_3 2
+POWER_CLASS_INVALID -1
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI11_CCChNCMeas.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI11_CCChNCMeas.l1v
new file mode 100755
index 0000000..26525e9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI11_CCChNCMeas.l1v
@@ -0,0 +1,47 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI11: NC Measurements in CCCh Pkt Idle(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_NC_MEAS_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ ARFCN arfcnSpec;
+ kal_uint8 nc_reporting_period;
+ kal_uint8 nc_order;
+}dps_ccch_nc_meas_req_struct*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[nc_reporting_period] "NC Reporting period (coded)"
+0~7
+@0
+[nc_order] "Network Control Order"
+NC0 0
+@NC1 1
+NC2 2
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI12_CCChExtMeas.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI12_CCChExtMeas.l1v
new file mode 100755
index 0000000..af033ad
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI12_CCChExtMeas.l1v
@@ -0,0 +1,66 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI12: Extended and NC Measurements in CCCh Idle(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_EXT_MEAS_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN ExtArfcn1;
+ ARFCN ExtArfcn2;
+ kal_uint16 ext_reporting_period;
+ kal_uint8 nc_reporting_period;
+ kal_uint8 nc_order;
+}dps_ccch_ext_meas_req_struct
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[ExtArfcn1] "First ARFCN for Ext measurements"
+0~124
+975~1023
+512~885
+128~251
+[ExtArfcn2] "Second ARFCN for Ext measurements"
+0~124
+975~1023
+512~885
+128~251
+@40
+[ext_reporting_period] "EXT Reporting period (seconds)"
+1~7680
+@1
+[nc_reporting_period] "NC Reporting period (coded)"
+0~7
+@0
+[nc_order] "Network Control Order"
+@NC0 0
+NC1 1
+NC2 2
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI13_CCCh_Gprs_Attach_One_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI13_CCCh_Gprs_Attach_One_Phase.l1v
new file mode 100755
index 0000000..95426f3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI13_CCCh_Gprs_Attach_One_Phase.l1v
@@ -0,0 +1,60 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI13, PT1~4: GPRS Attach on CCCh + One Phase Access for UL User Data(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_GPRS_ATTACH_ONE_PHASE_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+}dps_ccch_gprs_attach_one_phase_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[AutoRepeat] "Repeat the Test"
+@FALSE 0
+TRUE 1
+
+[InfiniteTBF] "End TBF from MS side"
+@FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+@500
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI14_CCCh_Gprs_Attach_Two_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI14_CCCh_Gprs_Attach_Two_Phase.l1v
new file mode 100755
index 0000000..fe472e5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI14_CCCh_Gprs_Attach_Two_Phase.l1v
@@ -0,0 +1,55 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI14: GPRS Attach on CCCh + Two Phase Access for UL User Data(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_GPRS_ATTACH_TWO_PHASE_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+}dps_ccch_gprs_attach_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[InfiniteTBF] "End TBF from MS side"
+@FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+@500
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI15_PCCCh_Gprs_Attach_One_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI15_PCCCh_Gprs_Attach_One_Phase.l1v
new file mode 100755
index 0000000..73034bb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI15_PCCCh_Gprs_Attach_One_Phase.l1v
@@ -0,0 +1,64 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI15, PT4~7: GPRS Attach on PCCCh + One Phase Access for UL User Data(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_GPRS_ATTACH_ONE_PHASE_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 split_page_cycle;
+}dps_pccch_gprs_attach_one_phase_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[AutoRepeat] "Repeat the Test"
+@FALSE 0
+TRUE 1
+
+[InfiniteTBF] "End TBF from MS side"
+@FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+@500
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
+[split_page_cycle] "Split Page Cycle"
+1~255
+@32
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI16_PCCCh_Gprs_Attach_Two_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI16_PCCCh_Gprs_Attach_Two_Phase.l1v
new file mode 100755
index 0000000..c747341
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI16_PCCCh_Gprs_Attach_Two_Phase.l1v
@@ -0,0 +1,60 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI16: GPRS Attach on PCCCh + Two Phase Access for UL User Data(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_GPRS_ATTACH_TWO_PHASE_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 split_page_cycle;
+}dps_pccch_gprs_attach_two_phase_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[InfiniteTBF] "End TBF from MS side"
+@FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+@500
+[split_page_cycle] "Split Page Cycle"
+1~255
+@32
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI17_CCCh_Egprs_Attach_One_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI17_CCCh_Egprs_Attach_One_Phase.l1v
new file mode 100755
index 0000000..c19c68c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI17_CCCh_Egprs_Attach_One_Phase.l1v
@@ -0,0 +1,59 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI17: EGPRS Attach on CCCh + One Phase Access"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_EGPRS_ATTACH_ONE_PHASE_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+}dps_ccch_gprs_attach_one_phase_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[AutoRepeat] "Repeat the Test"
+FALSE 0
+TRUE 1
+
+[InfiniteTBF] "End TBF from MS side"
+FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI19_CCCh_Egprs_Attach_Two_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI19_CCCh_Egprs_Attach_Two_Phase.l1v
new file mode 100755
index 0000000..74fa12e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI19_CCCh_Egprs_Attach_Two_Phase.l1v
@@ -0,0 +1,68 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI18~19, PT11~15(C): EGPRS Attach on CCCh + Two Phase Access"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_EGPRS_ATTACH_TWO_PHASE_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 psModeA;
+ kal_bool isIRon;
+}dps_ccch_egprs_attach_two_phase_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+
+[bands] "Bands used for power scan"
+
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[InfiniteTBF] "End TBF from MS side"
+FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+
+[egprsPCR] "EGPRS PCR exists?"
+TRUE 1
+FALSE 0
+
+[psModeA] "puncturingScheme(A)"
+PS1 1
+PS2 2
+PS3 3
+
+[isIRon] "IR"
+TRUE 1
+FALSE 0
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI1_CCCh_Pkt_Idle1.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI1_CCCh_Pkt_Idle1.l1v
new file mode 100755
index 0000000..92beab5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI1_CCCh_Pkt_Idle1.l1v
@@ -0,0 +1,44 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI1: Packet Idle on CCCh"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_PACKET_IDLE1_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool GprsMeasMode;
+}dps_ccch_packet_idle1_req_struct, dps_ccch_packet_idle2_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[GprsMeasMode] "Assume PMO/PCO Received (GPRS meas mode)"
+TRUE 1
+@FALSE 0
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI20_PCCCh_Egprs_Attach_One_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI20_PCCCh_Egprs_Attach_One_Phase.l1v
new file mode 100755
index 0000000..696cc82
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI20_PCCCh_Egprs_Attach_One_Phase.l1v
@@ -0,0 +1,42 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI20: EGPRS Attach on PCCCh + One Phase Access"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_EGPRS_ATTACH_ONE_PHASE_REQ // will be defined in appropriate header file
+
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[InfiniteTBF] "End TBF from MS side"
+FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+
+[split_page_cycle] "Split Page Cycle"
+1~255
+
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI22_PCCCh_Egprs_Attach_Two_Phase.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI22_PCCCh_Egprs_Attach_Two_Phase.l1v
new file mode 100755
index 0000000..1b1d908
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI22_PCCCh_Egprs_Attach_Two_Phase.l1v
@@ -0,0 +1,54 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI21~22, PT11~15(P): EGPRS Attach on PCCCh + Two Phase Access"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_EGPRS_ATTACH_TWO_PHASE_REQ // will be defined in appropriate header file
+
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[InfiniteTBF] "End TBF from MS side"
+FALSE 1
+TRUE 0
+
+[NumTestPdu] "End after how many blocks"
+500~32000
+
+[split_page_cycle] "Split Page Cycle"
+1~255
+
+[egprsPCR] "EGPRS PCR exists?"
+TRUE 1
+FALSE 0
+
+[psModeA] "puncturingScheme(A)"
+PS1 1
+PS2 2
+PS3 3
+
+[isIRon] "IR"
+TRUE 1
+FALSE 0
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI2_CCCh_Pkt_Idle2.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI2_CCCh_Pkt_Idle2.l1v
new file mode 100755
index 0000000..188c795
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI2_CCCh_Pkt_Idle2.l1v
@@ -0,0 +1,44 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI2: Idle on CCCh then Packet Idle on CCCh"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_PACKET_IDLE2_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool GprsMeasMode;
+}dps_ccch_packet_idle1_req_struct, dps_ccch_packet_idle2_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[GprsMeasMode] "Assume PMO/PCO Received (GPRS meas mode)"
+TRUE 1
+@FALSE 0
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI3_CCCh_Idle_Read_Pbcch.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI3_CCCh_Idle_Read_Pbcch.l1v
new file mode 100755
index 0000000..0fe991f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI3_CCCh_Idle_Read_Pbcch.l1v
@@ -0,0 +1,53 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI3: Idle on CCCh then Read PBCCh"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_PACKET_IDLE_PBCCH_READ_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_uint8 PBCChMode;
+ kal_uint8 PBCCH_HR_Rate;
+}dps_ccch_packet_idle_pbcch_read_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[PBCChMode] "PBCCh Read Mode"
+@PBCChModeAll 1
+PBCChModePSI1Only 2
+PBCChModeHROnly 3
+PBCChModeLROnly 4
+PBCChModePSI1HR 5
+PBCChModePSI1LR 6
+
+[PBCCH_HR_Rate] "PBCCH HR Rate"
+1~16
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI4_PCCCh_Pkt_Idle.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI4_PCCCh_Pkt_Idle.l1v
new file mode 100755
index 0000000..161cbb5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI4_PCCCh_Pkt_Idle.l1v
@@ -0,0 +1,48 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI4: Packet Idle on PCCCh"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_PACKET_IDLE_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_uint8 split_page_cycle;
+ kal_uint16 imsi1_mod_1000;
+}dps_pccch_packet_idle_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[split_page_cycle] "Split Page Cycle value"
+1~255
+@32
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI5_PCCCh_Pkt_Idle_Pbcch_Update.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI5_PCCCh_Pkt_Idle_Pbcch_Update.l1v
new file mode 100755
index 0000000..3889f77
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI5_PCCCh_Pkt_Idle_Pbcch_Update.l1v
@@ -0,0 +1,48 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI5: Packet Idle on PCCCh + PBCCh update"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_PACKET_IDLE_PBCCH_UPDATE_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_uint8 split_page_cycle;
+ kal_uint16 imsi1_mod_1000;
+}dps_pccch_packet_idle_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[split_page_cycle] "Split Page Cycle value"
+1~255
+@32
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI6_PCCCh_Pkt_Idle_SC_Test.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI6_PCCCh_Pkt_Idle_SC_Test.l1v
new file mode 100755
index 0000000..4fd0cb4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI6_PCCCh_Pkt_Idle_SC_Test.l1v
@@ -0,0 +1,67 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI6: Packet Idle on PCCCh + Neighbor Cell BSIC and BCCH"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_PKT_IDLE_SC_TEST_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ kal_uint8 split_page_cycle;
+ kal_uint8 nc_reporting_period;
+ kal_uint8 nc_order;
+} dps_pccch_pkt_idle_sc_test_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@60
+[split_page_cycle] "Split Page Cycle value"
+1~255
+@32
+[nc_reporting_period] "NC Meas Reporting Period"
+0~7
+@0
+[nc_order] "NC Order"
+@NC0 0
+NC1 1
+NC2 2
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI7_PCCCh_Pkt_Idle_SC_Test_Pbcch_Update.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI7_PCCCh_Pkt_Idle_SC_Test_Pbcch_Update.l1v
new file mode 100755
index 0000000..fd09674
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI7_PCCCh_Pkt_Idle_SC_Test_Pbcch_Update.l1v
@@ -0,0 +1,67 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI7: Packet Idle on PCCCh + Neighbor BSIC/BCCH + Serving PBCCh Update"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_PKT_IDLE_SC_TEST_PBCCH_UPDATE_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ kal_uint8 split_page_cycle;
+ kal_uint8 nc_reporting_period;
+ kal_uint8 nc_order;
+}dps_pccch_pkt_idle_sc_test_pbcch_update_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@60
+[split_page_cycle] "Split Page Cycle value"
+1~255
+@32
+[nc_reporting_period] "NC Meas Reporting Period"
+0~7
+@0
+[nc_order] "NC Order"
+@NC0 0
+NC1 1
+NC2 2
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI8_PCCCh_NCMeas.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI8_PCCCh_NCMeas.l1v
new file mode 100755
index 0000000..fd54d0a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI8_PCCCh_NCMeas.l1v
@@ -0,0 +1,53 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI8: NC Measurements in PCCCh Pkt Idle(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_PKT_IDLE_NC_MEAS_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_uint8 split_page_cycle;
+ kal_uint8 nc_reporting_period;
+ kal_uint8 nc_order;
+}dps_pccch_pkt_idle_nc_meas_req_struct
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[split_page_cycle] "Split Page Cycle"
+1~255
+@32
+[nc_reporting_period] "NC Reporting period (coded)"
+0~7
+@0
+[nc_order] "Network Control Order"
+NC0 0
+@NC1 1
+NC2 2
diff --git a/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI9_PCCCh_ExtMeas.l1v b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI9_PCCCh_ExtMeas.l1v
new file mode 100755
index 0000000..8efc8d7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/8_2G_Pkt_Idle/dps_PI9_PCCCh_ExtMeas.l1v
@@ -0,0 +1,71 @@
+{ Validation }
+Title = "[8_2G_Pkt_Idle]PI9: Extended and NC Measurements in PCCCh Idle(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_EXT_MEAS_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN ExtArfcn1;
+ ARFCN ExtArfcn2;
+ kal_uint8 split_page_cycle;
+ kal_uint16 ext_reporting_period;
+ kal_uint8 nc_reporting_period;
+ kal_uint8 nc_order;
+}dps_pccch_ext_meas_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "ARFCN to camp on"
+0~124
+975~1023
+512~885
+128~251
+@20
+[ExtArfcn1] "First ARFCN for Ext measurements"
+0~124
+975~1023
+512~885
+128~251
+@40
+[ExtArfcn2] "Second ARFCN for Ext measurements"
+0~124
+975~1023
+512~885
+128~251
+@60
+[split_page_cycle] "Split Page Cycle"
+1~255
+@32
+[ext_reporting_period] "EXT Reporting period (seconds)"
+1~7680
+@1
+[nc_reporting_period] "NC Reporting period (coded)"
+0~7
+@0
+[nc_order] "Network Control Order"
+@NC0 0
+NC1 1
+NC2 2
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT10-1_CCCh_Nbr_PBCCh_Update_During_TBF.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT10-1_CCCh_Nbr_PBCCh_Update_During_TBF.l1v
new file mode 100755
index 0000000..ffefa98
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT10-1_CCCh_Nbr_PBCCh_Update_During_TBF.l1v
@@ -0,0 +1,56 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT10-1: Neighbor PBCCh Update During TBF (No PBCCh in Serving Cell)(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_NBR_PSI_UPDATE_DURING_TBF_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+}dps_ccch_nbr_psi_update_during_tbf_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT10-2_PCCCh_Nbr_PBCCh_Update_During_TBF.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT10-2_PCCCh_Nbr_PBCCh_Update_During_TBF.l1v
new file mode 100755
index 0000000..6e726ca
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT10-2_PCCCh_Nbr_PBCCh_Update_During_TBF.l1v
@@ -0,0 +1,60 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT10-2: Neighbor PBCCh Update During TBF (PBCCh in Serving Cell)(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_NBR_PSI_UPDATE_DURING_TBF_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 split_page_cycle;
+}dps_pccch_nbr_psi_update_during_tbf_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
+[split_page_cycle] "Split Page Cycle"
+1~255
+@32
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT11_CCCh_ICMP.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT11_CCCh_ICMP.l1v
new file mode 100755
index 0000000..3655b1f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT11_CCCh_ICMP.l1v
@@ -0,0 +1,44 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT11: GPRS Attach on CCCh + Ping functionality"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_ICMP_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_uint16 imsi1_mod_1000;
+}dps_ccch_icmp_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT12_CCCh_nonSignaling.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT12_CCCh_nonSignaling.l1v
new file mode 100755
index 0000000..48d8c6c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT12_CCCh_nonSignaling.l1v
@@ -0,0 +1,50 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT12: GPRS Non-Signaling Test"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_GPRS_NONSIGNALING_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_uint8 timeSlot;
+ kal_uint8 tsc
+}dps_ccch_gprs_nonsignaling_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+
+[arfcnSpec] "BCCH ARFCN / PDTCH ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[timeSlot] "Time slot"
+0~7
+
+[tsc] "TSC"
+0~7
+
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT16_CCCH_Egprs_TBF_NBCCH_Req.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT16_CCCH_Egprs_TBF_NBCCH_Req.l1v
new file mode 100755
index 0000000..5f1c6e0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT16_CCCH_Egprs_TBF_NBCCH_Req.l1v
@@ -0,0 +1,67 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT16(C): BCCh+PTCCh+NBCCh during EGPRS TBF"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_EGPRS_TBF_NBCCH_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ kal_uint8 nc_order;
+ kal_uint8 nc_reporting_period_T;
+ kal_bool isIRon;
+}dps_ccch_tbf_sc_test_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+
+[bands] "Bands used for power scan"
+
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[isIRon] "IR"
+TRUE 1
+FALSE 0
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT17_CCCH_Egprs_TBF_NPBCCH_Req.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT17_CCCH_Egprs_TBF_NPBCCH_Req.l1v
new file mode 100755
index 0000000..60aceeb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT17_CCCH_Egprs_TBF_NPBCCH_Req.l1v
@@ -0,0 +1,68 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT17(C): BCCh+PTCCh+NBCCh+NPBCCh during EGPRS TBF"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_EGPRS_TBF_NPBCCH_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+ kal_bool isIRon;
+}dps_ccch_nbr_psi_update_during_tbf_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+
+[bands] "Bands used for power scan"
+
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+
+[isIRon] "IR"
+TRUE 1
+FALSE 0
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT18_PCCCh_Egprs_TBF_NPBCCH_Req.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT18_PCCCh_Egprs_TBF_NPBCCH_Req.l1v
new file mode 100755
index 0000000..623e58f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT18_PCCCh_Egprs_TBF_NPBCCH_Req.l1v
@@ -0,0 +1,71 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT18(P): PBCCh+PTCCh+NBCCh+NPBCCh during EGPRS TBF"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_PCCCH_EGPRS_TBF_NPBCCH_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ ARFCN arfcn2nd;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 split_page_cycle;
+ kal_bool isIRon;
+}dps_pccch_nbr_psi_update_during_tbf_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+
+[split_page_cycle] "Split Page Cycle"
+1~255
+
+[isIRon] "IR"
+TRUE 1
+FALSE 0
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT8_Serving_PBCCh_Update_During_TBF.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT8_Serving_PBCCh_Update_During_TBF.l1v
new file mode 100755
index 0000000..d87c14e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT8_Serving_PBCCh_Update_During_TBF.l1v
@@ -0,0 +1,53 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT8: Serving PBCCh Update During TBF(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_SERVING_PBCCH_UPDATE_DURING_TBF_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ kal_uint16 imsi1_mod_1000;
+ kal_uint8 split_page_cycle;
+}dps_serving_pbcch_update_during_tbf_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[imsi1_mod_1000] "IMSI mod 1000"
+0~999
+@789
+[split_page_cycle] "Split Page Cycle"
+1~255
+@32
diff --git a/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT9_CCCh_TBF_SC_Test.l1v b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT9_CCCh_TBF_SC_Test.l1v
new file mode 100755
index 0000000..2197668
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/9_2G_Pkt_Transfer/dps_PT9_CCCh_TBF_SC_Test.l1v
@@ -0,0 +1,70 @@
+{ Validation }
+Title = "[9_2G_Pkt_Transfer]PT9: GPRS Attach on CCCh + Neighbor BSIC and BCCH during TBF(No Sleep)"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_CCCH_TBF_SC_TEST_REQ // will be defined in appropriate header file
+
+
+/* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 bands;
+ ARFCN arfcnSpec;
+ kal_bool RlcChanReq;
+ kal_bool AutoRepeat;
+ kal_bool InfiniteTBF;
+ kal_uint16 NumTestPdu;
+ ARFCN arfcn2nd;
+ ARFCN arfcn3rd;
+ kal_uint8 nc_order;
+ kal_uint8 nc_reporting_period_T;
+
+}dps_ccch_tbf_sc_test_req_struct;
+*/
+
+{Parameters}
+
+// The variable and the corresponding label showen on GUI
+[bands] "Bands used for power scan"
+// The following is the constrained range for the input of this value.
+// Some combination of the following bit-fields may be suported
+// The parameter range can be changed to support combinations of different bands
+@PGSM900 1
+EGSM900 2
+DCS1800 8
+PCS1900 16
+GSM850 128
+PGSM900_DCS1800 9
+EGSM900_DCS1800 10
+PGSM900_PCS1900 17
+EGSM900_PCS1900 18
+GSM850_DCS1800 136
+GSM850_DCS1900 144
+
+[arfcnSpec] "Bcch (C0) ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@20
+[arfcn2nd] "First Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@40
+[arfcn3rd] "Second Neighbor ARFCN"
+0~124
+975~1023
+512~885
+128~251
+@60
+[nc_order] "NC Measurement Order"
+@NC0 0
+NC1 1
+NC2 2
+
+[nc_reporting_period_T] "NC measurement reporting period (TBF)"
+1~255
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/L1ModMsg.chk b/mcu/service/dhl/database/l1validation_db/L1ModMsg.chk
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/L1ModMsg.chk
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_01.l1v
new file mode 100644
index 0000000..3653c86
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_01.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_01: Handover test: FDD intra-band contiguous CA (PCC-SCC swap)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_02.l1v
new file mode 100644
index 0000000..5ed9946
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_02.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_02: Handover test: FDD intra-band contiguous CA (SCC release)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_03.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_03.l1v
new file mode 100644
index 0000000..c463dc9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_03.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_03: Handover test: FDD intra-band contiguous CA (SCC no change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_04.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_04.l1v
new file mode 100644
index 0000000..a6df94d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_04.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_04: Handover test: FDD intra-band contiguous CA (SCC change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_05.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_05.l1v
new file mode 100644
index 0000000..48439c2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_05.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_05: Handover test: FDD inter-band contiguous CA (PCC-SCC swap)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_05
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_06.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_06.l1v
new file mode 100644
index 0000000..d201af6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_06.l1v
@@ -0,0 +1,32 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_06: Handover test: FDD inter-band contiguous CA (SCC release)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_handover_ca_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_07.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_07.l1v
new file mode 100644
index 0000000..59b0331
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_07.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_07: Handover test: FDD inter-band contiguous CA (SCC no change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_07
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_08.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_08.l1v
new file mode 100644
index 0000000..f7973a9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_08.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_08: Handover test: FDD inter-band contiguous CA (SCC change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_08
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_09.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_09.l1v
new file mode 100644
index 0000000..c811ffe
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_09.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_09: Handover test: FDD intra-band non-contiguous CA (PCC-SCC swap)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_09
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_10.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_10.l1v
new file mode 100644
index 0000000..3af66a2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_10.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_10: Handover test: FDD intra-band non-contiguous CA (SCC release)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_10
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_11.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_11.l1v
new file mode 100644
index 0000000..50314b1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_11.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_11: Handover test: FDD intra-band non-contiguous CA (SCC no change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_11
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_12.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_12.l1v
new file mode 100644
index 0000000..92583d7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_12.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_12: Handover test: FDD intra-band non-contiguous CA (SCC change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_12
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_ca_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_13.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_13.l1v
new file mode 100644
index 0000000..007c10c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_13.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_13: Handover test: TDD intra-band contiguous CA (PCC-SCC swap)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_13
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_13_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_14.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_14.l1v
new file mode 100644
index 0000000..1a4de3b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_14.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_14: Handover test: TDD intra-band contiguous CA (SCC release)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_14
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_14_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_15.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_15.l1v
new file mode 100644
index 0000000..25b8366
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_15.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_15: Handover test: TDD intra-band contiguous CA (SCC no change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_15
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_15_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_16.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_16.l1v
new file mode 100644
index 0000000..184d63b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_16.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_16: Handover test: TDD intra-band contiguous CA (SCC change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_16
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_16_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_17.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_17.l1v
new file mode 100644
index 0000000..0e3db23
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_17.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_17: Handover test: TDD inter-band contiguous CA (PCC-SCC swap)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_17
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_17_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_18.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_18.l1v
new file mode 100644
index 0000000..a2f6526
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_18.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_18: Handover test: TDD inter-band contiguous CA (SCC release)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_18
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_18_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_19.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_19.l1v
new file mode 100644
index 0000000..501d62a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_19.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_19: Handover test: TDD inter-band contiguous CA (SCC no change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_19
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_19_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_20.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_20.l1v
new file mode 100644
index 0000000..6024868
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_20.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_20: Handover test: TDD inter-band contiguous CA (SCC change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_20
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_20_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_21.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_21.l1v
new file mode 100644
index 0000000..eb37bd9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_21.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_21: Handover test: TDD intra-band non-contiguous CA (PCC-SCC swap)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_21
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_21_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_22.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_22.l1v
new file mode 100644
index 0000000..3e95055
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_22.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_22: Handover test: TDD intra-band non-contiguous CA (SCC release)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_22
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_22_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_23.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_23.l1v
new file mode 100644
index 0000000..119feea
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_23.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_23: Handover test: TDD intra-band non-contiguous CA (SCC no change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_23
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_23_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
+
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_24.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_24.l1v
new file mode 100644
index 0000000..eb6ebf4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_24.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_24: Handover test: TDD intra-band non-contiguous CA (SCC change)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_24
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_24_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@5
+
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_25.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_25.l1v
new file mode 100644
index 0000000..b733b83
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_HANDOVER_CA_25.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_HANDOVER_CA_25: Handover test for TDD inter-band CA (PCELL and SCELL have different UDC + PCC-SCC swap)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_CA_25
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_handover_ca_25_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@16005
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_MBMS_MCCH_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_MBMS_MCCH_01.l1v
new file mode 100644
index 0000000..6e70f8a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_MBMS_MCCH_01.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_MBMS_MCCH_01: MCCH change test of MBMS in SCH mode with CA (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MBMS_MCCH_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_mbms_mcch_01_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_MBMS_MCCH_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_MBMS_MCCH_02.l1v
new file mode 100644
index 0000000..46f3646
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_MBMS_MCCH_02.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_MBMS_MCCH_02: MCCH change test of MBMS in SCH mode with CA (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MBMS_MCCH_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_mbms_mcch_02_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@26265
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_RLM_eICIC_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_RLM_eICIC_01.l1v
new file mode 100644
index 0000000..488bb84
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_RLM_eICIC_01.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_RLM_eICIC_01: Radio link monitoring with measSubframePattern for out-of-sync (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_EICIC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_rlm_eicic_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_RLM_eICIC_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_RLM_eICIC_02.l1v
new file mode 100644
index 0000000..7c67940
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_RLM_eICIC_02.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_RLM_eICIC_02: Radio link monitoring with measSubframePattern for out-of-sync (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_EICIC_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_rlm_eicic_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@16165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_RATYPE1_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_RATYPE1_01.l1v
new file mode 100644
index 0000000..4a857fc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_RATYPE1_01.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_TX_RATYPE1_01: Uplink resource multicluster by ra type1 (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_RATYPE1_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_tx_ratype1_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_RATYPE1_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_RATYPE1_02.l1v
new file mode 100644
index 0000000..bf6814b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_RATYPE1_02.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_TX_RATYPE1_02: Uplink resource multicluster by ra type1 (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_RATYPE1_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_tx_ratype1_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_SIMULT_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_SIMULT_01.l1v
new file mode 100644
index 0000000..d1d3b04
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_SIMULT_01.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_TX_SIMULT_01: Simultaneous PUCCH and PUSCH (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_SIMULT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_tx_simult_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_SIMULT_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_SIMULT_02.l1v
new file mode 100644
index 0000000..d2b7489
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/04_SCH/SCH_TX_SIMULT_02.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][04_SCH]SCH_TX_SIMULT_02: Simultaneous PUCCH and PUSCH (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_SIMULT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_tx_simult_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_01.l1v
new file mode 100644
index 0000000..4332d4f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_01: Deactivated SCELL intra-freq measurement with non-DRX/DRX (FDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_02.l1v
new file mode 100644
index 0000000..191239c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_02: Activated SCELL intra-freq measurement with non-DRX/DRX (FDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_03.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_03.l1v
new file mode 100644
index 0000000..a73dc47
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_03: Deactivated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (FDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_04.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_04.l1v
new file mode 100644
index 0000000..794f44e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_04: Activated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (FDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_05.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_05.l1v
new file mode 100644
index 0000000..af2318d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_05: Deactivated SCELL intra-freq measurement with non-DRX/DRX (FDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_06.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_06.l1v
new file mode 100644
index 0000000..b6648b2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_06: Activated SCELL intra-freq measurement with non-DRX/DRX (FDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_07.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_07.l1v
new file mode 100644
index 0000000..601497f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_07: Deactivated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (FDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_08.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_08.l1v
new file mode 100644
index 0000000..58eda5b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_08: Activated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (FDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_ca_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~10
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_09.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_09.l1v
new file mode 100644
index 0000000..f8d37f8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_09.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_09: Deactivated SCELL intra-freq measurement with non-DRX/DRX (TDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_10.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_10.l1v
new file mode 100644
index 0000000..aa7013b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_10.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_10: Activated SCELL intra-freq measurement with non-DRX/DRX (TDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_11.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_11.l1v
new file mode 100644
index 0000000..ba15e8b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_11.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_11: Deactivated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (TDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_12.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_12.l1v
new file mode 100644
index 0000000..f765d37
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_12.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_12: Activated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (TDD intra-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_13.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_13.l1v
new file mode 100644
index 0000000..fb8459d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_13.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_13: Deactivated SCELL intra-freq measurement with non-DRX/DRX (TDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_13
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_13_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_14.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_14.l1v
new file mode 100644
index 0000000..37f16e0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_14.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_14: Activated SCELL intra-freq measurement with non-DRX/DRX (TDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_14
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_14_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_15.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_15.l1v
new file mode 100644
index 0000000..1fdea27
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_15.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_15: Deactivated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (TDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_15
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_15_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_16.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_16.l1v
new file mode 100644
index 0000000..58cb3b2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_16.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_16: Activated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (TDD inter-band CA)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_16
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_16_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_17.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_17.l1v
new file mode 100644
index 0000000..b27b683
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_17.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_17: Deactivated SCELL intra-freq measurement with non-DRX/DRX (TDD inter-band CA + PCELL and SCELL have different UDC)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_17
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_17_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616005
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_18.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_18.l1v
new file mode 100644
index 0000000..26bcce3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_18.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_18: Activated SCELL intra-freq measurement with non-DRX/DRX (TDD inter-band CA + PCELL and SCELL have different UDC)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_18
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_18_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616005
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_19.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_19.l1v
new file mode 100644
index 0000000..3832dc0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_19.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_19: Deactivated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (TDD inter-band CA + PCELL and SCELL have different UDC)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_19
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_19_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616005
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_20.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_20.l1v
new file mode 100644
index 0000000..a36dafe
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_ca_20.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_CA_20: Activated SCELL intra-freq measurement with PCELL interruption in non-DRX/DRX (TDD inter-band CA + PCELL and SCELL have different UDC)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_CA_20
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_measurement_ca_20_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616005
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_eicic_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_eicic_01.l1v
new file mode 100644
index 0000000..68c318c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_eicic_01.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_eICIC_01: Intra-freq measurement with measSubframePattern (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEAS_EICIC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_meas_eicic_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_eicic_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_eicic_02.l1v
new file mode 100644
index 0000000..a8e83f8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/05_MEAS/SCH_Meas_eicic_02.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R11_LTE][05_MEAS]SCH_MEAS_eICIC_02: Intra-freq measurement with measSubframePattern (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEAS_EICIC_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_meas_eicic_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@16165
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_01.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_01.l1v
new file mode 100644
index 0000000..119c3fc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_01.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][06_TRX]SCH_TRX_CA_01: Cross carrier scheduling test of FDD intra-band contiguous CA"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_CA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_trx_ca_01_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_02.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_02.l1v
new file mode 100644
index 0000000..f4f5129
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_02.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][06_TRX]SCH_TRX_CA_02: Cross carrier scheduling test of FDD inter-band CA"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_CA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_trx_ca_02_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_03.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_03.l1v
new file mode 100644
index 0000000..5c4d4fd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_03.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][06_TRX]SCH_TRX_CA_03: Cross carrier scheduling test of TDD intra-band contiguous CA"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_CA_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_trx_ca_03_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_04.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_04.l1v
new file mode 100644
index 0000000..588da5d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_04.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][06_TRX]SCH_TRX_CA_04: Cross carrier scheduling test of TDD inter-band CA"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_CA_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_trx_ca_04_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_05.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_05.l1v
new file mode 100644
index 0000000..8df5d85
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_05.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][06_TRX]SCH_TRX_CA_05: Cross carrier scheduling test of TDD inter-band CA (PCELL and SCELL have different UDC)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_CA_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_trx_ca_05_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@16005
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_06.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_06.l1v
new file mode 100644
index 0000000..d60c28a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_06.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][06_TRX]SCH_TRX_CA_06: Non-cross carrier scheduling test of FDD inter-band CA"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_CA_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_trx_ca_06_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_07.l1v b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_07.l1v
new file mode 100644
index 0000000..76779e2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R11_LTE/06_TRX/SCH_Trx_ca_07.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R11_LTE][06_TRX]SCH_TRX_CA_07: Non-cross carrier scheduling test of TDD inter-band CA"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_CA_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_sch_trx_ca_07_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL1UL/2DL1UL_basic_01.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL1UL/2DL1UL_basic_01.l1v
new file mode 100644
index 0000000..4eb1a48
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL1UL/2DL1UL_basic_01.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL1UL]2DL1UL_basic_01: Add FDD SCell, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL1UL_BASIC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl1ul_basic_01_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@160
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL1UL/2DL1UL_basic_02.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL1UL/2DL1UL_basic_02.l1v
new file mode 100644
index 0000000..80467ad
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL1UL/2DL1UL_basic_02.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL1UL]2DL1UL_basic_02: Add TDD SCell, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL1UL_BASIC_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl1ul_basic_02_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@160
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_05.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_05.l1v
new file mode 100644
index 0000000..3bad262
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_05.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_05: Add and activate 2 Scells UL-CA, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_05_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_06.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_06.l1v
new file mode 100644
index 0000000..300c731
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_06.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_06: Add and activate 2 Scells UL-CA, blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_06_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_07.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_07.l1v
new file mode 100644
index 0000000..b6119b6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_07.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_07: Add and activate Scell UL-CA"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_07
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_07_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label shown on the GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_08.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_08.l1v
new file mode 100644
index 0000000..030057e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_08.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_08: Scell (ULCA) added and activated, with RA procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_08_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_09.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_09.l1v
new file mode 100644
index 0000000..dd9e7d7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_09.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_09: Scell (ULCA) added and activated, SRS only"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_09_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_10.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_10.l1v
new file mode 100644
index 0000000..c67662e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_10.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_10: Scell (ULCA) added and activated, PUSCH and SRS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_10_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_11.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_11.l1v
new file mode 100644
index 0000000..44ef201
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_11.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_11: Scell (ULCA) added and activated, HARQ as only UCI"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_11_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_12.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_12.l1v
new file mode 100644
index 0000000..0f118e5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_12.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_12: Add and activate Scell UL-CA, periodic CSI as only UCI"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_12
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_12_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label shown on the GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_13.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_13.l1v
new file mode 100644
index 0000000..4361c52
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_fdd_basic_13.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_fdd_basic_13: Add and activate Scell UL-CA, aperiodic CSI as only UCI"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_FDD_BASIC_13
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_fdd_basic_13_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label shown on the GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_05.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_05.l1v
new file mode 100644
index 0000000..918697f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_05.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_tdd_basic_05: Add and activate 2 Scells UL-CA, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_TDD_BASIC_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_tdd_basic_05_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@16160
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_06.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_06.l1v
new file mode 100644
index 0000000..fb4c8ba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_06.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_tdd_basic_06: Add and activate 2 Scells UL-CA, blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_TDD_BASIC_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_tdd_basic_06_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@16160
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_08.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_08.l1v
new file mode 100644
index 0000000..575596b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_08.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_tdd_basic_08: Scell (ULCA) added and activated, with RA procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_TDD_BASIC_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_tdd_basic_08_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@16160
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_09.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_09.l1v
new file mode 100644
index 0000000..65a2d4b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_09.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_tdd_basic_09: Scell (ULCA) added and activated, SRS only"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_TDD_BASIC_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_tdd_basic_09_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@21215
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_10.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_10.l1v
new file mode 100644
index 0000000..0d921e7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_10.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_tdd_basic_10: Scell (ULCA) added and activated, PUSCH and SRS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_TDD_BASIC_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_tdd_basic_10_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@21215
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_11.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_11.l1v
new file mode 100644
index 0000000..add92d6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/2DL2UL/2DL2UL_tdd_basic_11.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][2DL2UL]2DL2UL_tdd_basic_11: Scell (ULCA) added and activated, HARQ as only UCI"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_2DL2UL_TDD_BASIC_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_2dl2ul_tdd_basic_11_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@16160
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_basic_01.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_basic_01.l1v
new file mode 100644
index 0000000..5c1d463
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_basic_01.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL1UL]3DL1UL_basic_01: Add and activate 2 Scells, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL1UL_BASIC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl1ul_basic_01_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_basic_01_1.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_basic_01_1.l1v
new file mode 100644
index 0000000..9509c12
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_basic_01_1.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL1UL]3DL1UL_basic_01_1: Add and activate 2 Scells, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL1UL_BASIC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl1ul_basic_01_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_fdd_basic_3.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_fdd_basic_3.l1v
new file mode 100644
index 0000000..825bcbc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_fdd_basic_3.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL1UL]3DL1UL_fdd_basic_03: Add and activate 2 Scells, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL1UL_FDD_BASIC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl1ul_fdd_basic_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_fdd_basic_4.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_fdd_basic_4.l1v
new file mode 100644
index 0000000..77ba4e9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_fdd_basic_4.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL1UL]3DL1UL_fdd_basic_04: Add and activate 2 Scells, blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL1UL_FDD_BASIC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl1ul_fdd_basic_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_tdd_basic_3.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_tdd_basic_3.l1v
new file mode 100644
index 0000000..21edd5d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_tdd_basic_3.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL1UL]3DL1UL_tdd_basic_03: Add and activate 2 Scells, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL1UL_TDD_BASIC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl1ul_tdd_basic_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616163
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_tdd_basic_4.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_tdd_basic_4.l1v
new file mode 100644
index 0000000..f073918
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL1UL/3DL1UL_tdd_basic_4.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL1UL]3DL1UL_tdd_basic_04: Add and activate 2 Scells, blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL1UL_TDD_BASIC
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl1ul_tdd_basic_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1616164
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_fdd_basic_14.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_fdd_basic_14.l1v
new file mode 100644
index 0000000..944cb97
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_fdd_basic_14.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL2UL]3DL2UL_fdd_basic_14: Add and activate 2 Scells UL-CA, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL2UL_FDD_BASIC_14
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl2ul_fdd_basic_14_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_fdd_basic_15.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_fdd_basic_15.l1v
new file mode 100644
index 0000000..bdf42e0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_fdd_basic_15.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL2UL]3DL2UL_fdd_basic_15: Add and activate 2 Scells UL-CA, blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL2UL_FDD_BASIC_15
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl2ul_fdd_basic_15_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~99999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_tdd_fdd_basic_14.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_tdd_fdd_basic_14.l1v
new file mode 100644
index 0000000..34d3166
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_tdd_fdd_basic_14.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL2UL]3DL2UL_tdd_fdd_basic_14: Add and activate 2 Scells UL-CA, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL2UL_TDD_FDD_BASIC_14
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl2ul_tdd_fdd_basic_14_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1600000
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_tdd_fdd_basic_15.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_tdd_fdd_basic_15.l1v
new file mode 100644
index 0000000..d57ad0c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/3DL2UL/3DL2UL_tdd_fdd_basic_15.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][3DL2UL]3DL2UL_tdd_fdd_basic_15: Add and activate 2 Scells UL-CA, blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_3DL2UL_TDD_FDD_BASIC_15
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_3dl2ul_tdd_fdd_basic_15_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@0016000
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/4DL1UL/4DL1UL_fdd_basic_23.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/4DL1UL/4DL1UL_fdd_basic_23.l1v
new file mode 100644
index 0000000..64bb367
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/4DL1UL/4DL1UL_fdd_basic_23.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][4DL1UL]4DL1UL_fdd_basic_23: Add 3 SCells, non-blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_4DL1UL_FDD_BASIC_23
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_4dl1ul_fdd_basic_23_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R12_LTE/4DL1UL/4DL1UL_fdd_basic_24.l1v b/mcu/service/dhl/database/l1validation_db/R12_LTE/4DL1UL/4DL1UL_fdd_basic_24.l1v
new file mode 100644
index 0000000..9931ba9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R12_LTE/4DL1UL/4DL1UL_fdd_basic_24.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R12_LTE][4DL1UL]4DL1UL_fdd_basic_24: Add 3 SCells, blind"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_4DL1UL_FDD_BASIC_24
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_4dl1ul_fdd_basic_24_struct;
+*
+*******************************************************************************/
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+0~9999999
+@0
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_01.l1v
new file mode 100644
index 0000000..10f81ba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_01.l1v
@@ -0,0 +1,46 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_01: Test of Carrier Search with Band Configuration and Band Report"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_bool is_user_define_earfcn;
+ kal_uint32 user_define_earfcn;
+} l1edps_noch_csr_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_TRUE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_TRUE
+
+[csr_is_skip_bw] "csr_skip_bw"
+@KAL_TRUE
+
+[is_user_define_earfcn] "is_user_define_earfcn"
+@KAL_FALSE
+
+[user_define_earfcn] "user_define_earfcn"
+1~65535
+@38450
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_02.l1v
new file mode 100644
index 0000000..66e1218
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_02.l1v
@@ -0,0 +1,41 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_02: Test of Carrier Search with Band Configuration and Band Report"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_noch_csr_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_TRUE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_FALSE
+
+[csr_is_skip_bw] "csr_skip_bw"
+@KAL_FALSE
+
+[search_type] "search_type"
+@EL1_CSR_SEARCH_TYPE_SPEED_MODE
+EL1_CSR_SEARCH_TYPE_ACCURACY_MODE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_03.l1v
new file mode 100644
index 0000000..0a6caab
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_03.l1v
@@ -0,0 +1,55 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_03: Test of Carrier Search with Skip Bandwidth"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_bandwidth_enum csr_skip_bandwidth;
+ el1_csr_search_type_enum search_type;
+ kal_bool csr_is_priority_assign;
+
+} l1edps_noch_csr_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_TRUE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_FALSE
+
+[csr_is_skip_bw] "csr_skip_bw"
+@KAL_TRUE
+
+[csr_skip_bandwidth] "skip bandwidth"
+@BW_100_RB
+BW_15_RB
+BW_25_RB
+BW_50_RB
+BW_75_RB
+BW_100_RB
+BW_INVALID
+
+[search_type] "search_type"
+@EL1_CSR_SEARCH_TYPE_SPEED_MODE
+EL1_CSR_SEARCH_TYPE_ACCURACY_MODE
+
+[csr_is_priority_assign] "csr_is_priority_assign"
+@KAL_TRUE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_04.l1v
new file mode 100644
index 0000000..00494c8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_04.l1v
@@ -0,0 +1,46 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_04: Test of Carrier Search with Overlap Band and Non Priority Assignment"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_bool csr_is_priority_assign;
+
+} l1edps_noch_csr_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_TRUE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_FALSE
+
+[csr_is_skip_bw] "csr_skip_bw"
+@KAL_FALSE
+
+
+[search_type] "search_type"
+@EL1_CSR_SEARCH_TYPE_SPEED_MODE
+EL1_CSR_SEARCH_TYPE_ACCURACY_MODE
+
+[csr_is_priority_assign] "csr_is_priority_assign"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_05.l1v
new file mode 100644
index 0000000..b9e4677
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_05.l1v
@@ -0,0 +1,46 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_05: Test of Carrier Search with Overlap Band and Priority Assignment"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_bool csr_is_priority_assign;
+
+} l1edps_noch_csr_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_TRUE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_FALSE
+
+[csr_is_skip_bw] "csr_skip_bw"
+@KAL_FALSE
+
+
+[search_type] "search_type"
+@EL1_CSR_SEARCH_TYPE_SPEED_MODE
+EL1_CSR_SEARCH_TYPE_ACCURACY_MODE
+
+[csr_is_priority_assign] "csr_is_priority_assign"
+@KAL_TRUE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_06.l1v
new file mode 100644
index 0000000..515453d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_06.l1v
@@ -0,0 +1,46 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_06: Test of Carrier Search with Frequency Configuration and Frequency Report"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_bool csr_is_priority_assign;
+
+
+} l1edps_noch_csr_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_FALSE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_FALSE
+
+[csr_is_skip_bw] "csr_is_skip_bw"
+@KAL_FALSE
+
+[search_type] "search_type"
+@EL1_CSR_SEARCH_TYPE_SPEED_MODE
+EL1_CSR_SEARCH_TYPE_ACCURACY_MODE
+
+[csr_is_priority_assign] "csr_is_priority_assign"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_07.l1v
new file mode 100644
index 0000000..872d7db
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_07.l1v
@@ -0,0 +1,47 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_07: Test of Carrier Search with Black List"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_bool csr_is_priority_assign;
+
+
+} l1edps_noch_csr_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_TRUE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_TRUE
+
+[csr_is_skip_bw] "csr_is_skip_bw"
+@KAL_FALSE
+
+[search_type] "search_type"
+@EL1_CSR_SEARCH_TYPE_SPEED_MODE
+EL1_CSR_SEARCH_TYPE_ACCURACY_MODE
+
+
+[csr_is_priority_assign] "csr_is_priority_assign"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_08.l1v
new file mode 100644
index 0000000..55ffc35
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_08.l1v
@@ -0,0 +1,47 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_08: Test of Carrier Search with Modification"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_bool csr_is_priority_assign;
+
+
+} l1edps_noch_csr_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[csr_config_by_band] "csr_config_by_band"
+@KAL_TRUE
+
+[csr_report_by_band] "csr_report_by_band"
+@KAL_TRUE
+
+[csr_is_skip_bw] "csr_is_skip_bw"
+@KAL_FALSE
+
+[search_type] "search_type"
+@EL1_CSR_SEARCH_TYPE_SPEED_MODE
+EL1_CSR_SEARCH_TYPE_ACCURACY_MODE
+
+
+[csr_is_priority_assign] "csr_is_priority_assign"
+@KAL_FALSE
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_09.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_09.l1v
new file mode 100644
index 0000000..6f4ccd3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_09.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_09: Test of RSSI Sniffer Function"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 intv; //640ms x intv (1-50)
+ kal_bool is_user_define_fullband_scan;
+
+} l1edps_noch_csr_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[intv] "intv"
+1~50
+@1
+
+[is_user_define_fullband_scan] "is_fullband_scan"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_10.l1v
new file mode 100644
index 0000000..34fbfaa
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_10.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_10: Test of RSSI Sniffer Modification Function"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 intv; //640ms x intv (1-50)
+
+
+} l1edps_noch_csr_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[intv] "intv"
+1~50
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_11.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_11.l1v
new file mode 100644
index 0000000..d98d090
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_CSR_11.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_CSR_11: Test of RSSI Sniffer Modification Function"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_CSR_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 intv; //640ms x intv (1-50)
+
+
+} l1edps_noch_csr_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[intv] "intv"
+1~50
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_RESET_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_RESET_01.l1v
new file mode 100644
index 0000000..d226035
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_RESET_01.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_RESET_01: Reset Modem"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_RESET_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+} l1edps_noch_reset_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_SCS_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_SCS_01.l1v
new file mode 100644
index 0000000..8f0240a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/01_NOCH/NOCH_SCS_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][01_NOCH]NOCH_SCS_01: Test of SCS- target exists in CSR cell table"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_NOCH_SCS_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_noch_scs_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01.l1v
new file mode 100644
index 0000000..524f53a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01.l1v
@@ -0,0 +1,31 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_BCCH_01: The test case is used to check if the UE can acquire the required system information"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_BCCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_bcch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01_10.l1v
new file mode 100644
index 0000000..28b27b7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01_10.l1v
@@ -0,0 +1,31 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_BCCH_01_10: 10MHz-The test case is used to check if the UE can acquire the required system information"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_BCCH_01_10
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_bcch_01_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01_5.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01_5.l1v
new file mode 100644
index 0000000..d5e5972
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_01_5.l1v
@@ -0,0 +1,31 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_BCCH_01_5: 5MHz-The test case is used to check if the UE can acquire the required system information"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_BCCH_01_5
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_bcch_01_5_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_02.l1v
new file mode 100644
index 0000000..a9e4113
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_BCCH_02: The test case is used to check if the UE can perform specific cell search when the main channel is BCCH"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_BCCH_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_bcch_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_03.l1v
new file mode 100644
index 0000000..2c5e2f6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_03.l1v
@@ -0,0 +1,32 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_BCCH_03: The test case is used to test the behaviour of the UE when PCH is opened in BCCH"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_BCCH_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_bcch_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_04.l1v
new file mode 100644
index 0000000..6f38bc5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_BCCH_04.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_BCCH_04: This test case is used to verify the MIB soft combine feature."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_BCCH_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_bcch_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01.l1v
new file mode 100644
index 0000000..10bcab0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01.l1v
@@ -0,0 +1,32 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_01: The test case is used to verify if the UE can meet the minimum cell reselection requirements for FDD-FDD intra frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_cell_resel_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_01.l1v
new file mode 100644
index 0000000..1056f3d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_01_01: The test case is used to verify if the UE can meet the minimum cell reselection requirements for FDD-FDD intra frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_02.l1v
new file mode 100644
index 0000000..016bbf2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_02.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_01_02: The test case is used to verify if the UE can meet the minimum cell reselection requirements for FDD-FDD intra frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02.l1v
new file mode 100644
index 0000000..e43ac6c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_02: The test case is used to verify if the UE can meet the minimum cell reselection requirements for FDD-FDD inter frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_cell_resel_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_01.l1v
new file mode 100644
index 0000000..1f8b661
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_02_01: The test case is used to verify if the UE can meet the minimum cell reselection requirements for FDD-FDD inter frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_02.l1v
new file mode 100644
index 0000000..8e9d37a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_02.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_02_02: The test case is used to verify if the UE can meet the minimum cell reselection requirements for FDD-FDD inter frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@2
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03.l1v
new file mode 100644
index 0000000..28e9cd3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_03: The test case is used to verify if the UE can meet the minimum cell reselection requirements for TDD-TDD intra frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_cell_resel_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_01.l1v
new file mode 100644
index 0000000..4a28e23
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_03_01: The test case is used to verify if the UE can meet the minimum cell reselection requirements for TDD-TDD intra frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_02.l1v
new file mode 100644
index 0000000..ad2b5a1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_02.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_03_02: The test case is used to verify if the UE can meet the minimum cell reselection requirements for TDD-TDD intra frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@2
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04.l1v
new file mode 100644
index 0000000..fefa360
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_04: The test case is used to verify if the UE can meet the minimum cell reselection requirements for TDD-TDD inter frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_cell_resel_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_01.l1v
new file mode 100644
index 0000000..1c82b98
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_04_01: The test case is used to verify if the UE can meet the minimum cell reselection requirements for TDD-TDD inter frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_02.l1v
new file mode 100644
index 0000000..8176092
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_02.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CELL_RESEL_04_02: The test case is used to verify if the UE can meet the minimum cell reselection requirements for TDD-TDD inter frequency case"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CELL_RESEL_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_cell_resel_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@2
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CSR_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CSR_01.l1v
new file mode 100644
index 0000000..8577df0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CSR_01.l1v
@@ -0,0 +1,84 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CSR_01: Test of Carrier Search with Band Configuration and Band Report on PCH state"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CSR_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool is_user_define_fullband_scan;
+ kal_bool is_speed_mode;
+ kal_uint8 number_of_report_cell;
+ kal_uint8 number_of_total_band;
+ kal_uint8 band_info_1;
+ kal_uint8 band_info_2;
+ kal_uint8 band_info_3;
+ kal_uint8 band_info_4;
+ kal_uint8 band_info_5;
+ kal_uint8 band_info_6;
+ kal_uint8 band_info_7;
+ kal_uint8 band_info_8;
+
+
+} l1edps_idle_csr_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[is_user_define_fullband_scan] "is_fullband_scan"
+@KAL_FALSE
+
+[is_speed_mode] "is_speed_mode"
+@KAL_TRUE
+
+[number_of_report_cell] "number_of_report_cell"
+1~8
+@1
+
+[number_of_total_band] "number_of_total_band"
+1~8
+@2
+
+[band_info_1] "band_info_1"
+1~64
+@1
+
+[band_info_2] "band_info_2"
+1~64
+@39
+
+[band_info_3] "band_info_3"
+1~64
+@5
+
+[band_info_4] "band_info_4"
+1~64
+@7
+
+[band_info_5] "band_info_5"
+1~64
+@13
+
+[band_info_6] "band_info_6"
+1~64
+@38
+
+[band_info_7] "band_info_7"
+1~64
+@40
+
+[band_info_8] "band_info_8"
+1~64
+@3
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CSR_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CSR_02.l1v
new file mode 100644
index 0000000..96c6556
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_CSR_02.l1v
@@ -0,0 +1,27 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_CSR_02: Test of RSSI Sniffer Function on PCH state"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_CSR_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+} l1edps_idle_csr_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_MBMS_MCCH_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_MBMS_MCCH_01.l1v
new file mode 100644
index 0000000..83090bf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_MBMS_MCCH_01.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_MBMS_MCCH_01: MCCH change test of MBMS in IDLE mode (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MBMS_MCCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_idle_mbms_mcch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_MBMS_MCCH_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_MBMS_MCCH_02.l1v
new file mode 100644
index 0000000..5f1ed77
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_MBMS_MCCH_02.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_MBMS_MCCH_02: MCCH change test of MBMS in IDLE mode (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MBMS_MCCH_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint32 test_pattern_id;
+
+} l1edps_idle_mbms_mcch_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_01.l1v
new file mode 100644
index 0000000..6ad361f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_01.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_OOS_01: The test case is used to check the behaviour of the UE when S<0 occurs Nserv times and a suitable cell is found using known cell search(KCS)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_OOS_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_oos_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_02.l1v
new file mode 100644
index 0000000..c72f46f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_02.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_OOS_02: The test case is used to check the behaviour of the UE during out-of-service (PCH->NOCH)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_OOS_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_oos_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_03.l1v
new file mode 100644
index 0000000..336ed0d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_03.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_OOS_03: The test case is used to check the behaviour of the UE when S<0 occurs Nserv times and a suitable cell is found using known cell search(KCS)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_OOS_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_oos_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_04.l1v
new file mode 100644
index 0000000..28a26f0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_OOS_04.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_OOS_04: The test case is used to check the behaviour of the UE during out-of-service (PCH->NOCH)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_OOS_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_oos_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01.l1v
new file mode 100644
index 0000000..18dde25
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_01.l1v
new file mode 100644
index 0000000..c7eb924
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_01.l1v
@@ -0,0 +1,36 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_01: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@1
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_02.l1v
new file mode 100644
index 0000000..617551e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_02.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_02: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@2
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_03.l1v
new file mode 100644
index 0000000..2175513
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_03.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_03: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@3
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_04.l1v
new file mode 100644
index 0000000..c727690
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_04.l1v
@@ -0,0 +1,36 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_04: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@4
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_05.l1v
new file mode 100644
index 0000000..9767def
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_05.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_05: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@5
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_06.l1v
new file mode 100644
index 0000000..38d61ad
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_06.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_06: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@6
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_07.l1v
new file mode 100644
index 0000000..e0ffc42
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_07.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_07: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@7
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_08.l1v
new file mode 100644
index 0000000..09a824a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_08.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_08: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@8
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_09.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_09.l1v
new file mode 100644
index 0000000..a8dbba0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_09.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_09: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@9
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_10.l1v
new file mode 100644
index 0000000..dba1987
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_10.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_10: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@10
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_11.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_11.l1v
new file mode 100644
index 0000000..24ce234
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_11.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_11: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@11
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_12.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_12.l1v
new file mode 100644
index 0000000..c566acc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_01_12.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_01_12: The test case is used to check if the UE can successfully camp on a target cell and successfully acquire a paging message"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+ kal_bool is_case_repeat;
+} l1edps_idle_pch_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~12
+@12
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_02.l1v
new file mode 100644
index 0000000..1056421
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_02.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_02: The test case is used to check the behavior of UE when the infromed of a system information change"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_bool is_case_repeat;
+ kal_bool mib_only;
+
+} l1edps_idle_pch_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[is_case_repeat] "is_case_repeat"
+@KAL_FALSE
+[mib_only] "mib_only"
+@KAL_FALSE
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_03.l1v
new file mode 100644
index 0000000..64fcabe
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_03.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_03: The test case is used to check whether the UE can acquire paging in every PO"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_TDD_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_TDD_01.l1v
new file mode 100644
index 0000000..fc5b642
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_TDD_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_TDD_01: The test case is used to check whether the UE can acquire paging in every PO"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_TDD_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_tdd_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~28
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_TDD_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_TDD_02.l1v
new file mode 100644
index 0000000..a85a120
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PCH_TDD_02.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PCH_TDD_02: The test case is used to check whether the UE can acquire paging in every PO"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PCH_TDD_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_pch_tdd_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~32
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_01.l1v
new file mode 100644
index 0000000..6cd91cf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_01.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PLMN_LIST_01: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_plmn_list_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02.l1v
new file mode 100644
index 0000000..83484b0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PLMN_LIST_02: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@1
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_01.l1v
new file mode 100644
index 0000000..2d57dba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_01.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE][IDLE_PLMN_LIST_02]IDLE_PLMN_LIST_02_01: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@1
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_02.l1v
new file mode 100644
index 0000000..1774b49
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_02.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE][IDLE_PLMN_LIST_02]IDLE_PLMN_LIST_02_02: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@2
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_03.l1v
new file mode 100644
index 0000000..268e0ce
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_03.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE][IDLE_PLMN_LIST_02]IDLE_PLMN_LIST_02_03: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@3
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_04.l1v
new file mode 100644
index 0000000..afac373
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_04.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE][IDLE_PLMN_LIST_02]IDLE_PLMN_LIST_02_04: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@4
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_05.l1v
new file mode 100644
index 0000000..61728ba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_05.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE][IDLE_PLMN_LIST_02]IDLE_PLMN_LIST_02_05: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@5
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_06.l1v
new file mode 100644
index 0000000..74f1f52
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_06.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE][IDLE_PLMN_LIST_02]IDLE_PLMN_LIST_02_06: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@6
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_07.l1v
new file mode 100644
index 0000000..5fe94c5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_07.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE][IDLE_PLMN_LIST_02]IDLE_PLMN_LIST_02_07: The test case is used to check whether the UE can perform PLMN list"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PLMN_LIST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_plmn_list_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@7
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_01.l1v
new file mode 100644
index 0000000..702dfa0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_01.l1v
@@ -0,0 +1,32 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PWS_01: The test case is used to the behavior of UE when the indication of ETWS/CMAS notification is received "
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PWS_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_idle_pws_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_02.l1v
new file mode 100644
index 0000000..5743c3c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_02.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PWS_02: Receving SIB1 and SIB11 simultaneously in idle mode (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PWS_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+} l1edps_idle_pws_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_03.l1v
new file mode 100644
index 0000000..77e76dc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/IDLE_PWS_03.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R9_LTE][02_IDLE]IDLE_PWS_03: Receving SIB1 and SIB11 simultaneously in idle mode (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_PWS_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+} l1edps_idle_pws_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/empty.h.txt b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/empty.h.txt
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/02_IDLE/empty.h.txt
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_CONN_EST_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_CONN_EST_01.l1v
new file mode 100644
index 0000000..7787d04
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_CONN_EST_01.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_CONN_EST_01: The test case is used to check whether the UE can perform reconfiguration in IDLE-SCH"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_CONN_EST_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_idle_sch_conn_est_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~6
+@1
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_01.l1v
new file mode 100644
index 0000000..b9a455c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_01.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_01: Test of PRACH and Msg3 Transmit Power"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02.l1v
new file mode 100644
index 0000000..ad54641
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_02: Test of Random Access Response Mis-Match"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_10.l1v
new file mode 100644
index 0000000..5534870
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_10.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_02_10: 10MHz-Test of Random Access Response Mis-Match"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_02_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_02_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_5.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_5.l1v
new file mode 100644
index 0000000..9494ef1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_5.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_02_5: 5MHz-Test of Random Access Response Mis-Match"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_02_5
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_02_5_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_03.l1v
new file mode 100644
index 0000000..c9b1160
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_03.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_03: Test of Contention-based Random Access Proceure (Success)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_04.l1v
new file mode 100644
index 0000000..78e67bc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_04.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_04: Test of Contention-based Random Access Procedure (Failed at Contention Resolution"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_05.l1v
new file mode 100644
index 0000000..1675eab
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_05.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_05: Test of Contention-based Random Access Procedure (C-RNTI assignment follows Contention Resoultion, FDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_06.l1v
new file mode 100644
index 0000000..326b242
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_06.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_06: Test of Contention-based Random Access Procedure (C-RNTI assignment follows Contention Resolution, TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_07.l1v
new file mode 100644
index 0000000..3af3383
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_07.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_07: Test of correction of PRACH Resource Transmission"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_08.l1v
new file mode 100644
index 0000000..2700618
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_08.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][03_IDLE_SCH]IDLE_SCH_RA_08: Test of correction of PRACH Resource Transmission (TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_RA_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_idle_sch_ra_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01.l1v
new file mode 100644
index 0000000..5d155c5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_ACQI_01: Test of aperiodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_ACQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_acqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_01.l1v
new file mode 100644
index 0000000..76059ee
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_01.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_ACQI_01_01: Test of aperiodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_ACQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_acqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~5
+@1
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_02.l1v
new file mode 100644
index 0000000..2ee8023
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_02.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_ACQI_01_02: Test of aperiodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_ACQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_acqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~5
+@2
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_03.l1v
new file mode 100644
index 0000000..050742e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_03.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_ACQI_01_03: Test of aperiodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_ACQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_acqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~5
+@3
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_04.l1v
new file mode 100644
index 0000000..40d97e4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_04.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_ACQI_01_04: Test of aperiodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_ACQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_acqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~5
+@4
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_05.l1v
new file mode 100644
index 0000000..d96233d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_ACQI_01_05.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_ACQI_01_05: Test of aperiodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_ACQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_acqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~5
+@5
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_01.l1v
new file mode 100644
index 0000000..c1ac1fe
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_01.l1v
@@ -0,0 +1,31 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_CONN_REEST_01: The test case is to verify that the FDD intra-frequency RRC re-establishment delay is within the specified limits in 36.133"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_CONN_REEST_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_conn_reest_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_02.l1v
new file mode 100644
index 0000000..d705d50
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_02.l1v
@@ -0,0 +1,32 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_CONN_REEST_02: The test case is to verify that the FDD inter-frequency RRC re-establishment delay is within the specified limits in 36.133"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_CONN_REEST_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_conn_reest_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_03.l1v
new file mode 100644
index 0000000..2c8ce8b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_03.l1v
@@ -0,0 +1,33 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_CONN_REEST_03: The test case is to verify that the TDD intra-frequency RRC re-establishment delay is within the specified limits in 36.133"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_CONN_REEST_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_conn_reest_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_04.l1v
new file mode 100644
index 0000000..b468d77
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CONN_REEST_04.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_CONN_REEST_04: The test case is to verify that the TDD inter-frequency RRC re-establishment delay is within the specified limits in 36.133"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_CONN_REEST_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_conn_reest_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CSG_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CSG_01.l1v
new file mode 100644
index 0000000..fdbcc22
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CSG_01.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_CSG_01: The test case is used to check whether the UE can successfully acquire the system information of the neighbor for CSG in SCH"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_CSG_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_csg_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CSG_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CSG_02.l1v
new file mode 100644
index 0000000..267912d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_CSG_02.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_CSG_02: The test case is used to check whether the UE can successfully acquire the system information of the neighbor for CSG in SCH"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_CSG_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_csg_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@1
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_DRX_TRANS_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_DRX_TRANS_01.l1v
new file mode 100644
index 0000000..8f20194
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_DRX_TRANS_01.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_DRX_TRANS_01: Verify that the UE can perform correctly in DRX transition"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_DRX_TRANS_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_drx_trans_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_01.l1v
new file mode 100644
index 0000000..1572b7d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_HANDOVER_01: The test case is used to check whether the FDD-FDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_handover_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02.l1v
new file mode 100644
index 0000000..ffb6a1a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@2
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_01.l1v
new file mode 100644
index 0000000..7f61c16
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_01.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02_1: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@1
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_02.l1v
new file mode 100644
index 0000000..1764ed7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_02.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02_2: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@2
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_03.l1v
new file mode 100644
index 0000000..f08e30c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_03.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02_3: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@3
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_04.l1v
new file mode 100644
index 0000000..2ef2f01
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_04.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02_4: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@4
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_05.l1v
new file mode 100644
index 0000000..c07489a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_05.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02_5: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@5
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_06.l1v
new file mode 100644
index 0000000..65dcfe5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_06.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02_6: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@6
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_07.l1v
new file mode 100644
index 0000000..30bd81a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_02_07.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_02]SCH_HANDOVER_02_7: The test case is used to check whether the TDD-TDD intra frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@7
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_03.l1v
new file mode 100644
index 0000000..66fb236
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_03.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_HANDOVER_03: The test case is used to check whether the FDD-FDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_handover_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04.l1v
new file mode 100644
index 0000000..a101a45
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@2
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_01.l1v
new file mode 100644
index 0000000..a29d6ba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_01.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04_1: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@1
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_02.l1v
new file mode 100644
index 0000000..544a1e1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_02.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04_2: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@2
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_03.l1v
new file mode 100644
index 0000000..5cc1dd9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_03.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04_3: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@3
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_04.l1v
new file mode 100644
index 0000000..d363dec
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_04.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04_4: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@4
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_05.l1v
new file mode 100644
index 0000000..2a3519b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_05.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04_5: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@5
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_06.l1v
new file mode 100644
index 0000000..d7a3dc3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_06.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04_6: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@6
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_07.l1v
new file mode 100644
index 0000000..e2bd9f6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_04_07.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_04]SCH_HANDOVER_04_7: The test case is used to check whether the TDD-TDD inter frequency handover requirements are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@7
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_05.l1v
new file mode 100644
index 0000000..ec05bc0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_05.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_HANDOVER_05: The test case is used to check whether the FDD-FDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_05
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_handover_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06.l1v
new file mode 100644
index 0000000..494519f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@2
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_01.l1v
new file mode 100644
index 0000000..e3f945e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_01.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06_1: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@1
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_02.l1v
new file mode 100644
index 0000000..f70e0ca
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_02.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06_2: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@2
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_03.l1v
new file mode 100644
index 0000000..6532dd2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_03.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06_3: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@3
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_04.l1v
new file mode 100644
index 0000000..7c4b915
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_04.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06_4: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@4
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_05.l1v
new file mode 100644
index 0000000..8e0517e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_05.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06_5: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@5
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_06.l1v
new file mode 100644
index 0000000..349dbb8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_06.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06_6: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@6
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_07.l1v
new file mode 100644
index 0000000..864bc96
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_HANDOVER_06_07.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH][SCH_HANDOVER_06]SCH_HANDOVER_06_7: The test case is used to check whether the TDD-TDD inter frequency handover requirements for the case when the target is unknown are met."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_HANDOVER_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_handover_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~7
+@7
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_INTRAHO_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_INTRAHO_01.l1v
new file mode 100644
index 0000000..2c9ba02
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_INTRAHO_01.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_INTRAHO_01: The test case is used to check whether the radio link monitoring will be stopped during intra cell handover and resumed after handover is successful"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_INTRAHO_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_intraho_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PAG_GAP_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PAG_GAP_01.l1v
new file mode 100644
index 0000000..28c653b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PAG_GAP_01.l1v
@@ -0,0 +1,34 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PAG_GAP_01: The test case is used to check whether the UE will skip a PO if the specific PO collides with gap."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PAG_GAP_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+ kal_uint8 test_pattern_id;
+
+} l1edps_sch_pag_gap_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@1
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01.l1v
new file mode 100644
index 0000000..013b431
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PCQI_01: Test of periodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PCQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_pcqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_01.l1v
new file mode 100644
index 0000000..4e71cc6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PCQI_01_01: Test of periodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PCQI_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_pcqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_02.l1v
new file mode 100644
index 0000000..9045802
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PCQI_01_02: Test of periodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PCQI_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_pcqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_03.l1v
new file mode 100644
index 0000000..26a5a5a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PCQI_01_03: Test of periodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PCQI_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_pcqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_04.l1v
new file mode 100644
index 0000000..f43785d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PCQI_01_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PCQI_01_04: Test of periodic CQI reporting procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PCQI_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_pcqi_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PC_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PC_01.l1v
new file mode 100644
index 0000000..7254b3a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PC_01.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PC_01: Test of TX Power Report Procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_pc_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_01.l1v
new file mode 100644
index 0000000..e134051
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_01.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PWS_01: The test case is used to check whether the UE can successfully re-acqurie the system info of the serving due to system info modification in SCH."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PWS_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_pws_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_02.l1v
new file mode 100644
index 0000000..4033da9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_02.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PWS_02: Receving SIB1 and SIB11 simultaneously in connected mode (FDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PWS_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+} l1edps_sch_pws_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_03.l1v
new file mode 100644
index 0000000..d9cb347
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_PWS_03.l1v
@@ -0,0 +1,28 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_PWS_03: Receving SIB1 and SIB11 simultaneously in connected mode (TDD case)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_PWS_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+} l1edps_sch_pws_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_01.l1v
new file mode 100644
index 0000000..815a4c6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_01.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_REDIRECTION_01: Verify the UE behaviour upon receiving RRC Connection release with redirection information(FDD->FDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_REDIRECTION_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_redirection_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_02.l1v
new file mode 100644
index 0000000..64346f4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_02.l1v
@@ -0,0 +1,40 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_REDIRECTION_02: Verify the UE behaviour upon receiving RRC Connection release with redirection information(TDD->TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_REDIRECTION_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_redirection_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_03.l1v
new file mode 100644
index 0000000..5205a6d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_03.l1v
@@ -0,0 +1,40 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_REDIRECTION_03: Verify the UE behaviour upon receiving RRC Connection release with redirection information(FDD->TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_REDIRECTION_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_redirection_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_04.l1v
new file mode 100644
index 0000000..fb109c6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_REDIRECTION_04.l1v
@@ -0,0 +1,40 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_REDIRECTION_04: Verify the UE behaviour upon receiving RRC Connection release with redirection information(TDD->FDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_REDIRECTION_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_redirection_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_01.l1v
new file mode 100644
index 0000000..a38549f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_01.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_01: Verify that the UE can detect the FDD out-of-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_02.l1v
new file mode 100644
index 0000000..f219b90
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_02.l1v
@@ -0,0 +1,36 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_02: Verify that the UE can detect the FDD out-of-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_03.l1v
new file mode 100644
index 0000000..d78861f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_03.l1v
@@ -0,0 +1,36 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_03: Verify that the UE can detect the FDD in-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_04.l1v
new file mode 100644
index 0000000..96b8554
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_04.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_04: Verify that the UE can detect the FDD in-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_05.l1v
new file mode 100644
index 0000000..ea0d53b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_05.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_05: Verify that the UE can detect the TDD out-of-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_05
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_06.l1v
new file mode 100644
index 0000000..83d1fcf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_06.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_06: Verify that the UE can detect the TDD out-of-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_06
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_07.l1v
new file mode 100644
index 0000000..20161fc
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_07.l1v
@@ -0,0 +1,37 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_07: Verify that the UE can detect the TDD in-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_07
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_08.l1v
new file mode 100644
index 0000000..7a387d1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_08.l1v
@@ -0,0 +1,38 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_08: Verify that the UE can detect the TDD in-sync"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_08
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_01.l1v
new file mode 100644
index 0000000..b6ee404
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_01.l1v
@@ -0,0 +1,38 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_DRX_01: Verify that the UE can detect the FDD out-of-sync in DRX"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_DRX_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_drx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_02.l1v
new file mode 100644
index 0000000..781f778
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_02.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_DRX_02: Verify that the UE can detect the FDD in-sync in DRX"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_DRX_02
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_drx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_03.l1v
new file mode 100644
index 0000000..b6b1cf1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_03.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_DRX_03: Verify that the UE can detect the TDD out-of-sync in DRX"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_DRX_03
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_drx_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_04.l1v
new file mode 100644
index 0000000..e12debf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_RLM_DRX_04.l1v
@@ -0,0 +1,39 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_RLM_DRX_04: Verify that the UE can detect the TDD in-sync in DRX"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_RLM_DRX_04
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_rlm_drx_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_SI_MODIFY_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_SI_MODIFY_01.l1v
new file mode 100644
index 0000000..f789e00
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_SI_MODIFY_01.l1v
@@ -0,0 +1,35 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_SI_MODIFY_01: The test case is used to check whether the UE can successfully re-acqurie the system info of the serving due to system info modification in SCH."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_SI_MODIFY_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_si_modify_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
+
+
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_SYNC_HANDOVER_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_SYNC_HANDOVER_01.l1v
new file mode 100644
index 0000000..273f20c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_SYNC_HANDOVER_01.l1v
@@ -0,0 +1,31 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_SYNC_HANDOVER_01: The test case is used to check synchronous handover cases (intra/inter FDD)."
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_SYNC_HANDOVER_01
+
+/******************************************************************************
+* Data Structure accompanying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_bool csr_config_by_band;
+ kal_bool csr_report_by_band;
+ kal_bool csr_is_skip_bw;
+ el1_csr_search_type_enum search_type;
+
+} l1edps_sch_sync_handover_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_01.l1v
new file mode 100644
index 0000000..b653e1e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_01.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TPC_01: Test of TPC Command Updating Procedure (Fix TPC mode, FDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TPC_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tpc_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_02.l1v
new file mode 100644
index 0000000..8d47e57
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_02.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TPC_02: Test of TPC Command Updating Procedure (Fix TPC mode, TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TPC_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tpc_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_03.l1v
new file mode 100644
index 0000000..b4750dd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_03.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TPC_03: Test of TPC Command Updating Procedure (Automatic mode, FDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TPC_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tpc_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_04.l1v
new file mode 100644
index 0000000..9c0bdc3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_04.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TPC_04: Test of TPC Command Updating Procedure (Automatic mode, TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TPC_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tpc_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_05.l1v
new file mode 100644
index 0000000..1346da4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_05.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TPC_05: Test of Timing Compensation Process for TPC (FDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TPC_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tpc_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_06.l1v
new file mode 100644
index 0000000..7bd2f61
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TPC_06.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TPC_06: Test of Timing Compensation Process for TPC (TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TPC_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tpc_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_01.l1v
new file mode 100644
index 0000000..910776f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_01.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TX_01: Test of Normal UL and DL Procedure (ALL ACK)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_02.l1v
new file mode 100644
index 0000000..e9ce2a7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_02.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TX_02: Test of Normal UL procedure (with NACK)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_03.l1v
new file mode 100644
index 0000000..e6cfb16
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_03.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TX_03: Test of ACK/NACK Repetition Procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tx_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_04.l1v
new file mode 100644
index 0000000..bdfd105
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_04.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TX_04: Test of Tx with TTI Bundling Enable"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tx_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_05.l1v
new file mode 100644
index 0000000..2979293
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_05.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TX_05: Test of UL SPS Proecdure (FDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tx_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_06.l1v
new file mode 100644
index 0000000..a511466
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/04_SCH/SCH_TX_06.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][04_SCH]SCH_TX_06: Test of UL SPS Procedure (TDD)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TX_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+} l1edps_sch_tx_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/BCCH_Meas_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/BCCH_Meas_01.l1v
new file mode 100644
index 0000000..8a6c22b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/BCCH_Meas_01.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][BCCH_MEAS_01]BCCH_MEAS_01: Test of FDD serving measurement during BCCH open"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_BCCH_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+} l1edps_bcch_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/BCCH_Meas_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/BCCH_Meas_02.l1v
new file mode 100644
index 0000000..5f4caef
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/BCCH_Meas_02.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][BCCH_MEAS_02]BCCH_MEAS_02: Test of TDD serving measurement during BCCH open"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_BCCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+} l1edps_bcch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01.l1v
new file mode 100644
index 0000000..360fe43
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][[IDLE_MEAS_01]IDLE_MEAS_01: Test of FDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_01.l1v
new file mode 100644
index 0000000..6133c8d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_01]IDLE_MEAS_01_01: Test of FDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_02.l1v
new file mode 100644
index 0000000..612c687
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_01]IDLE_MEAS_01_02: Test of FDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_03.l1v
new file mode 100644
index 0000000..5655fcf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_01]IDLE_MEAS_01_03: Test of FDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_04.l1v
new file mode 100644
index 0000000..d673f2c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_01_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_01]IDLE_MEAS_01_04: Test of FDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02.l1v
new file mode 100644
index 0000000..312a81c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_02]IDLE_MEAS_02: Test of FDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_01.l1v
new file mode 100644
index 0000000..d876c11
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_02]IDLE_MEAS_02_1: Test of FDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_02.l1v
new file mode 100644
index 0000000..1698e42
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_02]IDLE_MEAS_02_2: Test of FDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_03.l1v
new file mode 100644
index 0000000..ded7d3b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_02]IDLE_MEAS_02_3: Test of FDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_04.l1v
new file mode 100644
index 0000000..1d1abd3
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_02_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_02]IDLE_MEAS_02_4: Test of FDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03.l1v
new file mode 100644
index 0000000..b560095
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_03]IDLE_MEAS_03: Test of FDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_01.l1v
new file mode 100644
index 0000000..5e1d4e5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_03]IDLE_MEAS_03_1: Test of FDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_02.l1v
new file mode 100644
index 0000000..6daf0f9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_03]IDLE_MEAS_03_2: Test of FDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_03.l1v
new file mode 100644
index 0000000..f88ee53
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_03]IDLE_MEAS_03_3: Test of FDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_04.l1v
new file mode 100644
index 0000000..b4d315b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_03_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_03]IDLE_MEAS_03_4: Test of FDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04.l1v
new file mode 100644
index 0000000..006230b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_04]IDLE_MEAS_04: Test of TDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_01.l1v
new file mode 100644
index 0000000..c575ade
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_04]IDLE_MEAS_04_1: Test of TDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_02.l1v
new file mode 100644
index 0000000..0d52e04
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_04]IDLE_MEAS_04_2: Test of TDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_03.l1v
new file mode 100644
index 0000000..8479560
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_04]IDLE_MEAS_04_3: Test of TDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_04.l1v
new file mode 100644
index 0000000..6e9c156
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_04_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_04]IDLE_MEAS_04_4: Test of TDD intra frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05.l1v
new file mode 100644
index 0000000..acef8da
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_05]IDLE_MEAS_05: Test of TDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_01.l1v
new file mode 100644
index 0000000..2548f69
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_05]IDLE_MEAS_05_1: Test of TDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_02.l1v
new file mode 100644
index 0000000..f3ffe82
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_05]IDLE_MEAS_05_2: Test of TDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_03.l1v
new file mode 100644
index 0000000..1d33363
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_05]IDLE_MEAS_05_3: Test of TDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_04.l1v
new file mode 100644
index 0000000..34eb943
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_05_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_05]IDLE_MEAS_05_4: Test of TDD low priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06.l1v
new file mode 100644
index 0000000..628c830
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_06]IDLE_MEAS_06: Test of TDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_01.l1v
new file mode 100644
index 0000000..63607ee
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_06]IDLE_MEAS_06_1: Test of TDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_02.l1v
new file mode 100644
index 0000000..f1622b7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_06]IDLE_MEAS_06_2: Test of TDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_03.l1v
new file mode 100644
index 0000000..4c9af1a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_06]IDLE_MEAS_06_3: Test of TDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_04.l1v
new file mode 100644
index 0000000..904cce9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_06_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_MEAS_06]IDLE_MEAS_06_4: Test of TDD high priority inter frequency measurement in RRC_IDLE under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_07.l1v
new file mode 100644
index 0000000..9ac4eb5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE]IDLE_MEAS_07: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_IDLE"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_08.l1v
new file mode 100644
index 0000000..c1ce9fe
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE]IDLE_MEAS_08: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_IDLE"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_09.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_09.l1v
new file mode 100644
index 0000000..03a9e0b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_09.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE]IDLE_MEAS_09: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_IDLE"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_10.l1v
new file mode 100644
index 0000000..fda5b8f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_10.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE]IDLE_MEAS_10: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_IDLE"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_11.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_11.l1v
new file mode 100644
index 0000000..107ec4d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_11.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE]IDLE_MEAS_11: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_IDLE"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_12.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_12.l1v
new file mode 100644
index 0000000..6fbf2a7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_Meas_12.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE]IDLE_MEAS_12: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_IDLE"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_idle_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_SCH_Meas_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_SCH_Meas_01.l1v
new file mode 100644
index 0000000..3bbd8af
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_SCH_Meas_01.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_SCH_MEAS_01]IDLE_SCH_MEAS_01: Test of FDD intra frequency measurement during random access procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+} l1edps_idle_sch_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_SCH_Meas_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_SCH_Meas_02.l1v
new file mode 100644
index 0000000..a95c799
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/IDLE_SCH_Meas_02.l1v
@@ -0,0 +1,26 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][IDLE_SCH_MEAS_02]IDLE_SCH_MEAS_02: Test of TDD intra frequency measurement during random access procedure"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_IDLE_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+
+} l1edps_idle_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_01_01.l1v
new file mode 100644
index 0000000..df716c0
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_01_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][OTDOA_MEAS_01]OTDOA_MEAS_01_1: Test of FDD intra frequency OTDOA measurement"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_OTDOA_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_otdoa_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_02_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_02_01.l1v
new file mode 100644
index 0000000..3c2f734
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_02_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][OTDOA_MEAS_02]OTDOA_MEAS_02_1: Test of FDD inter frequency OTDOA measurement"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_OTDOA_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_otdoa_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_03_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_03_01.l1v
new file mode 100644
index 0000000..51bf441
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_03_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][OTDOA_MEAS_03]OTDOA_MEAS_03_1: Test of TDD intra frequency OTDOA measurement"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_OTDOA_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_otdoa_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_04_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_04_01.l1v
new file mode 100644
index 0000000..7d5e083
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/OTDOA_Meas_04_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][OTDOA_MEAS_04]OTDOA_MEAS_04_1: Test of TDD inter frequency OTDOA measurement"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_OTDOA_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_otdoa_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01.l1v
new file mode 100644
index 0000000..e65ed8c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_01]SCH_MEAS_01: Test of FDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_01.l1v
new file mode 100644
index 0000000..8974058
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_01]SCH_MEAS_01_1: Test of FDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_02.l1v
new file mode 100644
index 0000000..ef0cd72
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_01]SCH_MEAS_01_2: Test of FDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_03.l1v
new file mode 100644
index 0000000..5a2cb10
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_01]SCH_MEAS_01_3: Test of FDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_04.l1v
new file mode 100644
index 0000000..5953f9f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_01_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_01]SCH_MEAS_01_4: Test of FDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02.l1v
new file mode 100644
index 0000000..fb832ad
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_01.l1v
new file mode 100644
index 0000000..7de6d17
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_1: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_02.l1v
new file mode 100644
index 0000000..e6c65b7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_2: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_03.l1v
new file mode 100644
index 0000000..bfa8b50
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_3: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_04.l1v
new file mode 100644
index 0000000..f5c057f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_4: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_05.l1v
new file mode 100644
index 0000000..1439a08
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_5: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_06.l1v
new file mode 100644
index 0000000..e94b243
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_6: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_07.l1v
new file mode 100644
index 0000000..300901c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_7: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_08.l1v
new file mode 100644
index 0000000..e7bbf13
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_02_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_02]SCH_MEAS_02_8: Test of FDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03.l1v
new file mode 100644
index 0000000..811ef67
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_01.l1v
new file mode 100644
index 0000000..180832c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_1: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_02.l1v
new file mode 100644
index 0000000..4256ae4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_2: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_03.l1v
new file mode 100644
index 0000000..7fc0469
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_3: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_04.l1v
new file mode 100644
index 0000000..235f005
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_4: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_05.l1v
new file mode 100644
index 0000000..b2e5ccf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_5: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_06.l1v
new file mode 100644
index 0000000..6bb7552
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_6: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_07.l1v
new file mode 100644
index 0000000..bb98777
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_7: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_08.l1v
new file mode 100644
index 0000000..e3adb0a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_03_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_03]SCH_MEAS_03_8: Test of FDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04.l1v
new file mode 100644
index 0000000..4da4309
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_04]SCH_MEAS_04: Test of TDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_01.l1v
new file mode 100644
index 0000000..7a1faa1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_04]SCH_MEAS_04_1: Test of TDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_02.l1v
new file mode 100644
index 0000000..6563ce1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_04]SCH_MEAS_04_2: Test of TDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_03.l1v
new file mode 100644
index 0000000..5497f59
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_04]SCH_MEAS_04_3: Test of TDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_04.l1v
new file mode 100644
index 0000000..dadab9e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_04_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_04]SCH_MEAS_04_4: Test of TDD intra frequency measurement in RRC_CONNECTED without gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~4
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05.l1v
new file mode 100644
index 0000000..e56b89b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_01.l1v
new file mode 100644
index 0000000..c032c4e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_1: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_02.l1v
new file mode 100644
index 0000000..6a4c9c8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_2: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_03.l1v
new file mode 100644
index 0000000..82a8140
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_3: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_04.l1v
new file mode 100644
index 0000000..483a396
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_4: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_05.l1v
new file mode 100644
index 0000000..8255a74
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_5: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_06.l1v
new file mode 100644
index 0000000..247b84c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_6: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_07.l1v
new file mode 100644
index 0000000..7129038
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_7: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_08.l1v
new file mode 100644
index 0000000..db8315e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_05_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_05]SCH_MEAS_05_8: Test of TDD intra frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_05
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_05_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06.l1v
new file mode 100644
index 0000000..36c776c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_01.l1v
new file mode 100644
index 0000000..0d634cd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_1: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_02.l1v
new file mode 100644
index 0000000..30bf3e6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_2: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_03.l1v
new file mode 100644
index 0000000..6874815
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_3: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_04.l1v
new file mode 100644
index 0000000..c11fd3f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_4: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_05.l1v
new file mode 100644
index 0000000..7b90b34
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_5: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_06.l1v
new file mode 100644
index 0000000..bae12c8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_6: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_07.l1v
new file mode 100644
index 0000000..5adf1da
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_7: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_08.l1v
new file mode 100644
index 0000000..6cb4845
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_06_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_06]SCH_MEAS_06_8: Test of TDD inter frequency measurement in RRC_CONNECTED with gap under different DRX cycles"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_06
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_06_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07.l1v
new file mode 100644
index 0000000..bfd1d51
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_01.l1v
new file mode 100644
index 0000000..07d11e8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_1: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_02.l1v
new file mode 100644
index 0000000..421f35e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_2: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_03.l1v
new file mode 100644
index 0000000..f315d35
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_3: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_04.l1v
new file mode 100644
index 0000000..2cee43d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_4: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_05.l1v
new file mode 100644
index 0000000..0a96e92
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_5: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_06.l1v
new file mode 100644
index 0000000..190a571
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_6: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_07.l1v
new file mode 100644
index 0000000..343c890
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_7: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_08.l1v
new file mode 100644
index 0000000..26745d1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_07_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_07]SCH_MEAS_07_8: Test of 1 FDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_07
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_07_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08.l1v
new file mode 100644
index 0000000..25a1be2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_01.l1v
new file mode 100644
index 0000000..2710c7c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_1: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_02.l1v
new file mode 100644
index 0000000..ca8942a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_2: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_03.l1v
new file mode 100644
index 0000000..9ec63e7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_3: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_04.l1v
new file mode 100644
index 0000000..9bfad4d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_4: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_05.l1v
new file mode 100644
index 0000000..6bffd1f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_5: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_06.l1v
new file mode 100644
index 0000000..8ea7484
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_6: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_07.l1v
new file mode 100644
index 0000000..d326444
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_7: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_08.l1v
new file mode 100644
index 0000000..ea482d9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_08_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_08]SCH_MEAS_08_8: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_08
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_08_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09.l1v
new file mode 100644
index 0000000..f03cf1d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_01.l1v
new file mode 100644
index 0000000..e02df16
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_1: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_02.l1v
new file mode 100644
index 0000000..5107474
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_2: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_03.l1v
new file mode 100644
index 0000000..8a2e40f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_3: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_04.l1v
new file mode 100644
index 0000000..290f314
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_4: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_05.l1v
new file mode 100644
index 0000000..be8aa8b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_5: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_06.l1v
new file mode 100644
index 0000000..d0ac914
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_6: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_07.l1v
new file mode 100644
index 0000000..2a21f4f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_7: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_08.l1v
new file mode 100644
index 0000000..402ffc7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_09_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_09]SCH_MEAS_09_8: Test of 1 FDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_09
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_09_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10.l1v
new file mode 100644
index 0000000..db7afeb
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_01.l1v
new file mode 100644
index 0000000..fe281b8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_1: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_02.l1v
new file mode 100644
index 0000000..d4a684c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_2: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_03.l1v
new file mode 100644
index 0000000..1db23d2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_3: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_04.l1v
new file mode 100644
index 0000000..bd61c48
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_4: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_05.l1v
new file mode 100644
index 0000000..a5571f2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_5: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_06.l1v
new file mode 100644
index 0000000..07e13b5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_6: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_07.l1v
new file mode 100644
index 0000000..93d9df5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_7: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_08.l1v
new file mode 100644
index 0000000..bd51703
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_10_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_10]SCH_MEAS_10_8: Test of 1 TDD intra CSG + 2 FDD inter + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_10
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_10_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11.l1v
new file mode 100644
index 0000000..a68cbbf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_01.l1v
new file mode 100644
index 0000000..e872cad
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_1: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_02.l1v
new file mode 100644
index 0000000..229eb57
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_2: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_03.l1v
new file mode 100644
index 0000000..eeaa630
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_3: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_04.l1v
new file mode 100644
index 0000000..6f39ad5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_4: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_05.l1v
new file mode 100644
index 0000000..bf5087c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_5: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_06.l1v
new file mode 100644
index 0000000..f32b86a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_6: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_07.l1v
new file mode 100644
index 0000000..8195700
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_7: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_08.l1v
new file mode 100644
index 0000000..4ad398d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_11_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_11]SCH_MEAS_11_8: Test of 1 FDD intra + 2 FDD inter(1 CSG) + 2 TDD inter frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_11
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_11_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12.l1v
new file mode 100644
index 0000000..ebb4369
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_01.l1v
new file mode 100644
index 0000000..e7a4105
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_1: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_02.l1v
new file mode 100644
index 0000000..af9a10c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_2: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_03.l1v
new file mode 100644
index 0000000..7ae8c7d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_3: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_04.l1v
new file mode 100644
index 0000000..f760a4e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_4: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_05.l1v
new file mode 100644
index 0000000..cc608d1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_5: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_06.l1v
new file mode 100644
index 0000000..9fcfeb4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_6: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_07.l1v
new file mode 100644
index 0000000..26dd722
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_7: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_08.l1v
new file mode 100644
index 0000000..52262de
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_MEAS/SCH_Meas_12_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][05_MEAS][SCH_MEAS_12]SCH_MEAS_12_8: Test of 1 TDD intra + 2 FDD inter + 2 TDD inter(1 CSG) frequency cells in RRC_CONNECTED"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_MEASUREMENT_12
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+
+
+} l1edps_sch_measurement_12_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/05_Measurement/empty.h.txt b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_Measurement/empty.h.txt
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/05_Measurement/empty.h.txt
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_01.l1v
new file mode 100644
index 0000000..eef255a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_01:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_02.l1v
new file mode 100644
index 0000000..e48f7fa
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_02:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@2
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_03.l1v
new file mode 100644
index 0000000..4232c59
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_03.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_03:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@3
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_04.l1v
new file mode 100644
index 0000000..09898e6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_04:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@4
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_05.l1v
new file mode 100644
index 0000000..c67cea8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_05.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_05:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@5
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_06.l1v
new file mode 100644
index 0000000..f917f51
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_06.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_06:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@6
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_07.l1v
new file mode 100644
index 0000000..196f22c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_07.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_07:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@7
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_08.l1v
new file mode 100644
index 0000000..169fe57
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_08.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_08:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@8
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_09.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_09.l1v
new file mode 100644
index 0000000..28c7f7e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_09.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_09:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@9
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_10.l1v
new file mode 100644
index 0000000..19953bd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_10.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_10:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@10
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_11.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_11.l1v
new file mode 100644
index 0000000..9835680
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_11.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_11:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@11
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_12.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_12.l1v
new file mode 100644
index 0000000..1d035e6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_12.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_12:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@12
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_13.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_13.l1v
new file mode 100644
index 0000000..745fd11
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_13.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_13:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@13
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_14.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_14.l1v
new file mode 100644
index 0000000..9abb958
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_14.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_14:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@14
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_15.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_15.l1v
new file mode 100644
index 0000000..f7e0516
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_15.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_15:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@15
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_16.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_16.l1v
new file mode 100644
index 0000000..71a4280
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_16.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_16:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@16
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_17.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_17.l1v
new file mode 100644
index 0000000..397181b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_17.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_17:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@17
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_18.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_18.l1v
new file mode 100644
index 0000000..de4983d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_18.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_18:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@18
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_19.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_19.l1v
new file mode 100644
index 0000000..e5f8a4c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_19.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_19:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@19
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_20.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_20.l1v
new file mode 100644
index 0000000..ca6889c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_20.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_20:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@20
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_21.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_21.l1v
new file mode 100644
index 0000000..8f0eb08
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_21.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_21:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@21
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_22.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_22.l1v
new file mode 100644
index 0000000..fed7ba8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_22.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_22:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@22
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_23.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_23.l1v
new file mode 100644
index 0000000..b7624d9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_23.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_23:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@23
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_24.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_24.l1v
new file mode 100644
index 0000000..bc8ff9b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_24.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_24:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@24
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_25.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_25.l1v
new file mode 100644
index 0000000..fbea16a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_25.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_25:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@25
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_26.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_26.l1v
new file mode 100644
index 0000000..03aea90
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_26.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_26:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@26
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_27.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_27.l1v
new file mode 100644
index 0000000..cfedb72
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_27.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_27:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@27
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_28.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_28.l1v
new file mode 100644
index 0000000..0e816a6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_28.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_28:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@28
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_29.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_29.l1v
new file mode 100644
index 0000000..3df1b73
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_29.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_29:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@29
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_30.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_30.l1v
new file mode 100644
index 0000000..6d7ec7e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_30.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_30:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@30
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_31.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_31.l1v
new file mode 100644
index 0000000..674e129
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_31.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_31:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@31
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_32.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_32.l1v
new file mode 100644
index 0000000..cd1094a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_32.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_32:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@32
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_33.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_33.l1v
new file mode 100644
index 0000000..45c2caf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_33.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_33:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@33
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_34.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_34.l1v
new file mode 100644
index 0000000..c84102d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_34.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_34:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@34
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_35.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_35.l1v
new file mode 100644
index 0000000..042037a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_35.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_35:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@35
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_36.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_36.l1v
new file mode 100644
index 0000000..8715c0b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_36.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_36:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@36
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_37.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_37.l1v
new file mode 100644
index 0000000..842215a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_37.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_37:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@37
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_38.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_38.l1v
new file mode 100644
index 0000000..296be59
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_38.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_38:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@38
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_39.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_39.l1v
new file mode 100644
index 0000000..979559f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_39.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_39:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@39
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_40.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_40.l1v
new file mode 100644
index 0000000..99c9c6c
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_40.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_40:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@40
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_41.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_41.l1v
new file mode 100644
index 0000000..c888143
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_41.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_41:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@41
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_42.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_42.l1v
new file mode 100644
index 0000000..c85cd37
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_42.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_42:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@42
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_43.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_43.l1v
new file mode 100644
index 0000000..a553385
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_43.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_43:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@43
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_44.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_44.l1v
new file mode 100644
index 0000000..88f034a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_44.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_44:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@44
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_45.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_45.l1v
new file mode 100644
index 0000000..ae359db
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_45.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_45:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@45
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_46.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_46.l1v
new file mode 100644
index 0000000..e75221e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_46.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_46:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@46
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_47.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_47.l1v
new file mode 100644
index 0000000..b9e00ff
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_47.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_47:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@47
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_48.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_48.l1v
new file mode 100644
index 0000000..4ffb9cf
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_48.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_48:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@48
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_49.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_49.l1v
new file mode 100644
index 0000000..c37781d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_49.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_49:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@49
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_50.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_50.l1v
new file mode 100644
index 0000000..0af8dd4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_50.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_50:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@50
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_51.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_51.l1v
new file mode 100644
index 0000000..294e88e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_51.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_51:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@51
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_52.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_52.l1v
new file mode 100644
index 0000000..247017a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_52.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_52:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@52
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_53.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_53.l1v
new file mode 100644
index 0000000..cfd2b55
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_53.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_53:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@53
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_54.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_54.l1v
new file mode 100644
index 0000000..a10b663
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_54.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_54:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@54
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_55.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_55.l1v
new file mode 100644
index 0000000..d8365ab
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_55.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_55:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@55
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_56.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_56.l1v
new file mode 100644
index 0000000..277a376
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_56.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_56:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@56
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_57.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_57.l1v
new file mode 100644
index 0000000..483aa65
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_57.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_57:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@57
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_58.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_58.l1v
new file mode 100644
index 0000000..af71567
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_58.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_58:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@58
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_59.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_59.l1v
new file mode 100644
index 0000000..e83b5c5
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_59.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_59:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@59
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_60.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_60.l1v
new file mode 100644
index 0000000..fe55775
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_60.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_60:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@60
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_61.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_61.l1v
new file mode 100644
index 0000000..2ec2840
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_61.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_61:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@61
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_62.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_62.l1v
new file mode 100644
index 0000000..1501836
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_62.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_62:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@62
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_63.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_63.l1v
new file mode 100644
index 0000000..d0203ec
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_01_63.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_01_63:: Test of TDD TRX with all subframe assignment and special subframe config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_01
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_01_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@63
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02.l1v
new file mode 100644
index 0000000..a42a032
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_01.l1v
new file mode 100644
index 0000000..7405ad8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_01.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_01: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_02.l1v
new file mode 100644
index 0000000..de3bb68
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_02.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_02: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@2
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_03.l1v
new file mode 100644
index 0000000..bd6928f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_03.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_03: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@3
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_04.l1v
new file mode 100644
index 0000000..d9595e8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_04.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_04: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@4
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_05.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_05.l1v
new file mode 100644
index 0000000..07c2a03
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_05.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_05: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@5
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_06.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_06.l1v
new file mode 100644
index 0000000..908c700
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_06.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_06: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@6
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_07.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_07.l1v
new file mode 100644
index 0000000..3fdabba
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_07.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_07: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@7
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_08.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_08.l1v
new file mode 100644
index 0000000..770a3f1
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_08.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_08: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@8
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_09.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_09.l1v
new file mode 100644
index 0000000..94dacf2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_09.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_09: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@9
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_10.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_10.l1v
new file mode 100644
index 0000000..0d81e81
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_10.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_10: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@10
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_11.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_11.l1v
new file mode 100644
index 0000000..5c7a8b2
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_11.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_11: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@11
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_12.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_12.l1v
new file mode 100644
index 0000000..87b7928
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_12.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_12: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@12
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_13.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_13.l1v
new file mode 100644
index 0000000..a385ab9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_13.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_13: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@13
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_14.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_14.l1v
new file mode 100644
index 0000000..ec3c945
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_14.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_14: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@14
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_15.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_15.l1v
new file mode 100644
index 0000000..0101c5a
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_15.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_15: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@15
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_16.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_16.l1v
new file mode 100644
index 0000000..7022988
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_16.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_16: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@16
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_17.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_17.l1v
new file mode 100644
index 0000000..f564007
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_17.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_17: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@17
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_18.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_18.l1v
new file mode 100644
index 0000000..0b15a1e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_18.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_18: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@18
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_19.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_19.l1v
new file mode 100644
index 0000000..0fb0497
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_19.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_19: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@19
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_20.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_20.l1v
new file mode 100644
index 0000000..2278aa8
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_20.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_20: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@20
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_21.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_21.l1v
new file mode 100644
index 0000000..2406f69
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_21.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_21: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@21
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_22.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_22.l1v
new file mode 100644
index 0000000..073d5b7
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_22.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_22: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@22
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_23.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_23.l1v
new file mode 100644
index 0000000..5719a50
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_23.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_23: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@23
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_24.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_24.l1v
new file mode 100644
index 0000000..355d573
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_24.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_24: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@24
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_25.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_25.l1v
new file mode 100644
index 0000000..9916d8e
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_25.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_25: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@25
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_26.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_26.l1v
new file mode 100644
index 0000000..ea5efbd
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_26.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_26: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@26
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_27.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_27.l1v
new file mode 100644
index 0000000..c7c48c9
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_27.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_27: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@27
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_28.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_28.l1v
new file mode 100644
index 0000000..9d87521
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_02_28.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_02_28: Test of DL with all MCS"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_02
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_02_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@28
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_03.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_03.l1v
new file mode 100644
index 0000000..73f5f71
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_03.l1v
@@ -0,0 +1,29 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_03: DL with TM9 tset (FDD cell)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_03
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_TRX_03_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+[test_pattern_id] "test_pattern_id"
+1~28
+@1
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_04.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_04.l1v
new file mode 100644
index 0000000..f3e4e7f
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_04.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_04: DL with TM9 tset (TDD cell)"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_04
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_04_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~63
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP.l1v
new file mode 100644
index 0000000..719f2ee
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_GAP:: Test of FDD TRX with gap config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_GAP
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_gap_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~8
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP_FDD_01.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP_FDD_01.l1v
new file mode 100644
index 0000000..ee8fc6b
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP_FDD_01.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_GAP_FDD_01: Test of FDD TRX with gap config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_GAP
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_gap_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@1
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP_FDD_02.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP_FDD_02.l1v
new file mode 100644
index 0000000..5ad01c4
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/06_TRX/SCH_TRX_GAP_FDD_02.l1v
@@ -0,0 +1,30 @@
+{ Validation }
+Title = "[R9_LTE][06_TRX]SCH_TRX_GAP_FDD_02: Test of FDD TRX with gap config"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_SCH_TRX_GAP
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+ kal_uint8 test_pattern_id;
+} l1edps_sch_trx_gap_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[test_pattern_id] "test_pattern_id"
+1~2
+@2
\ No newline at end of file
diff --git a/mcu/service/dhl/database/l1validation_db/R9_LTE/Common_Params_Setup.l1v b/mcu/service/dhl/database/l1validation_db/R9_LTE/Common_Params_Setup.l1v
new file mode 100644
index 0000000..cf3a326
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/R9_LTE/Common_Params_Setup.l1v
@@ -0,0 +1,49 @@
+{ Validation }
+Title = "[R9_LTE]00_Common_Parameter_Setup"
+ModuleID = MOD_ERRC
+MsgID = MSG_ID_L1EDPS_COMMON_PARAMS_SETUP
+
+/******************************************************************************
+* Data Structure accomnying the above primitive
+typedef struct
+{
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+
+ l1edps_inject_bitmap_struct injectBitmap;
+ EARFCN dlEarfcn;
+ kal_uint16 physCellId;
+ el1_bandwidth_enum mibDlBandwidth;
+ el1_ch_antn_port_num_enum antennaPortNum;
+ el1_bandwidth_enum sib2UlBandwidth;
+} l1edps_common_params_setup_struct;
+*
+*******************************************************************************/
+
+
+{Parameters}
+/******************************************************************************
+* 1. The following is the constrained range for the input of this value.
+* 2. Some combination of the following bit-fields may be suported
+* 3. The parameter range can be changed to support combinations of different bands
+*******************************************************************************/
+
+/* [Variable Name] "corresponding label showen on GUI" */
+[injectBitmap] "injectBitmap"
+@INJECT_BMP_NONE
+
+[dlEarfcn] "dlEarfcn"
+@0
+
+[physCellId] "physCellId"
+@0xFFFF
+
+[mibDlBandwidth] "mibDlBandwidth"
+@BW_100_RB
+
+[antennaPortNum] "antennaPortNum"
+@EL1_CH_ANTN_PORT_NUM_1
+
+[sib2UlBandwidth] "sib2UlBandwidth"
+@BW_100_RB
+
diff --git a/mcu/service/dhl/database/l1validation_db/dps_Test_Stop.l1v b/mcu/service/dhl/database/l1validation_db/dps_Test_Stop.l1v
new file mode 100755
index 0000000..d40908d
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/dps_Test_Stop.l1v
@@ -0,0 +1,13 @@
+{ Validation }
+Title = "Stop Currently Running Test"
+ModuleID = MOD_DUMMYMPAL
+MsgID = MSG_ID_DPS_TEST_STOP2_REQ // will be defined in appropriate header file
+
+/* Data Structure accomnying the above primitive
+typedef struct {
+ kal_uint8 ref_count;
+ kal_uint16 msg_len;
+}dps_test_stop2_req_struct;
+*/
+
+{Parameters}
diff --git a/mcu/service/dhl/database/l1validation_db/dummy.l1v b/mcu/service/dhl/database/l1validation_db/dummy.l1v
new file mode 100755
index 0000000..4ab14be
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/dummy.l1v
@@ -0,0 +1,7 @@
+{ Validation }
+Title = "Dummy Test"
+ModuleID = MOD_TST
+MsgID = MSG_ID_TST_INJECT_STRING
+
+{ Parameters }
+
diff --git a/mcu/service/dhl/database/l1validation_db/l1v_db.c b/mcu/service/dhl/database/l1validation_db/l1v_db.c
new file mode 100644
index 0000000..c75b1a6
--- /dev/null
+++ b/mcu/service/dhl/database/l1validation_db/l1v_db.c
@@ -0,0 +1,1137 @@
+/********************************************************************************************
+ * LEGAL DISCLAIMER
+ *
+ * (Header of MediaTek Software/Firmware Release or Documentation)
+ *
+ * BY OPENING OR USING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+ * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") RECEIVED
+ * FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON AN "AS-IS" BASIS
+ * ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
+ * A PARTICULAR PURPOSE OR NONINFRINGEMENT. NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY
+ * WHATSOEVER WITH RESPECT TO THE SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY,
+ * INCORPORATED IN, OR SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK
+ * ONLY TO SUCH THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+ * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S SPECIFICATION
+ * OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+ *
+ * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE LIABILITY WITH
+ * RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, AT MEDIATEK'S OPTION,
+ *
+ * TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, OR REFUND ANY SOFTWARE LICENSE
+ * FEES OR SERVICE CHARGE PAID BY BUYER TO MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+ *
+ * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE WITH THE LAWS
+ * OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF LAWS PRINCIPLES.
+ ************************************************************************************************/
+
+
+/*******************************************************************************
+ *
+ * Filename:
+ * ---------
+ * l1v_db.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file used for pre-processing to build L1V DB
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *==============================================================================
+ * HISTORY
+ * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * removed!
+ * removed!
+ * removed!
+ *
+ * removed!
+ * removed!
+ * removed!
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+ *
+ * removed!
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+ * removed!
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+ *
+ * removed!
+ * removed!
+ * removed!
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
+ *==============================================================================
+ * How to add a new gv script
+ * 1. Put the l1v script into the proper folder e.g: \dhl\database\l1validation_db
+ *
+ * 2. #include "xxx.l1v".
+ *
+ *******************************************************************************/
+
+#ifdef STDC_HEADERS
+#undef STDC_HEADERS //it will include stdio.h
+#endif
+
+#ifdef __UMTS_RAT__
+//For 3G Project, please include your header here, e.g: #include "dps_D1_MT_call.l1v"
+//Please put your gv files to \dhl\database\l1validation_db\
+
+#include "0_3G_Single_Channel/1_Idle/udps_I1_Initial_Cell_Search.l1v"
+#include "0_3G_Single_Channel/1_Idle/udps_I2_SFN_Read_SIB_Listen.l1v"
+#include "0_3G_Single_Channel/1_Idle/udps_I3_Paging_Response.l1v"
+#include "0_3G_Single_Channel/1_Idle/udps_I4_Target_Cell_Search.l1v"
+#include "0_3G_Single_Channel/1_Idle/udps_I10_UL1D_CS_Test.l1v"
+#include "0_3G_Single_Channel/1_Idle/udps_I12_pch_measurement_8960.l1v"
+#include "0_3G_Single_Channel/1_Idle/udps_I13_Continual_ICS.l1v"
+#include "0_3G_Single_Channel/2_Access/udps_A1_UL_Open_Loop_Pwr_Ctrl.l1v"
+#include "0_3G_Single_Channel/2_Access/udps_A2_Tx_On_Off_Time_Mask.l1v"
+#include "0_3G_Single_Channel/2_Access/udps_A3_Rx_ACK_on_AICH.l1v"
+#include "0_3G_Single_Channel/2_Access/udps_A4_Rx_No_ACK_on_AICH.l1v"
+#include "0_3G_Single_Channel/2_Access/udps_A5_Rx_NACK_on_AICH.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC12.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC144.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC384.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD05/udps_CD05_Pef_in_Static_CH_RMC64.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC12.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD10/udps_CD10_DL_Pwr_Ctrl_Const_BLER_RMC64.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC12.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/CD13/udps_CD13_Pef_in_SHO_RMC64.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD01_UL_Inner_Loop_Pwr_Ctrl.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD02_Out_of_Sync_Handling.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD03_Change_of_TFC.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD04_UL_Compressed_Mode.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD09_Pef_in_TX_Div_Mode.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD11_Pef_in_DL_Compressed_Mode.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD12_Pef_of_BTFD.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD14_Pef_of_TPC_Combining.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD15_Pef_in_SSDT_Pwr_Ctrl.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD16_Active_Set_Update_Delay.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD17_TX_Timing_in_SHO.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD18_Intra_Freq_TRHHO_Delay.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD19_Inter_Freq_TRHHO_Delay.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD20_RRC_Re_estab_Delay.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD21_Inter_Freq_TMHHO.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD22_Inter_Freq_TRHHO_Revert.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD23_Inter_Freq_TMHHO_Revert.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD24_abort_enter_DCH.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD39_BER_test_in_DCH_mode.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD40_SADCH_TTI_eighty.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD41_SADCH_TTI_eighty_with_CM.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD50.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_CD51_DCH_FACH_transition.l1v"
+#include "0_3G_Single_Channel/3_Dedicated/udps_AMR_LoRx01.l1v"
+#include "0_3G_Single_Channel/udps_Test_Stop.l1v"
+#include "1_3G_Single_Meas/udps_CRS1_Inter_Freq_Crs_in_Idle.l1v"
+#include "1_3G_Single_Meas/udps_CRS2_Intra_Freq_Crs_in_Fach.l1v"
+#include "1_3G_Single_Meas/udps_CRS3_Inter_Freq_Crs_in_Fach.l1v"
+#include "1_3G_Single_Meas/udps_M01_Intra_Freq_Reporting_Delay.l1v"
+#include "1_3G_Single_Meas/udps_M03_Inter_Freq_Reporting_Delay.l1v"
+#include "1_3G_Single_Meas/udps_M04_Abs_Intra_Freq_Cpich_Rscp.l1v"
+#include "1_3G_Single_Meas/udps_M05_Rel_Intra_Freq_Cpich_Rscp.l1v"
+#include "1_3G_Single_Meas/udps_M06_Rel_Inter_Freq_Cpich_Rscp.l1v"
+#include "1_3G_Single_Meas/udps_M07_Abs_Intra_Freq_Cpich_Ecio.l1v"
+#include "1_3G_Single_Meas/udps_M08_Rel_Intra_Freq_Cpich_Ecio.l1v"
+#include "1_3G_Single_Meas/udps_M09_Rel_Inter_Freq_Cpich_Ecio.l1v"
+#include "1_3G_Single_Meas/udps_M10_Abs_Utra_Carrier_Rssi.l1v"
+#include "1_3G_Single_Meas/udps_M11_Rel_Utra_Carrier_Rssi.l1v"
+#include "1_3G_Single_Meas/udps_M12_Intra_Freq_Sfn_Cfn_Diff.l1v"
+#include "1_3G_Single_Meas/udps_M13_Inter_Freq_Sfn_Cfn_Diff.l1v"
+#include "1_3G_Single_Meas/udps_M14_Sfn_Sfn_Diff_Type1.l1v"
+#include "1_3G_Single_Meas/udps_M15_UE_Tx_Power.l1v"
+#include "2_3G_Dual_Mode/udps_GM1_Gsm_Meas_in_Null.l1v"
+#include "2_3G_Dual_Mode/udps_GM2_Gsm_Meas_in_Idle.l1v"
+#include "2_3G_Dual_Mode/udps_GM3_Gsm_Meas_in_Fach.l1v"
+#include "2_3G_Dual_Mode/udps_GM4_Gsm_Reporting_Delay.l1v"
+#include "2_3G_Dual_Mode/udps_GM5_Gsm_Reporting_Delay_No_Bsic.l1v"
+#include "2_3G_Dual_Mode/udps_GM6_Abs_Gsm_Carrier_Rssi.l1v"
+#include "2_3G_Dual_Mode/udps_UM1_Wcdma_Meas_in_Scan.l1v"
+#include "2_3G_Dual_Mode/udps_UM2_Wcdma_Meas_in_Idle.l1v"
+#include "2_3G_Dual_Mode/udps_UM3_Wcdma_Meas_in_Dedi.l1v"
+#include "2_3G_Dual_Mode/udps_UM4_Wcdma_Meas_in_Pidle.l1v"
+#include "2_3G_Dual_Mode/udps_UM5_Wcdma_Meas_in_Ptx.l1v"
+#include "2_3G_Dual_Mode/udps_IRT1_Gsm_Crs_to_Umts.l1v"
+#include "2_3G_Dual_Mode/udps_IRT2_Umts_Crs_to_Gsm.l1v"
+#include "2_3G_Dual_Mode/udps_IRT3_Gsm_Hho_to_Umts.l1v"
+#include "3_3G_CSD_Request/udps_I5_PCH_reading_on_STTD_Cell.l1v"
+#include "3_3G_CSD_Request/udps_I6_Pch_Receive.l1v"
+#include "3_3G_CSD_Request/udps_I8_Recursive_TCS_in_PCH.l1v"
+#include "3_3G_CSD_Request/udps_I9_Recursive_ICS_in_NULL.l1v"
+#include "3_3G_CSD_Request/udps_I11_Recursive_IPS_in_NULL.l1v"
+#include "3_3G_CSD_Request/udps_A6_Best_Effort_for_PRACH.l1v"
+#include "3_3G_CSD_Request/udps_A7_Recursive_TCS_in_FACH.l1v"
+#include "3_3G_CSD_Request/udps_CD25_Recursive_TCS_in_DCH.l1v"
+#include "3_3G_CSD_Request/udps_CD26_Unknown_SFN_Decoding_in_DCH.l1v"
+#include "3_3G_CSD_Request/udps_CD28_TPC_Combining_Reliable_Test.l1v"
+#include "3_3G_CSD_Request/udps_CD31_SIR_Meas_In_DCH_with_TXTD_CM.l1v"
+#include "3_3G_CSD_Request/udps_CD32_DLPC_Test_Wind_Up_Down.l1v"
+#include "3_3G_CSD_Request/udps_CD33_Pef_of_TrCH_Reconfig.l1v"
+#include "3_3G_CSD_Request/udps_CD34_DLPC_for_Diff_TF.l1v"
+#include "3_3G_CSD_Request/udps_CD35_DLPC_for_BTFD_Dual_TF.l1v"
+#include "3_3G_CSD_Request/udps_CD36_DLPC_for_TFCI_Dual_TF.l1v"
+#include "3_3G_CSD_Request/udps_CD37_DLPC_Test_Initial_Convergence.l1v"
+#include "3_3G_CSD_Request/udps_CD38_ULPC_for_TX_AGC_test.l1v"
+#include "3_3G_CSD_Request/udps_M16_all_meas_statistic.l1v"
+#include "3_3G_CSD_Request/udps_UM6_Recursive_TCS_in_2G_Idle.l1v"
+#include "3_3G_CSD_Request/udps_UM7_Recursive_TCS_in_2G_Dedi.l1v"
+#include "11_HSDPA/udps_DPAS_SL1.l1v"
+#include "11_HSDPA/udps_DPAS_SL2.l1v"
+#include "11_HSDPA/udps_DPAS_SL3.l1v"
+#include "11_HSDPA/udps_DPAS_SL4.l1v"
+#include "11_HSDPA/udps_DPAS_SL5.l1v"
+#include "11_HSDPA/udps_DPAS_SL6.l1v"
+#include "11_HSDPA/udps_DPAS_SL7.l1v"
+#include "11_HSDPA/udps_DPAS_SL8.l1v"
+#include "11_HSDPA/udps_DPAS_SL9.l1v"
+#include "11_HSDPA/udps_DPAS_SL10.l1v"
+#include "11_HSDPA/udps_DPAS_SL11.l1v"
+#include "11_HSDPA/udps_DPAS_SL12.l1v"
+#include "11_HSDPA/udps_DPAS_SL13.l1v"
+#include "11_HSDPA/udps_DPAS_CC1.l1v"
+#include "11_HSDPA/udps_DPAS_CC2.l1v"
+#include "11_HSDPA/udps_DPAS_CC3.l1v"
+#include "11_HSDPA/udps_DPAS_CC4.l1v"
+#include "11_HSDPA/udps_DPAS_CC5.l1v"
+#include "11_HSDPA/udps_DPAS_CC6.l1v"
+#include "11_HSDPA/udps_DPAS_TGPS1.l1v"
+#include "11_HSDPA/udps_DPAS_TGPS2.l1v"
+#include "11_HSDPA/udps_DPAS_MEAS1.l1v"
+#include "11_HSDPA/udps_DPAS_MEAS2.l1v"
+#include "11_HSDPA/udps_DPAS_MEAS3.l1v"
+#include "11_HSDPA/udps_DPAS_OCIC1.l1v"
+#include "11_HSDPA/udps_DPAS_OCIC2.l1v"
+#include "11_HSDPA/udps_DPAS02_OCIC.l1v"
+#include "11_HSDPA/udps_DPAS08_1.l1v"
+#include "11_HSDPA/udps_DPAF01.l1v"
+#include "11_HSDPA/udps_DPAF02.l1v"
+#include "11_HSDPA/udps_DPAF03.l1v"
+#include "11_HSDPA/udps_DPAF04.l1v"
+#include "11_HSDPA/udps_DPAF07.l1v"
+#include "11_HSDPA/udps_DPAF08.l1v"
+#include "11_HSDPA/udps_DPAF09.l1v"
+#include "11_HSDPA/udps_DPAF10.l1v"
+#include "11_HSDPA/udps_DPAF11.l1v"
+#include "11_HSDPA/udps_DPAF11_1.l1v"
+#include "11_HSDPA/udps_DPAF12.l1v"
+#include "11_HSDPA/udps_DPAF13.l1v"
+#include "11_HSDPA/udps_DPAF14.l1v"
+#include "11_HSDPA/udps_DPAF15.l1v"
+#include "11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test1.l1v"
+#include "11_HSDPA/1_FDDTest_8960/udps_DPAS_FDD_Test2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN01_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN02_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN03_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN04_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN05_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN06_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN07_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN08_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN09_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN10_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN11_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN12_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN13_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN14_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN15_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN16.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN17_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN18_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN19_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN20.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN21.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN22.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN90_2.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_1.l1v"
+#include "12_HSUPA_R6/1_E_DCH_CONN/udps_R6_CN91_2.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW01_1.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW01_2.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW02.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW03.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW04.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW05.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW06_1.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW06_2.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW06_3.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW07_1.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW07_2.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW07_3.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW08_1.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW08_2.l1v"
+#include "12_HSUPA_R6/2_POWER/udps_R6_PW08_3.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM01_1.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM01_2.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM02_1.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM02_2.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM03_1.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM03_2.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM04.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM05_1.l1v"
+#include "12_HSUPA_R6/3_CM/udps_R6_CM05_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI01_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI02_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI03_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_HI04_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG01_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG02.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG03_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_RG04_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG01_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG02_2.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_1.l1v"
+#include "12_HSUPA_R6/4_E_AG_HI_RG/udps_R6_AG03_2.l1v"
+#include "12_HSUPA_R6/5_E_TFC/udps_R6_TF01_1.l1v"
+#include "12_HSUPA_R6/5_E_TFC/udps_R6_TF01_2.l1v"
+#include "12_HSUPA_R6/5_E_TFC/udps_R6_TF02_1.l1v"
+#include "12_HSUPA_R6/5_E_TFC/udps_R6_TF02_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CD01_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI01_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI02_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI03_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_HI04_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG01_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG02.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG03_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_RG04_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG01_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_1.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_AG02_2.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW02.l1v"
+#include "12_HSUPA_R6/6_CSD_REQ/udps_R6_CSD_PW03.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_1.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL01_2.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_1.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL02_2.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_ACK.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_1_FALSE_ACK.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_ACK.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL_HI01_2_FALSE_ACK.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_1.l1v"
+#include "12_HSUPA_R6/7_AGL8960/udps_R6_AGL_AG01_2.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME01_1.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME01_2.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME02_1.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME02_2.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME02_3.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME03_1.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME03_2.l1v"
+#include "12_HSUPA_R6/8_MEAS/udps_R6_ME03_3.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_01.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_02.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_03.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_04.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_05.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_06.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_07.l1v"
+#include "13_R7R8/DpsTest_R7_HSDPA_08.l1v"
+#include "13_R7R8/udps_R7_TF01_1.l1v"
+#include "13_R7R8/udps_R7_TF01_2.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_01.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_02.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_03.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_04.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_05.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_06.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_07.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_08.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_09.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_10.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_11.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_12.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_13.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_14.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_15.l1v"
+#include "13_R7R8/DpsTest_R7_CPC_16.l1v"
+#include "13_R7R8/DpsTest_R7_FDPCH_01.l1v"
+#include "13_R7R8/DpsTest_R7_FDPCH_02.l1v"
+#include "13_R7R8/DpsTest_R7_FDPCH_03.l1v"
+#include "13_R7R8/DpsTest_R7_FDPCH_04.l1v"
+#include "13_R7R8/DpsTest_R7_FDPCH_05.l1v"
+#include "13_R7R8/DpsTest_R7_EFACH_01.l1v"
+#include "13_R7R8/DpsTest_R7_EFACH_02.l1v"
+#include "13_R7R8/DpsTest_R7_EFACH_03.l1v"
+#include "13_R7R8/DpsTest_R7_EFACH_04.l1v"
+#include "13_R7R8/DpsTest_R7_EFACH_05.l1v"
+#include "13_R7R8/DpsTest_R7_EFACH_06.l1v"
+#include "13_R7R8/DpsTest_R7_EFACH_07.l1v"
+#include "13_R7R8/DpsTest_R8_CEDCH_01.l1v"
+#include "13_R7R8/DpsTest_R8_CEDCH_02.l1v"
+#include "13_R7R8/DpsTest_R8_CEDCH_03.l1v"
+#include "13_R7R8/DpsTest_R8_CEDCH_04.l1v"
+#include "13_R7R8/DpsTest_R8_CEDCH_05.l1v"
+#include "13_R7R8/DpsTest_R8_CEDCH_06.l1v"
+#include "13_R7R8/DpsTest_R8_CEDCH_07.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_01.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_02.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_03.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_04.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_05.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_06.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_07.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_08.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_09.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_10.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_11.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_12.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_13.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_14.l1v"
+#include "13_R7R8/DpsTest_R8_DCHSDPA_15.l1v"
+#include "13_R7R8/DpsTest_R8_FACHDRX_01.l1v"
+#include "13_R7R8/DpsTest_R8_FACHDRX_02.l1v"
+#include "13_R7R8/DpsTest_R8_FACHDRX_03.l1v"
+#include "13_R7R8/DpsTest_R8_LessMode_01.l1v"
+#include "13_R7R8/DpsTest_R8_LessMode_02.l1v"
+#include "13_R7R8/DpsTest_R8_LessMode_03.l1v"
+#include "13_R7R8/DpsTest_R8_LessMode_04.l1v"
+#include "13_R7R8/DpsTest_R8_LessMode_05.l1v"
+#include "13_R7R8/DpsTest_R8_M1.l1v"
+#include "13_R7R8/DpsTest_R8_M2.l1v"
+#include "13_R7R8/DpsTest_R8_M3.l1v"
+#include "13_R7R8/DpsTest_R8_M4.l1v"
+#include "13_R7R8/DpsTest_R8_M5.l1v"
+#include "13_R7R8/DpsTest_R8_M6.l1v"
+#include "13_R7R8/DpsTest_R8_M7.l1v"
+#include "13_R7R8/DpsTest_R8_M8.l1v"
+#include "13_R7R8/DpsTest_R8_M9.l1v"
+#include "13_R7R8/DpsTest_R8_M10.l1v"
+#include "13_R7R8/DpsTest_R8_MCPC1_01.l1v"
+#include "13_R7R8/DpsTest_R8_MCPC1_02.l1v"
+#include "13_R7R8/DpsTest_R8_MCPC2_01.l1v"
+#include "13_R7R8/DpsTest_R8_MCPC2_02.l1v"
+#include "13_R7R8/DpsTest_R8_CRS1.l1v"
+#include "13_R7R8/DpsTest_R8_CRS2.l1v"
+#include "15_R9R10/udps_R9_DB_DCHSDPA_01.l1v"
+#include "15_R9R10/udps_R9_TF_01.l1v"
+#include "15_R9R10/udps_R9_dchsupa_01.l1v"
+#include "15_R9R10/udps_R9_dchsupa_02.l1v"
+#include "15_R9R10/udps_R9_dchsupa_03.l1v"
+#include "15_R9R10/udps_R9_dchsupa_04.l1v"
+#include "15_R9R10/udps_R9_dchsupa_05.l1v"
+#include "15_R9R10/udps_R9_dchsupa_06.l1v"
+#include "15_R9R10/udps_R9_dchsupa_07.l1v"
+#include "15_R9R10/udps_R9_dchsupa_08.l1v"
+#include "15_R9R10/udps_R9_dchsupa_09.l1v"
+#include "15_R9R10/udps_R9_pw01.l1v"
+#include "15_R9R10/udps_R9_pw02.l1v"
+#include "15_R9R10/udps_R9_pw03.l1v"
+#include "15_R9R10/udps_R9_pw04.l1v"
+#include "15_R9R10/udps_R9_pw05.l1v"
+#include "15_R9R10/udps_R9_tgps_01.l1v"
+#include "15_R9R10/udps_R9_hi01.l1v"
+#include "15_R9R10/udps_R9_rg01.l1v"
+#include "15_R9R10/udps_R9_ag01.l1v"
+#include "15_R9R10/udps_R9_ag02.l1v"
+#include "15_R9R10/udps_R9_cpc_01.l1v"
+#include "15_R9R10/udps_R9_cpc_02.l1v"
+#include "15_R9R10/udps_R9_cpc_03.l1v"
+#include "15_R9R10/udps_R9_cpc_04.l1v"
+#include "15_R9R10/udps_R9_cpc_05.l1v"
+#include "15_R9R10/udps_R9_cpc_06.l1v"
+#include "15_R9R10/udps_R9_cpc_07.l1v"
+#include "15_R9R10/udps_R9_cpc_08.l1v"
+#include "15_R9R10/udps_R9_cpc_09.l1v"
+#include "15_R9R10/udps_R9_cpc_10.l1v"
+#include "15_R9R10/udps_R9_cpc_11.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_01.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_02.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_03.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_04.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_05.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_06.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_07.l1v"
+#include "15_R9R10/udps_R10_3chsdpa_08.l1v"
+#include "15_R9R10/udps_R10_lessmode_01.l1v"
+#include "15_R9R10/udps_R10_lessmode_02.l1v"
+#include "15_R9R10/udps_R10_lessmode_03.l1v"
+#include "15_R9R10/udps_R10_m01.l1v"
+#include "15_R9R10/udps_R10_m02.l1v"
+#include "15_R9R10/udps_R10_m03.l1v"
+#include "15_R9R10/udps_R10_m04.l1v"
+#endif //__UMTS_RAT__
+
+
+
+
+
+//For GSM/GPRS Project, please include your header here, e.g: #include "dps_D1_MT_call.l1v"
+//Please put your gv files to \dhl\database\l1validation_db
+
+#ifdef __GSM_RAT__
+
+#include "4_2G_FT/dps_FT1_PowerScanWithStoredList.l1v"
+#ifdef __PS_SERVICE__ // Jeff Lee 20100331
+#include "4_2G_FT/dps_FT2_CCCh_nonSig_FT.l1v"
+#endif /* __PS_SERVICE__ */
+#include "4_2G_FT/dps_FT3_CCCh_Comb_Page_Reorg.l1v"
+#include "5_2G_Scan/dps_S1_PowerScan.l1v"
+#include "5_2G_Scan/dps_S2_FBSBsearch.l1v"
+#include "5_2G_Scan/dps_S3_repeated_FBSB.l1v"
+#include "5_2G_Scan/dps_S4_BCCH_SI_receive.l1v"
+#include "6_2G_Idle/dps_I1_RepeatCampOn.l1v"
+#include "6_2G_Idle/dps_I2_EnterIdleState.l1v"
+#include "6_2G_Idle/dps_I3_SC_Test.l1v"
+#include "6_2G_Idle/dps_I4_CBCH_receive.l1v"
+#include "6_2G_Idle/dps_I5_LocUpdate.l1v"
+#include "7_2G_Dedicated/dps_D1_MT_call.l1v"
+#include "7_2G_Dedicated/dps_D2_MO_call.l1v"
+#ifdef __PS_SERVICE__ // Jeff Lee 20100331
+#include "8_2G_Pkt_Idle/dps_PI1_CCCh_Pkt_Idle1.l1v"
+#include "8_2G_Pkt_Idle/dps_PI2_CCCh_Pkt_Idle2.l1v"
+#include "8_2G_Pkt_Idle/dps_PI3_CCCh_Idle_Read_Pbcch.l1v"
+#include "8_2G_Pkt_Idle/dps_PI4_PCCCh_Pkt_Idle.l1v"
+#include "8_2G_Pkt_Idle/dps_PI5_PCCCh_Pkt_Idle_Pbcch_Update.l1v"
+#include "8_2G_Pkt_Idle/dps_PI6_PCCCh_Pkt_Idle_SC_Test.l1v"
+#include "8_2G_Pkt_Idle/dps_PI7_PCCCh_Pkt_Idle_SC_Test_Pbcch_Update.l1v"
+#include "8_2G_Pkt_Idle/dps_PI8_PCCCh_NCMeas.l1v"
+#include "8_2G_Pkt_Idle/dps_PI9_PCCCh_ExtMeas.l1v"
+#include "8_2G_Pkt_Idle/dps_PI10_CCCh_Pkt_Idle_SC_Test.l1v"
+#include "8_2G_Pkt_Idle/dps_PI11_CCChNCMeas.l1v"
+#include "8_2G_Pkt_Idle/dps_PI12_CCChExtMeas.l1v"
+#include "8_2G_Pkt_Idle/dps_PI13_CCCh_Gprs_Attach_One_Phase.l1v"
+#include "8_2G_Pkt_Idle/dps_PI14_CCCh_Gprs_Attach_Two_Phase.l1v"
+#include "8_2G_Pkt_Idle/dps_PI15_PCCCh_Gprs_Attach_One_Phase.l1v"
+#include "8_2G_Pkt_Idle/dps_PI16_PCCCh_Gprs_Attach_Two_Phase.l1v"
+#ifdef __EGPRS_MODE__ // Jeff Lee 20100331
+#include "8_2G_Pkt_Idle/dps_PI17_CCCh_Egprs_Attach_One_Phase.l1v"
+#include "8_2G_Pkt_Idle/dps_PI19_CCCh_Egprs_Attach_Two_Phase.l1v"
+#include "8_2G_Pkt_Idle/dps_PI20_PCCCh_Egprs_Attach_One_Phase.l1v"
+#include "8_2G_Pkt_Idle/dps_PI22_PCCCh_Egprs_Attach_Two_Phase.l1v"
+#endif /* __EGPRS_MODE__ */
+#include "9_2G_Pkt_Transfer/dps_PT8_Serving_PBCCh_Update_During_TBF.l1v"
+#include "9_2G_Pkt_Transfer/dps_PT9_CCCh_TBF_SC_Test.l1v"
+#include "9_2G_Pkt_Transfer/dps_PT10-1_CCCh_Nbr_PBCCh_Update_During_TBF.l1v"
+#include "9_2G_Pkt_Transfer/dps_PT10-2_PCCCh_Nbr_PBCCh_Update_During_TBF.l1v"
+#include "9_2G_Pkt_Transfer/dps_PT11_CCCh_ICMP.l1v"
+#include "9_2G_Pkt_Transfer/dps_PT12_CCCh_nonSignaling.l1v"
+#ifdef __EGPRS_MODE__ // Jeff Lee 20100331
+#include "9_2G_Pkt_Transfer/dps_PT16_CCCH_Egprs_TBF_NBCCH_Req.l1v"
+#include "9_2G_Pkt_Transfer/dps_PT17_CCCH_Egprs_TBF_NPBCCH_Req.l1v"
+#include "9_2G_Pkt_Transfer/dps_PT18_PCCCh_Egprs_TBF_NPBCCH_Req.l1v"
+#endif /* __EGPRS_MODE__ */
+#endif /* __PS_SERVICE__ */
+#include "10_2G_L1D/dps_l1d_lp1.l1v"
+#include "10_2G_L1D/dps_l1d_lp2.l1v"
+#include "10_2G_L1D/dps_l1d_lp3.l1v"
+#include "10_2G_L1D/dps_l1d_lp5_23.l1v"
+#include "10_2G_L1D/dps_l1d_lp5.l1v"
+#include "10_2G_L1D/dps_l1d_lp6.l1v"
+#include "10_2G_L1D/dps_l1d_lp7.l1v"
+#include "10_2G_L1D/dps_l1d_lp8.l1v"
+
+#include "dps_Test_Stop.l1v"
+#endif //__GSM_RAT__
+
+#include "dummy.l1v"
+
+#if defined(__LTE_RAT__) && defined(__L1EDPS_ENABLE__)
+#include "R9_LTE/Common_Params_Setup.l1v"
+#include "R9_LTE/01_NOCH/NOCH_RESET_01.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_01.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_02.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_03.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_04.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_05.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_06.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_07.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_08.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_09.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_10.l1v"
+#include "R9_LTE/01_NOCH/NOCH_CSR_11.l1v"
+#include "R9_LTE/01_NOCH/NOCH_SCS_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CSR_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CSR_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_BCCH_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_BCCH_01_5.l1v"
+#include "R9_LTE/02_IDLE/IDLE_BCCH_01_10.l1v"
+#include "R9_LTE/02_IDLE/IDLE_BCCH_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_BCCH_03.l1v"
+#include "R9_LTE/02_IDLE/IDLE_BCCH_04.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_03.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_TDD_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_TDD_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PWS_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PWS_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PWS_03.l1v"
+#include "R9_LTE/02_IDLE/IDLE_MBMS_MCCH_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_MBMS_MCCH_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_01_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_02_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_03.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_03_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_04.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_CELL_RESEL_04_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_OOS_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_OOS_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_OOS_03.l1v"
+#include "R9_LTE/02_IDLE/IDLE_OOS_04.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_01.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_5.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_02_10.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_03.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_04.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_05.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_06.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_07.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_RA_08.l1v"
+#include "R9_LTE/03_IDLE_SCH/IDLE_SCH_CONN_EST_01.l1v"
+#include "R9_LTE/04_SCH/SCH_TPC_01.l1v"
+#include "R9_LTE/04_SCH/SCH_TPC_02.l1v"
+#include "R9_LTE/04_SCH/SCH_TPC_03.l1v"
+#include "R9_LTE/04_SCH/SCH_TPC_04.l1v"
+#include "R9_LTE/04_SCH/SCH_TPC_05.l1v"
+#include "R9_LTE/04_SCH/SCH_TPC_06.l1v"
+#include "R9_LTE/04_SCH/SCH_TX_01.l1v"
+#include "R9_LTE/04_SCH/SCH_TX_02.l1v"
+#include "R9_LTE/04_SCH/SCH_TX_03.l1v"
+#include "R9_LTE/04_SCH/SCH_TX_04.l1v"
+#include "R9_LTE/04_SCH/SCH_TX_05.l1v"
+#include "R9_LTE/04_SCH/SCH_TX_06.l1v"
+#include "R9_LTE/04_SCH/SCH_PC_01.l1v"
+#include "R9_LTE/04_SCH/SCH_PCQI_01_01.l1v"
+#include "R9_LTE/04_SCH/SCH_PCQI_01_02.l1v"
+#include "R9_LTE/04_SCH/SCH_PCQI_01_03.l1v"
+#include "R9_LTE/04_SCH/SCH_PCQI_01_04.l1v"
+#include "R9_LTE/04_SCH/SCH_ACQI_01_01.l1v"
+#include "R9_LTE/04_SCH/SCH_ACQI_01_02.l1v"
+#include "R9_LTE/04_SCH/SCH_ACQI_01_03.l1v"
+#include "R9_LTE/04_SCH/SCH_ACQI_01_04.l1v"
+#include "R9_LTE/04_SCH/SCH_ACQI_01_05.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_01.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02_01.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02_02.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02_03.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02_04.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02_05.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02_06.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_02_07.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_03.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04_01.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04_02.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04_03.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04_04.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04_05.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04_06.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_04_07.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_05.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06_01.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06_02.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06_03.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06_04.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06_05.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06_06.l1v"
+#include "R9_LTE/04_SCH/SCH_HANDOVER_06_07.l1v"
+#include "R9_LTE/04_SCH/SCH_SYNC_HANDOVER_01.l1v"
+#include "R9_LTE/04_SCH/SCH_INTRAHO_01.l1v"
+#include "R9_LTE/04_SCH/SCH_CSG_01.l1v"
+#include "R9_LTE/04_SCH/SCH_CSG_02.l1v"
+#include "R9_LTE/04_SCH/SCH_SI_MODIFY_01.l1v"
+#include "R9_LTE/04_SCH/SCH_PWS_01.l1v"
+#include "R9_LTE/04_SCH/SCH_PWS_02.l1v"
+#include "R9_LTE/04_SCH/SCH_PWS_03.l1v"
+#include "R9_LTE/04_SCH/SCH_PAG_GAP_01.l1v"
+#include "R9_LTE/04_SCH/SCH_CONN_REEST_01.l1v"
+#include "R9_LTE/04_SCH/SCH_CONN_REEST_02.l1v"
+#include "R9_LTE/04_SCH/SCH_CONN_REEST_03.l1v"
+#include "R9_LTE/04_SCH/SCH_CONN_REEST_04.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_01.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_02.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_03.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_04.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_05.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_06.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_07.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_08.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_DRX_01.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_DRX_02.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_DRX_03.l1v"
+#include "R9_LTE/04_SCH/SCH_RLM_DRX_04.l1v"
+#include "R9_LTE/04_SCH/SCH_DRX_TRANS_01.l1v"
+#include "R9_LTE/04_SCH/SCH_REDIRECTION_01.l1v"
+#include "R9_LTE/04_SCH/SCH_REDIRECTION_02.l1v"
+#include "R9_LTE/04_SCH/SCH_REDIRECTION_03.l1v"
+#include "R9_LTE/04_SCH/SCH_REDIRECTION_04.l1v"
+#if 1
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_03.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_04.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_05.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_06.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_07.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_08.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_09.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_10.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_11.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PCH_01_12.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_01.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_02.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_03.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_04.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_05.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_06.l1v"
+#include "R9_LTE/02_IDLE/IDLE_PLMN_LIST_02_07.l1v"
+#include "R9_LTE/05_MEAS/BCCH_Meas_01.l1v"
+#include "R9_LTE/05_MEAS/BCCH_Meas_02.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_01_01.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_01_02.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_01_03.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_01_04.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_02_01.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_02_02.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_02_03.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_02_04.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_03_01.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_03_02.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_03_03.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_03_04.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_04_01.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_04_02.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_04_03.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_04_04.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_05_01.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_05_02.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_05_03.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_05_04.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_06_01.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_06_02.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_06_03.l1v"
+#include "R9_LTE/05_MEAS/IDLE_Meas_06_04.l1v"
+#include "R9_LTE/05_MEAS/IDLE_SCH_Meas_01.l1v"
+#include "R9_LTE/05_MEAS/IDLE_SCH_Meas_02.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_01_01.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_01_02.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_01_03.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_01_04.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_01.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_02.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_03.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_04.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_05.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_06.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_07.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_02_08.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_01.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_02.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_03.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_04.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_05.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_06.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_07.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_03_08.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_04_01.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_04_02.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_04_03.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_04_04.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_01.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_02.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_03.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_04.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_05.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_06.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_07.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_05_08.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_01.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_02.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_03.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_04.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_05.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_06.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_07.l1v"
+#include "R9_LTE/05_MEAS/SCH_Meas_06_08.l1v"
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#endif
+#include "R9_LTE/06_TRX/SCH_TRX_01_01.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_02.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_03.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_04.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_05.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_06.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_07.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_08.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_09.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_10.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_11.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_12.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_13.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_14.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_15.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_16.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_17.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_18.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_19.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_20.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_21.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_22.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_23.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_24.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_25.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_26.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_27.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_28.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_29.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_30.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_31.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_32.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_33.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_34.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_35.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_36.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_37.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_38.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_39.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_40.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_41.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_42.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_43.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_44.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_45.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_46.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_47.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_48.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_49.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_50.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_51.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_52.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_53.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_54.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_55.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_56.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_57.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_58.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_59.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_60.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_61.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_62.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_01_63.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_01.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_02.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_03.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_04.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_05.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_06.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_07.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_08.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_09.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_10.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_11.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_12.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_13.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_14.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_15.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_16.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_17.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_18.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_19.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_20.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_21.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_22.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_23.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_24.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_25.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_26.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_27.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_02_28.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_03.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_04.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_GAP_FDD_01.l1v"
+#include "R9_LTE/06_TRX/SCH_TRX_GAP_FDD_02.l1v"
+
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_01.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_02.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_03.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_04.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_05.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_06.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_07.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_08.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_09.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_10.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_11.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_12.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_13.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_14.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_15.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_16.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_17.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_18.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_19.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_20.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_21.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_22.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_23.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_24.l1v"
+#include "R11_LTE/04_SCH/SCH_HANDOVER_CA_25.l1v"
+#include "R11_LTE/04_SCH/SCH_TX_SIMULT_01.l1v"
+#include "R11_LTE/04_SCH/SCH_TX_SIMULT_02.l1v"
+#include "R11_LTE/04_SCH/SCH_TX_RATYPE1_01.l1v"
+#include "R11_LTE/04_SCH/SCH_TX_RATYPE1_02.l1v"
+#include "R11_LTE/04_SCH/SCH_RLM_eICIC_01.l1v"
+#include "R11_LTE/04_SCH/SCH_RLM_eICIC_02.l1v"
+#include "R11_LTE/04_SCH/SCH_MBMS_MCCH_01.l1v"
+#include "R11_LTE/04_SCH/SCH_MBMS_MCCH_02.l1v"
+
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_01.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_02.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_03.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_04.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_05.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_06.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_07.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_08.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_09.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_10.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_11.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_12.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_13.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_14.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_15.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_16.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_17.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_18.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_19.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_ca_20.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_eicic_01.l1v"
+#include "R11_LTE/05_MEAS/SCH_Meas_eicic_02.l1v"
+#include "R11_LTE/06_TRX/SCH_Trx_ca_01.l1v"
+#include "R11_LTE/06_TRX/SCH_Trx_ca_02.l1v"
+#include "R11_LTE/06_TRX/SCH_Trx_ca_03.l1v"
+#include "R11_LTE/06_TRX/SCH_Trx_ca_04.l1v"
+#include "R11_LTE/06_TRX/SCH_Trx_ca_05.l1v"
+#include "R11_LTE/06_TRX/SCH_Trx_ca_06.l1v"
+#include "R11_LTE/06_TRX/SCH_Trx_ca_07.l1v"
+#include "R12_LTE/3DL1UL/3DL1UL_basic_01.l1v"
+#include "R12_LTE/3DL1UL/3DL1UL_basic_01_1.l1v"
+#include "R12_LTE/3DL1UL/3DL1UL_fdd_basic_3.l1v"
+#include "R12_LTE/3DL1UL/3DL1UL_fdd_basic_4.l1v"
+#include "R12_LTE/3DL1UL/3DL1UL_tdd_basic_3.l1v"
+#include "R12_LTE/3DL1UL/3DL1UL_tdd_basic_4.l1v"
+#include "R12_LTE/2DL1UL/2DL1UL_basic_01.l1v"
+#include "R12_LTE/2DL1UL/2DL1UL_basic_02.l1v"
+#include "R12_LTE/4DL1UL/4DL1UL_fdd_basic_23.l1v"
+#include "R12_LTE/4DL1UL/4DL1UL_fdd_basic_24.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_05.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_06.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_07.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_08.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_09.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_10.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_11.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_12.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_fdd_basic_13.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_tdd_basic_05.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_tdd_basic_06.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_tdd_basic_08.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_tdd_basic_09.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_tdd_basic_10.l1v"
+#include "R12_LTE/2DL2UL/2DL2UL_tdd_basic_11.l1v"
+#include "R12_LTE/3DL2UL/3DL2UL_fdd_basic_14.l1v"
+#include "R12_LTE/3DL2UL/3DL2UL_fdd_basic_15.l1v"
+#include "R12_LTE/3DL2UL/3DL2UL_tdd_fdd_basic_14.l1v"
+
+
+#endif
+#endif
+