[Feature]Upload Modem source code
Change-Id: Id4294f30faced84d3e6fd6d5e61e1111bf287a37
diff --git a/mcu/service/hif/hmu/include/hmu_debug.h b/mcu/service/hif/hmu/include/hmu_debug.h
new file mode 100644
index 0000000..ab4688c
--- /dev/null
+++ b/mcu/service/hif/hmu/include/hmu_debug.h
@@ -0,0 +1,138 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * hmu_debug.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * Defines HMU debug level configuration and macros
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 10 25 2018 cs.huang
+ * [MOLY00359189] check-in utmd files
+ * remove hmu_trace.h
+ *
+ * 03 29 2016 ap.wang
+ * [MOLY00171682] [HMU] Change compile option for DHL code gen
+ * .
+ *
+ * 11 13 2014 cs.huang
+ * [MOLY00065478] [UMOLY][SM] Fix HIF USB build error for BASIC_HIF
+ * Merging
+ *
+ * //UMOLY/DEV/MT6291_DEV/mcu/pcore/service/hif/hmu/include/hmu_debug.h
+ *
+ * to //UMOLY/TRUNK/UMOLY/mcu/pcore/service/hif/hmu/include/hmu_debug.h
+ *
+ * 05 13 2014 ap.wang
+ * [MOLY00065478] [UMOLY][SM] Fix HIF USB build error for BASIC_HIF
+ * HMU add compile option for DHL API
+ *
+ * 08 28 2013 ap.wang
+ * [MOLY00035451] [HMU] Add L2 trace log
+ * [HMU] Add L2 trace for event trigger
+ *
+ ****************************************************************************/
+#ifndef __HMU_DEBUG_H__
+#define __HMU_DEBUG_H__
+
+#define HIF_DATA_TRACE_ENABLED 1
+
+#if defined(__MTK_TARGET__)
+ #define HIF_CONSOLE_TRACE_ENABLED 0 /* TODO: set it to 0 once DHL log is done on target. */
+#else
+ #define HIF_CONSOLE_TRACE_ENABLED 0
+#endif
+
+#include "hif_trace.h"
+#if !defined(__MAUI_BASIC__)
+#include "TrcMod.h"
+#endif /* !def __MAUI_BASIC__ */
+
+#define HMU_DBG_TH HMU_TRACE
+typedef enum _HMU_dbg_level {
+ HMU_TRACE = 0,
+ HMU_INFO,
+ HMU_WARN,
+ HMU_ERR,
+ HMU_OFF = 0xFF,
+}hmu_dbg_level;
+
+
+#define HMU_MOD 0x00000001
+#define HMU_DBG_MSK (HMU_MOD)
+
+
+#if 0
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+/* under construction !*/
+#else
+#define __hmu_err_printf hif_trace_error
+#define __hmu_info_printf hif_trace_info
+#endif
+
+#define hmu_data_trace hif_data_trace
+
+#define hmu_trace(level, mod,...)\
+do{\
+ if (level >= HMU_DBG_TH) {\
+ if (mod & HMU_DBG_MSK) {\
+ if (level == HMU_ERR) {\
+ __hmu_err_printf(__VA_ARGS__);\
+ }else{\
+ __hmu_info_printf(__VA_ARGS__);\
+ }\
+ }\
+ }\
+}while(0)\
+
+#endif /* __HMU_DEBUG_H__ */
+
diff --git a/mcu/service/hif/hmu/src/hmu.c b/mcu/service/hif/hmu/src/hmu.c
new file mode 100644
index 0000000..f538c30
--- /dev/null
+++ b/mcu/service/hif/hmu/src/hmu.c
@@ -0,0 +1,808 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * hmu.c
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * This file implement the function of Host Interface Management Unit.
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 11 10 2020 viney.kaushik
+ * [MOLY00539149] [M70][DataCard][HOST_DRIVER_ASYNC_HANDSHAKE][RDIT] MD Crash ffender: MD Offender:HMU
+ *
+ * update timeout to 31s as max sleep time is 29.x(s..
+ *
+ * 12 09 2019 viney.kaushik
+ * [MOLY00399255] HMU log modification
+ *
+ * remove hmu_tick++ from log to ensure always execution.
+ *
+ * 04 16 2019 viney.kaushik
+ * [MOLY00399255] HMU log modification
+ * add log to print every 100ms.
+ *
+ * 08 24 2017 cs.huang
+ * [MOLY00273609] [Zion][MT6739][RDIT][PHONE][MD_Pre-Sanity] sim1 3G web browsing fail
+ * [HMU] Add tg sync
+ *
+ * 08 24 2017 cs.huang
+ * [MOLY00273609] [Zion][MT6739][RDIT][PHONE][MD_Pre-Sanity] sim1 3G web browsing fail
+ * [HMU] Add tg sync
+ *
+ * 08 07 2017 cs.huang
+ * [MOLY00268551] Task batch scheduling for LTE Low power
+ * HMU for TG change
+ *
+ * 06 23 2017 cs.huang
+ * [MOLY00258471] [LHIFCore] Enable LHIF HW log interrupt to reduce polling times
+ * merge HMU part
+ *
+ * 05 09 2017 cs.huang
+ * [MOLY00248075] [HMU] remove call IPCORE reload API
+ * [HMU] remove call IPCORE reload API
+ *
+ * 11 23 2016 ap.wang
+ * [MOLY00210820] [HMU] Add exception step
+ * .
+ *
+ * 11 23 2016 ap.wang
+ * [MOLY00210824] [HMU] Remove PCCIF IRQ VPE5 HRT log
+ * .
+ *
+ * 09 22 2016 ap.wang
+ * [MOLY00204207] [HMU] Fix multi event wait issue
+ * .
+ *
+ * 08 01 2016 ap.wang
+ * [MOLY00194819] [Elbrus][4G FDD][ATE][CMW500][DSP-BRP] Assert fail: ccci_error_code.c 101 0x102 0xcb6a02 0x1 - EL2
+ * Add spinlock for DSP tick switch timing issue
+ *
+ * 07 28 2016 i-wei.tsai
+ * [MOLY00194135] [HMU] Add more debug log for GPT
+ *
+ * .add debug log for GPT timer
+ *
+ * 07 12 2016 ap.wang
+ * [MOLY00190479] [MSH][MT6292][ELBRUS][EVB][Sanity][LWCTG][Lt+C][SIM1 CMCC][SIM2 CT]Externel (EE),0,0,99,/data/core/,1,modem,md1:(MCU_core0,vpe0,tc0(VPE0)) [ASSERT] file:common/service/hif/ccci/src/ccci_error_code.c
+ * Fix hmu fisrt time wait issue
+ *
+ * 05 30 2016 ap.wang
+ * [MOLY00182249] [HMU] Fix build warning
+ * .
+ *
+ * 05 25 2016 ap.wang
+ * [MOLY00181629] [HMU] Fix timer detect
+ * .
+ *
+ * 05 25 2016 ap.wang
+ * [MOLY00180578] [HMU] HMU spinlock for Multi core
+ * .
+ *
+ * 05 19 2016 ap.wang
+ * [MOLY00180578] [HMU] HMU spinlock for Multi core
+ * .
+ *
+ * 01 07 2016 ap.wang
+ * [MOLY00156091] [HMU] Fix USB multi event unsync
+ * .
+ *
+ * 11 17 2015 ap.wang
+ * [MOLY00148746] [HMU] Check timer feature
+ *
+ * Disable Timer check from UMOLY Trunk for 92 FPGA
+ *
+ * 11 10 2015 ap.wang
+ * [MOLY00148746] [HMU] Check timer feature
+ * .
+ *
+ * 11 10 2015 ap.wang
+ * [MOLY00148746] [HMU] Check timer feature
+ *
+ * 01 07 2015 ap.wang
+ * [MOLY00091565] [HMU] Modify assert to fatal for CR dispatch
+ * .
+ *
+ * 12 31 2014 ap.wang
+ * [MOLY00089916] [HMU] HIF ON/OFF for power saving
+ * .
+ *
+ * 11 17 2014 ap.wang
+ * [MOLY00084709] [HMU] Modify for GPT enable on MODIS
+ * .
+ *
+ * 08 06 2014 ap.wang
+ * [MOLY00074692] [HMU] Modify exception init function table
+ * .
+ *
+ * 07 04 2014 ap.wang
+ * [MOLY00071481] [HMU] Add HIF boot init to Application init
+ * .
+ *
+ * 07 01 2014 ap.wang
+ * [MOLY00071092] [HMU] Add tick count
+ * .
+ *
+ * 06 10 2014 ap.wang
+ * [MOLY00067367] [HMU] Modify GPT timer to MS callback for R8 on MOLY
+ * .
+ *
+ * 04 28 2014 ap.wang
+ * [MOLY00063912] [HMU] HMU temp solution for K2 MD2
+ * HMU temp solution for K2 MD2
+ *
+ * 04 17 2014 box.wu
+ * [MOLY00063010] [MT6595] HIF polling timeout check
+ * cldma timeout check
+ *
+ * 03 21 2014 ap.wang
+ * [MOLY00060351] [ETHERCORE] add ethercore enhancement feature
+ * Add ethercore DL retry
+ *
+ * 02 26 2014 ap.wang
+ * [MOLY00057680] [L2][HMU][DHL] L2 trace and L2 timestamp support
+ * Add L2trc_fill_4G_time to HMU GPT for L2 trace
+ *
+ * 11 07 2013 ap.wang
+ * [MOLY00043564] [klocwork_95][LTE] in hmu.c, line 345
+ * Fix Klocwork warning: succeeded might be used uninitialized in this function.
+ *
+ * 08 28 2013 ap.wang
+ * [MOLY00035451] [HMU] Add L2 trace log
+ * [HMU] Add L2 trace for event trigger
+ *
+ * 08 27 2013 ap.wang
+ * [MOLY00035456] [HMU] Modify for multi hif exception init
+ * [HMU] Modify for multi dev type exception init
+ *
+ * 07 31 2013 ap.wang
+ * [MOLY00031843] [HMU] Add trace log
+ * .
+ *
+ * 07 31 2013 ap.wang
+ * [MOLY00031843] [HMU] Add trace log
+ * [HMU] Add trace log
+ *
+ * 03 11 2013 ap.wang
+ * [MOLY00011696] [HMU] HMU code refine and compile warning fix
+ * [HMU] Add copyright header and change ipc_reload condition
+ ****************************************************************************/
+
+/*******************************************************************************
+ * Include header files
+ *******************************************************************************/
+
+#include "kal_general_types.h"
+#include "kal_public_api.h"
+#include "kal_public_defs.h"
+
+#include "nvram_interface.h"
+#include "nvram_data_items.h"
+#include "hmu_conf_data.h"
+#include "hmu.h"
+#include "hmu_debug.h"
+#include "swla_public.h"
+
+#if defined(__IPCORE_SUPPORT__) && !defined(IPCORE_NOT_PRESENT)
+#include "ipc_api.h"
+#endif
+
+#include "dcl_gpt.h"
+#include "kal_internal_api.h" // for fatal error code
+#include "us_timer.h"
+#include "ccci_if.h"
+
+#ifdef __HMU_TG_TIMER_SUPPORT__
+#include "tg_hisr.h"
+#endif
+
+#if defined(__LHIFCORE_SUPPORT__)
+#include "lhif_if.h"
+#endif
+
+#if !defined(_MTK_TARGET_) && defined(_MSC_VER) && (_MSC_VER >= 1500)
+#pragma warning( disable : 4100 )
+#endif
+
+#define HMU_LOCK(_s) _s = SaveAndSetIRQMask()
+#define HMU_UNLOCK(_s) RestoreIRQMask(_s)
+
+#if !defined(__HMU_TG_TIMER_SUPPORT__)
+static DCL_HANDLE hmu_gpt_handle = 0 ;
+#endif /* !__HMU_TG_TIMER_SUPPORT__ */
+
+static kal_spinlockid hmu_spinlock = NULL;
+
+static kal_bool hmu_gpt_enable = KAL_TRUE ;
+
+static kal_uint32 hmu_hifeg_enable = 0 ; // hifeg enable bit mask
+static kal_uint32 hmu_hifeg_enable_mask = 0 ; // use to indicate which hifeg need to enable at first time
+
+static kal_bool hmu_dsp_timer_exist = KAL_FALSE ;
+
+
+static hmu_internal_state_struct hmu_internal_state = {KAL_FALSE, KAL_FALSE, NULL};
+extern hmu_tick_interval hmu_tick_interval_table[];
+
+extern hmu_uldrv_except_initfunc uldrv_except_init_func_table[];
+extern unsigned int uldrv_except_init_func_table_num;
+
+#if defined(__MTK_TARGET__)
+#if defined(__CLDMACORE_SUPPORT__) || defined(__CCIFCORE_SUPPORT__)
+kal_uint32 hmu_trigger_hif_pending_count = 0;
+#endif
+#endif
+
+kal_uint32 hmu_tick = 0;
+
+// Timer source correctness detection
+#define HMU_TIMER_SOURCE_TIMEOUT_ERROR (31 * 1000 * 1000) // us
+#define HMU_TIMER_SOURCE_TIMEOUT_WARNING (5 * 1000) // us
+
+static kal_bool hmu_detect_timer_enable = KAL_TRUE;
+static kal_uint32 hmu_detect_start_time = 0;
+static kal_uint32 duration = 0;
+/*****************************************************************************
+ * @brief hmu_get_current_time is to get current time
+ * @param NA
+ * @return kal_uint32 current time
+ * Unit: micro second
+ *
+ *****************************************************************************/
+kal_uint32 hmu_get_current_time()
+{
+#if defined(__MTK_TARGET__)
+ return ust_get_current_time();
+#else // MODIS
+ return 0;
+#endif
+}
+
+/*****************************************************************************
+ * @brief hmu_get_duration is to calculate the duration between start time and end time
+ * @param start: start time
+ * end: end time
+ * @return kal_uint32 time duration
+ * Unit: micro second
+ *
+ *****************************************************************************/
+kal_uint32 hmu_get_duration(kal_uint32 start, kal_uint32 end)
+{
+#if defined(__MTK_TARGET__)
+ return ust_us_duration(start, end);
+#else // MODIS
+ return 0;
+#endif
+}
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_hifeg_init
+ * DESCRIPTION
+ *
+ * PARAMETERS
+ *
+ * RETURNS
+ *
+ *****************************************************************************/
+kal_int32 hmu_hifeg_init(){
+ if (hmu_internal_state.hmuHifEgId == NULL){
+ hmu_internal_state.hmuHifEgId = kal_create_event_group(HIF_DRV_EG_NAME) ;
+ }
+ return HMU_OK ;
+}
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_hifeg_set
+ * DESCRIPTION
+ *
+ * PARAMETERS
+ *
+ * RETURNS
+ *
+ *****************************************************************************/
+#ifdef __CCMNI_IT__
+void ccmni_it_reload_rgpds();
+#endif
+
+#if defined(__ETHERCORE_SUPPORT__) && !defined(ETHERCORE_NOT_PRESENT)
+void ethc_check_dl_handle_packet_retry(void);
+#endif
+
+kal_status hmu_hifeg_set(kal_uint32 events) {
+ kal_int32 index = 0;
+ hmu_tick_interval *hif;
+
+ /*
+ * Check if each uplink IP stream GPD is required to be relaoded or not.
+ * Note that, the uplink GPD realoding will be done in IPCORE context not here.
+ */
+ if (HIF_DRV_EG_HIF_TICK_EVENT_GROUP & events) {
+#if defined(__IPCORE_SUPPORT__) && !defined(IPCORE_NOT_PRESENT) && defined(__CCCICCMNI_SUPPORT__)
+ ipc_check_ul_reload_retry();
+#endif
+#if defined(__ETHERCORE_SUPPORT__) && !defined(ETHERCORE_NOT_PRESENT)
+ ethc_check_dl_handle_packet_retry();
+#endif
+#ifdef __CCMNI_IT__
+ /* Use for CCMNI_IT rgpds reload, move from sdiocore to here*/
+ ccmni_it_reload_rgpds();
+#endif
+ }
+
+ /* Clear events if interval is not reached */
+ for(index = 0; hmu_tick_interval_table[index].hif_event != 0; index++){
+ hif = &(hmu_tick_interval_table[index]);
+ if (hif->hif_current_tick > 0){
+ events &= ~(hif->hif_event);
+ hif->hif_current_tick--;
+ }
+ else{
+ hif->hif_current_tick = hif->hif_event_tick_count;
+ }
+ }
+
+ if (HIF_DRV_EG_HIF_TICK_EVENT_GROUP & events) {
+#if defined(__LHIFCORE_SUPPORT__)
+ lhifcore_task_hmu_wake_up(events);
+#endif
+ }
+
+#if defined(__MTK_TARGET__)
+#if defined(__CLDMACORE_SUPPORT__) || defined(__CCIFCORE_SUPPORT__)
+#define HIF_PENDING_LIMIT (4000)
+ /* add hif pending count and this count should be reset when hif polling task wakes up */
+ if (events & HIF_DRV_EG_HIF_TICK_EVENT_CLDMA){
+ if (hmu_trigger_hif_pending_count++ > HIF_PENDING_LIMIT) {
+ /* assert if over pending limit */
+ kal_fatal_error_handler(KAL_ERROR_HMU_DETECT_LONG_TIME_NO_RESPONSE,0);
+ }
+ }
+ // Check timer
+ hmu_check_timer(events);
+#endif
+#endif
+
+ hmu_data_trace(MD_TRC_HMU_DATA_EVENT_TRIGGER, kal_get_active_module_id(), hmu_gpt_enable, events, hmu_tick, duration);
+ hmu_tick++;
+
+ if(hmu_tick%100 == 0) {
+ hmu_data_trace(MD_TRC_HMU_ALIVE_EVENT, hmu_gpt_enable, events, hmu_tick);
+ }
+
+ return kal_set_eg_events(hmu_internal_state.hmuHifEgId, events, KAL_OR) ;
+}
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_hifeg_wait
+ * DESCRIPTION
+ *
+ * PARAMETERS
+ *
+ * RETURNS
+ *
+ *****************************************************************************/
+kal_uint32 hmu_hifeg_wait(kal_uint32 events) {
+ kal_uint32 rt_event = 0;
+#if defined(__HMU_TG_TIMER_SUPPORT__)
+ kal_bool tg_start = KAL_FALSE;
+#endif
+
+ kal_take_spinlock(hmu_spinlock, KAL_INFINITE_WAIT);
+ if(((hmu_hifeg_enable_mask | events) ^ hmu_hifeg_enable_mask) != 0){ //HIF first time wait, never start/stop hmu_hifeg
+ hmu_hifeg_enable |= ((hmu_hifeg_enable_mask | events) ^ hmu_hifeg_enable_mask);
+ hmu_hifeg_enable_mask |= events;
+ if (hmu_dsp_timer_exist == KAL_FALSE){ //should have tick source for HIF first time wait
+ hmu_start_hif_sys_timer();
+#if defined(__HMU_TG_TIMER_SUPPORT__)
+ tg_start = KAL_TRUE;
+#endif
+ }
+ }
+ kal_give_spinlock(hmu_spinlock);
+#if defined(__HMU_TG_TIMER_SUPPORT__)
+ if(tg_start == KAL_TRUE)
+ tg_hmu_callback_control_sync();
+#endif
+ kal_retrieve_eg_events(hmu_internal_state.hmuHifEgId, events, KAL_OR_CONSUME, &rt_event, KAL_SUSPEND);
+ return rt_event;
+}
+
+#if !defined(__HMU_TG_TIMER_SUPPORT__)
+static void hmu_gpt_callback(void *data) // HISR level !!
+{
+ SGPT_CTRL_START_T re_schedule;
+
+ if (hmu_gpt_enable == KAL_TRUE){
+ re_schedule.u2Tick=HMU_GPTIMER_PRIODIC_INTERVAL ;
+ re_schedule.pfCallback=hmu_gpt_callback;
+ re_schedule.vPara=NULL;
+ l2trc_fill_4G_time();
+ hmu_hifeg_set(hmu_hifeg_enable & HIF_DRV_EG_HIF_TICK_EVENT_GROUP);
+ DclSGPT_Control(hmu_gpt_handle, SGPT_CMD_START, (DCL_CTRL_DATA_T*)&re_schedule) ;
+ }
+ else
+ {
+ hmu_data_trace(MD_TRC_HMU_GPT_CB_NO_NEXT);
+ }
+}
+#endif /* !__HMU_TG_TIMER_SUPPORT__ */
+
+void hmu_stop_hif_sys_timer(){
+ //kal_take_enh_mutex(hmu_gpt_mutex);
+
+#ifdef __HMU_TG_TIMER_SUPPORT__
+ tg_hmu_callback_control(KAL_FALSE);
+#else
+ hmu_gpt_enable = KAL_FALSE ;
+
+ DclSGPT_Control(hmu_gpt_handle, SGPT_CMD_STOP, (DCL_CTRL_DATA_T*)NULL) ;
+#endif
+ //kal_give_enh_mutex(hmu_gpt_mutex);
+}
+
+void hmu_start_hif_sys_timer(){
+
+#ifdef __HMU_TG_TIMER_SUPPORT__
+ tg_hmu_callback_control(KAL_TRUE);
+#else
+ SGPT_CTRL_START_T start;
+
+ //kal_take_enh_mutex(hmu_gpt_mutex);
+
+ hmu_gpt_enable = KAL_TRUE ;
+
+ start.u2Tick=HMU_GPTIMER_PRIODIC_INTERVAL;
+ start.pfCallback=hmu_gpt_callback;
+ start.vPara=NULL;
+ DclSGPT_Control(hmu_gpt_handle, SGPT_CMD_START, (DCL_CTRL_DATA_T*)&start) ;
+ //kal_give_enh_mutex(hmu_gpt_mutex);
+#endif
+}
+
+void hmu_dsp_timer_kick(){
+ hmu_hifeg_set(hmu_hifeg_enable & HIF_DRV_EG_HIF_TICK_EVENT_GROUP);
+ kal_take_spinlock(hmu_spinlock, KAL_INFINITE_WAIT);
+ if (hmu_dsp_timer_exist == KAL_TRUE){
+ hmu_stop_hif_sys_timer();
+ kal_give_spinlock(hmu_spinlock);
+ hmu_data_trace(MD_TRC_HMU_STOP_GPT, kal_get_active_module_id());
+ }else{
+ kal_give_spinlock(hmu_spinlock);
+ }
+}
+
+static void hmu_init_hif_timer()
+{
+ hmu_dsp_timer_exist = KAL_FALSE ;
+ hmu_gpt_enable = KAL_TRUE ;
+#ifdef __HMU_TG_TIMER_SUPPORT__
+ // Default timer is TRUE
+ // tg_hmu_callback_control(KAL_TRUE);
+#else
+ {
+ SGPT_CTRL_START_T start;
+
+ start.u2Tick=HMU_GPTIMER_PRIODIC_INTERVAL;
+ start.pfCallback=hmu_gpt_callback;
+ start.vPara=NULL;
+ DclSGPT_Control(hmu_gpt_handle, SGPT_CMD_START, (DCL_CTRL_DATA_T*)&start) ;
+ }
+#endif
+}
+
+void hmu_switch_hif_timer(hmuTimerSource_enum source)
+{
+#if !defined(__HMU_TG_TIMER_SUPPORT__)
+ SGPT_CTRL_START_T start;
+
+ start.u2Tick=HMU_GPTIMER_PRIODIC_INTERVAL;
+ start.pfCallback=hmu_gpt_callback;
+ start.vPara=NULL;
+
+ kal_take_spinlock(hmu_spinlock, KAL_INFINITE_WAIT);
+ if (source == HMU_TIMER_SOURCE_DSP){
+ SLA_CustomLogging("DSP", SA_label);
+ hmu_dsp_timer_exist = KAL_TRUE ;
+ kal_give_spinlock(hmu_spinlock);
+ hmu_data_trace(MD_TRC_HMU_CHANGE_TIMER_DSP);
+ }else if(source == HMU_TIMER_SOURCE_SYS){
+ SLA_CustomLogging("GPT", SA_label);
+ hmu_dsp_timer_exist = KAL_FALSE ;
+ if( (hmu_hifeg_enable & HIF_DRV_EG_HIF_TICK_EVENT_GROUP) != 0){
+ hmu_gpt_enable = KAL_TRUE ;
+ DclSGPT_Control(hmu_gpt_handle, SGPT_CMD_START, (DCL_CTRL_DATA_T*)&start) ;
+ }
+ kal_give_spinlock(hmu_spinlock);
+ hmu_data_trace(MD_TRC_HMU_CHANGE_TIMER_GPT);
+ }
+#endif /* !__HMU_TG_TIMER_SUPPORT__ */
+}
+
+kal_int32 hmu_boot_init()
+{
+ if (hmu_internal_state.hmuBootInit == KAL_TRUE) {
+ return HMU_ALREADY_INIT;
+ }
+
+ hmu_hifeg_init() ;
+
+#if !defined(__HMU_TG_TIMER_SUPPORT__)
+ if (hmu_gpt_handle == 0) {
+ hmu_gpt_handle = DclSGPT_Open(DCL_GPT_CB_MS, FLAGS_NONE);
+ if (hmu_gpt_handle == DCL_HANDLE_INVALID || hmu_gpt_handle == DCL_HANDLE_OCCUPIED){
+ ASSERT(0);
+ }
+ }
+#endif /* !__HMU_TG_TIMER_SUPPORT__ */
+
+ if (hmu_spinlock == NULL) {
+ hmu_spinlock = kal_create_spinlock ("hmu_spinlock");
+ if (hmu_spinlock == NULL) {
+ ASSERT(0);
+ }
+ }
+
+ hmu_init_hif_timer() ;
+
+ hmu_internal_state.hmuBootInit = KAL_TRUE ;
+ return 0 ;
+}
+
+
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_except_init
+ *
+ * DESCRIPTION
+ * Trigger an upper layer device module to hook with TTYCORE and then proceed
+ * exception flow if an exception happens before hmu_init() completes.
+ *
+ * PARAMETERS
+ * N/A
+ *
+ * RETURNS
+ * KAL_TRUE if caller is allowed to proceed the exception flow;
+ * KAL_FALSE if there's no proper callback function registered by
+ * upper layer device modules or something wrong while executing
+ * the callback function.
+ *****************************************************************************/
+#define hmu_except_step_logging_pattern 0x484D5500
+kal_uint32 except_step = hmu_except_step_logging_pattern;
+#if !defined(__HIF_CCCI_SUPPORT__)
+ #define ccci_excep_dbg_logging_InHS2(...)
+#endif
+kal_bool hmu_except_init(void)
+{
+ kal_bool succeeded = KAL_TRUE;
+ kal_bool ret = 0;
+ kal_uint32 idx;
+
+ for (idx = 0; idx < uldrv_except_init_func_table_num; idx++) {
+ except_step = hmu_except_step_logging_pattern | (idx & 0xFF);
+ ccci_excep_dbg_logging_InHS2(CCCI_EXCEP_DBG_STEP, &except_step);
+ if (uldrv_except_init_func_table[idx].except_init_func != NULL){
+ ret = uldrv_except_init_func_table[idx].except_init_func(uldrv_except_init_func_table[idx].port_id, 0, NULL);
+ }
+ if (ret != 0){
+ succeeded = KAL_FALSE;
+ }
+ }
+ except_step = hmu_except_step_logging_pattern | 0xFF;
+ ccci_excep_dbg_logging_InHS2(CCCI_EXCEP_DBG_STEP, &except_step);
+ return succeeded;
+}
+
+/*****************************************************************************
+ * FUNCTION
+ * hif_boot_init
+ * DESCRIPTION
+ * HIF boot init function to initial HIF module without task.
+ * PARAMETERS
+ *
+ * RETURNS
+ * success or fail
+ *****************************************************************************/
+kal_int32 hif_boot_init()
+{
+ hmu_boot_init();
+ return 0 ;
+}
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_hifeg_stop
+ * DESCRIPTION
+ *
+ * PARAMETERS
+ *
+ * RETURNS
+ *
+ *****************************************************************************/
+kal_uint32 hmu_hifeg_stop(kal_uint32 events) {
+#if defined(__HMU_TG_TIMER_SUPPORT__)
+ kal_bool tg_stop = KAL_FALSE;
+#endif
+ kal_take_spinlock(hmu_spinlock, KAL_INFINITE_WAIT);
+ hmu_hifeg_enable &= ~events;
+ hmu_hifeg_enable_mask |= events;
+ if( (hmu_hifeg_enable & HIF_DRV_EG_HIF_TICK_EVENT_GROUP) == 0){
+ hmu_stop_hif_sys_timer();
+ hmu_check_timer_stop();
+#if defined(__HMU_TG_TIMER_SUPPORT__)
+ tg_stop = KAL_TRUE;
+#endif
+ }
+ kal_give_spinlock(hmu_spinlock);
+#if defined(__HMU_TG_TIMER_SUPPORT__)
+ if(tg_stop == KAL_TRUE)
+ tg_hmu_callback_control_sync();
+#endif /* __HMU_TG_TIMER_SUPPORT__ */
+ hmu_data_trace(MD_TRC_HMU_HIFEG_STOP, kal_get_active_module_id(), events, hmu_hifeg_enable);
+ return hmu_hifeg_enable;
+}
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_hifeg_stop
+ * DESCRIPTION
+ *
+ * PARAMETERS
+ *
+ * RETURNS
+ *
+ *****************************************************************************/
+kal_uint32 hmu_hifeg_start(kal_uint32 events) {
+#if defined(__HMU_TG_TIMER_SUPPORT__)
+ kal_bool tg_start = KAL_FALSE;
+#endif
+ kal_take_spinlock(hmu_spinlock, KAL_INFINITE_WAIT);
+ hmu_check_timer_start();
+ hmu_hifeg_enable |= events;
+ hmu_hifeg_enable_mask |= events;
+ if (hmu_dsp_timer_exist == KAL_FALSE){
+ hmu_start_hif_sys_timer();
+#if defined(__HMU_TG_TIMER_SUPPORT__)
+ tg_start = KAL_TRUE;
+#endif
+ }
+ kal_give_spinlock(hmu_spinlock);
+#if defined(__HMU_TG_TIMER_SUPPORT__)
+ if(tg_start == KAL_TRUE)
+ tg_hmu_callback_control_sync();
+#endif /* __HMU_TG_TIMER_SUPPORT__ */
+ hmu_data_trace(MD_TRC_HMU_HIFEG_START, kal_get_active_module_id(), events, hmu_hifeg_enable);
+ return hmu_hifeg_enable;
+}
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_check_timer_start / hmu_check_timer_stop
+ * DESCRIPTION
+ * Start / Stop HMU checking timer
+ * PARAMETERS
+ *
+ * RETURNS
+ *****************************************************************************/
+void hmu_check_timer_start()
+{
+ hmu_detect_timer_enable = KAL_TRUE;
+ /*
+ * Case 1. when stop timer then start, need to get current time again
+ * Case 2. when dsp change to gpt, dsp will call set_eg again, so will get checking timer
+ * So, need to check hmu_hifeg_enable then get current time
+ */
+ if(hmu_detect_start_time == 0 || (hmu_hifeg_enable & HIF_DRV_EG_HIF_TICK_EVENT_GROUP) == 0)
+ hmu_detect_start_time = hmu_get_current_time();
+}
+void hmu_check_timer_stop()
+{
+ hmu_detect_timer_enable = KAL_FALSE;
+ hmu_detect_start_time = 0;
+}
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_check_timer
+ * DESCRIPTION
+ * Check HMU timer source whether is normal
+ * PARAMETERS
+ *
+ * RETURNS
+ * HMU_CHECK_TIMER_ENUM : return checking result
+ *****************************************************************************/
+kal_uint32 hmu_check_timer(kal_uint32 events)
+{
+ if(hmu_detect_start_time != 0)
+ duration = hmu_get_duration(hmu_detect_start_time, hmu_get_current_time());
+ hmu_detect_start_time = hmu_get_current_time();
+ if(duration > HMU_TIMER_SOURCE_TIMEOUT_ERROR && hmu_detect_timer_enable){ // error log
+ //hmu_data_trace(MD_TRC_HMU_DATA_EVENT_TRIGGER_TIMEOUT_ERROR, hmu_gpt_enable, events, hmu_tick, duration);
+#ifdef __HIF_CCCI_SUPPORT__
+ if(hmu_gpt_enable == KAL_FALSE)
+ CCCI_ERROR_CODE_ASSERT(CCCI_FA_HMU_DSP_TIMER_BROKEN, duration, hmu_gpt_enable);
+ else if(hmu_gpt_enable == KAL_TRUE)
+ CCCI_ERROR_CODE_ASSERT(CCCI_FA_HMU_GPT_TIMER_BROKEN, duration, hmu_gpt_enable);
+#else
+ EXT_ASSERT(KAL_FALSE, hmu_tick, duration, hmu_gpt_enable);
+#endif
+ return HMU_CHECK_TIMER_ERROR;
+ }
+ else if( duration > HMU_TIMER_SOURCE_TIMEOUT_WARNING && hmu_detect_timer_enable){ // warning log
+ hmu_data_trace(MD_TRC_HMU_DATA_EVENT_TRIGGER_TIMEOUT_WARNING, hmu_gpt_enable, events, hmu_tick, duration);
+ return HMU_CHECK_TIMER_WARNING;
+ }
+ else{ // normal log
+ return HMU_CHECK_TIMER_SUCCESS;
+ }
+
+}
+
+/*****************************************************************************
+ * FUNCTION
+ * hmu_tg_callback
+ * DESCRIPTION
+ * Callback from task group hisr
+ * PARAMETERS
+ *
+ * RETURNS
+ *****************************************************************************/
+#ifdef __HMU_TG_TIMER_SUPPORT__
+void hmu_tg_timer_callback()
+{
+#ifndef __MTK_TARGET__ // MoDIS only
+ l2trc_fill_4G_time(); // for DHL polling log in MoDIS
+#endif
+ hmu_hifeg_set(hmu_hifeg_enable & HIF_DRV_EG_HIF_TICK_EVENT_GROUP);
+}
+#endif
diff --git a/mcu/service/hif/hmu/src/hmu_conf_data.c b/mcu/service/hif/hmu/src/hmu_conf_data.c
new file mode 100644
index 0000000..a6b8a6d
--- /dev/null
+++ b/mcu/service/hif/hmu/src/hmu_conf_data.c
@@ -0,0 +1,55 @@
+#include "hmu_conf_data.h"
+
+/* For HIF to set tick event interval, if necessary */
+hmu_tick_interval hmu_tick_interval_table[]=
+{
+ /* {event, event tick interval + 1 } */
+// {HIF_DRV_EG_HIF_TICK_EVENT_UART, 10},
+#if defined(__LHIFCORE_SUPPORT__) && !defined(__MTK_TARGET__) && !defined(__UE_SIMULATOR__)
+#if defined(__ESL_MASE_GEN97__) || defined (__ESL_MASE_4G__)
+ /* In MASE this timer needs no delay time as is triggered per subframe */
+ {HIF_DRV_EG_HIF_TICK_EVENT_LHIF, 0}, //ms
+ {HIF_DRV_EG_HIF_TICK_EVENT_LHIF_LOG, 0}, //ms
+#else /* __ESL_MASE_GEN97__ || __ESL_MASE_4G__ */
+ {HIF_DRV_EG_HIF_TICK_EVENT_LHIF, 500}, //ms
+ {HIF_DRV_EG_HIF_TICK_EVENT_LHIF_LOG, 500}, //ms
+#endif /* else __ESL_MASE_GEN97__ || __ESL_MASE_4G__ */
+#elif defined(__LHIFCORE_SUPPORT__)
+ {HIF_DRV_EG_HIF_TICK_EVENT_LHIF_LOG, 10}, //ms
+#endif
+ {0,0} // add before this line
+};
+
+////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+
+#if __USB_ACM_SUPPORT__
+DECLARE_HMU_ULDRV_EXCEPT_INIT_FUNC(cdcacm_hmu_except_init) ;
+#endif
+#if __HIF_UART_SUPPORT__
+DECLARE_HMU_ULDRV_EXCEPT_INIT_FUNC(uart_hmu_except_init) ;
+#endif
+#if __HIF_CCCI_SUPPORT__
+DECLARE_HMU_ULDRV_EXCEPT_INIT_FUNC(ccci_except_init_hmu) ;
+#endif
+#ifdef __MTK_MD_DIRECT_USB_SUPPORT__
+DECLARE_HMU_ULDRV_EXCEPT_INIT_FUNC(ufpm_hmu_except_init) ;
+#endif
+
+hmu_uldrv_except_initfunc uldrv_except_init_func_table[] = {
+#if __USB_ACM_SUPPORT__
+ {uart_port_usb2, cdcacm_hmu_except_init},
+#endif
+#if __HIF_UART_SUPPORT__
+ {uart_port1 , uart_hmu_except_init},
+#endif
+#if __HIF_CCCI_SUPPORT__
+ {uart_port_dhl_sp_expt, ccci_except_init_hmu},
+#endif
+#ifdef __MTK_MD_DIRECT_USB_SUPPORT__
+ {0, ufpm_hmu_except_init},
+#endif
+ {0,NULL}
+} ;
+unsigned int uldrv_except_init_func_table_num = sizeof(uldrv_except_init_func_table)/sizeof(hmu_uldrv_except_initfunc) ;
+
diff --git a/mcu/service/hif/interface/ccci_dev_if.h b/mcu/service/hif/interface/ccci_dev_if.h
new file mode 100644
index 0000000..93e98ab
--- /dev/null
+++ b/mcu/service/hif/interface/ccci_dev_if.h
@@ -0,0 +1,106 @@
+/*****************************************************************************
+* Copyright Statement:
+* --------------------
+* This software is protected by Copyright and the information contained
+* herein is confidential. The software may not be copied and the information
+* contained herein may not be used or disclosed except with the written
+* permission of MediaTek Inc. (C) 2012
+*
+* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
+* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
+* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
+* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
+* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
+* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
+* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
+* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
+* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
+* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
+*
+* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
+* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
+* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
+* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
+* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
+*
+* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
+* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
+* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
+* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
+* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
+*
+*****************************************************************************/
+
+/*******************************************************************************
+ * Filename:
+ * ---------
+ * ccci_dev_if.h
+ *
+ * Project:
+ * --------
+ * MOLY
+ *
+ * Description:
+ * ------------
+ * Defines CCCI devices APIs
+ *
+ * Author:
+ * -------
+ * -------
+ *
+ * ==========================================================================
+ * $Log$
+ *
+ * 08 06 2015 cs.huang
+ * [MOLY00135464] [CCCI] New CCCI handshake flow
+ * [CCCI] New CCCI handshake flow
+ *
+ * 08 06 2015 cs.huang
+ * [MOLY00135464] [CCCI] New CCCI handshake flow
+ * [CCCI] New CCCI handshake flow
+ *
+ * 06 14 2013 i-wei.tsai
+ * [MOLY00026128] [CCCI SYS MSG] CCCI system message service first check in
+ * .
+ *
+ * 02 04 2013 ian.cheng
+ * [MOLY00009874] [CCCI_SDIO] MT6290 Rename
+ * MT6290 Rename CCCI Services
+ *
+ * 01 08 2013 i-wei.tsai
+ * [MOLY00008347] [MT6290] [CCCI] CCCI re-Architecture
+ * sync latest version of new features
+ *
+ * 12 06 2012 ian.cheng
+ * [MOLY00007169] [CCCI_SDIO] MOLY phase in
+ * [MOLY][CCCI_SDIO] 1st version of MT6290 CCCI feature
+ ****************************************************************************/
+#ifndef _CCCI_DEV_IF_H
+#define _CCCI_DEV_IF_H
+
+/*!
+ * @function [MOLY CCCI INIT] ccci_fs_svc_init
+ * @brief Initialize ccci_fs_internal data structures
+ * Execute in Drv_Init_Phase1 --> ccci_hal_init
+ * @param void
+ *
+ * @return void
+ * ASSERT if fail
+ */
+kal_bool ccci_fs_svc_init(void);
+
+/*!
+ * @function [MOLY CCCI INIT] ccci_sys_msg_init
+ * @brief Initialize ccci_system_message channels
+ * Execute in Drv_Init_Phase1 --> ccci_hal_init
+ * @param void
+ *
+ * @return void
+ * ASSERT if fail
+ */
+kal_bool ccci_sys_msg_svc_init(void);
+
+
+#endif //_CCCI_DEV_IF_H
diff --git a/mcu/service/hif/interface/hif_srv_ccci_trace_utmd.json b/mcu/service/hif/interface/hif_srv_ccci_trace_utmd.json
new file mode 100644
index 0000000..69efd96
--- /dev/null
+++ b/mcu/service/hif/interface/hif_srv_ccci_trace_utmd.json
@@ -0,0 +1,204 @@
+{
+ "endGen": "-",
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_HIF",
+ "l2MaxArg": 7,
+ "modemType": "Generic"
+ },
+ "module": "HIF_SRV_CCCI",
+ "startGen": "Legacy",
+ "stringTranslationDefs": [],
+ "traceClassDefs": [
+ {
+ "CCCI_DATA_H": {
+ "debugLevel": "High",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "InternalDesign"
+ }
+ },
+ {
+ "CCCI_DATA_M": {
+ "debugLevel": "Medium",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "InternalDesign"
+ }
+ },
+ {
+ "CCCI_DATA_L": {
+ "debugLevel": "Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "InternalDesign"
+ }
+ },
+ {
+ "CCCI_CONTROL_H": {
+ "debugLevel": "High",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "DesignInfo"
+ }
+ },
+ {
+ "CCCI_CONTROL_M": {
+ "debugLevel": "Medium",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "InternalDesign"
+ }
+ },
+ {
+ "CCCI_CONTROL_L": {
+ "debugLevel": "Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "InternalDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "CCCI_WRITE_DATA_TRACE": {
+ "format": "[MD_CCCI][FLOW] ccci_write (ch=%xl) (data[0]=%xl) (data[1]=%xl) (resrv=%xl)",
+ "traceClass": "CCCI_CONTROL_L",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_WRITE_GPD_RET_DATA_TRACE": {
+ "format": "[MD_CCCI][FLOW] ccci_write_gpd (MOD=%d) (ch=%xl) (ret=%b) (num_gpd=%d)",
+ "traceClass": "CCCI_CONTROL_L",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_WRITE_GPD_CONTROL_PATH_TRACE": {
+ "format": "[MD_CCCI][FLOW] ccci_write_gpd (ch=%xl) (seq_start=%xd) (seq_end=%xd) (ast_bit=%b) (first_data[0]=%xl) (first_data[1]=%xl) (first_resrv=%xl)",
+ "traceClass": "CCCI_CONTROL_M",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_WRITE_GPD_DATA_PATH_TRACE": {
+ "format": "[MD_CCCI][FLOW] ccci_write_gpd (ch=%xl) (seq_start=%xd) (seq_end=%xd) (ast_bit=%b) (first_data[0]=%xl) (first_data[1]=%xl) (first_resrv=%xl)",
+ "traceClass": "CCCI_CONTROL_L",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_RELOAD_GPD_TRACE": {
+ "format": "[MD_CCCI][FLOW] ccci_write_gpd reload (MOD=%d) (ch=%xl) (ret=%b) (num_gpd=%d)",
+ "traceClass": "CCCI_CONTROL_L",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_ULIOR_CB_DATA_TRACE": {
+ "format": "[MD_CCCI][FLOW] ccci_ulior_cb (ch=%xl) (seq=%xd) (ast_bit=%b) (data[0]=%xl) (data[1]=%xl) (resrv=%xl)",
+ "traceClass": "CCCI_CONTROL_M",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_ULBUFF_CB_DATA_TRACE": {
+ "format": "[MD_CCCI][FLOW] ccci_ulbuff_cb (ch=%xl) (seq=%xd) (ast_bit=%b) (data[0]=%xl) (data[1]=%xl) (resrv=%xl)",
+ "traceClass": "CCCI_CONTROL_M",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_DATA_DUMP_TRACE": {
+ "format": "[CCCI DUMP] (ch=%xl) seq(%xd) idx(%b): %10xl %10xl %10xl %10xl",
+ "traceClass": "CCCI_DATA_H",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_DATA_UL_DUMP_HDR": {
+ "format": "[MD_CCCI][DATA_H] UL_HDR (ch=%xl) (seq_start=%xd) (seq_end=%xd) (ast_bit=%b) (first_data[0]=%xl) (first_data[1]=%xl) (first_resrv=%xl)",
+ "traceClass": "CCCI_DATA_H",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_DATA_UL_DUMP_TRACE": {
+ "format": "[MD_CCCI][DATA_H] UL_PAYLOAD (ch=%xl) (idx=%b) (p0=%10xl) (p1=%10xl) (p2=%10xl) (p3=%10xl)",
+ "traceClass": "CCCI_DATA_H",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_DATA_UL_DUMP_TRACE_M": {
+ "format": "[MD_CCCI][DATA_M] UL_PAYLOAD (ch=%xl) (idx=%b) (p0=%10xl) (p1=%10xl) (p2=%10xl) (p3=%10xl)",
+ "traceClass": "CCCI_DATA_M",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_DATA_UL_DUMP_TRACE_L": {
+ "format": "[MD_CCCI][DATA_L] UL_PAYLOAD (ch=%xl) (idx=%b) (p0=%10xl) (p1=%10xl) (p2=%10xl) (p3=%10xl)",
+ "traceClass": "CCCI_DATA_L",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_DATA_DL_DUMP_HDR": {
+ "format": "[MD_CCCI][DATA_H] DL_HDR (ch=%xl) (seq_start=%xd) (seq_end=%xd) (ast_bit=%b) (first_data[0]=%xl) (first_data[1]=%xl) (first_resrv=%xl)",
+ "traceClass": "CCCI_DATA_H",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_DATA_DL_DUMP_TRACE": {
+ "format": "[MD_CCCI][DATA_H] DL_PAYLOAD (ch=%xl) (idx=%b) (p0=%10xl) (p1=%10xl) (p2=%10xl) (p3=%10xl)",
+ "traceClass": "CCCI_DATA_H",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_DATA_DL_DUMP_TRACE_M": {
+ "format": "[MD_CCCI][DATA_M] DL_PAYLOAD (ch=%xl) (idx=%b) (p0=%10xl) (p1=%10xl) (p2=%10xl) (p3=%10xl)",
+ "traceClass": "CCCI_DATA_M",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_DATA_DL_DUMP_TRACE_L": {
+ "format": "[MD_CCCI][DATA_L] DL_PAYLOAD (ch=%xl) (idx=%b) (p0=%10xl) (p1=%10xl) (p2=%10xl) (p3=%10xl)",
+ "traceClass": "CCCI_DATA_L",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_DEBUG_ADD_SEQ_TRACE": {
+ "format": "[CCCI ADD SEQ] (ch=%xl) seq(%xd) ast_bit(%b) data(%xl %xl) resrv(%xl)",
+ "traceClass": "CCCI_CONTROL_H",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_DEBUG_CHECK_SEQ_TRACE": {
+ "format": "[CCCI CHECK SEQ] (ch=%xl) seq(%xd) ast_bit(%b) data(%xl %xl) resrv(%xl)",
+ "traceClass": "CCCI_CONTROL_H",
+ "traceHighlightOption": "info"
+ }
+ }
+ ],
+ "traceFamily": "L2",
+ "userModule": "MOD_CCCI"
+}
\ No newline at end of file
diff --git a/mcu/service/hif/interface/hif_srv_cccisrv_trace_utmd.json b/mcu/service/hif/interface/hif_srv_cccisrv_trace_utmd.json
new file mode 100644
index 0000000..25a2d12
--- /dev/null
+++ b/mcu/service/hif/interface/hif_srv_cccisrv_trace_utmd.json
@@ -0,0 +1,237 @@
+{
+ "endGen": "-",
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_HIF",
+ "l2MaxArg": 7,
+ "modemType": "Generic"
+ },
+ "module": "HIF_SRV_CCCISRV",
+ "startGen": "Legacy",
+ "stringTranslationDefs": [],
+ "traceClassDefs": [
+ {
+ "CCCI_IMS_DUMP_UL": {
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "OFF",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "DesignInfo"
+ }
+ },
+ {
+ "CCCI_FS_DUMP_UL": {
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "OFF",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "DesignInfo"
+ }
+ },
+ {
+ "CCCI_SHM_BM_UL": {
+ "debugLevel": "Ultra-Low",
+ "filterDefaultValue": "OFF",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "DesignInfo"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "CCCI_IMS_DATA_DUMP_TRACE": {
+ "format": "[CCCI IMS DUMP] ch(%ub) idx(%b): %10xl %10xl %10xl %10xl",
+ "traceClass": "CCCI_IMS_DUMP_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_IMS_UL_LATENCY": {
+ "format": "[CCCI IMS UL LATENCY] last %d : avg(%l) max(%l) min(%l), curr(%l) hif_int(%l)",
+ "traceClass": "CCCI_IMS_DUMP_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_IMS_DL_LATENCY": {
+ "format": "[CCCI IMS DL LATENCY] last %d : avg(%l) max(%l) min(%l), curr(%l)",
+ "traceClass": "CCCI_IMS_DUMP_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_FS_DATA_DUMP_TRACE": {
+ "format": "[CCCI FS DUMP] ccci_fs_put_buff seq(%xd) op(%xd) idx(%b): %10xl %10xl %10xl %10xl",
+ "traceClass": "CCCI_FS_DUMP_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_WRITE_ALLOC": {
+ "format": "[CCCI_SHM_BM_WRITE_ALLOC] mod(%d) usr_id(%l) ret(%l) add(%xl) length(%l)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_WRITE_ALLOC_FAIL": {
+ "format": "[CCCI_SHM_BM_WRITE_ALLOC_FAIL] usr_id(%l) alloc_index(%xl) free index(%xl) read index(%xl) write index(%l) ",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_WRITE_DONE": {
+ "format": "[CCCI_SHM_BM_WRITE_DONE] mod(%d) usr_id(%l) add(%xl) length(%l)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_READ_GET": {
+ "format": "[CCCI_SHM_BM_READ_GET] mod(%d) usr_id(%l) ret(%l) add(%xl) length(%l)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_READ_GET_FAIL": {
+ "format": "[CCCI_SHM_BM_READ_GET_FAIL] usr_id(%l) alloc_index(%xl) free index(%xl) read index(%xl) write index(%l) ",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_READ_DONE": {
+ "format": "[CCCI_SHM_BM_READ_DONE] mod(%d) usr_id(%l)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_TIMER_STOP": {
+ "format": "[CCCI_SHM_BM_TIMER_STOP] CNT(%d)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_TIMER_START": {
+ "format": "[CCCI_SHM_BM_TIMER_START] CNT(%d)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_TIMER_RESTART": {
+ "format": "[CCCI_SHM_BM_TIMER_RESTART] CNT(%d)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_TIMER_CB": {
+ "format": "[CCCI_SHM_BM_TIMER_CB] CNT(%d)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_NOTIFY": {
+ "format": "[CCCI_SHM_BM_NOTIFY] usr_id(%d) CNT(%l)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_WRITE_CONTENT": {
+ "format": "[CCCI_SHM_BM_W_CONTENT] usr_id(%d) num(%xl)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_READ_CONTENT": {
+ "format": "[CCCI_SHM_BM_R_CONTENT] usr_id(%d) num(%xl)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_HW_USER": {
+ "format": "[CCCI_SHM_BM_HW_USER] usr_id(%d) ",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_TX_CB": {
+ "format": "[CCCI_SHM_BM_TX_CB] usr_id(%d) add(%xl) size(%xl)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_DEBUG": {
+ "format": "[CCCI_SHM_BM] mod(%d) usr_id(%d) tag_num(%d) content1(%xl) content2(%xl) content3(%xl)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_USER_STOP_CALLBACK": {
+ "format": "[CCCI_SHM_BM_USER_DHL_STOP_CALLBACK] done! usr_id(%l) ",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_USER_START_CALLBACK": {
+ "format": "[CCCI_SHM_BM_USER_DHL_START_CALLBACK] done! usr_id(%l) ",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_USER_RESET_RX_INDEX": {
+ "format": "[CCCI_SHM_BM_USER_RESET_RX_INDEX] done! usr_id(%l) alloc_index(%xl) free index(%xl) read index(%xl) write index(%l) ",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_UL_CB": {
+ "format": "[CCCI_SHM_BM_UL_CB] alloc_index(%xl) free index(%xl) read index(%xl) write index(%xl) , rx_ilm_tag(%d) ",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_GET_TOTAL_SIZE": {
+ "format": "[CCCI_SHM_BM_GET_TOTAL_SIZE]total size(%l) return value(%l)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_GET_USER_SIZE": {
+ "format": "[CCCI_SHM_BM_GET_USER_SIZE]user id(%d) direction(%d) size(%l) return value(%l)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ },
+ {
+ "CCCI_SHM_BM_CHECK_CCB_STATUS": {
+ "format": "[CCCI_SHM_BM_CHECK_CCB_STATUS]CCB is invalid! init status(%d)",
+ "traceClass": "CCCI_SHM_BM_UL",
+ "traceHighlightOption": "info"
+ }
+ }
+ ],
+ "traceFamily": "L2",
+ "userModule": "MOD_CCCISRV"
+}
diff --git a/mcu/service/hif/interface/hif_srv_hlt_trace_utmd.json b/mcu/service/hif/interface/hif_srv_hlt_trace_utmd.json
new file mode 100644
index 0000000..234a79f
--- /dev/null
+++ b/mcu/service/hif/interface/hif_srv_hlt_trace_utmd.json
@@ -0,0 +1,72 @@
+{
+ "endGen": "-",
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_HIF",
+ "l2MaxArg": 7,
+ "modemType": "Generic"
+ },
+ "module": "HIF_HLT",
+ "startGen": "Legacy",
+ "stringTranslationDefs": [],
+ "traceClassDefs": [
+ {
+ "TRACE_DEBUG_L": {
+ "debugLevel": "Low",
+ "tag": [
+ "Baseline",
+ "TRACE_DEBUG"
+ ],
+ "traceType": "InternalDesign"
+ }
+ },
+ {
+ "TRACE_INFO_M": {
+ "debugLevel": "Medium",
+ "tag": [
+ "Baseline",
+ "TRACE_INFO"
+ ],
+ "traceType": "DesignInfo"
+ }
+ },
+ {
+ "TRACE_WARNING_H": {
+ "debugLevel": "High",
+ "tag": [
+ "Baseline",
+ "TRACE_WARNING"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_ERROR_UH": {
+ "debugLevel": "Ultra-High",
+ "tag": [
+ "Baseline",
+ "TRACE_ERROR"
+ ],
+ "traceType": "Public"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "HLT_OVER_BOUND_TRACE": {
+ "format": "[HLT OVER BOUND] mod(%d) id(%MHLT_USER_ID) dur(%ul) start(%ul) end(%ul) reserved(%xl)",
+ "traceClass": "TRACE_WARNING_H",
+ "traceHighlightOption": "warn"
+ }
+ },
+ {
+ "HLT_OVER_BOUND_AVG_TRACE": {
+ "format": "[HLT OVER BOUND] mod(%d) id(%MHLT_USER_ID) dur(%ul) start(%ul) end(%ul) reserved(%xl) avg(%ul)",
+ "traceClass": "TRACE_WARNING_H",
+ "traceHighlightOption": "warn"
+ }
+ }
+ ],
+ "traceFamily": "L2",
+ "userModule": "MOD_HLT"
+}
diff --git a/mcu/service/hif/interface/hif_srv_hmu_trace_utmd.json b/mcu/service/hif/interface/hif_srv_hmu_trace_utmd.json
new file mode 100644
index 0000000..01bcbb7
--- /dev/null
+++ b/mcu/service/hif/interface/hif_srv_hmu_trace_utmd.json
@@ -0,0 +1,128 @@
+{
+ "endGen": "-",
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_HIF",
+ "l2MaxArg": 7,
+ "modemType": "Generic"
+ },
+ "module": "HIF_HMU",
+ "startGen": "Legacy",
+ "stringTranslationDefs": [],
+ "traceClassDefs": [
+ {
+ "TRACE_DEBUG_L": {
+ "debugLevel": "Low",
+ "tag": [
+ "Baseline",
+ "TRACE_DEBUG"
+ ],
+ "traceType": "InternalDesign"
+ }
+ },
+ {
+ "TRACE_INFO_L": {
+ "debugLevel": "Low",
+ "tag": [
+ "Baseline",
+ "TRACE_INFO"
+ ],
+ "traceType": "DesignInfo"
+ }
+ },
+ {
+ "TRACE_WARNING_H": {
+ "debugLevel": "High",
+ "tag": [
+ "Baseline",
+ "TRACE_WARNING"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_ERROR_UH": {
+ "debugLevel": "Ultra-High",
+ "tag": [
+ "Baseline",
+ "TRACE_ERROR"
+ ],
+ "traceType": "Public"
+ }
+ },
+ {
+ "TRACE_INFO_UH": {
+ "debugLevel": "Ultra-High",
+ "tag": [
+ "Baseline",
+ "TRACE_INFO"
+ ],
+ "traceType": "Public"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "HMU_DATA_EVENT_TRIGGER": {
+ "format": "[HMU] EVENT Trigger from (MOD_ID %4d) GPT=%d event(%xl) tick(%l) dur(%l)",
+ "traceClass": "TRACE_DEBUG_L"
+ }
+ },
+ {
+ "HMU_DATA_EVENT_TRIGGER_TIMEOUT_WARNING": {
+ "format": "[HMU][WARNING] EVENT Trigger from GPT=%d event(%xl) tick(%l) dur(%l)",
+ "traceClass": "TRACE_WARNING_H"
+ }
+ },
+ {
+ "HMU_DATA_EVENT_TRIGGER_TIMEOUT_ERROR": {
+ "format": "[HMU][ERROR] EVENT Trigger from GPT=%d event(%xl) tick(%l) dur(%l)",
+ "traceClass": "TRACE_ERROR_UH"
+ }
+ },
+ {
+ "HMU_HIFEG_STOP": {
+ "format": "[HMU] hmu_hifeg_stop, MOD_ID %4d stop= %10xl enable= %10xl",
+ "traceClass": "TRACE_INFO_L"
+ }
+ },
+ {
+ "HMU_HIFEG_START": {
+ "format": "[HMU] hmu_hifeg_start, MOD_ID %4d start= %10xl enable= %10xl",
+ "traceClass": "TRACE_INFO_L"
+ }
+ },
+ {
+ "HMU_CHANGE_TIMER_DSP": {
+ "format": "[HMU] hmu_switch_hif_timer to DSP",
+ "traceClass": "TRACE_INFO_L"
+ }
+ },
+ {
+ "HMU_CHANGE_TIMER_GPT": {
+ "format": "[HMU] hmu_switch_hif_timer to GPT",
+ "traceClass": "TRACE_INFO_L"
+ }
+ },
+ {
+ "HMU_GPT_CB_NO_NEXT": {
+ "format": "[HMU] hmu_gpt_callback, no next GPT",
+ "traceClass": "TRACE_INFO_L"
+ }
+ },
+ {
+ "HMU_STOP_GPT": {
+ "format": "[HMU] hmu_stop_hif_sys_timer, GPT is stop by (MOD_ID %4d)",
+ "traceClass": "TRACE_INFO_L"
+ }
+ },
+ {
+ "HMU_ALIVE_EVENT": {
+ "format": "[HMU] Alive event GPT=%d event(%xl) tick(%l))",
+ "traceClass": "TRACE_INFO_UH"
+ }
+ }
+ ],
+ "traceFamily": "L2",
+ "userModule": "MOD_HMU"
+}
diff --git a/mcu/service/hif/ubm/include/ubm.h b/mcu/service/hif/ubm/include/ubm.h
new file mode 100644
index 0000000..d3c9905
--- /dev/null
+++ b/mcu/service/hif/ubm/include/ubm.h
@@ -0,0 +1,85 @@
+#ifndef _UBM_INC
+#define _UBM_INC
+
+#define HIF_DATA_TRACE_ENABLED 1
+
+#include "kal_public_api.h"
+#include "ubm_type.h"
+#include "lhif_if.h"
+#include "upcm_did.h"
+#include "hif_trace.h"
+#include "TrcMod.h"
+#include "qmu_bm_util.h"
+#include "ubm_export.h"
+#include "hif_common.h"
+#include "hifusb_qmu.h"
+#include "prbm.h"
+#include "dpcopro_custom.h"
+
+#if !defined(__MAUI_BASIC__)
+#include "TrcMod.h"
+#endif
+
+#define UBM_TX_QUEUE_NUM 1
+#define UBM_RX_QUEUE_NUM 1
+
+#define UBM_TX_RB_Q 0
+#define UBM_RX_RB_Q 0
+
+#define XIT_QUEUE_RX_MASK 0x80
+
+#define UBM_FH_SIZE 256
+#define UBM_FH_NUM 7
+#define UBM_FH_ALIAS_LEN 11
+
+#define UBM_LOC_ASSERT_UNIQUE_CODE_BASE 0xA5500000
+typedef enum
+{
+ UBM_LOC_UNIQUE_CODE_START = UBM_LOC_ASSERT_UNIQUE_CODE_BASE,
+ UBM_LOC_DRB_BASE_ADDRESS_NULL,
+ UBM_LOC_QUEST_DRB_UNUSED_INVALID_Q,
+ UBM_LOC_QUEST_DRB_UNUSED_INVALID_COUNT,
+ UBM_LOC_QUEST_DRB_UNUSED_FORBIDDEN_STATUS,
+ UBM_LOC_SUBMIT_DRB_ERROR_COUNT,
+ UBM_LOC_SUBMIT_DRB_FORBIDDEN_STATUS,
+ UBM_LOC_REPAY_DRB_INVALID_Q,
+ UBM_LOC_REPAY_DRB_STOCK_EMPTY,
+ UBM_LOC_REPAY_DRB_INVALID_STOCK_IDX,
+ UBM_LOC_RELEASE_DRB_INVALID_Q,
+ UBM_LOC_POLLING_DRB_INVALID_Q,
+ UBM_LOC_GET_DRB_WRITE_IDX_INVALID_Q,
+ UBM_LOC_GET_DRB_WRITE_IDX_ERROR_IN_LOAD,
+ UBM_LOC_DRB_IDX_TO_ADDR_INVALID_Q,
+ UBM_LOC_DRB_IDX_TO_ADDR_INVALID_DRB_IDX,
+ UBM_LOC_DRB_ADDR_TO_IDX_INVALID_Q, //0xA550000010
+ UBM_LOC_DRB_ADDR_TO_IDX_INVALID_ADDR,
+ UBM_LOC_FLUSH_DRB_INVALID_Q,
+ UBM_LOC_SET_FBH_OVERSIZE_LENGTH,
+ UBM_LOC_UPDATE_FBH_ERROR_INPUT,
+ UBM_LOC_CLEAR_FBH_ERROR_INPUT,
+ UBM_LOC_UL_META_IDX_TO_ADDR_INVALID_Q,
+ UBM_LOC_UL_META_GET_NEXT_IDX_INVALID_Q,
+ UBM_LOC_UL_META_GET_LHIF_NET_TYPE_INVALID_Q,
+ UBM_LOC_UL_META_ENQ_INVALID_Q,
+ UBM_LOC_UL_META_ENQ_DID_INVALID_Q,
+ UBM_LOC_VRB_TO_PHY_INVALID_Q,
+ UBM_LOC_VRB_TO_PHY_FULL_LIST,
+ UBM_LOC_PHY_TO_VRB_INVALID_Q,
+ UBM_LOC_PHY_TO_VRB_EMPTY_LIST,
+ UBM_LOC_PHY_TO_VRB_PHY_ADDR_NOT_MATCH,
+ UBM_LOC_RELEASE_XIT_INVALID_Q, //0xA5500020
+ UBM_LOC_POLL_XIT_INVALID_Q,
+ UBM_LOC_XIT_IDX_TO_ADDR_INVALID_Q,
+ UBM_LOC_XIT_IDX_TO_ADDR_INVALID_IDX,
+ UBM_LOC_XIT_FLUSH_INVALID_Q,
+ UBM_LOC_XIT_ADDR_TO_IDX_INVALID_Q,
+ UBM_LOC_XIT_ADDR_TO_IDX_INVALID_ADDR,
+ UBM_LOC_XIT_GET_NEXT_IDX_INVALID_Q,
+ UBM_LOC_ASSERT_UNIQUE_CODE_NUM
+}ubm_assert_loc_e;
+
+void ubm_fhb_init();
+void ubm_xit_init();
+void ubm_vrb_init();
+
+#endif /* _UBM_INC */
\ No newline at end of file
diff --git a/mcu/service/hif/ubm/include/ubm_data_path_trace_utmd.json b/mcu/service/hif/ubm/include/ubm_data_path_trace_utmd.json
new file mode 100644
index 0000000..846304c
--- /dev/null
+++ b/mcu/service/hif/ubm/include/ubm_data_path_trace_utmd.json
@@ -0,0 +1,130 @@
+{
+ "legacyParameters": {
+ "codeSection": "TCMFORCE",
+ "l2BufferSetting": "L2_BUFFER_HIF",
+ "l2MaxArg": 7,
+ "modemType": "Generic"
+ },
+ "module": "UBM_L2",
+ "stringTranslationDefs": [],
+ "startGen": "Legacy",
+ "endGen": "-",
+ "traceClassDefs": [
+ {
+ "UBM_UH": {
+ "debugLevel": "Ultra-High",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "InternalDesign"
+ }
+ },
+ {
+ "UBM_H": {
+ "debugLevel": "High",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "InternalDesign"
+ }
+ },
+ {
+ "UBM_M": {
+ "debugLevel": "Medium",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "InternalDesign"
+ }
+ },
+ {
+ "UBM_L": {
+ "debugLevel": "Low",
+ "filterDefaultValue": "ON",
+ "tag": [
+ "Baseline"
+ ],
+ "traceType": "CoreDesign"
+ }
+ }
+ ],
+ "traceDefs": [
+ {
+ "UBM_DRB_ALLOC_SUCCESS": {
+ "format": "[UBM_DRB] alloc_free_drb succ: alloCount = %d, swFreeCount = %l, swWritingIdx = %l, swStockIdx/drbTotalCount = %l",
+ "traceClass": "UBM_L"
+ }
+ },
+ {
+ "UBM_DRB_ALLOC_FAIL": {
+ "format": "[UBM_DRB] alloc_free_drb fail: new state = %d, alloCount = %l, swFreeCount = %l",
+ "traceClass": "UBM_H"
+ }
+ },
+ {
+ "UBM_DRB_SUBMIT": {
+ "format": "[UBM_DRB] submit_drb: submitStartIdx = %d, submitCount = %l, swWritingCount = %l, swStockCount = %l",
+ "traceClass": "UBM_M"
+ }
+ },
+ {
+ "UBM_DRB_REPAY": {
+ "format": "[UBM_DRB] check_and_repay_drb: swStockCount = %d, freeDrbCount = %l, tarIdx = %l, srcIdx = %l",
+ "traceClass": "UBM_UH"
+ }
+ },
+ {
+ "UBM_DRB_GET_ONE": {
+ "format": "[UBM_DRB] get_one_writable_drbIdx: current state = %d, swFreeCount = %l, swWritingIdx = %l, swStockIdx =%l",
+ "traceClass": "UBM_L"
+ }
+ },
+ {
+ "UBM_DRB_GET_ONE_DONE": {
+ "format": "[UBM_DRB] get_one_writable_drbIdx done: new state = %d, swWritingCount = %l, swFreeCount = %l, swStockCount = %l",
+ "traceClass": "UBM_L"
+ }
+ },
+ {
+ "UBM_DRB_IDX_TO_ADDR": {
+ "format": "[UBM_DRB] index_to_address: drbTotalCount = %d, stockTotalCount = %l, drbIndex = %l, drbAddr = 0x%xl",
+ "traceClass": "UBM_L"
+ }
+ },
+ {
+ "UBM_UL_META_GET_NEXT_IDX": {
+ "format": "[UBM_UL_META] get_next_idx: current idx = %d, next idx = %l",
+ "traceClass": "UBM_L"
+ }
+ },
+ {
+ "UBM_UL_META_IDX_TO_ADDR": {
+ "format": "[UBM_UL_META] index_to_address: idx = %d, addr = 0x%xl",
+ "traceClass": "UBM_L"
+ }
+ },
+ {
+ "UBM_VRB_VIR2PHY_VIR": {
+ "format": "[UBM_VRB] vir2phy_and_set_map: virtual addr = 0x%xd, len = %l",
+ "traceClass": "UBM_L"
+ }
+ },
+ {
+ "UBM_VRB_VIR2PHY_PHY": {
+ "format": "[UBM_VRB] vir2phy_and_set_map: phyIdx = %d, phyAddr = 0x%xl, phyLen = %l",
+ "traceClass": "UBM_L"
+ }
+ },
+ {
+ "UBM_XIT_GET_NEXT_IDX": {
+ "format": "[UBM_XIT] get_next_idx: current idx = %d, next idx = %l",
+ "traceClass": "UBM_L"
+ }
+ }
+ ],
+ "traceFamily": "L2",
+ "userModule": "MOD_UBM"
+}
diff --git a/mcu/service/hif/ubm/src/ubm.c b/mcu/service/hif/ubm/src/ubm.c
new file mode 100644
index 0000000..f64c700
--- /dev/null
+++ b/mcu/service/hif/ubm/src/ubm.c
@@ -0,0 +1,9 @@
+#include "ubm.h"
+#include "ubm_export.h"
+
+void ubm_init()
+{
+ ubm_fhb_init();
+ ubm_xit_init();
+ ubm_vrb_init();
+}
diff --git a/mcu/service/hif/ubm/src/ubm_drb.c b/mcu/service/hif/ubm/src/ubm_drb.c
new file mode 100644
index 0000000..3ff37f3
--- /dev/null
+++ b/mcu/service/hif/ubm/src/ubm_drb.c
@@ -0,0 +1,268 @@
+#include "ubm.h"
+#include "ubm_export.h"
+
+typedef enum _ubm_drb_mngr_st
+{
+ UBM_DRB_MNGR_ST_EARN,
+ UBM_DRB_MNGR_ST_CONSUME,
+ UBM_DRB_MNGR_ST_LOAN,
+ UBM_DRB_MNGR_ST_REPAY,
+} ubm_drb_mngr_st;
+
+typedef struct _ubm_drb_mng
+{
+ ubm_drb_mngr_st drbMngSt;
+ usbq_dl_pd_drb *drbBs;
+ kal_uint32 drbTotalN;
+ kal_uint32 drbWI;
+ usbq_dl_pd_drb *stockBs;
+ kal_uint32 stockTotalN;
+ kal_uint16 swFreeN;
+ kal_uint16 swAlloN;
+ kal_uint32 swWI;
+ kal_uint16 swWN;
+ kal_uint32 swStockI;
+ kal_uint32 swStockN;
+} ubm_drb_mng;
+
+static ubm_drb_mng ubm_drb_inst[UBM_TX_QUEUE_NUM];
+
+void ubm_drb_init_properties()
+{
+ kal_uint8 i;
+
+ for (i = 0; i < UBM_TX_QUEUE_NUM; ++i)
+ {
+ ubm_drb_inst[i].drbMngSt = UBM_DRB_MNGR_ST_EARN;
+ ubm_drb_inst[i].drbTotalN = 0;
+
+ if (UBM_TX_RB_Q == i)
+ {
+ hifusbq_get_dl_drb_base(i, (void **)&(ubm_drb_inst[i].drbBs), &(ubm_drb_inst[i].drbTotalN), &(ubm_drb_inst[i].stockTotalN));
+ EXT_ASSERT(ubm_drb_inst[i].drbBs, UBM_LOC_DRB_BASE_ADDRESS_NULL, 0, 0);
+ }
+ }
+}
+
+kal_bool ubm_drb_quest_unused(kal_uint8 txQueNo, kal_uint32 alloCount)
+{
+ kal_bool result = KAL_FALSE;
+ kal_uint16 freeDrbCount = 0;
+
+ EXT_ASSERT(UBM_TX_RB_Q == txQueNo, UBM_LOC_QUEST_DRB_UNUSED_INVALID_Q, (kal_uint32)txQueNo, (kal_uint32)alloCount);
+ EXT_ASSERT(alloCount > 0, UBM_LOC_QUEST_DRB_UNUSED_INVALID_COUNT, (kal_uint32)txQueNo, (kal_uint32)alloCount);
+
+ switch (ubm_drb_inst[txQueNo].drbMngSt)
+ {
+ case UBM_DRB_MNGR_ST_EARN:
+ hifusbq_create_dl_drb(txQueNo, &(ubm_drb_inst[txQueNo].drbWI), &freeDrbCount);
+
+ if (freeDrbCount >= alloCount)
+ {
+ ubm_drb_inst[txQueNo].swFreeN = freeDrbCount;
+ ubm_drb_inst[txQueNo].swAlloN = alloCount;
+ ubm_drb_inst[txQueNo].swWI = ubm_drb_inst[txQueNo].drbWI;
+ ubm_drb_inst[txQueNo].swWN = 0;
+ ubm_drb_inst[txQueNo].swStockI = ubm_drb_inst[txQueNo].drbTotalN;
+ ubm_drb_inst[txQueNo].swStockN = 0;
+ result = KAL_TRUE;
+ ubm_drb_inst[txQueNo].drbMngSt = UBM_DRB_MNGR_ST_CONSUME;
+
+ hif_data_trace(MD_TRC_UBM_DRB_ALLOC_SUCCESS, alloCount, ubm_drb_inst[txQueNo].swFreeN, ubm_drb_inst[txQueNo].swWI, ubm_drb_inst[txQueNo].swStockI);
+ }
+ else
+ {
+ hif_data_trace(MD_TRC_UBM_DRB_ALLOC_FAIL, ubm_drb_inst[txQueNo].drbMngSt, alloCount, ubm_drb_inst[txQueNo].swFreeN);
+ }
+ break;
+
+ case UBM_DRB_MNGR_ST_REPAY:
+ hif_data_trace(MD_TRC_UBM_DRB_ALLOC_FAIL, ubm_drb_inst[txQueNo].drbMngSt, alloCount, ubm_drb_inst[txQueNo].swFreeN);
+ break;
+
+ default:
+ hif_data_trace(MD_TRC_UBM_DRB_ALLOC_FAIL, ubm_drb_inst[txQueNo].drbMngSt, alloCount, ubm_drb_inst[txQueNo].swFreeN);
+ EXT_ASSERT(0, UBM_LOC_QUEST_DRB_UNUSED_FORBIDDEN_STATUS, (kal_uint32)txQueNo, (kal_uint32)ubm_drb_inst[txQueNo].drbMngSt);
+ break;
+ }
+
+ return result;
+}
+
+kal_bool ubm_drb_submit(kal_uint8 txQueNo, kal_uint32 submitCount)
+{
+ kal_bool result = KAL_FALSE;
+ kal_uint32 submitStartIdx = 0;
+
+ switch (ubm_drb_inst[txQueNo].drbMngSt)
+ {
+ case UBM_DRB_MNGR_ST_CONSUME:
+ case UBM_DRB_MNGR_ST_LOAN:
+ submitStartIdx = (ubm_drb_inst[txQueNo].swWI + ubm_drb_inst[txQueNo].drbTotalN - ubm_drb_inst[txQueNo].swWN) % ubm_drb_inst[txQueNo].drbTotalN;
+ hif_data_trace(MD_TRC_UBM_DRB_SUBMIT, submitStartIdx, submitCount, ubm_drb_inst[txQueNo].swWN, ubm_drb_inst[txQueNo].swStockN);
+
+ EXT_ASSERT(submitCount == (ubm_drb_inst[txQueNo].swWN + ubm_drb_inst[txQueNo].swStockN), UBM_LOC_SUBMIT_DRB_ERROR_COUNT,
+ (kal_uint32)submitCount, (kal_uint32)(ubm_drb_inst[txQueNo].swWN + ubm_drb_inst[txQueNo].swStockN));
+ result = hifusbq_set_dl_drb(txQueNo, ubm_drb_inst[txQueNo].drbWI, ubm_drb_inst[txQueNo].swWN);
+ if (result)
+ {
+ ubm_drb_inst[txQueNo].drbMngSt = ubm_drb_inst[txQueNo].drbMngSt == UBM_DRB_MNGR_ST_CONSUME ? UBM_DRB_MNGR_ST_EARN : UBM_DRB_MNGR_ST_REPAY;
+ }
+ break;
+
+ default:
+ EXT_ASSERT(0, UBM_LOC_SUBMIT_DRB_FORBIDDEN_STATUS, (kal_uint32)txQueNo, (kal_uint32)ubm_drb_inst[txQueNo].drbMngSt);
+ break;
+ }
+
+ return result;
+}
+
+void ubm_drb_repay(kal_uint8 txQueNo)
+{
+ kal_uint16 freeDrbCount = 0;
+ kal_uint16 repayDrbCount = 0;
+ kal_uint16 tarIdx, srcIdx;
+
+ EXT_ASSERT(UBM_TX_RB_Q == txQueNo, UBM_LOC_REPAY_DRB_INVALID_Q, (kal_uint32)txQueNo, 0);
+
+ switch (ubm_drb_inst[txQueNo].drbMngSt)
+ {
+ case UBM_DRB_MNGR_ST_REPAY:
+ EXT_ASSERT(ubm_drb_inst[txQueNo].swStockN > 0, UBM_LOC_REPAY_DRB_STOCK_EMPTY, (kal_uint32)txQueNo, 0);
+ hifusbq_create_dl_drb(txQueNo, &(ubm_drb_inst[txQueNo].drbWI), &freeDrbCount);
+ tarIdx = ubm_drb_inst[txQueNo].drbWI;
+ srcIdx = ubm_drb_inst[txQueNo].swStockI - ubm_drb_inst[txQueNo].swStockN;
+
+ while ((0 < freeDrbCount) && (0 < ubm_drb_inst[txQueNo].swStockN))
+ {
+ hif_data_trace(MD_TRC_UBM_DRB_REPAY, ubm_drb_inst[txQueNo].swStockN, freeDrbCount, tarIdx, srcIdx);
+
+ EXT_ASSERT(srcIdx < ubm_drb_inst[txQueNo].swStockI, UBM_LOC_REPAY_DRB_INVALID_STOCK_IDX, (kal_uint32)txQueNo, (kal_uint32)srcIdx);
+ kal_mem_cpy(ubm_drb_inst[txQueNo].drbBs + tarIdx, ubm_drb_inst[txQueNo].drbBs + srcIdx, sizeof(usbq_dl_pd_drb));
+ tarIdx = (tarIdx + 1) % ubm_drb_inst[txQueNo].drbTotalN;
+ srcIdx++;
+ repayDrbCount++;
+ ubm_drb_inst[txQueNo].swStockN--;
+ freeDrbCount--;
+ }
+
+ ASSERT(hifusbq_set_dl_drb(txQueNo, ubm_drb_inst[txQueNo].drbWI, repayDrbCount));
+ if (0 == ubm_drb_inst[txQueNo].swStockN)
+ {
+ ubm_drb_inst[txQueNo].drbMngSt = UBM_DRB_MNGR_ST_EARN;
+ }
+ break;
+
+ case UBM_DRB_MNGR_ST_EARN:
+ case UBM_DRB_MNGR_ST_CONSUME:
+ case UBM_DRB_MNGR_ST_LOAN:
+ break;
+
+ default:
+ ASSERT(0);
+ break;
+ }
+}
+
+kal_bool ubm_drb_release(kal_uint8 txQueNo, kal_uint32 headIdx, kal_uint32 relCount)
+{
+ EXT_ASSERT(UBM_TX_RB_Q == txQueNo, UBM_LOC_RELEASE_DRB_INVALID_Q, (kal_uint32)txQueNo, 0);
+ return hifusbq_release_dl_drb(txQueNo, headIdx, relCount);
+}
+
+kal_uint32 ubm_drb_poll(kal_uint8 txQueNo, kal_uint32 *headIdx, kal_uint32 *tailIdx)
+{
+ EXT_ASSERT(UBM_TX_RB_Q == txQueNo, UBM_LOC_POLLING_DRB_INVALID_Q, (kal_uint32)txQueNo, 0);
+ return hifusbq_poll_dl_drb(txQueNo, headIdx, tailIdx);
+}
+
+kal_bool ubm_drb_get_one_writable_Idx(kal_uint8 txQueNo, kal_uint32 *writeIdx)
+{
+ kal_bool result = KAL_FALSE;
+
+ EXT_ASSERT(UBM_TX_RB_Q == txQueNo, UBM_LOC_GET_DRB_WRITE_IDX_INVALID_Q, (kal_uint32)txQueNo, 0);
+
+ hif_data_trace(MD_TRC_UBM_DRB_GET_ONE, ubm_drb_inst[txQueNo].drbMngSt, ubm_drb_inst[txQueNo].swFreeN, ubm_drb_inst[txQueNo].swWI, ubm_drb_inst[txQueNo].swStockI);
+
+ switch (ubm_drb_inst[txQueNo].drbMngSt)
+ {
+ case UBM_DRB_MNGR_ST_CONSUME:
+ if (ubm_drb_inst[txQueNo].swFreeN > 0)
+ {
+ *writeIdx = ubm_drb_inst[txQueNo].swWI;
+ ubm_drb_inst[txQueNo].swWN++;
+ ubm_drb_inst[txQueNo].swFreeN--;
+ ubm_drb_inst[txQueNo].swWI = (ubm_drb_inst[txQueNo].swWI + 1) % ubm_drb_inst[txQueNo].drbTotalN;
+ }
+ else
+ {
+ *writeIdx = ubm_drb_inst[txQueNo].swStockI;
+ ubm_drb_inst[txQueNo].swStockN++;
+ ubm_drb_inst[txQueNo].swStockI++;
+
+ ubm_drb_inst[txQueNo].drbMngSt = UBM_DRB_MNGR_ST_LOAN;
+ }
+
+ result = KAL_TRUE;
+ break;
+
+ case UBM_DRB_MNGR_ST_LOAN:
+ EXT_ASSERT((ubm_drb_inst[txQueNo].swStockN <= ubm_drb_inst[txQueNo].stockTotalN) && (ubm_drb_inst[txQueNo].swStockN > 0)
+ , UBM_LOC_GET_DRB_WRITE_IDX_ERROR_IN_LOAD, (kal_uint32)ubm_drb_inst[txQueNo].swStockN, (kal_uint32)ubm_drb_inst[txQueNo].stockTotalN);
+
+ *writeIdx = ubm_drb_inst[txQueNo].swStockI;
+ ubm_drb_inst[txQueNo].swStockN++;
+ ubm_drb_inst[txQueNo].swStockI++;
+
+ result = KAL_TRUE;
+ break;
+
+ default:
+ ASSERT(0);
+ break;
+ }
+
+ hif_data_trace(MD_TRC_UBM_DRB_GET_ONE_DONE, ubm_drb_inst[txQueNo].drbMngSt, ubm_drb_inst[txQueNo].swWN, ubm_drb_inst[txQueNo].swFreeN, ubm_drb_inst[txQueNo].swStockN);
+
+ return result;
+}
+
+usbq_dl_pd_drb *ubm_drb_idx2addr(kal_uint8 txQueNo, kal_uint32 drbIndex)
+{
+ EXT_ASSERT(UBM_TX_RB_Q == txQueNo, UBM_LOC_DRB_IDX_TO_ADDR_INVALID_Q, (kal_uint32)txQueNo, (kal_uint32)drbIndex);
+ EXT_ASSERT(drbIndex < (ubm_drb_inst[txQueNo].drbTotalN + ubm_drb_inst[txQueNo].stockTotalN), UBM_LOC_DRB_IDX_TO_ADDR_INVALID_DRB_IDX, (kal_uint32)txQueNo, (kal_uint32)drbIndex);
+
+ hif_data_trace(MD_TRC_UBM_DRB_IDX_TO_ADDR, ubm_drb_inst[txQueNo].drbTotalN, ubm_drb_inst[txQueNo].stockTotalN, drbIndex, ubm_drb_inst[txQueNo].drbBs + drbIndex);
+
+ return (ubm_drb_inst[txQueNo].drbBs + drbIndex);
+}
+
+kal_uint32 ubm_drb_addr2idx(kal_uint8 txQueNo, usbq_dl_pd_drb *drbPtr)
+{
+ kal_uint32 addrDiff;
+
+ EXT_ASSERT(UBM_TX_RB_Q == txQueNo, UBM_LOC_DRB_ADDR_TO_IDX_INVALID_Q, (kal_uint32)txQueNo, 0);
+ addrDiff = (kal_uint32)drbPtr - (kal_uint32)ubm_drb_inst[txQueNo].drbBs;
+ EXT_ASSERT(0 == (addrDiff % sizeof(usbq_dl_pd_drb)), UBM_LOC_DRB_ADDR_TO_IDX_INVALID_ADDR, (kal_uint32)txQueNo, 0);
+ return addrDiff / sizeof(usbq_dl_pd_drb);
+}
+
+kal_bool ubm_drb_flush(kal_uint8 txQueNo, kal_uint32 *headIdx, kal_uint32 *tailIdx, kal_uint32 *num)
+{
+ EXT_ASSERT(UBM_TX_RB_Q == txQueNo, UBM_LOC_FLUSH_DRB_INVALID_Q, (kal_uint32)txQueNo, 0);
+
+ ubm_drb_inst[txQueNo].drbMngSt = UBM_DRB_MNGR_ST_EARN;
+ ubm_drb_inst[txQueNo].drbTotalN = 0;
+
+ if (hifusbq_flush_dl_drb(UBM_TX_RB_Q, headIdx, tailIdx, num))
+ {
+ hifusbq_get_dl_drb_base(UBM_TX_RB_Q, (void **)&(ubm_drb_inst[txQueNo].drbBs), &(ubm_drb_inst[txQueNo].drbTotalN), &(ubm_drb_inst[txQueNo].stockTotalN));
+ ASSERT(ubm_drb_inst[txQueNo].drbBs);
+ return KAL_TRUE;
+ }
+ else
+ {
+ return KAL_FALSE;
+ }
+}
diff --git a/mcu/service/hif/ubm/src/ubm_fhb.c b/mcu/service/hif/ubm/src/ubm_fhb.c
new file mode 100644
index 0000000..e8f2778
--- /dev/null
+++ b/mcu/service/hif/ubm/src/ubm_fhb.c
@@ -0,0 +1,99 @@
+#include "ubm.h"
+#include "ubm_export.h"
+
+typedef struct _ubm_fh
+{
+ kal_uint32 headerSize;
+ kal_uint8 fh[UBM_FH_SIZE];
+ char alias[UBM_FH_ALIAS_LEN];
+ kal_bool isUsed;
+} ubm_fh;
+
+__MCURW_HWRW_C_ALIGNED_RW(CPU_CACHE_LINE_SIZE)
+static ubm_fh ubm_fhb_inst[UBM_FH_NUM];
+
+void ubm_fhb_init()
+{
+ kal_mem_set(ubm_fhb_inst, 0, sizeof(ubm_fhb_inst));
+}
+
+kal_uint8 ubm_set_fhb(const void *headerPattern, kal_uint8 size, const char *headerName)
+{
+ kal_uint8 i;
+
+ EXT_ASSERT(strlen(headerName) < UBM_FH_ALIAS_LEN, UBM_LOC_SET_FBH_OVERSIZE_LENGTH, (kal_uint32)strlen(headerName), 0);
+
+ for (i = 0; i < UBM_FH_NUM; i++)
+ {
+ if (KAL_FALSE == ubm_fhb_inst[i].isUsed)
+ {
+ ubm_fhb_inst[i].headerSize = size;
+ kal_mem_cpy(ubm_fhb_inst[i].fh, headerPattern, size);
+ QBM_CACHE_FLUSH(ubm_fhb_inst[i].fh, size);
+ strncpy(ubm_fhb_inst[i].alias, headerName, strlen(headerName));
+ ubm_fhb_inst[i].isUsed = KAL_TRUE;
+ hifusbq_set_dl_fh((i + 1), ubm_fhb_inst[i].fh, ubm_fhb_inst[i].headerSize);
+ break;
+ }
+ }
+
+ return (i == UBM_FH_NUM) ? 0 : (++i);
+}
+
+/*
+ * Request by TJ: UCBCLASS may want to change fixed header contents, but doesn't want to use clean and set API
+ */
+kal_bool ubm_update_fhb(const void *headerPattern, kal_uint8 size, const char *headerName)
+{
+ kal_bool result = KAL_FALSE;
+ kal_uint8 typeId = ubm_get_fhb_type(headerName);
+
+ if ((typeId != 0) && (ubm_fhb_inst[typeId - 1].isUsed == KAL_TRUE))
+ {
+ ubm_fhb_inst[typeId - 1].headerSize = size;
+ kal_mem_cpy(ubm_fhb_inst[typeId - 1].fh, headerPattern, size);
+ QBM_CACHE_FLUSH(ubm_fhb_inst[typeId - 1].fh, size);
+ strncpy(ubm_fhb_inst[typeId - 1].alias, headerName, strlen(headerName));
+
+ result = KAL_TRUE;
+ }
+ EXT_ASSERT(result, UBM_LOC_UPDATE_FBH_ERROR_INPUT, (kal_uint32)typeId, (kal_uint32)ubm_fhb_inst[typeId - 1].isUsed);
+ return result;
+}
+
+kal_bool ubm_clean_fhb(const char *headerName)
+{
+ kal_bool result = KAL_FALSE;
+ kal_uint8 typeId = ubm_get_fhb_type(headerName);
+
+ if ((0 != typeId) && (ubm_fhb_inst[typeId - 1].isUsed == KAL_TRUE))
+ {
+ ubm_fhb_inst[typeId - 1].headerSize = 0;
+ kal_mem_set(ubm_fhb_inst[typeId - 1].fh, 0, UBM_FH_SIZE);
+ kal_mem_set(ubm_fhb_inst[typeId - 1].alias, 0, UBM_FH_ALIAS_LEN);
+ ubm_fhb_inst[typeId - 1].isUsed = KAL_FALSE;
+
+ result = KAL_TRUE;
+ }
+
+ EXT_ASSERT(result, UBM_LOC_CLEAR_FBH_ERROR_INPUT, (kal_uint32)typeId, (kal_uint32)ubm_fhb_inst[typeId - 1].isUsed);
+ return result;
+}
+
+kal_uint8 ubm_get_fhb_type(const char *headerName)
+{
+ kal_uint8 i;
+ char *alias;
+
+ for (i = 0; i < UBM_FH_NUM; i++)
+ {
+ alias = ubm_fhb_inst[i].alias;
+
+ if (ubm_fhb_inst[i].isUsed && (0 == strncmp(alias, headerName, strlen(headerName))))
+ {
+ break;
+ }
+ }
+
+ return (i == UBM_FH_NUM) ? 0 : (++i);
+}
\ No newline at end of file
diff --git a/mcu/service/hif/ubm/src/ubm_nfhb.c b/mcu/service/hif/ubm/src/ubm_nfhb.c
new file mode 100644
index 0000000..b40690d
--- /dev/null
+++ b/mcu/service/hif/ubm/src/ubm_nfhb.c
@@ -0,0 +1,14 @@
+#include "ubm.h"
+#include "ubm_export.h"
+
+kal_uint8 *ubm_allocate_nfhb(kal_uint8 txQueNo, kal_uint32 allocSize)
+{
+ ASSERT(UBM_TX_RB_Q == txQueNo);
+ return prbm_allocate(allocSize, PRB_TYPE_DL_USB);
+}
+
+void ubm_release_nfhb(kal_uint8 txQueNo, void *nfhbAddr, kal_uint32 relSize)
+{
+ ASSERT(UBM_TX_RB_Q == txQueNo);
+ prbm_release(nfhbAddr, relSize, PRB_TYPE_DL_USB);
+}
diff --git a/mcu/service/hif/ubm/src/ubm_ul_meta.c b/mcu/service/hif/ubm/src/ubm_ul_meta.c
new file mode 100644
index 0000000..a4dd681
--- /dev/null
+++ b/mcu/service/hif/ubm/src/ubm_ul_meta.c
@@ -0,0 +1,81 @@
+#include "ubm.h"
+#include "ubm_export.h"
+
+static lhif_meta_tbl_t *ulMetaBase = NULL;
+static kal_uint16 ulMetaSize = 0;
+static kal_uint32 lhifUlqSn = 0;
+
+lhif_meta_tbl_t *ubm_ul_meta_idx2addr(kal_uint8 rxQueNo, kal_uint16 index)
+{
+ rxQueNo &= ~XIT_QUEUE_RX_MASK;
+ EXT_ASSERT(UBM_RX_RB_Q == rxQueNo, UBM_LOC_UL_META_IDX_TO_ADDR_INVALID_Q, (kal_uint32)rxQueNo, (kal_uint32)index);
+ hif_data_trace(MD_TRC_UBM_UL_META_IDX_TO_ADDR, index, ulMetaBase + index);
+ return (ulMetaBase + index);
+}
+
+kal_uint16 ubm_ul_meta_get_next_idx(kal_uint8 rxQueNo, kal_uint16 index)
+{
+ kal_uint16 nextIdx = (index + 1) % ulMetaSize;
+ rxQueNo &= ~XIT_QUEUE_RX_MASK;
+ EXT_ASSERT(UBM_RX_RB_Q == rxQueNo, UBM_LOC_UL_META_GET_NEXT_IDX_INVALID_Q, (kal_uint32)rxQueNo, (kal_uint32)index);
+ hif_data_trace(MD_TRC_UBM_UL_META_GET_NEXT_IDX, index, nextIdx);
+ return nextIdx;
+}
+
+void ubm_ul_meta_init_properties()
+{
+ lhif_net_query_meta_table((kal_uint32 **)&ulMetaBase, &ulMetaSize, LHIF_HWQ_AP_UL_Q0);
+}
+
+LHIF_NET_TYPE ubm_ul_meta_get_lhif_net_type(kal_uint8 rxQueNo, usb_class_type_e classType)
+{
+ LHIF_NET_TYPE netType;
+
+ rxQueNo &= ~XIT_QUEUE_RX_MASK;
+ EXT_ASSERT(UBM_RX_RB_Q == rxQueNo, UBM_LOC_UL_META_GET_LHIF_NET_TYPE_INVALID_Q, (kal_uint32)rxQueNo, (kal_uint32)classType);
+
+ switch (classType)
+ {
+#ifdef __USB_MBIM_SUPPORT__
+ case USB_CLASS_MBIM:
+ netType = LHIF_NET_TYPE_MBIM;
+ break;
+#endif
+#ifdef __USB_RNDIS_SUPPORT__
+ case USB_CLASS_RNDIS:
+ netType = LHIF_NET_TYPE_RNDIS;
+ break;
+#endif
+#ifdef __USB_ECM_SUPPORT__
+ case USB_CLASS_ECM:
+ netType = LHIF_NET_TYPE_RNDIS;
+ break;
+#endif
+
+ default:
+ netType = LHIF_NET_TYPE_LHIF;
+ ASSERT(0);
+ break;
+ }
+
+ return netType;
+}
+
+kal_bool ubm_ul_meta_enqueue_lhif_ul_queue(kal_uint8 rxQueNo, LHIF_NET_TYPE lhifNetType, kal_uint8 usbclassDevId, void *dataAddr, kal_uint16 dataLen)
+{
+ rxQueNo &= ~XIT_QUEUE_RX_MASK;
+ EXT_ASSERT(UBM_RX_RB_Q == rxQueNo, UBM_LOC_UL_META_ENQ_INVALID_Q, (kal_uint32)rxQueNo, (kal_uint32)usbclassDevId);
+ return lhif_data_send_ul_q_usb(lhifNetType, usbclassDevId, dataAddr, dataLen, lhifUlqSn++);
+}
+
+kal_bool ubm_ul_meta_enqueue_lhif_ul_queue_did(kal_uint8 rxQueNo, LHIF_NET_TYPE lhifNetType, kal_uint8 usbclassDevId, LHIF_NET_IF net_if, void *did)
+{
+ rxQueNo &= ~XIT_QUEUE_RX_MASK;
+ EXT_ASSERT(UBM_RX_RB_Q == rxQueNo, UBM_LOC_UL_META_ENQ_DID_INVALID_Q, (kal_uint32)rxQueNo, (kal_uint32)usbclassDevId);
+ return lhif_send_ul_q_did(lhifNetType, net_if, did);
+}
+
+lhif_meta_tbl_t *ubm_ul_meta_get_base()
+{
+ return ulMetaBase;
+}
diff --git a/mcu/service/hif/ubm/src/ubm_vrb.c b/mcu/service/hif/ubm/src/ubm_vrb.c
new file mode 100644
index 0000000..1537bd3
--- /dev/null
+++ b/mcu/service/hif/ubm/src/ubm_vrb.c
@@ -0,0 +1,65 @@
+#include "ubm.h"
+#include "ubm_export.h"
+
+#define UBM_VRB_ADDR_MAP_NUM USB_DL_DRB_MAX_COUNT
+#define UBM_VRB_NXTP(_a) ((_a + 1) % UBM_VRB_ADDR_MAP_NUM)
+
+static kal_uint32 ubm_vrb_va[UBM_TX_QUEUE_NUM][UBM_VRB_ADDR_MAP_NUM];
+static kal_uint32 ubm_vrb_pa[UBM_TX_QUEUE_NUM][UBM_VRB_ADDR_MAP_NUM];
+static kal_uint32 ubm_vrb_pr[UBM_TX_QUEUE_NUM];
+static kal_uint32 ubm_vrb_pw[UBM_TX_QUEUE_NUM];
+
+void ubm_vrb_init()
+{
+ kal_uint8 vqc = 0;
+
+ for (vqc = 0; vqc < UBM_TX_QUEUE_NUM; ++vqc)
+ {
+ ubm_vrb_pr[vqc] = ubm_vrb_pw[vqc] = 0;
+ }
+}
+
+ubm_vrb_phy_addr ubm_addr_vir2phy_and_save(kal_uint8 txQueNo, kal_uint32 virAddr, kal_uint16 virLen)
+{
+ kal_uint32 seg_num = sizeof(((v2p_addr_t *)0)->p_addr) / sizeof(kal_uint32), i;
+ ubm_vrb_phy_addr phyAddrResult;
+ v2p_addr_t v2pAddr;
+
+ EXT_ASSERT(UBM_TX_QUEUE_NUM > txQueNo, UBM_LOC_VRB_TO_PHY_INVALID_Q, (kal_uint32)txQueNo, (kal_uint32)virAddr);
+ hif_data_trace(MD_TRC_UBM_VRB_VIR2PHY_VIR, virAddr, virLen);
+ v2pAddr.v_addr = virAddr;
+ v2pAddr.v_len = virLen;
+ copro_vrb_to_phy_addr(&v2pAddr);
+ phyAddrResult.segNum = 0;
+
+ for (i = 0; i < seg_num && v2pAddr.p_len[i] > 0; ++i)
+ {
+ phyAddrResult.phyAddr[i] = v2pAddr.p_addr[i];
+ phyAddrResult.phyLen[i] = v2pAddr.p_len[i];
+ ++phyAddrResult.segNum;
+ hif_data_trace(MD_TRC_UBM_VRB_VIR2PHY_PHY, i, phyAddrResult.phyAddr[i], phyAddrResult.phyLen[i]);
+ EXT_ASSERT(UBM_VRB_NXTP(ubm_vrb_pw[txQueNo]) != ubm_vrb_pr[txQueNo], UBM_LOC_VRB_TO_PHY_FULL_LIST, 0, 0);
+ ubm_vrb_pa[txQueNo][ubm_vrb_pw[txQueNo]] = v2pAddr.p_addr[i];
+ ubm_vrb_va[txQueNo][ubm_vrb_pw[txQueNo]] = virAddr;
+ ubm_vrb_pw[txQueNo] = UBM_VRB_NXTP(ubm_vrb_pw[txQueNo]);
+ virAddr += v2pAddr.p_len[i];
+ }
+
+ return phyAddrResult;
+}
+
+kal_uint32 ubm_addr_phy2vir_and_delete(kal_uint8 txQueNo, kal_uint32 phyAddr)
+{
+ kal_uint32 virAddr = 0;
+ EXT_ASSERT(UBM_TX_QUEUE_NUM > txQueNo, UBM_LOC_PHY_TO_VRB_INVALID_Q, (kal_uint32)txQueNo, (kal_uint32)phyAddr);
+ EXT_ASSERT(ubm_vrb_pr[txQueNo] != ubm_vrb_pw[txQueNo], UBM_LOC_PHY_TO_VRB_EMPTY_LIST, (kal_uint32)txQueNo, 0);
+ EXT_ASSERT(ubm_vrb_pa[txQueNo][ubm_vrb_pr[txQueNo]] == phyAddr, UBM_LOC_PHY_TO_VRB_PHY_ADDR_NOT_MATCH, (kal_uint32)txQueNo, (kal_uint32)phyAddr);
+ virAddr = ubm_vrb_va[txQueNo][ubm_vrb_pr[txQueNo]];
+ ubm_vrb_pr[txQueNo] = UBM_VRB_NXTP(ubm_vrb_pr[txQueNo]);
+ return virAddr;
+}
+
+void ubm_vrb_virtual_addr_release(void *vrbVirAddr, kal_uint16 relLen)
+{
+ copro_vrb_release(vrbVirAddr, relLen, VRB_USER_USBCORE_TASK);
+}
diff --git a/mcu/service/hif/ubm/src/ubm_xit.c b/mcu/service/hif/ubm/src/ubm_xit.c
new file mode 100644
index 0000000..d4b6d0c
--- /dev/null
+++ b/mcu/service/hif/ubm/src/ubm_xit.c
@@ -0,0 +1,77 @@
+#include "ubm.h"
+#include "ubm_export.h"
+
+typedef struct _ubm_xit_mng
+{
+ usbq_ul_xit *xitBase;
+ kal_uint32 xitMaxCount;
+} ubm_xit_mng;
+
+static ubm_xit_mng ubm_xit_inst[UBM_RX_QUEUE_NUM];
+
+void ubm_xit_init()
+{
+ kal_uint8 xqc = 0;
+
+ for (xqc = 0; xqc < UBM_RX_QUEUE_NUM; ++xqc)
+ {
+ if (xqc == UBM_RX_RB_Q)
+ {
+ hifusbq_get_ul_xit_base(xqc, (void **)&(ubm_xit_inst[xqc].xitBase), &(ubm_xit_inst[xqc].xitMaxCount));
+ }
+ else
+ {
+ ubm_xit_inst[xqc].xitBase = NULL;
+ ubm_xit_inst[xqc].xitMaxCount = 0;
+ }
+ }
+}
+
+kal_bool ubm_xit_release(kal_uint8 rxQueNo, kal_uint16 headIdx, kal_uint32 relCount)
+{
+ rxQueNo &= ~XIT_QUEUE_RX_MASK;
+ EXT_ASSERT(UBM_RX_RB_Q == rxQueNo, UBM_LOC_RELEASE_XIT_INVALID_Q, (kal_uint32)rxQueNo, 0);
+ return hifusbq_ul_xit_release(rxQueNo, headIdx, relCount);
+}
+
+kal_uint32 ubm_xit_poll(kal_uint8 rxQueNo, kal_uint16 *headIdx, kal_uint16 *tailIdx, kal_uint16 *relIdx)
+{
+ rxQueNo &= ~XIT_QUEUE_RX_MASK;
+ EXT_ASSERT(UBM_RX_RB_Q == rxQueNo, UBM_LOC_POLL_XIT_INVALID_Q, (kal_uint32)rxQueNo, 0);
+ return hifusbq_poll_ul_xit(rxQueNo, headIdx, tailIdx, relIdx);
+}
+
+usbq_ul_xit *ubm_xit_idx2addr(kal_uint8 rxQueNo, kal_uint32 xitIndex)
+{
+ rxQueNo &= ~XIT_QUEUE_RX_MASK;
+ EXT_ASSERT(UBM_RX_RB_Q == rxQueNo, UBM_LOC_XIT_IDX_TO_ADDR_INVALID_Q, (kal_uint32)rxQueNo, 0);
+ EXT_ASSERT(xitIndex < ubm_xit_inst[rxQueNo].xitMaxCount, UBM_LOC_XIT_IDX_TO_ADDR_INVALID_IDX, (kal_uint32)xitIndex, ubm_xit_inst[rxQueNo].xitMaxCount);
+ return USBQ_GET_XIT_PTR(rxQueNo, xitIndex);
+}
+
+kal_bool ubm_xit_flush(kal_uint8 rxQueNo, kal_uint32 *headIdx, kal_uint32 *tailIdx, kal_uint32 *num)
+{
+ rxQueNo &= ~XIT_QUEUE_RX_MASK;
+ EXT_ASSERT(UBM_RX_RB_Q == rxQueNo, UBM_LOC_XIT_FLUSH_INVALID_Q, (kal_uint32)rxQueNo, 0);
+ return hifusbq_flush_ul_xit(rxQueNo, headIdx, tailIdx, num);
+}
+
+kal_uint32 ubm_xit_addr2idx(kal_uint8 rxQueNo, usbq_ul_xit *xitPtr)
+{
+ kal_uint32 addrDiff = 0;
+ rxQueNo &= ~XIT_QUEUE_RX_MASK;
+ EXT_ASSERT(UBM_RX_RB_Q == rxQueNo, UBM_LOC_XIT_ADDR_TO_IDX_INVALID_Q, (kal_uint32)rxQueNo, 0);
+ addrDiff = (kal_uint32)xitPtr - (kal_uint32)ubm_xit_inst[rxQueNo].xitBase;
+ EXT_ASSERT(0 == (addrDiff % sizeof(usbq_ul_xit)), UBM_LOC_XIT_ADDR_TO_IDX_INVALID_ADDR, (kal_uint32)rxQueNo, 0);
+ return addrDiff / sizeof(usbq_ul_xit);
+}
+
+kal_uint32 ubm_xit_get_next_idx(kal_uint8 rxQueNo, kal_uint32 xitIndex)
+{
+ kal_uint32 nextIdx = 0;
+ rxQueNo &= ~XIT_QUEUE_RX_MASK;
+ EXT_ASSERT(UBM_RX_RB_Q == rxQueNo, UBM_LOC_XIT_GET_NEXT_IDX_INVALID_Q, (kal_uint32)rxQueNo, 0);
+ nextIdx = (xitIndex + 1) % ubm_xit_inst[rxQueNo].xitMaxCount;
+ hif_data_trace(MD_TRC_UBM_XIT_GET_NEXT_IDX, xitIndex, nextIdx);
+ return nextIdx;
+}