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/*****************************************************************************
* Copyright Statement:
* --------------------
* This software is protected by Copyright and the information contained
* herein is confidential. The software may not be copied and the information
* contained herein may not be used or disclosed except with the written
* permission of MediaTek Inc. (C) 2005
*
* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
*
* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
*
*****************************************************************************/
/*****************************************************************************
*
* Filename:
* ---------
* intrCtrl.h
*
* Project:
* --------
* Maui_Software
*
* Description:
* ------------
* Common type and structure definition for MediaTek GSM/GPRS software
*
* Author:
* -------
* -------
*
*============================================================================
* HISTORY
* Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
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*============================================================================
****************************************************************************/
#ifndef _INTRCTRL_H
#define _INTRCTRL_H
/*******************************************************************************
* Include header files
*******************************************************************************/
#include "kal_general_types.h"
#include "mips_ia_utils_public.h"
#include "us_timer.h"
#include "kal_public_api.h"
#if defined(MT6297)
#include "intrCtrl_MT6297.h"
#endif
#if defined(MT6885)
#include "intrCtrl_MT6885.h"
#endif
#if defined(MT6873)
#include "intrCtrl_MT6873.h"
#endif
#if defined(MT6853)
#include "intrCtrl_MT6853.h"
#endif
#if defined(MT6833)
#include "intrCtrl_MT6833.h"
#endif
#if defined(MT6877)
#include "intrCtrl_MT6877.h"
#endif
#if defined(CHIP10992)
#include "intrCtrl_CHIP10992.h"
#endif
/*******************************************************************************
* Declarations and Definitions
*******************************************************************************/
// CIRQ MPB Statistic Enable Option
#if !defined(__MPB_DISABLE__)
#define __MDCIRQ_MPB_PROFILE__
#endif
#define __ENABLE_SW_TRIGGER_INTERRUPT__
#define EDGE_SENSITIVE KAL_TRUE
#define LEVEL_SENSITIVE KAL_FALSE
#define IRQ_NOT_LISR_CONTEXT (0xFFFF)
#if defined(__CIRQ_MASK_REG_NR_1_NEW__) || defined(__CIRQ_MASK_REG_NR_2_NEW__) || defined(__CIRQ_MASK_REG_NR_3_NEW__) || defined(__CIRQ_MASK_REG_NR_4_NEW__) || defined(__CIRQ_MASK_REG_NR_5_NEW__)
#define __CIRQ_DESIGN_NEW__
#endif
typedef struct CIRQ_MASK_VALUE_STRUCT
{
kal_uint32 irq_mask[12];
} CIRQ_MASK_VALUE_T;
/* To enable SW Trigger Interrupt for new BB chips
Need to modify 3 files
1. add a file intrCtrl_MTxxxx_SW_Handler.h
2. add an entry on intrCtrl_SW_Handler.h
3. modify IRQ_SetSWRegister & IRQ_ResetSWRegister to support BB Chips on intrCtrl.c */
#if defined(__ENABLE_SW_TRIGGER_INTERRUPT__)
typedef enum
{
#define X_SW_HANDLE_CONST(a, b, c) a=(b),
#include "intrCtrl_SW_Handle.h"
#undef X_SW_HANDLE_CONST
SW_HANDLE_END
} SW_CODE_HANDLE;
#define Activate_LISR(code) MDCIRQ_Activate_LISR(code)
#define Deactivate_LISR(code) MDCIRQ_Deactivate_LISR(code)
extern void MDCIRQ_Activate_LISR(SW_CODE_HANDLE code);
extern void MDCIRQ_Deactivate_LISR(SW_CODE_HANDLE code);
extern void MDCIRQ_Activate_LISR_without_ITC(SW_CODE_HANDLE code);
extern void MDCIRQ_Deactivate_LISR_without_ITC(SW_CODE_HANDLE code);
extern const kal_uint16 SW_Code_Handle2Code[NUM_IRQ_SOURCES];
/* Use to translate the mapping between software handler to hardware interrupt code */
#define SW_code_handle2code(a) (a)
extern kal_uint32 SW_INT_Counter[NUM_IRQ_SOURCES];
#endif /* __ENABLE_SW_TRIGGER_INTERRUPT__ */
#define IRQClearInt(vector) MDCIRQ_IRQClearInt(vector)
#define IRQMask(vector) MDCIRQ_IRQMask(vector)
#define IRQUnmask(vector) MDCIRQ_IRQUnmask(vector)
#define IRQSensitivity(vector, e) MDCIRQ_IRQSensitivity(vector, e)
#define IRQ_VPE_SPL_Compare_with_IRQ_Priority(VPE, code) MDCIRQ_VPE_SPL_Compare_with_IRQ_Priority(VPE, code)
extern kal_uint32 SaveAndSetIRQMask(void);
extern void RestoreIRQMask(kal_uint32);
extern void MDCIRQ_IRQClearInt(kal_uint16);
extern void MDCIRQ_IRQMask(kal_uint16);
extern void MDCIRQ_IRQUnmask(kal_uint16);
extern void MDCIRQ_IRQSensitivity(kal_uint16, kal_bool);
extern void initINTR(void);
extern kal_uint32 IRQMask_Status(kal_uint16 code);
extern kal_uint32 IRQ_Status(void);
#if defined(__MAUI_BASIC__) || !defined(__MTK_TARGET__)
#define IRQ_Register_LISR(code, lisr, description) \
MDCIRQ_IRQ_Register_LISR(code, (void*)lisr, description)
extern void MDCIRQ_IRQ_Register_LISR(kal_uint16 code, void (*reg_lisr)(kal_uint32 vector), char* description);
#endif
#define NRIRQ_Affinity_Change_NSA() MDCIRQ_Runtime_Change_NRIRQ_Affinity_NSA()
#define NRIRQ_Affinity_Change_SA() MDCIRQ_Runtime_Change_NRIRQ_Affinity_SA()
extern void MDCIRQ_Runtime_Change_NRIRQ_Affinity_NSA();
extern void MDCIRQ_Runtime_Change_NRIRQ_Affinity_SA();
#define LTEIRQ_Affinity_Change_ENDC() MDCIRQ_Runtime_Change_LTEIRQ_Affinity_ENDC()
#define LTEIRQ_Affinity_Change_LTEONLY() MDCIRQ_Runtime_Change_LTEIRQ_Affinity_LTEONLY()
extern void MDCIRQ_Runtime_Change_LTEIRQ_Affinity_ENDC();
extern void MDCIRQ_Runtime_Change_LTEIRQ_Affinity_LTEONLY();
extern void initVPEIRQ(void);
extern kal_uint32 sst_dhl_irq_count[];
extern kal_uint32 sst_dhl_irq_caller[];
extern kal_uint32 DHLIrqCounter[];
extern kal_int32 INC_Initialize_State;
typedef enum
{
#define IRQ_PRIORITY_CONST(a) a##_PRIORITY,
#include "irqPriority.h"
#undef IRQ_PRIORITY_CONST
IRQ_PRIORITY_END,
#if defined __MIPS_I7200__
IRQ_HRT_PRIORITY_THRESHOLD = IRQ_SW_LISR40_CODE_PRIORITY + 1,
IRQ_EQUALLY_DISPATCH_PRIORITY_THRESHOLD = IRQ_L1M_PHY_LTMR_INFORM_DONE_IRQ5_CODE_PRIORITY,
#else /* MT6297_IA */
IRQ_NORMAL_DOMAIN_HRT_PRIORITY_THRESHOLD = IRQ_SW_LISR40_CODE_PRIORITY + 1,
#endif
} IRQ_PRIORITY;
typedef enum {
MDCIRQ_To_BUS_Normal = 0x0,
MDCIRQ_To_BUS_PreUltra = 0x1,
MDCIRQ_To_BUS_Ultra =0x2,
} MDCIRQ_Bus_QoS_Signal;
/***********************************
NOTE:
1. below API is only for L1 logging, please not use
2. if you want to use, please confirm with CIRQ owner first
***********************************/
#define IF_DI_OR_LISR() (Ibit_Status()==0 || kal_if_lisr())
/***********************************
NOTE:
1. below API is only for L2 logging, please not use
2. if you want to use, please confirm with CIRQ owner first
***********************************/
#define __IRQ_LOCK_WITHOUT_CHECK__
// #define __NESTED_DI_CHECK__
#if defined(__L2_LOGGING_IRQ_LOC__)
#if defined(__IRQ_LOCK_WITHOUT_CHECK__) && (defined(__MIPS_IA__) || defined(__MIPS_I7200__))
#if defined(__NESTED_DI_CHECK__) && !defined (__ESL_MASE_GEN97__)
#define LOCK_CPU_INTERRUPT(oldmask, newmask) \
do{\
kal_uint32 vpe_num = 0;\
miu_mt_dmt();\
__asm__ __volatile__\
(\
"di %0\n\t"\
"ehb\n\t"\
:"=&r"(oldmask), "=&r"(newmask)\
:\
:"$31","memory"\
);\
oldmask &= 0x1;\
vpe_num = miu_get_current_vpe_id();\
sst_dhl_irq_count[vpe_num]++;\
sst_dhl_irq_caller[vpe_num] = (kal_uint32)__builtin_return_address(0);\
DHLIrqCounter[vpe_num] = ust_get_current_time();\
} while(0)
#define UNLOCK_CPU_INTERRUPT(oldmask) \
do{\
kal_uint32 tmp=1;\
sst_dhl_irq_count[miu_get_current_vpe_id()]--;\
__asm__ __volatile__\
(\
"bne %0, %1, END\n\t"\
"ei\n\t"\
"ehb\n\t"\
"END:emt\n\t"\
"ehb\n\t"\
:\
:"r"(oldmask), "r"(tmp)\
:"memory"\
);\
} while(0)
#else
#define LOCK_CPU_INTERRUPT(oldmask, newmask) \
do{\
miu_mt_dmt();\
__asm__ __volatile__\
(\
"di %0\n\t"\
"ehb\n\t"\
:"=&r"(oldmask), "=&r"(newmask)\
:\
:"$31","memory"\
);\
oldmask &= 0x1;\
} while(0)
#define UNLOCK_CPU_INTERRUPT(oldmask) \
do{\
kal_uint32 tmp=1;\
__asm__ __volatile__\
(\
"bne %0, %1, END\n\t"\
"ei\n\t"\
"ehb\n\t"\
"END:emt\n\t"\
"ehb\n\t"\
:\
:"r"(oldmask), "r"(tmp)\
:"memory"\
);\
} while(0)
#endif
#else
#define LOCK_CPU_INTERRUPT(oldmask, newmask) \
do{ \
oldmask = kal_hrt_SaveAndSetIRQMask(); \
}while(0);
#define UNLOCK_CPU_INTERRUPT(oldmask) \
do{ \
kal_hrt_RestoreIRQMask(oldmask); \
}while(0);
#endif
#endif
#endif /* _INTRCTRL_H */