| /***************************************************************************** |
| * Copyright Statement: |
| * -------------------- |
| * This software is protected by Copyright and the information contained |
| * herein is confidential. The software may not be copied and the information |
| * contained herein may not be used or disclosed except with the written |
| * permission of MediaTek Inc. (C) 2005 |
| * |
| * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES |
| * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") |
| * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON |
| * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, |
| * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF |
| * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT. |
| * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE |
| * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR |
| * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH |
| * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO |
| * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S |
| * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM. |
| * |
| * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE |
| * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, |
| * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, |
| * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO |
| * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. |
| * |
| * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE |
| * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF |
| * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND |
| * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER |
| * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC). |
| * |
| *****************************************************************************/ |
| #ifndef NVRAM_CACHE_TASK_INTERFACE_H |
| #define NVRAM_CACHE_TASK_INTERFACE_H |
| |
| #ifdef __cplusplus |
| extern "C" |
| { |
| #endif /* __cplusplus */ |
| |
| #include "kal_general_types.h" |
| #include "kal_trace.h" |
| #include "kal_public_api.h" |
| #include "nvram_defs.h" |
| #include "nvram_config.h" |
| #include "nvram_internal.h" |
| #include "kal_public_defs.h" |
| #include "kal_public_defs.h" //MSBB change #include "stack_config.h" |
| #include "nvram_ltable.h" |
| #include "custom_nvram_sec.h" |
| #include "nvram_sec.h" |
| #include "nvram_util.h" |
| #include "nvram_drval_fat.h" |
| #include "nvram_data_items.h" |
| #include "nvram_group_def.h" //add for break group files from header file |
| #include "nvram_lid_statistics.h" |
| #include "nvram_multi_folder.h" |
| #include "nvram_trc.h" |
| #include "nvram_io.h" |
| #include "nvram_errcode.h" |
| #include "nvram_interface.h" |
| #include "nvram_ilm.h" |
| #include "nvram_internal.h" |
| #include "nvram_cache.h" |
| #include "nvram_cache_info.h" |
| #include "nvram_main.h" |
| /* Add pseudo merge headfile */ |
| #ifdef __NVRAM_PSEUDO_MERGE__ |
| #include "nvram_pseudo_merge.h" |
| #endif |
| |
| #ifdef __NVRAM_COMPRESS_SUPPORT__ |
| #include "nvram_unzip.h" |
| #endif |
| |
| #if defined(__NVRAM_MONITOR_ENABLED__) |
| #include "nvram_handler_monitor.h" |
| #endif |
| |
| #include "mcf_enum.h" |
| #include "mcf_if.h" |
| |
| #include "cache_sw.h" |
| |
| extern const checksum_reset_struct lid_structure_chksum[]; |
| extern const checksum_reset_struct lid_default_value_chksum[]; |
| extern kal_uint32 lid_structure_chksum_num; |
| extern kal_uint32 lid_default_value_chksum_num; |
| |
| //extern nvram_lid_cache_table_struct cache_info_table[]; |
| |
| #define MD_CCCI_LIMIT_SIZE (1024*15 + 256*3) |
| |
| #define NVRAM_CACHE_ADDRESS_ALIGNMENT_FLOOR(x) ((x) & (~(CPU_CACHE_LINE_SIZE-1))) |
| #define NVRAM_CACHE_SIZE_ALIGNMENT_CEILING(x) (((x) + CPU_CACHE_LINE_SIZE - 1) & (~(CPU_CACHE_LINE_SIZE-1))) |
| |
| |
| extern kal_mutexid g_nvram_cache_mutex; |
| extern kal_mutexid g_nvram_fs_mutex; |
| #ifdef __NVRAM_LID_PREREAD__ |
| extern kal_uint16 preread_white_list_amount; |
| extern kal_uint16 prewrite_white_list_amount; |
| extern kal_uint32 pre_read_white_list[]; |
| extern kal_uint32 pre_write_white_list[]; |
| #endif |
| |
| |
| |
| extern kal_bool mark_nvram_cache_ready(void); |
| extern kal_bool unmark_nvram_cache_ready(void); |
| extern kal_bool check_nvram_cache_ready(void); |
| extern kal_bool check_nvram_cache_initialized(void); |
| extern kal_bool nvram_cache_reset(void); |
| |
| extern kal_bool get_lid_cache_index_item(nvram_lid_enum LID, nvram_lid_cache_table_struct** cache_ldi); |
| extern nvram_errno_enum get_lid_cache_base_address(nvram_ltable_entry_struct* ldi, kal_uint32* cache_offset); |
| extern nvram_errno_enum get_lid_record_cache_offset(nvram_ltable_entry_struct* ldi, kal_uint16 rec_index, kal_uint32 section_size, kal_uint32* cache_offset); |
| extern nvram_errno_enum nvram_write_data_to_cache(nvram_ltable_entry_struct* ldi, void* src_buffer, kal_uint32 size, kal_uint32 cache_offset); |
| extern nvram_errno_enum nvram_read_data_from_cache(nvram_ltable_entry_struct* ldi, NVRAM_FS_PARAM_CMPT_T *nvram_param); |
| extern kal_bool nvram_read_header_from_cache(nvram_ltable_entry_struct* ldi, void* buffer, kal_uint32 buffer_size, kal_uint32 cache_offset); |
| extern nvram_errno_enum nvram_cache_reset_one_data_item(nvram_ltable_entry_struct* ldi, kal_uint16 rec_index, kal_uint16 rec_amount); |
| extern nvram_errno_enum update_cache_data(nvram_ltable_entry_struct* ldi, kal_uint16 rec_index, kal_uint16 rec_amount, NVRAM_FS_PARAM_CMPT_T* nvram_param, kal_bool is_only_chksum); |
| extern nvram_errno_enum update_cache_header(nvram_ltable_entry_struct* ldi, void* src_buffer, kal_uint32 ldi_hd_offset, kal_uint32 ldi_hd_buffer_size); |
| extern nvram_errno_enum nvram_flush_cache_data_to_file(nvram_cache_write_item* cache_queue_ldi); |
| extern kal_bool nvram_flush_cache_handler(void); |
| extern nvram_drv_status_enum nvram_drv_fat_write_cache_section(const kal_uint8 *buffer, kal_uint16 rec_index, kal_uint16 rec_amount, kal_uint32 rec_size,nvram_ltable_entry_struct *ldi); |
| extern nvram_drv_status_enum nvram_drv_fat_write_multiRec_to_cache(const kal_uint8 *buffer, kal_uint16 rec_index, kal_uint16 rec_amount, kal_uint32 rec_size, nvram_ltable_entry_struct *ldi); |
| extern kal_bool set_reset_flag_by_ltable_entry(nvram_ltable_entry_struct* ldi); |
| |
| /** |
| * dirty or valid bit |
| */ |
| extern kal_bool check_valid_bit_by_ltable_entry(nvram_ltable_entry_struct* ldi, kal_uint16 rec_index); |
| extern kal_bool check_dirty_bit_by_ltable_entry(nvram_ltable_entry_struct* ldi, kal_uint16 rec_index); |
| extern kal_bool check_valid_bit_by_cache_table(nvram_lid_cache_table_struct* cache_ldi, kal_uint16 rec_index); |
| extern kal_bool check_dirty_bit_by_cache_table(nvram_lid_cache_table_struct* cache_ldi, kal_uint16 rec_index); |
| extern kal_bool mask_dirty_bit_by_ltable_entry(nvram_ltable_entry_struct* ldi, kal_uint16 rec_index, kal_uint16 rec_amount); |
| extern kal_bool unmask_dirty_bit_by_ltable_entry(nvram_ltable_entry_struct* ldi, kal_uint16 rec_index, kal_uint16 rec_amount); |
| extern kal_bool mask_valid_bit_by_ltable_entry(nvram_ltable_entry_struct* ldi, kal_uint16 rec_index, kal_uint16 rec_amount); |
| extern kal_bool unmask_valid_bit_by_ltable_entry(nvram_ltable_entry_struct* ldi, kal_uint16 rec_index, kal_uint16 rec_amount); |
| extern kal_bool mask_dirty_bit_by_cache_table(nvram_lid_cache_table_struct* cache_ldi, kal_uint16 rec_index, kal_uint16 rec_amount); |
| extern kal_bool unmask_dirty_bit_by_cache_table(nvram_lid_cache_table_struct* cache_ldi, kal_uint16 rec_index, kal_uint16 rec_amount); |
| extern kal_bool mask_valid_bit_by_cache_table(nvram_lid_cache_table_struct* cache_ldi, kal_uint16 rec_index, kal_uint16 rec_amount); |
| extern kal_bool unmask_valid_bit_by_cache_table(nvram_lid_cache_table_struct * cache_ldi, kal_uint16 rec_index, kal_uint16 rec_amount); |
| |
| |
| |
| /** |
| * cache queue interface |
| */ |
| extern kal_int32 nvram_cache_queue_usage_rates(void); |
| extern kal_bool nvram_cache_queue_full(void); |
| extern kal_bool nvram_cache_queue_empty(void); |
| extern kal_bool nvram_cache_enqueue(nvram_ltable_entry_struct* ldi, kal_uint16 rec_index, kal_uint16 rec_amount, kal_uint32 openOption); |
| extern kal_bool nvram_cache_dequeue(nvram_cache_write_item *cache_queue_ldi); |
| kal_bool nvram_cache_queue_init(void); |
| |
| /** |
| *NVRAM CACHE event |
| */ |
| extern kal_eventgrpid nvram_cache_event_init(void); |
| extern kal_status nvram_cache_retrieve_event(void); |
| extern kal_status send_event_to_nvram_cache(void); |
| |
| /** |
| *NVRAM pre-read function interface |
| */ |
| #ifdef __NVRAM_LID_PREREAD__ |
| extern kal_bool Is_in_prewrite_white_list(nvram_lid_enum LDI); |
| extern nvram_errno_enum nvram_pre_read_white_list_lid(void); |
| #endif |
| extern kal_bool Is_in_preread_white_list(nvram_lid_enum LDI); |
| |
| /** |
| *NVRAM CACHE White list |
| */ |
| extern kal_bool Is_in_bypass_cache_w_list(nvram_lid_enum LID); |
| |
| /** |
| *NVRAM Non-CACHE List |
| */ |
| extern kal_bool is_in_noncache_list(nvram_lid_enum LID); |
| |
| #define NVRAM_RD_WITH_CACHE(LID) ((KAL_FALSE == is_in_noncache_list(LID)) && (check_nvram_cache_ready() || (check_nvram_cache_initialized()&& (KAL_TRUE == kal_query_systemInit()) && ((KAL_TRUE == Is_in_preread_white_list(LID)) || (KAL_TRUE == Is_in_bypass_cache_w_list(LID)))))) |
| #define NVRAM_WR_WITH_CACHE(LID) ((KAL_FALSE == Is_in_bypass_cache_w_list(LID) && (KAL_FALSE == is_in_noncache_list(LID))) && check_nvram_cache_ready()) |
| #define NVRAM_WR_2_FILE_WITH_2_CACHE(LID) ((KAL_FALSE == is_in_noncache_list(LID)) && check_nvram_cache_initialized() && ((KAL_TRUE == Is_in_bypass_cache_w_list(LID)) || ((KAL_TRUE == kal_query_systemInit()) && (KAL_TRUE == Is_in_preread_white_list(LID))))) |
| #define NVRAM_FLUSH_CACHE_CHECK(LID) (Is_in_bypass_cache_w_list(LID) || is_in_noncache_list(LID)) |
| |
| #ifdef __cplusplus |
| } |
| #endif |
| |
| #endif /* NVRAM_CACHE_TASK_INTERFACE_H */ |
| |