Gitiles
Code Review Sign In
192.168.1.100 / T800_MD / 04730939d77d4b1fce91df3083777d88f0b04c4a / . / mcu / custom / driver / common / adc_nvram_def.c
blob: b1cce8e86b5a553ca8f8cdc2fd8dd36b7939efb7 [file] [log] [blame]
rjw6c1fd8f2022-11-30 14:33:01 +0800[diff] [blame]1/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2005
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36/*****************************************************************************
37 *
38 * Filename:
39 * ---------
40 * adc_nvram_def.c
41 *
42 * Project:
43 * --------
44 * MAUI
45 *
46 * Description:
47 * ------------
48 * This file contains `vendor' defined logical data items stored in NVRAM.
49 * These logical data items are used in object code of Protocol Stack software.
50 *
51 * As for customizable logical data items, they are defined in nvram_user_config.c
52 *
53 * Author:
54 * -------
55 *
56 *
57 *============================================================================
58 * HISTORY
59 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
60 *------------------------------------------------------------------------------
61 * removed!
62 *
63 * removed!
64 * removed!
65 * removed!
66 *
67 * removed!
68 * removed!
69 * removed!
70 *
71 * removed!
72 * removed!
73 *
74 * removed!
75 * removed!
76 * removed!
77 *
78 * removed!
79 * removed!
80 * removed!
81 *
82 *
83 *
84 *------------------------------------------------------------------------------
85 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
86 *============================================================================
87 ****************************************************************************/
88#ifndef NVRAM_NOT_PRESENT
89
90
91/*
92 * Include Headers
93 */
94
95#include "kal_general_types.h"
96
97/*
98 * NVRAM Basic Headers
99 */
100#ifdef NVRAM_AUTO_GEN
101#include "nvram_auto_gen.h"
102#endif
103
104#include "nvram_enums.h"
105
106#define NVRAM_LID_SPLIT
107#include "nvram_defs.h"
108
109#include "nvram_data_items.h"
110
111/*
112 * User Headers & Default value
113 */
114#include "adc_nvram_def.h"
115#include "drv_features_adc.h"
116
117#if !defined(DRV_ADC_OFF)
118static kal_int32 const NVRAM_EF_ADC_DEFAULT[] = {
119#if defined(DRV_ADC_MAX_CH_1)
120 ADC_CALIBRATION_SLOPE_CH0,
121 ADC_CALIBRATION_OFFSET_CH0
122#elif defined(DRV_ADC_MAX_CH_5)
123 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
124 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4
125#elif defined(DRV_ADC_MAX_CH_6)
126 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
127 ADC_CALIBRATION_SLOPE_CH5,
128 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
129 ADC_CALIBRATION_OFFSET_CH5
130#elif defined(DRV_ADC_MAX_CH_7)
131 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
132 ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6,
133 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
134 ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6
135#elif defined(DRV_ADC_MAX_CH_8)
136 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
137 ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7,
138 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
139 ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7
140#elif defined(DRV_ADC_MAX_CH_9)
141 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
142 ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,
143 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
144 ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8
145#elif defined(DRV_ADC_MAX_CH_10)
146 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
147 ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
148 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
149 ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9
150#elif defined(DRV_ADC_MAX_CH_11)
151 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
152 ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
153 ADC_CALIBRATION_SLOPE_CH10,
154 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
155 ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
156 ADC_CALIBRATION_OFFSET_CH10
157#elif defined(DRV_ADC_MAX_CH_12)
158 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
159 ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
160 ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11,
161 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
162 ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
163 ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11
164#elif defined(DRV_ADC_MAX_CH_13) //12 bits use small slope
165 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
166 ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
167 ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12,
168 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
169 ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
170 ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12
171#elif defined(DRV_ADC_MAX_CH_14)
172 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
173 ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
174 ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12, ADC_CALIBRATION_SLOPE_CH13,
175 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
176 ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
177 ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12, ADC_CALIBRATION_OFFSET_CH13
178#elif defined(DRV_ADC_MAX_CH_15)
179 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
180 ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
181 ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12, ADC_CALIBRATION_SLOPE_CH13, ADC_CALIBRATION_SLOPE_CH14,
182 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
183 ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
184 ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12, ADC_CALIBRATION_OFFSET_CH13, ADC_CALIBRATION_OFFSET_CH14
185#elif defined(DRV_ADC_MAX_CH_16)
186 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
187 ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
188 ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12, ADC_CALIBRATION_SLOPE_CH13, ADC_CALIBRATION_SLOPE_CH14,
189 ADC_CALIBRATION_SLOPE_CH15,
190 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
191 ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
192 ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12, ADC_CALIBRATION_OFFSET_CH13, ADC_CALIBRATION_OFFSET_CH14,
193 ADC_CALIBRATION_OFFSET_CH15
194#elif defined(DRV_ADC_MAX_CH_17)
195 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
196 ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
197 ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12, ADC_CALIBRATION_SLOPE_CH13, ADC_CALIBRATION_SLOPE_CH14,
198 ADC_CALIBRATION_SLOPE_CH15, ADC_CALIBRATION_SLOPE_CH16,
199 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
200 ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
201 ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12, ADC_CALIBRATION_OFFSET_CH13, ADC_CALIBRATION_OFFSET_CH14,
202 ADC_CALIBRATION_OFFSET_CH15,ADC_CALIBRATION_OFFSET_CH16
203#elif defined(DRV_ADC_MAX_CH_18)
204 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
205 ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
206 ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12, ADC_CALIBRATION_SLOPE_CH13, ADC_CALIBRATION_SLOPE_CH14,
207 ADC_CALIBRATION_SLOPE_CH15, ADC_CALIBRATION_SLOPE_CH16, ADC_CALIBRATION_SLOPE_CH17,
208 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
209 ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
210 ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12, ADC_CALIBRATION_OFFSET_CH13, ADC_CALIBRATION_OFFSET_CH14,
211 ADC_CALIBRATION_OFFSET_CH15,ADC_CALIBRATION_OFFSET_CH16, ADC_CALIBRATION_OFFSET_CH17
212#elif defined(DRV_ADC_MAX_CH_19)
213 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
214 ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
215 ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12, ADC_CALIBRATION_SLOPE_CH13, ADC_CALIBRATION_SLOPE_CH14,
216 ADC_CALIBRATION_SLOPE_CH15, ADC_CALIBRATION_SLOPE_CH16, ADC_CALIBRATION_SLOPE_CH17, ADC_CALIBRATION_SLOPE_CH18,
217 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
218 ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
219 ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12, ADC_CALIBRATION_OFFSET_CH13, ADC_CALIBRATION_OFFSET_CH14,
220 ADC_CALIBRATION_OFFSET_CH15,ADC_CALIBRATION_OFFSET_CH16, ADC_CALIBRATION_OFFSET_CH17, ADC_CALIBRATION_OFFSET_CH18
221#elif defined(DRV_ADC_MAX_CH_20)
222 ADC_CALIBRATION_SLOPE_CH0, ADC_CALIBRATION_SLOPE_CH1, ADC_CALIBRATION_SLOPE_CH2, ADC_CALIBRATION_SLOPE_CH3, ADC_CALIBRATION_SLOPE_CH4,
223 ADC_CALIBRATION_SLOPE_CH5, ADC_CALIBRATION_SLOPE_CH6, ADC_CALIBRATION_SLOPE_CH7, ADC_CALIBRATION_SLOPE_CH8,ADC_CALIBRATION_SLOPE_CH9,
224 ADC_CALIBRATION_SLOPE_CH10, ADC_CALIBRATION_SLOPE_CH11, ADC_CALIBRATION_SLOPE_CH12, ADC_CALIBRATION_SLOPE_CH13, ADC_CALIBRATION_SLOPE_CH14,
225 ADC_CALIBRATION_SLOPE_CH15, ADC_CALIBRATION_SLOPE_CH16, ADC_CALIBRATION_SLOPE_CH17, ADC_CALIBRATION_SLOPE_CH18, ADC_CALIBRATION_SLOPE_CH19,
226 ADC_CALIBRATION_OFFSET_CH0, ADC_CALIBRATION_OFFSET_CH1, ADC_CALIBRATION_OFFSET_CH2, ADC_CALIBRATION_OFFSET_CH3, ADC_CALIBRATION_OFFSET_CH4,
227 ADC_CALIBRATION_OFFSET_CH5, ADC_CALIBRATION_OFFSET_CH6, ADC_CALIBRATION_OFFSET_CH7, ADC_CALIBRATION_OFFSET_CH8,ADC_CALIBRATION_OFFSET_CH9,
228 ADC_CALIBRATION_OFFSET_CH10,ADC_CALIBRATION_OFFSET_CH11, ADC_CALIBRATION_OFFSET_CH12, ADC_CALIBRATION_OFFSET_CH13, ADC_CALIBRATION_OFFSET_CH14,
229 ADC_CALIBRATION_OFFSET_CH15,ADC_CALIBRATION_OFFSET_CH16, ADC_CALIBRATION_OFFSET_CH17, ADC_CALIBRATION_OFFSET_CH18, ADC_CALIBRATION_OFFSET_CH19
230#endif // #if defined(DRV_ADC_MAX_CH_5)
231
232};
233
234
235
236/*
237 * LID table
238 */
239ltable_entry_struct logical_data_item_table_adc[] =
240{
241 {
242 NVRAM_EF_ADC_LID,
243 NVRAM_EF_ADC_TOTAL,
244 NVRAM_EF_ADC_SIZE,
245 NVRAM_NORMAL((kal_uint8 const *)NVRAM_EF_ADC_DEFAULT),
246 NVRAM_CATEGORY_CALIBRAT,
247 NVRAM_ATTR_AVERAGE,
248 "AD1F",
249 VER(NVRAM_EF_ADC_LID)
250 }
251};
252
253#endif //#if !defined(DRV_ADC_OFF)
254
255#endif /* NVRAM_NOT_PRESENT */