rjw | 6c1fd8f | 2022-11-30 14:33:01 +0800 | [diff] [blame] | 1 | #include "eint_sw.h" |
| 2 | #include "eint_hw.h" |
| 3 | #include "kal_general_types.h" |
| 4 | |
| 5 | /** |
| 6 | * @brief set the polarity parameter of the eint |
| 7 | * @param eint : the eint index to be set |
| 8 | * @param pol : the polarity value to set, it should be 0~1 |
| 9 | * 0: set pol to negative polarity |
| 10 | * 1: set pol to positive polarity |
| 11 | * @return EINT_OK : set successful, EINT_FAIL : set failed |
| 12 | */ |
| 13 | kal_int32 eint_set_pol(eint_e eint, kal_uint32 pol) |
| 14 | { |
| 15 | if(eint >= EINT_NUM) |
| 16 | { |
| 17 | EINT_PRINT("\tset eint pol failed,eint is:[%d]",eint); |
| 18 | return EINT_FAIL; |
| 19 | } |
| 20 | if(EINT_POSITIVE_POLARITY == pol) |
| 21 | { |
| 22 | REG32_WRITE(GPIOMUX_EINT_POL_SET,(1 << eint)); |
| 23 | } |
| 24 | else |
| 25 | { |
| 26 | REG32_WRITE(GPIOMUX_EINT_POL_CLR,(1 << eint)); |
| 27 | } |
| 28 | |
| 29 | return EINT_OK; |
| 30 | } |
| 31 | |
| 32 | /** |
| 33 | * @brief get eint polarity value of eint |
| 34 | * @param eint : The eint to be read. |
| 35 | * @return return the eint polarity parameter's value of eint |
| 36 | * 0: current is negative polarity |
| 37 | * 1: current is positive polarity |
| 38 | * EINT_FAIL: eint is out of range |
| 39 | */ |
| 40 | kal_int32 gpio_get_eint_pol(eint_e eint) |
| 41 | { |
| 42 | kal_uint32 pol; |
| 43 | if(eint >= EINT_NUM) |
| 44 | { |
| 45 | EINT_PRINT("\t gpio set eint pol failed,eint is:[%d]",eint); |
| 46 | return EINT_FAIL; |
| 47 | } |
| 48 | if(REG32(GPIOMUX_EINT_POL)&(1<<eint)) |
| 49 | { |
| 50 | pol = EINT_POSITIVE_POLARITY; |
| 51 | } |
| 52 | else |
| 53 | { |
| 54 | pol = EINT_NEGATIVE_POLARITY; |
| 55 | } |
| 56 | return pol; |
| 57 | } |
| 58 | |
| 59 | |
| 60 | |
| 61 | /** |
| 62 | * @brief set the debounce enable parameter of the eint |
| 63 | * @param eint : the eint index to be set |
| 64 | * @param debounce_en : the debounce enable value to set, it should be 0~1 |
| 65 | * 0: enable debounce function |
| 66 | * 1: disable debounce function |
| 67 | * @return EINT_OK : set successful, EINT_FAIL : set failed |
| 68 | */ |
| 69 | kal_int32 eint_set_debounce_enable(eint_e eint, kal_uint32 debounce_en) |
| 70 | { |
| 71 | if(eint >= EINT_NUM) |
| 72 | { |
| 73 | EINT_PRINT("\tset eint debounce failed,eint is:[%d]",eint); |
| 74 | return EINT_FAIL; |
| 75 | } |
| 76 | if(EINT_ENABLE == debounce_en) |
| 77 | { |
| 78 | REG32_WRITE(GPIOMUX_EINT_DB_EN_SET,(1 << eint)); |
| 79 | while(!(REG32(GPIOMUX_EINT_DBNCSTS) & (1<<eint))); |
| 80 | } |
| 81 | else |
| 82 | { |
| 83 | REG32_WRITE(GPIOMUX_EINT_DB_EN_CLR,(1 << eint)); |
| 84 | while((REG32(GPIOMUX_EINT_DBNCSTS) & (1<<eint))); |
| 85 | } |
| 86 | return EINT_OK; |
| 87 | } |
| 88 | |
| 89 | /** |
| 90 | * @brief set the debounce duration parameter of the eint |
| 91 | * @param eint : the eint index to be set |
| 92 | * @param duration : the debounce duration value to set, it should be 0~0x3fff |
| 93 | * @return EINT_OK : set successful, EINT_FAIL : set failed |
| 94 | */ |
| 95 | kal_int32 eint_set_debounce_duration(eint_e eint, kal_uint32 duration) |
| 96 | { |
| 97 | volatile unsigned int *reg_addr; |
| 98 | if(eint >= EINT_NUM) |
| 99 | { |
| 100 | EINT_PRINT("\tset eint debounce failed,eint is:[%d]",eint); |
| 101 | return EINT_FAIL; |
| 102 | } |
| 103 | |
| 104 | if(duration > EINT_DB_DUR_MAX) |
| 105 | { |
| 106 | EINT_PRINT("\tset eint debounce failed,debounce duration:[%x] is out of range",duration); |
| 107 | return EINT_FAIL; |
| 108 | } |
| 109 | else |
| 110 | { |
| 111 | reg_addr = (volatile unsigned int *)((unsigned int)GPIOMUX_EINT_DUR0 + 4*eint); |
| 112 | REG32_WRITE(reg_addr,duration); |
| 113 | } |
| 114 | |
| 115 | return EINT_OK; |
| 116 | } |
| 117 | |
| 118 | /** |
| 119 | * @brief set the irqen parameter of the eint |
| 120 | * @param eint : the eint index to be set |
| 121 | * @param enable : the irq enable register value to set, it should be 0~1 |
| 122 | * 0: disable eint irq send to cirq/gic module |
| 123 | * 1: enable eint irq send to cirq/gic module |
| 124 | * @return EINT_OK : set successful, EINT_FAIL : set failed |
| 125 | */ |
| 126 | kal_int32 eint_set_irqen(eint_e eint,kal_uint32 enable) |
| 127 | { |
| 128 | if(eint >= EINT_NUM) |
| 129 | { |
| 130 | EINT_PRINT("\tset eint irqen failed,eint is:[%d]",eint); |
| 131 | return EINT_FAIL; |
| 132 | } |
| 133 | if(EINT_ENABLE == enable) |
| 134 | { |
| 135 | REG32_WRITE(GPIOMUX_EINT_IRQEN_SET,(1<<eint)); |
| 136 | } |
| 137 | else if(EINT_DISABLE == enable) |
| 138 | { |
| 139 | REG32_WRITE(GPIOMUX_EINT_IRQEN_CLR,(1<<eint)); |
| 140 | } |
| 141 | else |
| 142 | { |
| 143 | EINT_ERR("\tThe irq enable value should be 0 or 1 !!!!"); |
| 144 | return EINT_FAIL; |
| 145 | } |
| 146 | |
| 147 | return EINT_OK; |
| 148 | } |
| 149 | |
| 150 | void eint_set_mask_all(kal_uint32 mask_bits) |
| 151 | { |
| 152 | REG32_WRITE(GPIOMUX_EINT_IRQEN_CLR,mask_bits); |
| 153 | } |
| 154 | |
| 155 | void eint_set_unmask_all(kal_uint32 unmask_bits) |
| 156 | { |
| 157 | REG32_WRITE(GPIOMUX_EINT_IRQEN_SET,unmask_bits); |
| 158 | } |
| 159 | |
| 160 | |
| 161 | /** |
| 162 | * @brief get eint debounce enable value of eint |
| 163 | * @param eint : The eint to be read. |
| 164 | * @return return the eint debounce parameter's value of eint |
| 165 | * 0: current debounce is disable |
| 166 | * 1: current debounce is enable |
| 167 | * EINT_FAIL: eint is out of range |
| 168 | */ |
| 169 | kal_int32 eint_get_debounce_enable(eint_e eint) |
| 170 | { |
| 171 | kal_uint32 debounce; |
| 172 | if(eint >= EINT_NUM) |
| 173 | { |
| 174 | EINT_PRINT("\tset eint debounce failed,eint is:[%d]",eint); |
| 175 | return EINT_FAIL; |
| 176 | } |
| 177 | if(REG32(GPIOMUX_EINT_DB_EN)&(1<<eint)) |
| 178 | { |
| 179 | debounce = EINT_ENABLE; |
| 180 | } |
| 181 | else |
| 182 | { |
| 183 | debounce = EINT_DISABLE; |
| 184 | } |
| 185 | return debounce; |
| 186 | } |
| 187 | |
| 188 | /** |
| 189 | * @brief get eint IRQEN value of eint |
| 190 | * @return return the eint debounce parameter's value of eint |
| 191 | * 0: current eint is unmask |
| 192 | * 1: current eint is mask |
| 193 | * EINT_FAIL: eint is out of range |
| 194 | */ |
| 195 | kal_int32 eint_get_irqen(void) |
| 196 | { |
| 197 | kal_uint32 irqen; |
| 198 | |
| 199 | irqen = REG32(GPIOMUX_EINT_IRQEN); |
| 200 | irqen &= ((1<<EINT_TOTAL_CHANNEL) - 1); |
| 201 | return irqen; |
| 202 | } |
| 203 | |
| 204 | |
| 205 | /** |
| 206 | * @brief set the sensitivity parameter of the eint |
| 207 | * @param eint : the eint index to be set |
| 208 | * @param type : the sensitivity value to set, it should be 0~1 |
| 209 | * 0: set sensitivity to edge(pulse) |
| 210 | * 1: set sensitivity to level |
| 211 | * @return EINT_OK : set successful, EINT_FAIL : set failed |
| 212 | */ |
| 213 | kal_int32 eint_set_type(eint_e eint, kal_uint32 type) |
| 214 | { |
| 215 | if(eint >= EINT_NUM) |
| 216 | { |
| 217 | EINT_PRINT("\tset eint pol failed,eint is:[%d]",eint); |
| 218 | return EINT_FAIL; |
| 219 | } |
| 220 | if(EINT_LEVEL_SENSITIVITY == type) |
| 221 | { |
| 222 | REG32_WRITE(GPIOMUX_EINT_TYPE_SET,(1 << eint)); |
| 223 | } |
| 224 | else |
| 225 | { |
| 226 | REG32_WRITE(GPIOMUX_EINT_TYPE_CLR,(1 << eint)); |
| 227 | } |
| 228 | |
| 229 | return EINT_OK; |
| 230 | } |
| 231 | |
| 232 | /** |
| 233 | * @brief get eint type parameter's value of eint |
| 234 | * @param eint : The eint to be read. |
| 235 | * @return return the eint type parameter's value of eint |
| 236 | * 0: current is edge(pulse) sensitivity |
| 237 | * 1: current is level sensitivity |
| 238 | * EINT_FAIL: eint is out of range |
| 239 | */ |
| 240 | kal_int32 gpio_get_eint_type(eint_e eint) |
| 241 | { |
| 242 | kal_int32 eint_type; |
| 243 | if(eint >= EINT_NUM) |
| 244 | { |
| 245 | EINT_PRINT("\t gpio set eint pol failed,eint is:[%d]",eint); |
| 246 | return EINT_FAIL; |
| 247 | } |
| 248 | if(REG32(GPIOMUX_EINT_TYPE)&(1<<eint)) |
| 249 | { |
| 250 | eint_type = EINT_LEVEL_SENSITIVITY; |
| 251 | } |
| 252 | else |
| 253 | { |
| 254 | eint_type = EINT_EDGE_SENSITIVITY; |
| 255 | } |
| 256 | return eint_type; |
| 257 | } |
| 258 | |
| 259 | |
| 260 | /** |
| 261 | * @brief set eint ownership register |
| 262 | * @param eint : the eint index to set ownerhsip |
| 263 | * @param ownership : the ownership register bit value to set ,it should be 0~1 |
| 264 | * 0: set ownership to MD |
| 265 | * 1: set ownership to AP |
| 266 | * @return GPIO_OK : set successful, EINT_FAIL : set failed |
| 267 | */ |
| 268 | kal_int32 eint_set_ownership(kal_uint32 eint,kal_uint32 ownership) |
| 269 | { |
| 270 | return EINT_OK; |
| 271 | } |
| 272 | |
| 273 | /** |
| 274 | * @brief set the source gpio index parameter of the eint |
| 275 | * @param eint : the eint index to be set |
| 276 | * @param gpio_pin : The pin which is to set as source gpio of eint. it should be 0~63 |
| 277 | * @return GPIO_OK : set successful, EINT_FAIL : set failed |
| 278 | */ |
| 279 | kal_int32 gpio_set_eint_src(eint_e eint, kal_uint8 gpio_pin) |
| 280 | { |
| 281 | volatile unsigned int* eint_src_reg; |
| 282 | kal_uint32 eint_src,eint_src_reg_shift; |
| 283 | if((eint >= EINT_NUM)||(gpio_pin >= EINT_SRC_PIN_MAX)) |
| 284 | { |
| 285 | EINT_PRINT("\t gpio seteint src failed! eint:[%d] or gpio_pin:[%d] is out of range",eint,gpio_pin); |
| 286 | return EINT_FAIL; |
| 287 | } |
| 288 | |
| 289 | eint_src_reg = (volatile unsigned int*)((unsigned int)GPIOMUX_EINT_SRC1 + EINT_SRC_OFFSET*(eint/EINT_SRC_NUM_PER_REG)); |
| 290 | eint_src_reg_shift = (eint%EINT_SRC_NUM_PER_REG)*EINT_SRC_SHIFT_BIT; |
| 291 | eint_src = REG32(eint_src_reg); |
| 292 | REG32_WRITE(eint_src_reg,(eint_src&(~(0xff << eint_src_reg_shift)))); |
| 293 | eint_src = REG32(eint_src_reg); |
| 294 | REG32_WRITE(eint_src_reg,(eint_src|(gpio_pin << eint_src_reg_shift))); |
| 295 | |
| 296 | return EINT_OK; |
| 297 | } |
| 298 | |
| 299 | /** |
| 300 | * @brief get eint source gpio id of eint |
| 301 | * @param eint : The eint to be read. |
| 302 | * @return return the eint source parameter's value of eint |
| 303 | * gpio_pin: 0~64 the gpio index of eint source |
| 304 | * EINT_FAIL: eint is out of range |
| 305 | */ |
| 306 | kal_int32 gpio_get_eint_src(eint_e eint) |
| 307 | { |
| 308 | volatile unsigned int* eint_src_reg; |
| 309 | kal_uint32 eint_src,eint_src_reg_shift,gpio_pin; |
| 310 | if(eint >= EINT_NUM) |
| 311 | { |
| 312 | EINT_PRINT("\t gpio get eint src failed! eint:[%d] is out of range",eint); |
| 313 | return EINT_FAIL; |
| 314 | } |
| 315 | eint_src_reg = (volatile unsigned int*)((unsigned int)GPIOMUX_EINT_SRC1 + EINT_SRC_OFFSET*(eint/EINT_SRC_NUM_PER_REG)); |
| 316 | eint_src_reg_shift = (eint%EINT_SRC_NUM_PER_REG)*EINT_SRC_SHIFT_BIT; |
| 317 | eint_src = REG32(eint_src_reg); |
| 318 | gpio_pin = (eint_src>>eint_src_reg_shift)&0xff; |
| 319 | return gpio_pin; |
| 320 | } |
| 321 | |
| 322 | |
| 323 | /** |
| 324 | * @brief set dedicated eint source l2 eint index value of deint |
| 325 | * @param deint : The dedicated eint to be set. |
| 326 | * @param eint_num: the l2 eint index to set as source eint of deint,it should be 0~15 |
| 327 | * @return GPIO_OK : set successful, EINT_FAIL : set failed |
| 328 | */ |
| 329 | kal_int32 eint_set_l1_eint_source(dedicated_eint_e deint,eint_e eint_num) |
| 330 | { |
| 331 | volatile unsigned int *reg_addr; |
| 332 | kal_uint32 reg_val; |
| 333 | |
| 334 | if((eint_num >= EINT_NUM)||(deint >= DEDICATED_EINT_TOTAL_CHANNEL)) |
| 335 | { |
| 336 | EINT_PRINT("\teint set l1 eint source failed,eint_num is:[%d] , deint is [%d]",eint_num,deint); |
| 337 | return EINT_FAIL; |
| 338 | } |
| 339 | reg_addr = (volatile unsigned int *)((unsigned int)GPIOMUX_EINT_DIRQ0 + deint*4); |
| 340 | reg_val = REG32(reg_addr); |
| 341 | REG32_WRITE(reg_addr,(reg_val&(~0xf))); |
| 342 | reg_val = REG32(reg_addr); |
| 343 | REG32_WRITE(reg_addr,(reg_val | eint_num)); |
| 344 | return EINT_OK; |
| 345 | } |
| 346 | |
| 347 | /** |
| 348 | * @brief set dedicated eint enable value of deint |
| 349 | * @param deint : The dedicated eint to be set. |
| 350 | * @param enable: the enable register value to set,it should be 0~1 |
| 351 | * 0: enable dedicated eint |
| 352 | * 1: disable dedicated eint |
| 353 | * @return GPIO_OK : set successful, EINT_FAIL : set failed |
| 354 | */ |
| 355 | kal_int32 eint_set_l1_eint_enable(dedicated_eint_e deint , kal_uint32 enable) |
| 356 | { |
| 357 | volatile unsigned int *reg_addr; |
| 358 | kal_uint32 bit_shift,reg_val; |
| 359 | |
| 360 | bit_shift = 31; |
| 361 | |
| 362 | if((deint >= DEDICATED_EINT_TOTAL_CHANNEL)||(enable > EINT_ENABLE)) |
| 363 | { |
| 364 | EINT_PRINT("\teint set l1 eint enable failed,eint is:[%d],enable is:[%d]",deint,enable); |
| 365 | return EINT_FAIL; |
| 366 | } |
| 367 | reg_addr = (volatile unsigned int *)((unsigned int)GPIOMUX_EINT_DIRQ0 + deint*4); |
| 368 | reg_val = REG32(reg_addr); |
| 369 | REG32_WRITE(reg_addr,(reg_val&(~(1 << bit_shift)))); |
| 370 | reg_val = REG32(reg_addr); |
| 371 | REG32_WRITE(reg_addr,(reg_val | (enable << bit_shift))); |
| 372 | return EINT_OK; |
| 373 | } |
| 374 | |
| 375 | /** |
| 376 | * @brief set dedicated eint enable value of deint |
| 377 | * @param deint : The dedicated eint to be set. |
| 378 | * @param enable: the enable register value to set,it should be 0~1 |
| 379 | * 0: enable dedicated eint |
| 380 | * 1: disable dedicated eint |
| 381 | * @return GPIO_OK : set successful, EINT_FAIL : set failed |
| 382 | */ |
| 383 | kal_int32 eint_get_l1_irqen(dedicated_eint_e deint) |
| 384 | { |
| 385 | volatile unsigned int *reg_addr; |
| 386 | kal_uint32 bit_shift,reg_val; |
| 387 | |
| 388 | bit_shift = 31; |
| 389 | |
| 390 | if((deint >= DEDICATED_EINT_TOTAL_CHANNEL)) |
| 391 | { |
| 392 | EINT_PRINT("\teint set l1 eint enable failed,eint is:[%d],enable is:[%d]",deint); |
| 393 | return EINT_FAIL; |
| 394 | } |
| 395 | reg_addr = (volatile unsigned int *)((unsigned int)GPIOMUX_EINT_DIRQ0 + deint*4); |
| 396 | reg_val = REG32(reg_addr); |
| 397 | |
| 398 | return ((reg_val & (1 << bit_shift)) != 0); |
| 399 | } |
| 400 | |
| 401 | |
| 402 | /** |
| 403 | * @brief set dedicated eint enable value of deint |
| 404 | * @param deint : The dedicated eint to be set. |
| 405 | * @param eint: the l2 eint index to set as source eint of deint,it should be 0~15 |
| 406 | * @param enable: the enable register value to set,it should be 0~1 |
| 407 | * 0: enable dedicated eint |
| 408 | * 1: disable dedicated eint |
| 409 | * @return GPIO_OK : set successful, EINT_FAIL : set failed |
| 410 | */ |
| 411 | kal_int32 gpio_set_l1_eint(dedicated_eint_e deint,eint_e eint,kal_uint32 enable) |
| 412 | { |
| 413 | if((deint >= DEDICATED_EINT_TOTAL_CHANNEL)||(eint >= EINT_NUM)||(enable> EINT_ENABLE)) |
| 414 | { |
| 415 | EINT_PRINT("\teint set l1 eint failed! deint = [%d],eint = [%d], enable = [%d]",deint,eint,enable); |
| 416 | return EINT_FAIL; |
| 417 | } |
| 418 | eint_set_irqen(eint,EINT_DISABLE); |
| 419 | eint_set_l1_eint_source(deint,eint); |
| 420 | eint_set_l1_eint_enable(deint,enable); |
| 421 | |
| 422 | return EINT_OK; |
| 423 | } |
| 424 | |
| 425 | |
| 426 | /** |
| 427 | * @brief get dedicated eint source l2 eint index value of l1_deint |
| 428 | * @param l1_deint : The dedicated eint to be read. |
| 429 | * @return return the dedicated eint source l2 eint index value of l1_deint |
| 430 | * src_eint: 0~0xf , l2 eint index |
| 431 | * EINT_FAIL: l1_deint is out of range |
| 432 | */ |
| 433 | kal_int32 gpio_get_l1_eint_src(kal_uint32 l1_deint) |
| 434 | { |
| 435 | kal_uint32 src_eint; |
| 436 | volatile unsigned int *reg_addr; |
| 437 | |
| 438 | if(l1_deint >= DEDICATED_EINT_TOTAL_CHANNEL) |
| 439 | { |
| 440 | EINT_PRINT("\t eint get l1 deint srouce failed,l1_eint is:[%d]",l1_deint); |
| 441 | return EINT_FAIL; |
| 442 | } |
| 443 | |
| 444 | reg_addr = (volatile unsigned int *)((unsigned int)GPIOMUX_EINT_DIRQ0 + 4*l1_deint); |
| 445 | src_eint = REG32(reg_addr)&0xf; |
| 446 | |
| 447 | return src_eint; |
| 448 | } |
| 449 | |