| rjw | 6c1fd8f | 2022-11-30 14:33:01 +0800 | [diff] [blame] | 1 | |
| 2 | |
| 3 | |
| 4 | #ifndef __DCL_PMU6573_HW_H_STRUCT__ |
| 5 | #define __DCL_PMU6573_HW_H_STRUCT__ |
| 6 | |
| 7 | #if defined(PMIC_6573_REG_API) |
| 8 | |
| 9 | |
| 10 | #define PMU_BASE MIX_PMU_base |
| 11 | #define PMU_END (PMU_BASE+0x1000) |
| 12 | |
| 13 | /////////////////////////////////////////////////////////////////////////////// |
| 14 | // LDO group |
| 15 | #define VRF_CON0 (PMU_BASE+0x0700) |
| 16 | #define VTCXO_CON0 (PMU_BASE+0x0710) |
| 17 | #define VSIM_CON0 (PMU_BASE+0x0780) |
| 18 | #define VSIM2_CON0 (PMU_BASE+0x0790) |
| 19 | |
| 20 | //BUCK group |
| 21 | #define VRF18_CON0 (PMU_BASE+0x0960) |
| 22 | #define VPA_CON0 (PMU_BASE+0x0b00) |
| 23 | |
| 24 | |
| 25 | |
| 26 | #endif //#if defined(PMIC_6573_REG_API) |
| 27 | |
| 28 | #endif //#ifndef __DCL_PMU6573_HW_H_STRUCT__ |
| 29 | |
| 30 | |
| 31 | |