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192.168.1.100 / T800_MD / 04730939d77d4b1fce91df3083777d88f0b04c4a / . / mcu / interface / l1 / cl1 / common / sysfrc.h
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rjw6c1fd8f2022-11-30 14:33:01 +0800[diff] [blame]1/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2016
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS (""MEDIATEK SOFTWARE"")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN ""AS-IS"" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
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19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
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21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36
37#ifndef _SYSFRC_H_
38#define _SYSFRC_H_
39/*****************************************************************************
40*
41* FILE NAME : sysfrc.h
42*
43* DESCRIPTION : Defines local interface for FRC.
44*
45* HISTORY :
46*
47*****************************************************************************/
48
49/*----------------------------------------------------------------------------
50 Include Files
51----------------------------------------------------------------------------*/
52#include "systyp.h"
53#include "valapi.h"
54
55
56
57/*----------------------------------------------------------------------------
58 Global Defines and Macros
59----------------------------------------------------------------------------*/
60
61/* Val * 9.8304 * (1 + AfcPpb/1000000000) */
62#define SYS_CONVERT_FRC_TO_9M(Val, AfcPpb) ((((kal_int64)(Val)) * 6144 + ((((kal_int64)(Val)) * (AfcPpb) * 3) >> 19)) / 625)
63
64/* Val / (1 + AfcPpb/1000000000) / 9.8304 = Val * (1 - AfcPpb/1000000000) / 9.8304 */
65#define SYS_CONVERT_9M_TO_FRC(Val, AfcPpb) ((kal_uint32)((((kal_int64)(Val)) * 625 - ((((kal_int64)(Val)) * (AfcPpb) * 625) >> 30)) / 6144))
66
67#define MAX_FRC_CNT (0x100000000UL)
68#define C2K_FRC_WRAP (0xFFFFFFFF)
69#define FRC_FREQ (1000000L) /* 1 MHz */
70
71#if defined(__FPGA__) && defined(__MTK_TARGET__)
72/* In FPGA vefication platform, Rx Timer clock frequency has downscale 100\50,
73 but FRC clock remains 1MHz. Therefore, need to correct FRC value by /(100 or 50) */
74#if defined(__MD93__)||defined(__MD95__)
75#define FRC_DOWNSCALE_FACTOR (100)
76#endif
77#if defined(__MD97__) || defined(__MD97P__)
78#define FRC_DOWNSCALE_FACTOR (160)
79#endif
80#else
81#define FRC_DOWNSCALE_FACTOR (1)
82#endif
83
84/* Diff of two comapred FRC number cannot be bigger than 2^31: 2147.5s */
85#define MAX_FRC_DIFF (0x80000000)
86
87/** To check earlrFRC is earlier than lateFRC */
88#define FRC_COMPARE(early, late) \
89 (((early < late) && ((late - early) < MAX_FRC_DIFF)) || \
90 ((early > late) && ((early - late) > MAX_FRC_DIFF)))
91
92
93/*----------------------------------------------------------------------------
94 Global Typedefs
95----------------------------------------------------------------------------*/
96
97
98
99/*----------------------------------------------------------------------------
100 Global Data
101----------------------------------------------------------------------------*/
102
103
104/*----------------------------------------------------------------------------
105 Global Function Prototypes
106----------------------------------------------------------------------------*/
107extern void SysFrcStartTimeSync(SysAirInterfaceT Interface);
108extern void SysFrcStopTimeSync(SysAirInterfaceT Interface);
109extern void SysFrcReset(SysAirInterfaceT Interface);
110extern void SysFrcSetSnapshot(SysAirInterfaceT Interface, SysSFrameTimeT *SysTime, kal_uint32 Frc);
111extern kal_bool SysFrcConvertToSt(SysAirInterfaceT Interface, kal_uint32 Frc, SysSFrameTimeT *SysTime);
112extern void SysFrcConvertToStForce(SysAirInterfaceT Interface, kal_uint32 Frc, SysSFrameTimeT *SysTime,kal_bool NeedTrace);
113extern kal_bool SysStConvertToFrc(SysAirInterfaceT Interface, SysSFrameTimeT *SysTime, kal_uint32 *Frc);
114extern kal_bool SysFrcSyncIsValid(SysAirInterfaceT Interface);
115extern kal_bool SysFrcGetNextFrameBoundary(SysAirInterfaceT Interface, kal_bool Check20msBoundary, kal_uint32 CheckTime, kal_uint32 *FrcFrameBoundary, kal_bool UseFrameOffset);
116extern kal_uint32 SysFrcCntGet(void);
117extern kal_uint32 SysFrcCntGetNoDS(void);
118extern kal_uint8 SysFrcHighCntGet(void);
119extern kal_bool SysFrcReadSnapshotImm(SysAirInterfaceT Interface, SysSFrameTimeT* SFrameTime, kal_uint32* Frc);
120extern void SysFrcReptSyncInfo(SysAirInterfaceT Interface);
121extern void SysFrcReadSnapshotImmDvt(SysAirInterfaceT Interface, SysSFrameTimeT* SFrameTime, kal_uint32* Frc);
122
123
124/*****************************************************************************
125* End of File
126*****************************************************************************/
127#endif