| rjw | 6c1fd8f | 2022-11-30 14:33:01 +0800 | [diff] [blame] | 1 | /***************************************************************************** |
| 2 | * Copyright Statement: |
| 3 | * -------------------- |
| 4 | * This software is protected by Copyright and the information contained |
| 5 | * herein is confidential. The software may not be copied and the information |
| 6 | * contained herein may not be used or disclosed except with the written |
| 7 | * permission of MediaTek Inc. (C) 2005 |
| 8 | * |
| 9 | * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES |
| 10 | * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") |
| 11 | * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON |
| 12 | * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, |
| 13 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF |
| 14 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT. |
| 15 | * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE |
| 16 | * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR |
| 17 | * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH |
| 18 | * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO |
| 19 | * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S |
| 20 | * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM. |
| 21 | * |
| 22 | * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE |
| 23 | * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, |
| 24 | * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, |
| 25 | * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO |
| 26 | * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. |
| 27 | * |
| 28 | * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE |
| 29 | * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF |
| 30 | * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND |
| 31 | * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER |
| 32 | * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC). |
| 33 | * |
| 34 | *****************************************************************************/ |
| 35 | |
| 36 | /***************************************************************************** |
| 37 | * |
| 38 | * Filename: |
| 39 | * --------- |
| 40 | * ul1_cnst.h |
| 41 | * |
| 42 | * Project: |
| 43 | * -------- |
| 44 | * WCDMA_Software |
| 45 | * |
| 46 | * Description: |
| 47 | * ------------ |
| 48 | * Layer 1 related constant and enum definitions for MediaTek WCDMA software |
| 49 | * |
| 50 | * Author: |
| 51 | * ------- |
| 52 | * ------- |
| 53 | * |
| 54 | *============================================================================ |
| 55 | * HISTORY |
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| 337 | *------------------------------------------------------------------------------ |
| 338 | * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| 339 | *============================================================================ |
| 340 | ****************************************************************************/ |
| 341 | |
| 342 | #ifndef _UL1_CNST_H |
| 343 | #define _UL1_CNST_H |
| 344 | |
| 345 | #include "ul1_protected_cnst.h" |
| 346 | |
| 347 | #define UL1_SIM_IDX_INVALID ( 0xFF ) |
| 348 | |
| 349 | /*-------- BCH related constant ----------------------*/ |
| 350 | #define FDD_MAX_SIB_PATTERN 31 /* The maximum number of BCH SIB blocks */ |
| 351 | #define FDD_MAX_SIB_SEG_COUNT 16 /* The maximum number of segments in 1 BCH SIB */ |
| 352 | |
| 353 | /*-------- TrCH related constant (For UL/DL 384Kbps capability) ----------------------*/ |
| 354 | /* MAUI_02850564 : According to spec 25.306 and MTK implementation, FDD_MAX_DL_DATA should be 956 bytes : |
| 355 | FDD_MAX_DL_DATA = 6400 + 24*32 (CRC bits*MaxTBNum) + 7*32 (max bit offset for each TB) |
| 356 | + 7*32 (max byte alignment for each TB) + 4*8 (4 bytes report header) = 7648 bits = 956 bytes. |
| 357 | But we have seen an overspec case : PS TrCH 336*24 + SRB TrCH 148*1, thus define FDD_MAX_DL_DATA as 1150 bytes. |
| 358 | FDD_MAX_DL_DATA = [PS part] 336*24 + 24*24 + 7*24 + 7*24 |
| 359 | [SRB part] + 148*1 + 24*1 + 7*1 + 7*1 |
| 360 | + 4*8 (4 bytes report header) = 9194 bits = 1149.25 bytes. */ |
| 361 | #define FDD_MAX_DL_DATA 1150 /* Maximum DL transport block array size. */ |
| 362 | #define FDD_MAX_TRCH_NUM 8 /* Maximum Simultaneous TrCHs */ |
| 363 | #define FDD_MAX_DL_TB 32 /* Maximum simultaneous DL TBs */ |
| 364 | #define FDD_MAX_DL_TFC 128 /* Maximum number of TFCs per DL CCTrCH */ |
| 365 | #define FDD_MAX_DL_TRCH 32 /* Maximum number of DL TrCH */ |
| 366 | #define FDD_MAXTF 32 /* Maximum number of TF per UL or DL TrCH TFS */ |
| 367 | #define FDD_MAXFACHPCH 8 /* Maximum number of TrCHs per S-CCPCH CCTrCH */ |
| 368 | #define FDD_MAX_UL_TFC 64 /* Maximum number of TFCs per UL CCTrCH */ |
| 369 | #define FDD_MAX_UL_TB 16 /* Maximum simultaneous DUL TBs */ |
| 370 | #define FDD_MAX_UL_TFs 32 /* Maximum numbre of TFs per UL CCTrCH */ |
| 371 | #define FDD_MAX_UL_TRCH 32 /* Maximum number of UL TrCH */ |
| 372 | |
| 373 | /*-------- PhyCh related constant (For UL/DL 384Kbps capability) ----------------------*/ |
| 374 | #define FDD_MAX_TGPS 6 /* Maximum number of TGPS sequences */ |
| 375 | #define FDD_MAX_PENDING_TGPS_NUM 5 /* Maximum number of pending confiuration for one TGPS */ |
| 376 | #define FDD_MAX_TGMP_NUM 5 /* Maximum number of TGMP */ |
| 377 | #define FDD_MAX_ASC 8 /* Maximum access service class number */ |
| 378 | #define FDD_MAX_DLDPCH 3 /* Maximum number of physical channel codes per DL DPCH CCTrCH */ |
| 379 | #define FDD_MAX_ULDPCH 6 /* Maximum number of physical channel codes per UL DPCH CCTrCH */ |
| 380 | #define FDD_MAX_RL 8 /* Maximum number of DPCH radio links in active set */ |
| 381 | |
| 382 | #ifdef __UMTS_R10__ |
| 383 | |
| 384 | #ifdef __MULTI_CARRIER_HSDPA__ /* __MULTI_CARRIER_HSDPA__ = 3 or 4 */ |
| 385 | #define FDD_MAX_ADDI_DC_HSDPA ( __MULTI_CARRIER_HSDPA__ - 2 ) /* [R10] The maximum additional dc-hsdpa frequency */ |
| 386 | #else /*__MULTI_CARRIER_HSDPA__*/ |
| 387 | #define FDD_MAX_ADDI_DC_HSDPA 1 /* default value is 1. */ |
| 388 | #endif /*__MULTI_CARRIER_HSDPA__*/ |
| 389 | |
| 390 | #endif |
| 391 | |
| 392 | |
| 393 | |
| 394 | /*-------- Measurement related constant ----------------------*/ |
| 395 | #ifdef __GEMINI__ |
| 396 | #define FDD_MAX_FREQ_RANGE 15 /* Max size of frequency ranges for frequency scan. |
| 397 | Extend range number for Enhanced Freq Scan in Gemini2.0.*/ |
| 398 | #else |
| 399 | #define FDD_MAX_FREQ_RANGE 8 /* Max size of frequency ranges for frequency scan. */ |
| 400 | #endif /*__GEMINI__*/ |
| 401 | |
| 402 | #define FDD_MAX_FREQ_EXCLUDE 13 /*Max possible UARFCNs per PLMN*/ |
| 403 | #define FDD_MAX_FREQ_LIST 36 /* Max size of stored frequency list for frequency scan */ |
| 404 | #define FDD_MAX_PREFERRED_PSC 96 /* Max number of preferred cells on 1 frequency for frequency scan */ |
| 405 | #define FDD_MAX_NUM_MEAS_CELL 32 /* Max number of reported cells in the measurement cell indication primitive */ |
| 406 | #define FDD_MAX_NUM_MEASURED_CELL 96 /* Max number of monitored cells in the measurement cell request primitive */ |
| 407 | #define FDD_MAX_NUM_SFN_CELL 12 /* Max number of cells whose SFN will be read by L1 when nc_nbr_dch=0 */ |
| 408 | |
| 409 | #ifdef __UMTS_R9_UL1__ |
| 410 | #define FDD_MAX_UMTS_FREQ 4 /* Maximum number of FDD frequency supported in a UMTS UE : 1st intra + 2nd intra + inter x 2 */ |
| 411 | #else |
| 412 | #define FDD_MAX_UMTS_FREQ 3 /* Maximum number of FDD frequency supported in a UMTS UE */ |
| 413 | #endif /*__UMTS_R9_UL1__*/ |
| 414 | |
| 415 | #define FDD_MAX_RSSI_SNIFFER_SCAN_LIST 12 /* Maximum number of RSSI SNIFFER UARFCN (Add by Janet) */ |
| 416 | |
| 417 | /*-------- Magic value related constant ----------------------*/ |
| 418 | #define FDD_TM_VALID 307200 /* Default value representing Tm known. 38400*8 */ |
| 419 | #define FDD_TM_INVALID ( -1 ) /* Default value representing Tm unknown. */ |
| 420 | #define FDD_OFF_VALID 4096 /* Default valure representing OFF known. */ |
| 421 | #define FDD_OFF_INVALID ( -1 ) /* Default value representing OFF unknown. */ |
| 422 | #define FDD_RSSI_INVALID ( -32768 ) /* Default value representing RSSI unknown. */ |
| 423 | #define FDD_RSCP_INVALID ( -32768 ) /* Default value representing RSCP unknown. */ |
| 424 | #define FDD_ECN0_INVALID ( -32768 ) /* Default value representing EcNo unknown. */ |
| 425 | #define FDD_UARFCN_INVALID 65535 /* Invalid UARFCN for setting empty freq. entry in meas. config req. */ |
| 426 | |
| 427 | |
| 428 | |
| 429 | |
| 430 | /*-------- BMC (CTCH) related constant ----------------------*/ |
| 431 | #define FDD_BMC_MAX_BITMAP_SIZE 64 /* CTCH level 2 bitmap siz */ |
| 432 | |
| 433 | /*-------- Activation time related constant ----------------------*/ |
| 434 | #define FDD_CFN_IMMEDIATE (kal_int16)(-1) /* Immediate CFN activation time. */ |
| 435 | #define FDD_SFN_IMMEDIATE (kal_int16)(-1) /* Immediate SFN activation time. */ |
| 436 | |
| 437 | /*-------- [R5R6] HS-DSCH related ----------------------*/ |
| 438 | #ifdef __MULTI_CARRIER_HSDPA__ |
| 439 | #define FDD_MAX_SUPPORT_CELL __MULTI_CARRIER_HSDPA__ /* Possible __MULTI_CARRIER_HSDPA__ value is 3,4 or not defined. */ |
| 440 | #else |
| 441 | #define FDD_MAX_SUPPORT_CELL 2 /* 1 */ /*Use 3 before __MULTI_CARRIER_HSDPA__ defined in project for easy development*/ |
| 442 | #endif |
| 443 | |
| 444 | #define FDD_MAX_HS_SCCH_NUM 4 |
| 445 | #define FDD_MAX_HS_PROCESS_NUM 8 |
| 446 | #define FDD_MAX_HS_PDU_NUM_IN_FRAME 5 |
| 447 | #ifdef __UMTS_R7__ |
| 448 | #define FDD_MAX_HS_PDU_SIZE_IN_BITS 42192 |
| 449 | #else |
| 450 | #define FDD_MAX_HS_PDU_SIZE_IN_BITS 14411 |
| 451 | #endif |
| 452 | #define FDD_MAX_HS_PDU_SIZE_IN_BYTES (((FDD_MAX_HS_PDU_SIZE_IN_BITS+32+31)/32)*4) |
| 453 | #ifdef __UMTS_R8__ |
| 454 | |
| 455 | #define FDD_HDA_BUFF_NUM_PRI 45 // 5*8(MAX flow B * HARQ process NUM) + 5 (less mode) |
| 456 | #define FDD_HDA_BUFF_NUM_SEC 8 // HARQ process NUM |
| 457 | |
| 458 | #define FDD_MAX_HS_PDU_BUFF_NUM 160 // for DC hsdpa |
| 459 | #define FDD_HDA_BUFF_NUM (FDD_HDA_BUFF_NUM_PRI + FDD_HDA_BUFF_NUM_SEC * (FDD_MAX_SUPPORT_CELL-1)) |
| 460 | #else |
| 461 | #define FDD_MAX_HS_PDU_BUFF_NUM 40 |
| 462 | #endif |
| 463 | #define FDD_MAX_HS_RB_NUM 3 |
| 464 | #define FDD_MAX_EDCH_RL 4 |
| 465 | #define FDD_MAX_REF_ETFCI_NUM 8 |
| 466 | #define FDD_MAX_ETFC_NUM 128 |
| 467 | #define FDD_MIN_NTX1_10MS 8 /* 25.212 s4.4.4 */ |
| 468 | #define FDD_MAX_NTX1_10MS (15 - FDD_MIN_NTX1_10MS + 1) |
| 469 | |
| 470 | #define FDD_HS_PDU_UL1_CC_DELAY_PREALLOCATION_NUM (FDD_MAX_SUPPORT_CELL*5) |
| 471 | #define FDD_PHY_HSDSCH_MAC_EV_SETUP_BIT 0 |
| 472 | #define FDD_PHY_HSDSCH_MAC_EV_RELEASE_BIT 1 |
| 473 | #define FDD_PHY_HSDSCH_MAC_EV_MODIFY_BIT 2 |
| 474 | #define FDD_PHY_HSDSCH_MAC_EV_RESET_BIT 3 |
| 475 | #define FDD_PHY_HSDSCH_MAC_EV_SETUP (0x1 << FDD_PHY_HSDSCH_MAC_EV_SETUP_BIT) /* 0x01 */ |
| 476 | #define FDD_PHY_HSDSCH_MAC_EV_RELEASE (0x1 << FDD_PHY_HSDSCH_MAC_EV_RELEASE_BIT) /* 0x02 */ |
| 477 | #define FDD_PHY_HSDSCH_MAC_EV_MODIFY (0x1 << FDD_PHY_HSDSCH_MAC_EV_MODIFY_BIT) /* 0x04 */ |
| 478 | #define FDD_PHY_HSDSCH_MAC_EV_RESET (0x1 << FDD_PHY_HSDSCH_MAC_EV_RESET_BIT) /* 0x08 */ |
| 479 | |
| 480 | /*-----------Add PLMN , RAC and LAC info to Container Req---------------------------*/ |
| 481 | #define NUM_PLMN_INFO 3 |
| 482 | #define NUM_MCC_MNC 3 |
| 483 | |
| 484 | #endif |
| 485 | |