rjw | 6c1fd8f | 2022-11-30 14:33:01 +0800 | [diff] [blame] | 1 | /***************************************************************************** |
| 2 | * Copyright Statement: |
| 3 | * -------------------- |
| 4 | * This software is protected by Copyright and the information contained |
| 5 | * herein is confidential. The software may not be copied and the information |
| 6 | * contained herein may not be used or disclosed except with the written |
| 7 | * permission of MediaTek Inc. (C) 2005 |
| 8 | * |
| 9 | * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES |
| 10 | * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") |
| 11 | * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON |
| 12 | * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, |
| 13 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF |
| 14 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT. |
| 15 | * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE |
| 16 | * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR |
| 17 | * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH |
| 18 | * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO |
| 19 | * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S |
| 20 | * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM. |
| 21 | * |
| 22 | * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE |
| 23 | * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, |
| 24 | * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, |
| 25 | * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO |
| 26 | * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. |
| 27 | * |
| 28 | * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE |
| 29 | * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF |
| 30 | * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND |
| 31 | * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER |
| 32 | * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC). |
| 33 | * |
| 34 | *****************************************************************************/ |
| 35 | |
| 36 | /***************************************************************************** |
| 37 | * |
| 38 | * Filename: |
| 39 | * --------- |
| 40 | * isrentry.c |
| 41 | * |
| 42 | * Project: |
| 43 | * -------- |
| 44 | * Maui_Software |
| 45 | * |
| 46 | * Description: |
| 47 | * ------------ |
| 48 | * This Module defines the IRQ service routines for all IRQ sources |
| 49 | * |
| 50 | * Author: |
| 51 | * ------- |
| 52 | * ------- |
| 53 | * |
| 54 | *============================================================================ |
| 55 | * HISTORY |
| 56 | * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| 57 | *------------------------------------------------------------------------------ |
| 58 | * removed! |
| 59 | * removed! |
| 60 | * removed! |
| 61 | * |
| 62 | * removed! |
| 63 | * removed! |
| 64 | * removed! |
| 65 | * removed! |
| 66 | * |
| 67 | * removed! |
| 68 | * removed! |
| 69 | * removed! |
| 70 | * |
| 71 | * removed! |
| 72 | * removed! |
| 73 | * removed! |
| 74 | * |
| 75 | * |
| 76 | *------------------------------------------------------------------------------ |
| 77 | * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| 78 | *============================================================================ |
| 79 | ****************************************************************************/ |
| 80 | /******************************************************************************* |
| 81 | * Include header files. |
| 82 | *******************************************************************************/ |
| 83 | #ifdef __MTK_TARGET__ |
| 84 | #include <mips/mt.h> |
| 85 | #endif |
| 86 | #include "reg_base.h" |
| 87 | #include "isrentry.h" |
| 88 | #include "intrCtrl.h" |
| 89 | #include "md97/idle_service.h" |
| 90 | #include "drv_rstctl.h" |
| 91 | |
| 92 | #include "kal_hrt_api.h" |
| 93 | #include "sync_data.h" |
| 94 | #include "kal_general_types.h" |
| 95 | #include "kal_public_api.h" |
| 96 | #include "kal_public_defs.h" |
| 97 | #include "us_timer.h" |
| 98 | #include "drv_mdcirq.h" |
| 99 | #include "drv_mdcirq_reg.h" |
| 100 | #include "kal_iram_section_defs.h" |
| 101 | #include "drv_vpe_irq.h" |
| 102 | #include "kal_cpuinfo.h" |
| 103 | #include "mips_ia_utils.h" |
| 104 | #include "drv_vpe_irq.h" |
| 105 | #include "ex_public.h" |
| 106 | #include "SST_sla.h" |
| 107 | #include "swtr.h" |
| 108 | #include "kal_internal_api.h" |
| 109 | #include "syscomp_config.h" |
| 110 | #include "kal_wp_hook.h" |
| 111 | |
| 112 | #if defined(__ESL_DBG_UTIL__) |
| 113 | #include "esl_debug.h" |
| 114 | #else /* __ESL_DBG_UTIL__ */ |
| 115 | #define esl_printf(donothing...) do {;}while(0) |
| 116 | #endif /* __ESL_DBG_UTIL__ */ |
| 117 | |
| 118 | /************************************************************************* |
| 119 | * Define function prototypes and data structures. |
| 120 | *************************************************************************/ |
| 121 | |
| 122 | extern void kal_hrt_mt_save(kal_uint32 irqvector, kal_mt_stack_ptr *stack_ptr); |
| 123 | extern void kal_hrt_mt_restore(kal_uint32 irqvector, kal_mt_stack_ptr *stack_ptr); |
| 124 | |
| 125 | #if defined(__DUMMY_L1_ON_TARGET_4G5G__) |
| 126 | extern void xl1r_vpe_idle_setup_False(void); |
| 127 | #endif |
| 128 | |
| 129 | /************************************************************************* |
| 130 | * Define imported global data. |
| 131 | *************************************************************************/ |
| 132 | extern kal_uint16 HWIRQCode2SWIRQCode[]; |
| 133 | extern kal_uint16 SWIRQCode2HWIRQCode[]; |
| 134 | |
| 135 | extern const isr_config_s isr_config_tbl[]; |
| 136 | |
| 137 | /************************************************************************* |
| 138 | * Define global data. |
| 139 | *************************************************************************/ |
| 140 | irqlisr_entry lisr_dispatch_tbl[NUM_IRQ_SOURCES]; |
| 141 | |
| 142 | __MCURW_HWRW_C_ALIGNED_L2CACHE_LOCK_ZI(4) void *processing_lisr[MDCIRQ_TOTAL_VPE_NUM]; |
| 143 | __MCURW_HWRW_C_ALIGNED_L2CACHE_LOCK_RW(4) kal_uint32 processing_irqx[MDCIRQ_TOTAL_VPE_NUM] = {IRQ_NOT_LISR_CONTEXT, IRQ_NOT_LISR_CONTEXT, IRQ_NOT_LISR_CONTEXT, IRQ_NOT_LISR_CONTEXT, IRQ_NOT_LISR_CONTEXT, IRQ_NOT_LISR_CONTEXT, IRQ_NOT_LISR_CONTEXT, IRQ_NOT_LISR_CONTEXT, IRQ_NOT_LISR_CONTEXT, IRQ_NOT_LISR_CONTEXT, IRQ_NOT_LISR_CONTEXT, IRQ_NOT_LISR_CONTEXT}; |
| 144 | |
| 145 | __MCURW_HWRW_C_ALIGNED_L2CACHE_LOCK_ZI(4) kal_uint32 processing_irqCnt[MDCIRQ_TOTAL_VPE_NUM]; |
| 146 | __MCURW_HWRW_C_ALIGNED_L2CACHE_LOCK_ZI(4) kal_uint32 max_processing_irqCnt[MDCIRQ_TOTAL_VPE_NUM]; |
| 147 | |
| 148 | /* spurious interrupt log */ |
| 149 | #define SPURIOUS_IRQ_LOG_SIZE 20 |
| 150 | kal_uint32 spurious_count[MDCIRQ_TOTAL_VPE_NUM] = {0}; |
| 151 | kal_uint32 spurious_id[MDCIRQ_TOTAL_VPE_NUM][SPURIOUS_IRQ_LOG_SIZE]; |
| 152 | |
| 153 | /************************************************************************* |
| 154 | * Macro Definitions for "CIRQ Dispatch Misbehaviour" SW Workaround * |
| 155 | *************************************************************************/ |
| 156 | #define MDCIRQ_DUMMY_DI() \ |
| 157 | do{ \ |
| 158 | __asm__ __volatile__( \ |
| 159 | "di\n\t" \ |
| 160 | "ehb\n\t" \ |
| 161 | ); \ |
| 162 | } while(0) |
| 163 | |
| 164 | #define MDCIRQ_DUMMY_EI() \ |
| 165 | do{ \ |
| 166 | __asm__ __volatile__( \ |
| 167 | "ei\n\t" \ |
| 168 | "ehb\n\t" \ |
| 169 | ); \ |
| 170 | } while(0) |
| 171 | |
| 172 | |
| 173 | /* Delay 3T CIRQ cycles for GCR_VPE_IRQ_STATE and IE_status to sync to CIRQ * |
| 174 | * 3T CIRQ cycles = 18T CPU cycles --> 3 * 6(shaolin to cirq clock ratio) * 2 * |
| 175 | * (dual issue impact) = 36 ALU Instructions */ |
| 176 | // 3T CIRQ cycles * Dual issue impact |
| 177 | #define MDCIRQ_DELAY_CYCLES 3 * 2 |
| 178 | |
| 179 | // MDCIRQ_DELAY_CYCLES * (5 nop + 1 addiu from for loop) = 36 ALU Instructions |
| 180 | #define MDCIRQ_DELAY_LOOP() \ |
| 181 | do{ \ |
| 182 | register kal_uint32 _delay_loop; \ |
| 183 | for(_delay_loop = 0; _delay_loop < MDCIRQ_DELAY_CYCLES; _delay_loop++) { \ |
| 184 | __asm__ __volatile__( \ |
| 185 | "nop\n\t" \ |
| 186 | "nop\n\t" \ |
| 187 | "nop\n\t" \ |
| 188 | "nop\n\t" \ |
| 189 | "nop\n\t" \ |
| 190 | ); \ |
| 191 | } \ |
| 192 | }while(0) |
| 193 | |
| 194 | /************************************************************************* |
| 195 | * Macro Definitions for "CIRQ Dispatch Misbehaviour" SW Workaround End * |
| 196 | *************************************************************************/ |
| 197 | |
| 198 | /************************************************************************* |
| 199 | * FUNCTION |
| 200 | * MDCIRQ_IRQ_LISR_Init |
| 201 | * |
| 202 | * DESCRIPTION |
| 203 | * This function implement IRQ's LISR (Low-level Interrupt Service Routine) |
| 204 | * Table initialization. |
| 205 | * |
| 206 | * CALLS |
| 207 | * |
| 208 | * CALL BY |
| 209 | * |
| 210 | * PARAMETERS |
| 211 | * |
| 212 | * RETURNS |
| 213 | * |
| 214 | *************************************************************************/ |
| 215 | void MDCIRQ_IRQ_LISR_Init() |
| 216 | { |
| 217 | kal_uint32 i; |
| 218 | for (i = NUM_IRQ_SOURCES; i != 0; i--) |
| 219 | { |
| 220 | MDCIRQ_IRQ_Register_LISR(i - 1, MDCIRQ_IRQ_Default_LISR, "NULL handler"); |
| 221 | } |
| 222 | } |
| 223 | |
| 224 | /************************************************************************* |
| 225 | * FUNCTION |
| 226 | * MDCIRQ_IRQ_Register_LISR |
| 227 | * |
| 228 | * DESCRIPTION |
| 229 | * This function implement method to register IRQ's LISR. |
| 230 | * |
| 231 | * CALLS |
| 232 | * |
| 233 | * CALL BY |
| 234 | * |
| 235 | * PARAMETERS |
| 236 | * HWIRQID - vector number to register |
| 237 | * reg_lisr - register LISR's handler |
| 238 | * description - LISR's description pointer to be saved. |
| 239 | * Remember, the routine won't duplicate the description, |
| 240 | * therefore, caller shouldn't free the description. |
| 241 | * |
| 242 | * RETURNS |
| 243 | * |
| 244 | *************************************************************************/ |
| 245 | void MDCIRQ_IRQ_Register_LISR(kal_uint16 HWIRQCode, void (*reg_lisr)(kal_uint32), char* description) |
| 246 | { |
| 247 | kal_uint32 savedMask, SWIRQCode; |
| 248 | /* Caller: |
| 249 | * 1. MDCIRQ_IRQ_LISR_Init() call this API for all IRQ LISR init. |
| 250 | * 2. Users call this API register their LISR. If user already fill LISR info in gen97_isr_config.h, return directly. |
| 251 | */ |
| 252 | if(isr_config_tbl[HWIRQCode].irq_hdlr != (irq_isr_hdlr_ptr)MDCIRQ_IRQ_Default_LISR |
| 253 | && (irq_isr_hdlr_ptr)reg_lisr != (irq_isr_hdlr_ptr)MDCIRQ_IRQ_Default_LISR) |
| 254 | { |
| 255 | return; |
| 256 | } |
| 257 | savedMask = kal_hrt_SaveAndSetIRQMask(); |
| 258 | SWIRQCode = (kal_uint32)HWIRQCode2SWIRQCode[HWIRQCode]; |
| 259 | lisr_dispatch_tbl[HWIRQCode].vector = SWIRQCode; |
| 260 | lisr_dispatch_tbl[HWIRQCode].lisr_handler = reg_lisr; |
| 261 | lisr_dispatch_tbl[HWIRQCode].description = description; |
| 262 | kal_hrt_RestoreIRQMask(savedMask); |
| 263 | } |
| 264 | |
| 265 | /************************************************************************** |
| 266 | * FUNCTION |
| 267 | * MDCIRQ_IRQ_Register_LISR_isrc |
| 268 | * |
| 269 | * DESCRIPTION |
| 270 | * This function implement method to register IRQ's LISR. |
| 271 | * This is internal API. |
| 272 | * SS team help users register LISR. |
| 273 | * |
| 274 | * CALLER |
| 275 | * stack_init_lisrs() |
| 276 | * |
| 277 | ***************************************************************************/ |
| 278 | void MDCIRQ_IRQ_Register_LISR_isrc(kal_uint32 HWIRQCode, void (*reg_lisr)(kal_uint32), char* description) |
| 279 | { |
| 280 | kal_uint32 savedMask, SWIRQCode; |
| 281 | /* If user DO NOT fill LISR info in gen97_isr_config.h, that means user should register LISR by himself. */ |
| 282 | if((irq_isr_hdlr_ptr)reg_lisr == (irq_isr_hdlr_ptr)MDCIRQ_IRQ_Default_LISR) |
| 283 | { |
| 284 | return; |
| 285 | } |
| 286 | savedMask = kal_hrt_SaveAndSetIRQMask(); |
| 287 | SWIRQCode = (kal_uint32)HWIRQCode2SWIRQCode[HWIRQCode]; |
| 288 | lisr_dispatch_tbl[HWIRQCode].vector = SWIRQCode; |
| 289 | lisr_dispatch_tbl[HWIRQCode].lisr_handler = reg_lisr; |
| 290 | lisr_dispatch_tbl[HWIRQCode].description = description; |
| 291 | kal_hrt_RestoreIRQMask(savedMask); |
| 292 | } |
| 293 | |
| 294 | /************************************************************************* |
| 295 | * FUNCTION |
| 296 | * MDCIRQ_IRQ_Retrieve_LISR |
| 297 | * |
| 298 | * DESCRIPTION |
| 299 | * This function implement to retrieve register LISR handler |
| 300 | * |
| 301 | * CALLS |
| 302 | * |
| 303 | * CALL BY |
| 304 | * |
| 305 | * PARAMETERS |
| 306 | * |
| 307 | * RETURNS |
| 308 | * |
| 309 | *************************************************************************/ |
| 310 | void* MDCIRQ_IRQ_Retrieve_LISR(kal_uint16 HWIRQCode) |
| 311 | { |
| 312 | return(void*)(lisr_dispatch_tbl[HWIRQCode].lisr_handler); |
| 313 | } |
| 314 | |
| 315 | /************************************************************************* |
| 316 | * FUNCTION |
| 317 | * IRQ_Default_LISR |
| 318 | * |
| 319 | * DESCRIPTION |
| 320 | * This function implement default IRQ' LISR |
| 321 | * |
| 322 | * CALLS |
| 323 | * |
| 324 | * CALL BY |
| 325 | * IRQ_LISR_Init() |
| 326 | * |
| 327 | * PARAMETERS |
| 328 | * |
| 329 | * RETURNS |
| 330 | * |
| 331 | *************************************************************************/ |
| 332 | void MDCIRQ_IRQ_Default_LISR(kal_uint32 irq_id) |
| 333 | { |
| 334 | kal_fatal_error_handler(KAL_ERROR_NON_REGISTERED_LISR, irq_id); |
| 335 | } |
| 336 | |
| 337 | void INT_Timer_Interrupt(void) |
| 338 | { |
| 339 | kal_timer_interrupt(); |
| 340 | } |
| 341 | |
| 342 | void isrC_Main(kal_uint32 vector) |
| 343 | { |
| 344 | |
| 345 | kal_uint32 vpe_num; |
| 346 | kal_uint32 irqx_swcode, irqx_swcode_non_spurious; |
| 347 | kal_uint32 irqx_hwcode, irqx_hwcode_non_spurious; |
| 348 | void *processing_lisr_backup; |
| 349 | kal_uint32 processing_irqx_backup; |
| 350 | kal_uint32 ori_vpe_state; |
| 351 | kal_mt_stack_ptr mt_stack_ptr_backup = {{NULL}}; |
| 352 | |
| 353 | ASSERT_EXL_SAFE(vector == VPE_IRQID_MDCIRQ); |
| 354 | |
| 355 | vpe_num = kal_get_current_vpe_id(); |
| 356 | processing_lisr_backup = processing_lisr[vpe_num]; |
| 357 | processing_irqx_backup = processing_irqx[vpe_num]; |
| 358 | |
| 359 | #if defined(__MDCIRQ_GCR_SIGNAL_DISABLE__) |
| 360 | irqx_swcode = DRV_Reg32(MDCIRQ_VPE_IRQ_ID_BASE + (vpe_num<<2)); |
| 361 | #else |
| 362 | irqx_swcode = DRV_Reg32(MDCIRQ_GCR_VPE_IRQ_ID_BASE + (vpe_num<<2)); |
| 363 | #endif |
| 364 | |
| 365 | irqx_swcode_non_spurious = irqx_swcode & 0x1ff; |
| 366 | |
| 367 | /* Set&backup VPE IRQ state */ |
| 368 | ori_vpe_state = drv_mdcirq_SaveAndSet_VPE_state(vpe_num, irqx_swcode_non_spurious); |
| 369 | |
| 370 | /* Reset TC's priority according IRQ's Priority */ |
| 371 | register miu_reg32_t tc_priority; |
| 372 | if (irqx_swcode < IRQ_HRT_PRIORITY_THRESHOLD) { |
| 373 | // HRT IRQs |
| 374 | tc_priority = HRT_CONTEXT_GRP; |
| 375 | } else { |
| 376 | // Non-HRT IRQs and Spurious IRQs |
| 377 | tc_priority = kal_get_current_domain(); |
| 378 | } |
| 379 | miu_mtc0(MIU_C0_TCSCHEDULE, tc_priority << MIU_C0_TCSCHEDULE_PRIO_BITFIELD_BEG); |
| 380 | |
| 381 | #if defined(__DUMMY_L1_ON_TARGET_4G5G__) |
| 382 | /* Record current VPE is not in Idletask for KS IODT FPGA */ |
| 383 | xl1r_vpe_idle_setup_False(); |
| 384 | #endif |
| 385 | |
| 386 | irqx_hwcode_non_spurious = (kal_uint32)SWIRQCode2HWIRQCode[irqx_swcode_non_spurious]; |
| 387 | irqx_hwcode = irqx_hwcode_non_spurious | (irqx_swcode&0x200); |
| 388 | |
| 389 | /* Use HW code to do IRQ logging */ |
| 390 | esl_printf(ESL_SIM_TIME_FLAG|ESL_WALL_TIME_FLAG, "[ISR-%d S]\n", irqx_hwcode); |
| 391 | |
| 392 | /* These global variable will be used by others. The meaning should keep the same as 93*/ |
| 393 | processing_irqx[vpe_num] = irqx_hwcode_non_spurious; |
| 394 | processing_lisr[vpe_num] = (void*)lisr_dispatch_tbl[irqx_hwcode_non_spurious].lisr_handler; |
| 395 | processing_irqCnt[vpe_num]++; |
| 396 | if(processing_irqCnt[vpe_num]>max_processing_irqCnt[vpe_num]) |
| 397 | { |
| 398 | max_processing_irqCnt[vpe_num] = processing_irqCnt[vpe_num]; |
| 399 | } |
| 400 | |
| 401 | |
| 402 | SLA_LoggingLISR(0xaaaa0000 | ((kal_uint32)irqx_hwcode), vpe_num); |
| 403 | |
| 404 | /************************************************************************************ |
| 405 | * SW workaround for "CIRQ Dispatch Misbehaviour" * |
| 406 | * When low priority IRQ is enterting IRQ handler flow (readID ~ set vpe state), and * |
| 407 | * high priority IRQ is choosing best vpe according to vpe state, the high priority * |
| 408 | * IRQ will dispatch to the same VPE and preempt low priority IRQ since vpe state * |
| 409 | * of the low priority IRQ has not yet been updated to CIRQ. This may cause two * |
| 410 | * critical LISRS to run on the same VPE while other VPEs are in IDLE. Therefore, we * |
| 411 | * trigger a dummy DI/EI below to force high priority IRQ to be resent to other VPEs.* |
| 412 | *************************************************************************************/ |
| 413 | |
| 414 | #if defined(__MDCIRQ_GCR_SIGNAL_DISABLE__) |
| 415 | /* Dummy read APB_VPE_IRQ_STATE to guarantee value has been written to CIRQ */ |
| 416 | ASSERT_EXL_SAFE(MDCIRQ_READ_REG_INDEX(MDCIRQ_VPE_IRQ_STATE_BASE, vpe_num) == irqx_swcode_non_spurious); |
| 417 | #else |
| 418 | /* Dummy read GCR_VPE_IRQ_STATE to guarantee value has been written to GCR, |
| 419 | then wait for 3T CIRQ clock so that the GCR value is synced to CIRQ */ |
| 420 | ASSERT_EXL_SAFE(MDCIRQ_READ_REG_INDEX(MDCIRQ_GCR_VPE_IRQ_STATE_BASE, vpe_num) == irqx_swcode_non_spurious); |
| 421 | MDCIRQ_DELAY_LOOP(); |
| 422 | #endif |
| 423 | |
| 424 | /* Dummy DI/EI to force pending IRQs to be resent */ |
| 425 | MDCIRQ_DUMMY_DI(); |
| 426 | MDCIRQ_DELAY_LOOP(); |
| 427 | MDCIRQ_DUMMY_EI(); |
| 428 | |
| 429 | /************************************************************************************ |
| 430 | * SW workaround for "CIRQ Dispatch Misbehaviour" End * |
| 431 | *************************************************************************************/ |
| 432 | |
| 433 | /* Non-Spurious IRQ */ |
| 434 | if(!(irqx_hwcode&0x200)) |
| 435 | { |
| 436 | kal_hrt_mt_save(irqx_hwcode_non_spurious, &mt_stack_ptr_backup); |
| 437 | #if defined(__MDCIRQ_OSIPI_SPECIAL_FLOW__) |
| 438 | /* Mask OSIPI in the first IRQ LISR (because OSIPI is the lowest priority) */ |
| 439 | if( processing_irqCnt[vpe_num] == 1 ) |
| 440 | { |
| 441 | VPE_IRQ_MASK(VPE_IRQID_OSIPI); |
| 442 | } |
| 443 | #endif |
| 444 | if((kal_get_current_domain() == KAL_DOMAIN_CHRT) && (processing_irqCnt[vpe_num] == 1)) |
| 445 | { |
| 446 | // enable and kick WDT |
| 447 | drv_rstctl_set_check_bit((vpeid_e)vpe_num); |
| 448 | drv_rstctl_set_kick_bit((vpeid_e)vpe_num); |
| 449 | } |
| 450 | |
| 451 | wp_hook_dispatchLISR_start(vpe_num,irqx_hwcode_non_spurious); |
| 452 | Clear_EXL(); |
| 453 | |
| 454 | lisr_dispatch_tbl[irqx_hwcode_non_spurious].lisr_handler(irqx_hwcode_non_spurious); |
| 455 | |
| 456 | if(Ibit_Status()!=1) //Ibit cannot be disabled after LISR! |
| 457 | { |
| 458 | kal_fatal_error_handler(KAL_ERROR_INTERRUPT_DISABLED_AFTER_LISR_FAILED, (kal_uint32)processing_lisr[vpe_num]); |
| 459 | } |
| 460 | |
| 461 | Set_EXL(); |
| 462 | wp_hook_dispatchLISR_end(vpe_num,irqx_hwcode_non_spurious); |
| 463 | #if defined(__MDCIRQ_OSIPI_SPECIAL_FLOW__) |
| 464 | /* Unmask OSIPI after the first IRQ LISR */ |
| 465 | if( processing_irqCnt[vpe_num] == 1 ) |
| 466 | { |
| 467 | VPE_IRQ_UNMASK(VPE_IRQID_OSIPI); |
| 468 | } |
| 469 | #endif |
| 470 | if((kal_get_current_domain() == KAL_DOMAIN_CHRT) && (processing_irqCnt[vpe_num] == 1)) |
| 471 | { |
| 472 | // disable WDT |
| 473 | drv_rstctl_clr_check_bit((vpeid_e)vpe_num); |
| 474 | // set wait variable |
| 475 | Idle_Service_Prepare_WAIT(); |
| 476 | } |
| 477 | |
| 478 | |
| 479 | kal_hrt_mt_restore(irqx_hwcode_non_spurious, &mt_stack_ptr_backup); |
| 480 | } |
| 481 | else // spurious IRQ |
| 482 | { |
| 483 | spurious_id[vpe_num][spurious_count[vpe_num]%SPURIOUS_IRQ_LOG_SIZE] = irqx_hwcode; |
| 484 | spurious_count[vpe_num]++; |
| 485 | } |
| 486 | |
| 487 | processing_irqx[vpe_num] = processing_irqx_backup; |
| 488 | processing_lisr[vpe_num] = processing_lisr_backup; |
| 489 | processing_irqCnt[vpe_num]--; |
| 490 | |
| 491 | SLA_LoggingLISR(0xaaaaaaaa, vpe_num); |
| 492 | |
| 493 | /* Use HW code to do IRQ logging */ |
| 494 | esl_printf(ESL_SIM_TIME_FLAG|ESL_WALL_TIME_FLAG, "[ISR-%d E]\n", irqx_hwcode); |
| 495 | |
| 496 | drv_mdcirq_Restore_VPE_state(vpe_num, ori_vpe_state); |
| 497 | |
| 498 | /* Non-Spurious IRQ */ |
| 499 | if(!(irqx_hwcode&0x200)) |
| 500 | { |
| 501 | /* IRQ idx in SW code view */ |
| 502 | if( processing_irqx_backup == IRQ_NOT_LISR_CONTEXT) |
| 503 | MDCIRQ_SYS_endIsr(vpe_num, processing_irqx_backup); |
| 504 | else |
| 505 | MDCIRQ_SYS_endIsr(vpe_num, (kal_uint32)HWIRQCode2SWIRQCode[processing_irqx_backup]); |
| 506 | } |
| 507 | } |