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rjw6c1fd8f2022-11-30 14:33:01 +08001/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2010
8*
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24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
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32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36 /*****************************************************************************
37 *
38 * Filename:
39 * ---------
40 * dcl_dhl.c
41 *
42 * Project:
43 * --------
44 * MOLY_Software
45 *
46 * Description:
47 * ------------
48 * This Module defines DCL (Driver Common Layer) of the IDC driver.
49 *
50 * Author:
51 * -------
52 * -------
53 *
54 *============================================================================
55 * HISTORY
56 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
57 *------------------------------------------------------------------------------
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154 *------------------------------------------------------------------------------
155 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
156 *============================================================================
157 *****************************************************************************/
158
159#define DCL_IDC_INTERFACE
160
161#include "drv_features.h"
162#include "dcl.h"
163#ifdef DCL_IDC_INTERFACE
164#include "kal_general_types.h"
165#include "kal_public_api.h"
166#include "dcl_idc.h"
167#include "drv_idc.h"
168#include "idc_internal.h"
169
170
171// Global variable for DCL DCL API usage
172#define DCL_IDC_MAGIC_NUM (0x40000000)
173#define DCL_IDC_IS_HANDLE_MAGIC(handle_) ((handle_) & DCL_IDC_MAGIC_NUM)
174#define DCL_IDC_GET_DEV(handle_) ((handle_) & (~DCL_IDC_MAGIC_NUM))
175
176/*************************************************************************
177* FUNCTION
178* DclIDC_GetSupport
179*
180* DESCRIPTION
181* This function is to get the support list of IDC driver.
182*
183* PARAMETERS
184* support: [IN]
185* 1. idc: Indicate whether or not idc driver is supported
186* 2. gpio: Indicate whether or not GPIO Co-Exist will be used after idc_init
187* 3. uart: Indicate whether or not UART will be used after idc_init
188*
189* RETURNS
190* Return the support list
191*
192* RETURN VALUES
193* STATUS_OK
194*
195*************************************************************************/
196DCL_STATUS DclIDC_GetSupport(IDC_SUPPORT_T *support)
197{
198 drv_idc_get_support(support);
199
200 return STATUS_OK;
201}
202
203/*************************************************************************
204* FUNCTION
205* DclIDC_Initialize
206*
207* DESCRIPTION
208* This function is to initialize IDC module
209*
210* PARAMETERS
211* None
212*
213* RETURNS
214* Return the status of DclIDC_Initialize
215*
216* RETURN VALUES
217* STATUS_OK: Initialize Finished
218*
219*************************************************************************/
220DCL_STATUS DclIDC_Initialize(IDC_INIT_TYPE_T type)
221{
222 DCL_STATUS status = STATUS_UNSUPPORTED;
223
224 switch (type)
225 {
226 case IDC_INIT:
227 drv_idc_init(KAL_FALSE);
228 break;
229 case IDC_REINIT:
230 drv_idc_init(KAL_TRUE);
231 break;
232 case IDC_UART_ACTIVATE:
233 drv_idc_uart_activate();
234 break;
235 default:
236 ASSERT(0);
237 break;
238 }
239
240 status = STATUS_OK;
241
242 return status;
243}
244
245/*************************************************************************
246* FUNCTION
247* DclIDC_Open
248*
249* DESCRIPTION
250* This function is to open the IDC module and return a handle
251*
252* PARAMETERS
253* dev: [IN] Only valid for DCL_IDC
254* flags: [IN] No sepcial flags is needed. Please use FLAGS_NONE
255*
256* RETURNS
257* Return DCL_HANDLE of IDC
258*
259* RETURN VALUES
260* DCL_HANDLE_INVALID : Open failed
261* Other value : A valid handle
262*
263*************************************************************************/
264DCL_HANDLE DclIDC_Open(DCL_DEV dev, DCL_FLAGS flags)
265{
266 if (dev != DCL_IDC)
267 {
268 ASSERT(0);
269 return DCL_HANDLE_INVALID; // Incorrecr device ID
270 }
271
272 drv_idc_open(flags);
273
274 return (DCL_IDC_MAGIC_NUM | dev);
275}
276
277/*************************************************************************
278* FUNCTION
279* DclIDC_Control
280*
281* DESCRIPTION
282* This function is to send command to control the IDC module.
283*
284* PARAMETERS
285* handle: [IN] The handle value returned from DclIDC_Open
286* cmd: [IN] A control command for IDC module
287* 1. IDC_CMD_SET_DCB_CONFIG: to config DCB (baudrate, data bits, stop bits, and parity bits)
288* 2. IDC_CMD_GET_DCB_CONFIG: to get DCB config from driver
289* 3. IDC_CMD_SET_BAUDRATE: to set baud rate
290* 4. IDC_CMD_GET_MAX_BAUDRATE: to get max baudrate
291* 5. IDC_CMD_SET_FIFO_TRIGGER: to set threshold of idc rx fifo
292* 6. IDC_CMD_SET_PM_CONFIG: to set pattern matching confg (start/finish priority/pattern, pariority/pattern bit enable)
293* 7. IDC_CMD_GET_PM_CONFIG: to get pattern matching
294* 8. IDC_CMD_SCHEDULE_EVENT: to schedule events
295* 9. IDC_CMD_SCHEDULE_UPDATE: to update schedule
296* 10. IDC_CMD_STOP_EVENT: to stop specific event from specific schedule
297* 11. IDC_CMD_PURGE: to clean IDC RX FIFO
298* 12. IDC_CMD_GET_SCHEDULE_STATUS: to get status of schedule (bitmap, busy:1, idle:0)
299* 13. IDC_CMD_CHECK_EVENT_SEND_OUT: to check all events are sent out from IDC or not
300* 14. IDC_CMD_SET_PIN_CONFIG: to set pinmux beteen internal and external pins (K2 Only)
301* 15. IDC_CMD_GET_PIN_CONFIG: to get pinumx config (K2 Only)
302*
303* data: [IN] The data of the control command
304* 1. IDC_CTRL_DCB_CONFIG_T: pointer to an IDC_CTRL_DCB_CONFIG_T structure
305* 2. IDC_CTRL_BAUDRATE_T: pointer to an IDC_CTRL_BAUDRATE_T structure
306* 3. IDC_CTRL_SET_FIFO_TRIGGER_T: pointer to an IDC_CTRL_SET_FIFO_TRIGGER_T structure
307* 4. IDC_CTRL_PM_CONFIG_T: pointer to an IDC_CTRL_PM_CONFIG_T structure
308* 5. IDC_CTRL_SCHEDULE_EVENT_T: pointer to an IDC_CTRL_SCHEDULE_EVENT_T structure
309* 6. IDC_CTRL_SCHEDULE_UPDATE_T: pointer to an IDC_CTRL_SCHEDULE_UPDATE_T structure
310* 7. IDC_CTRL_STOP_EVENT_T: pointer to an IDC_CTRL_STOP_EVENT_T structure
311* 8. IDC_CTRL_PURGE_T: pointer to an IDC_CTRL_PURGE structure
312* 9. IDC_CTRL_GET_SCHEDULE_STATUS_T: pointer to an IDC_CTRL_GET_SCHEDULE_STATUS_T structure
313* 10. IDC_CTRL_CHECK_EVENT_SEND_OUT_T: pointer to an IDC_CTRL_CHECK_EVENT_SEND_OUT_T structure
314* 11. IDC_CTRL_PIN_CONFIG_T: pointer to an IDC_CTRL_PIN_CONFIG_T structure
315*
316* RETURNS
317* Return the status of DclIDC_Control
318*
319* RETURN VALUES
320* STATUS_OK: Command is executed successfully.
321* STATUS_FAIL: Command is failed.
322* STATUS_INVALID_CMD: It's a invalid command.
323*
324*************************************************************************/
325DCL_STATUS DclIDC_Control(DCL_HANDLE handle, DCL_CTRL_CMD cmd, DCL_CTRL_DATA_T *data)
326{
327 DCL_STATUS return_value = STATUS_INVALID_DCL_HANDLE;
328 // Check magic number
329 if(DCL_IDC_IS_HANDLE_MAGIC(handle) == 0)
330 {
331 ASSERT(0);
332 return STATUS_INVALID_DCL_HANDLE;
333 }
334
335 switch(cmd)
336 {
337 case IDC_CMD_SET_DCB_CONFIG:
338 {
339 IDC_CTRL_DCB_CONFIG_T *pr_ctrl_dcb_config;
340 pr_ctrl_dcb_config = &(data->r_idc_ctrl_dcb_config);
341 drv_idc_set_dcb_config(*pr_ctrl_dcb_config);
342 return_value = STATUS_OK;
343 break;
344 }
345 case IDC_CMD_GET_DCB_CONFIG:
346 {
347 IDC_CTRL_DCB_CONFIG_T *pr_ctrl_dcb_config;
348 pr_ctrl_dcb_config = &(data->r_idc_ctrl_dcb_config);
349 drv_idc_get_dcb_config(pr_ctrl_dcb_config);
350 return_value = STATUS_OK;
351 break;
352 }
353 case IDC_CMD_SET_BAUDRATE:
354 {
355 IDC_CTRL_BAUDRATE_T *pr_ctrl_baudrate;
356 pr_ctrl_baudrate = &(data->r_idc_ctrl_baudrate);
357 drv_idc_set_baudrate(pr_ctrl_baudrate->baudrate);
358 return_value = STATUS_OK;
359 break;
360 }
361 case IDC_CMD_GET_MAX_BAUDRATE:
362 {
363 IDC_CTRL_BAUDRATE_T *pr_ctrl_baudrate;
364 pr_ctrl_baudrate = &(data->r_idc_ctrl_baudrate);
365 pr_ctrl_baudrate->baudrate = 4000000;
366 return_value = STATUS_OK;
367 break;
368 }
369 case IDC_CMD_SET_FIFO_TRIGGER:
370 {
371 IDC_CTRL_SET_FIFO_TRIGGER_T *pr_ctrl_set_fifo_trigger;
372 pr_ctrl_set_fifo_trigger = &(data->r_idc_ctrl_set_fifo_trigger);
373 drv_idc_set_fifo_trigger(pr_ctrl_set_fifo_trigger->rx_threshold);
374 return_value = STATUS_OK;
375 break;
376 }
377 case IDC_CMD_SET_PM_CONFIG:
378 {
379 IDC_CTRL_PM_CONFIG_T *pr_ctrl_pm_config;
380 pr_ctrl_pm_config = &(data->r_idc_ctrl_pm_config);
381 drv_idc_set_pm_config(pr_ctrl_pm_config->pm_idx, pr_ctrl_pm_config->priority, pr_ctrl_pm_config->priority_bit_en, pr_ctrl_pm_config->pattern, pr_ctrl_pm_config->pattern_bit_en);
382 return_value = STATUS_OK;
383 break;
384 }
385 case IDC_CMD_GET_PM_CONFIG:
386 {
387 IDC_CTRL_PM_CONFIG_T *pr_ctrl_pm_config;
388 pr_ctrl_pm_config = &(data->r_idc_ctrl_pm_config);
389 drv_idc_get_pm_config(pr_ctrl_pm_config->pm_idx, &(pr_ctrl_pm_config->priority),
390 &(pr_ctrl_pm_config->priority_bit_en), &(pr_ctrl_pm_config->pattern), &(pr_ctrl_pm_config->pattern_bit_en));
391 return_value = STATUS_OK;
392 break;
393 }
394 case IDC_CMD_SEND_EVENT:
395 {
396 IDC_CTRL_SCHEDULE_EVENT_T *pr_ctrl_schedule_event;
397 pr_ctrl_schedule_event = &(data->r_idc_ctrl_schedule_event);
398
399#if defined(__MD93__)
400 drv_idc_send_event(pr_ctrl_schedule_event->schedule_event, pr_ctrl_schedule_event->sleep_mode);
401 return_value = STATUS_OK;
402#elif defined(__MD95__)
403 if(drv_idc_send_event_95(pr_ctrl_schedule_event->schedule_event, pr_ctrl_schedule_event->sleep_mode))
404 return_value = STATUS_OK;
405 else
406 return_value = STATUS_FAIL;
407#elif defined(__MD97__) || defined(__MD97P__)
408 if(drv_idc_send_event_97(pr_ctrl_schedule_event->schedule_event, pr_ctrl_schedule_event->sleep_mode))
409 return_value = STATUS_OK;
410 else
411 return_value = STATUS_FAIL;
412#endif
413
414 break;
415 }
416 case IDC_CMD_SCHEDULE_EVENT:
417 {
418 IDC_CTRL_SCHEDULE_EVENT_T *pr_ctrl_schedule_event;
419 pr_ctrl_schedule_event = &(data->r_idc_ctrl_schedule_event);
420
421#if defined(__MD93__)
422 drv_idc_schedule_event(pr_ctrl_schedule_event->schedule_event);
423 return_value = STATUS_OK;
424#elif defined(__MD95__)
425 if(drv_idc_schedule_event_95(pr_ctrl_schedule_event->schedule_event, pr_ctrl_schedule_event->drop_cmd))
426 return_value = STATUS_OK;
427 else
428 return_value = STATUS_FAIL;
429#elif defined(__MD97__) || defined(__MD97P__)
430 if(drv_idc_schedule_event_97(pr_ctrl_schedule_event->schedule_event, pr_ctrl_schedule_event->drop_cmd))
431 return_value = STATUS_OK;
432 else
433 return_value = STATUS_FAIL;
434#endif
435 break;
436 }
437 case IDC_CMD_SCHEDULE_GPS_BLANK_EVENT:
438 {
439 IDC_CTRL_GPS_SINGLE_BLANK_EVENT_T *pr_ctrl_gps_single_blank_event;
440 pr_ctrl_gps_single_blank_event = &(data->r_idc_ctrl_gps_single_blank_event);
441 if(drv_idc_schedule_gps_blank_event(pr_ctrl_gps_single_blank_event->rat_status, pr_ctrl_gps_single_blank_event->gps_mode,pr_ctrl_gps_single_blank_event->frc_time))
442 return_value = STATUS_OK;
443 else
444 return_value = STATUS_FAIL;
445 break;
446 }
447 case IDC_CMD_SCHEDULE_GPS_L1_L5_BLANK_EVENT:
448 {
449 IDC_CTRL_GPS_L1_L5_BLANK_EVENT_T *pr_ctrl_gps_l1_l5_blank_event;
450 pr_ctrl_gps_l1_l5_blank_event = &(data->r_idc_ctrl_gps_l1_l5_blank_event);
451
452 if(drv_idc_schedule_gps_l1_l5_blank_event(pr_ctrl_gps_l1_l5_blank_event->rat_status, pr_ctrl_gps_l1_l5_blank_event->raw_data, pr_ctrl_gps_l1_l5_blank_event->frc_time))
453 return_value = STATUS_OK;
454 else
455 return_value = STATUS_FAIL;
456 break;
457 }
458 case IDC_CMD_SCHEDULE_UPDATE:
459 {
460 IDC_CTRL_SCHEDULE_UPDATE_T *pr_ctrl_schedule_update;
461 pr_ctrl_schedule_update = &(data->r_idc_ctrl_schedule_start);
462#if defined(__MD93__)
463 drv_idc_schedule_update(pr_ctrl_schedule_update->phy_time_set);
464#elif defined(__MD95__)
465 drv_idc_schedule_update_95(pr_ctrl_schedule_update->phy_time_set);
466#elif defined(__MD97__) || defined(__MD97P__)
467 drv_idc_schedule_update_97(pr_ctrl_schedule_update->phy_time_set);
468#endif
469 break;
470 }
471 case IDC_CMD_PURGE:
472 {
473 IDC_CTRL_PURGE_T *pr_ctrl_purge;
474 pr_ctrl_purge = &(data->r_idc_ctrl_purge);
475 drv_idc_purge(pr_ctrl_purge->dir);
476 return_value = STATUS_OK;
477 break;
478 }
479 case IDC_CMD_CHECK_EVENT_SEND_OUT:
480 {
481 IDC_CTRL_CHECK_EVENT_SEND_OUT_T *pr_ctrl_check_event_send_out;
482 pr_ctrl_check_event_send_out = &(data->r_idc_ctrl_check_event_send_out);
483 pr_ctrl_check_event_send_out->send_out = drv_idc_check_event_send_out();
484 return_value = STATUS_OK;
485 break;
486 }
487 case IDC_CMD_SET_PIN_CONFIG:
488 {
489 IDC_CTRL_PIN_CONFIG_T *pr_ctrl_pin_config;
490 pr_ctrl_pin_config = &(data->r_idc_ctrl_pin_config);
491 return_value = drv_idc_set_pin_config(pr_ctrl_pin_config->pin_mode);
492 break;
493 }
494 case IDC_CMD_GET_PIN_CONFIG:
495 {
496 IDC_CTRL_PIN_CONFIG_T *pr_ctrl_pin_config;
497 pr_ctrl_pin_config = &(data->r_idc_ctrl_pin_config);
498 return_value = drv_idc_get_pin_config(&(pr_ctrl_pin_config->pin_mode));
499 break;
500 }
501 case IDC_CMD_REGISTER_PM_CALLBACK:
502 {
503 IDC_CTRL_PM_CALLBACK_T *pr_ctrl_pm_callback;
504 pr_ctrl_pm_callback = &(data->r_idc_ctrl_pm_callback);
505#if defined(__MD93__)
506 return_value = drv_idc_register_pm_callback(pr_ctrl_pm_callback->pm_idx, pr_ctrl_pm_callback->func_ptr, pr_ctrl_pm_callback->private_data);
507#elif defined(__MD95__) || defined(__MD97__) || defined(__MD97P__)
508 return_value = drv_idc_register_pm_callback_95(pr_ctrl_pm_callback->pm_idx, pr_ctrl_pm_callback->func_ptr, (void *)pr_ctrl_pm_callback->private_data);
509#endif
510 break;
511 }
512 case IDC_CMD_UNREGISTER_PM_CALLBACK:
513 {
514 IDC_CTRL_PM_CALLBACK_T *pr_ctrl_pm_callback;
515 pr_ctrl_pm_callback = &(data->r_idc_ctrl_pm_callback);
516 return_value = drv_idc_unregister_pm_callback(pr_ctrl_pm_callback->pm_idx);
517 break;
518 }
519 case IDC_CMD_SET_NEW_PM_CONFIG:
520 {
521 IDC_CTRL_NEW_PM_CONFIG_T *pr_ctrl_new_pm_config;
522 pr_ctrl_new_pm_config = &(data->r_idc_ctrl_new_pm_config);
523 drv_idc_set_new_pm_config(pr_ctrl_new_pm_config->pattern0, pr_ctrl_new_pm_config->pattern1);
524 return_value = STATUS_OK;
525 break;
526 }
527 case IDC_CMD_GET_NEW_PM_CONFIG:
528 {
529 IDC_CTRL_NEW_PM_CONFIG_T *pr_ctrl_new_pm_config;
530 pr_ctrl_new_pm_config = &(data->r_idc_ctrl_new_pm_config);
531 drv_idc_get_new_pm_config(&(pr_ctrl_new_pm_config->pattern0), &(pr_ctrl_new_pm_config->pattern1));
532 return_value = STATUS_OK;
533 break;
534 }
535 case IDC_CMD_STOP_EVENT:
536 {
537 IDC_CTRL_STOP_EVENT_T *pr_ctrl_stop_event;
538 pr_ctrl_stop_event = &(data->r_idc_ctrl_stop_event);
539#if defined(__MD97__) || defined(__MD97P__)
540 drv_idc_stop_event_97(pr_ctrl_stop_event->bitmap);
541#else
542 drv_idc_stop_event(pr_ctrl_stop_event->bitmap);
543#endif
544 return_value = STATUS_OK;
545 break;
546 }
547 case IDC_CMD_GET_SCHEDULE_STATUS:
548 {
549 IDC_CTRL_GET_SCHEDULE_STATUS_T *pr_ctrl_get_schedule_status;
550 pr_ctrl_get_schedule_status = &(data->r_idc_ctrl_get_schedule_status);
551 drv_idc_get_schedule_status(pr_ctrl_get_schedule_status->schedule_status);
552 return_value = STATUS_OK;
553 break;
554 }
555 case IDC_CMD_GET_SCHEDULE_STATUS_2:
556 {
557 IDC_CTRL_GET_SCHEDULE_STATUS_T *pr_ctrl_get_schedule_status;
558 pr_ctrl_get_schedule_status = &(data->r_idc_ctrl_get_schedule_status);
559 drv_idc_get_schedule_status_2(pr_ctrl_get_schedule_status->schedule_status);
560 return_value = STATUS_OK;
561 break;
562 }
563 case IDC_CMD_FORCE_ON_RF:
564 {
565 IDC_CTRL_RF_PATH_T *pr_ctrl_rf_path;
566 pr_ctrl_rf_path = &(data->r_idc_ctrl_rf_path);
567 drv_idc_force_on_rf(pr_ctrl_rf_path->rf_path);
568 return_value = STATUS_OK;
569 break;
570 }
571 case IDC_CMD_REMAPPING_CONFIG:
572 {
573 IDC_CTRL_REMAPPING_CONFIG_T *pr_ctrl_remapping_config;
574 pr_ctrl_remapping_config = &(data->r_idc_ctrl_remapping_config);
575 drv_idc_set_remapping_config(pr_ctrl_remapping_config->remapping_table, pr_ctrl_remapping_config->remapping_table_en);
576 return_value = STATUS_OK;
577 break;
578 }
579 //PETRUS
580 case IDC_CMD_AUTO_TX_CONFIG:
581 {
582 IDC_AUTO_TX_CONFIG_T *pr_ctrl_auto_tx_config;
583 pr_ctrl_auto_tx_config = &(data->r_idc_ctrl_auto_tx_config);
584 drv_idc_auto_tx_config(pr_ctrl_auto_tx_config->tx_susp_quota, pr_ctrl_auto_tx_config->reset_quota);
585 return_value = STATUS_OK;
586 break;
587 }
588 case IDC_CMD_AUTO_TX_EN:
589 {
590 IDC_AUTO_TX_EN_T *pr_ctrl_auto_tx_en;
591 pr_ctrl_auto_tx_en = &(data->r_idc_ctrl_auto_tx_en);
592 drv_idc_auto_tx_en(pr_ctrl_auto_tx_en->auto_tx_en);
593 return_value = STATUS_OK;
594 break;
595 }
596
597 case IDC_CMD_SCHEDULE_UPDATE_N_RETRUN_RFTX:
598 {
599 IDC_CTRL_SCHEDULE_UPDATE_N_RETRUN_RFTX_T *pr_ctrl_schedule_update_n_return_rftx;
600 pr_ctrl_schedule_update_n_return_rftx = &(data->r_idc_ctrl_schedule_update_n_return_rftx);
601
602 drv_idc_schedule_update_n_return_rftx(pr_ctrl_schedule_update_n_return_rftx->frc_time_set, &(pr_ctrl_schedule_update_n_return_rftx->rf_path_status));
603 break;
604 }
605 case IDC_CMD_SCHEDULE_EVENT_LTE_NR:
606 {
607 IDC_CTRL_SCHEDULE_EVENT_LTE_NR_T *pr_ctrl_schedule_event_lte_nr;
608 pr_ctrl_schedule_event_lte_nr = &(data->r_idc_ctrl_schedule_event_lte_nr);
609
610 if(drv_idc_schedule_event_lte_nr(pr_ctrl_schedule_event_lte_nr->schedule_event, pr_ctrl_schedule_event_lte_nr->event_type, pr_ctrl_schedule_event_lte_nr->drop_cmd))
611 return_value = STATUS_OK;
612 else
613 return_value = STATUS_FAIL;
614 break;
615 }
616 case IDC_CMD_ENABLE_RAT:
617 {
618 IDC_RAT_T *pr_ctrl_rat_status;
619 pr_ctrl_rat_status = &(data->r_idc_ctrl_rat_status);
620
621 drv_idc_set_enable_rat(pr_ctrl_rat_status->rat_status);
622 break;
623 }
624 case IDC_CMD_DISABLE_RAT:
625 {
626 IDC_RAT_T *pr_ctrl_rat_status;
627 pr_ctrl_rat_status = &(data->r_idc_ctrl_rat_status);
628
629 drv_idc_set_disable_rat(pr_ctrl_rat_status->rat_status);
630 break;
631 }
632 case IDC_CMD_SLEEP_NOTIFY:
633 {
634 IDC_RAT_T *pr_ctrl_rat_status;
635 pr_ctrl_rat_status = &(data->r_idc_ctrl_rat_status);
636
637 drv_idc_sleep_notify(pr_ctrl_rat_status->rat_status);
638 break;
639 }
640 case IDC_CMD_WAKE_NOTIFY:
641 {
642 IDC_RAT_T *pr_ctrl_rat_status;
643 pr_ctrl_rat_status = &(data->r_idc_ctrl_rat_status);
644
645 drv_idc_wakeup_notify(pr_ctrl_rat_status->rat_status);
646 break;
647 }
648 case IDC_CMD_SET_ILM:
649 {
650 IDC_ILM_T *pr_ctrl_ilm_mode;
651 pr_ctrl_ilm_mode = &(data->r_idc_ctrl_ilm_mode);
652
653 drv_idc_set_ilm(pr_ctrl_ilm_mode->ilm_mode);
654 break;
655 }
656 case IDC_CMD_GPS_B13_B14:
657 {
658 IDC_GPS_B13_B14_T *pr_ctrl_gps_b13_b14_mode;
659 pr_ctrl_gps_b13_b14_mode = &(data->r_idc_ctrl_gps_b13_b14_mode);
660
661 drv_idc_gps_b13_b14_set(pr_ctrl_gps_b13_b14_mode->rat_status, pr_ctrl_gps_b13_b14_mode->raw_data);
662 break;
663 }
664 default:
665 ASSERT(0);
666 return_value = STATUS_INVALID_CMD;
667 break;
668 }
669
670 return return_value;
671}
672
673/*************************************************************************
674* FUNCTION
675* DclIDC_conn_txrx_count
676*
677* DESCRIPTION
678* This function is to start/end counting BT_80211_RX and BT_80211_TX
679*
680* PARAMETERS
681* is_start: [IN] KAL_TRUE: Start counting
682* KAL_FALSE: End counting
683*
684* RETURNS
685* Return the status of DclIDC_conn_txrx_count
686*
687* RETURN VALUES
688* STATUS_OK
689*
690*************************************************************************/
691DCL_STATUS DclIDC_conn_txrx_count(kal_bool is_start)
692{
693 drv_idc_conn_txrx_count(is_start);
694
695 return STATUS_OK;
696}
697
698/*************************************************************************
699* FUNCTION
700* DclIDC_Close
701*
702* DESCRIPTION
703* This function is to close the IDC module.
704*
705* PARAMETERS
706* handle: [IN] The returned handle value of DclIDC_Open
707*
708* RETURNS
709* Return the status of DclIDC_Close
710*
711* RETURN VALUES
712* STATUS_OK
713*
714*************************************************************************/
715DCL_STATUS DclIDC_Close(DCL_HANDLE handle)
716{
717 // Check magic number
718 if(DCL_IDC_IS_HANDLE_MAGIC(handle) == 0)
719 {
720 ASSERT(0);
721 return STATUS_INVALID_DCL_HANDLE;
722 }
723
724 drv_idc_close();
725
726 return STATUS_OK;
727}
728
729#else // Else of #ifdef DCL_IDC_INTERFACE
730
731DCL_STATUS DclIDC_GetSupport(IDC_SUPPORT_T *support)
732{
733 return STATUS_UNSUPPORTED;
734}
735
736DCL_STATUS DclIDC_Initialize(void)
737{
738 return STATUS_UNSUPPORTED;
739}
740
741DCL_HANDLE DclIDC_Open(DCL_DEV dev, DCL_FLAGS flags)
742{
743 return STATUS_UNSUPPORTED;
744}
745
746DCL_STATUS DclIDC_Control(DCL_HANDLE handle, DCL_CTRL_CMD cmd, DCL_CTRL_DATA_T *data)
747{
748 return STATUS_UNSUPPORTED;
749}
750
751DCL_STATUS DclIDC_conn_txrx_count(kal_bool is_start)
752{
753 return STATUS_UNSUPPORTED;
754}
755
756DCL_STATUS DclIDC_Close(DCL_HANDLE handle)
757{
758 return STATUS_UNSUPPORTED;
759}
760
761#endif // End of #ifdef DCL_IDC_INTERFACE