blob: eb9c1d7867dcaf8cf00d35eae0d210abec870537 [file] [log] [blame]
rjw6c1fd8f2022-11-30 14:33:01 +08001#ifndef __UART_GPD_H__
2#define __UART_GPD_H__
3
4#define HDMA_MAX_GPD_EXT_LEN 0xFF
5#define HDMA_MAX_BD_EXT_LEN 0xFF
6
7typedef enum{
8 HDMA_BUF0,
9 HDMA_BUF1,
10 HDMA_BUF_BOTH,
11} hdma_buf_mode_t;
12
13typedef enum{
14 HDMA_TST_TX,
15 HDMA_TST_RX,
16} hdma_tst_mode_t;
17
18typedef struct hdma_tgpd_s {
19 kal_uint8 hwo:1;
20 kal_uint8 bdp:1;
21 kal_uint8 bps:1;
22 kal_uint8 resv1:4;
23 kal_uint8 ioc:1;
24 kal_uint8 cksum;
25 kal_uint16 resv2;
26 kal_uint32 nextPtr;
27 kal_uint32 bufPtr;
28 kal_uint16 bufLen;
29 kal_uint8 extLen;
30 kal_uint8 resv3;
31 kal_uint8 extBuf[HDMA_MAX_GPD_EXT_LEN + 1]; // Extension field
32} hdma_tgpd_t;
33
34typedef struct hdma_rgpd_s {
35 kal_uint8 hwo:1;
36 kal_uint8 bdp:1;
37 kal_uint8 bps:1;
38 kal_uint8 resv1:4;
39 kal_uint8 ioc:1;
40 kal_uint8 cksum;
41 kal_uint16 allowBufLen;
42 kal_uint32 nextPtr;
43 kal_uint32 bufPtr;
44 kal_uint16 bufLen;
45 kal_uint16 resv2;
46} hdma_rgpd_t;
47
48typedef struct hdma_tbd_s {
49 kal_uint8 eol:1;
50 kal_uint8 resv1:7;
51 kal_uint8 cksum;
52 kal_uint16 resv2;
53 kal_uint32 nextPtr;
54 kal_uint32 bufPtr;
55 kal_uint16 bufLen;
56 kal_uint8 extLen;
57 kal_uint8 resv3;
58 kal_uint8 extBuf[HDMA_MAX_BD_EXT_LEN + 1]; // Extension field
59} hdma_tbd_t;
60
61typedef struct hdma_rbd_s {
62 kal_uint8 eol:1;
63 kal_uint8 resv1:7;
64 kal_uint8 cksum;
65 kal_uint16 allowBufLen;
66 kal_uint32 nextPtr;
67 kal_uint32 bufPtr;
68 kal_uint16 bufLen;
69 kal_uint16 resv2;
70} hdma_rbd_t;
71
72typedef struct hdma_tx_queue_s {
73 hdma_tgpd_t *gpdHeadPtr;
74 hdma_tgpd_t *lastLoadedGpdPtr;
75 kal_uint32 count;
76} hdma_tx_queue_t;
77
78typedef struct hdma_rx_queue_s {
79 hdma_rgpd_t *gpdHeadPtr;
80 hdma_rgpd_t *lastLoadedGpdPtr;
81 kal_uint32 count;
82} hdma_rx_queue_t;
83
84typedef struct hdma_tgpd_pool_s{
85 kal_uint32 gpdUsed;
86 kal_uint32 gpdMax;
87 hdma_tgpd_t *gpd;
88} hdma_tgpd_pool_t;
89
90typedef struct hdma_rgpd_pool_s{
91 kal_uint32 gpdUsed;
92 kal_uint32 gpdMax;
93 hdma_rgpd_t *gpd;
94} hdma_rgpd_pool_t;
95
96typedef struct hdma_tbd_pool_s{
97 kal_uint32 bdUsed;
98 kal_uint32 bdMax;
99 hdma_tbd_t *bd;
100} hdma_tbd_pool_t;
101
102typedef struct hdma_rbd_pool_s{
103 kal_uint32 bdUsed;
104 kal_uint32 bdMax;
105 hdma_rbd_t *bd;
106} hdma_rbd_pool_t;
107
108typedef struct hdma_gpd_bd_param_s{
109 kal_uint32 gpdLenLimit;
110 kal_uint32 gpdExtLen;
111 kal_uint32 bdLenLimit;
112 kal_uint32 bdExtLen;
113 kal_uint32 bdNumLimit;
114} hdma_gpd_bd_param_t;
115
116typedef struct hdma_gpd_config_s{
117 kal_uint8 bps:1;
118 kal_uint8 ioc:1;
119 kal_uint8 resv:6;
120} hdma_gpd_config_t;
121
122#endif