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192.168.1.100 / T800_MD / 0b80c7188a6089ae59f523c5d460adad05960e1d / . / mcu / interface / driver / hwdrv / sccb.h_
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rjw6c1fd8f2022-11-30 14:33:01 +0800[diff] [blame]1/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2005
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36/*****************************************************************************
37 *
38 * Filename:
39 * ---------
40 * sccb.h
41 *
42 * Project:
43 * --------
44 * MT6219
45 *
46 * Description:
47 * ------------
48 * SCCB interface
49 *
50 * Author:
51 * -------
52 * PC Huang (mtk00548)
53 *
54 *============================================================================
55 * HISTORY
56 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
57 *------------------------------------------------------------------------------
58 * $Revision: 1.6 $
59 * $Modtime: Aug 08 2005 13:03:16 $
60 * $Log: //mtkvs01/vmdata/Maui_sw/archives/mcu/interface/hwdrv/sccb.h-arc $
61 *
62 * 04 24 2012 wcpuser_integrator
63 * [MAUI_03155806] [MSBB2] Global Revise Clear and Uniform Legacy Header File Inclusion Requested by JI Huang
64 * .
65 *
66 * 11 30 2010 guoxin.hong
67 * [MAUI_02841708] [Drv] MAUI HAL Peripheral Create
68 * .
69 *
70 * 11 17 2010 shuang.han
71 * [MAUI_02641139] [Drv][I2C] MT6253D compile option removel
72 * .
73 *
74 * 10 27 2010 shuang.han
75 * [MAUI_02638863] [I2C][6253E] fix 6253E i2c pin gpio mode
76 * .
77 *
78 * 10 18 2010 shuang.han
79 * [MAUI_02637814] [RHR][MAUIW1038OF_RHR] Integration to W10.43
80 * .
81 *
82 * 09 09 2010 vincent.liu
83 * [MAUI_02603694] [MT6253EL] [Camere] Check in code for 6253E/L
84 * modify gpio scl/sda pin define for 6253E serial sensor
85 *
86 * 08 29 2010 wy.chuang
87 * [MAUI_02397396] I2C V1 phase out
88 * .
89 *
90 * 08 17 2010 jason.chang
91 * [MAUI_02603694] [MT6253EL] [Camere] Check in code for 6253E/L
92 * .
93 *
94 * 08 16 2010 bin.han
95 * [MAUI_02631832] [I2C]Fix build error
96 * .
97 *
98 * 08 16 2010 bin.han
99 * [MAUI_02631832] [I2C]Fix build error
100 * .
101 *
102 * Jun 25 2010 mtk01973
103 * [MAUI_02563774] [6276 HQA] Check in MAUI
104 *
105 *
106 * Jun 5 2010 mtk01973
107 * [MAUI_02542177] [MT6255_DVT] The plan for merging to MAUI (For 55 MM HQA!)
108 *
109 *
110 * Apr 21 2010 mtk02787
111 * [MAUI_02399508] patch I2C CLK/DATA pin for MT6253
112 *
113 *
114 * Apr 15 2010 mtk01283
115 * [MAUI_02396917] [MT6253][GPIO] Fix GPIO_MODE11 register default value setting
116 *
117 *
118 * Feb 23 2010 mtk01845
119 * [MAUI_02360180] [Drv][I2C] I2C driver revision for new DMA architecture from MT6276
120 *
121 *
122 * Feb 20 2010 mtk01845
123 * [MAUI_02360180] [Drv][I2C] I2C driver revision for new DMA architecture from MT6276
124 *
125 *
126 * Dec 12 2009 mtk01845
127 * [MAUI_01975292] [Drv] Klockwork error fix
128 * Add MT6253D option
129 *
130 * Dec 12 2009 mtk01845
131 * [MAUI_01975292] [Drv] Klockwork error fix
132 *
133 *
134 * Oct 5 2009 mtk01845
135 * [MAUI_01963866] [Drv][I2C] sccb.h define I2C pins
136 *
137 *
138 * Jun 17 2009 syu
139 * [MAUI_01869884] [CAMERA][Driver]<S5K5BAFX> DAGIO_WISE_6235_DEMO_GPRS CAMERA driver check-in
140 * #define SCCB_SERIAL_CLK_PIN gpio_sccb_serial_clk_pin
141 * #define SCCB_SERIAL_DATA_PIN gpio_sccb_serial_data_pin
142 *
143 * So we can change codegen to match Adagio sch
144 *
145 * Jan 12 2009 mtk01845
146 * [MAUI_01307296] MT6235 charger constant current CC6 and CC7 change to internal use
147 *
148 *
149 * Nov 6 2008 mtk01845
150 * [MAUI_01269587] [Drv] MT6253T merge back to MAUI
151 *
152 *
153 * Jul 31 2008 mtk01845
154 * [MAUI_00813620] [Drv][MoDIS] Dummay APIs modification for MoDIS
155 *
156 *
157 * Jul 18 2008 mtk01845
158 * [MAUI_00786000] [Drv][General] Lint modification
159 *
160 *
161 * Jun 23 2008 mtk01283
162 * [MAUI_00761183] [Drv][GPIO] Correct GPIO usage when using driver customization tool
163 *
164 *
165 * Jun 18 2008 mtk01283
166 * [MAUI_00789872] [Drv][SCCB] Patch SCCB GPIO definition to pass the GPIO error checking
167 *
168 *
169 * Jun 12 2008 mtk01283
170 * [MAUI_00761183] [Drv][GPIO] Correct GPIO usage when using driver customization tool
171 *
172 *
173 * Jun 11 2008 mtk01283
174 * [MAUI_00761183] [Drv][GPIO] Correct GPIO usage when using driver customization tool
175 *
176 *
177 * Jun 4 2008 mtk01283
178 * [MAUI_00781398] [Drv][SCCB] Patch the sccb variable name definitioin
179 *
180 *
181 * Jun 2 2008 mtk01283
182 * [MAUI_00761183] [Drv][GPIO] Correct GPIO usage when using driver customization tool
183 *
184 *
185 * May 30 2008 mtk01283
186 * [MAUI_00761183] [Drv][GPIO] Correct GPIO usage when using driver customization tool
187 *
188 *
189 * Apr 30 2008 mtk01845
190 * [MAUI_00765087] [Drv][MISC] MT6239 compile option support
191 *
192 *
193 * Apr 10 2008 mtk01845
194 * [MAUI_00742324] Build warning fix
195 *
196 *
197 * Mar 18 2008 MTK01845
198 * [MAUI_00734333] Patch for wrong SCCB pin variable with GPIO magic number
199 *
200 *
201 * Mar 13 2008 MTK01845
202 * [MAUI_00620676] [Drv][SCCB] Add SCCB related code for MT6223P platforms
203 * Support custom tool configuration
204 *
205 * Feb 19 2008 MTK01845
206 * [MAUI_00620676] [Drv][SCCB] Add SCCB related code for MT6223P platforms
207 *
208 *
209 * Nov 9 2007 mtk01283
210 * [MAUI_00573819] [Drv][Compile option] Check in MT6235 compile option to Maui
211 *
212 *
213 * Sep 1 2007 mtk01283
214 * [MAUI_00541110] [Drv][Compile option] Check in MT6238 compile option to MainTrunk
215 *
216 *
217 * May 17 2007 mtk01454
218 * [MAUI_00393840] [camera] 6226D compiler option check in
219 *
220 *
221 * Mar 22 2007 mtk01454
222 * [MAUI_00358749] [camera]6227D DVT compiler option check in
223 *
224 *
225 * Dec 5 2006 mtk01283
226 * [MAUI_00348513] [Drv][Feature Option]Apply driver customization tool on Crystal25_Demo project
227 *
228 *
229 * Nov 2 2006 mtk01051
230 * [MAUI_00340010] [SCCB] MT6230 first check in for 06A
231 *
232 *
233 * Oct 5 2006 mtk01235
234 * [MAUI_00324378] [6225 DVT] First Check IN
235 *
236 *
237 * Sep 18 2006 mtk01051
238 * [MAUI_00329410] [1]Assert fail:0m12110.c 1136-REASM
239 * Modify gpio read/write command when __CUST_NEW__
240 *
241 * May 12 2006 mtk01051
242 * [MAUI_00193192] [Drv][Feature]check in codes modified for compile option __CUST_NEW__
243 *
244 *
245 * Apr 24 2006 mtk01051
246 * [MAUI_00188852] [Drv][New Feature] add compile option __CUST_NEW__ for new driver customization meth
247 * Add __CUST_NEW__ complier option
248 *
249 * Jan 3 2006 mtk01051
250 * [MAUI_00165680] [SCCB] Add MT6226M complier option
251 * First check in for MT6226M
252 *
253 * Rev 1.6 Aug 08 2005 13:03:30 mtk01051
254 * Add NACK_BIT Define
255 *
256 * Rev 1.5 Aug 01 2005 18:56:34 mtk01051
257 * Modify HW SCCB Interface
258 *
259 * Rev 1.4 Jul 20 2005 18:30:32 mtk01051
260 * Modify MT6228 SCCB interface pin assignment
261 *
262 * Rev 1.3 Jun 05 2005 17:20:04 mtk00747
263 * MT6228 first version
264 *
265 * Rev 1.2 May 17 2005 00:29:16 BM_Trunk
266 * Karlos:
267 * add copyright and disclaimer statement
268 *
269 * Rev 1.1 Jan 18 2005 00:34:28 BM
270 * append new line in W05.04
271 *
272 * Rev 1.0 May 28 2004 20:09:38 BM
273 * Initial revision.
274 *
275 *------------------------------------------------------------------------------
276 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
277 *============================================================================
278 ****************************************************************************/
279
280
281#ifndef __SCCB_H__
282#define __SCCB_H__
283
284#if (defined(MT6219)||defined(MT6228)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230))
285#define __SCCB_MODULE_V1__
286#endif // #if (defined(MT6219)||defined(MT6228)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230))
287
288#if ( defined(MT6219)||defined(MT6228)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230)\
289 ||defined(MT6225)||defined(MT6223)||defined(MT6223P)||defined(MT6235)||defined(MT6235B)||defined(MT6238)||defined(MT6239)||defined(MT6268A)\
290 ||defined(MT6239)||defined(MT6253T)||defined(MT6253)||defined(MT6236)||defined(MT6236B) )
291#define __SUPPORT_SCCB_XXX_API__
292#endif // SCCB_XXX API supported platforms list
293
294#if defined(__SCCB_MODULE_V1__)
295/* defination of MT6219 SCCB interface */
296
297//MSBB remove #include "kal_non_specific_general_types.h"
298
299//#define DVT_TEST
300#if (!defined(MT6219))
301#define SCCB_I2C_base (0x800A0000) /* SCCB Interface */
302#endif // #if (!defined(MT6219))
303
304/* HW SCCB Define */
305#define SCCB_READ_COMPLETE 0x01
306#define SCCB_WRITE_COMPLETE 0x02
307
308#define SCCB_CTRL_REG (SCCB_I2C_base+0x00)
309#define SCCB_DATA_LENGTH_REG (SCCB_I2C_base+0x08)
310#define SCCB_BUFFER_TIME_REG (SCCB_I2C_base+0x0C)
311#define SCCB_START_HOLD_TIME_REG (SCCB_I2C_base+0x10)
312#define SCCB_DATA_HOLD_TIME_REG (SCCB_I2C_base+0x14)
313#define SCCB_CLOCK_LOW_PERIOD_REG (SCCB_I2C_base+0x18)
314#define SCCB_CLOCK_HIGH_PERIOD_REG (SCCB_I2C_base+0x1C)
315#define SCCB_DATA_REG (SCCB_I2C_base+0x20)
316#define SCCB_START_SETUP_TIME_REG (SCCB_I2C_base+0x24)
317#define SCCB_STOP_SETUP_TIME_REG (SCCB_I2C_base+0x28)
318#define SCCB_MODE_REG (SCCB_I2C_base+0x38)
319#define SCCB_BUFFER_CLEAR_REG (SCCB_I2C_base+0x3C)
320#define SCCB_STATUS_REG (SCCB_I2C_base+0x40)
321#define SCCB_READ_DATA_REG (SCCB_I2C_base+0x44)
322#define REG_SCCB_CTRL *((volatile unsigned short *) (SCCB_I2C_base+0x00))
323#define REG_SCCB_DATA_LENGTH *((volatile unsigned short *) (SCCB_I2C_base+0x08))
324#define REG_SCCB_BUFFER_TIME *((volatile unsigned short *) (SCCB_I2C_base+0x0C))
325#define REG_SCCB_START_HOLD_TIME *((volatile unsigned short *) (SCCB_I2C_base+0x10))
326#define REG_SCCB_DATA_HOLD_TIME *((volatile unsigned short *) (SCCB_I2C_base+0x14))
327#define REG_SCCB_CLOCK_LOW_PERIOD *((volatile unsigned short *) (SCCB_I2C_base+0x18))
328#define REG_SCCB_CLOCK_HIGH_PERIOD *((volatile unsigned short *) (SCCB_I2C_base+0x1C))
329#define REG_SCCB_DATA *((volatile unsigned short *) (SCCB_I2C_base+0x20))
330#define REG_SCCB_START_SETUP_TIME *((volatile unsigned short *) (SCCB_I2C_base+0x24))
331#define REG_SCCB_STOP_SETUP_TIME *((volatile unsigned short *) (SCCB_I2C_base+0x28))
332#define REG_SCCB_MODE *((volatile unsigned short *) (SCCB_I2C_base+0x38))
333#define REG_SCCB_BUFFER_CLEAR *((volatile unsigned short *) (SCCB_I2C_base+0x3C))
334#define REG_SCCB_STATUS *((volatile unsigned short *) (SCCB_I2C_base+0x40))
335#define REG_SCCB_READ_DATA *((volatile unsigned short *) (SCCB_I2C_base+0x44))
336#if (defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230)||defined(MT6223)||defined(MT6223P))
337#define REG_SCCB_READ_DATA_L *((volatile unsigned short *) (SCCB_base+0x48)) //MT6227 New
338#endif // #if (defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D)||defined(MT6229)||defined(MT6230)||defined(MT6223)||defined(MT6223P))
339#define SCCB_DATA_REG_ID_ADDRESS 0x100
340
341#define ENABLE_SCCB REG_SCCB_CTRL = 0x01;
342#define DISABLE_SCCB REG_SCCB_CTRL = 0x00;
343#define SET_SCCB_DATA_LENGTH(n) REG_SCCB_DATA_LENGTH = (n-1);
344#define SET_SCCB_BUFFER_TIMER(n) REG_SCCB_BUFFER_TIME = (n-1);
345#define SET_SCCB_START_HOLD_TIME(n) REG_SCCB_START_HOLD_TIME =(n-1);
346#define SET_SCCB_DATA_HOLD_TIME(n) REG_SCCB_DATA_HOLD_TIME = (n-1);
347#define SET_SCCB_CLK_LOW_PERIOD(n) REG_SCCB_CLOCK_LOW_PERIOD = (n-1);
348#define SET_SCCB_CLK_HIGH_PERIOD(n) REG_SCCB_CLOCK_HIGH_PERIOD = (n-1);
349#define SET_SCCB_START_SETUP_TIME(n) REG_SCCB_START_SETUP_TIME =(n-1);
350#define SET_SCCB_STOP_SETUP_TIME(n) REG_SCCB_STOP_SETUP_TIME = (n-1);
351#define CLEAR_SCCB_BUFFER REG_SCCB_BUFFER_CLEAR =1;
352#define SET_SCCB_MASTER_MODE REG_SCCB_MODE=1;
353#define SCCB_IS_READING (!(REG_SCCB_STATUS & 0x01))
354#define SCCB_IS_WRITTING (!(REG_SCCB_STATUS & 0x02))
355
356#endif // #if defined(__SCCB_MODULE_V1__)
357
358#ifdef __CUST_NEW__
359/* SW SCCB Define */
360#define SCCB_SERIAL_SW_CLK_PIN (SCCB_SERIAL_CLK_PIN&~GPIO_MAGIC_NUM)
361#define SCCB_SERIAL_SW_DATA_PIN (SCCB_SERIAL_DATA_PIN&~GPIO_MAGIC_NUM)
362#define SET_SCCB_CLK_OUTPUT GPIO_InitIO_FAST(OUTPUT,SCCB_SERIAL_SW_CLK_PIN);
363#define SET_SCCB_DATA_OUTPUT GPIO_InitIO_FAST(OUTPUT,SCCB_SERIAL_SW_DATA_PIN);
364#define SET_SCCB_DATA_INPUT GPIO_InitIO_FAST(INPUT,SCCB_SERIAL_SW_DATA_PIN);
365#define SET_SCCB_CLK_HIGH GPIO_WriteIO_FAST(1,SCCB_SERIAL_SW_CLK_PIN);
366#define SET_SCCB_CLK_LOW GPIO_WriteIO_FAST(0,SCCB_SERIAL_SW_CLK_PIN);
367#define SET_SCCB_DATA_HIGH GPIO_WriteIO_FAST(1,SCCB_SERIAL_SW_DATA_PIN);
368#define SET_SCCB_DATA_LOW GPIO_WriteIO_FAST(0,SCCB_SERIAL_SW_DATA_PIN);
369#define GET_SCCB_DATA_BIT GPIO_ReadIO_FAST(SCCB_SERIAL_SW_DATA_PIN)
370#else // #ifdef __CUST_NEW__
371/* SW SCCB Define */
372#define SET_SCCB_CLK_OUTPUT GPIO_InitIO(OUTPUT,SCCB_SERIAL_CLK_PIN);
373#define SET_SCCB_DATA_OUTPUT GPIO_InitIO(OUTPUT,SCCB_SERIAL_DATA_PIN);
374#define SET_SCCB_DATA_INPUT GPIO_InitIO(INPUT,SCCB_SERIAL_DATA_PIN);
375#define SET_SCCB_CLK_HIGH GPIO_WriteIO(1,SCCB_SERIAL_CLK_PIN);
376#define SET_SCCB_CLK_LOW GPIO_WriteIO(0,SCCB_SERIAL_CLK_PIN);
377#define SET_SCCB_DATA_HIGH GPIO_WriteIO(1,SCCB_SERIAL_DATA_PIN);
378#define SET_SCCB_DATA_LOW GPIO_WriteIO(0,SCCB_SERIAL_DATA_PIN);
379#define GET_SCCB_DATA_BIT GPIO_ReadIO(SCCB_SERIAL_DATA_PIN)
380#endif // #ifdef __CUST_NEW__
381
382#define ACK_BIT \
383{\
384 kal_uint32 i;\
385 SET_SCCB_CLK_LOW; \
386 for (i=0; i<SCCB_DELAY; i++); \
387 SET_SCCB_DATA_OUTPUT; \
388 SET_SCCB_DATA_LOW; \
389 for (i=0; i<SCCB_DELAY; i++); \
390 SET_SCCB_CLK_HIGH; \
391 for (i=0; i<SCCB_DELAY; i++); \
392 SET_SCCB_CLK_LOW; \
393 for (i=0;i<SCCB_DELAY;i++);\
394}
395
396#define NACK_BIT \
397{\
398 kal_uint32 z;\
399 for (z=0; z<SCCB_DELAY; z++); \
400 SET_SCCB_DATA_OUTPUT; \
401 for (z=0; z<SCCB_DELAY; z++); \
402 SET_SCCB_DATA_HIGH; \
403 for (z=0; z<SCCB_DELAY; z++); \
404 SET_SCCB_CLK_HIGH; \
405 for (z=0; z<SCCB_DELAY; z++); \
406 SET_SCCB_CLK_LOW; \
407 for (z=0;z<SCCB_DELAY;z++);\
408}
409
410#define SCCB_START_TRANSMISSION \
411{\
412 kal_uint32 z;\
413 SET_SCCB_DATA_OUTPUT;\
414 SET_SCCB_DATA_LOW;\
415 for (z=0;z<SCCB_DELAY;z++);\
416 SET_SCCB_CLK_LOW;\
417 for (z=0;z<SCCB_DELAY;z++);\
418}
419
420#define SCCB_STOP_TRANSMISSION \
421{\
422 kal_uint32 z;\
423 SET_SCCB_DATA_OUTPUT;\
424 SET_SCCB_DATA_LOW;\
425 for (z=0;z<SCCB_DELAY;z++);\
426 SET_SCCB_CLK_HIGH;\
427 for (z=0;z<SCCB_DELAY;z++);\
428 SET_SCCB_DATA_HIGH;\
429 for (z=0;z<SCCB_DELAY;z++);\
430}
431
432
433/* Interface */
434typedef enum
435{
436 SCCB_SW_8BIT=1,
437 SCCB_SW_16BIT,
438 SCCB_HW_8BIT,
439 SCCB_HW_16BIT
440} SCCB_MODE_ENUM;
441
442typedef struct{
443 kal_uint8 TBUF;
444 kal_uint8 THDSTA;
445 kal_uint8 THDDTA;
446 kal_uint8 TLOW;
447 kal_uint8 THIGH;
448 //kal_uint8 TSUSTA;
449 kal_uint8 TSUSTO;
450} SCCB_FREQ_STRUCT;
451
452
453
454// SCCB PINS definition
455
456
457#ifdef __CUST_NEW__
458#include "gpio_sw.h"
459extern const char gpio_sccb_serial_clk_pin;
460extern const char gpio_sccb_serial_data_pin;
461#endif // #ifdef __CUST_NEW__
462
463#if (defined(MT6276))
464 #ifdef __CUST_NEW__
465 #define SCCB_SERIAL_CLK_PIN (76|GPIO_MAGIC_NUM)
466 #define SCCB_SERIAL_DATA_PIN (77|GPIO_MAGIC_NUM)
467 #else /* __CUST_NEW__ */
468 #define SCCB_SERIAL_CLK_PIN 76
469 #define SCCB_SERIAL_DATA_PIN 77
470 #endif /* __CUST_NEW__ */
471 #define SCCB_GPIO_SCL_MODE 1
472 #define SCCB_GPIO_SDA_MODE 1
473#elif (defined(MT6255)||defined(MT6256))
474 #ifdef __CUST_NEW__
475 #define SCCB_SERIAL_CLK_PIN (54|GPIO_MAGIC_NUM)
476 #define SCCB_SERIAL_DATA_PIN (55|GPIO_MAGIC_NUM)
477 #else /* __CUST_NEW__ */
478 #define SCCB_SERIAL_CLK_PIN 54
479 #define SCCB_SERIAL_DATA_PIN 55
480 #endif /* __CUST_NEW__ */
481 #define SCCB_GPIO_SCL_MODE 1
482 #define SCCB_GPIO_SDA_MODE 1
483#endif
484
485#if (defined(MT6219)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D))
486 #ifdef __CUST_NEW__
487 #define SCCB_SERIAL_CLK_PIN (8|GPIO_MAGIC_NUM)
488 #define SCCB_SERIAL_DATA_PIN (9|GPIO_MAGIC_NUM)
489 #else // #ifdef __CUST_NEW__
490 #define SCCB_SERIAL_CLK_PIN 8
491 #define SCCB_SERIAL_DATA_PIN 9
492 #endif // #ifdef __CUST_NEW__
493#endif // #if (defined(MT6219)||defined(MT6226)||defined(MT6226M)||defined(MT6226D)||defined(MT6227)||defined(MT6227D))
494
495#if (defined(MT6228)||defined(MT6229)||defined(MT6230))
496 #ifdef __CUST_NEW__
497 #if (defined(DVT_TEST))
498 #define SCCB_SERIAL_CLK_PIN (8|GPIO_MAGIC_NUM)
499 #define SCCB_SERIAL_DATA_PIN (9|GPIO_MAGIC_NUM)
500 #else // #if (defined(DVT_TEST))
501 #define SCCB_SERIAL_CLK_PIN (2|GPIO_MAGIC_NUM)
502 #define SCCB_SERIAL_DATA_PIN (3|GPIO_MAGIC_NUM)
503 #endif // #if (defined(DVT_TEST))
504 #else // #ifdef __CUST_NEW__
505 #if (defined(DVT_TEST))
506 #define SCCB_SERIAL_CLK_PIN 8
507 #define SCCB_SERIAL_DATA_PIN 9
508 #else // #if (defined(DVT_TEST))
509 #define SCCB_SERIAL_CLK_PIN 2
510 #define SCCB_SERIAL_DATA_PIN 3
511 #endif // #if (defined(DVT_TEST))
512 #endif // #ifdef __CUST_NEW__
513#endif // #if (defined(MT6228)||defined(MT6229)||defined(MT6230))
514
515
516#if (defined(DRV_GPIO_REG_AS_6223))
517 #ifdef __CUST_NEW__
518 #define SCCB_SERIAL_CLK_PIN gpio_sccb_serial_clk_pin
519 #define SCCB_SERIAL_DATA_PIN gpio_sccb_serial_data_pin
520 #else // #ifdef __CUST_NEW__
521 #define SCCB_SERIAL_CLK_PIN 15
522 #define SCCB_SERIAL_DATA_PIN 19
523 #endif // #ifdef __CUST_NEW__
524 #define SCCB_GPIO_SCL_MODE 3
525 #define SCCB_GPIO_SDA_MODE 3
526#endif // #if (defined(DRV_GPIO_REG_AS_6223))
527
528
529#if (defined(DRV_GPIO_REG_AS_6225))
530 #ifdef __CUST_NEW__
531 #define SCCB_SERIAL_CLK_PIN (8|GPIO_MAGIC_NUM)
532 #define SCCB_SERIAL_DATA_PIN (9|GPIO_MAGIC_NUM)
533 #else /* __CUST_NEW__ */
534 #define SCCB_SERIAL_CLK_PIN 8
535 #define SCCB_SERIAL_DATA_PIN 9
536 #endif /* __CUST_NEW__ */
537 #define SCCB_GPIO_SCL_MODE 1
538 #define SCCB_GPIO_SDA_MODE 1
539#endif // #if (defined(DRV_GPIO_REG_AS_6225))
540
541#if (defined(DRV_GPIO_REG_AS_6238))
542 #ifdef __CUST_NEW__
543 #define SCCB_SERIAL_CLK_PIN (5|GPIO_MAGIC_NUM)
544 #define SCCB_SERIAL_DATA_PIN (6|GPIO_MAGIC_NUM)
545 #else /* __CUST_NEW__ */
546 #define SCCB_SERIAL_CLK_PIN 5
547 #define SCCB_SERIAL_DATA_PIN 6
548 #endif /* __CUST_NEW__ */
549#endif // #if (defined(DRV_GPIO_6238_SERIES))
550
551
552#if (defined(DRV_GPIO_REG_AS_6235))
553 #ifdef __CUST_NEW__
554 #if defined(EMPTY_MMI)
555 #define SCCB_SERIAL_CLK_PIN (15|GPIO_MAGIC_NUM)
556 #define SCCB_SERIAL_DATA_PIN (16|GPIO_MAGIC_NUM)
557 #else // #if defined(EMPTY_MMI)
558 #define SCCB_SERIAL_CLK_PIN gpio_sccb_serial_clk_pin
559 #define SCCB_SERIAL_DATA_PIN gpio_sccb_serial_data_pin
560 #endif // #if defined(EMPTY_MMI)
561 #else /* __CUST_NEW__ */
562 #define SCCB_SERIAL_CLK_PIN 15
563 #define SCCB_SERIAL_DATA_PIN 16
564 #endif /* __CUST_NEW__ */
565#endif // #if (defined(DRV_GPIO_6235_SERIES))
566
567#if (defined(DRV_GPIO_REG_AS_6268A))
568 #ifdef __CUST_NEW__
569 #define SCCB_SERIAL_CLK_PIN (36|GPIO_MAGIC_NUM)
570 #define SCCB_SERIAL_DATA_PIN (37|GPIO_MAGIC_NUM)
571 #else /* __CUST_NEW__ */
572 #define SCCB_SERIAL_CLK_PIN 36
573 #define SCCB_SERIAL_DATA_PIN 37
574 #endif /* __CUST_NEW__ */
575#endif // #if (defined(DRV_GPIO_REG_AS_6268A))
576
577#if(defined(DRV_GPIO_REG_AS_6268))
578 #ifdef __CUST_NEW__
579 #define SCCB_SERIAL_CLK_PIN (33|GPIO_MAGIC_NUM)
580 #define SCCB_SERIAL_DATA_PIN (34|GPIO_MAGIC_NUM)
581 #else // #ifdef __CUST_NEW__
582 #define SCCB_SERIAL_CLK_PIN 33
583 #define SCCB_SERIAL_DATA_PIN 34
584 #endif // #ifdef __CUST_NEW__
585 #define SCCB_GPIO_SCL_MODE 1
586 #define SCCB_GPIO_SDA_MODE 1
587#endif // #if(defined(DRV_GPIO_REG_AS_6268))
588
589#if (defined(DRV_GPIO_REG_AS_6253T))
590 #ifdef __CUST_NEW__
591 #define SCCB_SERIAL_CLK_PIN (24|GPIO_MAGIC_NUM)
592 #define SCCB_SERIAL_DATA_PIN (25|GPIO_MAGIC_NUM)
593 #else /* __CUST_NEW__ */
594 #define SCCB_SERIAL_CLK_PIN 24
595 #define SCCB_SERIAL_DATA_PIN 25
596 #endif /* __CUST_NEW__ */
597 #define SCCB_GPIO_SCL_MODE 2
598 #define SCCB_GPIO_SDA_MODE 2
599#endif // #if (defined(DRV_GPIO_REG_AS_6253T))
600
601
602#if (defined(DRV_GPIO_REG_AS_6253E)&&defined(MT6253E)&&defined(__SERIAL_SENSOR_V1_SUPPORT__))
603 #ifdef __CUST_NEW__
604 #define SCCB_SERIAL_CLK_PIN (24|GPIO_MAGIC_NUM)
605 #define SCCB_SERIAL_DATA_PIN (25|GPIO_MAGIC_NUM)
606 #else /* __CUST_NEW__ */
607 #define SCCB_SERIAL_CLK_PIN 24
608 #define SCCB_SERIAL_DATA_PIN 25
609 #endif /* __CUST_NEW__ */
610 #define SCCB_GPIO_SCL_MODE 2
611 #define SCCB_GPIO_SDA_MODE 2
612#elif (defined(DRV_GPIO_REG_AS_6253E)&&defined(MT6253E))
613 #ifdef __CUST_NEW__
614 #define SCCB_SERIAL_CLK_PIN (22|GPIO_MAGIC_NUM)
615 #define SCCB_SERIAL_DATA_PIN (23|GPIO_MAGIC_NUM)
616 #else /* __CUST_NEW__ */
617 #define SCCB_SERIAL_CLK_PIN 22
618 #define SCCB_SERIAL_DATA_PIN 23
619 #endif /* __CUST_NEW__ */
620 #define SCCB_GPIO_SCL_MODE 3
621 #define SCCB_GPIO_SDA_MODE 3
622#endif
623
624#if (defined(DRV_GPIO_REG_AS_6253E)&&defined(MT6253L))
625 #ifdef __CUST_NEW__
626 #define SCCB_SERIAL_CLK_PIN (24|GPIO_MAGIC_NUM)
627 #define SCCB_SERIAL_DATA_PIN (25|GPIO_MAGIC_NUM)
628 #else /* __CUST_NEW__ */
629 #define SCCB_SERIAL_CLK_PIN 24
630 #define SCCB_SERIAL_DATA_PIN 25
631 #endif /* __CUST_NEW__ */
632 #define SCCB_GPIO_SCL_MODE 2
633 #define SCCB_GPIO_SDA_MODE 2
634#endif
635
636#if (defined(DRV_GPIO_REG_AS_6236))
637 #ifdef __CUST_NEW__
638 #define SCCB_SERIAL_CLK_PIN (29|GPIO_MAGIC_NUM)
639 #define SCCB_SERIAL_DATA_PIN (30|GPIO_MAGIC_NUM)
640 #else /* __CUST_NEW__ */
641 #define SCCB_SERIAL_CLK_PIN 29
642 #define SCCB_SERIAL_DATA_PIN 30
643#endif /*__CUST_NEW__*/
644 #define SCCB_GPIO_SCL_MODE 1
645 #define SCCB_GPIO_SDA_MODE 1
646#endif // #if (defined(DRV_GPIO_REG_AS_6236))
647
648
649///Bin: added to patch build error
650#ifndef SCCB_SERIAL_CLK_PIN
651 #define SCCB_SERIAL_CLK_PIN gpio_sccb_serial_clk_pin
652#endif
653
654#ifndef SCCB_SERIAL_DATA_PIN
655 #define SCCB_SERIAL_DATA_PIN gpio_sccb_serial_data_pin
656#endif
657
658/* Extern Global Variable */
659void init_sccb(void);
660// MoDIS parser skip start
661// The following APIs are implemented in other dummy API files
662kal_uint8 sccb_config(kal_uint8 mode, kal_uint8 wid, kal_uint8 rid, SCCB_FREQ_STRUCT *freq);
663// MoDIS parser skip end
664kal_uint8 sccb_getMode(void);
665void sccb_setDelay(kal_uint32 delay);
666
667#if defined(__SCCB_MODULE_V1__)
668void sccb_write(kal_uint32 cmd, kal_uint32 param);
669void sccb_multi_write(kal_uint32 cmd, kal_uint32 *param, kal_uint8 num);
670void sccb_cont_write(kal_uint32 cmd, kal_uint32 spec_cmd, kal_uint32 param);
671kal_uint32 sccb_read (kal_uint32 cmd);
672kal_uint32 sccb_phase3_read (kal_uint32 cmd);
673kal_uint32 sccb_cont_read (kal_uint32 cmd, kal_uint32 spec_cmd);
674kal_uint8 sccb_multi_read (kal_uint32 cmd, kal_uint32 *param, kal_uint8 num);
675#endif // #if defined(__SCCB_MODULE_V1__)
676
677#endif // #ifndef __SCCB_H__
678