rjw | 6c1fd8f | 2022-11-30 14:33:01 +0800 | [diff] [blame] | 1 | /***************************************************************************** |
| 2 | * Copyright Statement: |
| 3 | * -------------------- |
| 4 | * This software is protected by Copyright and the information contained |
| 5 | * herein is confidential. The software may not be copied and the information |
| 6 | * contained herein may not be used or disclosed except with the written |
| 7 | * permission of MediaTek Inc. (C) 2001 |
| 8 | * |
| 9 | *****************************************************************************/ |
| 10 | |
| 11 | /***************************************************************************** |
| 12 | * |
| 13 | * Filename: |
| 14 | * --------- |
| 15 | * dcl_i2c.h |
| 16 | * |
| 17 | * Project: |
| 18 | * -------- |
| 19 | * Maui |
| 20 | * |
| 21 | * Description: |
| 22 | * ------------ |
| 23 | * Header file of DCL (Driver Common Layer) for I2C. |
| 24 | * |
| 25 | * Author: |
| 26 | * ------- |
| 27 | * ------- |
| 28 | * |
| 29 | *============================================================================ |
| 30 | * HISTORY |
| 31 | * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| 32 | *------------------------------------------------------------------------------ |
| 33 | * removed! |
| 34 | * removed! |
| 35 | * removed! |
| 36 | * |
| 37 | * removed! |
| 38 | * removed! |
| 39 | * removed! |
| 40 | * |
| 41 | * removed! |
| 42 | * removed! |
| 43 | * removed! |
| 44 | * |
| 45 | * removed! |
| 46 | * removed! |
| 47 | * removed! |
| 48 | * |
| 49 | * removed! |
| 50 | * removed! |
| 51 | * removed! |
| 52 | * |
| 53 | * removed! |
| 54 | * removed! |
| 55 | * removed! |
| 56 | * |
| 57 | * removed! |
| 58 | * removed! |
| 59 | * removed! |
| 60 | * |
| 61 | * removed! |
| 62 | * removed! |
| 63 | * removed! |
| 64 | * |
| 65 | * removed! |
| 66 | * removed! |
| 67 | * removed! |
| 68 | * |
| 69 | * removed! |
| 70 | * removed! |
| 71 | * removed! |
| 72 | * |
| 73 | *------------------------------------------------------------------------------ |
| 74 | * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| 75 | *============================================================================ |
| 76 | ****************************************************************************/ |
| 77 | #ifdef DCL_DEFINITION_STRUCT |
| 78 | #ifndef __DCL_I2C_H_STRUCT__ |
| 79 | #define __DCL_I2C_H_STRUCT__ |
| 80 | |
| 81 | /******************************************************************************* |
| 82 | * DCL_OPTIONS for I2C, not in use now. |
| 83 | *******************************************************************************/ |
| 84 | #define I2C_OPTIONS |
| 85 | |
| 86 | #include "dcl_i2c_owner.h" |
| 87 | |
| 88 | /* I2C Transaction Mode*/ |
| 89 | typedef enum |
| 90 | { |
| 91 | DCL_I2C_TRANSACTION_FAST_MODE, /* Fast Mode: < 400kbps */ |
| 92 | DCL_I2C_TRANSACTION_HIGH_SPEED_MODE /* Hign Speed Mode: > 400kbps */ |
| 93 | }DCL_I2C_TRANSACTION_MODE; |
| 94 | |
| 95 | /* Transaction Type, for batch transaction use*/ |
| 96 | typedef enum |
| 97 | { |
| 98 | DCL_I2C_TRANSACTION_WRITE, /* Single write */ |
| 99 | DCL_I2C_TRANSACTION_READ, /* Single read */ |
| 100 | DCL_I2C_TRANSACTION_CONT_WRITE, /* Continue write */ |
| 101 | DCL_I2C_TRANSACTION_CONT_READ, /* Continue read */ |
| 102 | DCL_I2C_TRANSACTION_WRITE_AND_READ /* Write and read. Note: This command can not be used, when using DMA to transfer but driver can only support DCL_I2C_DMA_SINGLE_CHANNEL. */ |
| 103 | }DCL_I2C_TRANSACTION_TYPE; |
| 104 | |
| 105 | /* Transaction result, for batch transaction query */ |
| 106 | typedef enum |
| 107 | { |
| 108 | DCL_I2C_BATCH_TRANSACTION_SUCCESS, /* The prior batch transaction is successfully transmitted */ |
| 109 | DCL_I2C_BATCH_TRANSACTION_FAIL, /* Something wrong was happened during the prior batch transaction */ |
| 110 | DCL_I2C_BATCH_TRANSACTION_IS_BUSY /* I2C bus is occupied now */ |
| 111 | }DCL_I2C_BATCH_TRANSACTION_RESULT; |
| 112 | |
| 113 | /* DMA property that driver support, for user query */ |
| 114 | typedef enum |
| 115 | { |
| 116 | DCL_I2C_DMA_NOT_SUPPORT, /* Driver do not support DMA */ |
| 117 | DCL_I2C_DMA_DUAL_CHANNEL, /* Driver support dual channel DMA mode */ |
| 118 | DCL_I2C_DMA_SINGLE_CHANNEL /* Driver support single channel DMA mode, not support WRITE_AND_READ when DMA is enabled */ |
| 119 | }DCL_I2C_DMA_PROPERTY; |
| 120 | |
| 121 | /* DCL I2C configure structure */ |
| 122 | typedef struct |
| 123 | { |
| 124 | DCL_I2C_OWNER eOwner; /* The owner of I2C, defined in DCL_I2C_OWNER */ |
| 125 | DCL_BOOL fgGetHandleWait; /* KAL_TRUE: wait until I2C is idle; KAL_FALSE: do not wait */ |
| 126 | DCL_UINT8 u1SlaveAddress; /* Slave address */ |
| 127 | DCL_UINT8 u1DelayLen; /* Wait delay between consecutive transfers (the unit is half pulse width) */ |
| 128 | DCL_I2C_TRANSACTION_MODE eTransactionMode; /* Fast mode or high speed mode */ |
| 129 | DCL_UINT32 u4FastModeSpeed; /* The transfer speed under fast mode. But even under high speed mode, you should alse configure this parameter */ |
| 130 | DCL_UINT32 u4HSModeSpeed; /* The transfer speed under high speed mode */ |
| 131 | DCL_BOOL fgEnableDMA; /* KAL_TRUE: use DMA to transfer data; KAL_FALSE: do not use DMA. Note: Make sure driver support DMA mode before you use it. */ |
| 132 | } I2C_CONFIG_T; |
| 133 | |
| 134 | /* DCL_CONFIGURE_T for I2C. */ |
| 135 | #define I2C_CONFIGS \ |
| 136 | I2C_CONFIG_T rI2CCofig; |
| 137 | |
| 138 | /* DCL_EVENT for I2C, not in use now. */ |
| 139 | #define I2C_EVENTS |
| 140 | |
| 141 | #ifdef __BUILD_DOM__ |
| 142 | /* DCL_CTRL_CMD for I2C */ |
| 143 | typedef enum |
| 144 | { |
| 145 | I2C_CMD_GET_TRANSACTION_MODE, /* Get transaction mode */ |
| 146 | I2C_CMD_SET_TRANSACTION_SPEED, /* Set transaction speed */ |
| 147 | I2C_CMD_SINGLE_WRITE, /* Single write of blocking mode */ |
| 148 | I2C_CMD_SINGLE_READ, /* Single read of blocking mode */ |
| 149 | I2C_CMD_CONT_WRITE, /* Continue write of blocking mode */ |
| 150 | I2C_CMD_CONT_READ, /* Continue read of blocking mode */ |
| 151 | I2C_CMD_WRITE_AND_READ, /* Write and read of blocking mode */ |
| 152 | I2C_CMD_BATCH_TRANSACTION, /* Batch transaction which support non-blocking mode */ |
| 153 | I2C_CMD_GET_BATCH_TRANSACTION_RESULT, /* Query the prior batch transaction result */ |
| 154 | I2C_CMD_GET_DMA_PROPERTY, /* Get the DMA property which driver support */ |
| 155 | I2C_CMD_ENABLE_DMA, /* Use DMA to transfer data. Note: Before you do this, please make sure that driver support DMA mode */ |
| 156 | I2C_CMD_SET_SLAVE_ADDRESS /* Set the slave address of sensor */ |
| 157 | }DCL_CTRL_CMD_T; |
| 158 | #else |
| 159 | #define I2C_CMDS \ |
| 160 | I2C_CMD_GET_TRANSACTION_MODE, \ |
| 161 | I2C_CMD_SET_TRANSACTION_SPEED, \ |
| 162 | I2C_CMD_SINGLE_WRITE, \ |
| 163 | I2C_CMD_SINGLE_READ, \ |
| 164 | I2C_CMD_CONT_WRITE, \ |
| 165 | I2C_CMD_CONT_READ, \ |
| 166 | I2C_CMD_WRITE_AND_READ, \ |
| 167 | I2C_CMD_BATCH_TRANSACTION, \ |
| 168 | I2C_CMD_GET_BATCH_TRANSACTION_RESULT, \ |
| 169 | I2C_CMD_GET_DMA_PROPERTY, \ |
| 170 | I2C_CMD_ENABLE_DMA, \ |
| 171 | I2C_CMD_SET_SLAVE_ADDRESS, |
| 172 | #endif /* __BUILD_DOM__ */ |
| 173 | |
| 174 | /* For I2C_CMD_GET_TRANSACTION_MODE command. */ |
| 175 | typedef struct |
| 176 | { |
| 177 | DCL_I2C_TRANSACTION_MODE eTransactionMode; /* Transaction mode */ |
| 178 | }I2C_CTRL_GET_TRANSACTION_MODE_T; |
| 179 | /* For I2C_CMD_SET_TRANSACTION_SPEED command. */ |
| 180 | typedef struct |
| 181 | { |
| 182 | DCL_I2C_TRANSACTION_MODE eTransactionMode; /* Transaction mode */ |
| 183 | DCL_UINT32 u4FastModeSpeed; /* Fast mode speed */ |
| 184 | DCL_UINT32 u4HSModeSpeed; /* High speed mode speed */ |
| 185 | }I2C_CTRL_SET_TRANSACTION_SPEED_T; |
| 186 | /* For I2C_CMD_SINGLE_WRITE, I2C_CMD_SINGLE_READ command. */ |
| 187 | typedef struct |
| 188 | { |
| 189 | DCL_UINT8 *pu1Data; /* Pointer to the buffer of data */ |
| 190 | DCL_UINT32 u4DataLen; /* Data length */ |
| 191 | }I2C_CTRL_SINGLE_WRITE_T, I2C_CTRL_SINGLE_READ_T; |
| 192 | /* For I2C_CMD_CONT_WRITE, I2C_CMD_CONT_READ command. */ |
| 193 | typedef struct |
| 194 | { |
| 195 | DCL_UINT8 *pu1Data; /* Pointer to the buffer of data */ |
| 196 | DCL_UINT32 u4DataLen; /* Data length of each transfer */ |
| 197 | DCL_UINT32 u4TransferNum; /* Transfer number */ |
| 198 | }I2C_CTRL_CONT_WRITE_T, I2C_CTRL_CONT_READ_T; |
| 199 | /* For I2C_CMD_WRITE_AND_READ command. */ |
| 200 | typedef struct |
| 201 | { |
| 202 | DCL_UINT8 *pu1InData; /* Pointer to the read data */ |
| 203 | DCL_UINT32 u4InDataLen; /* Read data length */ |
| 204 | DCL_UINT8 *pu1OutData; /* Pointer to the write data */ |
| 205 | DCL_UINT32 u4OutDataLen; /* Write data length */ |
| 206 | }I2C_CTRL_WRITE_AND_READE_T; |
| 207 | /* For I2C_CTRL_BATCH_DATA_T structure. */ |
| 208 | typedef union |
| 209 | { |
| 210 | I2C_CTRL_SINGLE_WRITE_T rSingleWrite; /* Single write */ |
| 211 | I2C_CTRL_SINGLE_READ_T rSingleRead; /* Single read */ |
| 212 | I2C_CTRL_CONT_WRITE_T rContWrite; /* Continue write */ |
| 213 | I2C_CTRL_CONT_READ_T rContRead; /* Continue read */ |
| 214 | I2C_CTRL_WRITE_AND_READE_T rWriteAndRead; /* Write and read. Note: this command can not be used, when using DMA to transfer but driver can only support DCL_I2C_DMA_SINGLE_CHANNEL. */ |
| 215 | }I2C_CTRL_TRANSACTION_DATA_T; |
| 216 | /* For I2C_CTRL_BATCH_TRANSACTION_T structure. */ |
| 217 | typedef struct |
| 218 | { |
| 219 | DCL_I2C_TRANSACTION_TYPE eTransactionType; /* Transaction type */ |
| 220 | I2C_CTRL_TRANSACTION_DATA_T rTansactionData; /* Batch transaction data of corresponding transaction type */ |
| 221 | }I2C_CTRL_BATCH_DATA_T; |
| 222 | /* For I2C_CMD_BATCH_TRANSACTION command. */ |
| 223 | typedef struct |
| 224 | { |
| 225 | DCL_UINT32 u4BatchNum; /* Number of batches of this batch transaction */ |
| 226 | I2C_CTRL_BATCH_DATA_T *prBatchData; /* Pointer to the buffer where stored the batches data*/ |
| 227 | }I2C_CTRL_BATCH_TRANSACTION_T; |
| 228 | /* For I2C_CMD_GET_BATCH_TRANSACTION_RESULT command. */ |
| 229 | typedef struct |
| 230 | { |
| 231 | DCL_I2C_BATCH_TRANSACTION_RESULT eBatchTransactionResult; /* Batch transaction result */ |
| 232 | DCL_UINT32 u4BatchNum; /* The number of Batches have been transferred successfully */ |
| 233 | }I2C_CTRL_GET_BATCH_TRANSACTION_RESULT_T; |
| 234 | /* For I2C_CMD_GET_DMA_PROPERTY command. */ |
| 235 | typedef struct |
| 236 | { |
| 237 | DCL_I2C_DMA_PROPERTY eDMAProperty; /* DMA property */ |
| 238 | }I2C_CTRL_GET_DMA_PROPERTY_T; |
| 239 | /* For I2C_CMD_ENABLE_DMA command. */ |
| 240 | typedef struct |
| 241 | { |
| 242 | DCL_BOOL fgEnableDMA; /* KAL_TRUE: use DMA to transfer data; KAL_FALSE: do not use DMA. Note: Make sure driver support DMA mode before you use it. */ |
| 243 | }I2C_CTRL_ENABLE_DMA_T; |
| 244 | /* For I2C_CMD_SET_SLAVE_ADDRESS command. */ |
| 245 | typedef struct |
| 246 | { |
| 247 | DCL_UINT8 u1SlaveAddress; /* Slave address */ |
| 248 | }I2C_CTRL_SET_SLAVE_ADDRESS_T; |
| 249 | |
| 250 | #ifdef __BUILD_DOM__ |
| 251 | /* DCL_CTRL_DATA_T for I2C: Define the Control data structure for each command */ |
| 252 | typedef union |
| 253 | { |
| 254 | I2C_CTRL_GET_TRANSACTION_MODE_T rGetTransactionMode; /* Get transaction mode */ |
| 255 | I2C_CTRL_SET_TRANSACTION_SPEED_T rSetTransactionSpeed; /* Set transaction speed */ |
| 256 | I2C_CTRL_SINGLE_WRITE_T rSingleWrite; /* Single write of blocking mode */ |
| 257 | I2C_CTRL_SINGLE_READ_T rSingleRead; /* Single read of blocking mode */ |
| 258 | I2C_CTRL_CONT_WRITE_T rContWrite; /* Continue write of blocking mode */ |
| 259 | I2C_CTRL_CONT_READ_T rContRead; /* Continue read of blocking mode */ |
| 260 | I2C_CTRL_WRITE_AND_READE_T rWriteAndRead; /* Write and read of blocking mode */ |
| 261 | I2C_CTRL_BATCH_TRANSACTION_T rBatchTransaction; /* Batch transaction which support non-blocking mode */ |
| 262 | I2C_CTRL_GET_BATCH_TRANSACTION_RESULT_T rGetBatchTransactionResult; /* Query the prior batch transaction result */ |
| 263 | I2C_CTRL_GET_DMA_PROPERTY_T rGetDMAProperty; /* Get the DMA property which driver support */ |
| 264 | I2C_CTRL_ENABLE_DMA_T rEnableDMA; /* Use DMA to transfer data. Note: Before you do this, please make sure that driver support DMA mode */ |
| 265 | I2C_CTRL_SET_SLAVE_ADDRESS_T rSetSlaveAddress; /* Set slave address of sensor */ |
| 266 | }DCL_CTRL_DATA_T; |
| 267 | #else |
| 268 | #define I2C_CTRLS \ |
| 269 | I2C_CTRL_GET_TRANSACTION_MODE_T rGetTransactionMode; \ |
| 270 | I2C_CTRL_SET_TRANSACTION_SPEED_T rSetTransactionSpeed; \ |
| 271 | I2C_CTRL_SINGLE_WRITE_T rSingleWrite; \ |
| 272 | I2C_CTRL_SINGLE_READ_T rSingleRead; \ |
| 273 | I2C_CTRL_CONT_WRITE_T rContWrite; \ |
| 274 | I2C_CTRL_CONT_READ_T rContRead; \ |
| 275 | I2C_CTRL_WRITE_AND_READE_T rWriteAndRead; \ |
| 276 | I2C_CTRL_BATCH_TRANSACTION_T rBatchTransaction; \ |
| 277 | I2C_CTRL_GET_BATCH_TRANSACTION_RESULT_T rGetBatchTransactionResult; \ |
| 278 | I2C_CTRL_GET_DMA_PROPERTY_T rGetDMAProperty; \ |
| 279 | I2C_CTRL_ENABLE_DMA_T rEnableDMA; \ |
| 280 | I2C_CTRL_SET_SLAVE_ADDRESS_T rSetSlaveAddress; |
| 281 | #endif /* __BUILD_DOM__ */ |
| 282 | |
| 283 | #endif // #ifndef __DCL_I2C_H_STRUCT__ |
| 284 | #endif // #ifdef DCL_DEFINITION_STRUCT |
| 285 | |
| 286 | #ifdef DCL_DEFINITION_PROTOTYPE |
| 287 | #ifndef __DCL_I2C_H_PROTOTYPE__ |
| 288 | #define __DCL_I2C_H_PROTOTYPE__ |
| 289 | |
| 290 | /************************************************************************* |
| 291 | * FUNCTION |
| 292 | * DclSI2C_Initialize |
| 293 | * |
| 294 | * DESCRIPTION |
| 295 | * This function is to initialize S/W I2C module, should be called only once when driver init. |
| 296 | * |
| 297 | * PARAMETERS |
| 298 | * None |
| 299 | * |
| 300 | * RETURNS |
| 301 | * STATUS_OK |
| 302 | * |
| 303 | *************************************************************************/ |
| 304 | extern DCL_STATUS DclSI2C_Initialize(void); |
| 305 | /************************************************************************* |
| 306 | * FUNCTION |
| 307 | * DclSI2C_Open |
| 308 | * |
| 309 | * DESCRIPTION |
| 310 | * This function is to open the I2C module and return a handle |
| 311 | * |
| 312 | * PARAMETERS |
| 313 | * dev: I2C device ID. Only valid for DCL_I2C. |
| 314 | * flags: User of I2C. Should be one of the enum DCL_I2C_OWNER. |
| 315 | * |
| 316 | * RETURNS |
| 317 | * DCL_HANDLE_INVALID: Incorrect device ID. |
| 318 | * DCL_HANDLE_OCCUPIED: This user has opened a handle, which is in use. |
| 319 | * Other value: A valid handle |
| 320 | * |
| 321 | * EXAMPLE |
| 322 | * <code> |
| 323 | * DCL_HANDLE i2c_handle = NULL; |
| 324 | * if (NULL == i2c_handle) |
| 325 | * { |
| 326 | * i2c_handle = DclSI2C_Open(DCL_I2C, DCL_I2C_OWNER_CAMERA); |
| 327 | * } |
| 328 | * </code> |
| 329 | * |
| 330 | *************************************************************************/ |
| 331 | extern DCL_HANDLE DclSI2C_Open(DCL_DEV dev, DCL_FLAGS flags); |
| 332 | /************************************************************************* |
| 333 | * FUNCTION |
| 334 | * DclSI2C_ReadData |
| 335 | * |
| 336 | * DESCRIPTION |
| 337 | * This function is not supported for the I2C module now. |
| 338 | * |
| 339 | * PARAMETERS |
| 340 | * N/A |
| 341 | * |
| 342 | * RETURNS |
| 343 | * STATUS_UNSUPPORTED |
| 344 | * |
| 345 | *************************************************************************/ |
| 346 | extern DCL_STATUS DclSI2C_ReadData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN buf_len, DCL_OPTIONS options); |
| 347 | /************************************************************************* |
| 348 | * FUNCTION |
| 349 | * DclSI2C_WriteData |
| 350 | * |
| 351 | * DESCRIPTION |
| 352 | * This function is not supported for the I2C module now. |
| 353 | * |
| 354 | * PARAMETERS |
| 355 | * N/A |
| 356 | * |
| 357 | * RETURNS |
| 358 | * STATUS_UNSUPPORTED |
| 359 | * |
| 360 | *************************************************************************/ |
| 361 | extern DCL_STATUS DclSI2C_WriteData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN buf_len, DCL_OPTIONS options); |
| 362 | /************************************************************************* |
| 363 | * FUNCTION |
| 364 | * DclSI2C_Configure |
| 365 | * |
| 366 | * DESCRIPTION |
| 367 | * This function is to configure the I2C module. |
| 368 | * |
| 369 | * PARAMETERS |
| 370 | * handle: the returned handle value of DclSI2C_Open |
| 371 | * configure: a structure which include the I2C configuration. |
| 372 | * |
| 373 | * RETURNS |
| 374 | * STATUS_OK: Successfully configure I2C module. |
| 375 | * STATUS_INVALID_DCL_HANDLE: It's a invalid handle. |
| 376 | * STATUS_NOT_OPENED: The module has not been opened. |
| 377 | * STATUS_INVALID_CONFIGURATION: The configuration is invalid. |
| 378 | * STATUS_DEVICE_NOT_SUPPORT_DMA: User wants to use DMA transfer, but driver do not support. |
| 379 | * |
| 380 | * EXAMPLE |
| 381 | * <code> |
| 382 | * I2C_CONFIG_T cfg; |
| 383 | * cfg.eOwner = DCL_I2C_OWNER_CAMERA; |
| 384 | * cfg.fgGetHandleWait = KAL_TRUE; |
| 385 | * cfg.u1SlaveAddress = SLAVE_ADDRESS_ID; |
| 386 | * cfg.u1DelayLen = 0; |
| 387 | * cfg.eTransactionMode = DCL_I2C_TRANSACTION_FAST_MODE; |
| 388 | * cfg.u4FastModeSpeed = 300; |
| 389 | * cfg.u4HSModeSpeed = 0; |
| 390 | * cfg.fgEnableDMA = KAL_FALSE; |
| 391 | * if (STATUS_OK != DclSI2C_Configure(i2c_handle, (DCL_CONFIGURE_T *)&cfg)) |
| 392 | * { |
| 393 | * ASSERT(0); |
| 394 | * } |
| 395 | * </code> |
| 396 | * |
| 397 | *************************************************************************/ |
| 398 | extern DCL_STATUS DclSI2C_Configure(DCL_HANDLE handle, DCL_CONFIGURE_T *configure); |
| 399 | /************************************************************************* |
| 400 | * FUNCTION |
| 401 | * DclSI2C_RegisterCallback |
| 402 | * |
| 403 | * DESCRIPTION |
| 404 | * This function is to set callback function for the I2C module, which is not supported for the I2C module now. |
| 405 | * |
| 406 | * PARAMETERS |
| 407 | * handle: the returned handle value of DclSI2C_Open |
| 408 | * event: Supported events: |
| 409 | * callback: the callback function for registered events |
| 410 | * |
| 411 | * RETURNS |
| 412 | * STATUS_UNSUPPORTED |
| 413 | * |
| 414 | *************************************************************************/ |
| 415 | extern DCL_STATUS DclSI2C_RegisterCallback(DCL_HANDLE handle, DCL_EVENT event, PFN_DCL_CALLBACK callback); |
| 416 | /************************************************************************* |
| 417 | * FUNCTION |
| 418 | * DclSI2C_Control |
| 419 | * |
| 420 | * DESCRIPTION |
| 421 | * This function is to send command to control the I2C module. |
| 422 | * |
| 423 | * PARAMETERS |
| 424 | * handle: The handle value returned from DclSI2C_Open |
| 425 | * cmd: A control command for I2C module |
| 426 | * 1. I2C_CMD_GET_TRANSACTION_MODE: to get transaction mode |
| 427 | * 2. I2C_CMD_SET_TRANSACTION_SPEED: to set transaction speed |
| 428 | * 3. I2C_CMD_SINGLE_WRITE: to perform a single WRITE |
| 429 | * 4. I2C_CMD_SINGLE_READ: to perform a single READ |
| 430 | * 5. I2C_CMD_CONT_WRITE: to perform a continuous WRITE |
| 431 | * 6. I2C_CMD_CONT_READ: to perform a continuous READ |
| 432 | * 7. I2C_CMD_WRITE_AND_READ: to perform a specific sequence "WRITE then READ" |
| 433 | * 8. I2C_CMD_BATCH_TRANSACTION: to perform a non-blocking batch transaction |
| 434 | * 9. I2C_CMD_GET_BATCH_TRANSACTION_RESULT: to get batch transaction result |
| 435 | * 10. I2C_CMD_GET_DMA_PROPERTY: to get DMA property |
| 436 | * 11. I2C_CMD_ENABLE_DMA: to enable/disable DMA |
| 437 | * data: The data of the control command |
| 438 | * 1. I2C_CMD_GET_TRANSACTION_MODE: pointer to a I2C_CTRL_GET_TRANSACTION_MODE_T structure |
| 439 | * 2. I2C_CMD_SET_TRANSACTION_SPEED: pointer to a I2C_CTRL_SET_TRANSACTION_SPEED_T structure |
| 440 | * 3. I2C_CMD_SINGLE_WRITE: pointer to a I2C_CTRL_SINGLE_WRITE_T structure |
| 441 | * 4. I2C_CMD_SINGLE_READ: pointer to a I2C_CTRL_SINGLE_READ_T structure |
| 442 | * 5. I2C_CMD_CONT_WRITE: pointer to a I2C_CTRL_CONT_WRITE_T structure |
| 443 | * 6. I2C_CMD_CONT_READ: pointer to a I2C_CTRL_CONT_READ_T structure |
| 444 | * 7. I2C_CMD_WRITE_AND_READ: pointer to a I2C_CTRL_WRITE_AND_READE_T structure |
| 445 | * 8. I2C_CMD_BATCH_TRANSACTION: pointer to a I2C_CTRL_BATCH_TRANSACTION_T structure |
| 446 | * 9. I2C_CMD_GET_BATCH_TRANSACTION_RESULT: pointer to a I2C_CTRL_GET_BATCH_TRANSACTION_RESULT_T structure |
| 447 | * 10. I2C_CMD_GET_DMA_PROPERTY: pointer to a I2C_CTRL_GET_DMA_PROPERTY_T structure |
| 448 | * 11. I2C_CMD_ENABLE_DMA: pointer to a I2C_CTRL_ENABLE_DMA_T structure |
| 449 | * |
| 450 | * RETURNS |
| 451 | * STATUS_OK: command is executed successfully. |
| 452 | * STATUS_FAIL: command is failed. |
| 453 | * STATUS_INVALID_CMD: It's a invalid command. |
| 454 | * STATUS_INVALID_DCL_HANDLE: It's a invalid handle. |
| 455 | * STATUS_NOT_OPENED: The module has not been opened. |
| 456 | * STATUS_DEVICE_IS_BUSY: I2C bus is occupied by others, but this user choose not to wait. Only valid for blocking transaction mode. |
| 457 | * STATUS_ACKERR: ACK error occured. Only valid for blocking transaction mode. |
| 458 | * STATUS_HS_NACKERR: Master code nack error occured. Only valid for blocking transaction mode. |
| 459 | * |
| 460 | * EXAMPLE |
| 461 | * <code> |
| 462 | * kal_uint8 out_buff[3]; |
| 463 | * out_buff[0] = REG_ADDR >> 8; |
| 464 | * out_buff[1] = REG_ADDR; |
| 465 | * out_buff[1] = WRT_DATA; |
| 466 | * DCL_STATUS_T rt; |
| 467 | * DCL_CTRL_CMD cmd = I2C_CMD_SINGLE_WRITE; |
| 468 | * I2C_CTRL_SINGLE_WRITE_T write_data; |
| 469 | * write_data.pu1Data = out_buff; |
| 470 | * write_data.u4DataLen = 3; |
| 471 | * rt = DclSI2C_Control(i2c_handle, cmd, (DCL_CTRL_DATA_T *)&write_data); |
| 472 | * if (STATUS_OK != rt) |
| 473 | * { |
| 474 | * ASSERT(0); |
| 475 | * } |
| 476 | * </code> |
| 477 | * |
| 478 | *************************************************************************/ |
| 479 | extern DCL_STATUS DclSI2C_Control(DCL_HANDLE handle, DCL_CTRL_CMD cmd, DCL_CTRL_DATA_T *data); |
| 480 | /************************************************************************* |
| 481 | * FUNCTION |
| 482 | * DclSI2C_Close |
| 483 | * |
| 484 | * DESCRIPTION |
| 485 | * This function is to close the I2C module. |
| 486 | * |
| 487 | * PARAMETERS |
| 488 | * handle: the returned handle value of DclSI2C_Open |
| 489 | * |
| 490 | * RETURNS |
| 491 | * STATUS_OK |
| 492 | * |
| 493 | * EXAMPLE |
| 494 | * <code> |
| 495 | * if (i2c_handle) |
| 496 | * { |
| 497 | * DclSI2C_Close(i2c_handle); |
| 498 | * i2c_handle = NULL; |
| 499 | * } |
| 500 | * </code> |
| 501 | * |
| 502 | *************************************************************************/ |
| 503 | extern DCL_STATUS DclSI2C_Close(DCL_HANDLE handle); |
| 504 | |
| 505 | |
| 506 | #endif // #ifndef __DCL_I2C_H_PROTOTYPE__ |
| 507 | #endif // #ifdef DCL_DEFINITION_PROTOTYPE |
| 508 | |
| 509 | |
| 510 | |