| rjw | 6c1fd8f | 2022-11-30 14:33:01 +0800 | [diff] [blame] | 1 | /***************************************************************************** |
| 2 | * Copyright Statement: |
| 3 | * -------------------- |
| 4 | * This software is protected by Copyright and the information contained |
| 5 | * herein is confidential. The software may not be copied and the information |
| 6 | * contained herein may not be used or disclosed except with the written |
| 7 | * permission of MediaTek Inc. (C) 2005 |
| 8 | * |
| 9 | * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES |
| 10 | * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") |
| 11 | * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON |
| 12 | * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, |
| 13 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF |
| 14 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT. |
| 15 | * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE |
| 16 | * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR |
| 17 | * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH |
| 18 | * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO |
| 19 | * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S |
| 20 | * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM. |
| 21 | * |
| 22 | * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE |
| 23 | * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, |
| 24 | * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, |
| 25 | * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO |
| 26 | * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. |
| 27 | * |
| 28 | * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE |
| 29 | * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF |
| 30 | * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND |
| 31 | * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER |
| 32 | * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC). |
| 33 | * |
| 34 | *****************************************************************************/ |
| 35 | |
| 36 | /***************************************************************************** |
| 37 | * |
| 38 | * Filename: |
| 39 | * --------- |
| 40 | * init.h |
| 41 | * |
| 42 | * Project: |
| 43 | * -------- |
| 44 | * Maui_Software |
| 45 | * |
| 46 | * Description: |
| 47 | * ------------ |
| 48 | * |
| 49 | * |
| 50 | * Author: |
| 51 | * ------- |
| 52 | * ------- |
| 53 | * |
| 54 | *============================================================================ |
| 55 | * HISTORY |
| 56 | * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| 57 | *------------------------------------------------------------------------------ |
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| 366 | [MAUI_03149504] ([MAUI_03180970]) all time memory dump |
| 367 | [MAUI_03121063] remove PDN registers |
| 368 | [MAUI_03147344] Dummy read for early response HW |
| 369 | [MAUI_03161918] remove custom_setAdvEMI from bootarm.S |
| 370 | [MAUI_03157059] security use meta to write |
| 371 | |
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| 1066 | *------------------------------------------------------------------------------ |
| 1067 | * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| 1068 | *============================================================================ |
| 1069 | ****************************************************************************/ |
| 1070 | |
| 1071 | #ifndef _INIT_COMM_H |
| 1072 | #define _INIT_COMM_H |
| 1073 | |
| 1074 | /******************************************************************************* |
| 1075 | * Include header files |
| 1076 | *******************************************************************************/ |
| 1077 | //MSBB remove #include "kal_non_specific_general_types.h" |
| 1078 | #include "kal_trace.h" |
| 1079 | #include "init_public.h" |
| 1080 | #include "drv_comm.h" |
| 1081 | #include "reg_base.h" |
| 1082 | |
| 1083 | /******************************************************************************* |
| 1084 | * Boot slave register base |
| 1085 | *******************************************************************************/ |
| 1086 | |
| 1087 | #if defined(__MD97__)||defined(__MD97P__) |
| 1088 | #if defined(MT6297_IA) |
| 1089 | #define MCU_BOOTSLV_CTRL_BASE (BASE_MADDR_MDPERIMISC + 0x1204) |
| 1090 | #else |
| 1091 | #define MCU_BOOTSLV_CTRL_BASE (BASE_MADDR_MDPERIMISC + 0x1104) |
| 1092 | #endif |
| 1093 | #else |
| 1094 | #define MCU_BOOTSLV_CTRL_BASE (BASE_MADDR_MDPERIMISC + 0x104) |
| 1095 | #endif |
| 1096 | |
| 1097 | #define MCU_BOOTSLV_CTRL_CORE(index) (MCU_BOOTSLV_CTRL_BASE + (index) * 0xC) |
| 1098 | #define MCU_BOOTSLV_JUMP_ADDR(index) (MCU_BOOTSLV_CTRL_CORE(index) + 0x0) |
| 1099 | #define MCU_BOOTSLV_JUMP_ADDR_UPDATE(index) (MCU_BOOTSLV_CTRL_CORE(index) + 0x4) |
| 1100 | #define MCU_BOOTSLV_JUMP_ADDR_UNLOCK(index) (MCU_BOOTSLV_CTRL_CORE(index) + 0x8) |
| 1101 | #define MCU_BOOTSLV_AP_TRIG (BASE_MADDR_MDCFGCTL + 0x24) |
| 1102 | #define MCU_BOOTSLV_JUMP_KEY_VALUE (0x5500) |
| 1103 | |
| 1104 | /************************************************************************* |
| 1105 | * Define data structure |
| 1106 | *************************************************************************/ |
| 1107 | |
| 1108 | typedef struct |
| 1109 | { |
| 1110 | kal_uint16 pdn_con0; |
| 1111 | kal_uint16 pdn_con1; |
| 1112 | kal_uint16 pdn_con2; |
| 1113 | kal_uint16 pdn_con3; |
| 1114 | } CONFIG_PDN_TYPE; |
| 1115 | |
| 1116 | |
| 1117 | typedef enum |
| 1118 | { |
| 1119 | |
| 1120 | UNKNOWN, |
| 1121 | |
| 1122 | ECO_END = 0x7FFFFFFF |
| 1123 | } ECO_VERSION; |
| 1124 | |
| 1125 | |
| 1126 | typedef enum |
| 1127 | { |
| 1128 | CHIP_UNKNOWN |
| 1129 | } CHIP_NAME; |
| 1130 | |
| 1131 | |
| 1132 | typedef enum |
| 1133 | { |
| 1134 | GP_UNKNOWN |
| 1135 | } CHIP_GROUP; |
| 1136 | |
| 1137 | typedef enum |
| 1138 | { |
| 1139 | B63216A, |
| 1140 | C63216A, |
| 1141 | C63216B, |
| 1142 | UNKNOWN_ANALOG_DIE |
| 1143 | } analog_die_id; /* analog die identification */ |
| 1144 | |
| 1145 | typedef enum |
| 1146 | { |
| 1147 | SYS_CMD_NONE, |
| 1148 | SYS_CMD_SET_BL_DL, |
| 1149 | SYS_CMD_SET_BROM_DL, |
| 1150 | SYS_CMD_CLR_DL_FLAG, |
| 1151 | CHK_USB_META_WO_BAT, |
| 1152 | CHK_FAST_META, |
| 1153 | SYS_CMD_BL_LOGO_DISPLAYED, |
| 1154 | SYS_CMD_GET_PWN_STA, |
| 1155 | SYS_CMD_GET_EMI_PARAM, |
| 1156 | SYS_CMD_BL_BROM_CMD_MODE_DISABLED |
| 1157 | } INIT_SYSCMD_CODE; |
| 1158 | |
| 1159 | |
| 1160 | typedef enum mem_dev_enum_t |
| 1161 | { |
| 1162 | DRAM = 0xA0, |
| 1163 | NOR_ASYNC = 0xB0, |
| 1164 | NOR_ASYNC_PAGE = 0xB1, |
| 1165 | NOR_SYNC_READ_ASYNC_WRITE = 0xB2, |
| 1166 | NOR_SYNC_READ_SYNC_WRITE = 0xB3, |
| 1167 | RAM_ASYNC = 0xC0, |
| 1168 | RAM_ASYNC_PAGE = 0xC1, |
| 1169 | RAM_SYNC_READ_ASYNC_WRITE = 0xC2, |
| 1170 | RAM_SYNC_READ_SYNC_WRITE = 0xC3 |
| 1171 | } MEM_DEV_TYPE; |
| 1172 | |
| 1173 | typedef enum |
| 1174 | { |
| 1175 | BL_INFO_FROM_RTC |
| 1176 | } BL_FIRST_PWON_INFO_SRC; |
| 1177 | |
| 1178 | typedef struct EMI_CS_STRUCT |
| 1179 | { |
| 1180 | kal_uint8 CS0; |
| 1181 | kal_uint8 CS1; |
| 1182 | kal_uint8 CS2; |
| 1183 | kal_uint8 CS3; |
| 1184 | } EMI_CS; |
| 1185 | |
| 1186 | typedef struct EXTSRAM_REGION_INFO_STRCUT |
| 1187 | { |
| 1188 | kal_uint32 addr; |
| 1189 | kal_uint32 len; |
| 1190 | } EXTSRAM_REGION_INFO_T; |
| 1191 | |
| 1192 | typedef enum |
| 1193 | { |
| 1194 | E_BROM, |
| 1195 | E_BLNUSB, |
| 1196 | E_BLSUSB, |
| 1197 | E_ERROR_MODE |
| 1198 | } MODE_ENTRY_SRC; |
| 1199 | |
| 1200 | #if defined(MT6763) || defined(MT6739) || defined(MT6771) || defined(MT6765) || defined(MT6295M) || defined(MT3967) || defined(MT6779) || defined(MT6785)|| defined(MT6297) || defined(MT6885)|| defined(MERCURY) || defined(MT6873) || defined(MT6853) || defined(CHIP10992) || defined(MT6833) || defined(MT6877) |
| 1201 | // Check these macro define is the same as MT6763 FPGA? |
| 1202 | #define DATE_CODE_BASE 0xA0000018 |
| 1203 | #if defined(__MD97__)||defined(__MD97P__) |
| 1204 | #define PURPOSE_CODE_BASE 0xA0000018 |
| 1205 | #else |
| 1206 | #define PURPOSE_CODE_BASE 0xA000001C |
| 1207 | #endif |
| 1208 | #define PURPOSE_CODE_BIT (24) |
| 1209 | #define PURPOSE_CODE_MASK 0x0F000000 |
| 1210 | #define CORENUM_BIT (16) |
| 1211 | #define CORENUM_MASK 0x000F0000 |
| 1212 | #endif |
| 1213 | #if defined(__MD97__)||defined(__MD97P__) |
| 1214 | typedef enum |
| 1215 | { |
| 1216 | PURPOSE_NotSupport, |
| 1217 | FPGA_H1, |
| 1218 | FPGA_H2, |
| 1219 | FPGA_H3, |
| 1220 | FPGA_H4, |
| 1221 | FPGA_H5, |
| 1222 | FPGA_H6, |
| 1223 | FPGA_Platform = 0xFF, |
| 1224 | FPGA_LTEL2= 0xFF, |
| 1225 | FPGA_SIB= 0xFF, |
| 1226 | FPGA_U4G= 0xFF, |
| 1227 | FPGA_U4G_LTEL2= 0xFF, |
| 1228 | FPGA_BIT_PURPOSE_END = 0xFFFFFFFF |
| 1229 | } HW_PURPOSE; |
| 1230 | #else |
| 1231 | typedef enum |
| 1232 | { |
| 1233 | PURPOSE_NotSupport, |
| 1234 | FPGA_Platform, |
| 1235 | FPGA_LTEL2, |
| 1236 | FPGA_SIB, |
| 1237 | FPGA_U4G, |
| 1238 | FPGA_U4G_LTEL2, |
| 1239 | FPGA_BIT_PURPOSE_END = 0xFFFFFFFF |
| 1240 | } HW_PURPOSE; |
| 1241 | #endif |
| 1242 | typedef enum |
| 1243 | { |
| 1244 | CORENUM_NotSupport, |
| 1245 | CORENUM_1, |
| 1246 | CORENUM_2, |
| 1247 | CORENUM_3, |
| 1248 | CORENUM_4, |
| 1249 | FPGA_BIT_CORENUM_END = 0xFFFFFFFF |
| 1250 | } HW_CORENUM; |
| 1251 | |
| 1252 | extern kal_uint32 INT_FPGA_DATECODE(void); |
| 1253 | /*Only FPGA Support this function*/ |
| 1254 | #if defined (__FPGA__) |
| 1255 | extern HW_PURPOSE INT_FPGA_PURPOSE(void); |
| 1256 | #endif |
| 1257 | extern HW_CORENUM INT_FPGA_CORENUM(void); |
| 1258 | extern kal_bool INT_FPGA_IS_ASIC(void); |
| 1259 | |
| 1260 | typedef enum |
| 1261 | { |
| 1262 | E_Before_20140801, |
| 1263 | E_20140801, |
| 1264 | E_20140802, |
| 1265 | E_20140808, |
| 1266 | E_20140819, |
| 1267 | E_20140822, |
| 1268 | E_20140824, |
| 1269 | E_20140825, |
| 1270 | E_20140826, |
| 1271 | E_20140827, |
| 1272 | E_20140828, |
| 1273 | E_20140830, |
| 1274 | E_20140901, |
| 1275 | E_20140902, |
| 1276 | E_20140903, |
| 1277 | E_20140904, |
| 1278 | E_20140905, |
| 1279 | E_20140908, |
| 1280 | E_FPGA_BIT_DATE_END = 0xFFFFFFFF |
| 1281 | } FPGA_BIT_DATE; |
| 1282 | typedef enum |
| 1283 | { |
| 1284 | E_Platform, |
| 1285 | E_3G, |
| 1286 | E_4G, |
| 1287 | E_FPGA_BIT_PURPOSE_END = 0xFFFFFFFF |
| 1288 | } FPGA_BIT_PURPOSE; |
| 1289 | typedef struct |
| 1290 | { |
| 1291 | FPGA_BIT_DATE date; |
| 1292 | FPGA_BIT_PURPOSE purpose; |
| 1293 | } FPGA_VERSION; |
| 1294 | extern FPGA_VERSION INT_FPGA_Version(void); |
| 1295 | |
| 1296 | #if 0 |
| 1297 | /* under construction !*/ |
| 1298 | /* under construction !*/ |
| 1299 | /* under construction !*/ |
| 1300 | /* under construction !*/ |
| 1301 | /* under construction !*/ |
| 1302 | /* under construction !*/ |
| 1303 | /* under construction !*/ |
| 1304 | /* under construction !*/ |
| 1305 | /* under construction !*/ |
| 1306 | #endif |
| 1307 | |
| 1308 | /************************************************************************* |
| 1309 | * Define system internal RAM pool size |
| 1310 | *************************************************************************/ |
| 1311 | |
| 1312 | #ifdef __SYS_INTERN_RAM__ |
| 1313 | |
| 1314 | #define KAL_TIMER_STACK_SIZE 512 |
| 1315 | |
| 1316 | #if defined(IC_BURNIN_TEST) |
| 1317 | #define GLOBAL_INT_SRAM_STACK_MEM_SIZE (2048) |
| 1318 | #endif |
| 1319 | |
| 1320 | #endif /* __SYS_INTERN_RAM__ */ |
| 1321 | |
| 1322 | |
| 1323 | /************************************************************************* |
| 1324 | * Define import function prototype |
| 1325 | *************************************************************************/ |
| 1326 | /* Category 0: Initialize related */ |
| 1327 | extern void Initialize(void); |
| 1328 | /* Category 1: chip information */ |
| 1329 | extern ECO_VERSION INT_ecoVersion(void); |
| 1330 | extern CHIP_GROUP INT_ChipGroup(void); |
| 1331 | extern analog_die_id AnalogDieID(void); |
| 1332 | extern CHIP_NAME INT_ChipName(void); |
| 1333 | void INT_Init_Misc(void); |
| 1334 | |
| 1335 | /* Category 2: Query or Set system information */ |
| 1336 | extern kal_bool INT_IsBootForUSBAT(void); |
| 1337 | extern void INT_SetCmdToSys(INIT_SYSCMD_CODE cmd_val); |
| 1338 | extern kal_uint32 INT_GetSysStaByCmd(INIT_SYSCMD_CODE cmd_val, void *data_p); |
| 1339 | extern void INT_Set_BootSlave(kal_uint32 core_index, kal_uint32 jmp_addr); |
| 1340 | |
| 1341 | |
| 1342 | #ifdef __MTK_TARGET__ |
| 1343 | extern kal_bool INT_GetAvailableMemory_Ptr(kal_uint32 **, kal_uint32 *); |
| 1344 | extern kal_bool INT_QueryBiggestPool(kal_uint32 *, void **); |
| 1345 | #endif |
| 1346 | |
| 1347 | extern kal_uint32 INT_RetrieveFlashBaseAddr(void); |
| 1348 | extern kal_bool INT_CheckSystemDriveOnNAND(void); |
| 1349 | extern void init_32khz_output(kal_uint16 gpio_pin, kal_uint16 gpio_data); |
| 1350 | extern kal_int32 enable_32khz_output(void); |
| 1351 | extern kal_int32 disable_32khz_output(void); |
| 1352 | extern kal_bool INT_RetrieveDSPTXRXBaseAddr(kal_uint32 *TX_Base, kal_uint32 *RX_Base, kal_uint32 *CS, kal_uint32 *TX_Size, kal_uint32 *RX_Size); |
| 1353 | extern kal_int32 INT_QuerySystemRAMInfo(kal_uint32 *addr, kal_uint32 *len); |
| 1354 | extern void wait_32k_start(void); |
| 1355 | |
| 1356 | #if defined(__MTK_TARGET__) |
| 1357 | extern kal_int32 show_sysinit_msg(void); |
| 1358 | #else /* __MTK_TARGET__ */ |
| 1359 | #define show_sysinit_msg() |
| 1360 | #endif /* __MTK_TARGET__ */ |
| 1361 | |
| 1362 | #if defined(__RTL_SIMULATION_FOR_60QBIT__) |
| 1363 | extern kal_int32 profile_INT_SwitchStackToRun_before(void); |
| 1364 | extern kal_int32 profile_INT_SwitchStackToRun_after(void); |
| 1365 | #endif /* __RTL_SIMULATION_FOR_60QBIT__ */ |
| 1366 | |
| 1367 | |
| 1368 | /************************************************************************* |
| 1369 | * Define customized function prototype |
| 1370 | *************************************************************************/ |
| 1371 | |
| 1372 | extern kal_int8 custom_setEMI(void); |
| 1373 | extern EMI_CS * custom_getCS(void); |
| 1374 | extern void custom_get_EXTSRAM_size(kal_uint32 *); |
| 1375 | extern kal_uint32 custom_get_demp_image_table(void); |
| 1376 | extern kal_int32 custom_config_demp_page(kal_uint32 **list, kal_uint32 **pool, kal_uint32 *pool_size); |
| 1377 | extern MODE_ENTRY_SRC INT_GetMetaModeSrc(void); |
| 1378 | |
| 1379 | |
| 1380 | /************************************************************************* |
| 1381 | * Define region attribute |
| 1382 | *************************************************************************/ |
| 1383 | #if defined(__MTK_TARGET__) |
| 1384 | #include "sys/cdefs.h" |
| 1385 | #undef __section |
| 1386 | #define __section(S) __attribute__ ((section(#S))) |
| 1387 | |
| 1388 | #define __attr_cached_ext_zi __section(CACHED_EXTSRAM_PREINIT_ZI) |
| 1389 | #define __attr_emiinit_zi __section(EMIINITZI) |
| 1390 | #define __attr_emiinit_code __section(EMIINITCODE) |
| 1391 | #define __attr_lead_part __section(INTSRAM_RODATA) |
| 1392 | |
| 1393 | #else |
| 1394 | |
| 1395 | #define __attr_cached_ext_zi |
| 1396 | #define __attr_emiinit_zi |
| 1397 | #define __attr_emiinit_code |
| 1398 | #define __attr_lead_part |
| 1399 | |
| 1400 | #endif /* __MTK_TARGET__ */ |
| 1401 | |
| 1402 | #endif /* !_INIT_H */ |
| 1403 | |