mcu/interface/protocol/as_c2k/evdo/clctimer.h

/*****************************************************************************
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/*************************************************************
*
* This Software is the property of VIA Telecom, Inc. and may only be used pursuant to a license from VIA Telecom, Inc.
*
* Any unauthorized use inconsistent with the terms of such license is strictly prohibited.
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* Copyright (c) 2006-2010 VIA Telecom, Inc.  All rights reserved.
*
*************************************************************/
#ifndef _CLCTIMER_H_
#define _CLCTIMER_H_ 1
/*****************************************************************************
*
* FILE NAME   : clctimer.h
*
* DESCRIPTION : Timer Controller interface for the CLC Task
*
* HISTORY     :
*     See Log at end of file
*
*****************************************************************************/

/*----------------------------------------------------------------------------
 Include Files
----------------------------------------------------------------------------*/

/*----------------------------------------------------------------------------
 Global Defines and Macros
----------------------------------------------------------------------------*/
#if 0 /* rtm3 / phy2 testing purpose */
/* under construction !*/
/* under construction !*/
#else
#define TOMPQCSUPERVISION  5333  /*Spec define: QuickConfig Supervision timer 12 * 256 * 1.667ms = 5.12second*/
                                 /*93 using task SMP, timer expire maight be excuted before CC package decode success in CL1*/
                                 /*Add 0.5cc =128slot Margin, 12cc + 0.5cc = 5.12s + 213ms = 5333ms*/

#define TOMPSPSUPERVISION   5333  /*Spec define: SectorParamters Supervision timer 12 * 256 * 1.667 ms = 5.12 second  + 128slot Margin*/
                                  /*93 using task SMP, timer expire maight be excuted before CC package decode success in CL1*/
                                  /*Add 0.5cc = 128slot Margin, 12cc + 0.5cc = 5.12s + 213ms = 5333ms*/

#define TOMPOVHDSUPERVISION_TEST 10 /* Define a short period timer to trigger the CLC_OMP_QC_SUPERVISION_TIMER expire easily. */
#endif

#define TIDPCONNSETUP           2500 /*Maximum access terminal time in the connection setup state */
#define TIDPPAGEPENDING       1000 /*Default Page pending timer in Freeze state */

#define TIDPLONGSLEEPDELAY  60000 /* Long sleep delay timer duration - 60 seconds */

#define TOMPIHOOHMDECODE   1000   /*OMP decode tmr expired (500ms for now)*/

/* TO DO - check the units of timer - 1ms OR 10ms */

#define INSP_SYNC_ACQ_TIME   5000  /* Time to acquire Sync msg - 5 seconds */

/* Time to acquire Sync msg on second run, to handle dead loop by 1x preemption (could be 1.28 sec) */
#define INSP_SYNC_ACQ_TIME_SHORT     1000


#define INSP_SYNC_TIMING_TIME    1500    /* Time to set System Time - 160ms+margin */
                                         /* From Irvine FT - now we do ClkCal (1.28s), inc to 1.5s to wait for RMC_Syncok */

#define INSP_PILOT_ACQ_TIME  10000    /* Time from tune channel to sync OK */

#ifdef MTK_DEV_C2K_IRAT
#define INSP_PILOT_ACQ_FAIL_COUNT  1
#define INSP_SRLTE_PILOT_ACQ_TIME  10000 * INSP_PILOT_ACQ_FAIL_COUNT    /* Time from tune channel to sync OK */
#define IDP_CONTINUE_RCV_UATI_ASSIGNMENT_PERIOD 430   /* 1 control channel cycle about 426ms.*/
#define IDP_GUARD_CHANNEL_PROTECT_PERIOD        10000 /* The maximum time of applying channel protection for EVDO.*/
#endif

#ifndef MTK_PLT_ON_PC_UT
#define T_WFR_RMC_INTER_HO_CNF_REDUCTION  30 /* About 3~4 frame ticks(8ms for each frame tick). */
#else
#define T_WFR_RMC_INTER_HO_CNF_REDUCTION  3000
#endif

#define T_BLOCK_IDO_WAKE_REDUCTION  4000

#define T_CC_SYNC_CAP_CHECK  180

#define INSP_WTF_ANTENNA_TIME  15000

#define T_WFR_RSVAS_OCCUPY_IND_TIMER  5000

#define T_GUARD_INTERVAL_BETWEEN_WAKEUP_AND_SLEEP_CMD_TIMER 17

#define T_GUARD_NON_SLOTTED_MODE_TIMER 240000

/*----------------------------------------------------------------------------
 Global Typedefs
----------------------------------------------------------------------------*/

/* Connection Layer controller Errors */
typedef enum
{
  CLC_OMP_QC_SUPERVISION_TIMER,
  CLC_OMP_SP_SUPERVISION_TIMER,
  CLC_IDP_CONNECTION_SETUP_TIMER,
  CLC_IDP_PAGE_PENDING_TIMER,
  CLC_IDP_SUSPENDPERIOD_TIMER,
  CLC_INSP_SYNC_ACQ_TIMER,
  CLC_INSP_TIMING_TIMER,
  CLC_IDP_NO_SRCH_DONE_WAKEUP_TIME,
  CLC_INSP_PILOT_ACQ_TIMER,
  CLC_OMP_IHO_OHMDECODE_TIMER,
  CLC_IDP_BLOCK_IHO_WAKE_REDUCTION_TIMER,
  CLC_IDP_CC_SYNC_CAP_CHECK_TIMER,
  CLC_IDP_DFS_TIMER,
  CLC_INSP_WAITFIR_ANTENNA_TIMER,
#ifdef MTK_DEV_C2K_IRAT
  CLC_INSP_SRLTE_PILOT_ACQ_TIMER,
  CLC_IDP_CONTINUE_RCV_UATI_ASSIGNMENT_TIMER,
  CLC_IDP_WFR_RSVAS_OCCUPY_IND_TIMER,
  CLC_IDP_GUARD_INTERVAL_BETWEEN_WAKEUP_AND_SLEEP_CMD_TIMER,
  CLC_IDP_GUARD_CHANNEL_PROTECT_TIMER,
#endif
  CLC_IDP_WFR_RMC_INTER_HO_CNF_TIMER,
  CLC_IDP_GUARD_NON_SLOTTED_MODE_TIMER,
  NUM_CLCTMRs
} ClcTimerId;

/*----------------------------------------------------------------------------
 Global Data
----------------------------------------------------------------------------*/
extern event_scheduler *pClcEsch;

/*----------------------------------------------------------------------------
 Global Function Prototypes
----------------------------------------------------------------------------*/
void clcTimerInit (void);
void clcStartTimer (ClcTimerId internalId, kal_uint32 duration);
void clcStopTimer (ClcTimerId internalId);
kal_bool clcIsTimerActive(ClcTimerId timer);
void ProcessClcTimerExpiredMsg(kal_uint32 timerId);

/*****************************************************************************
* $Log: clctimer.h $
*
* 09 18 2020 dayang.liu
* [MOLY00560078] DM??  DTS2020081904LO9PP0D00 P155  [ASSERT] file:mcu/protocol/lte_sec/errc/assert/errc_el1_assert_csr.c line:91
* 	
* 	.
*
* 08 14 2019 dayang.liu
* sync MOLY00362652 into APOLLO.SQC.
*
* 07 04 2019 dayang.liu
* [MOLY00406740] [URGENT][Cervino][MT6762][P0][MP2][Sprint][FT_REG][Kansas][SI2][C2K][Random][ASSERT] file:mcu/common/modem/c2k/rfd/external/cl1d_rf_error_check.c line:527
* 	
* 	MOLY00406740 - Sync to Vmoly .
* 	MOLY00406420, MOLY00343805, MOLY00334479
*
* 06 28 2019 dayang.liu
* [MOLY00374669] [Telephony PPM][Lafite][P0][OPPO][VIVO NEX A][P90][TC150] T1 Fail: DUT=5.89s vs REF=2.74s - VMOLY
*
* 06 26 2019 dayang.liu
* [MOLY00372025] [MT6779][Lafite][P0][BSP+][MP2][C2K][OM][MTBF][ErrorTimes:1]Externel (EE),0,0,99,/data/vendor/core/,1,modem,Trigger time:[2018-12-08 00:54:21.378788]
* 	
* 	Merge [MOLY00372025] into VMOLY.
* 	
* 	ALPS04228687 - LR12A.R2.MP.
*
* 05 25 2018 dayang.liu
* [MOLY00328321] [EIGER][MT3967][RDIT][FT][CT][SRLTE+L][random][SH][SIM1:CMCC][SIM2:CT]DUT cannot attach to 3G
* ALPS03932411 - UMOLYE-TRUNK.
*
* 05 15 2018 dayang.liu
* [MOLY00326014] [Gen95][MSPM] SW changes check in UMOLYE
* merge EVDO into UMOLYE branch.
*
* 07 06 2017 sue.zhong
* [MOLY00259241] [6293][C2K]Replace with KAL data type
* Correct copyright file header
*
* 05 12 2017 wesley.li
* [MOLY00247455] [6293][C2K][PS]Change KAL timer API to event scheduler API
* 	
* 	CL:timer modification
*
* 05 09 2017 tom.wu
* [MOLY00247691] [BIANCO][MT6763][C2K][RDIT][PHONE][PreHQA][CCF][Spirent][C.S0033(RevA)][4.2.1]Time Reference fail
* 	
* 	, modify OMP supervsn timer to 12+0.5  CC cycle
*
* 04 26 2017 dayang.liu
* [MOLY00245272] [BIANCO][MT6763][RDIT][PHONE][Stress][C2K][SIM1:CTC]Fail to establish ppp link @Do only mode
* ALPS03266267 - Add protect timer for MSG_ID_IDP_RMC_INTER_HO_CNF_MSG.
*
* 04 19 2017 dayang.liu
* [MOLY00241439] [BUG][PS][CLC] Add ELT cmd for idle supervision fail procedure.
* Add ELT CMD to triggrt supervision Event.
*
* 11 09 2016 sue.zhong
* [MOLY00208435] [6293][C2K]Sync C2K code to UMOLYA TRUNK
* Update C2K PS code (1/2)
*****************************************************************************/

/*****************************************************************************
* End of File
*****************************************************************************/
#endif /*_CLCTIMER_H_*/