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rjw6c1fd8f2022-11-30 14:33:01 +08001/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2005
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
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12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
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21*
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32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35 /*******************************************************************************
36 * Copyright Statement:
37 * --------------------
38 * This software is protected by Copyright and the information contained
39 * herein is confidential. The software may not be copied and the information
40 * contained herein may not be used or disclosed except with the written
41 * permission of MediaTek Inc. (C) 2001
42 *
43 *******************************************************************************/
44
45 /*******************************************************************************
46 * Filename:
47 * ---------
48 * sml_public_def.h
49 *
50 * Project:
51 * --------
52 * MAUI
53 *
54 * Description:
55 * ------------
56 * Enum and Constant provided by SIM-ME Lock
57 *
58 * Author:
59 * -------
60 * -------
61 *
62 *==============================================================================
63 *******************************************************************************/
64#ifndef SML_PUBLIC_DEF_H
65#define SML_PUBLIC_DEF_H
66
67#include "kal_public_defs.h"
68#include "sml_nvram_ver.h"
69
70/*--- SML related Macro Defined ---*/
71
72/* for MS_SECURITY */
73#define NVRAM_EDITOR_NUM_OF_BYTE_KEY 8
74#define NVRAM_EDITOR_NUM_OF_BYTE_NP 3
75#define NVRAM_EDITOR_NUM_OF_BYTE_NSP 5
76#define NVRAM_EDITOR_NUM_NSP 3
77#define NVRAM_EDITOR_NUM_GID 20
78#define NVRAM_EDITOR_NUM_OF_BYTE_IMSI 9
79#define NVRAM_EDITOR_NUM_PIN1 8
80#define NVRAM_EDITOR_NUM_OF_BYTE_ICCID 10
81#define NVRAM_SECRET_KEY_SIZE 8
82#define NVRAM_CUSTOM_KEY_SEED_SIZE 32
83
84/*
85 * the basic unit of categories
86 */
87#define SML_SIZE_OF_CAT_N 3 /* MCC/MNC */
88#define SML_SIZE_OF_CAT_NS 4 /* MCC/MNC + HLR */
89#define SML_SIZE_OF_CAT_SP 4 /* MCC/MNC + GID1 */
90#define SML_SIZE_OF_CAT_C 5 /* MCC/MNC + GID1 + GID2 */
91#define SML_SIZE_OF_CAT_SIM 8 /* IMSI */
92/* Define the maximum suppot categories */
93#define SML_MAX_SUPPORT_CAT_N 10
94#define SML_MAX_SUPPORT_CAT_NS 2
95#define SML_MAX_SUPPORT_CAT_SP 2
96#define SML_MAX_SUPPORT_CAT_C 2
97#define SML_MAX_SUPPORT_CAT_SIM 2
98/* Define the total size of each category */
99#define SML_CFG_CAT_N_SIZE (SML_MAX_SUPPORT_CAT_N * SML_SIZE_OF_CAT_N)
100#define SML_CFG_CAT_NS_SIZE (SML_MAX_SUPPORT_CAT_NS * SML_SIZE_OF_CAT_NS)
101#define SML_CFG_CAT_SP_SIZE (SML_MAX_SUPPORT_CAT_SP * SML_SIZE_OF_CAT_SP)
102#define SML_CFG_CAT_C_SIZE (SML_MAX_SUPPORT_CAT_C * SML_SIZE_OF_CAT_C)
103#define SML_CFG_CAT_SIM_SIZE (SML_MAX_SUPPORT_CAT_SIM * SML_SIZE_OF_CAT_SIM)
104/* Define the support category size */
105#define SML_SUPPORT_CAT_SIZE 7 /* SML_CAT_SIZE in sml_cat_enum */
106
107#define NVRAM_SML_S_MAX_SUPPORT_SALT_LEN 32
108#define NVRAM_SML_S_MAX_SUPPORT_INTER_CNT_LEN 4
109#define NVRAM_SML_S_MAX_SUPPORT_HCK_LEN 64
110
111#define SML_GBLOB_IMEI_SIZE 15
112#define SML_GBLOB_TOTAL_IMEI_SIZE SML_GBLOB_IMEI_SIZE * 4 //Support Max 4 SIM
113#define SML_GBLOB_SUB_RULE_SIZE 2
114#define SML_GBLOB_TLV_DATA_SIZE 256
115#define SML_GBLOB_SIZE_OF_MRC 4
116#define SML_GBLOB_SIZE_OF_DEV_INTCNT 4
117#define SML_GBLOB_SIZE_OF_DEV_SALT 32
118#define SML_GBLOB_SIZE_OF_DEV_HCK 64
119#define SML_GBLOB_SIZE_OF_SIGNATURE 256
120#define SML_GBLOB_SIZE_OF_PACKAGE_KEY 1024
121
122/* RJIL Subsidy Lock BLOB */
123#define SML_SL_BLOB_IMEI_SIZE 15
124#define SML_SL_BLOB_TIME_STAMP_SIZE 8
125#define SML_SL_BLOB_LENGTH_SIZE 2
126#define SML_SL_BLOB_CONFIG_SUPPORT_CAT_SIZE 3
127#define SML_SL_BLOB_ITERATION_COUNT_SIZE 4
128#define SML_SL_BLOB_SALT_SIZE 16
129#define SML_SL_BLOB_HCK_SIZE 32
130#define SML_SL_BLOB_SIZE_OF_SIGNATURE 256
131#define SML_SL_PUBLIC_KEY_MOD_SIZE 256
132#define SML_SL_PUBLIC_KEY_EXP_SIZE 3
133
134/* Invalid SML context obj length */
135#define SML_SL_INVALID_CONTEXT_OBJ_LENGTH 0xFFFF
136#define SML_SL_NVRAM_ACCESS_ID_NONE 0
137#define SML_SL_NVRAM_ACCESS_ID_UPDATE_SLB 0xFA
138#define SML_SL_NVRAM_ACCESS_ID_UPDATE_LOCK_OP 0xFB
139#define SML_SL_MAX_SUPPORT_KEY_LEN 16
140
141/*
142 * the basic unit of categories
143 */
144#define SML_SL_BLOB_SIZE_OF_CAT_N 6 /* MCC/MNC */
145#define SML_SL_BLOB_SIZE_OF_CAT_NS 8 /* MCC/MNC + HLR */
146#define SML_SL_BLOB_SIZE_OF_CAT_SP 7 /* MCC/MNC + GID1 */
147
148/* Define the maximum suppot categories */
149#define SML_SL_BLOB_MAX_SUPPORT_CAT_N 30
150#define SML_SL_BLOB_MAX_SUPPORT_CAT_NS 10
151#define SML_SL_BLOB_MAX_SUPPORT_CAT_SP 10
152
153/* Define the total size of each category */
154#define SML_SL_BLOB_CAT_N_SIZE (SML_SL_BLOB_MAX_SUPPORT_CAT_N * SML_SL_BLOB_SIZE_OF_CAT_N)
155#define SML_SL_BLOB_CAT_NS_SIZE (SML_SL_BLOB_MAX_SUPPORT_CAT_NS * SML_SL_BLOB_SIZE_OF_CAT_NS)
156#define SML_SL_BLOB_CAT_SP_SIZE (SML_SL_BLOB_MAX_SUPPORT_CAT_SP * SML_SL_BLOB_SIZE_OF_CAT_SP)
157
158#define SML_SL_MAX_BLOB_SIZE NVRAM_EF_SUBSIDY_LOCK_SIZE
159
160#define DSML_MAX_BL_LEN 128 /* should larger then max category data */
161
162/*
163 * Key management behavior
164 *
165 * the maximum control key length in bcd, i.e., double in digits
166 * this value shall not be smaller than MAX_SIM_PASSWD_LEN-1, which is the maximum length of PIN
167 */
168#ifdef __EXTEND_SML_KEY_LEN__
169#define SML_MAX_SUPPORT_KEY_LEN 16
170#else
171#define SML_MAX_SUPPORT_KEY_LEN 8 /* in byte */
172#endif
173
174#define CAT_KEY_MAX_SUPPORT_LEN NVRAM_SML_S_MAX_SUPPORT_HCK_LEN
175
176/* NVRAM_SML_MAX_SUPPORT_KEY_LEN is the largest value of SML_MAX_SUPPORT_KEY_LEN
177 used by NVRAM LID NVRAM_EF_SML_LID to prevent from NVRAM content size change
178 when __EXTEND_SML_KEY_LEN__ is switched.
179 Pleaes remember to align this value to the maximal SML_MAX_SUPPORT_KEY_LEN
180 */
181#define NVRAM_SML_MAX_SUPPORT_KEY_LEN 16
182
183/*
184 * Linked Category Support
185 */
186#define SML_SIZE_OF_LINK_NS_SP 5 /* MCC/MNC + HLR+ GID1 */
187#define SML_SIZE_OF_LINK_SIM_C 10 /* IMSI + GID1 + GID2 */
188/* Define the maximum support num of categories */
189#define SML_MAX_SUPPORT_LINK_NS_SP 2
190#define SML_MAX_SUPPORT_LINK_SIM_C 2
191/* define the total size of link category */
192#define SML_CFG_CAT_NS_SP_SIZE (SML_SIZE_OF_LINK_NS_SP * SML_MAX_SUPPORT_LINK_NS_SP)
193#define SML_CFG_CAT_SIM_C_SIZE (SML_SIZE_OF_LINK_SIM_C * SML_MAX_SUPPORT_LINK_SIM_C)
194
195/*
196 * Range Support
197 */
198#define SML_CAT_NS_RANGE_SIZE 2 /* ex: 00FF 0~255 for HLR */
199
200/*
201 * Automatically Lock
202 */
203#define SML_AUTOLOCK_NUM_N_CATEGORY SML_MAX_SUPPORT_CAT_N
204#define SML_AUTOLOCK_NUM_NS_CATEGORY SML_MAX_SUPPORT_CAT_NS
205#define SML_AUTOLOCK_NUM_SP_CATEGORY SML_MAX_SUPPORT_CAT_SP
206#define SML_AUTOLOCK_NUM_C_CATEGORY SML_MAX_SUPPORT_CAT_C
207#define SML_AUTOLOCK_NUM_SIM_CATEGORY SML_MAX_SUPPORT_CAT_SIM
208
209/*
210 * Maximum Retry Count
211 */
212#define SML_MAX_RETRY_COUNT 5
213#define SML_RETRY_TIMEOUT 3 /* in sec */
214#define SML_RETRY_COUNT_N_CAT SML_MAX_RETRY_COUNT
215#define SML_RETRY_COUNT_NS_CAT SML_MAX_RETRY_COUNT
216#define SML_RETRY_COUNT_SP_CAT SML_MAX_RETRY_COUNT
217#define SML_RETRY_COUNT_C_CAT SML_MAX_RETRY_COUNT
218#define SML_RETRY_COUNT_SIM_CAT SML_MAX_RETRY_COUNT
219
220// Penalty timer timeout
221#define SML_PENALTY_TIMER_TIMEOUT 60 /* Define in Seconds. Set default 60 */
222
223// Penalty timer bitmask
224#define SML_ENABLE_PENALTY_TIMER_BIMASK 0x10
225
226#if !defined(L1_SIM) || defined(__UE_SIMULATOR__) || defined(__DUMMY_L1_ON_TARGET_4G5G__)
227#include "cust_chl_interface.h"
228
229#define SML_TMO_MAX_SHARED_KEY_LENGTH MAX_CUST_CHL_SYM_KEY_LEN
230#define SML_TMO_MAX_ENCRYPTED_KEY_LENGTH MAX_CUST_CHL_ASYM_KEY_LEN
231#define SML_ATT_MAX_SHARED_KEY_LENGTH MAX_CUST_CHL_SYM_KEY_LEN
232#define SML_ATT_MAX_ENCRYPTED_KEY_LENGTH MAX_CUST_CHL_ASYM_KEY_LEN
233
234#endif /* L1_SIM */
235
236/* The following size are referend from TMO SIM lock blob format */
237#define SML_TMO_SIZE_OF_API_VERSION 4
238#define SML_TMO_SIZE_OF_VERSION 4
239#define SML_TMO_SIZE_OF_LENGTH 2
240#define SML_TMO_SIZE_OF_MCC_MNC 4
241#define SML_TMO_SIZE_OF_GID 2
242#define SML_TMO_SIZE_OF_MCC_MNC_GID 6
243#define SML_TMO_SIZE_OF_RESERVED 2
244#define SML_TMO_SIZE_OF_START_TIME 8
245#define SML_TMO_SIZE_OF_END_TIME 4
246#define SML_TMO_SIZE_OF_VERIFICATION_CODE 256
247
248#define SML_TMO_SIZE_OF_MAC 32
249#define SML_TMO_SIZE_OF_SIGNATURE 256
250
251#define SML_TMO_MAX_SLB_SIZE NVRAM_EF_SIM_LOCK_SIZE
252
253/* TMO SIM lock blob format 1.5 */
254#define SML_TMO_MAX_PLMN_NUMBER 10
255#define SML_TMO_MAX_GID_NUMBER 10
256#define SML_TMO_SIZE_OF_NUM_PLMN 2
257#define SML_TMO_SIZE_OF_PLMN_LIST SML_TMO_SIZE_OF_MCC_MNC * SML_TMO_MAX_PLMN_NUMBER
258#define SML_TMO_SIZE_OF_NUM_GID 2
259#define SML_TMO_SIZE_OF_GID_LIST SML_TMO_SIZE_OF_GID * SML_TMO_MAX_GID_NUMBER
260#define SML_TMO_SIZE_OF_IMEI 16
261#define SML_TMO_SIZE_OF_UNLOCK_TIME 4
262
263/* Invalid SML context obj length */
264#define SML_TMO_INVALID_CONTEXT_OBJ_LENGTH 0xFFFF
265#define SML_TMO_NVRAM_ACCESS_ID_UPDATE_VERIFICATION_CODE 0xFD
266#define SML_TMO_NVRAM_ACCESS_ID_UPDATE_SLB 0xFC
267#define SML_TMO_NVRAM_ACCESS_ID_RESET_SLB 0xFB
268#define SML_TMO_NVRAM_ACCESS_ID_UNLOCK_EXPIRE 0xFA
269#define SML_TMO_TIMEOUT_PERIODIC_CHECK (KAL_TICKS_1_SEC*10)//(12*60*KAL_TICKS_1_MIN) /* 12 hours */
270#define SML_RSU_TIMER_INDEX_PERIODIC_CHECK 0x01
271
272/* the SML flags */
273#define SML_FLAG_CAT_N 0x01
274#define SML_FLAG_CAT_NS 0x02
275#define SML_FLAG_CAT_SP 0x04
276#define SML_FLAG_CAT_C 0x08
277#define SML_FLAG_CAT_SIM 0x10
278
279typedef struct {
280 kal_uint8 change_flag;
281 kal_uint8 num; /* num of valid sets */
282} sml_sl_blob_meta_struct;
283
284typedef struct {
285 kal_uint8 iteration_count[SML_SL_BLOB_ITERATION_COUNT_SIZE]; /* 4 */
286 kal_uint8 salt[SML_SL_BLOB_SALT_SIZE]; /* 16 */
287 kal_uint8 hck[SML_SL_BLOB_HCK_SIZE]; /* 32 */
288} sml_sl_blob_key_struct;
289
290/* The following size are referend from ATT SIM lock blob format */
291#define SML_ATT_SIZE_OF_API_VERSION 4
292#define SML_ATT_SIZE_OF_VERSION 4
293#define SML_ATT_SIZE_OF_LENGTH 2
294#define SML_ATT_SIZE_OF_MCC_MNC 4
295#define SML_ATT_SIZE_OF_GID 2
296#define SML_ATT_SIZE_OF_MCC_MNC_GID 6
297#define SML_ATT_SIZE_OF_RESERVED 2
298#define SML_ATT_SIZE_OF_START_TIME 8
299#define SML_ATT_SIZE_OF_END_TIME 4
300#define SML_ATT_SIZE_OF_VERIFICATION_CODE 256
301#define SML_ATT_SIZE_OF_MAC 32
302#define SML_ATT_SIZE_OF_SIGNATURE 256
303#define SML_ATT_MAX_SLB_SIZE NVRAM_EF_L4_ATT_SIM_LOCK_SIZE
304
305/* ATT SIM lock blob format 1.5 */
306#define SML_ATT_MAX_PLMN_NUMBER 10
307#define SML_ATT_MAX_GID_NUMBER 10
308#define SML_ATT_SIZE_OF_NUM_PLMN 2
309#define SML_ATT_SIZE_OF_PLMN_LIST SML_ATT_SIZE_OF_MCC_MNC * SML_ATT_MAX_PLMN_NUMBER
310#define SML_ATT_SIZE_OF_NUM_GID 2
311#define SML_ATT_SIZE_OF_GID_LIST SML_ATT_SIZE_OF_GID * SML_ATT_MAX_GID_NUMBER
312#define SML_ATT_SIZE_OF_IMEI 16
313#define SML_ATT_SIZE_OF_UNLOCK_TIME 4
314
315/* Invalid SML context obj length */
316#define SML_ATT_INVALID_CONTEXT_OBJ_LENGTH 0xFFFF
317#define SML_ATT_NVRAM_ACCESS_ID_UPDATE_VERIFICATION_CODE 0xED
318#define SML_ATT_NVRAM_ACCESS_ID_UPDATE_SLB 0xEC
319#define SML_ATT_NVRAM_ACCESS_ID_RESET_SLB 0xEB
320#define SML_ATT_NVRAM_ACCESS_ID_UNLOCK_EXPIRE 0xEA
321#define SML_ATT_TIMEOUT_PERIODIC_CHECK (KAL_TICKS_1_SEC*10)//(12*60*KAL_TICKS_1_MIN) /* 12 hours */
322
323typedef struct {
324 kal_uint8 version[SML_ATT_SIZE_OF_VERSION]; /* 4 */
325 kal_uint8 protection_scheme; /* 1 */
326 kal_uint8 state; /* 1 */
327 kal_uint8 length[SML_ATT_SIZE_OF_LENGTH]; /* 2 */
328 kal_uint8 num_of_plmn[SML_ATT_SIZE_OF_NUM_PLMN]; /* 2 */
329 kal_uint8 plmn_list[SML_ATT_SIZE_OF_PLMN_LIST]; /* N = 4 x plmn count */
330 kal_uint8 num_of_gid[SML_ATT_SIZE_OF_NUM_GID]; /* 2 */
331 kal_uint8 gid_list[SML_ATT_SIZE_OF_GID_LIST]; /* M = 2 x gid count */
332 kal_uint8 reserved[SML_ATT_SIZE_OF_RESERVED]; /* 2 */
333 kal_uint8 start_time[SML_ATT_SIZE_OF_START_TIME]; /* 8 */
334 kal_uint8 end_time[SML_ATT_SIZE_OF_END_TIME]; /* 4 */
335 kal_uint8 imei[SML_ATT_SIZE_OF_IMEI]; /* 16 */
336 kal_uint8 verification_code[SML_ATT_SIZE_OF_VERIFICATION_CODE]; /* 256 */
337 kal_uint8 unlock_time[SML_ATT_SIZE_OF_UNLOCK_TIME]; /* 4 */
338} sml_att_context_struct; /* 42 + N + M + 256 + 4*/
339typedef sml_att_context_struct nvram_sml_att_context_struct;
340
341typedef struct {
342 kal_uint8 major_version;
343 kal_uint8 minor_version;
344 kal_uint8 protection_algorithm;
345 kal_uint8 lock_operation;
346 kal_uint8 imei[SML_SL_BLOB_IMEI_SIZE]; /* 15 */
347 kal_uint8 time_stamp[SML_SL_BLOB_TIME_STAMP_SIZE]; /* 8 */
348 kal_uint8 length[SML_SL_BLOB_LENGTH_SIZE]; /* 2 */
349 sml_sl_blob_meta_struct cat[SML_SL_BLOB_CONFIG_SUPPORT_CAT_SIZE]; /* (3 * 2) */
350 sml_sl_blob_key_struct key[SML_SL_BLOB_CONFIG_SUPPORT_CAT_SIZE]; /* (3 * 52) */
351 kal_uint8 code_cat_n[SML_SL_BLOB_CAT_N_SIZE]; /* (30 * 6) */
352 kal_uint8 code_cat_ns[SML_SL_BLOB_CAT_NS_SIZE]; /* (10 * 8) */
353 kal_uint8 code_cat_sp[SML_SL_BLOB_CAT_SP_SIZE]; /* (10 * 7) */
354 kal_uint8 signature[SML_SL_BLOB_SIZE_OF_SIGNATURE]; /* 256 */
355} sml_sl_blob_context_struct;
356typedef sml_sl_blob_context_struct nvram_sml_sl_blob_context_struct;
357
358typedef struct {
359 kal_uint8 public_key_mod[SML_SL_PUBLIC_KEY_MOD_SIZE]; /* 256 */
360 kal_uint8 public_key_exp[SML_SL_PUBLIC_KEY_EXP_SIZE]; /* 3 */
361} sml_sl_odm_data_struct;
362typedef sml_sl_odm_data_struct nvram_sml_sl_odm_data_struct;
363
364typedef enum
365{
366 SML_INPUT_FORMAT_CATKEY_UNKNOWN,
367 SML_INPUT_FORMAT_CATKEY_BCD,
368 SML_INPUT_FORMAT_CATKEY_ASCII,
369} sml_input_format_of_catkey_for_algo_enum;
370
371
372typedef struct {
373 kal_uint8 max_retry_count[SML_SUPPORT_CAT_SIZE];
374} sml_max_retry_count_struct;
375typedef sml_max_retry_count_struct nvram_sml_max_retry_count_struct;
376
377typedef struct {
378 kal_uint8 major_version;
379 kal_uint8 minor_version;
380 kal_uint8 device_lock_state;
381 kal_uint8 imei[SML_GBLOB_TOTAL_IMEI_SIZE]; /* 15 * 4 */
382 kal_uint8 sml_lock_type;
383 kal_uint8 sml_lock_sub_type[SML_GBLOB_SUB_RULE_SIZE];
384#if GBLOB_LID_VER >= 3
385 kal_uint8 cust_code; /* sml_lock_cust_code_enum */
386 kal_uint8 cust_rule; /* sml_lock_cust_rule_enum */
387#endif
388 kal_uint8 tlv_data[SML_GBLOB_TLV_DATA_SIZE]; /* 256 */
389 kal_uint8 dev_protection_algo;
390 kal_uint8 dev_max_retry_cnt[SML_GBLOB_SIZE_OF_MRC]; /* 4 */
391 kal_uint8 dev_remain_retry_cnt[SML_GBLOB_SIZE_OF_MRC]; /* 4 */
392 kal_uint8 device_interation_cnt[SML_GBLOB_SIZE_OF_DEV_INTCNT]; /* 4 */
393 kal_uint8 device_salt[SML_GBLOB_SIZE_OF_DEV_SALT]; /* 32 */
394 kal_uint8 device_hck[SML_GBLOB_SIZE_OF_DEV_HCK]; /* 64 */
395 kal_uint8 sig_protection_algo;
396 kal_uint8 signature[SML_GBLOB_SIZE_OF_SIGNATURE]; /* 256 */
397} sml_gblob_s_context_struct;
398typedef sml_gblob_s_context_struct nvram_sml_gblob_s_context_struct;
399
400typedef struct {
401 kal_uint8 key[SML_GBLOB_SIZE_OF_PACKAGE_KEY]; /* 1024 */
402} sml_gblob_key_s_context_struct;
403typedef sml_gblob_key_s_context_struct nvram_sml_gblob_key_s_context_struct;
404
405/* For converting R1 SML structure to R2 */
406typedef struct {
407 kal_uint8 state; /* sml_state_enum */
408 kal_uint8 retry_count; /* SML_RETRY_COUNT_X_CAT */
409 kal_uint8 autolock_count; /* SML_AUTOLOCK_NUM_X_CAT */
410 kal_uint8 num; /* num of valid sets */
411} sml_category_meta_r1_struct;
412
413typedef struct {
414 kal_uint8 state; /* Default Value or NULL */
415 kal_uint8 key[8]; //actual data length is SML_MAX_SUPPORT_KEY_LEN
416} sml_control_key_r1_struct;
417
418typedef struct {
419 kal_uint32 magic_head; /* 4 */
420 sml_category_meta_r1_struct cat[SML_SUPPORT_CAT_SIZE]; /* (4 * 7) */
421 sml_control_key_r1_struct key[SML_SUPPORT_CAT_SIZE]; /* (9 * 7) */
422 kal_uint8 code_cat_n[SML_CFG_CAT_N_SIZE]; /* (30 * 3)*/
423 kal_uint8 code_cat_ns[SML_CFG_CAT_NS_SIZE]; /* (30 * 4)*/
424 kal_uint8 code_cat_sp[SML_CFG_CAT_SP_SIZE]; /* (30 * 4)*/
425 kal_uint8 code_cat_c[SML_CFG_CAT_C_SIZE]; /* (30 * 5)*/
426 kal_uint8 code_cat_sim[SML_CFG_CAT_SIM_SIZE]; /* (30 * 8)*/
427 kal_uint8 code_cat_ns_sp[SML_CFG_CAT_NS_SP_SIZE]; /* (5 * 10)*/
428 kal_uint8 code_cat_sim_c[SML_CFG_CAT_SIM_C_SIZE]; /* (10 * 10)*/
429 kal_uint8 range_cat_ns[SML_CAT_NS_RANGE_SIZE]; /* 2 */
430 kal_uint32 magic_tail; /* 4 */
431} sml_r1_context_struct; /* 971 */
432
433typedef struct {
434 kal_uint8 version[SML_TMO_SIZE_OF_VERSION]; /* 4 */
435 kal_uint8 protection_scheme; /* 1 */
436 kal_uint8 state; /* 1 */
437 kal_uint8 length[SML_TMO_SIZE_OF_LENGTH]; /* 2 */
438 kal_uint8 num_of_plmn[SML_TMO_SIZE_OF_NUM_PLMN]; /* 2 */
439 kal_uint8 plmn_list[SML_TMO_SIZE_OF_PLMN_LIST]; /* N = 4 x plmn count */
440 kal_uint8 num_of_gid[SML_TMO_SIZE_OF_NUM_GID]; /* 2 */
441 kal_uint8 gid_list[SML_TMO_SIZE_OF_GID_LIST]; /* M = 2 x gid count */
442 kal_uint8 reserved[SML_TMO_SIZE_OF_RESERVED]; /* 2 */
443 kal_uint8 start_time[SML_TMO_SIZE_OF_START_TIME]; /* 8 */
444 kal_uint8 end_time[SML_TMO_SIZE_OF_END_TIME]; /* 4 */
445 kal_uint8 imei[SML_TMO_SIZE_OF_IMEI]; /* 16 */
446 kal_uint8 verification_code[SML_TMO_SIZE_OF_VERIFICATION_CODE]; /* 256 */
447 kal_uint8 unlock_time[SML_TMO_SIZE_OF_UNLOCK_TIME]; /* 4 */
448} sml_tmo_context_struct; /* 42 + N + M + 256 + 4*/
449typedef sml_tmo_context_struct nvram_sml_tmo_context_struct;
450
rjw6c1fd8f2022-11-30 14:33:01 +0800451extern const nvram_sml_tmo_context_struct NVRAM_EF_SML_TMO_DEFAULT;
452extern const nvram_sml_att_context_struct NVRAM_EF_L4_SML_ATT_DEFAULT;
rjw6c1fd8f2022-11-30 14:33:01 +0800453
454
455typedef struct {
456 kal_uint32 nonce_length;
457 kal_uint8 nonce[256];
458} sml_uulk_nonce_struct;
459typedef sml_uulk_nonce_struct nvram_ef_sml_nonce_struct;
460
461typedef struct {
462 kal_uint8 unlock_code;
463} sml_uulk_unlock_code_struct;
464typedef sml_uulk_unlock_code_struct nvram_ef_sml_unlock_code_struct;
465
466typedef struct {
467 kal_uint32 signature_length;
468 kal_uint8 signature[256];
469} sml_uulk_signature_struct;
470typedef sml_uulk_signature_struct nvram_ef_sml_signature_struct;
471
472
473/* The maximum size of Response Message according VZW RSU SPEC is
474 major version :1 byte
475 minor version :1 byte
476 protection alg :1 byte
477 network lock op :1 byte
478 imei :15 bytes
479 timestamp :8 bytes
480 length :2 bytes (size of following fields, including Signature)
481 category lock data :? bytes
482 signature :256 bytes
483
484 possible maximum length is (1+1+1+1+15+8+2+65535)
485*/
486#define MAX_VZW_RSU_RSP_SIZE 1024
487
488typedef enum {
489 SML_VZW_RSU_UNLOCK_TIMER_SUCCESS = 0,
490 SML_VZW_RSU_UNLOCK_TIMER_FAIL = 1,
491 SML_VZW_RSU_UNLOCK_TIMER_EXPIRED = 3, //defined by VZW RSU SPEC
492} sml_vzw_rsu_unlock_timer_resp_enum;
493
494typedef enum {
495 SML_ES_ID_VZW_RSU,
496 SML_ES_ID_TMO_PERIODIC_CHECK, //shall be equal to SML_TMO_TIMER_INDEX_PERIODIC_CHECK
497 SML_ES_ID_PENALTY_TIMER,
498 SML_ES_ID_MAX_NUM
499} sml_es_id_enum;
500
501typedef enum {
502 SMU_VZW_RSU_STOP_DELAY_TIMER,
503 SMU_VZW_RSU_START_DELAY_TIMER
504} smu_vzw_rsu_delay_timer_op_enum;
505
506typedef enum {
507 SML_VZW_DISALLOW_TEMP_UNLOCK_CAUSE_NONE,
508 SML_VZW_DISALLOW_TEMP_UNLOCK_HAS_EXPIRED,
509 SML_VZW_DISALLOW_TEMP_UNLOCK_HAS_STARTED,
510} sml_vzw_rsu_disallow_temp_unlock_cause_enum;
511
512
513#ifdef __CARRIER_RESTRICTION__
514
515/* Carrier Restriction */
516/* Basic unit of categories */
517#define SMU_CARRIER_MATCH_SIZE_OF_CAT_N 3 /* MCC/MNC */
518#define SMU_CARRIER_MATCH_SIZE_OF_CAT_SPN 23 /* MCC/MNC + SPN(20) */
519#define SMU_CARRIER_MATCH_SIZE_OF_CAT_IMSI_PREFIX 4 /* MCC/MNC + HLR */
520#define SMU_CARRIER_MATCH_SIZE_OF_CAT_GID1 4 /* MCC/MNC + GID1 */
521#define SMU_CARRIER_MATCH_SIZE_OF_CAT_GID2 4 /* MCC/MNC + GID2 */
522
523/* Define the maximum supported categories */
524#define SMU_CARRIER_MATCH_MAX_SUPPORT_CAT_N 5
525#define SMU_CARRIER_MATCH_MAX_SUPPORT_CAT_SPN 5
526#define SMU_CARRIER_MATCH_MAX_SUPPORT_CAT_IMSI_PREFIX 5
527#define SMU_CARRIER_MATCH_MAX_SUPPORT_CAT_GID1 5
528#define SMU_CARRIER_MATCH_MAX_SUPPORT_CAT_GID2 5
529
530/* Define the total size of each category */
531#define SMU_CARRIER_MATCH_CFG_CAT_N_SIZE (SMU_CARRIER_MATCH_MAX_SUPPORT_CAT_N * SMU_CARRIER_MATCH_SIZE_OF_CAT_N)
532#define SMU_CARRIER_MATCH_CFG_CAT_SPN_SIZE (SMU_CARRIER_MATCH_MAX_SUPPORT_CAT_SPN * SMU_CARRIER_MATCH_SIZE_OF_CAT_SPN)
533#define SMU_CARRIER_MATCH_CFG_CAT_IMSI_PREFIX_SIZE (SMU_CARRIER_MATCH_MAX_SUPPORT_CAT_IMSI_PREFIX * SMU_CARRIER_MATCH_SIZE_OF_CAT_IMSI_PREFIX)
534#define SMU_CARRIER_MATCH_CFG_CAT_GID1_SIZE (SMU_CARRIER_MATCH_MAX_SUPPORT_CAT_GID1 * SMU_CARRIER_MATCH_SIZE_OF_CAT_GID1)
535#define SMU_CARRIER_MATCH_CFG_CAT_GID2_SIZE (SMU_CARRIER_MATCH_MAX_SUPPORT_CAT_GID2 * SMU_CARRIER_MATCH_SIZE_OF_CAT_GID2)
536
537/* Define the support category size */
538#define SMU_CARRIER_MATCH_SUPPORT_CAT_SIZE 5 /* SMU_CARRIER_MATCH_CAT_SIZE in sml_carrier_match_cat_enum */
539
540typedef enum {
541 SMU_CARRIER_MATCH_CAT_N,
542 SMU_CARRIER_MATCH_CAT_SPN,
543 SMU_CARRIER_MATCH_CAT_IMSI_PREFIX,
544 SMU_CARRIER_MATCH_CAT_GID1,
545 SMU_CARRIER_MATCH_CAT_GID2,
546 SMU_CARRIER_MATCH_CAT_SIZE
547} smu_carrier_match_cat_enum;
548
549/* General lock structure */
550typedef struct {
551 kal_uint8 num; /* num of valid sets */
552} smu_carrier_match_category_meta_struct;
553
554/* General control key structure */
555typedef struct {
556 kal_uint8 state;
557 kal_uint8 algo;
558 kal_uint32 max_retry_count;
559 kal_uint32 retry_count;
560 kal_uint8 salt[NVRAM_SML_S_MAX_SUPPORT_SALT_LEN];
561 kal_uint8 iter_cnt[NVRAM_SML_S_MAX_SUPPORT_INTER_CNT_LEN];
562 kal_uint8 key[NVRAM_SML_S_MAX_SUPPORT_HCK_LEN];
563} smu_carrier_match_control_key_struct;
564
565typedef enum {
566 SMU_CARRIER_RESTRICTION_ENABLED,
567 SMU_CARRIER_RESTRICTION_DISABLED
568} smu_carrier_restriction_state_enum;
569
570typedef enum {
571 SMU_CARRIER_RESTRICTION_MULTI_SIM_POLICY_NONE,
572 SMU_CARRIER_RESTRICTION_ONE_VALID_SIM_MUST_BE_PRESENT
573} smu_carrier_restriction_multi_sim_policy_enum;
574
575typedef struct {
576 smu_carrier_match_category_meta_struct cat[SMU_CARRIER_MATCH_SUPPORT_CAT_SIZE]; /* (5 * 1) */
577 kal_uint8 code_cat_n[SMU_CARRIER_MATCH_CFG_CAT_N_SIZE]; /* (5 * 3) */
578 kal_uint8 code_cat_spn[SMU_CARRIER_MATCH_CFG_CAT_SPN_SIZE]; /* (5 * 23)*/
579 kal_uint8 code_cat_imsi_prefix[SMU_CARRIER_MATCH_CFG_CAT_IMSI_PREFIX_SIZE]; /* (5 * 4)*/
580 kal_uint8 code_cat_gid1[SMU_CARRIER_MATCH_CFG_CAT_GID1_SIZE]; /* (5 * 4)*/
581 kal_uint8 code_cat_gid2[SMU_CARRIER_MATCH_CFG_CAT_GID2_SIZE]; /* (5 * 4)*/
582}smu_carrier_restriction_list_struct;
583
584typedef struct {
585 kal_uint32 magic_head;
586 smu_carrier_match_control_key_struct key;
587 smu_carrier_restriction_list_struct black_list;
588 smu_carrier_restriction_list_struct white_list;
589 kal_uint8 allow_all;
590 smu_carrier_restriction_state_enum carrier_rest_state;
591 kal_uint8 allowed_carriers_prioritized;
592 kal_uint8 multi_sim_policy;
593 kal_uint32 magic_tail;
594} smu_carrier_match_context_struct;
595typedef smu_carrier_match_context_struct nvram_smu_carrier_match_context_struct;
596
597typedef enum
598{
599 CRRST_INPUT_FORMAT_CATKEY_UNKNOWN,
600 CRRST_INPUT_FORMAT_CATKEY_BCD,
601 CRRST_INPUT_FORMAT_CATKEY_ASCII,
602} crrst_input_format_of_catkey_for_algo_enum;
603
604/* carrier restriction: magic numbers of file header and tail */
605#define SML_CARRIER_RESTRICTION_MAGIC_HEAD_VALUE (sizeof(smu_carrier_match_context_struct))
606#define SML_CARRIER_RESTRICTION_MAGIC_TAIL_VALUE 0x26598088
607
608#endif /* __CARRIER_RESTRICTION__ */
609
610#ifdef __MBIM_MS_NETWORK_BLACKLIST__
611#define MAX_NW_BLACK_LIST 50
612
613#define SML_MS_SIM_BLACK_LIST_SIZE (MAX_NW_BLACK_LIST*3)
614
615typedef struct {
616 kal_uint8 num_of_black_list;
617 kal_uint8 black_list[SML_MS_SIM_BLACK_LIST_SIZE];
618}smu_ms_sim_black_list_context_struct;
619typedef smu_ms_sim_black_list_context_struct nvram_smu_ms_sim_black_list_context_struct;
620#endif
621#endif /* SML_PUBLIC_DEF_H */