Gitiles
Code Review Sign In
192.168.1.100 / T800_MD / 1eb8f53f94c145708b5ea2c6b9b96ea3d613f607 / . / mcu / custom / system / Template / custom_scatstruct.h.template
blob: 8a80c28dc2fcbb4acd6823766ed623899fd803ed [file] [log] [blame]
rjw6c1fd8f2022-11-30 14:33:01 +0800[diff] [blame]1/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2006
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36/*****************************************************************************
37 *
38 * Filename:
39 * ---------
40 * custom_scatstruct.h
41 *
42 * Project:
43 * --------
44 * Maui_Software
45 *
46 * Description:
47 * ------------
48 * This file declares the scatter file dependent APIs
49 *
50 * Author:
51 * -------
52 * Claudia Lo (mtk01876) [AUTOGEN_GenVersion]
53 *
54 *============================================================================
55 * HISTORY
56 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
57 *------------------------------------------------------------------------------
58 * $Revision$
59 * $Modtime$
60 * $Log$
61 *
62 * 09 03 2020 yao.liu
63 * [MOLY00566717] [Gen97] Add a function to query if the region is on EMI.
64 * [NR15.R3.MP] Add an API to query if the region is on EMI.
65 *
66 * 12 03 2019 yao.liu
67 * [MOLY00463184] [System Service][MOLY Kernel Internal Request] Enhance exception flow security
68 * [VMOLY] Add custom_query_MCURO_HWRW_region API for exception.
69 *
70 * 09 03 2019 yao.liu
71 * [MOLY00434510] Memory Dump 2.0
72 * [VMOLY] Memory dump 2.0 - SYS_MEM part.
73 *
74 * 04 29 2019 yao.liu
75 * [MOLY00383168] [System Service][MOLY Kernel Internal Request] Merge minidump code from UMOLYE to VMOLY
76 * [VMOLY] Porting mini dump.
77 *
78 * 10 22 2018 tero.jarkko
79 * [MOLY00356148] [Gen97][SystemService][AutoGen]Provided SIB area query API
80 *
81 * .
82 *
83 * 10 18 2018 tero.jarkko
84 * [MOLY00359671] [Gen97][SystemService][AutoGen]SS_EXT_CSIF and NL1_EXT_CSIF API implementation
85 *
86 * .
87 *
88 * 09 28 2018 tero.jarkko
89 * [MOLY00356148] [Gen97][SystemService][AutoGen]Provided SIB area query API
90 *
91 * .
92 *
93 * 05 04 2017 carl.kao
94 * [MOLY00246779] [BIANCO] Enable ASM addon,SWTR and stream mode
95 * Remove unused API : custom_get_MaxAvailableMemorySegment
96 *
97 * 04 07 2017 carl.kao
98 * [MOLY00240094] [Gen93] [SystemService] [Auto-Gen] Refine setting of EMI RMPU for Gen93
99 * .
100 *
101 * 02 24 2016 tero.jarkko
102 * [MOLY00164073] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Generate custom_scatstruct.c using sysGen2
103 *
104 * Added L2SRAM_L2NC and L2SRAM_L2C functions
105 *
106 * 02 18 2016 tero.jarkko
107 * [MOLY00165076] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Support custom_query_dynamic_code_region
108 *
109 * .
110 *
111 * 02 16 2016 tero.jarkko
112 * [MOLY00165076] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Support custom_query_dynamic_code_region
113 *
114 * .
115 *
116 * 02 04 2016 tero.jarkko
117 * [MOLY00164073] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Generate custom_scatstruct.c using sysGen2
118 *
119 * custom_ram_mk_info
120 *
121 * 02 03 2016 tero.jarkko
122 * [MOLY00164073] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Generate custom_scatstruct.c using sysGen2
123 *
124 * L2SRAM_L2NC base and length functions added
125 *
126 * 02 02 2016 tero.jarkko
127 * [MOLY00164073] [LR12][SystemService][Auto-Gen] [Internal Refinement][MT6292] [sysGen2] Generate custom_scatstruct.c using sysGen2
128 *
129 * .
130 *
131 * 01 18 2016 carl.kao
132 * [MOLY00159955] [LR12][SystemService][Auto-Gen] remove core 3 SPRAM and make SPRAM APIs more robust
133 * .
134 *
135 * 01 12 2016 qmei.yang
136 * [MOLY00151351] [SystemService][DebuggingSuite][Internal Refinement][92] Support full exception flow framework
137 *
138 * .
139 *
140 * 01 11 2016 qmei.yang
141 * [MOLY00151351] [SystemService][DebuggingSuite][Internal Refinement][92] Support full exception flow framework
142 * .
143 *
144 * 11 12 2015 carl.kao
145 * [MOLY00148842] [LR12][SystemService][Auto-Gen] 92 lds, for Full region ready, Code in Right Location
146 * Support VoLTE core section
147 *
148 * 11 11 2015 carl.kao
149 * [MOLY00148842] [LR12][SystemService][Auto-Gen] 92 lds, for Full region ready, Code in Right Location
150 * New image layout for "Full region ready, Code in Right Location"
151 *
152 * 07 03 2015 carl.kao
153 * [MOLY00125736] [MT6755][BRINGUP_FIRSTCALL] [SystemService][Auto-Gen] add custom_get_L1CORE_INTSRAM_Base and custom_get_L1CORE_INTSRAM_End
154 * get l1core tcm base and length
155 *
156 * 06 15 2015 carl.kao
157 * [MOLY00121235] [TK6291] [SystemService][Auto-Gen][Request For Design Change] Query TCM base and end address
158 * .
159 *
160 * 04 16 2015 carl.kao
161 * [MOLY00106652] [TK6291] [SystemService][Auto-Gen] add a dynamic switchable default cached MCU-RW, HW-RW section
162 * add 4 sections for EMI RMPU
163 * 1) (MCU RO, MDHW RW) DNC
164 * 2) (MCU RO, MDHW RW) NC
165 * 3) (MCU RW, MDHW RW) DNC
166 * 4) (MCU RW, MDHW RW) NC
167 *
168 * 02 24 2015 qmei.yang
169 * [MOLY00096717] [SystemService][DebuggingSuite][Internal Refinement] Support to dump l1core l2sram
170 * .
171 *
172 * 12 23 2014 carl.kao
173 * [MOLY00088578] [TK6291] [SystemService] [Auto-Gen] Support L2SRAM section (in L1CORE)
174 * aa.
175 *
176 * 12 22 2014 carl.kao
177 * [MOLY00087532] [Denali-1] [SystemService][Auto-Gen] Refactor AutoGen Code and Remove Legacy Code
178 * .
179 *
180 * 12 22 2014 carl.kao
181 * [MOLY00087532] [Denali-1] [SystemService][Auto-Gen] Refactor AutoGen Code and Remove Legacy Code
182 * .
183 * 11 06 2014 carl.kao
184 * [MOLY00083492] [TK6291] [SystemService][Auto-Gen][Request For Design Change] Add custom_get_MD_RAMEnd() for MPU
185 * Add custom_get_MD_RAMEnd() for PCORE MPU
186 *
187 * 11 06 2014 carl.kao
188 * [MOLY00083492] [TK6291] [SystemService][Auto-Gen][Request For Design Change] Add custom_get_MD_RAMEnd() for MPU
189 * .
190 *
191 * 09 11 2014 qmei.yang
192 * [MOLY00078623] [SystemService][DebuggingSuite][Internal Refinement][MT6291] Support memory dump
193 * .
194 *
195 * 08 27 2014 carl.kao
196 * [MOLY00077388] [MT6291] [SystemService][Auto-Gen][Request For Design Change] Support multi-core exception
197 * fix build fail
198 *
199 * 07 31 2014 carl.kao
200 * [MOLY00074124] [SystemService][DebuggingSuite][MT6291] Support multi-core exception
201 * dump L1CORE region by PCORE
202 *
203 * 04 07 2014 carl.kao
204 * [MOLY00061797] [SYSTEM SERVICE] porting features from U3G_TK6280_DEV and MOLY.U3G.90IT.DEV branches
205 * fix build error in config lib
206 *
207 * 04 07 2014 carl.kao
208 * [MOLY00061797] [SYSTEM SERVICE] porting features from U3G_TK6280_DEV and MOLY.U3G.90IT.DEV branches
209 * 9) Rename "l1dsp" to "l1core", "L1DSP" to "L1CORE"
210 *
211 * 04 02 2014 carl.kao
212 * [MOLY00061134] [SYSTEM SERVICE][AutoGen] AutoGen for MT6291
213 * 1) pcore sysGen2.
214 * 2) Remove useless secure region query API
215 *
216 * 02 25 2014 qmei.yang
217 * [MOLY00057421] [SystemService][Auto-Gen][Internal Refinement] Remove useless secure region query api
218 * .
219 *
220 * 06 25 2013 qmei.yang
221 * [MOLY00025806] [SystemService][Auto-Gen][Request For Design Change] Support COPRO
222 * support COPRO_arm7's L1Cache
223 *
224 * 04 26 2013 qmei.yang
225 * [MOLY00020542] [SystemService][MOLY] To remove useless input sections by the request
226 * support SWLA space as well
227 *
228 * 10 31 2012 qmei.yang
229 * [MOLY00005605] [SystemService][Auto-Gen][Request For Design Change][sysgen2] Create new API: custom_get_DSPTXRX_MaxSize()
230 * .
231 *
232 * 08 27 2012 qmei.yang
233 * [MOLY00001774] [SystemService][Region_Init][Internal Refinement] Support MT6577 region init and remove useless regions and compile option
234 * .
235 *
236 * 05 10 2012 qmei.yang
237 * [MAUI_03182425] [Reason]sync codes between modem_dev and 11B
238 * .
239 *
240 * 03 08 2012 qmei.yang
241 * [MAUI_03145378] [SystemService][Auto-Gen][Sys Gen][scatGen][Internal Refinement] Phase in AutoGen new flow to support GCC
242 * .
243 *
244 * 02 15 2012 qmei.yang
245 * [MAUI_03130553] [SystemService][Auto-Gen][Sys Gen][scatGen][Internal Refinement] Support cmmgen sync with sysgen2
246 * Modify custom_query_dump_region() API
247 *
248 * 01 30 2012 qmei.yang
249 * [MAUI_03120516] [SystemService][Auto-Gen][Sys Gen][scatGen][Internal Refinement] Refactory sysgen2.pl
250 *
251 *------------------------------------------------------------------------------
252 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
253 *============================================================================
254 ****************************************************************************/
255
256#ifndef _CUSTOM_SCATSTRUCT_H
257#define _CUSTOM_SCATSTRUCT_H
258
259#include "kal_general_types.h"
260#include "init.h"
261
262typedef enum
263{
264 DUMP_OP_NONE = 0,
265 DUMP_OP_CORE0_CACHE = 1,
266 DUMP_OP_CORE1_CACHE = 2,
267 DUMP_OP_CORE2_CACHE = 3,
268 DUMP_OP_CORE3_CACHE = 4,
269} DUMP_OP_T;
270
271typedef enum
272{
273 DC_ISPRAM0 = 0,
274 DC_ISPRAM1,
275 DC_ISPRAM2,
276 DC_L2SRAM,
277 DC_MEM_MAX,
278} DYNAMIC_CODE_MEM_T;
279
280
281typedef enum
282{
283 EMI_MPU_INVALIDE = 0,
284 EMI_MPU_MDMCU_NO_ACCESS = 10,
285 EMI_MPU_MDMCU_RO,
286 EMI_MPU_MDMCU_RW,
287 EMI_MPU_MDMCU_MAX,
288 EMI_MPU_MDHW_NO_ACCESS = 20,
289 EMI_MPU_MDHW_RO,
290 EMI_MPU_MDHW_RW,
291 EMI_MPU_MDHW_MAX,
292} EMI_MPU_REGION_ATTRIBUTE;
293
294
295typedef struct DYNAMIC_CODE_REGION_INFO_STRUCT
296{
297 kal_uint32 addr;
298 kal_uint32 load_addr;
299 kal_uint32 len;
300} DYNAMIC_CODE_REGION_INFO_T;
301
302
303typedef struct EMI_MPU_REGION_INFO_STRUCT
304{
305 kal_uint32 addr;
306 kal_uint32 len;
307 EMI_MPU_REGION_ATTRIBUTE mdmcu_attr;
308 EMI_MPU_REGION_ATTRIBUTE mchw_attr;
309} EMI_MPU_REGION_INFO_T;
310
311
312#if defined (__MTK_TARGET__)
313 #define __TCMROCODE __attribute__ ((section ("INTSRAM_ROCODE")))
314 #define __TCMRODATA __attribute__ ((section ("INTSRAM_RODATA")))
315 #define __TCMRW __attribute__ ((section ("INTSRAM_RW")))
316 #define __TCMZI __attribute__ ((zero_init, section ("INTSRAM_ZI")))
317 #define __PT_Aligned(x) __attribute__ ((section("PAGETABLE"), aligned(x)))
318 #define __NONCACHEDZI __attribute__ ((zero_init, section ("NONCACHEDZI")))
319 #define __NONCACHEDZI_MCURW_HWRW __attribute__ ((section ("MCURW_HWRW_NC_ZI")))
320#else
321 #define __TCMROCODE
322 #define __TCMRODATA
323 #define __TCMRW
324 #define __TCMZI
325 #define __PT_Aligned(x)
326 #define __NONCACHEDZI
327 #define __NONCACHEDZI
328#endif
329
330#ifdef __MTK_TARGET__
331#define DUMP_REGION_COUNT [AUTOGEN_SCAT_H_Gen_DUMP_REGION_COUNT]
332extern kal_uint32 custom_query_dump_region(EXTSRAM_REGION_INFO_T* region);
333extern kal_uint32 custom_query_dump_region_without_UC_ROM(EXTSRAM_REGION_INFO_T* region);
334extern kal_uint32 custom_query_dump_region_ROM(EXTSRAM_REGION_INFO_T* region);
335extern kal_uint32 custom_query_dump_region_PA(EXTSRAM_REGION_INFO_T* region);
336extern kal_uint32 custom_query_dump_region_VA(EXTSRAM_REGION_INFO_T* region);
337extern kal_uint8 custom_get_dump_info(kal_uint32 *address);
338
339#if defined(__ARM9_MMU__) || defined(__ARM11_MMU__)
340#if defined(__ARM9_MMU__)
341extern kal_int32 custom_query_fpt_pool(kal_uint32 **pool, kal_uint32 *pool_size);
342#endif /* __ARM9_MMU__ */
343extern kal_int32 custom_query_cpt_pool(kal_uint32 **pool, kal_uint32 *pool_size);
344#endif /* __ARM9_MMU__ || __ARM11_MMU__ */
345
346#if defined(__DYNAMIC_SWITCH_CACHEABILITY__)
347extern kal_int32 custom_query_dynamic_cached_extsram_default_nc_region(EXTSRAM_REGION_INFO_T **region);
348extern kal_int32 custom_query_dynamic_cached_extsram_default_c_region(EXTSRAM_REGION_INFO_T **region);
349extern kal_int32 custom_query_cached_extsram_region(EXTSRAM_REGION_INFO_T **region);
350extern kal_int32 custom_query_cached_extsram_code_region(EXTSRAM_REGION_INFO_T **region);
351extern kal_int32 custom_query_noncached_extsram_region(EXTSRAM_REGION_INFO_T **region);
352extern kal_int32 custom_query_noncached_extsram_ro_region(EXTSRAM_REGION_INFO_T **region);
353#endif /* __DYNAMIC_SWITCH_CACHEABILITY__ */
354
355
356#if defined(__DSP_FCORE4__)
357extern kal_int32 custom_query_mcu_cacheable_dsp_cacheable_region(EXTSRAM_REGION_INFO_T **region);
358extern kal_int32 custom_query_mcu_cacheable_dsp_noncacheable_region(EXTSRAM_REGION_INFO_T **region);
359extern kal_int32 custom_query_mcu_noncacheable_dsp_cacheable_region(EXTSRAM_REGION_INFO_T **region);
360extern kal_int32 custom_query_mcu_noncacheable_dsp_noncacheable_region(EXTSRAM_REGION_INFO_T **region);
361#endif /* __DSP_FCORE4__ */
362
363extern kal_uint32 custom_get_1st_ROM_ROMBase(void);
364extern kal_uint32 custom_get_1st_ROM_ROMLength(void);
365extern kal_uint32 custom_get_1st_ROM_RAMBase(void);
366extern kal_uint32 custom_get_1st_ROM_RAMLength(void);
367extern kal_uint32 custom_get_1st_ROM_RAMEnd(void);
368extern kal_uint32 custom_get_1st_ROM_LoadEnd(void);
369
370
371extern kal_status custom_get_ISPRAM_Load_Base(kal_uint8 core_id, kal_uint32 *ret_addr);
372extern kal_status custom_get_ISPRAM_CODE_Base(kal_uint8 core_id, kal_uint32 *ret_addr);
373extern kal_status custom_get_ISPRAM_CODE_End(kal_uint8 core_id, kal_uint32 *ret_addr);
374extern kal_status custom_get_ISPRAM_Base(kal_uint8 core_id, kal_uint32 *ret_addr);
375extern kal_status custom_get_ISPRAM_End(kal_uint8 core_id, kal_uint32 *ret_addr);
376
377extern kal_status custom_get_DSPRAM_Load_Base(kal_uint8 core_id, kal_uint32 *ret_addr);
378extern kal_status custom_get_DSPRAM_DATA_Base(kal_uint8 core_id, kal_uint32 *ret_addr);
379extern kal_status custom_get_DSPRAM_DATA_End(kal_uint8 core_id, kal_uint32 *ret_addr);
380extern kal_status custom_get_DSPRAM_DATA_ZI_Base(kal_uint8 core_id, kal_uint32 *ret_addr);
381extern kal_status custom_get_DSPRAM_DATA_ZI_End(kal_uint8 core_id, kal_uint32 *ret_addr);
382extern kal_status custom_get_DSPRAM_Base(kal_uint8 core_id, kal_uint32 *ret_addr);
383extern kal_status custom_get_DSPRAM_End(kal_uint8 core_id, kal_uint32 *ret_addr);
384
385extern kal_bool custom_query_code_region(kal_uint32 code_addr, kal_uint32 core_id);
386extern kal_bool custom_query_MCURO_HWRW_region(kal_uint32 symbol_addr);
387extern kal_int32 custom_query_dynamic_code_region(DYNAMIC_CODE_MEM_T core_id,DYNAMIC_CODE_REGION_INFO_T **region);
388
389extern kal_int32 custom_get_DSPTXRX_Base(void);
390extern kal_int32 custom_get_DSPTXRX_MaxSize(void);
391extern kal_uint32 custom_get_NVRAM_LTABLE_Base(void);
392extern kal_uint32 custom_get_NVRAM_LTABLE_Length(void);
393
394extern kal_uint32 custom_get_VOLTE_CORE_ZI_base(void);
395extern kal_uint32 custom_get_VOLTE_CORE_ZI_End(void);
396
397extern kal_uint32 custom_get_L2SRAM_L2NC_CODE_base(void);
398extern kal_uint32 custom_get_L2SRAM_L2NC_CODE_load_base(void);
399extern kal_uint32 custom_get_L2SRAM_L2NC_CODE_Length(void);
400extern kal_uint32 custom_get_L2SRAM_L2NC_DATA_base(void);
401extern kal_uint32 custom_get_L2SRAM_L2NC_DATA_load_base(void);
402extern kal_uint32 custom_get_L2SRAM_L2NC_DATA_Length(void);
403extern kal_uint32 custom_get_L2SRAM_L2NC_DATA_ZI_base(void);
404extern kal_uint32 custom_get_L2SRAM_L2NC_DATA_ZI_Length(void);
405extern kal_uint32 custom_get_L2SRAM_L2C_CODE_base(void);
406extern kal_uint32 custom_get_L2SRAM_L2C_CODE_load_base(void);
407extern kal_uint32 custom_get_L2SRAM_L2C_CODE_Length(void);
408extern kal_uint32 custom_get_L2SRAM_L2C_DATA_base(void);
409extern kal_uint32 custom_get_L2SRAM_L2C_DATA_load_base(void);
410extern kal_uint32 custom_get_L2SRAM_L2C_DATA_Length(void);
411extern kal_uint32 custom_get_L2SRAM_L2C_DATA_ZI_base(void);
412extern kal_uint32 custom_get_L2SRAM_L2C_DATA_ZI_Length(void);
413extern kal_uint32 custom_query_EMI_RMPU_region_info(EMI_MPU_REGION_INFO_T **region);
414extern kal_int32 custom_get_SIB_AREA_region(EXTSRAM_REGION_INFO_T **region);
415extern kal_uint32 custom_get_SS_EXT_CSIF_Base(void);
416extern kal_uint32 custom_get_SS_EXT_CSIF_End(void);
417extern kal_uint32 custom_get_NL1_EXT_CSIF_Base(void);
418extern kal_uint32 custom_get_NL1_EXT_CSIF_End(void);
419extern kal_bool custom_query_EMI_region(kal_uint32 region_addr);
420extern kal_uint32 custom_get_MD_RAMEnd(void);
421
422
423#if defined(__ARM9_MMU__) || defined(__ARM11_MMU__) || defined(__MTK_MMU__) || defined(__CR4__) || defined(__MTK_MMU_V2__) || defined(__MIPS_IA__)
424extern kal_int32 custom_mk_ram_info(void);
425#endif /* __ARM9_MMU__ || __ARM11_MMU__ || __MTK_MMU__ || __CR4__ || __MTK_MMU_V2__ || __MIPS_IA__ */
426
427
428#endif /* __MTK_TARGET__ */
429
430#endif /* _CUSTOM_SCATSTRUCT_H */