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192.168.1.100 / T800_MD / 1eb8f53f94c145708b5ea2c6b9b96ea3d613f607 / . / mcu / driver / devdrv / auxadc / src / dcl_adc.c
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rjw6c1fd8f2022-11-30 14:33:01 +0800[diff] [blame]1/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2005
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36/*****************************************************************************
37 *
38 * Filename:
39 * ---------
40 * dcl_adc.c
41 *
42 * Project:
43 * --------
44 * Maui_Software
45 *
46 * Description:
47 * ------------
48 * This Module defines DCL (Driver Common Layer) of the ADC driver.
49 *
50 * Author:
51 * -------
52 * -------
53 *
54 *============================================================================
55 * HISTORY
56 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
57 *------------------------------------------------------------------------------
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230 *------------------------------------------------------------------------------
231 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
232 *============================================================================
233 ****************************************************************************/
234
235#include "drv_features.h"
236#include "drv_comm.h"
237#include "syscomp_config.h" /*MOD_BMT*/
238#include "kal_public_defs.h" //MSBB change #include "stack_msgs.h"
239#include "stacklib.h" /* Basic type for dll, evshed, stacktimer */
240#include "stacklib.h" /* Basic type for dll, evshed, stacktimer */
241//#include "event_shed.h" /* Event scheduler */
242//#include "stack_timer.h" /*Timer*/
243#include "adc_hw.h"
244#include "adc_sw.h"
245#include "kal_public_api.h"
246#include "dcl.h"
247#include "nvram_interface.h"
248#include "adc_nvram_def.h"
249
250#if !defined(DRV_ADC_OFF)
251
252// Variables for DCL
253#define DCL_ADC_DEV_MAGIC_NUM (0x20000000) //do not use MAGIC NUM, because it is not used in old API and callback function
254#define MAX_DCL_ADC_HANDLE (120)
255#define MAX_DCL_ADC_SCHE_ID (30)
256
257typedef struct{
258 DCL_HANDLE handle;
259#if !defined(DRV_DISABLE_SAP_ID)
260 DCL_UINT32 adc_sap_id;
261#endif
262// DCL_UINT8 adc_sche_id;
263// DCL_BOOL active;
264 kal_timer_func_ptr measure_cb;
265 PFN_DCLSADC_COMPLETE_CALLBACK complete_cb;
266}dcl_adc_sche_mgr;
267
268static kal_bool fgHADCInit = KAL_FALSE;
269
270#if 0
271/* under construction !*/
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500 #if !defined(DRV_DISABLE_SAP_ID)
501/* under construction !*/
502 #endif
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723#else
724
725DCL_STATUS DclSADC_Initialize(void){return STATUS_OK;}
726DCL_HANDLE DclSADC_Open(DCL_DEV dev, DCL_FLAGS flags){return STATUS_OK;}
727DCL_STATUS DclSADC_ReadData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN buf_len, DCL_OPTIONS options){return STATUS_OK;}
728DCL_STATUS DclSADC_WriteData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN buf_len, DCL_OPTIONS options){return STATUS_OK;}
729DCL_STATUS DclSADC_Configure(DCL_HANDLE handle, DCL_CONFIGURE_T *configure){return STATUS_OK;}
730DCL_STATUS DclSADC_RegisterCallback(DCL_HANDLE handle, DCL_EVENT event, PFN_DCL_CALLBACK callback){return STATUS_OK;}
731DCL_STATUS DclSADC_Control(DCL_HANDLE handle, DCL_CTRL_CMD cmd, DCL_CTRL_DATA_T *data){return STATUS_OK;}
732DCL_STATUS DclSADC_Close(DCL_HANDLE handle){return STATUS_OK;}
733
734#endif
735
736
737
738///////////////////////////////////////////////////////////////////////////////
739#define MAX_DCL_HADC_HANDLE (1)
740
741
742
743/*************************************************************************
744* FUNCTION
745* DclHADC_Initialize
746*
747* DESCRIPTION
748* This function is to initialize Hardware ADC module
749*
750* PARAMETERS
751* None
752*
753* RETURNS
754* STATUS_OK
755*
756*************************************************************************/
757extern nvram_ltable_entry_struct logical_data_item_table_adc[];
758extern void thermal_prot_init();
759DCL_STATUS DclHADC_Initialize(void){
760
761 dbg_print("[ADC] %s\r\n", __FUNCTION__);
762
763 if(fgHADCInit == KAL_FALSE)
764 {
765 nvram_ltable_register(logical_data_item_table_adc);
766
767 ADC_Init();
768
769 fgHADCInit = KAL_TRUE;
770 }
771
772 thermal_prot_init();
773
774 return STATUS_OK;
775}
776
777
778/*************************************************************************
779* FUNCTION
780* DclHADC_Open
781*
782* DESCRIPTION
783* This function is to open the Hardware ADC module and return a handle
784*
785* PARAMETERS
786* dev: only valid for Hardware DCL_ADC
787* flags: no sepcial flags is needed. Please use FLAGS_NONE
788*
789* RETURNS
790* DCL_HANDLE_INVALID: Open failed
791* Other value: A valid handle
792*
793*************************************************************************/
794static kal_bool fgHADCOpen = KAL_FALSE;
795DCL_HANDLE DclHADC_Open(DCL_DEV dev, DCL_FLAGS flags)
796{
797 if (!fgHADCOpen) {
798 adc_read_calibration_data();
799 fgHADCOpen = KAL_TRUE;
800 }
801
802 if( ( dev != DCL_ADC ) || (fgHADCInit == KAL_FALSE))
803 {
804 ASSERT(0);
805 return DCL_HANDLE_INVALID; // Incorrecr device ID
806 }
807
808 return DCL_ADC_DEV_MAGIC_NUM;
809}
810
811/*************************************************************************
812* FUNCTION
813* DclHADC_ReadData
814*
815* DESCRIPTION
816* This function is not supported for the ADC module now.
817*
818* PARAMETERS
819* N/A
820*
821* RETURNS
822* STATUS_UNSUPPORTED
823*
824*************************************************************************/
825DCL_STATUS DclHADC_ReadData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN buf_len, DCL_OPTIONS options)
826{
827 return STATUS_UNSUPPORTED;
828}
829
830/*************************************************************************
831* FUNCTION
832* DclHADC_WriteData
833*
834* DESCRIPTION
835* This function is not supported for the ADC module now.
836*
837* PARAMETERS
838* N/A
839*
840* RETURNS
841* STATUS_UNSUPPORTED
842*
843*************************************************************************/
844DCL_STATUS DclHADC_WriteData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN buf_len, DCL_OPTIONS options)
845{
846 return STATUS_UNSUPPORTED;
847}
848
849/*************************************************************************
850* FUNCTION
851* DclHADC_Configure
852*
853* DESCRIPTION
854* This function is not supported for the ADC module now.
855*
856* PARAMETERS
857* N/A
858*
859* RETURNS
860* STATUS_UNSUPPORTED
861*
862*************************************************************************/
863DCL_STATUS DclHADC_Configure(DCL_HANDLE handle, DCL_CONFIGURE_T *configure)
864{
865 return STATUS_UNSUPPORTED;
866}
867
868/*************************************************************************
869* FUNCTION
870* DclHADC_RegisterCallback
871*
872* DESCRIPTION
873* This function is not supported for the ADC module now.
874*
875* PARAMETERS
876* N/A
877*
878* RETURNS
879* STATUS_UNSUPPORTED
880*
881*************************************************************************/
882DCL_STATUS DclHADC_RegisterCallback(DCL_HANDLE handle, DCL_EVENT event, PFN_DCL_CALLBACK callback)
883{
884 return STATUS_UNSUPPORTED;
885}
886
887
888/*************************************************************************
889* FUNCTION
890* DclHADC_Control
891*
892* DESCRIPTION
893* This function is to send command to control the Hardware ADC module.
894*
895* PARAMETERS
896* handle: A valid handle return by DclHADC_Open()
897* cmd: A control command for ADC module
898* 1. ADC_CMD_IMM_MEASURE: to perform a immediate mode measurement (Register control only, not include power setting)
899* 2. ADC_CMD_SYNC_MEASURE: to perform a sync mode measurement (Register control only, not include power setting)
900* 3. ADC_CMD_TDMA_SYNC_SETUP: to setup TDMA sync mode parameters
901* 4. ADC_CMD_POWER: to turn on/off ADC module power
902* data: The data of the control command
903* 1. ADC_CMD_IMM_MEASURE: pointer to a ADC_CTRL_IMM_MEASURE_T structure
904* 2. ADC_CMD_SYNC_MEASURE: pointer to a ADC_CTRL_SYNC_MEASURE_T structure
905* 3. ADC_CMD_TDMA_SYNC_SETUP: pointer to a ADC_CTRL_TDMA_SYNC_SETUP_T structure
906* 4. ADC_CMD_POWER: pointer to a ADC_CTRL_POWER_T structure
907*
908* RETURNS
909* STATUS_OK: command is executed successfully.
910* STATUS_FAIL: command is failed.
911* STATUS_INVALID_CMD: It's a invalid command.
912*
913*************************************************************************/
914kal_bool dcl_hadc_power_state = KAL_FALSE;
915DCL_STATUS DclHADC_Control(DCL_HANDLE handle, DCL_CTRL_CMD cmd, DCL_CTRL_DATA_T *data)
916{
917 switch (cmd)
918 {
919 case ADC_CMD_IMM_MEASURE:
920 {
921 #if 1
922 ADC_CTRL_IMM_MEASURE_T *prIMMMeasure;
923 prIMMMeasure = &(data->rADCImmMeasure);
924 prIMMMeasure->u2ADCValue = (DCL_UINT16)adc_measureVoltage(prIMMMeasure->u2Channel,
925 (double *)&prIMMMeasure->u2ADCValue);
926 #endif
927
928 return STATUS_OK;
929 }
930 case ADC_CMD_SYNC_MEASURE:
931 {
932 #if 0
933/* under construction !*/
934/* under construction !*/
935/* under construction !*/
936/* under construction !*/
937/* under construction !*/
938/* under construction !*/
939/* under construction !*/
940/* under construction !*/
941/* under construction !*/
942 #endif
943
944 return STATUS_OK;
945 }
946 case ADC_CMD_TDMA_SYNC_SETUP:
947 {
948 #if 0//defined(DRV_ADC_FULL_FUNC)
949/* under construction !*/
950/* under construction !*/
951/* under construction !*/
952/* under construction !*/
953 #else // #if defined(DRV_ADC_FULL_FUNC)
954
955 // Not supported
956 return STATUS_INVALID_CMD;
957 #endif
958 }
959 case ADC_CMD_POWER:
960 {
961 #if 0
962/* under construction !*/
963/* under construction !*/
964/* under construction !*/
965/* under construction !*/
966/* under construction !*/
967/* under construction !*/
968/* under construction !*/
969/* under construction !*/
970/* under construction !*/
971/* under construction !*/
972/* under construction !*/
973 #endif
974
975 return STATUS_OK;
976 }
977 case ADC_CMD_GET_DATA_2_META:
978 {
979 ADC_CTRL_GET_DATA_2_META_T *prGetData2Meta;
980 prGetData2Meta = &(data->rADCGetData2Meta);
981
982 prGetData2Meta->u4ADCData = ADC_GetData2Meta(prGetData2Meta->u1Channel, prGetData2Meta->u2MeaCount);
983 return STATUS_OK;
984 }
985 case ADC_CMD_GET_DATA:
986 {
987 ADC_CTRL_GET_DATA_T *prGetData;
988 prGetData = &(data->rADCGetData);
989
990 prGetData->u4ADCData = ADC_GetData(prGetData->u1Channel);
991 return STATUS_OK;
992 }
993 case ADC_CMD_GET_META_DATA:
994 {
995 ADC_CTRL_GET_META_DATA_T *prGetMetaData;
996 prGetMetaData = &(data->rADCGetMetaData);
997
998 prGetMetaData->u4ADCData = ADC_GetMeaData(prGetMetaData->u1Channel, prGetMetaData->u2MeaCount);
999 return STATUS_OK;
1000 }
1001 case ADC_CMD_GET_MAX_PHYSICAL_CH:
1002 {
1003 ADC_CTRL_GET_MAX_PHYSICAL_CH_T *prGetMaxPhyCh;
1004 prGetMaxPhyCh = &(data->rADCGetMaxPhyCh);
1005
1006 prGetMaxPhyCh->u4Adc_max_ch = ADC_MAX_CHANNEL;
1007 return STATUS_OK;
1008 }
1009 case ADC_CMD_GET_IMM_DATA_ON_BOOTING:
1010 {
1011 #if 0
1012/* under construction !*/
1013/* under construction !*/
1014/* under construction !*/
1015/* under construction !*/
1016 #endif
1017
1018 return STATUS_OK;
1019 }
1020 case ADC_CMD_GET_TEMP:
1021 {
1022 ADC_CTRL_GET_TEMP_T *prGetTemp;
1023 prGetTemp = &(data->rGetTempData);
1024
1025 prGetTemp->i2Temp = ADC_GetImmTemp(prGetTemp->u2Channel);
1026
1027 return STATUS_OK;
1028 }
1029
1030 case ADC_CMD_GET_PHYSICAL_CHANNEL:
1031 {
1032 ADC_CTRL_GET_PHYSICAL_CHANNEL_T *prGetChannel;
1033 kal_int16 iChannel;
1034
1035 prGetChannel = &(data->rADCGetPhyChannel);
1036 iChannel = ADC_GetPhysicalChannel(prGetChannel->u2AdcName);
1037
1038 if (iChannel >= 0) {
1039 prGetChannel->u1AdcPhyCh = (DCL_UINT8)iChannel;
1040 return STATUS_OK;
1041 } else {
1042 prGetChannel->u1AdcPhyCh = 0;
1043 return STATUS_INVALID_DEVICE;
1044 }
1045 }
1046
1047 default:
1048 return STATUS_INVALID_CMD;
1049 }
1050 //return STATUS_FAIL;
1051}
1052
1053/*************************************************************************
1054* FUNCTION
1055* DclHADC_Close
1056*
1057* DESCRIPTION
1058* This function is to close the Hardware ADC module.
1059*
1060* PARAMETERS
1061* handle: the returned handle value of HDclADC_Open
1062*
1063* RETURNS
1064* STATUS_OK
1065*
1066*************************************************************************/
1067DCL_STATUS DclHADC_Close(DCL_HANDLE handle)
1068{
1069// DCL_UINT32 savedMask;
1070
1071 // Error check
1072// if (dcl_hadc_handle_count == 0){
1073// ASSERT(0);
1074// return STATUS_NOT_OPENED;
1075// }
1076
1077 // Extract handle idx
1078
1079// savedMask = SaveAndSetIRQMask();
1080// dcl_hadc_handle_count --;
1081// RestoreIRQMask(savedMask);
1082// fgHADCInit = KAL_FALSE;
1083
1084 return STATUS_OK;
1085}
1086
1087// Only empty APIs
1088#else // DRV_ADC_OFF is defined
1089DCL_STATUS DclSADC_Initialize(void){return STATUS_OK;}
1090DCL_HANDLE DclSADC_Open(DCL_DEV dev, DCL_FLAGS flags){return STATUS_OK;}
1091DCL_STATUS DclSADC_ReadData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN buf_len, DCL_OPTIONS options){return STATUS_OK;}
1092DCL_STATUS DclSADC_WriteData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN buf_len, DCL_OPTIONS options){return STATUS_OK;}
1093DCL_STATUS DclSADC_Configure(DCL_HANDLE handle, DCL_CONFIGURE_T *configure){return STATUS_OK;}
1094DCL_STATUS DclSADC_RegisterCallback(DCL_HANDLE handle, DCL_EVENT event, PFN_DCL_CALLBACK callback){return STATUS_OK;}
1095DCL_STATUS DclSADC_Control(DCL_HANDLE handle, DCL_CTRL_CMD cmd, DCL_CTRL_DATA_T *data){return STATUS_OK;}
1096DCL_STATUS DclSADC_Close(DCL_HANDLE handle){return STATUS_OK;}
1097DCL_STATUS DclHADC_Initialize(void) {return STATUS_OK; }
1098DCL_HANDLE DclHADC_Open(DCL_DEV dev, DCL_FLAGS flags){return STATUS_OK;}
1099DCL_STATUS DclHADC_ReadData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN buf_len, DCL_OPTIONS options){return STATUS_OK;}
1100DCL_STATUS DclHADC_WriteData(DCL_HANDLE handle, DCL_BUFF *buff, DCL_BUFF_LEN buf_len, DCL_OPTIONS options){return STATUS_OK;}
1101DCL_STATUS DclHADC_Configure(DCL_HANDLE handle, DCL_CONFIGURE_T *configure){return STATUS_OK;}
1102DCL_STATUS DclHADC_RegisterCallback(DCL_HANDLE handle, DCL_EVENT event, PFN_DCL_CALLBACK callback){return STATUS_OK;}
1103DCL_STATUS DclHADC_Control(DCL_HANDLE handle, DCL_CTRL_CMD cmd, DCL_CTRL_DATA_T *data){return STATUS_OK;}
1104DCL_STATUS DclHADC_Close(DCL_HANDLE handle){return STATUS_OK;}
1105#endif // #if defined(DRV_ADC_OFF)
1106