| rjw | 6c1fd8f | 2022-11-30 14:33:01 +0800 | [diff] [blame] | 1 | #ifndef __BSI_REG_H__ |
| 2 | #define __BSI_REG_H__ |
| 3 | |
| 4 | #include <reg_base.h> |
| 5 | #include <irqid.h> |
| 6 | |
| 7 | #define BSI_MAC_BASE BASE_ADDR_BSI_MAC_PMIC |
| 8 | #define BSI_MAC_CTRL_REG (BSI_MAC_BASE + 0x00) |
| 9 | #define BSI_MAC_WDATA_REG (BSI_MAC_BASE + 0x04) |
| 10 | #define BSI_MAC_RDINT_REG (BSI_MAC_BASE + 0x08) |
| 11 | #define BSI_MAC_RDATA_3100_REG (BSI_MAC_BASE + 0x0C) |
| 12 | #define BSI_MAC_RDATA_3532_REG (BSI_MAC_BASE + 0x10) |
| 13 | |
| 14 | #define BSI_APB2CRF_BASE BASE_ADDR_BSI_APB2CRF_PMIC |
| 15 | #define BSI_APB2CRF_IMM_CTRL_REG (BSI_APB2CRF_BASE + 0x00) |
| 16 | #define BSI_APB2CRF_IMM_WDATA_REG (BSI_APB2CRF_BASE + 0x04) |
| 17 | #define BSI_APB2CRF_IMM_RDINT_REG (BSI_APB2CRF_BASE + 0x08) |
| 18 | #define BSI_APB2CRF_IMM_RDATA_3100_REG (BSI_APB2CRF_BASE + 0x0C) |
| 19 | #define BSI_APB2CRF_IMM_RDATA_3532_REG (BSI_APB2CRF_BASE + 0x10) |
| 20 | |
| 21 | #define BSISPI_BASE BASE_ADDR_BSISPI_PMIC |
| 22 | #define BSISPI_CODA_VERSION_REG (BSISPI_BASE + 0x00) |
| 23 | #define BSISPI_PORT_PARAM_REG (BSISPI_BASE + 0x10) |
| 24 | #define BSISPI_SW_MODE_REG (BSISPI_BASE + 0x14) |
| 25 | #define BSISPI_CLSNINT_REG (BSISPI_BASE + 0x18) |
| 26 | #define BSISPI_IC0_PARAM1_REG (BSISPI_BASE + 0x20) |
| 27 | #define BSISPI_IC0_PARAM2_REG (BSISPI_BASE + 0x24) |
| 28 | #define BSISPI_IC1_PARAM1_REG (BSISPI_BASE + 0x28) |
| 29 | #define BSISPI_IC1_PARAM2_REG (BSISPI_BASE + 0x2C) |
| 30 | //#define BSISPI_LOG_WPTR_REG (BSISPI_BASE + 0x30) // Not existed in PMIC SPICTRL |
| 31 | //#define BSISPI_SRAM_DEL_DEL_REG (BSISPI_BASE + 0x40) // Not existed in PMIC SPICTRL |
| 32 | |
| 33 | #endif /* end of __BSI_REG_H__ */ |