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192.168.1.100 / T800_MD / 1eb8f53f94c145708b5ea2c6b9b96ea3d613f607 / . / mcu / driver / peripheral / inc / adc_sw.h
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rjw6c1fd8f2022-11-30 14:33:01 +0800[diff] [blame]1/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2005
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36/*****************************************************************************
37 *
38 * Filename:
39 * ---------
40 * adc_sw.h
41 *
42 * Project:
43 * --------
44 * Maui_Software
45 *
46 * Description:
47 * ------------
48 * This file is intends for adc driver.
49 *
50 * Author:
51 * -------
52 * -------
53 *
54 *============================================================================
55 * HISTORY
56 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
57 *------------------------------------------------------------------------------
58 * removed!
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97 *
98 *------------------------------------------------------------------------------
99 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
100 *============================================================================
101 ****************************************************************************/
102#ifndef _ADC_SW_H
103#define _ADC_SW_H
104
105#include "drv_features_adc.h"
106#include "adc_hw.h"
107#include "adc_cali.h"
108
109typedef struct {
110 double ADC_ISENSE_RESISTANCE_FACTOR; /*1/0.4*/
111 ADC_CALIDATA adc_cali_param; /*ratio = adc_volt_factor/100*/
112 kal_uint16 adc_volt_factor[ADC_MAX_CHANNEL];
113}adc_customized_struct;
114
115typedef struct {
116 kal_int32 TEMPV2;
117 kal_int32 TEMPA12;
118 kal_int32 TEMPA23;
119 kal_int32 TEMPM12;
120 kal_int32 TEMPM23;
121 kal_int32 TEMPSCALE;
122} VolToTempStruct;
123
124typedef enum {
125 vbat_adc_channel=0,
126 visense_adc_channel,
127 vbattmp_adc_channel,
128 battype_adc_channel,
129 vcharger_adc_channel,
130 pcbtmp_adc_channel,
131 aux_adc_channel,
132 chr_usb_adc_channel,
133 otg_vbus_adc_channel,
134 rftmp_adc_channel
135} adc_channel_type;
136
137
138/*************************************************************************/
139#if defined(DRV_MISC_ADC_MEASURE_REMOVE_IRQMASK)
140// Define to perform ADC race condition check when processing critical data process
141#define ADC_RACE_CONDITION_CHECK
142// Define to remove IRQ mask/restore for ADC measurement
143#define ADC_REMOVE_IRQMASK
144#endif // #if defined(DRV_MISC_ADC_MEASURE_REMOVE_IRQMASK)
145
146#if defined(ADC_RACE_CONDITION_CHECK)
147extern kal_bool gADC_RC_Check;
148// MoDIS parser skip start
149// The following two APIs are private APIs, NOT exported as public APIs
150extern void ADCRCCheckAndLock(void);
151extern void ADCRCRelease(void);
152// MoDIS parser skip end
153#endif // #if defined(ADC_RACE_CONDITION_CHECK)
154
155#if defined(ADC_REMOVE_IRQMASK)
156#define ADCSAVEANDSETIRQMASK(mask) {}
157#define ADCRESTOREIRQMASK(mask) {}
158#else // #if defined(ADC_REMOVE_IRQMASK)
159#define ADCSAVEANDSETIRQMASK(mask) {mask = SaveAndSetIRQMask();}
160#define ADCRESTOREIRQMASK(mask) RestoreIRQMask(mask)
161#endif // #if defined(ADC_REMOVE_IRQMASK)
162
163/*************************************************************************/
164// MoDIS parser skip start
165// The following APIs are private APIs
166extern kal_uint16 ADC_GetData(kal_uint8 sel);
167// adc.c
168extern kal_uint16 ADC_IMM_Data(kal_uint16 channel);
169extern kal_uint16 ADC_SYNC_Data(kal_uint16 channel);
170extern void ADC_Init(void);
171extern void adc_pwrdown_enable(void);
172extern void adc_pwrdown_disable(void);
173extern kal_uint32 ADC_GetData2Meta(kal_uint8 sel, kal_uint16 meacount);
174extern kal_uint32 ADC_GetMeaData(kal_uint8 sel, kal_uint16 meacount);
175extern void ADC_IMM_Data_on_Booting(kal_uint32 channel, kal_uint32 counts, kal_uint16 * data);
176// MoDIS parser skip end
177
178#if !defined(DRV_ADC_OFF)
179#if defined(__DRV_COMM_REG_DBG__) && defined(__DRV_ADC_REG_DBG__)
180#define DRV_ADC_WriteReg(addr,data) DRV_DBG_WriteReg(addr,data)
181#define DRV_ADC_Reg(addr) DRV_DBG_Reg(addr)
182#define DRV_ADC_WriteReg32(addr,data) DRV_DBG_WriteReg32(addr,data)
183#define DRV_ADC_Reg32(addr) DRV_DBG_Reg32(addr)
184#define DRV_ADC_WriteReg8(addr,data) DRV_DBG_WriteReg8(addr,data)
185#define DRV_ADC_Reg8(addr) DRV_DBG_Reg8(addr)
186#define DRV_ADC_ClearBits(addr,data) DRV_DBG_ClearBits(addr,data)
187#define DRV_ADC_SetBits(addr,data) DRV_DBG_SetBits(addr,data)
188#define DRV_ADC_SetData(addr, bitmask, value) DRV_DBG_SetData(addr, bitmask, value)
189#define DRV_ADC_ClearBits32(addr,data) DRV_DBG_ClearBits32(addr,data)
190#define DRV_ADC_SetBits32(addr,data) DRV_DBG_SetBits32(addr,data)
191#define DRV_ADC_SetData32(addr, bitmask, value) DRV_DBG_SetData32(addr, bitmask, value)
192#define DRV_ADC_ClearBits8(addr,data) DRV_DBG_ClearBits8(addr,data)
193#define DRV_ADC_SetBits8(addr,data) DRV_DBG_SetBits8(addr,data)
194#define DRV_ADC_SetData8(addr, bitmask, value) DRV_DBG_SetData8(addr, bitmask, value)
195#else
196#define DRV_ADC_WriteReg(addr,data) DRV_WriteReg(addr,data)
197#define DRV_ADC_Reg(addr) DRV_Reg(addr)
198#define DRV_ADC_WriteReg32(addr,data) DRV_WriteReg32(addr,data)
199#define DRV_ADC_Reg32(addr) DRV_Reg32(addr)
200#define DRV_ADC_WriteReg8(addr,data) DRV_WriteReg8(addr,data)
201#define DRV_ADC_Reg8(addr) DRV_Reg8(addr)
202#define DRV_ADC_ClearBits(addr,data) DRV_ClearBits(addr,data)
203#define DRV_ADC_SetBits(addr,data) DRV_SetBits(addr,data)
204#define DRV_ADC_SetData(addr, bitmask, value) DRV_SetData(addr, bitmask, value)
205#define DRV_ADC_ClearBits32(addr,data) DRV_ClearBits32(addr,data)
206#define DRV_ADC_SetBits32(addr,data) DRV_SetBits32(addr,data)
207#define DRV_ADC_SetData32(addr, bitmask, value) DRV_SetData32(addr, bitmask, value)
208#define DRV_ADC_ClearBits8(addr,data) DRV_ClearBits8(addr,data)
209#define DRV_ADC_SetBits8(addr,data) DRV_SetBits8(addr,data)
210#define DRV_ADC_SetData8(addr, bitmask, value) DRV_SetData8(addr, bitmask, value)
211#endif //#if defined(__DRV_COMM_REG_DBG__) && defined(__DRV_ADC_REG_DBG__)
212
213#else //!defined(DRV_ADC_OFF)
214
215#define DRV_ADC_WriteReg(addr,data)
216#define DRV_ADC_Reg(addr) drv_dummy_return()
217#define DRV_ADC_WriteReg32(addr,data)
218#define DRV_ADC_Reg32(addr) drv_dummy_return()
219#define DRV_ADC_WriteReg8(addr,data)
220#define DRV_ADC_Reg8(addr) drv_dummy_return()
221#define DRV_ADC_ClearBits(addr,data)
222#define DRV_ADC_SetBits(addr,data)
223#define DRV_ADC_SetData(addr, bitmask, value)
224#define DRV_ADC_ClearBits32(addr,data)
225#define DRV_ADC_SetBits32(addr,data)
226#define DRV_ADC_SetData32(addr, bitmask, value)
227#define DRV_ADC_ClearBits8(addr,data)
228#define DRV_ADC_SetBits8(addr,data)
229#define DRV_ADC_SetData8(addr, bitmask, value)
230
231#endif //!defined(DRV_ADC_OFF)
232
233#endif /*_ADC_SW_H*/
234