| rjw | 6c1fd8f | 2022-11-30 14:33:01 +0800 | [diff] [blame] | 1 | |
| 2 | |
| 3 | #include "dcl_pmic_features.h" |
| 4 | |
| 5 | |
| 6 | #if defined(MT6276PMU) |
| 7 | #include "dcl_pmu6276_sw.h" |
| 8 | #include "dcl_pmu6276_hw.h" |
| 9 | #include "dcl_pmu_hw.h" |
| 10 | |
| 11 | |
| 12 | #elif defined(MT6238PMU) || defined(MT6235PMU) |
| 13 | #include "dcl_pmu6235_sw.h" |
| 14 | #include "dcl_pmu6235_hw.h" |
| 15 | |
| 16 | #elif defined(MT6236PMU) |
| 17 | #include "dcl_pmu6236_sw.h" |
| 18 | #include "dcl_pmu6236_hw.h" |
| 19 | |
| 20 | #elif defined(MT6251PMU) |
| 21 | #include "dcl_pmu6251_sw.h" |
| 22 | #include "dcl_pmu6251_hw.h" |
| 23 | #include "dcl_pmu_hw.h" |
| 24 | |
| 25 | #elif defined(MT6253PMU) |
| 26 | #include "dcl_pmu6253_sw.h" |
| 27 | #include "dcl_pmu6253_hw.h" |
| 28 | |
| 29 | #elif defined(MT6253ELPMU) || defined(MT6252PMU) |
| 30 | #include "dcl_pmu6252_sw.h" |
| 31 | #include "dcl_pmu6252_hw.h" |
| 32 | #include "dcl_pmu_hw.h" |
| 33 | |
| 34 | #elif defined(MT6255PMU) |
| 35 | #include "dcl_pmu6255_sw.h" |
| 36 | #include "dcl_pmu6255_hw.h" |
| 37 | #include "dcl_pmu_hw.h" |
| 38 | |
| 39 | #elif defined(MT6256PMU) |
| 40 | #include "dcl_pmu6256_sw.h" |
| 41 | #include "dcl_pmu6256_hw.h" |
| 42 | #include "dcl_pmu_hw.h" |
| 43 | |
| 44 | #elif defined(MT6573PMU) |
| 45 | #include "dcl_pmu6573_sw.h" |
| 46 | #include "dcl_pmu6573_hw.h" |
| 47 | #include "dcl_pmu_hw.h" |
| 48 | |
| 49 | |
| 50 | #elif defined(MT6326) |
| 51 | #include "dcl_pmic6326_sw.h" |
| 52 | #include "dcl_pmic6326_hw.h" |
| 53 | |
| 54 | #elif defined(MT6326_CCCI) |
| 55 | #include "dcl_pmic6326_ccci_sw.h" |
| 56 | |
| 57 | #elif defined(MT6329) |
| 58 | #include "dcl_pmic6329_sw.h" |
| 59 | #include "dcl_pmic6329_hw.h" |
| 60 | |
| 61 | #elif defined(MT6327) |
| 62 | #include "dcl_pmic6327_sw.h" |
| 63 | #include "dcl_pmic6327_hw.h" |
| 64 | |
| 65 | #endif //#if defined(MT6276PMU) |
| 66 | |
| 67 | #include "dcl_pmu_common_sw.h" |
| 68 | |
| 69 | #if defined(PMIC_FIXED_3_ADC_CH) |
| 70 | /* adc number for measuring VBAT/VISENSE/VCHARGER is fixed internally. */ |
| 71 | #define PMIC_ADC_VCHARGER_CH_NUM PMU_ADC_VCHARGER_CH_NUM |
| 72 | #define PMIC_ADC_VISENSE_CH_NUM PMU_ADC_VISENSE_CH_NUM |
| 73 | #define PMIC_ADC_VBAT_CH_NUM PMU_ADC_VBAT_CH_NUM |
| 74 | #if defined(PMIC_FIXED_4_ADC_CH) |
| 75 | #define PMIC_ADC_VBATTEMP_CH_NUM PMU_ADC_VBATTEMP_CH_NUM |
| 76 | #endif // #if defined(PMIC_FIXED_4_ADC_CH) |
| 77 | |
| 78 | /* adc factor for VBAT/VISENSE/VCHARGER */ |
| 79 | #define PMIC_ADC_FACTOR_VBAT PMU_ADC_FACTOR_VBAT |
| 80 | #define PMIC_ADC_FACTOR_VISENSE PMU_ADC_FACTOR_VISENSE |
| 81 | #define PMIC_ADC_FACTOR_VCHARGER PMU_ADC_FACTOR_VCHARGER |
| 82 | #if defined(PMIC_FIXED_4_ADC_CH) |
| 83 | #define PMIC_ADC_FACTOR_VBATTEMP PMU_ADC_FACTOR_VBATTEMP |
| 84 | #endif // #if defined(PMIC_FIXED_4_ADC_CH) |
| 85 | |
| 86 | #endif // #if defined(PMIC_FIXED_3_ADC_CH) |
| 87 | |
| 88 | #if defined(PMIC_FIXED_CHR_EINT) |
| 89 | #define PMIC_CHR_EINT_PIN PMU_CHR_EINT_PIN |
| 90 | #endif // #if defined(PMIC_FIXED_CHR_EINT) |
| 91 | |
| 92 | #define DCL_PMU_DEV_MAGIC_NUM (0x80000000) |
| 93 | #define DCL_PMU_IS_HANDLE_MAGIC(handl_) ((handl_)& DCL_PMU_DEV_MAGIC_NUM) |
| 94 | |
| 95 | |
| 96 | #ifndef __DRV_DEBUG_PWIC_REG_READ_WRITE__ |
| 97 | #define PWIC_DRV_ClearBits16(addr, data) DRV_ClearBits(addr,data) |
| 98 | #define PWIC_DRV_SetBits16(addr, data) DRV_SetBits(addr,data) |
| 99 | #define PWIC_DRV_WriteReg16(addr, data) DRV_WriteReg(addr, data) |
| 100 | #define PWIC_DRV_WriteReg32(addr, data) DRV_WriteReg32(addr, data) |
| 101 | #define PWIC_DRV_ReadReg16(addr) DRV_Reg(addr) |
| 102 | #define PWIC_DRV_ReadReg32(addr) DRV_Reg32(addr) |
| 103 | #else // #ifndef __DRV_DEBUG_PWIC_REG_READ_WRITE__ |
| 104 | #define PWIC_DRV_ClearBits16(addr,data) DRV_DBG_ClearBits(addr,data) |
| 105 | #define PWIC_DRV_SetBits16(addr) DRV_DBG_SetBits(addr) |
| 106 | #define PWIC_DRV_WriteReg16(addr, data) DRV_DBG_WriteReg(addr, data) |
| 107 | #define PWIC_DRV_WriteReg32(addr, data) DRV_DBG_WriteReg32(addr, data) |
| 108 | #define PWIC_DRV_ReadReg16(addr) DRV_DBG_Reg(addr) |
| 109 | #define PWIC_DRV_ReadReg32(addr) DRV_DBG_Reg32(addr) |
| 110 | #endif // #ifndef __DRV_DEBUG_PWIC_REG_READ_WRITE__ |
| 111 | |