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192.168.1.100 / T800_MD / 1eb8f53f94c145708b5ea2c6b9b96ea3d613f607 / . / mcu / interface / service / nvram / nvram_enums.h
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rjw6c1fd8f2022-11-30 14:33:01 +0800[diff] [blame]1/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2005
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
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18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
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31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36/*******************************************************************************
37 * Filename:
38 * ---------
39 * nvram_enums.h
40 *
41 * Project:
42 * --------
43 * MT6208
44 *
45 * Description:
46 * ------------
47 * This file is intends for NVRAM.
48 *
49 * Author:
50 * -------
51 * -------
52 *
53 *==============================================================================
54 * HISTORY
55 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
56 *------------------------------------------------------------------------------
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242 *------------------------------------------------------------------------------
243 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
244 *==============================================================================
245 *******************************************************************************/
246
247#ifndef NVRAM_ENUMS_H
248#define NVRAM_ENUMS_H
249
250
251
252#include "kal_general_types.h"
253#include "kal_public_defs.h" /* END_OF_MOD_ID */
254#include "stack_buff_pool.h"
255#include "ctrl_buff_pool.h"
256#include "sysconf_statistics.h"
257#include "sysservice_msgid.h"
258#include "tst.h"
259#include "global_def.h"
260
261
262#if(defined(ISP_SUPPORT))
263#include "drv_sw_features_isp.h"
264#include "isp_nvram.h"
265#endif
266
267#if defined(__MA_L1__)
268#include "stack_common_ma.h"
269#endif /* __MA_L1__ */
270
271#ifdef __GAIN_TABLE_SUPPORT__
272#include "gain_table.h"
273#endif /* __GAIN_TABLE_SUPPORT__ */
274
275//#include "drv_features.h"
276//#include "drv_features_adc.h"
277//#include "drv_features_rtc.h"
278//#include "drv_features_sim.h"
279
280#include "dcl.h" /* port_setting_struct */
281
282#ifdef __MULTI_LEVEL_BACKLIGHT_SUPPORT__
283#include "custom_hw_default.h"
284#endif
285
286#if defined(__UMTS_RAT__) && defined(__MTK_UL1_FDD__)
287#include "ul1cal.h"
288#endif
289
290#ifdef __MULTI_LEVEL_BACKLIGHT_SUPPORT__
291#include "custom_hw_default.h"
292#endif
293
294
295
296#include "mml1_rf_global.h"
297#include "mml1_mipi_public.h"
298#include "mml1_drdi_public.h"
299
300#include "cust_chl_interface.h"
301
302
303#define NVRAM_DUAL_RECORD MAX_SIM_NUM
304#define NVRAM_MULTI_RECORD_LTE MAX_LTE_NUM
305
306//==================================================
307//little group (size 64)
308#define NVRAM_LID_GRP_UMTS(x) (0x0000 | (0x003F & x)) //UM
309#define NVRAM_LID_GRP_CAMERA(x) (0x0040 | (0x003F & x)) //CA
310#define NVRAM_LID_GRP_AUDIO(x) (0x0080 | (0x003F & x)) //AU
311#define NVRAM_LID_GRP_USERPROFILE(x) (0x00C0 | (0x003F & x)) //UP
312#define NVRAM_LID_GRP_OPERATORHS(x) (0x0100 | (0x003F & x)) //OP
313#define NVRAM_LID_GRP_ECOMPASS(x) (0x0140 | (0x003F & x)) //EP
314#define NVRAM_LID_GRP_MINILOG(x) (0x0180 | (0x003F & x)) //MM
315#define NVRAM_LID_GRP_DRM(x) (0x01C0 | (0x003F & x)) //DR
316#define NVRAM_LID_GRP_RTC(x) (0x0200 | (0x003F & x)) //RT
317#define NVRAM_LID_GRP_BWCS(x) (0x0240 | (0x003F & x)) //BW
318#define NVRAM_LID_GRP_GPS(x) (0x0280 | (0x003F & x)) //GP
319#define NVRAM_LID_GRP_EMPTY(x) (0x02C0 | (0x003F & x))
320#define NVRAM_LID_GRP_VSIM(x) (0x0300 | (0x003F & x)) //VS
321#define NVRAM_LID_GRP_SIM(x) (0x0340 | (0x003F & x)) //SM
322#define NVRAM_LID_GRP_SCSI(x) (0x0380 | (0x003F & x)) //SS
323#define NVRAM_LID_GRP_SBP(x) (0x03C0 | (0x003F & x)) //SP
324#define NVRAM_LID_GRP_RR(x) (0x0400 | (0x003F & x)) //RR
325#define NVRAM_LID_GRP_NMU(x) (0x0440 | (0x003F & x)) //NM
326#define NVRAM_LID_GRP_NAS(x) (0x0480 | (0x003F & x)) //NA
327#define NVRAM_LID_GRP_MML1(x) (0x04C0 | (0x003F & x)) //ML
328#define NVRAM_LID_GRP_TCM(x) (0x0500 | (0x003F & x)) //TC
329#define NVRAM_LID_GRP_IMS(x) (0x0540 | (0x003F & x)) //IM
330#define NVRAM_LID_GRP_HMU(x) (0x0580 | (0x003F & x)) //HM
331#define NVRAM_LID_GRP_FT(x) (0x05C0 | (0x003F & x)) //FT
332#define NVRAM_LID_GRP_ERAC(x) (0x0600 | (0x003F & x)) //EC
333#define NVRAM_LID_GRP_EMM(x) (0x0640 | (0x003F & x)) //EM
334#define NVRAM_LID_GRP_DHL(x) (0x0680 | (0x003F & x)) //DH
335#define NVRAM_LID_GRP_CSG(x) (0x06C0 | (0x003F & x)) //CS
336#define NVRAM_LID_GRP_ASBAND(x) (0x0700 | (0x003F & x)) //AA
337#define NVRAM_LID_GRP_ADC(x) (0x0740 | (0x003F & x)) //AD
338#define NVRAM_LID_GRP_BT(x) (0x0780 | (0x003F & x)) //BT
339#define NVRAM_LID_GRP_WNDRV(x) (0x07C0 | (0x003F & x)) //WN
340#define NVRAM_LID_GRP_EX(x) (0x0800 | (0x003F & x)) //EX
341#define NVRAM_LID_GRP_IWLAN(x) (0x0840 | (0x003F & x)) //IW
342#define NVRAM_LID_GRP_D2(x) (0x0880 | (0x003F & x)) //D2
343#define NVRAM_LID_GRP_CUSTOMER(x) (0x08C0 | (0x003F & x)) //CU
344#define NVRAM_LID_GRP_SSDS(x) (0x0900 | (0x003F & x)) //SD
345#define NVRAM_LID_GRP_MRS(x) (0x0940 | (0x003F & x)) //MR
346#define NVRAM_LID_GRP_NRRC(x) (0x0980 | (0x003F & x)) //NR
347#define NVRAM_LID_GRP_XCAP(x) (0x09C0 | (0x003F & x)) //XP
348#define NVRAM_LID_GRP_IPC(x) (0x0A00 | (0x003F & x)) //IP
349#define NVRAM_LID_GRP_FCS(x) (0x0A40 | (0x003F & x)) //FC
350#define NVRAM_LID_GRP_ICD(x) (0x0A80 | (0x003F & x)) //IC
351#define NVRAM_LID_GRP_ESM(x) (0x0AC0 | (0x003F & x)) //ES
352#define NVRAM_LID_GRP_BIP(x) (0x0B00 | (0x003F & x)) //BI
353#define NVRAM_LID_GRP_L5(x) (0x0B40 | (0x003F & x)) //LF
354#define NVRAM_LID_GRP_USB(x) (0x0B80 | (0x003F & x)) //US
355#define NVRAM_LID_GRP_TMC(x) (0x0BC0 | (0x003F & x)) //TM
356#define NVRAM_LID_GRP_SASE(x) (0x0C00 | (0x003F & x)) //SE
357#define NVRAM_LID_GRP_THERMAL(x) (0x0C40 | (0x003F & x)) //TH
358#define NVRAM_LID_GRP_IDC(x) (0x0C80 | (0x003F & x)) //DC
359#define NVRAM_LID_GRP_RSRA(x) (0x0CC0 | (0x003F & x)) //RS
360#define NVRAM_LID_GRP_MCF(x) (0x1000 | (0x003F & x)) //MC
361#define NVRAM_LID_GRP_MTF(x) (0x1040 | (0x003F & x)) //MF
362#define NVRAM_LID_GRP_VGNAS(x) (0x1080 | (0x003F & x)) //VG
363#define NVRAM_LID_GRP_AS(x) (0x10C0 | (0x003F & x)) //AS
364
365#define NVRAM_LID_1ST_GRP_END 0x1200
366#define NVRAM_LID_2ND_GRP_START 0xD800
367//==================================================
368//big group end (size 256)
369#define NVRAM_LID_GRP_MMRFC(x) (0xDE00 | (0x00FF & x)) //RC
370#define NVRAM_LID_GRP_MML1_CDF(x) (0xDF00 | (0x00FF & x)) //DF
371#define NVRAM_LID_GRP_NL1(x) (0xE000 | (0x00FF & x)) //NL
372#define NVRAM_LID_GRP_CUEX(x) (0xE100 | (0x00FF & x)) //CU
373#define NVRAM_LID_GRP_CL1CAL(x) (0xE200 | (0x00FF & x)) //CC
374#define NVRAM_LID_GRP_CL1(x) (0xE300 | (0x00FF & x)) //CL
375#define NVRAM_LID_GRP_C2K(x) (0xE400 | (0x00FF & x)) //CK
376#define NVRAM_LID_GRP_UL1(x) (0xE500 | (0x00FF & x)) //UL
377#define NVRAM_LID_GRP_UL1_CALIBRATION1(x) (0xE600 | (0x00FF & x)) //UL
378#define NVRAM_LID_GRP_UL1_CALIBRATION2(x) (0xE700 | (0x00FF & x)) //UL
379#define NVRAM_LID_GRP_UL1_CALIBRATION3(x) (0xE800 | (0x00FF & x)) //UL
380#define NVRAM_LID_GRP_L1(x) (0xE900 | (0x00FF & x)) //LA
381#define NVRAM_LID_GRP_L1_RF(x) (0xEA00 | (0x00FF & x)) //LA
382#define NVRAM_LID_GRP_TD(x) (0xEB00 | (0x00FF & x)) //TD //TL
383#define NVRAM_LID_GRP_EL1(x) (0xEC00 | (0x00FF & x)) //EL
384#define NVRAM_LID_GRP_EL1_CUST(x) (0xED00 | (0x00FF & x)) //EA
385#define NVRAM_LID_GRP_ERRC(x) (0xEE00 | (0x00FF & x)) //ER //LT
386#define NVRAM_LID_GRP_L4(x) (0xEF00 | (0x00FF & x)) //LD
387//big group start (size 256)
388
389//==================================================
390//system group start (size 256)
391#define NVRAM_LID_GRP_INTERNAL(x) (0xF000 | (0x00FF & x)) //MT //ST
392#define NVRAM_LID_GRP_FACTORY(x) (0xF100 | (0x00FF & x)) //MT
393#define NVRAM_LID_GRP_CORE(x) (0xF200 | (0x00FF & x)) //MT
394#define NVRAM_LID_GRP_COMM_APP(x) (0xF300 | (0x00FF & x)) //MT
395#define NVRAM_LID_GRP_CUST(x) (0xFF00 | (0x00FF & x)) //MT
396//system group end (size 256)
397#define NVRAM_LID_GRP_MAX (1<<16)
398
399
400typedef enum
401{
402 NVRAM_POWERON_NORMAL,
403 NVRAM_POWERON_CHARGER,
404 NVRAM_POWERON_ALARM,
405 NVRAM_POWERON_INVALID
406} nvram_poweron_mode_enum;
407
408typedef enum
409{
410 NVRAM_LOCK_DISABLE,
411 NVRAM_LOCK_ENABLE,
412 NVRAM_LOCK_TEMP_DISABLE,
413 NVRAM_LOCK_OTP,
414 NVRAM_LOCK_INVALID
415} nvram_lock_state_enum;
416
417typedef enum
418{
419 NVRAM_DEFAULT_VALUE_SUCCESS,
420 NVRAM_DEFAULT_VALUE_FAIL,
421 NVRAM_DEFAULT_VALUE_FF,
422 NVRAM_DEFAULT_VALUE_ZERO,
423 NVRAM_DEFAULT_VALUE_POINT,
424 NVRAM_DEFAULT_VALUE_APPLICATION,
425
426 NVRAM_DEFAULT_VALUE_MAX
427} nvram_default_value_enum;
428
429typedef enum
430{
431 NVRAM_RESET_ALL,
432 NVRAM_RESET_USER,
433 NVRAM_RESET_SYSTEM,
434 NVRAM_RESET_CERTAIN,
435 NVRAM_RESET_FACTORY,
436 NVRAM_RESET_CUSTPACK,
437 NVRAM_RESET_SECUPACK,
438 NVRAM_RESET_BRANCH,
439 NVRAM_RESET_PACKAGE,
440 NVRAM_RESET_FAT,
441 NVRAM_RESET_SDS,
442 NVRAM_RESET_INVALID
443} nvram_reset_category_enum;
444
445
446typedef enum
447{
448 /* NVRAM generic error code */
449 NVRAM_ERRNO_SUCCESS,
450 NVRAM_IO_ERRNO_OK = NVRAM_ERRNO_SUCCESS,
451
452 NVRAM_ERRNO_FAIL,
453 NVRAM_ERRNO_INVALID,
454 NVRAM_ERRNO_NOT_READY,
455
456 /* NVRAM driver error code */
457 NVRAM_IO_ERRNO_INVALID_LID,
458 NVRAM_IO_ERRNO_INVALID_SIZE,
459 NVRAM_IO_ERRNO_INVALID_RECORD,
460 NVRAM_IO_ERRNO_EMPTY_RECORD,
461 NVRAM_IO_ERRNO_STORAGE,
462 NVRAM_IO_ERRNO_INIT,
463 NVRAM_IO_ERRNO_CHK,
464 NVRAM_IO_ERRNO_LOCKED,
465 NVRAM_IO_ERRNO_WRONG_RINGLID,
466 NVRAM_IO_ERRNO_ACCESS_DENIED,
467 NVRAM_IO_ERRNO_DRV_BROKEN,
468 NVRAM_IO_ERRNO_CONTENT_BROKEN,
469 NVRAM_IO_ERRNO_SDS_FAIL,
470 NVRAM_IO_ERRNO_SDS_MODE,
471
472 /* OTP */
473 NVRAM_ERRNO_OTP_UNKNOW, /* FS_FLASH_OTP_UNKNOWERR -123 */
474 NVRAM_ERRNO_OTP_OVERSCOPE, /* FS_FLASH_OTP_OVERSCOPE -124 */
475 NVRAM_ERRNO_OTP_WRITEFAIL, /* FS_FLASH_OTP_WRITEFAIL -125 */
476 NVRAM_ERRNO_OTP_LOCKED, /* FS_FLASH_OTP_LOCK_ALREADY -125 */
477 NVRAM_ERRNO_OTP_INVALID_INPUT,
478 NVRAM_ERRNO_OTP_INVALID_RANGE,
479 NVRAM_ERRNO_OTP_WRITETWICE,
480
481 NVRAM_ERRNO_IMAGE_BROKEN,
482 NVRAM_ERRNO_IMAGE_EMPTY,
483 NVRAM_ERRNO_IMAGE_DATA_NOT_SYNC,
484 NVRAM_ERRNO_IMAGE_DATA_NOT_EXIST,
485
486 NVRAM_ERRNO_FOLDER_EXIST,
487
488 NVRAM_ERRNO_SDS_READY,
489 NVRAM_ERRNO_SDS_EMPTY,
490
491 NVRAM_ERRNO_MSP_CHECK_ERROR,
492 NVRAM_ERRNO_CONF_CHECK_ERROR,
493
494 NVRAM_ERRNO_WRONG_API_USE, //use normal API to access RAW data LID
495 NVRAM_ERRNO_SIG_CHK_FAIL,
496
497 /* CHKSUM */
498 NVRAM_ERRNO_INVAL_PARM,
499 NVRAM_ERRNO_GET_CHKSUM_ALGO_INGO,
500 NVRAM_ERRNO_CHKSUM_TYPE_PARM,
501
502 NVRAM_ERRNO_MAX
503} nvram_errno_enum;
504
505
506
507
508typedef kal_uint16 nvram_lid_enum;
509typedef kal_uint16 nvram_app_id_enum;
510typedef kal_uint16 nvram_lid_core_enum;
511typedef kal_uint16 nvram_appendix_type_enum;
512
513typedef enum
514{
515 NVRAM_IMAGE_TYPE_EMPTY = 0x0000,
516 NVRAM_IMAGE_TYPE_CALIBRAT = 0x0001,
517 NVRAM_IMAGE_TYPE_IMEI = 0x0002
518} nvram_image_type_enum;
519
520#define NVRAM_IMAGE_TYPE_DEFAULT NVRAM_IMAGE_TYPE_CALIBRAT
521
522typedef enum
523{
524 NVRAM_BIN_REGION_BACKUP,
525 NVRAM_BIN_REGION_RESTORE,
526} nvram_bin_region_access_enum;
527
528typedef enum
529{
530 NVRAM_SDS_ACCESS_BACKUP,
531 NVRAM_SDS_ACCESS_RESTORE,
532} nvram_sds_access_enum;
533
534typedef enum
535{
536 NVRAM_RESTORE_FALSE,
537 NVRAM_RESTORE_TRUE
538}nvram_restore_flag_enum;
539
540typedef enum
541{
542 NVRAM_ACCESS_BY_MSG,
543 NVRAM_ACCESS_BY_SECURE_API,
544 NVRAM_ACCESS_BY_NORMAL_API,
545}nvram_access_way_enum;
546
547typedef enum
548{
549 NVRAM_FACTORY_CMD_BACKUP,
550 NVRAM_FACTORY_CMD_RESTORE,
551 NVRAM_FACTORY_CMD_ERASE_BACKUP,
552 NVRAM_FACTORY_CMD_RESET_USER_DATA, /* NV Rebuild, make NV values to default (except backup NVs) */
553 NVRAM_FACTORY_CMD_RESET_ALL, /* NV Rebuild, make NV values to default (including backup NVs like imei, rf calibration data and etc) */
554 NVRAM_FACTORY_CMD_CHECK_BACKUP, /* To check if nvram have backuped or not */
555} nvram_factory_cmd_type_enum;
556
557typedef enum
558{
559 NVRAM_REBUILD_NONE,
560 NVRAM_REBUILD_USER_DATA = 0x8AE1,
561 NVRAM_REBUILD_ALL_DATA = 0xF71D,
562} nvram_rebuild_type_enum;
563
564typedef enum
565{
566 FS_OP_OPEN = 0x1001,
567 FS_OP_SEEK, //0x1002
568 FS_OP_READ, //0x1003
569 FS_OP_WRITE, //0x1004
570 FS_OP_CLOSE, //0x1005
571 FS_OP_CLOSEALL, //0x1006
572 FS_OP_CREATEDIR, //0x1007
573 FS_OP_REMOVEDIR, //0x1008
574 FS_OP_GETFILESIZE, //0x1009
575 FS_OP_GETFOLDERSIZE, //0x100a
576 FS_OP_RENAME, //0x100b
577 FS_OP_MOVE, //0x100c
578 FS_OP_COUNT, //0x100d
579 FS_OP_GETDISKINFO, //0x100e
580 FS_OP_DELETE, //0x100f
581 FS_OP_GETATTRIBUTES, //0x1010
582 FS_OP_OPENHINT, //0x1011
583 FS_OP_FINDFIRST, //0x1012
584 FS_OP_FINDNEXT, //0x1013
585 FS_OP_FINDCLOSE, //0x1014
586 FS_OP_LOCKFAT, //0x1015
587 FS_OP_UNLOCKALL, //0x1016
588 FS_OP_SHUTDOWN,//0x1017
589 FS_OP_XDELETE, //0x1018
590 FS_OP_CLEARDISKFLAG, //0x1019
591 FS_OP_GETDRIVE, //0x101a
592 FS_OP_GETCLUSTERSIZE, //0x101b
593 FS_OP_SETDISKFLAG, //0x101c
594 FS_OP_OTPWRITE, //0x101d
595 FS_OP_OTPREAD, //0x101e
596 FS_OP_OTPQUERYLENGTH, //0x101f
597 FS_OP_OTPLOCK, //0x1020
598 FS_OP_RESTORE = 0x1021,
599 FS_OP_CMPTREAD = 0x1022,
600 FS_OP_DUMMY1023 = 0x1023,
601 FS_OP_CMPTWRITE = 0x1024,
602 FS_OP_GETFILEDETAIL = 0x1025,
603 FS_OP_CUSTOMER_READIMEI = 0x1026,
604} nvram_access_type_enum;
605
606typedef enum
607{
608 NVRAM_OPEN_TRACE_SETTING_FILE_FAIL = 0x1,
609 NVRAM_READ_TRACE_SETTING_FILE_FAIL = 0x2,
610 NVRAM_READ_TRACE_SETTING_FILE_SUCCESS = 0x3,
611}nvram_access_trace_setting_file_result_enum;
612
613typedef enum
614{
615 NVRAM_INIT_START = 0x0,
616 NVRAM_PRE_INIT_GET_TRACE_SETTING_DONE,
617 NVRAM_PRE_INIT_DONE = 0xFF,
618 NVRAM_CORE_INIT_FIRST_BOOT_START = 0x101,
619 NVRAM_CORE_INIT_FIRST_BOOT_CHECK_DONE = 0x102,
620 NVRAM_CORE_INIT_FIRST_BOOT_CREATE_FAT_FILE_DONE = 0x103,
621 NVRAM_CORE_INIT_FIRST_BOOT_CREATE_MAIN_FOLDER_DONE = 0x104,
622 NVRAM_CORE_INIT_FIRST_BOOT_CREATE_ALL_FOLDER_DONE = 0x105,
623 NVRAM_CORE_INIT_FIRST_BOOT_RESET_ALL_FILE_DONE = 0x106,
624 NVRAM_CORE_INIT_FIRST_BOOT_RESET_SYS_LID_FILE_DONE = 0x107,
625 NVRAM_CORE_INIT_FIRST_BOOT_DELETE_FAT_FILE_DONE = 0x108,
626 NVRAM_CORE_INIT_FIRST_BOOT_END = 0x1FF,
627 NVRAM_CORE_INIT_FACTORY_BOOT_START = 0x200,
628 NVRAM_CORE_INIT_FACTORY_BOOT_CHECK_DONE = 0x201,
629 NVRAM_CORE_INIT_FACTORY_BOOT_CREATE_ALL_FOLDER_DONE =0x202,
630 NVRAM_CORE_INIT_FACTORY_BOOT_CONSTRUCT_BITMAP_DONE = 0x203,
631 NVRAM_CORE_INIT_FACTOR_BOOT_DELETE_NVDATA_DONE = 0x204,
632 NVRAM_CORE_INIT_FACTOR_BOOT_RESET_NON_CRITICAL_FILE_DONE =0x205,
633 NVRAM_CORE_INIT_FACTOR_BOOT_RESET_SYS_LID_FILE_DONE = 0x206,
634 NVRAM_CORE_INIT_FACTORY_BOOT_END = 0x2FF,
635 NVRAM_CORE_INIT_OTA_BOOT_START = 0x400,
636 NVRAM_CORE_INIT_OTA_BOOT_CHECK_DONE = 0x401,
637 NVRAM_CORE_INIT_OTA_BOOT_VERSION_CONFLICT_RESOLVE_STAGE1 = 0x402,
638 NVRAM_CORE_INIT_OTA_BOOT_VERSION_CONFLICT_RESOLVE_STAGE2 = 0x403,
639 NVRAM_CORE_INIT_OTA_BOOT_VERSION_CONFLICT_RESOLVE_STAGE3 =0x404,
640 NVRAM_CORE_INIT_OTA_BOOT_RESET_SYS_LID_FILE_DONE = 0x405,
641 NVRAM_CORE_INIT_OTA_BOOT_UPDATE_BUILD_TIME_FILE_DONE = 0x406,
642 NVRAM_CORE_INIT_OTA_BOOT_UPDATE_CHKSUM_INFO_FILE_DONE = 0x407,
643 NVRAM_CORE_INIT_OTA_BOOT_END = 0x4FF,
644 NVRAM_POST_INIT_START = 0x800,
645 NVRAM_POST_INIT_WRITE_BITMAP_DONE= 0x801,
646 NVRAM_POST_INIT_MCF_OTA_DONE = 0x802,
647 NVRAM_POST_INIT_CACHE_PREREAD_DONE = 0x803,
648 NVRAM_POST_INIT_CUSTOM_EM_NVRAM_CONFIG_DONE = 0x804,
649 NVRAM_POST_INIT_CUSTOM_NVRAM_CONFIG_DONE=0x805,
650 NVRAM_POST_INIT_CUSTOM_DEFAULT_MODE_CONFIG= 0x806,
651 NVRAM_POST_INIT_END = 0x8FF,
652}nvram_init_step_enum;
653
654
655#endif /* NVRAM_ENUMS_H */