rjw | 6c1fd8f | 2022-11-30 14:33:01 +0800 | [diff] [blame] | 1 | /***************************************************************************** |
| 2 | * Copyright Statement: |
| 3 | * -------------------- |
| 4 | * This software is protected by Copyright and the information contained |
| 5 | * herein is confidential. The software may not be copied and the information |
| 6 | * contained herein may not be used or disclosed except with the written |
| 7 | * permission of MediaTek Inc. (C) 2012 |
| 8 | * |
| 9 | * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES |
| 10 | * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") |
| 11 | * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON |
| 12 | * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, |
| 13 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF |
| 14 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT. |
| 15 | * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE |
| 16 | * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR |
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| 18 | * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO |
| 19 | * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S |
| 20 | * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM. |
| 21 | * |
| 22 | * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE |
| 23 | * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, |
| 24 | * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, |
| 25 | * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO |
| 26 | * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. |
| 27 | * |
| 28 | * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE |
| 29 | * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF |
| 30 | * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND |
| 31 | * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER |
| 32 | * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC). |
| 33 | * |
| 34 | *****************************************************************************/ |
| 35 | |
| 36 | /***************************************************************************** |
| 37 | * |
| 38 | * Filename: |
| 39 | * --------- |
| 40 | * errc_epdcp_msg.h |
| 41 | * |
| 42 | * Project: |
| 43 | * -------- |
| 44 | * MOLY |
| 45 | * |
| 46 | * Description: |
| 47 | * ------------ |
| 48 | * eRRC-ePDCP SAP message structure definition |
| 49 | * |
| 50 | * Author: |
| 51 | * ------- |
| 52 | * ------- |
| 53 | * |
| 54 | * ========================================================================== |
| 55 | * $Log$ |
| 56 | * |
| 57 | * 07 24 2018 cammie.yang |
| 58 | * [MOLY00341790] [MT6295] UDC feature patch back |
| 59 | * [UDC][95FPB][Phase 3] UDC feature patch back -- common structures and interfaces |
| 60 | * |
| 61 | * 07 18 2018 steve.kao |
| 62 | * [MOLY00339307] The handling of energy depletion attack by STMSI paging from fake cell |
| 63 | * Inactivity Detection Timer 2 |
| 64 | * |
| 65 | * 02 06 2018 yi-shing.liou |
| 66 | * [MOLY00299866] [UMOLYE][ERRC/El2][R13]FeMDT UL PDCP delay measurement report |
| 67 | * [EPDCP] PDCP queuing delay (EMDT), common part. |
| 68 | * |
| 69 | * 10 31 2017 mazi.yu |
| 70 | * [MOLY00286412] [MT6293] Change EPDCP ERRC RB add/mod interface |
| 71 | * Change epdcp_rb_addmod_struct interface and support new qci value |
| 72 | * |
| 73 | * 09 18 2017 timothy.yao |
| 74 | * [MOLY00274939] patch back bugfix of RoHC-TCP IOT |
| 75 | * for UL-ROHC: |
| 76 | * 1) RoHC TCP bugfix patch |
| 77 | * 2) UL-ROHC interface |
| 78 | * |
| 79 | * 07 13 2017 steve.kao |
| 80 | * [MOLY00264004] [6293] EPDCP R-SIM code changes and UT with bugfixes |
| 81 | * |
| 82 | * [UMOLYA][TRUNK] EPDCP changes for L+L, R-SIM, UT, and bugfixes. |
| 83 | * |
| 84 | * 02 10 2017 steve.kao |
| 85 | * [MOLY00228972] [UMOLYA][EPDCP][R-SIM] Interface with ERRC for Remote SIM |
| 86 | * [EPDCP][R-SIM] Interface with ERRC for Remote SIM. |
| 87 | * |
| 88 | * 11 15 2016 cammie.yang |
| 89 | * [MOLY00211938] [UMOLYA][EM][AT&T] EUTRA air message |
| 90 | * [TRUNK][EPDCP] |
| 91 | * 1. Modification of ERRC-EPDCP interface for change of RRC buffer type (non-cachable AFM will be used) |
| 92 | * 2. Add handling for NULL Alogrithm in EPDCP UL |
| 93 | * |
| 94 | * 11 10 2016 steve.kao |
| 95 | * [MOLY00195563] [6293][EL2][UPCM][RATDM][EPDCP] Initial feature integrations |
| 96 | * [UMOLYA_TRUNK][EPDCP] Fix MCCH delivery interface. |
| 97 | * |
| 98 | * 09 26 2016 cammie.yang |
| 99 | * [MOLY00195563] [6293][EL2][UPCM][RATDM][EPDCP] Initial feature integrations |
| 100 | * [TRUNK] UPCM/RATDM/EPDCP feature integrations from PS.DEV |
| 101 | * |
| 102 | * 01 21 2016 mingtsung.sun |
| 103 | * [MOLY00160421] [MT6292] ePDCP CE RAM Optimization |
| 104 | * [EPDCP] CE RAM OPT |
| 105 | * |
| 106 | * 01 04 2016 tero.miettinen |
| 107 | * [MOLY00155820] ERRC UMOLY updates |
| 108 | * NVRAM IF, ERRC - EL2 IF and ERRC update for 15 bit RLC LI field length. |
| 109 | * |
| 110 | * 06 03 2015 mingtsung.sun |
| 111 | * [MOLY00118161] [MT6291] EPDCP CR Sync - Early reestablishment to prevent certain kind of VoLTE call drop |
| 112 | * LTE domain |
| 113 | * |
| 114 | * 02 05 2015 cooper.lin |
| 115 | * [MOLY00090532] [MT6291] Change Feature Check-in |
| 116 | * Code sync from MOLY (W15.06) |
| 117 | * 1. Not check in C2K related code because 91 C2K is under implementation and not checked in yet |
| 118 | * 2. Not check in VSIM related code, need to further discuss |
| 119 | * 3. Comment some DETECTION_TIMER related code, will confirm soon and patch it |
| 120 | * |
| 121 | * 11 12 2014 chi-chung.lin |
| 122 | * [MOLY00068710] [MT6291_DEV] Sync MOLY to MT6291_DEV |
| 123 | * [CHM] code sync from MT6291_DEV to UMOLY |
| 124 | * |
| 125 | * 11 11 2014 andrew.wu |
| 126 | * [MOLY00084096] [UMOLY]MT6291_DEV sync to UMOLY TRUNK |
| 127 | * MT6291_DEV sync to UMOLY |
| 128 | * |
| 129 | * 02 25 2013 timothy.yao |
| 130 | * [MOLY00007127] [MT7208] EL2 enhancement in MOLY |
| 131 | * [merged from L1SL2S-IT CBr] |
| 132 | * 1. modify the MACROs checking SIT index in ePDCP. |
| 133 | * 2. [bugfix] update BD chksum after removing PDCP header. |
| 134 | * 3. [bugfix] fix assert when deactivating loopback test mode |
| 135 | * -> also fix UT cases. |
| 136 | * 4. [bugfix] cache flush for the scaled data |
| 137 | * 5. [modify] patch the random method in freerun. |
| 138 | * 6. [modify] set the padding enums as 0x7fffffff for cgen. |
| 139 | ****************************************************************************/ |
| 140 | |
| 141 | /* |
| 142 | * mtk02353, 2011/07/28 |
| 143 | * |
| 144 | * eRRC-ePDCP SAP message structure definition |
| 145 | * |
| 146 | * - the file only defines the message structure. |
| 147 | * - naming rule : similar to message id |
| 148 | * (a) exclude the prefix "MSG_ID_" |
| 149 | * (b) add the postfix "_struct" |
| 150 | * - message id is defined in epdcp_sap.h |
| 151 | * MSG_ID_ERRC_EPDCP_DCCH_DATA_REQ, |
| 152 | * MSG_ID_ERRC_EPDCP_DCCH_DATA_CNF, |
| 153 | * MSG_ID_ERRC_EPDCP_DCCH_DATA_IND, |
| 154 | * MSG_ID_ERRC_EPDCP_DCCH_DATA_RES, |
| 155 | * MSG_ID_ERRC_EPDCP_TEST_REQ, |
| 156 | * MSG_ID_ERRC_EPDCP_TEST_CNF, |
| 157 | * MSG_ID_ERRC_EPDCP_CONFIG_REQ, |
| 158 | * MSG_ID_ERRC_EPDCP_CONFIG_CNF, |
| 159 | * MSG_ID_ERRC_EPDCP_CNTINFO_REQ, |
| 160 | * MSG_ID_ERRC_EPDCP_CNTINFO_CNF, |
| 161 | * MSG_ID_ERRC_EPDCP_EXCESS_DELAY_IND |
| 162 | * |
| 163 | * history: |
| 164 | * 2011/11/16 - timothy |
| 165 | * seperate the configuration array of CONFIG_REQ into 2 arrays, |
| 166 | * one is for add_and_modify, and the other is for deletion. |
| 167 | */ |
| 168 | #ifndef _LTE_ERRC_EPDCP_SAP_STRUCT_DEF_H_ |
| 169 | #define _LTE_ERRC_EPDCP_SAP_STRUCT_DEF_H_ |
| 170 | |
| 171 | #include "kal_public_api.h" |
| 172 | |
| 173 | #include "qmu_bm.h" |
| 174 | #include "el2_sap_common.h" |
| 175 | #include "common_def.h" |
| 176 | |
| 177 | /***************************************************************************** |
| 178 | * constants |
| 179 | *****************************************************************************/ |
| 180 | |
| 181 | /* numbers */ |
| 182 | #define EPDCP_SAP_MAX_NUM_CFG_RB (10) //2 //2 SRB + 8 DRBs |
| 183 | #define EPDCP_SAP_MAX_NUM_DRB (8) //8 DRBs |
| 184 | #define EPDCP_SAP_MAX_NUM_ROHC_PROF (9) |
| 185 | #define EPDCP_SAP_MAX_NUM_QUEUING_DELAY_RSLT (6) |
| 186 | |
| 187 | |
| 188 | /* RB types */ |
| 189 | //#define EPDCP_SAP_DRB_TYPE_DRB_AM (1) |
| 190 | //#define EPDCP_SAP_DRB_TYPE_DRB_UM (2) |
| 191 | |
| 192 | |
| 193 | /***************************************************************************** |
| 194 | * enum types |
| 195 | *****************************************************************************/ |
| 196 | |
| 197 | /* |
| 198 | * dcch_data_req flag_bmp bit index definition |
| 199 | */ |
| 200 | typedef enum |
| 201 | { |
| 202 | EPDCP_SAP_DATAREQ_FLAG_SMC = 0, |
| 203 | EPDCP_SAP_DATAREQ_FLAG_DRX_NO_WAKEUP = 1, |
| 204 | EPDCP_SAP_DATAREQ_FLAG_TIME_BOUND = 2 |
| 205 | } epdcp_datareq_flag_enum; |
| 206 | |
| 207 | /* |
| 208 | * dcch_data_req result |
| 209 | */ |
| 210 | typedef enum |
| 211 | { |
| 212 | EPDCP_SAP_DATAREQ_OK = 0, |
| 213 | EPDCP_SAP_DATAREQ_FAILURE, |
| 214 | EPDCP_SAP_DATAREQ_UNSENT, |
| 215 | |
| 216 | EPDCP_SAP_DATAREQ_PAD = 0x7fffffff |
| 217 | }epdcp_datareq_result_enum; |
| 218 | |
| 219 | |
| 220 | /* |
| 221 | * integrity check result |
| 222 | */ |
| 223 | typedef enum |
| 224 | { |
| 225 | EPDCP_SAP_INTCHK_OK = 0, |
| 226 | EPDCP_SAP_INTCHK_FAILURE, //integrity check failure |
| 227 | EPDCP_SAP_INTCHK_SKIPPED, //integrity check is not applied |
| 228 | |
| 229 | EPDCP_SAP_INTCHK_PAD = 0x7fffffff |
| 230 | } epdcp_intchk_result_enum; |
| 231 | |
| 232 | |
| 233 | /* QoS label of RB */ |
| 234 | typedef enum |
| 235 | { |
| 236 | EPDCP_SAP_RB_QOS_0 = 0, //none (SRB) |
| 237 | EPDCP_SAP_RB_QOS_1, //high (DRB) |
| 238 | EPDCP_SAP_RB_QOS_2, //middle (DRB) |
| 239 | EPDCP_SAP_RB_QOS_3, //low (DRB) |
| 240 | |
| 241 | EPDCP_SAP_RB_QOS_NUM, |
| 242 | EPDCP_SAP_RB_QOS_PAD = 0x7fffffff |
| 243 | } epdcp_rb_qos_enum; |
| 244 | |
| 245 | |
| 246 | /* command for RB */ |
| 247 | typedef enum |
| 248 | { |
| 249 | EPDCP_SAP_RB_CMD_ESTABLISH = 0, |
| 250 | EPDCP_SAP_RB_CMD_EST_N_SUSP, |
| 251 | EPDCP_SAP_RB_CMD_SUSPEND, |
| 252 | EPDCP_SAP_RB_CMD_RECONFIG, |
| 253 | EPDCP_SAP_RB_CMD_HO_IND, |
| 254 | EPDCP_SAP_RB_CMD_RESUME, |
| 255 | EPDCP_SAP_RB_CMD_RELEASE, |
| 256 | EPDCP_SAP_RB_CMD_RELEASE_FROM_LTE, //inter-RAT (from LTE) |
| 257 | |
| 258 | EPDCP_SAP_RB_CMD_NUM, |
| 259 | EPDCP_SAP_RB_CMD_PAD = 0x7fffffff |
| 260 | } epdcp_rb_cmd_enum; |
| 261 | |
| 262 | |
| 263 | /* LB command for PDCP */ |
| 264 | typedef enum |
| 265 | { |
| 266 | EPDCP_SAP_LB_CMD_MODE_A_DEACTIVATE = 0, |
| 267 | EPDCP_SAP_LB_CMD_MODE_A_ACTIVATE, |
| 268 | EPDCP_SAP_LB_CMD_MODE_B_DEACTIVATE, |
| 269 | EPDCP_SAP_LB_CMD_MODE_B_ACTIVATE, |
| 270 | EPDCP_SAP_LB_CMD_MODE_C_DEACTIVATE, |
| 271 | EPDCP_SAP_LB_CMD_MODE_C_ACTIVATE, |
| 272 | |
| 273 | EPDCP_SAP_LB_CMD_NUM, |
| 274 | EPDCP_SAP_LB_CMD_PAD = 0x7fffffff |
| 275 | } epdcp_lb_cmd_enum; |
| 276 | |
| 277 | |
| 278 | /* integrity algorithm enum */ |
| 279 | typedef enum |
| 280 | { |
| 281 | EPDCP_SAP_INT_ALG_EIA0 = 0, |
| 282 | EPDCP_SAP_INT_ALG_EIA1, |
| 283 | EPDCP_SAP_INT_ALG_EIA2, |
| 284 | EPDCP_SAP_INT_ALG_EIA3, // ZUC algorithm |
| 285 | |
| 286 | EPDCP_SAP_INT_ALG_NUM, |
| 287 | EPDCP_SAP_INT_ALG_PAD = 0x7fffffff |
| 288 | } epdcp_int_alg_enum; |
| 289 | |
| 290 | |
| 291 | /* cipher algorithm enum */ |
| 292 | typedef enum |
| 293 | { |
| 294 | EPDCP_SAP_CIP_ALG_EEA0 = 0, |
| 295 | EPDCP_SAP_CIP_ALG_EEA1, // SNOW 3G |
| 296 | EPDCP_SAP_CIP_ALG_EEA2, // AES-based |
| 297 | EPDCP_SAP_CIP_ALG_EEA3, // ZUC algorithm |
| 298 | |
| 299 | EPDCP_SAP_CIP_ALG_NUM, |
| 300 | EPDCP_SAP_CIP_ALG_PAD = 0x7fffffff |
| 301 | } epdcp_cip_alg_enum; |
| 302 | |
| 303 | |
| 304 | typedef enum |
| 305 | { |
| 306 | EPDCP_SAP_MEASUREMENT_OFF = 0, |
| 307 | EPDCP_SAP_MEASUREMENT_ON, |
| 308 | EPDCP_SAP_MEASUREMENT_MODIFY |
| 309 | } epdcp_delay_measurement_enum; |
| 310 | |
| 311 | |
| 312 | typedef enum |
| 313 | { |
| 314 | EPDCP_SAP_DELAY_THRESH_MS_30 = 0, |
| 315 | EPDCP_SAP_DELAY_THRESH_MS_40, |
| 316 | EPDCP_SAP_DELAY_THRESH_MS_50, |
| 317 | EPDCP_SAP_DELAY_THRESH_MS_60, |
| 318 | EPDCP_SAP_DELAY_THRESH_MS_70, |
| 319 | EPDCP_SAP_DELAY_THRESH_MS_80, |
| 320 | EPDCP_SAP_DELAY_THRESH_MS_90, |
| 321 | EPDCP_SAP_DELAY_THRESH_MS_100, |
| 322 | EPDCP_SAP_DELAY_THRESH_MS_150, |
| 323 | EPDCP_SAP_DELAY_THRESH_MS_300, |
| 324 | EPDCP_SAP_DELAY_THRESH_MS_500, |
| 325 | EPDCP_SAP_DELAY_THRESH_MS_750, |
| 326 | EPDCP_SAP_DELAY_THRESH_MS_PAD = 0x7fffffff |
| 327 | } epdcp_delay_thresh_enum; |
| 328 | |
| 329 | |
| 330 | typedef enum |
| 331 | { |
| 332 | EPDCP_SAP_DELAY_RPT_INTV_MS_1024 = 0, |
| 333 | EPDCP_SAP_DELAY_RPT_INTV_MS_2048, |
| 334 | EPDCP_SAP_DELAY_RPT_INTV_MS_5120, |
| 335 | EPDCP_SAP_DELAY_RPT_INTV_MS_10240, |
| 336 | EPDCP_SAP_DELAY_RPT_INTV_PAD = 0x7fffffff |
| 337 | } epdcp_delay_rpt_intv_enum; |
| 338 | |
| 339 | |
| 340 | /* UDC enum */ |
| 341 | typedef enum |
| 342 | { |
| 343 | EPDCP_SAP_UDC_BUF_SZ_KBYTE_2 = 0, |
| 344 | EPDCP_SAP_UDC_BUF_SZ_KBYTE_4, |
| 345 | EPDCP_SAP_UDC_BUF_SZ_KBYTE_8, |
| 346 | |
| 347 | EPDCP_SAP_UDC_BUF_SZ_KBYTE_PAD = 0x7fffffff |
| 348 | } epdcp_udc_buf_sz_enum; |
| 349 | |
| 350 | typedef enum |
| 351 | { |
| 352 | EPDCP_SAP_UDC_DIC_INVALID = 0, |
| 353 | EPDCP_SAP_UDC_DIC_STANDARD, |
| 354 | EPDCP_SAP_UDC_DIC_OPERATOR, |
| 355 | |
| 356 | EPDCP_SAP_UDC_DIC_PAD = 0x7fffffff |
| 357 | } epdcp_udc_dic_enum; |
| 358 | |
| 359 | |
| 360 | /* discard timer enum */ |
| 361 | typedef enum |
| 362 | { |
| 363 | EPDCP_SAP_DISC_TMR_MS_50 = 0, |
| 364 | EPDCP_SAP_DISC_TMR_MS_100, |
| 365 | EPDCP_SAP_DISC_TMR_MS_150, |
| 366 | EPDCP_SAP_DISC_TMR_MS_300, |
| 367 | EPDCP_SAP_DISC_TMR_MS_500, |
| 368 | EPDCP_SAP_DISC_TMR_MS_750, |
| 369 | EPDCP_SAP_DISC_TMR_MS_1500, |
| 370 | EPDCP_SAP_DISC_TMR_MS_INFINITY, |
| 371 | |
| 372 | EPDCP_SAP_DISC_TMR_MS_PAD = 0x7fffffff |
| 373 | } epdcp_disc_tmr_enum; |
| 374 | |
| 375 | typedef enum |
| 376 | { |
| 377 | EPDCP_SAP_ROHC_EN_DISABLED = 0, |
| 378 | EPDCP_SAP_ROHC_EN_ENABLED_BIDIR, |
| 379 | EPDCP_SAP_ROHC_EN_ENABLED_UL_ONLY |
| 380 | } epdcp_rohc_en_enum; |
| 381 | |
| 382 | typedef enum |
| 383 | { |
| 384 | EPDCP_SAP_DRB_TYPE_LTE = 0, |
| 385 | EPDCP_SAP_DRB_TYPE_LWA |
| 386 | } epdcp_drb_type_enum; |
| 387 | |
| 388 | typedef enum |
| 389 | { |
| 390 | EPDCP_SAP_STUS_PDU_ON_POLL_TYPE_1 = 0, |
| 391 | EPDCP_SAP_STUS_PDU_ON_POLL_TYPE_2 |
| 392 | } epdcp_stus_rpt_type_on_poll_enum; |
| 393 | |
| 394 | /* DRB direction definition */ |
| 395 | #define EPDCP_DRB_DIR_UL (0x01) |
| 396 | #define EPDCP_DRB_DIR_DL (0x02) |
| 397 | #define EPDCP_DRB_DIR_ULDL (EPDCP_DRB_DIR_UL | EPDCP_DRB_DIR_DL) |
| 398 | |
| 399 | /***************************************************************************** |
| 400 | * structures |
| 401 | *****************************************************************************/ |
| 402 | |
| 403 | typedef struct |
| 404 | { |
| 405 | /* polling param */ |
| 406 | kal_bool type_on_poll_valid; |
| 407 | epdcp_stus_rpt_type_on_poll_enum type_on_poll; |
| 408 | |
| 409 | /* periodic param */ |
| 410 | kal_bool type1_periodicity_valid; |
| 411 | kal_bool type2_periodicity_valid; |
| 412 | kal_bool offset_valid; |
| 413 | kal_bool type1_periodicity_recfg; |
| 414 | kal_bool type2_periodicity_recfg; |
| 415 | kal_uint32 type1_periodicity; |
| 416 | kal_uint32 type2_periodicity; |
| 417 | kal_uint32 offset; |
| 418 | } epdcp_stus_rpt_param_struct; |
| 419 | |
| 420 | /* PDCP-config (RB property) */ |
| 421 | typedef struct |
| 422 | { |
| 423 | epdcp_drb_type_enum drb_type; |
| 424 | kal_uint8 flag_rlc_um; |
| 425 | kal_uint8 flag_um_long_sn; // UM only |
| 426 | kal_uint8 bmp_um_dir; // UM only : bit#0:UL, bit#1:DL |
| 427 | |
| 428 | |
| 429 | kal_uint8 flag_am_stus_rpt; // AM only |
| 430 | kal_uint8 flag_am_long_sn; // AM only |
| 431 | kal_bool flag_am_rlc_li_field_15_bit; // AM only |
| 432 | kal_uint8 pad1; |
| 433 | |
| 434 | epdcp_rohc_en_enum rohc_enabled; |
| 435 | kal_uint16 rohc_max_cid; |
| 436 | kal_uint8 rohc_profs[EPDCP_SAP_MAX_NUM_ROHC_PROF]; |
| 437 | |
| 438 | kal_bool udc_enabled; |
| 439 | epdcp_udc_buf_sz_enum udc_buf_sz; |
| 440 | epdcp_udc_dic_enum udc_dic; |
| 441 | |
| 442 | kal_bool reorder_tmr_is_valid; |
| 443 | kal_uint32 reorder_tmr; |
| 444 | epdcp_disc_tmr_enum disc_tmr; // spec-enum |
| 445 | |
| 446 | epdcp_stus_rpt_param_struct stus_rpt_param; |
| 447 | } epdcp_drb_attr_struct; |
| 448 | |
| 449 | |
| 450 | /* RB addition/modification config structure */ |
| 451 | typedef struct |
| 452 | { |
| 453 | kal_uint8 rb_idx; //primary index |
| 454 | kal_uint8 rb_id; |
| 455 | kal_uint8 eps_br_id; |
| 456 | kal_uint8 qci; |
| 457 | kal_bool is_gbr_bearer; |
| 458 | |
| 459 | epdcp_rb_cmd_enum cmd; |
| 460 | epdcp_drb_attr_struct drb_attr; |
| 461 | } epdcp_rb_addmod_struct; |
| 462 | |
| 463 | |
| 464 | /* RB deletion config */ |
| 465 | typedef struct |
| 466 | { |
| 467 | kal_uint8 rb_idx; |
| 468 | kal_uint8 rb_id; |
| 469 | kal_uint8 ho_failure; //if failure, remove the new RB. |
| 470 | kal_uint8 pad; |
| 471 | |
| 472 | epdcp_rb_cmd_enum cmd; |
| 473 | } epdcp_rb_del_struct; |
| 474 | |
| 475 | |
| 476 | /* PDCP security config structure */ |
| 477 | typedef struct |
| 478 | { |
| 479 | kal_uint8 valid; |
| 480 | kal_uint8 cip_key_up_idx; |
| 481 | kal_uint8 cip_key_cp_idx; |
| 482 | kal_uint8 int_key_idx; |
| 483 | epdcp_int_alg_enum int_alg; //integrity algorithm |
| 484 | epdcp_cip_alg_enum cip_alg; //cipher algorithm |
| 485 | } epdcp_sec_cfg_struct; |
| 486 | |
| 487 | |
| 488 | /* queuing delay result structure */ |
| 489 | typedef struct |
| 490 | { |
| 491 | kal_uint8 qci; |
| 492 | kal_uint32 excess_delay_num; |
| 493 | kal_uint32 total_num; |
| 494 | } epdcp_delay_result_struct; |
| 495 | |
| 496 | |
| 497 | /* PDCP queuing delay config structure */ |
| 498 | typedef struct{ |
| 499 | kal_bool valid; |
| 500 | epdcp_delay_measurement_enum measurement_status; // if valid=false, delay_theshold and delay_report_interval should be ignored |
| 501 | epdcp_delay_thresh_enum threshold; |
| 502 | epdcp_delay_rpt_intv_enum report_interval; |
| 503 | } epdcp_delay_cfg_struct; |
| 504 | |
| 505 | |
| 506 | /* RB loopback config structure */ |
| 507 | typedef struct |
| 508 | { |
| 509 | kal_uint8 rb_idx; //RB index |
| 510 | kal_uint8 rb_id; |
| 511 | kal_uint8 pad; |
| 512 | |
| 513 | kal_uint8 scaling; //need scaling or not? |
| 514 | kal_uint16 size; //scaling size |
| 515 | } epdcp_rb_lbcfg_struct; |
| 516 | |
| 517 | |
| 518 | /* RB COUNT info structure */ |
| 519 | typedef struct |
| 520 | { |
| 521 | kal_uint8 rb_idx; //RB index |
| 522 | kal_uint8 rb_id; |
| 523 | kal_uint16 pad; |
| 524 | |
| 525 | kal_uint32 rx_count; //HFN + SN |
| 526 | kal_uint32 tx_count; //HFN + SN |
| 527 | } epdcp_rb_cntinfo_struct; |
| 528 | |
| 529 | typedef struct |
| 530 | { |
| 531 | kal_uint8 mbsfn_area_id; // 0~255 |
| 532 | kal_uint8 mcch_idx; //numbered by eRRC(not from NW), range 0~7 |
| 533 | }epdcp_mcch_add_struct; |
| 534 | |
| 535 | typedef struct |
| 536 | { |
| 537 | kal_uint8 mbsfn_area_id; // 0~255, currently for debug purpose only |
| 538 | kal_uint8 mcch_idx; |
| 539 | }epdcp_mcch_del_struct; |
| 540 | |
| 541 | typedef struct |
| 542 | { |
| 543 | kal_uint8 mbsfn_area_id; |
| 544 | kal_uint8 pmch_id; //0~15 |
| 545 | kal_uint16 sessionId; // 0xFFFF means no configure session id |
| 546 | kal_uint8 TMGI[6]; |
| 547 | kal_uint8 lc_id; //0~28 |
| 548 | kal_uint8 mrb_idx; //numbered by eRRC(not from NW), range depends on L2 HW capability |
| 549 | }epdcp_mrb_add_struct; |
| 550 | |
| 551 | typedef struct |
| 552 | { |
| 553 | kal_uint8 mbsfn_area_id; //currently for debug usage only |
| 554 | kal_uint8 pmch_id; //0~15, currently for debug usage only |
| 555 | kal_uint16 sessionId; //currently for debug usage only |
| 556 | kal_uint8 TMGI[6]; //currently for debug usage only |
| 557 | kal_uint8 lc_id; //0~28, currently for debug usage only |
| 558 | kal_uint8 mrb_idx; |
| 559 | }epdcp_mrb_del_struct; |
| 560 | |
| 561 | /***************************************************************************** |
| 562 | * message structure |
| 563 | *****************************************************************************/ |
| 564 | |
| 565 | //MSG_ID_ERRC_EPDCP_CONFIG_REQ, |
| 566 | typedef struct |
| 567 | { |
| 568 | LOCAL_PARA_HDR |
| 569 | |
| 570 | kal_uint8 add_num; |
| 571 | kal_uint8 mod_num; |
| 572 | kal_uint8 del_num; |
| 573 | kal_bool drb_continue_rohc; |
| 574 | |
| 575 | epdcp_rb_addmod_struct rb_add[EPDCP_SAP_MAX_NUM_CFG_RB]; |
| 576 | epdcp_rb_addmod_struct rb_mod[EPDCP_SAP_MAX_NUM_CFG_RB]; |
| 577 | epdcp_rb_del_struct rb_del[EPDCP_SAP_MAX_NUM_CFG_RB]; |
| 578 | |
| 579 | epdcp_sec_cfg_struct sec_cfg; |
| 580 | epdcp_delay_cfg_struct delay_cfg; |
| 581 | |
| 582 | //for eMBMS related |
| 583 | kal_uint8 mcch_add_num[MAX_EMBMS_FREQ_SUPPORT]; |
| 584 | kal_uint8 mcch_del_num[MAX_EMBMS_FREQ_SUPPORT]; |
| 585 | epdcp_mcch_add_struct mcch_add[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MCCH_SUPPORT]; |
| 586 | epdcp_mcch_del_struct mcch_del[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MCCH_SUPPORT]; |
| 587 | |
| 588 | kal_uint8 mrb_add_num[MAX_EMBMS_FREQ_SUPPORT]; |
| 589 | kal_uint8 mrb_del_num[MAX_EMBMS_FREQ_SUPPORT]; |
| 590 | epdcp_mrb_add_struct mrb_add[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MRB_SUPPORT]; |
| 591 | epdcp_mrb_del_struct mrb_del[MAX_EMBMS_FREQ_SUPPORT][MAX_EMBMS_MRB_SUPPORT]; |
| 592 | } errc_epdcp_config_req_struct; |
| 593 | |
| 594 | |
| 595 | //MSG_ID_ERRC_EPDCP_CONFIG_CNF, |
| 596 | typedef struct |
| 597 | { |
| 598 | LOCAL_PARA_HDR |
| 599 | |
| 600 | errc_el2_cfg_result_enum result; |
| 601 | } errc_epdcp_config_cnf_struct; |
| 602 | |
| 603 | //MSG_ID_ERRC_EPDCP_SWITCH_VIRTUAL_CONNECTED_REQ |
| 604 | typedef struct |
| 605 | { |
| 606 | LOCAL_PARA_HDR |
| 607 | |
| 608 | errc_el2_switch_virtual_connected_enum status; |
| 609 | } errc_epdcp_switch_virtual_connected_req_struct; |
| 610 | |
| 611 | /* |
| 612 | * MSG_ID_ERRC_EPDCP_DCCH_DATA_REQ |
| 613 | * |
| 614 | * note: read peer_buffer_pointer to get tgpd pointer. |
| 615 | */ |
| 616 | typedef struct |
| 617 | { |
| 618 | LOCAL_PARA_HDR |
| 619 | |
| 620 | kal_uint8 rb_id; |
| 621 | kal_uint8 rb_idx; |
| 622 | kal_uint16 trans_id; |
| 623 | kal_uint16 flag_bmp; |
| 624 | |
| 625 | void *p_addr; |
| 626 | kal_uint32 data_len; |
| 627 | |
| 628 | // this is used during buffer release |
| 629 | KAL_AFM_ID afm_id; |
| 630 | |
| 631 | } errc_epdcp_dcch_data_req_struct; |
| 632 | |
| 633 | |
| 634 | //MSG_ID_ERRC_EPDCP_DCCH_DATA_CNF, |
| 635 | typedef struct |
| 636 | { |
| 637 | LOCAL_PARA_HDR |
| 638 | |
| 639 | kal_uint8 rb_id; |
| 640 | kal_uint8 rb_idx; |
| 641 | kal_uint16 trans_id; |
| 642 | epdcp_datareq_result_enum result; |
| 643 | } errc_epdcp_dcch_data_cnf_struct; |
| 644 | |
| 645 | |
| 646 | /* |
| 647 | * MSG_ID_ERRC_EPDCP_DCCH_DATA_IND, |
| 648 | * |
| 649 | * note: read peer_buffer_pointer to get rgpd pointer |
| 650 | */ |
| 651 | typedef struct |
| 652 | { |
| 653 | LOCAL_PARA_HDR |
| 654 | |
| 655 | kal_uint8 rb_id; |
| 656 | kal_uint8 rb_idx; |
| 657 | kal_uint16 pad02; |
| 658 | epdcp_intchk_result_enum result; |
| 659 | kal_uint32 pdcp_count; // XXX: not needed if DL security is activated? |
| 660 | void *p_data; |
| 661 | kal_uint32 data_len; // including RRC message & MAC-I |
| 662 | |
| 663 | qbm_gpd *p_rgpd; //TODO: to be removed |
| 664 | } errc_epdcp_dcch_data_ind_struct; |
| 665 | |
| 666 | /* |
| 667 | * MSG_ID_ERRC_EPDCP_MCCH_DATA_IND, |
| 668 | */ |
| 669 | typedef struct |
| 670 | { |
| 671 | LOCAL_PARA_HDR |
| 672 | |
| 673 | kal_uint8 ci; //0~MAX_EMBMS_FREQ_SUPPORT-1 |
| 674 | kal_uint8 mcch_idx; |
| 675 | kal_uint8 mcch_mp_id; |
| 676 | kal_uint8 pad0; |
| 677 | void *p_data; |
| 678 | kal_uint32 data_len; // including RRC message & MAC-I |
| 679 | } errc_epdcp_mcch_data_ind_struct; |
| 680 | |
| 681 | //MSG_ID_ERRC_EPDCP_DCCH_DATA_RES, |
| 682 | typedef struct |
| 683 | { |
| 684 | LOCAL_PARA_HDR |
| 685 | |
| 686 | kal_uint8 rb_id; |
| 687 | kal_uint8 rb_idx; |
| 688 | kal_uint16 pad02; |
| 689 | } errc_epdcp_dcch_data_res_struct; |
| 690 | |
| 691 | |
| 692 | //MSG_ID_ERRC_EPDCP_TEST_REQ, |
| 693 | typedef struct |
| 694 | { |
| 695 | LOCAL_PARA_HDR |
| 696 | |
| 697 | kal_uint8 rb_num; // only valid for mode A |
| 698 | kal_uint8 pad0; |
| 699 | kal_uint16 pad1; |
| 700 | epdcp_rb_lbcfg_struct rb_cfg[EPDCP_SAP_MAX_NUM_DRB]; // only valid for mode A |
| 701 | kal_uint8 mbsfn_area_id; //0~255, only valid for mode C |
| 702 | kal_uint8 pmch_id; //0~15, only valid for mode C |
| 703 | kal_uint8 lcid; //0~28, only valid for mode C |
| 704 | kal_uint8 ci; //0~MAX_EMBMS_FREQ_SUPPORT-1, only valid for mode C |
| 705 | epdcp_lb_cmd_enum cmd; |
| 706 | } errc_epdcp_test_req_struct; |
| 707 | |
| 708 | |
| 709 | //MSG_ID_ERRC_EPDCP_TEST_CNF, |
| 710 | typedef struct |
| 711 | { |
| 712 | LOCAL_PARA_HDR |
| 713 | |
| 714 | errc_el2_cfg_result_enum result; |
| 715 | } errc_epdcp_test_cnf_struct; |
| 716 | |
| 717 | |
| 718 | /* |
| 719 | * MSG_ID_ERRC_EPDCP_CNTINFO_REQ |
| 720 | * |
| 721 | * - null message |
| 722 | */ |
| 723 | typedef struct |
| 724 | { |
| 725 | LOCAL_PARA_HDR |
| 726 | |
| 727 | /* nothing */ |
| 728 | |
| 729 | } errc_epdcp_cntinfo_req_struct; |
| 730 | |
| 731 | |
| 732 | |
| 733 | /* |
| 734 | * MSG_ID_ERRC_EPDCP_CNTINFO_CNF |
| 735 | * |
| 736 | * - return the PDCP COUNT of each DRB |
| 737 | */ |
| 738 | typedef struct |
| 739 | { |
| 740 | LOCAL_PARA_HDR |
| 741 | |
| 742 | kal_uint8 rb_num; |
| 743 | kal_uint8 pad01; |
| 744 | kal_uint16 pad02; |
| 745 | epdcp_rb_cntinfo_struct rb_cntinfo[EPDCP_SAP_MAX_NUM_DRB]; |
| 746 | } errc_epdcp_cntinfo_cnf_struct; |
| 747 | |
| 748 | /* |
| 749 | * MSG_ID_ERRC_EPDCP_DETECTION_TIMER_START_REQ, |
| 750 | * |
| 751 | * note: ERRC configure EPDPC detection timer value |
| 752 | */ |
| 753 | typedef struct |
| 754 | { |
| 755 | LOCAL_PARA_HDR |
| 756 | |
| 757 | kal_uint32 detection_time_value; // in seconds |
| 758 | } errc_epdcp_detection_timer_start_req_struct; |
| 759 | |
| 760 | /* |
| 761 | * MSG_ID_ERRC_EPDCP_DETECTION_TIMER_2_START_REQ, |
| 762 | * |
| 763 | * note: ERRC configure EPDPC detection timer value |
| 764 | */ |
| 765 | typedef struct |
| 766 | { |
| 767 | LOCAL_PARA_HDR |
| 768 | |
| 769 | kal_uint32 detection_time_value; // in seconds |
| 770 | } errc_epdcp_detection_timer_2_start_req_struct; |
| 771 | |
| 772 | |
| 773 | /* |
| 774 | * MSG_ID_ERRC_EPDCP_PS_DATA_INACTIVE_TIME_IND, |
| 775 | * |
| 776 | * note: EPDCP response ERRC the inactive time of last PS data |
| 777 | */ |
| 778 | typedef struct |
| 779 | { |
| 780 | LOCAL_PARA_HDR |
| 781 | |
| 782 | kal_uint32 inactive_time; |
| 783 | } errc_epdcp_ps_data_inactive_time_ind_struct; |
| 784 | |
| 785 | |
| 786 | /* |
| 787 | * MSG_ID_ERRC_EPDCP_MTCH_PC_CNF |
| 788 | * |
| 789 | * - return the PDCP COUNT of each DRB |
| 790 | */ |
| 791 | typedef struct |
| 792 | { |
| 793 | LOCAL_PARA_HDR |
| 794 | |
| 795 | kal_uint32 packet_count; |
| 796 | } errc_epdcp_mtch_pc_cnf_struct; |
| 797 | |
| 798 | |
| 799 | /* |
| 800 | * MSG_ID_ERRC_EPDCP_EXCESS_DELAY_IND |
| 801 | */ |
| 802 | typedef struct |
| 803 | { |
| 804 | LOCAL_PARA_HDR |
| 805 | |
| 806 | kal_uint8 list_num; |
| 807 | epdcp_delay_result_struct result_list[EPDCP_SAP_MAX_NUM_QUEUING_DELAY_RSLT]; |
| 808 | epdcp_delay_thresh_enum threshold; |
| 809 | epdcp_delay_rpt_intv_enum report_interval; |
| 810 | } errc_epdcp_excess_delay_ind_struct; |
| 811 | |
| 812 | #endif //_LTE_ERRC_EPDCP_SAP_STRUCT_DEF_H_ |