mcu/service/nvram/src/nvram_cl1def.c

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/*******************************************************************************
 *
 * Filename:
 * ---------
 * nvram_cl1def.c
 *
 * Project:
 * --------
 * 93
 *
 * Description:
 * ------------
 * Interface Implementation provided to NVRAM.
 *
 *               
 * Author:
 * -------
 * 
 *
 *==============================================================================
 *             HISTORY
 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *------------------------------------------------------------------------------
 *
 *
 *------------------------------------------------------------------------------
 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *==============================================================================
 *******************************************************************************/

#include "kal_public_api.h"
#include "cl1d_rf_common_defs.h"
#include "nvram_enums.h"
#include "cl1_nvram_def.h"
#include "cl1cal_nvram_def.h"
#include "nvram_cl1def.h"
#include "cl1d_rf_cid.h"
#include "cl1d_rf_error_check.h"

/*** Need by getting default item info(lid, item index and size) ***/
typedef struct
{
    nvram_lid_enum lid;
    kal_uint16 rec_idx;
    kal_uint16 rec_num;
    kal_uint32 size;
} CL1D_RF_CUST_DATA_LID_INFO_T;


#undef NVRAM_ITEM_RF_CUST
#undef NVRAM_ITEM_MIPI
#undef NVRAM_ITEM_RF_CAL
#undef NVRAM_ITEM_RF_POC
#undef NVRAM_ITEM_RF_TAS_VAR
#undef NVRAM_ITEM_RF_TAS_ARRAY
#undef NVRAM_ITEM_ELNA_VAR
#undef NVRAM_ITEM_TX_POWER_VAR
#undef NVRAM_ITEM_RF_TAS_TST
#define NVRAM_ITEM_RF_CUST(nAME, aFFIX, rECnUM, tYPE, tYPEnUM, fUNC)        {NVRAM_EF_CL1_##nAME##_LID, aFFIX##_IDX, rECnUM, sizeof(CL1D_RF_##tYPE)*(tYPEnUM)},
#define NVRAM_ITEM_MIPI(nAME, aFFIX, rECnUM, tYPE, tYPEnUM, fUNC)           {NVRAM_EF_CL1_##nAME##_LID, aFFIX##_IDX, rECnUM, sizeof(CL1D_RF_##tYPE)*(tYPEnUM)},
#define NVRAM_ITEM_RF_CAL(nAME, aFFIX, rECnUM, tYPE, tYPEnUM, fUNC)         {NVRAM_EF_CL1CAL_##nAME##_LID, aFFIX##_IDX, rECnUM, sizeof(CL1D_RF_##tYPE)*(tYPEnUM)},
#define NVRAM_ITEM_RF_POC(nAME, aFFIX, rECnUM, tYPE, tYPEnUM, fUNC)         {NVRAM_EF_CL1CAL_##nAME##_LID, aFFIX##_IDX, rECnUM, sizeof(CL1D_RF_##tYPE)*(tYPEnUM)},
#define NVRAM_ITEM_RF_TAS_VAR(nAME, aFFIX, rECnUM, tYPE, tYPEnUM, fUNC)     {NVRAM_EF_CL1_##nAME##_LID, aFFIX##_IDX, rECnUM, sizeof(C2K_CUSTOM_##tYPE)*(tYPEnUM)},
#define NVRAM_ITEM_RF_TAS_ARRAY(nAME, aFFIX, rECnUM, tYPE, tYPEnUM, fUNC)   {NVRAM_EF_CL1_##nAME##_LID, aFFIX##_IDX, rECnUM, sizeof(CL1D_RF_##tYPE)*(tYPEnUM)},
#define NVRAM_ITEM_ELNA_VAR(nAME, aFFIX, rECnUM, tYPE, tYPEnUM, fUNC)       {NVRAM_EF_CL1_##nAME##_LID, aFFIX##_IDX, rECnUM, sizeof(CL1D_RF_##tYPE)*(tYPEnUM)},
#define NVRAM_ITEM_TX_POWER_VAR(nAME, aFFIX, rECnUM, tYPE, tYPEnUM, fUNC)   {NVRAM_EF_CL1_##nAME##_LID, aFFIX##_IDX, rECnUM, sizeof(CL1D_RF_##tYPE)*(tYPEnUM)},
#define NVRAM_ITEM_RF_TAS_TST(nAME, aFFIX, rECnUM, tYPE, tYPEnUM, fUNC)     {NVRAM_EF_CL1_##nAME##_LID, aFFIX##_IDX, rECnUM, sizeof(CL1D_RF_##tYPE)*(tYPEnUM)},

const CL1D_RF_CUST_DATA_LID_INFO_T cl1d_rf_cust_data_lid_info[CL1D_RF_NVRAM_ITEM_MAX_NUM] =
{
    #include "cl1_nvram_id.h"
};

kal_uint16 setIndexDebug=5;
#if (IS_C2K_DRDI_SUPPORT)
static kal_bool cl1d_drdi_had_done = KAL_FALSE;
#endif

const static CL1D_RF_CUST_DATA_SET_INFO_T* set_info_ptr;

#if defined(__MD97__)
#else
extern void CL1D_RF_POC_Data_Default(const kal_int8 rf_band,
    const kal_int8 c2k_band,
    CL1D_RF_POC_FINAL_T *data_out);
#endif
extern void CL1D_RF_DPD_Data_Default(const kal_int8 rf_band,
    const kal_int8 c2k_band,
    CL1D_RF_TX_DPD_AM_PM_LUT_DATA_T *data_out);
extern kal_bool cl1_custom_drdi_enable;

void nvram_CL1D_DrdiPointerInit(kal_uint16 setIdx)
{
    ///TODO: Check setIdx

    set_info_ptr = c1ld_rf_cust_data_drdi_set_ptr[setIdx];
}


void nvram_CL1D_Drdi(void)
{
#if (IS_C2K_DRDI_SUPPORT)
   if(!cl1d_drdi_had_done)
   {
   
   #ifndef MTK_PLT_ON_PC /*This macro will be opened in modis */	
      if(cl1_custom_drdi_enable)
      {
         kal_uint16 setIdx;
         setIdx = MML1_RF_DRDI_Dynamic_GetParamAddr(MML1_RF_C2K);
		 setIndexDebug=setIdx;
         /* set the pointer to RF custom data by set index */
         nvram_CL1D_DrdiPointerInit(setIdx);
      }
      else
      {
         nvram_CL1D_DrdiPointerInit(0);
      }
   #else //Use default setting when in modis.
      nvram_CL1D_DrdiPointerInit(0);
   #endif
   
      cl1d_drdi_had_done = KAL_TRUE;
   }
#else
      nvram_CL1D_DrdiPointerInit(0);
#endif/*IS_3G_DRDI_SUPPORT*/
}

kal_uint32 nvram_CL1D_get_item_idx(nvram_lid_enum lid, kal_uint16 rec_idx, kal_uint16* rec_amount)
{
    kal_uint32 i;

    for (i = 0; i < CL1D_RF_NVRAM_ITEM_MAX_NUM; i++)
    {
        if (cl1d_rf_cust_data_lid_info[i].lid == lid && cl1d_rf_cust_data_lid_info[i].rec_idx == rec_idx)
        {
            *rec_amount = cl1d_rf_cust_data_lid_info[i].rec_num;
            break;
        }
    }

    return i;
}

void nvram_get_cl1_default_value_to_write(nvram_lid_enum lid, kal_uint8 *buffer, kal_uint16 buffer_size)
{
    kal_uint32 nvram_item_idx;
    kal_uint32 nvram_item_size;
    kal_uint16 rec_idx = 1;
    kal_uint16 rec_num;
    kal_uint16 last_rec_num;
    kal_uint16 last_nvram_item_size;
    kal_bool first_record = TRUE;
    nvram_CL1D_Drdi();

    do
    {
        nvram_item_idx = nvram_CL1D_get_item_idx(lid, rec_idx, &rec_num);
#if defined(__MD93__)||defined(__MD95__)
        EXT_ASSERT(rec_idx <= rec_num, lid, rec_idx, rec_num);
#elif defined(__MD97__)
        if(rec_idx > rec_num){ //check rec_idx valid
#ifndef MTK_PLT_ON_PC /*This macro will be opened in modis */	
            CL1D_ErrorCheck_NVRAM_check_record_index((kal_uint32)lid, (kal_uint32)rec_idx, (kal_uint32)rec_num);
#endif
        }
#endif        
        nvram_item_size = cl1d_rf_cust_data_lid_info[nvram_item_idx].size;
        if(first_record)
        {
           first_record = FALSE;
#if defined(__MD93__)||defined(__MD95__)
           EXT_ASSERT(rec_num * nvram_item_size <= buffer_size, lid, buffer_size, nvram_item_size);
#elif defined(__MD97__)
           if(rec_num * nvram_item_size > buffer_size){ //check buffer size valid
#ifndef MTK_PLT_ON_PC /*This macro will be opened in modis */
                CL1D_ErrorCheck_NVRAM_check_buffer_size((kal_uint32)lid, (kal_uint32)buffer_size, (kal_uint32)nvram_item_size);
#endif
           }
#endif 
        }
        else
        {
           /* Check second record data valid */
#if defined(__MD93__)||defined(__MD95__)
           EXT_ASSERT(last_rec_num == rec_num, lid, last_rec_num, rec_num);
           EXT_ASSERT(last_nvram_item_size == nvram_item_size, lid, last_nvram_item_size, nvram_item_size);
#elif defined(__MD97__)
#ifndef MTK_PLT_ON_PC /*This macro will be opened in modis */
           if(last_rec_num != rec_num){
                CL1D_ErrorCheck_NVRAM_check_record_num_2nd((kal_uint32)lid, (kal_uint32)last_rec_num, (kal_uint32)rec_num);
           }
           
           if(last_nvram_item_size != nvram_item_size){
                CL1D_ErrorCheck_NVRAM_check_item_size_2nd((kal_uint32)lid, (kal_uint32)last_nvram_item_size, (kal_uint32)nvram_item_size);
           }
#endif
#endif           
        }

        last_rec_num = rec_num;
        last_nvram_item_size = nvram_item_size;
        
        kal_mem_cpy((kal_uint8*)buffer + (rec_idx - 1) * nvram_item_size, set_info_ptr[nvram_item_idx], nvram_item_size);

    }while(rec_idx++ < rec_num);
}

kal_int32 nvram_get_cl1_default_band_idx_to_c2k_band(kal_int32 band_idx)
{
    kal_uint32 nvram_item_idx;
    CL1D_RF_CUST_PARAM_T *param_ptr = NULL;
    kal_int32 c2k_band = SYS_BAND_CLASS_NOT_USED;
    kal_uint16 rec_num;
#if defined(__MD93__)||defined(__MD95__)
    ASSERT(band_idx < RF_CUST_SUPPORT_BAND_MAX_NUM);
#elif defined(__MD97__)
    DEBUG_ASSERT(band_idx < RF_CUST_SUPPORT_BAND_MAX_NUM);
#endif

    nvram_CL1D_Drdi();
    nvram_item_idx = nvram_CL1D_get_item_idx(NVRAM_EF_CL1_CUST_PARAM_LID, 1, &rec_num);
    param_ptr = (CL1D_RF_CUST_PARAM_T *)set_info_ptr[nvram_item_idx];

    if (param_ptr->band_support[band_idx].is_supported)
        c2k_band = param_ptr->band_support[band_idx].band_class;

    if (c2k_band > SYS_BAND_CLASS_NOT_USED)
        c2k_band = SYS_BAND_CLASS_NOT_USED;

    return c2k_band;
}

#if defined(__MD97__)
#else
void nvram_get_cl1_poc_default_value_to_write(nvram_lid_enum lid, kal_uint8 *buffer, kal_uint16 buffer_size)
{
#if 0
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
/* under construction !*/
#endif

    kal_uint32 nvram_item_idx;
    kal_int32 band_idx = 0;
    kal_int32 c2k_band;
    kal_uint16 rec_num, last_rec_num;
    do
    {
        nvram_item_idx = nvram_CL1D_get_item_idx(NVRAM_EF_CL1CAL_POC_FINAL_LID, (band_idx + 1), &rec_num);
        c2k_band = nvram_get_cl1_default_band_idx_to_c2k_band(band_idx);
        CL1D_RF_POC_Data_Default(band_idx, c2k_band, set_info_ptr[nvram_item_idx]);

        if(band_idx != 0)
            EXT_ASSERT(last_rec_num == rec_num, band_idx, last_rec_num, rec_num);

        last_rec_num = rec_num;
        band_idx++;
    }while(band_idx < rec_num);
    nvram_get_cl1_default_value_to_write(lid, buffer, buffer_size);
}
#endif

void nvram_get_cl1_1xrtt_dpd_am_pm_default_value_to_write(nvram_lid_enum lid, kal_uint8 *buffer, kal_uint16 buffer_size)
{
    kal_uint32 nvram_item_idx;
    kal_int32 band_idx = 0;
    kal_int32 c2k_band;
    kal_uint16 rec_num, last_rec_num;
    do
    {
        nvram_item_idx = nvram_CL1D_get_item_idx(NVRAM_EF_CL1CAL_TX_DPD_AM_PM_COMP_1XRTT_LID, (band_idx + 1), &rec_num);
        c2k_band = nvram_get_cl1_default_band_idx_to_c2k_band(band_idx);
        CL1D_RF_DPD_Data_Default(band_idx, c2k_band, set_info_ptr[nvram_item_idx]);

        
#if defined(__MD93__)||defined(__MD95__)
        if(band_idx != 0){
            EXT_ASSERT(last_rec_num == rec_num, band_idx, last_rec_num, rec_num);
        }
#elif defined(__MD97__)
#ifndef MTK_PLT_ON_PC /*This macro will be opened in modis */
        if((band_idx != 0)&&(last_rec_num != rec_num)){
            CL1D_ErrorCheck_NVRAM_check_dpd_1x_default_write((kal_uint32)band_idx, (kal_uint32)last_rec_num, (kal_uint32)rec_num);
        }
#endif
#endif

        last_rec_num = rec_num;
        band_idx++;
    }while(band_idx < rec_num);
    nvram_get_cl1_default_value_to_write(lid, buffer, buffer_size);
}

void nvram_get_cl1_evdo_dpd_am_pm_default_value_to_write(nvram_lid_enum lid, kal_uint8 *buffer, kal_uint16 buffer_size)
{
    kal_uint32 nvram_item_idx;
    kal_int32 band_idx = 0;
    kal_int32 c2k_band;
    kal_uint16 rec_num, last_rec_num;
    do
    {
        nvram_item_idx = nvram_CL1D_get_item_idx(NVRAM_EF_CL1CAL_TX_DPD_AM_PM_COMP_EVDO_LID, (band_idx + 1), &rec_num);
        c2k_band = nvram_get_cl1_default_band_idx_to_c2k_band(band_idx);
        CL1D_RF_DPD_Data_Default(band_idx, c2k_band, set_info_ptr[nvram_item_idx]);

#if defined(__MD93__)||defined(__MD95__)
            if(band_idx != 0){
                EXT_ASSERT(last_rec_num == rec_num, band_idx, last_rec_num, rec_num);
            }
#elif defined(__MD97__)
#ifndef MTK_PLT_ON_PC /*This macro will be opened in modis */
            if((band_idx != 0)&&(last_rec_num != rec_num)){
                CL1D_ErrorCheck_NVRAM_check_dpd_do_default_write((kal_uint32)band_idx, (kal_uint32)last_rec_num, (kal_uint32)rec_num);
            }
#endif
#endif

        last_rec_num = rec_num;
        band_idx++;
    }while(band_idx < rec_num);
    nvram_get_cl1_default_value_to_write(lid, buffer, buffer_size);
}