mcu/interface/service/nvram/csg_nvram_def.h

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/*****************************************************************************
 *
 * Filename:
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 *   MAUI
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 * Description:
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 * Author:
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 *============================================================================
 *             HISTORY
 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
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 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *============================================================================
 ****************************************************************************/
#ifndef __CSG_NVRAM_DEF_H__
#define __CSG_NVRAM_DEF_H__

#ifdef __cplusplus
extern "C"
{
#endif /* __cplusplus */ 


#include "nvram_defs.h"
#include "nvram_enums.h"
#include "ps_public_enum.h"
#include "device.h"
// LID Enums

typedef enum
{
        NVRAM_EF_UE_CSG_LIST_LID        = NVRAM_LID_GRP_CSG(0),  
        NVRAM_EF_CSG_LAST_LID           = NVRAM_LID_GRP_CSG(63)
}nvram_lid_csg_enum;

// VERNO
#if (defined(__3G_CSG_SUPPORT__) || defined(__LTE_RAT__))
#define NVRAM_EF_UE_CSG_LIST_LID_VERNO                       "002"
#define NVRAM_EF_UE_CSG_LIST_LID_HASH                        0x2B76AE90
#endif

#if (defined(__3G_CSG_SUPPORT__) || defined(__LTE_RAT__))

// Size and Total 
#define NVRAM_EF_UE_CSG_SIZE                                   (sizeof(nvram_ef_ue_csg_list_struct))
#define NVRAM_EF_UE_CSG_LIST_SIZE                              2500
#define NVRAM_EF_UE_CSG_LIST_TOTAL                             (1 * NVRAM_DUAL_RECORD)
#define NVRAM_EF_UE_CSG_IMSI_MAX_LEN                           15
#endif

#ifdef __cplusplus
}
#endif 

#endif /* __ASBAND_NVRAM_DEF_H__ */