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rjw6c1fd8f2022-11-30 14:33:01 +08001/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
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7* permission of MediaTek Inc. (C) 2012
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34*****************************************************************************/
35
36/*******************************************************************************
37 * Filename:
38 * ---------
39 * l1sp_el2_struct.h
40 *
41 * Project:
42 * --------
43 * MOLY
44 *
45 * Description:
46 * ------------
47 * message and common structure definition between LTM and EL2 modules.
48 *
49 * Author:
50 * -------
51 * -------
52 *
53 * ==========================================================================
54 * $Log$
55 *
56 * 07 25 2019 ming.lee
57 * [MOLY00418206] [NMAC-H]VoNR enhancement
58 * EWSP0000028893
59 *
60 * 07 03 2019 ming.lee
61 * [MOLY00418206] [NMAC-H]VoNR enhancement
62 * SWRD domain
63 *
64 * 08 24 2017 jia-shi.lin
65 * [MOLY00273519] [MT6763] volte data prediction design change
66 * volte data prediction design change
67 *
68 * 07 26 2017 jia-shi.lin
69 * [MOLY00266995] [MT6763] add normal mode for AAM report
70 * add normal mode for AAM report
71 *
72 * 05 23 2017 fu-shing.ju
73 * [MOLY00241210] [6293][Speech Driver]EVS Speech Driver
74 * EVS speech driver.
75 *
76 * 10 28 2016 jia-shi.lin
77 * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
78 * emac timing report for volte dsp
79 *
80 * 10 28 2016 fu-shing.ju
81 * [MOLY00210308] [93MD]early porting.
82 * Modify AAM interface.
83 *
84 * 06 10 2015 fu-shing.ju
85 * [MOLY00091627] TK6291 development
86 * Add time information in l1sp_emac_volte_timing_info_struct.
87 ****************************************************************************/
88
89
90#ifndef _L1SP_EL2_STRUCT_H_
91#define _L1SP_EL2_STRUCT_H_
92
93/*
942017/03/14 Add comment to clarify interface
95
961. drx_period
97This field is same with long cycle period defined in 3GPP spec.
98The value means how often UE need to wake-up, 0 = no DRX configuration, possible value are 10,20,32,40,64,80,128,160,256,320,512,640,1024,1280,2048,2560.
99
1002. sr_period
101The value means how often UE can send SR, possible value are 1,2,5,10,20,40,80.
102This field value will be modified when this change will reduce UE power-consumption.
103When VSR is trigger, sr_period will possibly change into 20/40 ms in silence mode and 20ms in talking mode.
104When EVSR is trigger, sr_period will possibly change into 40ms in talking mode.
105
106 a. VSR
107 If DRX cycle < 20 ms || DRX cycle < SR period
108 Do not trigger VSR. use original SR period.
109 If DRX cycle < 40ms
110 If SR period >= 20 then use SR period, otherwise set period=20
111 If DRX cycle >= 40ms
112 Silence: if SR period >= 40 then use SR period, otherwise set period=40
113 Talking: if SR period >= 20 then use SR period, otherwise set period=20
114 b. eVSR
115 b.1 Base condition
116 CDRX cycle length == 40ms && SR periodicity < 40ms
117 b.2 Dynamic start condition
118 UL grant received in on duration && UL grant TBS > threshold for consecutive NSTART times
119 b.3 Dynamic stop condition
120 Data exists in VoLTE RB > 30ms
121
122 If (b.1 && b.2 && !b.3)
123 Talking mode will also set SR period = 40.
124
1253. time_to_next_on
126Define as the time duration between current time and next DRX on duration (wake-up).
127
1284. time_to_trigger_sr
129Define as the time duration between current time and next SR.
130
1315. current_time_us
132Define as current time that use ust_get_current_time to get.
133*/
134#include "kal_public_api.h"
135
136typedef enum{
137 SP4G_AAMPLUS_STA_SILENCE = 0,
138 SP4G_AAMPLUS_STA_TALK,
139 SP4G_AAMPLUS_STA_SID_FIRST
140}SP4G_AAMPlus_State_t;
141
142typedef enum{
143 L1SP_EMAC_REPORT_MODE_SR_0_AFTER_HO = 0,
144 L1SP_EMAC_REPORT_MODE_NORMAL = 1
145}l1sp_emac_report_mode_e;
146
147typedef struct{
148 LOCAL_PARA_HDR
149 //raw information from speech driver
150 SP4G_AAMPlus_State_t silence_talk;
151 kal_uint32 notify_to_data_ms;
152 kal_uint32 issue_time;
153}l1sp_emac_volte_notify_mode_change_struct;
154
155typedef l1sp_emac_volte_notify_mode_change_struct l1sp_nmac_vonr_notify_mode_change_struct;
156
157typedef struct{
158 LOCAL_PARA_HDR
159
160 //to indicate if the RAT is activated for IMS call
161 kal_bool is_lch_on_for_voice;
162
163 //raw information from eMAC
164 kal_uint32 RX_period; //ms
165 kal_uint32 TX_period; //ms
166 kal_uint32 time2nextRX; //ms
167 kal_uint32 time2nextTX; //ms
168 kal_uint32 issueTime; //ms
169}l1sp_emac_resync_info_struct;
170
171typedef l1sp_emac_resync_info_struct l1sp_nr_resync_info_struct;
172
173typedef struct{
174 kal_uint32 drx_period;
175 kal_uint32 sr_period;
176 kal_uint32 time_to_next_on;
177 kal_uint32 time_to_trig_sr;
178 kal_uint32 current_time_us;
179}l1sp_emac_volte_timing_info_struct;
180
181#endif /* ----- #ifndef _L1SP_EL2_STRUCT_H_ ----- */
182