rjw | 6c1fd8f | 2022-11-30 14:33:01 +0800 | [diff] [blame^] | 1 | /***************************************************************************** |
| 2 | * Copyright Statement: |
| 3 | * -------------------- |
| 4 | * This software is protected by Copyright and the information contained |
| 5 | * herein is confidential. The software may not be copied and the information |
| 6 | * contained herein may not be used or disclosed except with the written |
| 7 | * permission of MediaTek Inc. (C) 2016 |
| 8 | * |
| 9 | * BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES |
| 10 | * THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE") |
| 11 | * RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON |
| 12 | * AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES, |
| 13 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF |
| 14 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT. |
| 15 | * NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE |
| 16 | * SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR |
| 17 | * SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH |
| 18 | * THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO |
| 19 | * NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S |
| 20 | * SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM. |
| 21 | * |
| 22 | * BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE |
| 23 | * LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE, |
| 24 | * AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE, |
| 25 | * OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO |
| 26 | * MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. |
| 27 | * |
| 28 | * THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE |
| 29 | * WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF |
| 30 | * LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND |
| 31 | * RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER |
| 32 | * THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC). |
| 33 | * |
| 34 | *****************************************************************************/ |
| 35 | /************************************************************* |
| 36 | * |
| 37 | * This Software is the property of VIA Telecom, Inc. and may only be used pursuant to a license from VIA Telecom, Inc. |
| 38 | * |
| 39 | * Any unauthorized use inconsistent with the terms of such license is strictly prohibited. |
| 40 | * |
| 41 | * Copyright (c) 2003-2010 VIA Telecom, Inc. All rights reserved. |
| 42 | * |
| 43 | *************************************************************/ |
| 44 | #ifndef FCPDEFS_H |
| 45 | #define FCPDEFS_H |
| 46 | /***************************************************************************** |
| 47 | |
| 48 | FILE NAME: fcpdefs.h |
| 49 | |
| 50 | DESCRIPTION: |
| 51 | |
| 52 | This file contains all the 'hidden' constants and typedefs |
| 53 | that are internal to the FCP task & all its associated modules.. |
| 54 | |
| 55 | |
| 56 | *****************************************************************************/ |
| 57 | |
| 58 | #include "sysapi.h" |
| 59 | #include "cpbuf.h" |
| 60 | #include "do_fcpapi.h" |
| 61 | #include "do_clcapi.h" |
| 62 | #include "do_dsaapi.h" |
| 63 | #include "slc_nvram.h" |
| 64 | |
| 65 | #define PACKET_REC_VALID_SHIFT 31 /* for DRC module to use...*/ |
| 66 | #define DRC0_CT_ISSUE |
| 67 | #define HWD_ST_SYMB_NUM_MASK 0x000007FF |
| 68 | |
| 69 | #ifdef FCP_FTM_DRC_MIPS_BY_PASS |
| 70 | #undef FCP_FTM_DRC_MIPS_BY_PASS |
| 71 | #endif |
| 72 | |
| 73 | #define DRC_SLMS_ON |
| 74 | |
| 75 | #ifdef SYS_OPTION_DRC_DEBUG_ACTIVE |
| 76 | |
| 77 | /* SLMS updating functions: it might be always ON later..*/ |
| 78 | #define DRC_IMP_SPY_ON |
| 79 | #define DRC_ALG_DBG_SPY_ON |
| 80 | #define DEBUG_SLMS |
| 81 | |
| 82 | #endif /* end of SYS_OPTION_DRC_DEBUG_ACTIVE*/ |
| 83 | /*------------------------------------------------------------------------ |
| 84 | * global vaiables.. |
| 85 | *------------------------------------------------------------------------*/ |
| 86 | typedef enum { |
| 87 | |
| 88 | CCM_SUP_TIMER_ID, |
| 89 | |
| 90 | }FcpTimerId; |
| 91 | /*------------------------------------------------------------------------ |
| 92 | * global Typedefs.. |
| 93 | *------------------------------------------------------------------------*/ |
| 94 | typedef struct { |
| 95 | kal_bool formatB; // [0==FormatA; 1==FormatB] |
| 96 | kal_bool encrypted; |
| 97 | }MacPktInfoT; |
| 98 | |
| 99 | typedef struct FwdLinkPkt |
| 100 | { |
| 101 | CpBufferT* CpBufPtr; |
| 102 | |
| 103 | kal_uint16 PktLen; |
| 104 | kal_uint16 PktStartOffset; |
| 105 | kal_uint16 SysTimeInSlots; |
| 106 | kal_uint8 endPoint; |
| 107 | |
| 108 | /* Mac hdr information */ |
| 109 | MacPktInfoT macHdrInfo; |
| 110 | kal_uint8 FwdPhyslots; |
| 111 | kal_uint8 FwdMacPkts; |
| 112 | kal_uint8 FwdPayLoadSize; |
| 113 | DoChanTypeT FwdPhyChanType; |
| 114 | }FwdLinkPktT; |
| 115 | |
| 116 | typedef struct FwdLinkPktBufList |
| 117 | { |
| 118 | FwdLinkPktT *head; |
| 119 | FwdLinkPktT *tail; |
| 120 | kal_uint32 count; |
| 121 | }FwdLinkPktBufListT; |
| 122 | |
| 123 | typedef struct |
| 124 | { |
| 125 | kal_uint32 PacketRec; |
| 126 | kal_uint16 PacketPayload[6]; /* part of payload */ |
| 127 | } DmaMdmRxSlotInfoT; |
| 128 | |
| 129 | typedef struct |
| 130 | { |
| 131 | kal_uint32 DmaRxStatus; |
| 132 | DmaMdmRxSlotInfoT PacketInfo[RX_MDM_INT_INTERVAL]; |
| 133 | } DmaMdmRxInfoT; |
| 134 | |
| 135 | typedef struct |
| 136 | { |
| 137 | /* temp structure, need work with FTAP */ |
| 138 | kal_uint16 FixedTxDrcValue; |
| 139 | kal_uint16 DrcMode; |
| 140 | } FtmFtapDrcAckConfigT; |
| 141 | |
| 142 | /* DRC ETS message */ |
| 143 | typedef struct |
| 144 | { |
| 145 | kal_uint16 DesigDRC; |
| 146 | kal_uint16 MaxDRCLim; |
| 147 | kal_uint16 Data_3; |
| 148 | kal_uint16 Data_4; |
| 149 | |
| 150 | } FtmDRCEtsMsgT; |
| 151 | |
| 152 | typedef enum |
| 153 | { |
| 154 | RXSD_FIR_AUTO, |
| 155 | RXSD_FIR_DEFAULT, |
| 156 | RXSD_FIR_POKE_HW |
| 157 | }RxsdFirTapTestModeT; |
| 158 | typedef enum |
| 159 | { |
| 160 | RMC_MMSE_MRC_AUTO, |
| 161 | RMC_FORCE_MRC |
| 162 | }RmcMmseMrcT; |
| 163 | |
| 164 | |
| 165 | typedef enum |
| 166 | { |
| 167 | ETS_FIX_TXDRC_SET = 0, |
| 168 | ETS_FIX_TXDRC_DISABLE = 1 |
| 169 | }FcpTestFixDrcValModeT; |
| 170 | |
| 171 | typedef struct |
| 172 | { |
| 173 | FcpTestFixDrcValModeT EtsFixDrcValMode; |
| 174 | kal_uint8 EtsFixDrcVal; |
| 175 | } FcpTestFixDrcValMsgT; |
| 176 | |
| 177 | typedef enum |
| 178 | { |
| 179 | FCP_STAT_PERIOD_128_FRAME = 128, |
| 180 | FCP_STAT_PERIOD_256_FRAME = 256, |
| 181 | FCP_STAT_PERIOD_512_FRAME = 512, |
| 182 | FCP_STAT_PERIOD_1024_FRAME = 1024 |
| 183 | }FcpPerfStatPeriodTypeT; |
| 184 | |
| 185 | typedef struct |
| 186 | { |
| 187 | FcpPerfStatPeriodTypeT EtsStatPeriod; |
| 188 | } FcpSetPerfStatPeriodMsgT; |
| 189 | |
| 190 | typedef enum |
| 191 | { |
| 192 | BATI_MATCH, |
| 193 | BATI_MISMATCH, |
| 194 | NON_BATI_MATCH, |
| 195 | NON_BATI_MISMATCH |
| 196 | }ATIMatchStatus; |
| 197 | |
| 198 | /* FTM states */ |
| 199 | typedef enum |
| 200 | { |
| 201 | Inactive = 0, |
| 202 | Variable_Rate, |
| 203 | Fixed_Rate |
| 204 | }FTMStateTypeT; |
| 205 | |
| 206 | typedef struct |
| 207 | { |
| 208 | kal_uint8 DRCLength; /* real DRCLength = 2^DRCLength */ |
| 209 | kal_uint8 DRCChannelGain; |
| 210 | kal_uint8 ACKChannelGain; |
| 211 | kal_uint8 DRCCover; |
| 212 | kal_uint8 FixedDRCRate; |
| 213 | }FTMParametersT; |
| 214 | |
| 215 | |
| 216 | /******************************************************** |
| 217 | * Enhanced FTM SC |
| 218 | ********************************************************/ |
| 219 | |
| 220 | typedef struct |
| 221 | { |
| 222 | kal_uint8 SubType; /* Default*/ |
| 223 | kal_uint8 DRCGating;/*default*/ |
| 224 | kal_uint8 DRCLockLength; /* Default*/ |
| 225 | kal_uint8 SofterHandoffDelay; /* default:non public */ |
| 226 | kal_uint8 SoftHandoffDelay;/* default: non public */ |
| 227 | kal_uint16 NullRateDRC384Enable;/* Default Only*/ |
| 228 | kal_uint16 DRCLockPeriod;/* Default only*/ |
| 229 | kal_uint8 MultiUserPacketsEnabled; |
| 230 | kal_uint8 DSCLength; |
| 231 | kal_uint8 DeltaACKChannelGainMUP; |
| 232 | kal_uint8 ShortPacketsEnableThresh; |
| 233 | kal_uint8 SingleUserMultiplexPacketsEnabled; |
| 234 | kal_uint8 DRCSupervisionTimer; |
| 235 | kal_uint8 MinimumContinuationSpan; |
| 236 | kal_uint8 DSCChannelGainBoost; |
| 237 | kal_uint8 DSCBoostLength; |
| 238 | kal_uint8 DRCChannelGainBoost; |
| 239 | kal_uint8 DRCOffset[15];/* DRCOffset:1 - 14, 0 is invalid */ |
| 240 | } FTMAttributeT; |
| 241 | |
| 242 | typedef struct |
| 243 | { |
| 244 | FTMAttributeT FTMAttributes; |
| 245 | FTMParametersT FTMParameter; |
| 246 | }FTMPersonalityInfoT; |
| 247 | |
| 248 | |
| 249 | #define FTMDataTypeT FTMPersonalityInfoT |
| 250 | |
| 251 | |
| 252 | /* AttributeId */ |
| 253 | typedef enum |
| 254 | { |
| 255 | FTM_DEFAULT_DRC_GATING_ATTRIBID = 0xff, |
| 256 | FTM_DEFAULT_NULL_RATE_ATTRIBID = 0xfd, |
| 257 | FTM_DEFAULT_DRC_LOCK_ATTRIBID=0x01, |
| 258 | FTM_DEFAULT_HANDOFF_DELAY_ATTRIBID=0x00 |
| 259 | } FtmDefaultAttribIdT; |
| 260 | |
| 261 | typedef enum |
| 262 | { |
| 263 | FTM_ENHANCE_DRC_GATING_ATTRIBID=0xff, |
| 264 | FTM_ENHANCE_DRC_LOCK_LEN_ATTRIBID=0xfe, |
| 265 | FTM_ENHANCE_MUL_USR_PKT_EN_ATTRIBID=0xfd, |
| 266 | FTM_ENHANCE_DSC_LEN_ATTRIBID=0xfc, |
| 267 | FTM_ENHANCE_DELTA_ACK_CHAN_GAIN_MUP_ATTRIBID=0xfb, |
| 268 | FTM_ENHANCE_SHORT_PKT_EN_THRESH_ATTRIBID=0xfa, |
| 269 | FTM_ENHANCE_SINGLE_USR_MUL_PKT_EN_ATTRIBID=0xf9, |
| 270 | FTM_ENHANCE_DRC_SUPERVISION_TIMER_ATTRIBID=0xf8, |
| 271 | FTM_ENHANCE_MIN_CON_TIMER_ATTRIBID=0xf7, |
| 272 | FTM_ENHANCE_DSC_CH_GAIN_BOOST_ATTRIBID=0xf6, |
| 273 | FTM_ENHANCE_DSC_BOOST_LEN_ATTRIBID=0xf5, |
| 274 | FTM_ENHANCE_DRC_CH_GAIN_BOOST_ATTRIBID=0xf4, |
| 275 | FTM_ENHANCE_DRC_BOOST_LEN_ATTRIBID=0xf3, |
| 276 | |
| 277 | FTM_ENHANCE_HANDOFF_DELAY_ATTRIBID=0x00, |
| 278 | FTM_ENHANCE_DRC_TRANS_OFFSET_ATTRIBID=0x01 |
| 279 | }FtmEnhanceAttribIdT; |
| 280 | |
| 281 | typedef enum |
| 282 | { |
| 283 | FTM_DRC_GATING_CONTINUOUS=0, |
| 284 | FTM_DRC_GATING_DISCONTINUOUS, |
| 285 | } FtmDrcGatingT; |
| 286 | |
| 287 | typedef enum |
| 288 | { |
| 289 | FTM_DRC_LOCK_LENGHT_8=0, |
| 290 | FTM_DRC_LOCK_LENGHT_16, |
| 291 | FTM_DRC_LOCK_LENGHT_32, |
| 292 | FTM_DRC_LOCK_LENGHT_64 |
| 293 | } FtmDrcLockLengthT; |
| 294 | |
| 295 | typedef enum |
| 296 | { |
| 297 | FTM_SHORT_PKT_EN_THRESH_1024, |
| 298 | FTM_SHORT_PKT_EN_THRESH_2048, |
| 299 | FTM_SHORT_PKT_EN_THRESH_3072, |
| 300 | FTM_SHORT_PKT_EN_THRESH_4096 |
| 301 | }FtmShortPacketsEnabledThreshT; |
| 302 | |
| 303 | |
| 304 | #define FWDLINKPKTT_SIZE sizeof(FwdLinkPktT) |
| 305 | #define NUM_MAC_FWDLIST_NODES 100 |
| 306 | #define NUM_PCP_FWDLIST_NODES 100 |
| 307 | #define NUM_CRCPASS_NUM 100 |
| 308 | |
| 309 | |
| 310 | /*------------------------------------------------------------------------ |
| 311 | * global defines.. |
| 312 | *------------------------------------------------------------------------*/ |
| 313 | #define DMA_RX_PTR_BASE 0x0B450000 |
| 314 | #define DMA_RX_PRM_BASE 0x0B450000 |
| 315 | |
| 316 | #define CRC_VALID 0x00000008 |
| 317 | #define VALID_PKT 0x80000000 |
| 318 | #define GOOD_PKT 0x40000000 |
| 319 | #define MAC_INDEX 0x1FC00000 |
| 320 | #define DMA_LENGTH 0x00038000 |
| 321 | #define CRC_TYPE 0x00004000 |
| 322 | |
| 323 | #define SYNC_CAPSULE_BIT 0x80 |
| 324 | #define FIRST_PACKET 0x40 |
| 325 | #define LAST_PACKET 0x20 |
| 326 | #define CCM_OFFSET 0x18 |
| 327 | #define SLP_STATE_CAPSULE_DONE 0x04 |
| 328 | |
| 329 | #define SEC_LAYER_FORMAT_BIT 0x80 |
| 330 | #define CONN_LAYER_FORMAT_BIT 0x40 |
| 331 | #define ATI_MASK_2BITS 0x03 |
| 332 | |
| 333 | #define TRAFFIC_CH_CONNECTION_LAYER_FORMAT_BIT 0x80 |
| 334 | #define TRAFFIC_CH_MAC_LAYER_FORMAT_BIT 0x40 |
| 335 | #define TRAFFIC_CH_MAC_LAYER_PHY2_TRAILER 0xC0 |
| 336 | #define PACKET_REC_MPA_SPY_SIZE 32 |
| 337 | #define DRC_SLOT_INVALID 0 |
| 338 | #define DRC_SLOT_CCH_DATA 2 |
| 339 | #define DRC_SLOT_SINGLE_USER_SIMPLEX 1 |
| 340 | #define DRC_SLOT_SINGLE_USER_MULPLEX 3 |
| 341 | #define DRC_SLOT_MULTI_USER 5 |
| 342 | |
| 343 | #define MEM_LEAK_CHK_ALLOC { \ |
| 344 | extern kal_int32 FwdPktListBufferCnt; \ |
| 345 | FwdPktListBufferCnt++; \ |
| 346 | dhl_print ("FwdListBufferCnt: %x", FwdPktListBufferCnt); \ |
| 347 | }\ |
| 348 | |
| 349 | |
| 350 | #define MEM_LEAK_CHK_FREE { \ |
| 351 | extern kal_int32 FwdPktListBufferCnt; \ |
| 352 | FwdPktListBufferCnt--; \ |
| 353 | dhl_print ("FwdListBufferCnt: %x", FwdPktListBufferCnt); \ |
| 354 | }\ |
| 355 | |
| 356 | #define CPBUF_LEAK_CHK_ALLOC( Buf) { \ |
| 357 | dhl_print ("CpBuf:RefCnt:%x Addr: %x", Buf->refcount, Buf->dataPtr); \ |
| 358 | }\ |
| 359 | |
| 360 | |
| 361 | #define CPBUF_LEAK_CHK_FREE( Buf) { \ |
| 362 | dhl_print ("CpBuf:RefCnt:%x Addr:%x", Buf->refcount, Buf->dataPtr); \ |
| 363 | }\ |
| 364 | |
| 365 | |
| 366 | #define PRINT_MAC_PKT_INFO { \ |
| 367 | MonPrintf("NewPktInfo: Len:%x", length); \ |
| 368 | MonPrintf("NewPktInfo: FormatB:%x",newPkt->macHdrInfo.formatB); \ |
| 369 | MonPrintf("NewPktInfo: Ency:%x",newPkt->macHdrInfo.encrypted); \ |
| 370 | MonPrintf("NewPktInfo: PktStartOffset:%x",newPkt->PktStartOffset); \ |
| 371 | } \ |
| 372 | |
| 373 | /**********************************************************/ |
| 374 | /* These MACROs are used to parse the Fwd MAC Packets */ |
| 375 | /* Subtype 2. */ |
| 376 | /**********************************************************/ |
| 377 | #define SU_SIMPLEX_B 0xC0 |
| 378 | #define SU_SIMPLEX_A 0x40 |
| 379 | #define SU_MULTIPLEX 0x80 |
| 380 | #define MULT_USR 0x00 |
| 381 | |
| 382 | /*------------------------------------------------------------------------ |
| 383 | * Globle Declarations |
| 384 | *------------------------------------------------------------------------*/ |
| 385 | |
| 386 | typedef struct |
| 387 | { |
| 388 | kal_uint16 timeStampInSlot; |
| 389 | kal_uint8 UserMacIdx; |
| 390 | kal_uint8 control_2; |
| 391 | kal_uint32 packetRec[PACKET_REC_MPA_SPY_SIZE]; |
| 392 | kal_uint16 Drc_C2i[PACKET_REC_MPA_SPY_SIZE]; |
| 393 | } PacketRecSpyT; |
| 394 | |
| 395 | typedef struct |
| 396 | { |
| 397 | kal_bool ValidPack; |
| 398 | kal_bool GoodPack; |
| 399 | kal_bool BCMCSPack; |
| 400 | kal_uint16 Macid; |
| 401 | kal_uint8 DRCVal; |
| 402 | kal_uint8 EPSize; |
| 403 | kal_uint8 RateDet; |
| 404 | kal_uint8 SlotCount; |
| 405 | kal_uint8 TimeStamp; |
| 406 | kal_bool CRCStatus; |
| 407 | kal_uint8 ReserveBit; |
| 408 | kal_bool RecStart; |
| 409 | kal_bool PacketComplete; |
| 410 | kal_bool ControlChan; |
| 411 | kal_uint16 PacketC2I; |
| 412 | } FcpPacketRecordDataT; |
| 413 | |
| 414 | typedef struct |
| 415 | { |
| 416 | FTMStateTypeT State; |
| 417 | } FcpFtmStateT; |
| 418 | |
| 419 | |
| 420 | /****************************************************************************** |
| 421 | Global |
| 422 | ******************************************************************************/ |
| 423 | typedef enum |
| 424 | { |
| 425 | FTM_FIXMODE_ENABLE_MSG, |
| 426 | FTM_FIXMODE_XOFF_MSG, |
| 427 | FTM_SCP_CONFIG_REQ_MSG = 0x50, |
| 428 | FTM_SCP_CONFIG_RSP_MSG, |
| 429 | FTM_ATTRI_UPDATE_REQ_MSG = 0x52, |
| 430 | FTM_ATTRI_UPDATE_ACCEPT_MSG = 0x53, |
| 431 | FTM_ATTRI_UPDATE_REJ_MSG = 0x54 |
| 432 | }FtmOtaMsgIdT; |
| 433 | |
| 434 | |
| 435 | /****************************************************************************** |
| 436 | Prototypes |
| 437 | ******************************************************************************/ |
| 438 | |
| 439 | extern void CcmInitialize( void ); |
| 440 | extern void CcmDeActivate( void ); |
| 441 | extern void CcmActivate( void ); |
| 442 | extern void PcpClearCLPPktList(void); |
| 443 | extern void PcpInitialize(void); |
| 444 | extern void FtmDeActivate( void ); |
| 445 | extern void FtmActivate( void ); |
| 446 | extern void FtmFtapDrcAckConfig(FtmFtapDrcAckConfigT *CtrlPtr ); |
| 447 | |
| 448 | extern void FtmInitialize( void ); |
| 449 | extern void FTMStateSet(FTMStateTypeT State); |
| 450 | extern FTMStateTypeT FTMStateGet(void); |
| 451 | extern void FTMEventProc(msg_type MsgId, ilm_struct *current_ilm); |
| 452 | extern void DRCFixedTxRateSet(FtmFtapDrcAckConfigT* FtapMsgP); |
| 453 | extern void FcpDRCSlotAttrSet(kal_uint32 AttrValue); |
| 454 | extern void DRCEtsMsgProc(FtmDRCEtsMsgT *MsgP); |
| 455 | extern void FcpFixDrcVal(FcpTestFixDrcValMsgT *MsgDataP); |
| 456 | #if defined (MTK_DEV_ENGINEER_MODE) |
| 457 | extern void FixDrcModeProcess(kal_bool Start); |
| 458 | #endif |
| 459 | extern kal_uint8* FtmAttributeRequest(kal_bool DefaultMac); |
| 460 | extern void DRCFTCAttributesGet(void); |
| 461 | extern void DRCParameterReinstate(void); |
| 462 | extern void CcmSupTimerReset(void); |
| 463 | extern void CcmHandleEltCcmSupervisionExpiredCmdMsg(EltCcmSupervisionExpiredCmdMsgT *MsgDataP); |
| 464 | extern void CcmSupervisionExpiredInAccessState(void); |
| 465 | |
| 466 | extern void FwdLinkPktBufInit( FwdLinkPktT *rec ); |
| 467 | extern void FwdLinkPktBufPoolInit(void); |
| 468 | extern FwdLinkPktT* FwdLinkPktBufGet(void); |
| 469 | extern void FwdLinkPktBufFree( FwdLinkPktT *rec ); |
| 470 | |
| 471 | extern void StreamInitialize(void); |
| 472 | extern void ProcessRcpStreamConfigMsg(void *MsgDataP); |
| 473 | extern kal_uint16 FcpFindAppTypeByStreamNum(kal_uint8 StreamNum); |
| 474 | extern void CcmKeepAliveCfgMsg(CcmSmpKeepAliveCfgT* MsgDataPtr); |
| 475 | extern void CcmSessionOpened(void); |
| 476 | extern void CcmSessionClosed(void); |
| 477 | extern void FtmProcessOtaFwdSigMsg(DsaFwdMsgT *MsgDataP); |
| 478 | extern void DsafProcessOtaFwdMsg(DsaFwdMsgT *MsgDataP); |
| 479 | extern kal_uint8 FcpAcquireMacIndex(void); |
| 480 | extern kal_uint16 FcpAcquirePER(void); |
| 481 | |
| 482 | #endif |