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192.168.1.100 / T800_MD / 6c1fd8fba87d5723e0e5614ae30b4258b603cb70 / . / mcu / protocol / interface / enl2 / el2 / emac_api.h
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2* Copyright Statement:
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34*****************************************************************************/
35
36/*******************************************************************************
37 * Filename:
38 * ---------
39 * emac_api.h
40 *
41 * Project:
42 * --------
43 * UMOLY
44 *
45 * Description:
46 * ------------
47 *
48 *
49 * Author:
50 * -------
51 *
52 *
53 *
54 * ==========================================================================
55 * $Log$
56 *
57 * 08 08 2019 kathie.ho
58 * [MOLY00428800] [MT6297] EMAC LTO warning clean up
59 * Solve LTO warning.
60 *
61 * 05 08 2019 kathie.ho
62 * [MOLY00404035] ENDC TDM PHICH Revision
63 * .
64 *
65 * 05 06 2019 shu-wei.ho
66 * [MOLY00402042] [Gen97][EMAC][EL1][ERLC] HRT Improvemnt, default off
67 * [EMAC][HRT] TXLISR part.
68 *
69 * 04 30 2019 frank.song
70 * [MOLY00401952] Sync Gen95 CL 6591981 to Gen97
71 *
72 * .
73 *
74 * 10 29 2018 shu-wei.ho
75 * [MOLY00361397] [B180623-440]¡i¥«?§ë?¡j¡iFT-¦¿?©y?¡jTSXXFK-2018062300002¡G¤âÉ󴡤J²¾?4G¥d¡AVOLTE³q?????¡]3/10¡^
76 * D4U5.
77 *
78 * 08 17 2018 shu-wei.ho
79 * [MOLY00339449] [Gen97][EMAC] General development check-in
80 * .Merge to VMOLY. (non MPD)
81 *
82 * 01 11 2018 jia-shi.lin
83 * [MOLY00301451] [SMO release][93/95]EL1 relative interface
84 * emac/el1 interface re-arch
85 *
86 * 07 12 2017 jia-shi.lin
87 * [MOLY00263796] [Gen93] EL1C always ticks PCSI during DRX off period which locks sleep mode
88 * add emac api emac_slp_cqi_srs_predict_result_rxlisr
89 *
90 * 07 11 2017 jia-shi.lin
91 * [MOLY00263426] [Bianco][N1][SRLTE][CT 6M C][LTE IOT][FT][CD][HW][TC-SMFT-07005]EE md1:(MCU_core0.vpe1.tc1(VPE1)) [ASSERT] file:mcu/pcore/modem/el2/common/el2_utility.c line:509
92 * relax the 1ms timing protection for ert sf proc
93 *
94 * 06 22 2017 nicole.hsu
95 * [MOLY00259119] [MT6763][EL2] EMAC/EL2EM/EL2POW maintenance
96 * [TRUNK] potential bug fix, RSIM EM, AT&T EM
97 *
98 * 06 09 2017 jia-shi.lin
99 * [MOLY00254140] [MT6293][EL1C] Reduce processing in RRC idle
100 * check in emac_txlisr_mt_chk_stage3()
101 *
102 * 06 09 2017 mf.jhang
103 * [MOLY00254140] [MT6293][EL1C] Reduce processing in RRC idle
104 * .Provide is emac_txlisr_active for EL1
105 *
106 * 05 19 2017 jia-shi.lin
107 * [MOLY00249306] [SE2 Internal Test][MT6293][UMOLYA][ATE][20170512][1][core0,vpe1,tc2(vpe1)] Assert fail emac_drx.c 811 - (LISR)EL1_C_TX
108 * 1. drx bug fix
109 * 2. mid ind to ert
110 * 3. dl wo pdsch ind
111 *
112 * 05 19 2017 nicole.hsu
113 * [MOLY00250929] [Copy CR][BIANCO][MT6763][RDIT][PHONE][Overnight][HQ][MTBF][Lab][Ericsson][ASSERT] file:mcu/l1core/modem/el1/el1c/phs/src/el1_phs_msg.c line:2429
114 * SCell new interface/design
115 *
116 * 04 18 2017 mf.jhang
117 * [MOLY00241929] [BIANCO][MT6763][RDIT][4GPS][RTD][HEAT][LTE_04_13_02_R12_UL64QUAM_2_UL64QAMonBothCCs_Type0]Assert fail: el1_meas_ctrl.c 11916 - EL1_MPC
118 * . Add EL1C command queue
119 *
120 * 04 05 2017 jia-shi.lin
121 * [MOLY00237731] [MT6293][L+L] Feature development
122 * [EMAC] Update EL1TX EMAC interface (EMAC part).
123 *
124 * 03 02 2017 jia-shi.lin
125 * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
126 * remove emac_force_phy_config_sch_close
127 *
128 * 01 19 2017 mf.jhang
129 * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
130 * Split emac txlisr process into 3 stages for load balance
131 *
132 * 12 21 2016 nicole.hsu
133 * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
134 * [Seamless Meta Mode] EMAC part
135 * - provide dummy API to be called in Meta Mode
136 * - provide force sch_close API to be called before leaving Meta Mode
137 *
138 * 10 18 2016 jia-shi.lin
139 * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
140 * add one phich result type
141 *
142 * 10 05 2016 mf.jhang
143 * [MOLY00206476] [MT6293][NWSIM][Regression][TC_7_1_4_16] Failed at step 6
144 * add emac_ta_stag_ta_diff_exceeded
145 *
146 * 10 03 2016 nicole.hsu
147 * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
148 * 1. RAR grant size check and handling
149 * 2. fix PHR api for ra group selection
150 *
151 * 08 11 2016 yu-chun.chen
152 * [MOLY00176078] [EL1C] UMOLYA code sync
153 * Back out changelist 2711251
154 *
155 * 08 11 2016 nicole.hsu
156 * [MOLY00194987] [MT6293][UMOLYA/PS DEV] EMAC maintenance
157 * 1. fix sim api warning
158 * 2. fix sim api prototype
159 * 3. provide rar_acsi_trigger assert function for el1tx
160 *
161 * 08 10 2016 shang-lun.chiu
162 * [MOLY00196539] [MT6293][EL1TX] Update comments to generate doxygen document
163 *
164 * 08 02 2016 wen-jiunn.liu
165 * [MOLY00194298] [UMOLYA] EL2 + EMAC Code Review
166 * Revise EL1-EMAC Interface
167 * - CRC Handler
168 * - DL Assignment
169 *
170 * 08 02 2016 nicole.hsu
171 * [MOLY00194987] [MT6293][PS DEV] EMAC maintenance
172 * [EMAC] ra api fix
173 *
174 * 08 01 2016 jeremy.chen
175 * [MOLY00190683] [UMOLYA][6293] EL2 merge back to UMOLYA TRUNK & PS DEV
176 *
177 * [EL2][RD domain] Sync EL2 interface from Aric CBr
178 *
179 ****************************************************************************/
180/**
181 * @file emac_api.h
182 * @brief EMAC Exported APIs to Other Libraries
183 *
184 * @author
185 * @date 2016/2/22
186 *
187 **/
188
189#ifndef __EMAC_API_H__
190#define __EMAC_API_H__
191
192#include "kal_public_api.h"
193#include "lte_time_common.h"
194#include "abs_time.h"
195#include "el1_emac_str.h"
196
197// =========================================
198// TTI Execution Process
199// =========================================
200
201/***************************************//**
202 * @brief Initialize the EMAC context before each TTI process
203 * @note Get air time from global variables / reset EMAC TTI related context
204 * @param protocol_idx
205 * @return (void)
206 ******************************************/
207void
208emac_txlisr_init_tti_proc(kal_uint32 protocol_idx);
209
210void
211emac_txlisr_proc_stage1();
212
213/***************************************//**
214 * @brief Main process for EMAC \n
215 * E.g., SCELL / TA / DL HARQ / UL HARQ / BSR / SR / RA / DRX
216 * @note Execution after all handler inputs are ready
217 * @param[in] p_sf_input Tx subframe parameter for EMAC, including information of
218 * - gap
219 * - subframe type
220 * .
221 * @return (void)
222 ******************************************/
223void
224emac_txlisr_proc_stage2(
225 emac_el1tx_tti_input_t* p_sf_input
226);
227
228void
229emac_txlisr_proc_stage3();
230
231kal_bool
232emac_txlisr_mt_chk_stage3();
233
234/***************************************//**
235 * @brief Invoke this function \@ g_abs_time to check if any
236 * EMAC handled TX requirement for tx_abs_time (g_abs_time +2)
237 * @note Called by EL1TX to query EMAC if there is any tx requirement \n
238 * One TXLISR / one TX requirement invoked (1-to-1 mapping) \n
239 * EL1 could NOT modify tx_bmp in the pointer
240 * @param (void)
241 * @return emac_el1tx_tx_req_struct* Pointer to TX request of this TTI
242 * in EMAC context \n
243 * The returned EMAC context will be cleared
244 * \@ emac_txlisr_init_tti_proc()
245 ******************************************/
246emac_el1tx_tx_req_struct*
247emac_txlisr_get_tx_req();
248
249#if EL1TX_EMAC_EARLY_ERT_SUPPORT
250/***************************************//**
251 * @brief TX process for EMAC \n
252 * E.g., MUX Decision ...
253 * @param[in] tx_results Bitmap of emac_el1tx_tx_bitmap_e
254 * @return (void)
255 ******************************************/
256void
257emac_el1_tx_result_handler(kal_uint32 tx_results);
258#endif
259/***************************************//**
260 * @brief Post process for EMAC \n
261 * E.g., MUX Decision / Clear UL HARQ Context / Clear TX Timeline / ...
262 * @note Execution after all handler inputs are ready
263 * @param[in] tx_results Bitmap of emac_el1tx_tx_bitmap_e
264 * @return (void)
265 ******************************************/
266void
267emac_txlisr_post_proc(
268 kal_uint32 tx_results
269);
270
271/***************************************//**
272 * @brief EMAC process in TXHISR for 93 (e.g., send ERT polling ILM)
273 * EMAC process in TXLISR for 95 (e.g., send ERT polling ILM)
274 * @note Called only in TXHISR for 93, called only in TXLISR for 95
275 * @param (void)
276 * @return (void)
277 ******************************************/
278void
279emac_tti_done_proc();
280
281// =========================================
282// TTI Input Handler Related APIs
283// =========================================
284
285/***************************************//**
286 * @brief Report n-2 or n-1 (i.e., g_abs_time -2 or -1) DCI result for DL HARQ \n
287 * Support only
288 * - C-RNTI
289 * - TC-RNTI
290 * - RA-RNTI
291 * - SPS-CRNTI (Act/Retx/Rel)
292 * .
293 * @note This function is used to update EMAC DL HARQ status \n
294 * DL unsolicited is NOT included (EMAC will calculate DL SPS) \n
295 * Indicate TB "new transmission" or not (instead of raw NDI value)
296 * @param[in] rcv_abs_time g_abs_time -1 or -2
297 * @param[in] p_pdcch_dl_info DL information carried in PDCCH
298 * @return (void)
299 ******************************************/
300void
301emac_pdcch_dl_assign_handler(
302 ABS_TICK_TIME rcv_abs_time,
303 el1tx_pdcch_dl_info_struct* p_pdcch_dl_info
304);
305
306/***************************************//**
307 * @brief Report n-2 or n-1 (i.e., g_abs_time -2 or -1) DCI result for UL HARQ \n
308 * Support only
309 * - C-RNTI
310 * - TC-RNTI
311 * - RA-RNTI
312 * - SPS-CRNTI (Act/Retx/Rel)
313 * .
314 * @note This function is used to update EMAC UL HARQ status \n
315 * UL unsolicited is NOT included (EMAC will calculate UL SPS)
316 * @param[in] ul_cc_idx UL CC index
317 * @param[in] rcv_abs_time g_abs_time -1 or -2
318 * @param[in] p_pdcch_ul_info UL information carried in PDCCH
319 * @return (void)
320 ******************************************/
321void
322emac_pdcch_ul_info_handler(
323 kal_uint8 ul_cc_idx,
324 ABS_TICK_TIME rcv_abs_time,
325 el1tx_pdcch_ul_info_struct* p_pdcch_ul_info
326);
327
328/***************************************//**
329 * @brief Report n-2 or n-1 (i.e., g_abs_time -2 or -1) PHICH result for UL HARQ
330 * @note This function is used to update EMAC UL HARQ status
331 * @param[in] ul_cc_idx UL CC index
332 * @param[in] harq_id HARQ ID
333 * @param[in] el1tx_phich_rlt_enum PHICH result
334 * @return (void)
335 ******************************************/
336void
337emac_pdcch_set_phich_result_handler(
338 kal_uint8 ul_cc_idx,
339 ABS_TICK_TIME rcv_abs_time,
340 kal_uint8 harq_id,
341 el1tx_phich_rlt_enum phich_result
342);
343
344/***************************************//**
345 * @brief - [TBC] Report n-3 or n-2 (i.e., g_abs_time -3 or -2)
346 * with each TB CRC decoding result
347 * - [TBC] Invoked after DL Assignment Handler\n
348 * With assumption of ignorance DCI for same TB within 4 subframes
349 * - [TBC] DCI v.s. CRC report is 1-to-1 mapping
350 * - Report only
351 * -- C-RNTI
352 * -- TC-RNTI
353 * -- SPS-CRNTI (Act/Retx/Config)
354 * .
355 * .
356 * @note TB information is with bitwise operation (BIT0 for TB0 : BIT1 for TB1)
357 * @param[in] p_crc_result CRC result information
358 * @return (void)
359 ******************************************/
360void
361emac_pdcch_set_crc_result_handler(
362 el1tx_pdcch_crc_result_struct* p_crc_result
363);
364
365/***************************************//**
366 * @brief Report n-2 or n-1 (i.e., g_abs_time -2 or -1) PDCCH order for RA
367 * @note If PDCCH order is received, call function to trigger PDCCH order RA process
368 * @param[in] rcv_abs_time g_abs_time -1 or -2
369 * @param[in] ul_cc_idx UL CC index
370 * @param[in] rapid RA preamble ID
371 * @param[in] mask RA mask index
372 * @return (void)
373 ******************************************/
374void
375emac_ra_pdcch_order_rcv(
376 ABS_TICK_TIME rcv_time,
377 kal_uint8 ul_cc_idx,
378 kal_uint8 rapid,
379 kal_uint8 mask
380);
381
382
383// =========================================
384// SPS Related APIs
385// =========================================
386
387/***************************************//**
388 * @brief Get UL SPS Active State in EMAC context
389 * @note This function is used to check current UL SPS state in
390 * EMAC context \@ TXLISR \n
391 * May be called in different threads, not TXLISR \n
392 * Caller should take care of multi-thread effects
393 * @param (void)
394 * @return KAL_TRUE: UL SPS is active \n
395 * KAL_FALSE: UL SPS is not active
396 ******************************************/
397kal_bool
398emac_sps_ul_get_active_state();
399
400
401// =========================================
402// UL HARQ Related APIs
403// =========================================
404
405/***************************************//**
406 * @brief Check if any UL HARQ for an UL CC is on-going
407 * @note This function is used to check PUSCH UL HARQ status \n
408 * Caller should take care of multi-thread effects \n
409 * @param[in] ul_cc_idx UL CC index
410 * @return KAL_TRUE: one or more UL HARQ are on-going \n
411 * KAL_FALSE: no UL HARQ is on-going
412 ******************************************/
413kal_bool
414emac_ul_harq_is_any_on_going(kal_uint8 ul_cc_idx);
415
416/***************************************//**
417 * @brief Predict if the grant is applied for TX based on
418 * the current UL HARQ view (Best Effort)
419 * @note This function is used to predict if the grant can be applied for TX
420 * based on the current EMAC UL HARQ view (Best Effort) \n
421 * Caller should take care of multi-thread effects \n
422 * May be called in TXLISR and RXLISR,
423 * EL1 should guarantees no simultaneous execution (no lock needed) for
424 * the same tx_abs_time
425 * @param[in] ul_cc_idx UL CC index
426 * @param[in] p_predict_req Grant to be predicted
427 * @return KAL_TRUE: grant is predicted as applied for TX in the
428 * current EMAC UL HARQ view \n
429 * KAL_FALSE: grant is predicted as NOT applied for TX in the
430 * current EMAC UL HARQ view
431 ******************************************/
432kal_bool
433emac_ul_harq_predict_grant_apply(
434 kal_uint8 ul_cc_idx,
435 el1tx_grant_apply_predict_req_struct* p_predict_req
436);
437
438/***************************************//**
439 * @brief emac_el1_txtimeline_extension_t should be defined by EL1 \n
440 * Return the EL1 extension memory (e.g., for implementing CQI only)
441 * @note Caller should take care of multi-thread effects \n
442 * EL1 extension will be cleared when TX timeline entry is cleared
443 * (\@ EMAC TXLISR post process)
444 * @param[in] ul_cc_idx UL CC index
445 * @param[in] tx_abs_time The time to refer to the timeline enrty
446 * @return Start address of EL1 extension
447 ******************************************/
448emac_el1_txtimeline_extension_t*
449emac_ul_harq_get_timeline_el1_extension(
450 kal_uint8 ul_cc_idx,
451 ABS_TICK_TIME tx_abs_time
452);
453
454/***************************************//**
455 * @brief Turn on/off EMAC's D4U5 UL64QAM workaround feature
456 * @note Call after tti init and before PDCCH procedure \n
457 * Caller should take care of multi-thread effects
458 * @param[in] is_feature_on on/off
459 * @return (void)
460 ******************************************/
461void
462emac_ul_harq_D4U5_Check_UL64QAM_feature_ctrl(
463 kal_bool is_feature_on
464);
465
466/***************************************//**
467 * @brief Notify EMAC config of tdm pattern change
468 * @note Call after tti init (emac_txlisr_init_tti_proc), and before other TTI function call
469 * Caller should take care of multi-thread effects
470 * @param[in] is_tdm_on on/off
471 * @param[in] subframe_bitmap (bit n represents subframe n in one frame, value 1'b means it's TX subframe;otherwise 0.
472 * @return (void)
473 ******************************************/
474 #ifdef __ENDC__
475void
476emac_tdm_pattern_config_change_handler(
477 kal_bool is_tdm_on,
478 kal_uint16 subframe_bitmap
479);
480#endif
481
482// =========================================
483// DRX Related APIs
484// =========================================
485
486/***************************************//**
487 * @brief When EL1TX has a periodic CQI transmission on PUCCH,
488 * EL1TX needs to
489 * call this function no later than <b>cqi_tx_time - 5</b>
490 * (EL1TX does NOT support now).
491 * The reason is that EMAC needs to calculate the admission for
492 * this CQI TX
493 * @note Caller should take care of multi-thread effects \n
494 * Currently, EL1TX need not call this API since EMAC will
495 * calculate the admission for CQI TX for every TTI \n
496 * When EL1TX can support the call of this function no later
497 * than <b>cqi_tx_time -5</b>, EMAC will only calculate the admission
498 * for CQI TX in <b>cqi_tx_time</b> to save the MIPS
499 * @param[in] cqi_tx_time CQI TX time
500 * @return (void)
501 ******************************************/
502void emac_drx_set_cqi_tx_time(ABS_TICK_TIME cqi_tx_time);
503
504/***************************************//**
505 * @brief When EL1TX has a type0 SRS transmission, EL1TX needs to
506 * call this function no later than <b>type0_srs_tx_time - 5</b>.
507 * The reason is that EMAC needs to calculate the admission for this SRS TX
508 * @note Caller should take care of multi-thread effects \n
509 * Currently, EL1TX need not call this API since EMAC will
510 * calculate the admission for type0 SRS TX for every TTI \n
511 * When EL1TX can support the call of this function no later
512 * than <b>type0_srs_tx_time -5</b>, EMAC will only calculate the admission
513 * for type0 SRS TX in <b>type0_srs_tx_time</b> to save the MIPS
514 * @param[in] type0_srs_tx_time type0 SRS TX time
515 * @return (void)
516 ******************************************/
517void emac_drx_set_type0_srs_tx_time(ABS_TICK_TIME type0_srs_tx_time);
518
519/***************************************//**
520 * @brief EMAC will return the TX admission of cqi and type0 srs
521 * for tx_abs_time
522 * @note emac_drx_set_cqi_tx_time or emac_drx_set_type0_srs_tx_time should be called
523 * before emac_drx_cqi_srs_admin is called \n
524 * Caller should take care of multi-thread effects \n
525 * The timing for calling this API is expected to be after the EMAC TTI
526 * process of <b>tx_abs_time -2</b>
527 * @param[in] tx_abs_time periodic CQI and type0 SRS time
528 * @param[out] p_cqi_srs_admin_info admission information of periodic CQI and type0 SRS
529 * @return (void)
530 ******************************************/
531void emac_drx_cqi_srs_admin(ABS_TICK_TIME tx_abs_time,
532 emac_el1tx_drx_cqi_srs_admin_info_struct * p_cqi_srs_admin_info);
533
534
535/***************************************//**
536 * @brief DL without PDSCH occurs
537 * @note when DL without PDSCH occurs, call this api
538 * @param[in] rcv_abs_time the rcv_abs_time for this DL
539 * @return (void)
540 ******************************************/
541void emac_drx_dl_wo_pdsch_handler(ABS_TICK_TIME rcv_abs_time);
542
543
544
545// =========================================
546// SLEEP Related APIs
547// =========================================
548
549kal_bool emac_slp_is_prev1_dci_info_required(void);
550kal_bool emac_slp_cqi_srs_predict_result_rxlisr(ABS_TICK_TIME tx_abs_time);
551
552// =========================================
553// RA Related APIs
554// =========================================
555
556kal_bool emac_ra_is_rar_grant_valid(el1tx_pdcch_ul_info_struct* p_grant);
557void emac_ra_set_max_txpower_reached();
558void emac_ra_rar_acsi_trigger_fail();
559void emac_ra_tcrnti_ack_add_fail();
560void emac_ra_set_last_prach_tx_power(kal_uint8 prach_tx_power);
561
562// =========================================
563// PHR Related APIs
564// =========================================
565
566kal_bool emac_el1_phr_res_handler(emac_el1tx_phr_res_struct phr_content);
567
568// =========================================
569// TA Related APIs
570// =========================================
571void emac_ta_stag_ta_diff_exceeded(kal_uint32 stag_id);
572
573// =========================================
574// SCELL Related APIs
575// =========================================
576#if defined(__MD93__)
577 //just for fix build fail, not final solution
578 void emac_scell_el1c_cnf();
579#elif(CUR_GEN>=MD_GEN95)
580 void emac_scell_el1c_cnf(kal_uint8 cc_cnf_bmp);
581#endif
582void emac_scell_rel(kal_uint32 cc_idx);
583
584kal_bool emac_txlisr_active(ABS_TICK_TIME cur_abs_time);
585kal_bool emac_txlisr_tx_checksum_error_bypass_check(ABS_TICK_TIME tx_abs_time);
586
587// =========================================
588// META_MODE Related APIs
589// =========================================
590void emac_dummy_txlisr_init_tti_proc(kal_uint32 protocol_idx);
591void emac_dummy_txlisr_post_proc(kal_uint32 tx_results);
592void emac_dummy_txlisr_proc(emac_el1tx_tti_input_t* p_sf_input);
593void emac_dummy_tti_done_proc();
594void emac_dummy_txlisr_proc_stage1();
595void emac_dummy_txlisr_proc_stage3();
596
597
598#endif