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rjw6c1fd8f2022-11-30 14:33:01 +08001/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
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7* permission of MediaTek Inc. (C) 2005
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
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34*****************************************************************************/
35
36/*******************************************************************************
37 * Filename:
38 * ---------
39 * custom_nvram_sec.h
40 *
41 * Project:
42 * --------
43 * MAUI
44 *
45 * Description:
46 * ------------
47 * This file is intends for NVRAM security customization.
48 *
49 * Author:
50 * -------
51 * -------
52 *
53 *==============================================================================
54 * HISTORY
55 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
56 *------------------------------------------------------------------------------
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306 *------------------------------------------------------------------------------
307 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
308 *==============================================================================
309 *******************************************************************************/
310#ifndef CUSTOM_NVRAM_SEC_H
311#define CUSTOM_NVRAM_SEC_H
312
313#include "kal_general_types.h"
314#include "sml_public_def.h"
315
316#include "sml_nvram_ver.h"
317
318typedef enum
319{
320 NVRAM_MD5 = 1, /* MD5 */
321 NVRAM_HMAC_SHA256 /* HMAC SHA256 */
322
323} NVRAM_ALGO_TYPE;
324
325typedef struct
326{
327 kal_uint32 enhance_algo_size;
328 kal_uint32 enhance_algo_type;
329 kal_uint32 default_algo_size;
330 kal_uint32 default_algo_type;
331} nvram_checksum_config;
332
333typedef struct
334{
335 kal_uint8 security_indication;
336 kal_uint8 phone_key[NVRAM_EDITOR_NUM_OF_BYTE_KEY];
337 kal_uint8 last_imsi[NVRAM_EDITOR_NUM_OF_BYTE_IMSI];
338 kal_uint8 pin1[NVRAM_EDITOR_NUM_PIN1];
339 kal_uint8 pin1_valid;
340 kal_uint8 phone_lock_verified;
341 kal_uint8 iccid[NVRAM_EDITOR_NUM_OF_BYTE_ICCID];
342} smu_security_info_struct;
343
344/* --------------------------
345 * Beginning of SML Configuration
346 * --------------------------- */
347#define NVRAM_SECRET_KEY_SIZE 8
348#define NVRAM_CUSTOM_KEY_SEED_SIZE 32
349
350/* General control key structure */
351typedef struct {
352 kal_uint8 state; /* Default Value or NULL */
353 kal_uint8 key[NVRAM_SML_MAX_SUPPORT_KEY_LEN]; //actual data length is SML_MAX_SUPPORT_KEY_LEN
354} sml_control_key_struct;
355
356/* General lock structure */
357typedef struct {
358 kal_uint8 state; /* sml_state_enum */
359 kal_uint8 retry_count; /* SML_RETRY_COUNT_X_CAT */
360 kal_uint8 autolock_count; /* SML_AUTOLOCK_NUM_X_CAT */
361 kal_uint8 num; /* num of valid sets */
362} sml_category_meta_struct;
363
364typedef struct {
365 kal_uint32 magic_head; /* 4 */
366 sml_category_meta_struct cat[SML_SUPPORT_CAT_SIZE]; /* (4 * 7) */
367 sml_control_key_struct key[SML_SUPPORT_CAT_SIZE]; /* (9 * 7) */
368 kal_uint8 code_cat_n[SML_CFG_CAT_N_SIZE]; /* (30 * 3)*/
369 kal_uint8 code_cat_ns[SML_CFG_CAT_NS_SIZE]; /* (30 * 4)*/
370 kal_uint8 code_cat_sp[SML_CFG_CAT_SP_SIZE]; /* (30 * 4)*/
371 kal_uint8 code_cat_c[SML_CFG_CAT_C_SIZE]; /* (30 * 5)*/
372 kal_uint8 code_cat_sim[SML_CFG_CAT_SIM_SIZE]; /* (30 * 8)*/
373 kal_uint8 code_cat_ns_sp[SML_CFG_CAT_NS_SP_SIZE]; /* (5 * 10)*/
374 kal_uint8 code_cat_sim_c[SML_CFG_CAT_SIM_C_SIZE]; /* (10 * 10)*/
375 kal_uint8 range_cat_ns[SML_CAT_NS_RANGE_SIZE]; /* 2 */
376 kal_uint32 magic_tail; /* 4 */
377} sml_context_struct; /* 971 */
378typedef sml_context_struct nvram_sml_context_struct;
379
380typedef struct {
381 kal_uint8 state; /* Default Value or NULL */
382 kal_uint8 algo;
383 kal_uint8 salt[NVRAM_SML_S_MAX_SUPPORT_SALT_LEN];
384 kal_uint8 inter_cnt[NVRAM_SML_S_MAX_SUPPORT_INTER_CNT_LEN];
385 kal_uint8 key[NVRAM_SML_S_MAX_SUPPORT_HCK_LEN];
386} sml_control_key_s_struct;
387
388#if SML_S_LID_VER >= 2
389typedef struct {
390 kal_uint8 state; // sml_puk_key_state_enum
391 kal_uint32 max_retry_count;
392 kal_uint32 retry_count;
393
394 kal_uint8 algo;
395 kal_uint8 salt[NVRAM_SML_S_MAX_SUPPORT_SALT_LEN];
396 kal_uint8 iter_cnt[NVRAM_SML_S_MAX_SUPPORT_INTER_CNT_LEN];
397 kal_uint8 key[NVRAM_SML_S_MAX_SUPPORT_HCK_LEN];
398} sml_puk_key_s_struct;
399#endif
400
401typedef struct {
402 kal_uint8 state; /* sml_state_enum */
403 kal_uint32 max_retry_count; /* SML_MAX_RETRY_COUNT_X_CAT */
404 kal_uint32 retry_count; /* SML_RETRY_COUNT_X_CAT */
405 kal_uint8 autolock_count; /* SML_AUTOLOCK_NUM_X_CAT */
406 kal_uint8 num; /* num of valid sets */
407} sml_category_meta_s_struct;
408
409typedef struct {
410 kal_uint32 magic_head;
411 sml_category_meta_s_struct cat[SML_SUPPORT_CAT_SIZE];
412 sml_control_key_s_struct key[SML_SUPPORT_CAT_SIZE];
413#if SML_S_LID_VER >= 2
414 sml_puk_key_s_struct puk_key[SML_SUPPORT_CAT_SIZE];
415#endif
416 kal_uint8 code_cat_n[SML_CFG_CAT_N_SIZE];
417 kal_uint8 code_cat_ns[SML_CFG_CAT_NS_SIZE];
418 kal_uint8 code_cat_sp[SML_CFG_CAT_SP_SIZE];
419 kal_uint8 code_cat_c[SML_CFG_CAT_C_SIZE];
420 kal_uint8 code_cat_sim[SML_CFG_CAT_SIM_SIZE];
421 kal_uint8 code_cat_ns_sp[SML_CFG_CAT_NS_SP_SIZE];
422 kal_uint8 code_cat_sim_c[SML_CFG_CAT_SIM_C_SIZE];
423 kal_uint8 range_cat_ns[SML_CAT_NS_RANGE_SIZE];
424 kal_uint32 magic_tail;
425} sml_context_s_struct;
426typedef sml_context_s_struct nvram_sml_context_s_struct;
427
428typedef struct
429{
430 kal_uint8 data[3072];
431} smu_op129_sim_lock_rawdata_struct;
432typedef smu_op129_sim_lock_rawdata_struct nvram_sml_op129_sim_lock_rawdata_struct;
433
434/* the magic number of file header and tail */
435#define SML_MAGIC_HEAD_VALUE (sizeof(sml_context_struct))
436#define SML_MAGIC_TAIL_VALUE 0x26598088
437
438/* --------------------------
439 * End of SML Configuration
440 * --------------------------- */
441
442#if !defined(NVRAM_NOT_PRESENT)
443#ifdef __cplusplus
444extern "C"
445{
446#endif /* __cplusplus */
447
448#include "nvram_defs.h" /* NVRAM_MSP_ALIGNMENT */
449
450/*
451 * CUST PARA Configuration
452 */
453
454
455/*
456 * Secure RO Version
457 * Whenever nvram_sml_context_struct's size or members are changed,
458 * be sure to assign an unique version number to SEC_RO_STRUCT_VER.
459 * Otherwise, PC side tool has no idea how to compose it
460 */
461#ifndef __SECURE_USB_DOWNLOAD__
462#define SEC_RO_STRUCT_VER 1
463#else
464#define SEC_RO_STRUCT_VER 2
465#endif
466
467/*
468 * Secure RO
469 */
470typedef enum
471{
472 SEC_RO_PARA_DBG_PORT,
473 SEC_RO_PARA_TOTAL
474}sec_ro_para_enum;
475
476extern const kal_uint8 NVRAM_SECUPACK_DEFAULT[];
477extern const kal_uint8 NVRAM_CUSTOM_KEY[];
478extern const kal_uint8 NVRAM_CUSTOM_KEY_SEED[];
479
480extern kal_uint32 secupack_total_to_verify;
481extern void custom_nvram_get_key(char *init_key, unsigned char *keys);
482extern void custom_nvram_encrypt(unsigned char const *keys, unsigned char *buffer, unsigned int length, int scrambleIndex);
483extern void custom_nvram_decrypt(unsigned char const *keys, unsigned char *buffer, unsigned int length, int scrambleIndex);
484extern void nvram_AES_encrypt(unsigned char *buffer, unsigned int length);
485extern void nvram_AES_decrypt(unsigned char *buffer, unsigned int length);
486extern void nvram_calculate_checksum(NVRAM_ALGO_TYPE type, kal_uint8 *source, kal_uint32 source_length, kal_uint8 *dest);
487
488extern kal_uint32 custom_nvram_sec_ro_size(void);
489extern kal_uint32 custom_nvram_secupack_size(void);
490extern kal_uint32 custom_nvram_secupack_total(void);
491extern kal_uint32 custom_nvram_key_len(void);
492
493extern nvram_lid_enum custom_nvram_get_signed_critical_data_lid();
494extern kal_bool custom_nvram_check_signed_critical_data_before_write(kal_uint8 *wr_dat, kal_uint32 len);
495extern kal_bool custom_nvram_read_and_check_signed_critical_data();
496
rjw6c1fd8f2022-11-30 14:33:01 +0800497extern const nvram_sml_context_struct NVRAM_EF_SML_DEFAULT;
498extern const nvram_sml_context_s_struct NVRAM_EF_SML_S_DEFAULT;
rjw8e44aab2022-11-30 16:42:16 +0800499#if defined(NVRAM_AUTO_GEN)
rjw6c1fd8f2022-11-30 14:33:01 +0800500extern const kal_uint8 custom_secret_key[];
501extern const kal_uint8 custom_key_seed[];
502extern const kal_uint8 NVRAM_SECURE_PARA[];
503#ifdef __SECURE_USB_DOWNLOAD__
504extern const kal_uint8 custom_symmetric_key[];
505extern const T_Customer_Public_Key custom_asymmetric_key;
506#endif
507#endif
508
509
510#ifdef __cplusplus
511}
512#endif
513#endif /* !defined(NVRAM_NOT_PRESENT) */
514#endif /* CUSTOM_NVRAM_SEC_H */
515