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192.168.1.100 / T800_MD / b0f5b85a5b9d69cbfa1dd990d559a4a9c7d8f2a6 / . / mcu / driver / devdrv / auxadc / inc / adc_sw.h
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rjw6c1fd8f2022-11-30 14:33:01 +0800[diff] [blame]1/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2005
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36/*****************************************************************************
37 *
38 * Filename:
39 * ---------
40 * adc_sw.h
41 *
42 * Project:
43 * --------
44 * Maui_Software
45 *
46 * Description:
47 * ------------
48 * This file is intends for adc driver.
49 *
50 * Author:
51 * -------
52 * -------
53 *
54 *============================================================================
55 * HISTORY
56 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
57 *------------------------------------------------------------------------------
58 * removed!
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101 *
102 *------------------------------------------------------------------------------
103 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
104 *============================================================================
105 ****************************************************************************/
106#ifndef _ADC_SW_H
107#define _ADC_SW_H
108
109#include "drv_features_adc.h"
110#include "adc_hw.h"
111#include "adc_cali.h"
112
113typedef struct {
114 double ADC_ISENSE_RESISTANCE_FACTOR; /*1/0.4*/
115 ADC_CALIDATA adc_cali_param; /*ratio = adc_volt_factor/100*/
116 kal_uint16 adc_volt_factor[ADC_MAX_CHANNEL];
117}adc_customized_struct;
118
119typedef struct {
120 kal_int32 TEMPV2;
121 kal_int32 TEMPA12;
122 kal_int32 TEMPA23;
123 kal_int32 TEMPM12;
124 kal_int32 TEMPM23;
125 kal_int32 TEMPSCALE;
126} VolToTempStruct;
127
128typedef enum {
129 vbat_adc_channel=0,
130 visense_adc_channel,
131 vbattmp_adc_channel,
132 battype_adc_channel,
133 vcharger_adc_channel,
134 pcbtmp_adc_channel,
135 aux_adc_channel,
136 chr_usb_adc_channel,
137 otg_vbus_adc_channel,
138 rftmp_adc_channel
139} adc_channel_type;
140
141
142/*************************************************************************/
143#if defined(DRV_MISC_ADC_MEASURE_REMOVE_IRQMASK)
144// Define to perform ADC race condition check when processing critical data process
145#define ADC_RACE_CONDITION_CHECK
146// Define to remove IRQ mask/restore for ADC measurement
147#define ADC_REMOVE_IRQMASK
148#endif // #if defined(DRV_MISC_ADC_MEASURE_REMOVE_IRQMASK)
149
150#if defined(ADC_RACE_CONDITION_CHECK)
151extern kal_bool gADC_RC_Check;
152// MoDIS parser skip start
153// The following two APIs are private APIs, NOT exported as public APIs
154extern void ADCRCCheckAndLock(void);
155extern void ADCRCRelease(void);
156// MoDIS parser skip end
157#endif // #if defined(ADC_RACE_CONDITION_CHECK)
158
159#if defined(ADC_REMOVE_IRQMASK)
160#define ADCSAVEANDSETIRQMASK(mask) {}
161#define ADCRESTOREIRQMASK(mask) {}
162#else // #if defined(ADC_REMOVE_IRQMASK)
163#define ADCSAVEANDSETIRQMASK(mask) {mask = SaveAndSetIRQMask();}
164#define ADCRESTOREIRQMASK(mask) RestoreIRQMask(mask)
165#endif // #if defined(ADC_REMOVE_IRQMASK)
166
167extern void dbg_print(char *fmt,...);
168
169/*************************************************************************/
170// MoDIS parser skip start
171// The following APIs are private APIs
172extern kal_uint16 ADC_GetData(kal_uint8 sel);
173// adc.c
174extern kal_int32 adc_measureVoltage(kal_uint8 chann, double *adc_value);
175extern void adc_read_calibration_data(void);
176extern kal_uint16 ADC_IMM_Data(kal_uint16 channel);
177extern kal_uint16 ADC_SYNC_Data(kal_uint16 channel);
178extern void ADC_Init(void);
179extern void adc_pwrdown_enable(void);
180extern void adc_pwrdown_disable(void);
181extern kal_uint32 ADC_GetData2Meta(kal_uint8 sel, kal_uint16 meacount);
182extern kal_uint32 ADC_GetMeaData(kal_uint8 sel, kal_uint16 meacount);
183extern void ADC_IMM_Data_on_Booting(kal_uint32 channel, kal_uint32 counts, kal_uint16 * data);
184extern kal_int16 ADC_GetImmTemp(kal_uint8 chann);
185extern kal_int16 ADC_GetPhysicalChannel(kal_uint16 adcname);
186
187// MoDIS parser skip end
188
189#if !defined(DRV_ADC_OFF)
190#if defined(__DRV_COMM_REG_DBG__) && defined(__DRV_ADC_REG_DBG__)
191#define DRV_ADC_WriteReg(addr,data) DRV_DBG_WriteReg(addr,data)
192#define DRV_ADC_Reg(addr) DRV_DBG_Reg(addr)
193#define DRV_ADC_WriteReg32(addr,data) DRV_DBG_WriteReg32(addr,data)
194#define DRV_ADC_Reg32(addr) DRV_DBG_Reg32(addr)
195#define DRV_ADC_WriteReg8(addr,data) DRV_DBG_WriteReg8(addr,data)
196#define DRV_ADC_Reg8(addr) DRV_DBG_Reg8(addr)
197#define DRV_ADC_ClearBits(addr,data) DRV_DBG_ClearBits(addr,data)
198#define DRV_ADC_SetBits(addr,data) DRV_DBG_SetBits(addr,data)
199#define DRV_ADC_SetData(addr, bitmask, value) DRV_DBG_SetData(addr, bitmask, value)
200#define DRV_ADC_ClearBits32(addr,data) DRV_DBG_ClearBits32(addr,data)
201#define DRV_ADC_SetBits32(addr,data) DRV_DBG_SetBits32(addr,data)
202#define DRV_ADC_SetData32(addr, bitmask, value) DRV_DBG_SetData32(addr, bitmask, value)
203#define DRV_ADC_ClearBits8(addr,data) DRV_DBG_ClearBits8(addr,data)
204#define DRV_ADC_SetBits8(addr,data) DRV_DBG_SetBits8(addr,data)
205#define DRV_ADC_SetData8(addr, bitmask, value) DRV_DBG_SetData8(addr, bitmask, value)
206#else
207#define DRV_ADC_WriteReg(addr,data) DRV_WriteReg(addr,data)
208#define DRV_ADC_Reg(addr) DRV_Reg(addr)
209#define DRV_ADC_WriteReg32(addr,data) DRV_WriteReg32(addr,data)
210#define DRV_ADC_Reg32(addr) DRV_Reg32(addr)
211#define DRV_ADC_WriteReg8(addr,data) DRV_WriteReg8(addr,data)
212#define DRV_ADC_Reg8(addr) DRV_Reg8(addr)
213#define DRV_ADC_ClearBits(addr,data) DRV_ClearBits(addr,data)
214#define DRV_ADC_SetBits(addr,data) DRV_SetBits(addr,data)
215#define DRV_ADC_SetData(addr, bitmask, value) DRV_SetData(addr, bitmask, value)
216#define DRV_ADC_ClearBits32(addr,data) DRV_ClearBits32(addr,data)
217#define DRV_ADC_SetBits32(addr,data) DRV_SetBits32(addr,data)
218#define DRV_ADC_SetData32(addr, bitmask, value) DRV_SetData32(addr, bitmask, value)
219#define DRV_ADC_ClearBits8(addr,data) DRV_ClearBits8(addr,data)
220#define DRV_ADC_SetBits8(addr,data) DRV_SetBits8(addr,data)
221#define DRV_ADC_SetData8(addr, bitmask, value) DRV_SetData8(addr, bitmask, value)
222#endif //#if defined(__DRV_COMM_REG_DBG__) && defined(__DRV_ADC_REG_DBG__)
223
224#else //!defined(DRV_ADC_OFF)
225
226#define DRV_ADC_WriteReg(addr,data)
227#define DRV_ADC_Reg(addr) drv_dummy_return()
228#define DRV_ADC_WriteReg32(addr,data)
229#define DRV_ADC_Reg32(addr) drv_dummy_return()
230#define DRV_ADC_WriteReg8(addr,data)
231#define DRV_ADC_Reg8(addr) drv_dummy_return()
232#define DRV_ADC_ClearBits(addr,data)
233#define DRV_ADC_SetBits(addr,data)
234#define DRV_ADC_SetData(addr, bitmask, value)
235#define DRV_ADC_ClearBits32(addr,data)
236#define DRV_ADC_SetBits32(addr,data)
237#define DRV_ADC_SetData32(addr, bitmask, value)
238#define DRV_ADC_ClearBits8(addr,data)
239#define DRV_ADC_SetBits8(addr,data)
240#define DRV_ADC_SetData8(addr, bitmask, value)
241
242#endif //!defined(DRV_ADC_OFF)
243
244#endif /*_ADC_SW_H*/
245