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rjw6c1fd8f2022-11-30 14:33:01 +08001/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2005
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35
36/*****************************************************************************
37 *
38 * Filename:
39 * ---------
40 * intrCtrl.h
41 *
42 * Project:
43 * --------
44 * Maui_Software
45 *
46 * Description:
47 * ------------
48 * Common type and structure definition for MediaTek GSM/GPRS software
49 *
50 * Author:
51 * -------
52 * -------
53 *
54 *============================================================================
55 * HISTORY
56 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
57 *------------------------------------------------------------------------------
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161 *------------------------------------------------------------------------------
162 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
163 *============================================================================
164 ****************************************************************************/
165
166#ifndef _INTRCTRL_H
167#define _INTRCTRL_H
168
169/*******************************************************************************
170 * Include header files
171 *******************************************************************************/
172#include "kal_general_types.h"
173#include "mips_ia_utils_public.h"
174#include "us_timer.h"
175#include "kal_public_api.h"
176
177#if defined(MT6297)
178#include "intrCtrl_MT6297.h"
179#endif
180
181#if defined(MT6885)
182#include "intrCtrl_MT6885.h"
183#endif
184
185#if defined(MT6873)
186#include "intrCtrl_MT6873.h"
187#endif
188
189#if defined(MT6853)
190#include "intrCtrl_MT6853.h"
191#endif
192
193#if defined(MT6833)
194#include "intrCtrl_MT6833.h"
195#endif
196
197#if defined(MT6877)
198#include "intrCtrl_MT6877.h"
199#endif
200
201#if defined(CHIP10992)
202#include "intrCtrl_CHIP10992.h"
203#endif
204
205/*******************************************************************************
206 * Declarations and Definitions
207 *******************************************************************************/
208// CIRQ MPB Statistic Enable Option
209#if !defined(__MPB_DISABLE__)
210#define __MDCIRQ_MPB_PROFILE__
211#endif
212
213#define __ENABLE_SW_TRIGGER_INTERRUPT__
214
215#define EDGE_SENSITIVE KAL_TRUE
216#define LEVEL_SENSITIVE KAL_FALSE
217
218#define IRQ_NOT_LISR_CONTEXT (0xFFFF)
219
220#if defined(__CIRQ_MASK_REG_NR_1_NEW__) || defined(__CIRQ_MASK_REG_NR_2_NEW__) || defined(__CIRQ_MASK_REG_NR_3_NEW__) || defined(__CIRQ_MASK_REG_NR_4_NEW__) || defined(__CIRQ_MASK_REG_NR_5_NEW__)
221#define __CIRQ_DESIGN_NEW__
222#endif
223
224typedef struct CIRQ_MASK_VALUE_STRUCT
225{
226 kal_uint32 irq_mask[12];
227} CIRQ_MASK_VALUE_T;
228
229/* To enable SW Trigger Interrupt for new BB chips
230 Need to modify 3 files
231 1. add a file intrCtrl_MTxxxx_SW_Handler.h
232 2. add an entry on intrCtrl_SW_Handler.h
233 3. modify IRQ_SetSWRegister & IRQ_ResetSWRegister to support BB Chips on intrCtrl.c */
234#if defined(__ENABLE_SW_TRIGGER_INTERRUPT__)
235typedef enum
236{
237#define X_SW_HANDLE_CONST(a, b, c) a=(b),
238#include "intrCtrl_SW_Handle.h"
239#undef X_SW_HANDLE_CONST
240 SW_HANDLE_END
241} SW_CODE_HANDLE;
242
243#define Activate_LISR(code) MDCIRQ_Activate_LISR(code)
244#define Deactivate_LISR(code) MDCIRQ_Deactivate_LISR(code)
245
246extern void MDCIRQ_Activate_LISR(SW_CODE_HANDLE code);
247extern void MDCIRQ_Deactivate_LISR(SW_CODE_HANDLE code);
248extern void MDCIRQ_Activate_LISR_without_ITC(SW_CODE_HANDLE code);
249extern void MDCIRQ_Deactivate_LISR_without_ITC(SW_CODE_HANDLE code);
250extern const kal_uint16 SW_Code_Handle2Code[NUM_IRQ_SOURCES];
251
252/* Use to translate the mapping between software handler to hardware interrupt code */
253#define SW_code_handle2code(a) (a)
254
255extern kal_uint32 SW_INT_Counter[NUM_IRQ_SOURCES];
256
257#endif /* __ENABLE_SW_TRIGGER_INTERRUPT__ */
258
259
260#define IRQClearInt(vector) MDCIRQ_IRQClearInt(vector)
261#define IRQMask(vector) MDCIRQ_IRQMask(vector)
262#define IRQUnmask(vector) MDCIRQ_IRQUnmask(vector)
263#define IRQSensitivity(vector, e) MDCIRQ_IRQSensitivity(vector, e)
264#define IRQ_VPE_SPL_Compare_with_IRQ_Priority(VPE, code) MDCIRQ_VPE_SPL_Compare_with_IRQ_Priority(VPE, code)
265
266
267extern kal_uint32 SaveAndSetIRQMask(void);
268extern void RestoreIRQMask(kal_uint32);
269extern void MDCIRQ_IRQClearInt(kal_uint16);
270extern void MDCIRQ_IRQMask(kal_uint16);
271extern void MDCIRQ_IRQUnmask(kal_uint16);
272extern void MDCIRQ_IRQSensitivity(kal_uint16, kal_bool);
273extern void initINTR(void);
274extern kal_uint32 IRQMask_Status(kal_uint16 code);
275extern kal_uint32 IRQ_Status(void);
276
277#if defined(__MAUI_BASIC__) || !defined(__MTK_TARGET__)
278#define IRQ_Register_LISR(code, lisr, description) \
279 MDCIRQ_IRQ_Register_LISR(code, (void*)lisr, description)
280extern void MDCIRQ_IRQ_Register_LISR(kal_uint16 code, void (*reg_lisr)(kal_uint32 vector), char* description);
281#endif
282
283#define NRIRQ_Affinity_Change_NSA() MDCIRQ_Runtime_Change_NRIRQ_Affinity_NSA()
284#define NRIRQ_Affinity_Change_SA() MDCIRQ_Runtime_Change_NRIRQ_Affinity_SA()
285extern void MDCIRQ_Runtime_Change_NRIRQ_Affinity_NSA();
286extern void MDCIRQ_Runtime_Change_NRIRQ_Affinity_SA();
287
288#define LTEIRQ_Affinity_Change_ENDC() MDCIRQ_Runtime_Change_LTEIRQ_Affinity_ENDC()
289#define LTEIRQ_Affinity_Change_LTEONLY() MDCIRQ_Runtime_Change_LTEIRQ_Affinity_LTEONLY()
290extern void MDCIRQ_Runtime_Change_LTEIRQ_Affinity_ENDC();
291extern void MDCIRQ_Runtime_Change_LTEIRQ_Affinity_LTEONLY();
292
293extern void initVPEIRQ(void);
294
295extern kal_uint32 sst_dhl_irq_count[];
296extern kal_uint32 sst_dhl_irq_caller[];
297extern kal_uint32 DHLIrqCounter[];
298
299extern kal_int32 INC_Initialize_State;
300
301typedef enum
302{
303#define IRQ_PRIORITY_CONST(a) a##_PRIORITY,
304#include "irqPriority.h"
305#undef IRQ_PRIORITY_CONST
306 IRQ_PRIORITY_END,
307#if defined __MIPS_I7200__
308 IRQ_HRT_PRIORITY_THRESHOLD = IRQ_SW_LISR40_CODE_PRIORITY + 1,
309 IRQ_EQUALLY_DISPATCH_PRIORITY_THRESHOLD = IRQ_L1M_PHY_LTMR_INFORM_DONE_IRQ5_CODE_PRIORITY,
310#else /* MT6297_IA */
311 IRQ_NORMAL_DOMAIN_HRT_PRIORITY_THRESHOLD = IRQ_SW_LISR40_CODE_PRIORITY + 1,
312#endif
313} IRQ_PRIORITY;
314
315typedef enum {
316 MDCIRQ_To_BUS_Normal = 0x0,
317 MDCIRQ_To_BUS_PreUltra = 0x1,
318 MDCIRQ_To_BUS_Ultra =0x2,
319} MDCIRQ_Bus_QoS_Signal;
320
321/***********************************
322NOTE:
3231. below API is only for L1 logging, please not use
3242. if you want to use, please confirm with CIRQ owner first
325***********************************/
326#define IF_DI_OR_LISR() (Ibit_Status()==0 || kal_if_lisr())
327
328/***********************************
329NOTE:
3301. below API is only for L2 logging, please not use
3312. if you want to use, please confirm with CIRQ owner first
332***********************************/
333#define __IRQ_LOCK_WITHOUT_CHECK__
334// #define __NESTED_DI_CHECK__
335
336#if defined(__L2_LOGGING_IRQ_LOC__)
337#if defined(__IRQ_LOCK_WITHOUT_CHECK__) && (defined(__MIPS_IA__) || defined(__MIPS_I7200__))
338#if defined(__NESTED_DI_CHECK__) && !defined (__ESL_MASE_GEN97__)
339#define LOCK_CPU_INTERRUPT(oldmask, newmask) \
340do{\
341 kal_uint32 vpe_num = 0;\
342 miu_mt_dmt();\
343 __asm__ __volatile__\
344 (\
345 "di %0\n\t"\
346 "ehb\n\t"\
347 :"=&r"(oldmask), "=&r"(newmask)\
348 :\
349 :"$31","memory"\
350 );\
351 oldmask &= 0x1;\
352 vpe_num = miu_get_current_vpe_id();\
353 sst_dhl_irq_count[vpe_num]++;\
354 sst_dhl_irq_caller[vpe_num] = (kal_uint32)__builtin_return_address(0);\
355 DHLIrqCounter[vpe_num] = ust_get_current_time();\
356} while(0)
357
358#define UNLOCK_CPU_INTERRUPT(oldmask) \
359do{\
360 kal_uint32 tmp=1;\
361 sst_dhl_irq_count[miu_get_current_vpe_id()]--;\
362 __asm__ __volatile__\
363 (\
364 "bne %0, %1, END\n\t"\
365 "ei\n\t"\
366 "ehb\n\t"\
367 "END:emt\n\t"\
368 "ehb\n\t"\
369 :\
370 :"r"(oldmask), "r"(tmp)\
371 :"memory"\
372 );\
373} while(0)
374#else
375#define LOCK_CPU_INTERRUPT(oldmask, newmask) \
376do{\
377 miu_mt_dmt();\
378 __asm__ __volatile__\
379 (\
380 "di %0\n\t"\
381 "ehb\n\t"\
382 :"=&r"(oldmask), "=&r"(newmask)\
383 :\
384 :"$31","memory"\
385 );\
386 oldmask &= 0x1;\
387} while(0)
388
389#define UNLOCK_CPU_INTERRUPT(oldmask) \
390do{\
391 kal_uint32 tmp=1;\
392 __asm__ __volatile__\
393 (\
394 "bne %0, %1, END\n\t"\
395 "ei\n\t"\
396 "ehb\n\t"\
397 "END:emt\n\t"\
398 "ehb\n\t"\
399 :\
400 :"r"(oldmask), "r"(tmp)\
401 :"memory"\
402 );\
403} while(0)
404#endif
405
406#else
407
408#define LOCK_CPU_INTERRUPT(oldmask, newmask) \
409do{ \
410 oldmask = kal_hrt_SaveAndSetIRQMask(); \
411}while(0);
412
413#define UNLOCK_CPU_INTERRUPT(oldmask) \
414do{ \
415 kal_hrt_RestoreIRQMask(oldmask); \
416}while(0);
417
418#endif
419#endif
420
421#endif /* _INTRCTRL_H */
422