| rjw | 6c1fd8f | 2022-11-30 14:33:01 +0800 | [diff] [blame] | 1 | /***************************************************************************** |
| 2 | * Copyright Statement: |
| 3 | * -------------------- |
| 4 | * This software is protected by Copyright and the information contained |
| 5 | * herein is confidential. The software may not be copied and the information |
| 6 | * contained herein may not be used or disclosed except with the written |
| 7 | * permission of MediaTek Inc. (C) 2001 |
| 8 | * |
| 9 | *****************************************************************************/ |
| 10 | |
| 11 | /***************************************************************************** |
| 12 | * |
| 13 | * Filename: |
| 14 | * --------- |
| 15 | * mips_mmu.h |
| 16 | * |
| 17 | * Project: |
| 18 | * -------- |
| 19 | * Maui_Software |
| 20 | * |
| 21 | * Description: |
| 22 | * ------------ |
| 23 | * Header file for MIPS MMU. |
| 24 | * |
| 25 | * Author: |
| 26 | * ------- |
| 27 | * ------- |
| 28 | * |
| 29 | *============================================================================ |
| 30 | * HISTORY |
| 31 | * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| 32 | *------------------------------------------------------------------------------ |
| 33 | * removed! |
| 34 | * removed! |
| 35 | * removed! |
| 36 | * |
| 37 | * removed! |
| 38 | * removed! |
| 39 | * removed! |
| 40 | * removed! |
| 41 | * |
| 42 | * removed! |
| 43 | *------------------------------------------------------------------------------ |
| 44 | * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!! |
| 45 | *============================================================================ |
| 46 | ****************************************************************************/ |
| 47 | |
| 48 | #ifndef __MIPS_MMU_H__ |
| 49 | #define __MIPS_MMU_H__ |
| 50 | |
| 51 | #if defined(__MTK_TARGET__) |
| 52 | #if defined(__MIPS_IA__) |
| 53 | |
| 54 | #define MMU_WRITABLE 0x1 |
| 55 | #define MMU_NON_WRITABLE 0x0 |
| 56 | |
| 57 | typedef struct _mips_mmu_info_t |
| 58 | { |
| 59 | kal_uint32 EntryLo0; |
| 60 | kal_uint32 EntryLo1; |
| 61 | kal_uint32 PageMask; |
| 62 | kal_uint32 EntryHi; |
| 63 | } MIPS_MMU_INFO_T; |
| 64 | |
| 65 | /* Save TLB configuration*/ |
| 66 | void exception_save_mmu(MIPS_MMU_INFO_T* tlbs); |
| 67 | |
| 68 | /* MMU adjustment function for SST memory dumping*/ |
| 69 | void exception_set_mmu(void); |
| 70 | |
| 71 | /* Region init adjustment function for RO sections*/ |
| 72 | void region_init_set_mmu(kal_uint32 address, kal_uint32 size, kal_uint32 writable); |
| 73 | |
| 74 | /* MMU adjustment function for CCCI shared memory */ |
| 75 | void ccif_set_share_mem_mmu (kal_uint32 address, kal_uint32 size); |
| 76 | |
| 77 | /* MMU adjustment function for DHL shared memory */ |
| 78 | void dhl_set_share_mem_mmu (kal_uint32 address, kal_uint32 size); |
| 79 | |
| 80 | #endif /* __MIPS_IA__ */ |
| 81 | #endif /* __MTK_TARGET__ */ |
| 82 | |
| 83 | #endif /* __MIPS_MMU_H__ */ |
| 84 | |