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rjw6c1fd8f2022-11-30 14:33:01 +08001/*****************************************************************************
2* Copyright Statement:
3* --------------------
4* This software is protected by Copyright and the information contained
5* herein is confidential. The software may not be copied and the information
6* contained herein may not be used or disclosed except with the written
7* permission of MediaTek Inc. (C) 2016
8*
9* BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
10* THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
11* RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
12* AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
13* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
14* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
15* NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
16* SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
17* SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
18* THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
19* NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
20* SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
21*
22* BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
23* LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
24* AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
25* OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
26* MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
27*
28* THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
29* WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
30* LAWS PRINCIPLES. ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
31* RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
32* THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
33*
34*****************************************************************************/
35#ifndef _CPH1XFLBRP_H_
36#define _CPH1XFLBRP_H_
37
38#include "cl1common.h"
39#include "kal_general_types.h"
40
41#define XL1_SYNC_CORR_NUM 17
42
43typedef enum
44{
45 RTT_BRP_SYNC = 0,
46 RTT_BRP_PCH,
47 RTT_BRP_FCH,
48 RTT_BRP_ROLL_BACK
49} Cph1xBrpChSel;
50
51
52typedef struct
53{
54/******DBRP RTT SYNC/PCH/FCH Full rate PARAM1*******/
55 kal_uint16 IntlvSize;
56 kal_uint8 IntlvM;
57 kal_uint8 IntlvJM1;
58 kal_uint8 IntlvFbEn;
59}FchSchParam1T;
60
61typedef struct
62{
63/******DBRP RTT SYNC/PCH/FCH Full rate PARAM2*******/
64 kal_uint8 RepeatRate;
65 kal_uint8 PuncCfg;
66 kal_uint16 PuncPattern;
67 kal_uint16 EncodedBits;
68}FchSchParam2T;
69
70typedef struct
71{
72/******DBRP RTT SYNC/PCH/FCH Full rate PARAM3*******/
73 kal_uint16 CodeBlockSize;
74 kal_uint8 CrcSize;
75 kal_uint8 CodeRate;
76 kal_uint8 SetPt;
77}FchSchParam3T;
78
79typedef struct
80{
81 /***********************Full rata*******************/
82
83 FchSchParam1T FchChanFullParam1;
84 FchSchParam2T FchChanFullParam2;
85 FchSchParam3T FchChanFullParam3;
86
87 /*******************Half rata*********************/
88 FchSchParam2T FchChanHalfParam2;
89 FchSchParam3T FchChanHalfParam3;
90
91 /*******************Quarter rata*********************/
92 FchSchParam2T FchChanQuarterParam2;
93 FchSchParam3T FchChanQuarterParam3;
94
95/*******************Eighth rata*********************/
96 FchSchParam2T FchChanEighthParam2;
97 FchSchParam3T FchChanEighthParam3;
98}FchParamsT;
99
100
101typedef struct
102{
103 FchSchParam1T FschChanParam1;
104 FchSchParam2T FschChanParam2;
105 FchSchParam3T FschChanParam3;
106} SchChanParamT;
107
108
109typedef struct
110{
111 FchSchParam1T PchChanParam1;
112 FchSchParam2T PchChanParam2;
113 FchSchParam3T PchChanParam3;
114} PchChanParamT;
115
116typedef struct
117{
118 FchSchParam1T SyncChanParam1;
119 FchSchParam2T SyncChanParam2;
120 FchSchParam3T SyncChanParam3;
121} SyncChanParamT;
122
123/*****************************************************************************
124
125 DMA Vit Parameters
126
127*****************************************************************************/
128
129typedef struct
130{
131 kal_uint8 BitOffset;
132 kal_uint8 SwapEndian;
133 kal_uint8 CrcRemove;
134 kal_uint8 DmaDisable;
135}ChanDMACfgT;
136
137typedef struct
138{
139 kal_uint32 DbrpVitFchDmaFullBase;
140 kal_uint32 DbrpVitFchDmaHalfBase;
141 kal_uint32 DbrpVitFchDmaQuatBase;
142 kal_uint32 DbrpVitFchDmaEighBase;
143 kal_uint32 DbrpVitSchDmaBase;
144 ChanDMACfgT FchFullDmaCfg;
145 ChanDMACfgT SchDmaCfg;
146} DmaCfgT;
147
148typedef struct
149{
150 kal_uint8 CnfgPinSel;
151 kal_uint8 DataPingSel;
152}DbrpDmaCh3ReqT;
153
154typedef struct
155{
156 kal_uint8 Mode;
157 kal_uint8 Cnfg;
158 kal_uint8 Priority;
159 kal_uint8 AccIdx;
160 kal_uint16 BufIdx;
161}DbrpDmaCh3CtrlT;
162
163typedef struct
164{
165 kal_uint16 BaseAddrIdx;
166 kal_uint16 StartSampleIdx;
167}DbrpDmaCh3CtrlCnfgT;
168
169typedef struct
170{
171 kal_uint32 DbrpDmaCh3;
172 DbrpDmaCh3ReqT DbrpDmaCh3Req;
173 DbrpDmaCh3CtrlT DbrpDmaCh3Ctrl;
174 DbrpDmaCh3CtrlCnfgT DbrpDmaCh3CtrlCnfgPing;
175 DbrpDmaCh3CtrlCnfgT DbrpDmaCh3CtrlCnfgPong;
176 kal_uint32 DbrpDmaCh3CtrlCnfg;
177 DbrpDmaCh3CtrlCnfgT DbrpDmaCh3CtrlDataPing;
178 DbrpDmaCh3CtrlCnfgT DbrpDmaCh3CtrlDataPong;
179 kal_uint32 DbrpDmaCh3CtrlData;
180}DmaChannel3T;
181
182//turbo para
183typedef struct
184{
185 kal_uint8 MaxIter;
186 kal_uint8 MinIter;
187}DbrpTurRttCfgT;
188typedef struct
189{
190 kal_uint8 MacOfst;
191 kal_uint8 SwapEndian;
192 kal_uint8 CrcRemove;
193}DbrpTurRttDmaCfgT;
194
195typedef struct
196{
197 DbrpTurRttCfgT DbrpTurRttCfg;
198 kal_uint32 DbrpTurRttDst;
199 DbrpTurRttDmaCfgT DbrpTurRttDmaCfg;
200 kal_uint32 DbrpTurRttTraceCfg;
201}TurboParamesT;
202
203
204
205/*****************************************************************************
206
207 Control Parameters
208
209*****************************************************************************/
210typedef struct
211{
212 kal_uint8 FchDrmDone;
213 kal_uint8 SchDrmDone;
214 kal_uint8 FchDecDone;
215 kal_uint8 SchDecDone;
216 kal_uint8 CorrDone;
217}DbrpRttDoneVecT;
218
219typedef struct
220{
221 kal_uint8 CfgOk;
222 kal_uint8 CfgAssert;
223}DbrpRttCfgOkT;
224
225typedef struct
226{
227 kal_uint32 FchEn;
228 kal_uint32 SchEn;
229 kal_uint32 SchEncoding;
230}DbrpRttChDetT;
231
232typedef struct
233{
234 kal_uint32 ScaleMode;
235 kal_uint32 DereapScalMode;
236}DbrpRttScaleCfgT;
237
238typedef struct
239{
240 kal_uint8 ChSel;
241 kal_uint8 SyncBufIdx;
242 kal_uint8 SyncDrmEn;
243 kal_uint8 SyncCorrEn;
244 kal_uint8 SyncVitEn;
245}DbrpRttFchCfgT;
246
247typedef struct
248{
249 kal_uint16 EtPcgMap;
250 kal_bool EtEn;
251 kal_uint16 EtQuarPcg ;
252 kal_uint16 EtHalfPcg;
253 kal_uint16 EtFullPcg;
254}DbrpRttFchEtParmaT;
255
256
257typedef struct
258{
259 kal_uint32 DbrpRttStart;
260 kal_uint32 DbrpRttDone;
261 DbrpRttDoneVecT DbrpRttDoneVec;
262 DbrpRttCfgOkT DbrpRttCfgOk;
263 DbrpRttChDetT DbrpRttChDet;
264 DbrpRttScaleCfgT DbrpRttScalCfg;
265 DbrpRttFchCfgT DbrpRttFchCfg;
266 DbrpRttFchEtParmaT DbrpRttFchEtParam;
267}DbrpControlParamT;
268
269/*****************************************************************************
270
271 Vit Decode Parameters
272
273*****************************************************************************/
274
275typedef struct
276{
277 kal_bool Full;
278 kal_bool Half;
279 kal_bool Quat;
280 kal_bool Eigh;
281}VitFchCrcStatusT;
282
283
284typedef struct
285{
286 kal_uint32 Full;
287 kal_uint32 Half;
288 kal_uint32 Quat;
289 kal_uint32 Eigh;
290}VitFchSStatusT; /*End state metric(S-Value,S) 21bits,S*/
291
292typedef struct
293{
294 kal_uint32 Full;
295 kal_uint32 Half;
296 kal_uint32 Quat;
297 kal_uint32 Eigh;
298}VitFchYStatusT; /*yamamoto metric(Y) 11bits, YAMA*/
299
300typedef struct
301{
302 kal_uint32 Full;
303 kal_uint32 Half;
304 kal_uint32 Quat;
305 kal_uint32 Eigh;
306}VitFchHStatusT; /*Hypothesis Metric(H) 21bits,E*/
307
308
309typedef struct
310{
311 kal_uint32 Full;
312 kal_uint32 Half;
313 kal_uint32 Quat;
314 kal_uint32 Eigh;
315}VitFchSertatusT; /*SER 11bits,SER*/
316
317typedef struct
318{
319 kal_uint32 Full;
320 kal_uint32 Half;
321 kal_uint32 Quat;
322 kal_uint32 Eigh;
323}VitFchSoftSertatusT; /*Soft SER 11bits, PM*/
324
325
326typedef struct
327{
328 VitFchSStatusT FchS;
329 VitFchYStatusT FchY;
330 VitFchHStatusT FchH;
331 VitFchSertatusT FchSer;
332 VitFchSoftSertatusT FchSoftSer;
333 VitFchCrcStatusT FchCrc;
334 kal_uint32 SchCrc;
335}VitRdaParamT;
336
337
338typedef struct
339{
340 kal_uint32 DbrpVitReset;
341 kal_uint32 DbrpVitLva;
342 kal_uint32 DbrpVitPchConf;
343 kal_uint32 DbrpVitFirstFrm;
344 kal_uint32 DbrpVitSync;
345
346 kal_uint32 DbrpVitFchDmaFullBase;
347 kal_uint32 DbrpVitFchDmaHalfBase;
348 kal_uint32 DbrpVitFchDmaQuatBase;
349 kal_uint32 DbrpVitFchDmaEighBase;
350 kal_uint32 DbrpVitSchDmaBase;
351 ChanDMACfgT FchFullDmaCfg;
352 ChanDMACfgT SchDmaCfg;
353
354 VitRdaParamT DbrpRdaParmes;
355 kal_uint32 DbrpVitStatus ;
356 kal_uint32 DbrpVitDone;
357 kal_uint32 DbrpVitFchFullUsage; //debug used
358}VitChanParamT;
359
360typedef struct
361{
362 kal_uint8 MsgLength;
363 kal_uint8 CorrExtraEnable;
364}
365DbrpRttCorrPatternT;
366
367typedef struct
368{
369 kal_uint8 DbrpRttCorrBufIdx;
370 kal_uint16 DbrpRttCorrEnergy;
371 kal_int16 DbrpRttCorrRslt[XL1_SYNC_CORR_NUM];
372}BbrpRttCorrT;
373
374/*****************************************************************************
375
376 Function declaration
377
378*****************************************************************************/
379extern void Cph1xFlBrpSyncPchParamConfig(PchChanParamT *ads_ptr);
380extern void Cph1xFlBrpFchParamConfig(FchParamsT *ads_ptr);
381extern void Cph1xFlBrpFschParamConfig(SchChanParamT *ads_ptr);
382extern void Cph1xFlBrpCorrVitControlConfig(Cph1xBrpChSel ChSel,kal_uint8 BufIdx,kal_bool VitEn, kal_uint8 VitStartBufIdx,kal_bool CorrEn);
383extern void Cph1xFlBrpTurConfig(TurboParamesT *ads_ptr);
384extern void Cph1xFlBrpVitConfig(VitChanParamT *ads_ptr);
385extern void Cph1xFlBrpInputDmaConfig(DmaChannel3T *ads_ptr);
386extern void Cph1xFlBrpSyncSomRsltRead(BbrpRttCorrT *ads_ptr);
387extern void Cph1xFlBrpSyncCorrExtraEnable(kal_uint16 ExtraLen);
388extern void Cph1xFlBrpFchRdaRead(VitRdaParamT *RdaVitPtr);
389extern kal_uint32 Cph1xFlBrpVitDone();
390extern kal_uint32 Cph1xFlBrpCorrDone();
391extern kal_uint32 Cph1xFlBrpTurDone();
392extern kal_uint32 Cph1xFlBrpDrmDone();
393extern void Cph1xFlBrpDoneClr();
394extern void Cph1xFlBrpCfgDone();
395extern void Cph1xFlBrpFchCrcStateRead(VitFchCrcStatusT *ads_ptr);
396extern kal_uint32 Cph1xFlBrpSchVitCrcStateRead();
397extern kal_uint32 Cph1xFlBrpSchTurCrcStateRead();
398extern void Cph1xFlBrpEnConfig(DbrpRttChDetT *ads_ptr);
399extern void Cph1xFlBrpScaleConfig(DbrpRttScaleCfgT *ads_ptr);
400extern void Cph1xFlBrpEtParaConfig(DbrpRttFchEtParmaT *ads_ptr);
401extern void Cph1xFlBrpChSel(DbrpRttFchCfgT *ads_ptr);
402extern void Cph1xFlBrpFchCrcStateRead(VitFchCrcStatusT *ads_ptr);
403extern void Cph1xFlBrpCodeBlcokSizeCfg(kal_uint32 CodeBlockSize);
404extern void Cph1xFlBrpVitFirstFrmCfg(kal_bool FirstFrm);
405extern kal_uint32 Cph1xFlBrpDumpCh0Enerage();
406extern kal_uint32 Cph1xFlBrpDumpCh1Enerage();
407extern kal_uint32 Cph1xFlBrpDumpCh1TurEnerage();
408extern kal_uint32 Cph1xFlBrpDoneRead();
409extern kal_uint32 Cph1xFlBrpCfgDoneRead();
410extern kal_uint32 Cph1xFlBrpVitState();
411
412#endif
413