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192.168.1.100 / T800_MD / b0f5b85a5b9d69cbfa1dd990d559a4a9c7d8f2a6 / . / mcu / interface / protocol / lte / l2tps / l2tps_msg.h
blob: c8626bffe5a4c411f9ec773401a6444bd0be62c6 [file] [log] [blame]
rjw6c1fd8f2022-11-30 14:33:01 +0800[diff] [blame]1#ifndef L2TPS_MSG_H
2#define L2TPS_MSG_H
3
4#define L2TPS_GEN_TC_ID (0xFFFF)
5
6/* For Gemini CFG */
7#define L2TPS_MAX_GEMINI_GAP_PATTERN_NUM 5
8#define L2TPS_MAX_GEMINI_VAR_DURN_NUM 5
9#define L2TPS_MAX_GEMINI_DURN_SEQ_NUM 10
10
11typedef unsigned char uint8;
12typedef unsigned short uint16;
13typedef unsigned int uint32;
14
15typedef struct
16{
17 uint16 tc_id;
18 uint16 cmd_id;
19} l2tps_cmd_hdr_t;
20
21enum
22{
23 L2TPS_MSG_ID_DL_POLLING,
24 L2TPS_MSG_ID_UL_POLLING_RES,
25 L2TPS_MSG_ID_DL_TEST_START,
26 L2TPS_MSG_ID_DL_TEST_END,
27 L2TPS_MSG_ID_DL_UL_DATA_REQ,
28 L2TPS_MSG_ID_DL_EST_DRB,
29 L2TPS_MSG_ID_DL_ULDL_LB_START,
30 L2TPS_MSG_ID_DL_DLUL_LB_START,
31 L2TPS_MSG_ID_DL_INITIAL_ACCESS_REQ,
32 L2TPS_MSG_ID_DL_ACTIVATE_SRB,
33 L2TPS_MSG_ID_DL_HO_RA_REQ,
34 L2TPS_MSG_ID_DL_HO_RA_CNF,
35 L2TPS_MSG_ID_DL_TA_TIMER_CFG,
36 L2TPS_MSG_ID_UL_TA_TIMER_CFG_CNF,
37 L2TPS_MSG_ID_DL_DRX_CFG,
38 L2TPS_MSG_ID_UL_DRX_CNF,
39 L2TPS_MSG_ID_DL_SPS_CFG,
40 L2TPS_MSG_ID_UL_SPS_CNF,
41 L2TPS_MSG_ID_DL_TTI_BUNDLE_CFG,
42 L2TPS_MSG_ID_UL_TTI_BUNDLE_CNF,
43 L2TPS_MSG_ID_DL_TTI_BUNDLE_DISABLE_CFG,
44 L2TPS_MSG_ID_UL_TTI_BUNDLE_DISABLE_CNF,
45 L2TPS_MSG_ID_DL_RA_CFG,
46 L2TPS_MSG_ID_UL_RA_CFG_CNF,
47 L2TPS_MSG_ID_DL_SR_CFG,
48 L2TPS_MSG_ID_UL_SR_CFG_CNF,
49 L2TPS_MSG_ID_DL_BSR_CFG,
50 L2TPS_MSG_ID_UL_BSR_CFG_CNF,
51 L2TPS_MSG_ID_DL_SRB2_DLUL_LB_START,
52 L2TPS_MSG_ID_DL_RLF_REPORT_ENABLE,
53 L2TPS_MSG_ID_UL_RLF_REPORT,
54 L2TPS_MSG_ID_DL_SRB_DATA_REQ,
55 L2TPS_MSG_ID_UL_SRB_DATA_CNF,
56 L2TPS_MSG_ID_DL_MEAS_GAP_CFG,
57 L2TPS_MSG_ID_UL_MEAS_GAP_CFG_CNF,
58 L2TPS_MSG_ID_DL_GEMINI_GAP_CFG,
59 L2TPS_MSG_ID_UL_GEMINI_GAP_CFG_CNF,
60 L2TPS_MSG_ID_DL_PRACH_CFG,
61 L2TPS_MSG_ID_UL_PRACH_CFG_CNF
62};
63
64typedef struct
65{
66 uint16 tdd_cfg;
67 uint16 special_sf_idx;
68} l2tps_cmd_dl_polling_t;
69
70typedef struct
71{
72 uint16 tc_id;
73 uint8 rsv0;
74 uint8 rsv1;
75} l2tps_cmd_dl_test_start_t;
76
77typedef struct
78{
79 uint32 pkt_num;
80 uint32 pkt_size;
81 uint32 rb_idx;
82} l2tps_cmd_dl_ul_data_req_t;
83
84typedef struct
85{
86 uint32 rb_cfg;
87 uint8 lcid;
88 uint8 rb_id;
89 uint8 rb_idx;
90 uint8 rsv0;
91} l2tps_add_rb_info_t;
92
93typedef struct
94{
95 uint8 est_num;
96 uint8 rsv0;
97 uint8 rsv1;
98 uint8 rsv2;
99 l2tps_add_rb_info_t est_rb[8];
100} l2tps_cmd_dl_est_drb_t;
101
102typedef struct
103{
104 uint16 tdd_cfg;
105 uint16 special_sf_idx;
106 uint8 ueid[6];
107 uint8 rsv0;
108 uint8 rsv1;
109} l2tps_cmd_dl_initial_access_req;
110
111typedef struct
112{
113 uint32 offset;
114
115 uint8 drx_release;
116 uint8 long_cycle;
117 uint8 on_timer;
118 uint8 inact_timer;
119
120 uint8 retx_timer;
121 uint8 short_cycle_valid;
122 uint8 short_cycle;
123 uint8 short_timer;
124} l2tps_cmd_dl_drx_cfg;
125
126typedef struct
127{
128 uint8 rapid;
129 uint8 ra_mask;
130 uint8 rsv0;
131 uint8 drx_enable; // bool: TRUE = with DRX config, to verify HO cmd + DRX config scenario
132 l2tps_cmd_dl_drx_cfg drx_cfg;
133} l2tps_cmd_dl_ho_ra_req;
134
135typedef struct
136{
137 uint16 send_delay;
138} l2tps_cmd_dl_srb_data_req;
139
140typedef struct
141{
142 uint32 ta_timer_idx;
143} l2tps_cmd_dl_ta_timer_cfg;
144
145typedef struct
146{
147 uint16 sps_crnti;
148 uint8 ul_sps_valid;
149 uint8 dl_sps_valid;
150
151 uint16 dl_sps_interval;
152 uint16 ul_sps_interval;
153 uint8 dl_sps_proc_num;
154 uint8 ul_sps_imp_rel;
155 uint8 two_interval;
156 uint8 rsv0;
157} l2tps_cmd_dl_sps_cfg;
158
159typedef struct
160{
161 uint8 ra_preamble_nb_index; //enum 0-15
162 uint8 ra_pow_ramping_index; //enum 0-3
163 uint8 ra_preamble_init_pow_index; //enum 0-15
164 uint8 ra_preamble_tx_max_index; //enum 0-10
165 uint8 ra_rar_wnd_sz_index; //enum 0-7
166 uint8 ra_cr_timer_index; //enum 0-7
167
168 uint8 ra_msg3_tx_max; //uint8
169
170 uint8 group_a_valid; //bool
171 uint8 ra_group_a_sz_index; //enum 0-14
172 uint8 ra_msg_sz_group_a_index; //enum 0-3
173 uint8 ra_msg_pow_offset_group_b_index; //enum 0-7
174
175 uint8 ra_dedicated_valid; //bool
176 uint8 rapid; //uint8
177 uint8 prach_mask; //uint8
178
179 uint8 rsv0;
180 uint8 rsv1;
181}l2tps_cmd_dl_ra_cfg;
182
183typedef struct
184{
185 uint8 config_index; // 0~63
186 uint8 zero_corr_zone; // 0~15
187 uint8 freq_offset; // 0~94
188 uint8 high_speed; // true or false
189 uint32 root_index; // 0~837
190}l2tps_cmd_dl_prach_cfg;
191
192typedef struct
193{
194 //EmacCfgReq
195 uint16 sr_prohibit_timer;//uint8
196 uint16 rsv;
197 //CphyCfgReq
198 uint16 sr_enable; //bool
199 uint16 pucch_resource; //uint16
200 uint16 config_index; //uint8
201 uint16 dsr_max; //uint8
202}l2tps_cmd_dl_sr_cfg;
203
204typedef struct
205{
206 //EmacCfgReq
207 uint16 periodic_bsr_timer_index; //enum0-14
208 uint16 retx_bsr_timer_index; //enum0-5
209
210}l2tps_cmd_dl_bsr_cfg;
211
212typedef struct
213{
214 uint8 rb_idx; //RB index
215 uint8 rbid; //RB ID
216 uint16 is_old_rb; //old RB RLF or not
217
218}l2tps_cmd_ul_rlf_report;
219
220typedef struct
221{
222 uint8 meas_gap_setup; //bool
223 uint8 gap_pattern; //0 or 1
224 uint8 gap_offset; //0-39 for gp0, 0-79 for gp1
225
226}l2tps_cmd_dl_meas_gap_cfg;
227
228typedef struct
229{
230 uint8 gap_var_durn;
231 uint8 gap_var_durn_prob;
232
233}l2tps_cmd_dl_gemini_var_durn_t;
234
235typedef struct
236{
237 uint16 gap_offset;
238 uint16 gap_cycle;
239 uint8 gap_duration; //Original gap duration
240 uint8 gap_durn_mode; //0: always apply gap_duration, 1: var_durn, 2: durn_seq
241 uint8 rsrv0; //To make 4-byte align
242 uint8 gap_var_durn_num; //Config if gap shrinking is wanted.(MAX 3 var_durn) If sum of var_durn_prob < 1, the rest probability remains as gap_duration.
243 l2tps_cmd_dl_gemini_var_durn_t gap_var_durn[L2TPS_MAX_GEMINI_VAR_DURN_NUM];
244 uint8 gap_durn_seq_num;
245 uint8 gap_durn_seq[L2TPS_MAX_GEMINI_DURN_SEQ_NUM];
246 uint8 rsrv1; //To make 4-byte align
247 uint8 rsrv2; //To make 4-byte align
248 uint8 rsrv3; //To make 4-byte align
249
250}l2tps_cmd_dl_gemini_gap_pattern_t;
251
252typedef struct
253{
254 uint8 need_cnf_flag; //bool, true->need UE reply GEMINI_GAP_CNF
255 uint8 gemini_gap_setup; //bool, true->enable gemini gap, false->disable gemini gap
256 uint8 gap_pattern_num; //At most config 3 gap pattern
257 uint8 rsrv0; //To make 4-byte align
258 l2tps_cmd_dl_gemini_gap_pattern_t gap_pattern[L2TPS_MAX_GEMINI_GAP_PATTERN_NUM];
259
260}l2tps_cmd_dl_gemini_gap_cfg;
261
262#endif